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From: Kito Cheng <kito.cheng@gmail.com>
To: Christoph Muellner <christoph.muellner@vrull.eu>
Cc: gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@sifive.com>,
	 Jim Wilson <jim.wilson.gcc@gmail.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Andrew Waterman <andrew@sifive.com>,
	Philipp Tomsich <philipp.tomsich@vrull.eu>,
	 Cooper Qu <cooper.qu@linux.alibaba.com>,
	Lifang Xia <lifang_xia@linux.alibaba.com>,
	 Yunhai Shang <yunhai@linux.alibaba.com>,
	Zhiwei Liu <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH 03/11] riscv: xtheadmempair: Fix doc for th_mempair_order_operands()
Date: Fri, 28 Apr 2023 15:18:17 +0800	[thread overview]
Message-ID: <CA+yXCZCi0DUH5BtS5VzKaLkD_QqtSgw5t36TRX6_+pmHntXSNA@mail.gmail.com> (raw)
In-Reply-To: <20230428061210.2988035-4-christoph.muellner@vrull.eu>

LGTM

On Fri, Apr 28, 2023 at 2:17 PM Christoph Muellner
<christoph.muellner@vrull.eu> wrote:
>
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> There is an incorrect sentence in the documentation of the function
> th_mempair_order_operands(). Let's remove it.
>
> gcc/ChangeLog:
>
>         * config/riscv/thead.cc (th_mempair_operands_p):
>         Fix documentation of th_mempair_order_operands().
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---
>  gcc/config/riscv/thead.cc | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/riscv/thead.cc b/gcc/config/riscv/thead.cc
> index d7e3cf80d9b..507c912bc39 100644
> --- a/gcc/config/riscv/thead.cc
> +++ b/gcc/config/riscv/thead.cc
> @@ -336,8 +336,8 @@ th_mempair_operands_p (rtx operands[4], bool load_p,
>  }
>
>  /* Given OPERANDS of consecutive load/store that can be merged,
> -   swap them if they are not in ascending order.
> -   Return true if swap was performed.  */
> +   swap them if they are not in ascending order.  */
> +
>  void
>  th_mempair_order_operands (rtx operands[4], bool load_p, machine_mode mode)
>  {
> --
> 2.40.1
>

  reply	other threads:[~2023-04-28  7:18 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-28  6:12 [PATCH 00/11] Improvements for XThead* support Christoph Muellner
2023-04-28  6:12 ` [PATCH 01/11] riscv: xtheadbb: Add sign/zero extension support for th.ext and th.extu Christoph Muellner
2023-04-28  7:17   ` Kito Cheng
2023-04-28  6:12 ` [PATCH 02/11] riscv: xtheadmempair: Fix CFA reg notes Christoph Muellner
2023-04-28  7:17   ` Kito Cheng
2024-03-17 20:22   ` Christoph Müllner
2024-03-18  3:25     ` Jeff Law
2023-04-28  6:12 ` [PATCH 03/11] riscv: xtheadmempair: Fix doc for th_mempair_order_operands() Christoph Muellner
2023-04-28  7:18   ` Kito Cheng [this message]
2023-04-28  6:12 ` [PATCH 04/11] riscv: thead: Adjust constraints of th_addsl INSN Christoph Muellner
2023-04-28  7:19   ` Kito Cheng
2023-04-28  6:12 ` [PATCH 05/11] riscv: Simplify output of MEM addresses Christoph Muellner
2023-04-28  7:21   ` Kito Cheng
2023-04-28  6:12 ` [PATCH 06/11] riscv: Define Xmode macro Christoph Muellner
2023-04-28  7:23   ` Kito Cheng
2023-04-28  6:12 ` [PATCH 07/11] riscv: Move address classification info types to riscv-protos.h Christoph Muellner
2023-04-28  7:23   ` Kito Cheng
2023-04-28  6:12 ` [PATCH 08/11] riscv: Prepare backend for index registers Christoph Muellner
2023-04-28  8:34   ` Kito Cheng
2023-04-28  6:12 ` [PATCH 09/11] riscv: thead: Factor out XThead*-specific peepholes Christoph Muellner
2023-04-28  8:37   ` Kito Cheng
2023-04-28  8:35 ` [PATCH 00/11] Improvements for XThead* support Kito Cheng

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