Re: [PATCH 04/11] riscv: thead: Adjust constraints of th_addsl INSN

[Kito Cheng <kito.cheng@gmail.com>]

LGTM, personally I also like this way too.

On Fri, Apr 28, 2023 at 2:13 PM Christoph Muellner
<christoph.muellner@vrull.eu> wrote:
>
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> A recent change adjusted the constraints of ZBA's shNadd INSN.
> Let's mirror this change here as well.
>
> gcc/ChangeLog:
>
>         * config/riscv/thead.md: Adjust constraints of th_addsl.
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---
>  gcc/config/riscv/thead.md | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/config/riscv/thead.md b/gcc/config/riscv/thead.md
> index 6a06d0dfcf2..aa933960a98 100644
> --- a/gcc/config/riscv/thead.md
> +++ b/gcc/config/riscv/thead.md
> @@ -22,10 +22,9 @@
>  (define_insn "*th_addsl<mode>4"
>    [(set (match_operand:X 0 "register_operand" "=r")
>         (plus:X (ashift:X (match_operand:X 1 "register_operand" "r")
> -                         (match_operand 2 "const_int_operand" "n"))
> +                         (match_operand:QI 2 "imm123_operand" "Ds3"))
>                 (match_operand:X 3 "register_operand" "r")))]
> -  "TARGET_XTHEADBA
> -   && (INTVAL (operands[2]) >= 0) && (INTVAL (operands[2]) <= 3)"
> +  "TARGET_XTHEADBA"
>    "th.addsl\t%0,%3,%1,%2"
>    [(set_attr "type" "bitmanip")
>     (set_attr "mode" "<X:MODE>")])
> --
> 2.40.1
>