From: Kito Cheng <kito.cheng@gmail.com>
To: Christoph Muellner <christoph.muellner@vrull.eu>
Cc: gcc-patches@gcc.gnu.org, Kito Cheng <kito.cheng@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Cooper Qu <cooper.qu@linux.alibaba.com>,
Lifang Xia <lifang_xia@linux.alibaba.com>,
Yunhai Shang <yunhai@linux.alibaba.com>,
Zhiwei Liu <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH 02/11] riscv: xtheadmempair: Fix CFA reg notes
Date: Fri, 28 Apr 2023 15:17:52 +0800 [thread overview]
Message-ID: <CA+yXCZCBcS27WHS+_H1F+JM1WCDay+DsK0VJiJ72EBSk0KeuLA@mail.gmail.com> (raw)
In-Reply-To: <20230428061210.2988035-3-christoph.muellner@vrull.eu>
ok
On Fri, Apr 28, 2023 at 2:15 PM Christoph Muellner
<christoph.muellner@vrull.eu> wrote:
>
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> The current implementation triggers an assertion in
> dwarf2out_frame_debug_cfa_offset() under certain circumstances.
> The standard code uses REG_FRAME_RELATED_EXPR notes instead
> of REG_CFA_OFFSET notes when saving registers on the stack.
> So let's do this as well.
>
> gcc/ChangeLog:
>
> * config/riscv/thead.cc (th_mempair_save_regs):
> Emit REG_FRAME_RELATED_EXPR notes in prologue.
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---
> gcc/config/riscv/thead.cc | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/gcc/config/riscv/thead.cc b/gcc/config/riscv/thead.cc
> index 75203805310..d7e3cf80d9b 100644
> --- a/gcc/config/riscv/thead.cc
> +++ b/gcc/config/riscv/thead.cc
> @@ -368,8 +368,12 @@ th_mempair_save_regs (rtx operands[4])
> rtx set2 = gen_rtx_SET (operands[2], operands[3]);
> rtx insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set1, set2)));
> RTX_FRAME_RELATED_P (insn) = 1;
> - add_reg_note (insn, REG_CFA_OFFSET, copy_rtx (set1));
> - add_reg_note (insn, REG_CFA_OFFSET, copy_rtx (set2));
> +
> + REG_NOTES (insn) = alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR,
> + copy_rtx (set1), REG_NOTES (insn));
> +
> + REG_NOTES (insn) = alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR,
> + copy_rtx (set2), REG_NOTES (insn));
> }
>
> /* Similar like riscv_restore_reg, but restores two registers from memory
> --
> 2.40.1
>
next prev parent reply other threads:[~2023-04-28 7:18 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-28 6:12 [PATCH 00/11] Improvements for XThead* support Christoph Muellner
2023-04-28 6:12 ` [PATCH 01/11] riscv: xtheadbb: Add sign/zero extension support for th.ext and th.extu Christoph Muellner
2023-04-28 7:17 ` Kito Cheng
2023-04-28 6:12 ` [PATCH 02/11] riscv: xtheadmempair: Fix CFA reg notes Christoph Muellner
2023-04-28 7:17 ` Kito Cheng [this message]
2024-03-17 20:22 ` Christoph Müllner
2024-03-18 3:25 ` Jeff Law
2023-04-28 6:12 ` [PATCH 03/11] riscv: xtheadmempair: Fix doc for th_mempair_order_operands() Christoph Muellner
2023-04-28 7:18 ` Kito Cheng
2023-04-28 6:12 ` [PATCH 04/11] riscv: thead: Adjust constraints of th_addsl INSN Christoph Muellner
2023-04-28 7:19 ` Kito Cheng
2023-04-28 6:12 ` [PATCH 05/11] riscv: Simplify output of MEM addresses Christoph Muellner
2023-04-28 7:21 ` Kito Cheng
2023-04-28 6:12 ` [PATCH 06/11] riscv: Define Xmode macro Christoph Muellner
2023-04-28 7:23 ` Kito Cheng
2023-04-28 6:12 ` [PATCH 07/11] riscv: Move address classification info types to riscv-protos.h Christoph Muellner
2023-04-28 7:23 ` Kito Cheng
2023-04-28 6:12 ` [PATCH 08/11] riscv: Prepare backend for index registers Christoph Muellner
2023-04-28 8:34 ` Kito Cheng
2023-04-28 6:12 ` [PATCH 09/11] riscv: thead: Factor out XThead*-specific peepholes Christoph Muellner
2023-04-28 8:37 ` Kito Cheng
2023-04-28 8:35 ` [PATCH 00/11] Improvements for XThead* support Kito Cheng
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