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* [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
@ 2022-11-17  9:53 Yixuan Chen
  2022-11-17 21:50 ` Jeff Law
  0 siblings, 1 reply; 7+ messages in thread
From: Yixuan Chen @ 2022-11-17  9:53 UTC (permalink / raw)
  To: gcc-patches; +Cc: kito.cheng, andrew, oriachiuan, Yixuan Chen

2022-11-17  Yixuan Chen  <chenyixuan@iscas.ac.cn>

        * gcc/testsuite/gcc.dg/pr25521.c: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
---
 gcc/testsuite/gcc.dg/pr25521.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.dg/pr25521.c b/gcc/testsuite/gcc.dg/pr25521.c
index 74fe2ae6626..628ddf1a761 100644
--- a/gcc/testsuite/gcc.dg/pr25521.c
+++ b/gcc/testsuite/gcc.dg/pr25521.c
@@ -2,7 +2,8 @@
    sections.
 
    { dg-require-effective-target elf }
-   { dg-do compile } */
+   { dg-do compile }
+   { dg-options "-msmall-data-limit=0" { target { riscv*-*-* } } } */
 
 const volatile int foo = 30;
 
-- 
2.37.2


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
  2022-11-17  9:53 [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv Yixuan Chen
@ 2022-11-17 21:50 ` Jeff Law
  2022-11-17 23:59   ` Palmer Dabbelt
  2022-11-18  5:52   ` 陈逸轩
  0 siblings, 2 replies; 7+ messages in thread
From: Jeff Law @ 2022-11-17 21:50 UTC (permalink / raw)
  To: Yixuan Chen, gcc-patches; +Cc: kito.cheng, andrew, oriachiuan

[-- Attachment #1: Type: text/plain, Size: 926 bytes --]


On 11/17/22 02:53, Yixuan Chen wrote:
> 2022-11-17  Yixuan Chen  <chenyixuan@iscas.ac.cn>
>
>          * gcc/testsuite/gcc.dg/pr25521.c: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
> ---
>   gcc/testsuite/gcc.dg/pr25521.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/testsuite/gcc.dg/pr25521.c b/gcc/testsuite/gcc.dg/pr25521.c
> index 74fe2ae6626..628ddf1a761 100644
> --- a/gcc/testsuite/gcc.dg/pr25521.c
> +++ b/gcc/testsuite/gcc.dg/pr25521.c
> @@ -2,7 +2,8 @@
>      sections.
>   
>      { dg-require-effective-target elf }
> -   { dg-do compile } */
> +   { dg-do compile }
> +   { dg-options "-msmall-data-limit=0" { target { riscv*-*-* } } } */
>   
>   const volatile int foo = 30;
>   

Wouldn't this be better?  It avoids a target specific conditional by 
instead extending what we look for to cover [s]rodata sections.


Thoughts?

Jeff

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diff --git a/gcc/testsuite/gcc.dg/pr25521.c b/gcc/testsuite/gcc.dg/pr25521.c
index 74fe2ae6626..63363a03b9f 100644
--- a/gcc/testsuite/gcc.dg/pr25521.c
+++ b/gcc/testsuite/gcc.dg/pr25521.c
@@ -7,4 +7,4 @@
 const volatile int foo = 30;
 
 
-/* { dg-final { scan-assembler "\\.rodata" } } */
+/* { dg-final { scan-assembler "\\.s\?rodata" } } */

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
  2022-11-17 21:50 ` Jeff Law
@ 2022-11-17 23:59   ` Palmer Dabbelt
  2022-11-18  3:30     ` Oria Chiuan
  2022-11-18  5:52   ` 陈逸轩
  1 sibling, 1 reply; 7+ messages in thread
From: Palmer Dabbelt @ 2022-11-17 23:59 UTC (permalink / raw)
  To: gcc-patches
  Cc: chenyixuan, gcc-patches, Kito Cheng, Andrew Waterman, oriachiuan

On Thu, 17 Nov 2022 13:50:00 PST (-0800), gcc-patches@gcc.gnu.org wrote:
>
> On 11/17/22 02:53, Yixuan Chen wrote:
>> 2022-11-17  Yixuan Chen  <chenyixuan@iscas.ac.cn>
>>
>>          * gcc/testsuite/gcc.dg/pr25521.c: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
>> ---
>>   gcc/testsuite/gcc.dg/pr25521.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/gcc/testsuite/gcc.dg/pr25521.c b/gcc/testsuite/gcc.dg/pr25521.c
>> index 74fe2ae6626..628ddf1a761 100644
>> --- a/gcc/testsuite/gcc.dg/pr25521.c
>> +++ b/gcc/testsuite/gcc.dg/pr25521.c
>> @@ -2,7 +2,8 @@
>>      sections.
>>
>>      { dg-require-effective-target elf }
>> -   { dg-do compile } */
>> +   { dg-do compile }
>> +   { dg-options "-msmall-data-limit=0" { target { riscv*-*-* } } } */
>>
>>   const volatile int foo = 30;
>>
>
> Wouldn't this be better?  It avoids a target specific conditional by
> instead extending what we look for to cover [s]rodata sections.
>
>
> Thoughts?
>
> Jeff
> diff --git a/gcc/testsuite/gcc.dg/pr25521.c b/gcc/testsuite/gcc.dg/pr25521.c
> index 74fe2ae6626..63363a03b9f 100644
> --- a/gcc/testsuite/gcc.dg/pr25521.c
> +++ b/gcc/testsuite/gcc.dg/pr25521.c
> @@ -7,4 +7,4 @@
>  const volatile int foo = 30;
>
>
> -/* { dg-final { scan-assembler "\\.rodata" } } */
> +/* { dg-final { scan-assembler "\\.s\?rodata" } } */

That's how I usually do it for these tests, there's some other targets 
with sdata too so it fixes the test for everyone.  IIRC I said something 
like that in the v1, but sorry if I'm just getting it confused with some 
other patch.

There's a few of these that need to get chased down for every release, 
maybe we should add some sort of DG hepler?  Not sure that'd keep folks 
from matching on .data, though...

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
  2022-11-17 23:59   ` Palmer Dabbelt
@ 2022-11-18  3:30     ` Oria Chiuan
  2022-11-18  5:02       ` Palmer Dabbelt
  0 siblings, 1 reply; 7+ messages in thread
From: Oria Chiuan @ 2022-11-18  3:30 UTC (permalink / raw)
  To: Palmer Dabbelt
  Cc: gcc-patches, chenyixuan, Kito Cheng, Andrew Waterman, jiawei

[-- Attachment #1: Type: text/plain, Size: 2153 bytes --]

Got it, I used to regard this test case as targeting at test if the const
data would use the ".rodata" section.

Palmer Dabbelt <palmer@dabbelt.com> 于2022年11月18日周五 07:59写道:

> On Thu, 17 Nov 2022 13:50:00 PST (-0800), gcc-patches@gcc.gnu.org wrote:
> >
> > On 11/17/22 02:53, Yixuan Chen wrote:
> >> 2022-11-17  Yixuan Chen  <chenyixuan@iscas.ac.cn>
> >>
> >>          * gcc/testsuite/gcc.dg/pr25521.c: Add compile option
> "-msmall-data-limit=0" to avoid using .srodata section for riscv.
> >> ---
> >>   gcc/testsuite/gcc.dg/pr25521.c | 3 ++-
> >>   1 file changed, 2 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/gcc/testsuite/gcc.dg/pr25521.c
> b/gcc/testsuite/gcc.dg/pr25521.c
> >> index 74fe2ae6626..628ddf1a761 100644
> >> --- a/gcc/testsuite/gcc.dg/pr25521.c
> >> +++ b/gcc/testsuite/gcc.dg/pr25521.c
> >> @@ -2,7 +2,8 @@
> >>      sections.
> >>
> >>      { dg-require-effective-target elf }
> >> -   { dg-do compile } */
> >> +   { dg-do compile }
> >> +   { dg-options "-msmall-data-limit=0" { target { riscv*-*-* } } } */
> >>
> >>   const volatile int foo = 30;
> >>
> >
> > Wouldn't this be better?  It avoids a target specific conditional by
> > instead extending what we look for to cover [s]rodata sections.
> >
> >
> > Thoughts?
> >
> > Jeff
> > diff --git a/gcc/testsuite/gcc.dg/pr25521.c
> b/gcc/testsuite/gcc.dg/pr25521.c
> > index 74fe2ae6626..63363a03b9f 100644
> > --- a/gcc/testsuite/gcc.dg/pr25521.c
> > +++ b/gcc/testsuite/gcc.dg/pr25521.c
> > @@ -7,4 +7,4 @@
> >  const volatile int foo = 30;
> >
> >
> > -/* { dg-final { scan-assembler "\\.rodata" } } */
> > +/* { dg-final { scan-assembler "\\.s\?rodata" } } */
>
> That's how I usually do it for these tests, there's some other targets
> with sdata too so it fixes the test for everyone.  IIRC I said something
> like that in the v1, but sorry if I'm just getting it confused with some
> other patch.
>
> There's a few of these that need to get chased down for every release,
> maybe we should add some sort of DG hepler?  Not sure that'd keep folks
> from matching on .data, though...
>

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
  2022-11-18  3:30     ` Oria Chiuan
@ 2022-11-18  5:02       ` Palmer Dabbelt
  2022-11-18  5:21         ` Oria Chiuan
  0 siblings, 1 reply; 7+ messages in thread
From: Palmer Dabbelt @ 2022-11-18  5:02 UTC (permalink / raw)
  To: oriachiuan; +Cc: gcc-patches, chenyixuan, Kito Cheng, Andrew Waterman, jiawei

On Thu, 17 Nov 2022 19:30:23 PST (-0800), oriachiuan@gmail.com wrote:
> Got it, I used to regard this test case as targeting at test if the const
> data would use the ".rodata" section.

Sorry, I'm not quite sure what you're trying to say here.  Here's a dump 
of how I see things:

In some targets (RISC-V and MIPS) there's multiple copies of the 
data/rodata sections, with the small data/rodata ending up in the small 
sections (`.sdata` and `.srodata`).  I've never actually been 100% on 
that being allowed by any spec, but MIPS did it long before RISC-V so I 
figure software is expected to tolerate the oddness.

In RISC-V we use it to try and place as many symbols as possible close 
to GP, so we're more likely to relax to GP-relative addressing 
sequences.  IIRC that's pretty much the same as MIPS, though they have 
slightly different addressing requirements.

For targets that function this way `.srodata` and `.rodata` are 
functionally equivalent (assuming you're not playing any GP tricks to 
relocate, but those are way out of what's supported).  So unless the 
test is trying to dig into performance issues differences between these 
sections, it should just allow code to target either.

>
> Palmer Dabbelt <palmer@dabbelt.com> 于2022年11月18日周五 07:59写道:
>
>> On Thu, 17 Nov 2022 13:50:00 PST (-0800), gcc-patches@gcc.gnu.org wrote:
>> >
>> > On 11/17/22 02:53, Yixuan Chen wrote:
>> >> 2022-11-17  Yixuan Chen  <chenyixuan@iscas.ac.cn>
>> >>
>> >>          * gcc/testsuite/gcc.dg/pr25521.c: Add compile option
>> "-msmall-data-limit=0" to avoid using .srodata section for riscv.
>> >> ---
>> >>   gcc/testsuite/gcc.dg/pr25521.c | 3 ++-
>> >>   1 file changed, 2 insertions(+), 1 deletion(-)
>> >>
>> >> diff --git a/gcc/testsuite/gcc.dg/pr25521.c
>> b/gcc/testsuite/gcc.dg/pr25521.c
>> >> index 74fe2ae6626..628ddf1a761 100644
>> >> --- a/gcc/testsuite/gcc.dg/pr25521.c
>> >> +++ b/gcc/testsuite/gcc.dg/pr25521.c
>> >> @@ -2,7 +2,8 @@
>> >>      sections.
>> >>
>> >>      { dg-require-effective-target elf }
>> >> -   { dg-do compile } */
>> >> +   { dg-do compile }
>> >> +   { dg-options "-msmall-data-limit=0" { target { riscv*-*-* } } } */
>> >>
>> >>   const volatile int foo = 30;
>> >>
>> >
>> > Wouldn't this be better?  It avoids a target specific conditional by
>> > instead extending what we look for to cover [s]rodata sections.
>> >
>> >
>> > Thoughts?
>> >
>> > Jeff
>> > diff --git a/gcc/testsuite/gcc.dg/pr25521.c
>> b/gcc/testsuite/gcc.dg/pr25521.c
>> > index 74fe2ae6626..63363a03b9f 100644
>> > --- a/gcc/testsuite/gcc.dg/pr25521.c
>> > +++ b/gcc/testsuite/gcc.dg/pr25521.c
>> > @@ -7,4 +7,4 @@
>> >  const volatile int foo = 30;
>> >
>> >
>> > -/* { dg-final { scan-assembler "\\.rodata" } } */
>> > +/* { dg-final { scan-assembler "\\.s\?rodata" } } */
>>
>> That's how I usually do it for these tests, there's some other targets
>> with sdata too so it fixes the test for everyone.  IIRC I said something
>> like that in the v1, but sorry if I'm just getting it confused with some
>> other patch.
>>
>> There's a few of these that need to get chased down for every release,
>> maybe we should add some sort of DG hepler?  Not sure that'd keep folks
>> from matching on .data, though...
>>

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
  2022-11-18  5:02       ` Palmer Dabbelt
@ 2022-11-18  5:21         ` Oria Chiuan
  0 siblings, 0 replies; 7+ messages in thread
From: Oria Chiuan @ 2022-11-18  5:21 UTC (permalink / raw)
  To: Palmer Dabbelt
  Cc: Andrew Waterman, Kito Cheng, chenyixuan, gcc-patches, jiawei

[-- Attachment #1: Type: text/plain, Size: 3620 bytes --]

Thank you very much for your patient explanation!

Palmer Dabbelt <palmer@dabbelt.com>于2022年11月18日 周五13:02写道:

> On Thu, 17 Nov 2022 19:30:23 PST (-0800), oriachiuan@gmail.com wrote:
> > Got it, I used to regard this test case as targeting at test if the const
> > data would use the ".rodata" section.
>
> Sorry, I'm not quite sure what you're trying to say here.  Here's a dump
> of how I see things:
>
> In some targets (RISC-V and MIPS) there's multiple copies of the
> data/rodata sections, with the small data/rodata ending up in the small
> sections (`.sdata` and `.srodata`).  I've never actually been 100% on
> that being allowed by any spec, but MIPS did it long before RISC-V so I
> figure software is expected to tolerate the oddness.
>
> In RISC-V we use it to try and place as many symbols as possible close
> to GP, so we're more likely to relax to GP-relative addressing
> sequences.  IIRC that's pretty much the same as MIPS, though they have
> slightly different addressing requirements.
>
> For targets that function this way `.srodata` and `.rodata` are
> functionally equivalent (assuming you're not playing any GP tricks to
> relocate, but those are way out of what's supported).  So unless the
> test is trying to dig into performance issues differences between these
> sections, it should just allow code to target either.
>
> >
> > Palmer Dabbelt <palmer@dabbelt.com> 于2022年11月18日周五 07:59写道:
> >
> >> On Thu, 17 Nov 2022 13:50:00 PST (-0800), gcc-patches@gcc.gnu.org
> wrote:
> >> >
> >> > On 11/17/22 02:53, Yixuan Chen wrote:
> >> >> 2022-11-17  Yixuan Chen  <chenyixuan@iscas.ac.cn>
> >> >>
> >> >>          * gcc/testsuite/gcc.dg/pr25521.c: Add compile option
> >> "-msmall-data-limit=0" to avoid using .srodata section for riscv.
> >> >> ---
> >> >>   gcc/testsuite/gcc.dg/pr25521.c | 3 ++-
> >> >>   1 file changed, 2 insertions(+), 1 deletion(-)
> >> >>
> >> >> diff --git a/gcc/testsuite/gcc.dg/pr25521.c
> >> b/gcc/testsuite/gcc.dg/pr25521.c
> >> >> index 74fe2ae6626..628ddf1a761 100644
> >> >> --- a/gcc/testsuite/gcc.dg/pr25521.c
> >> >> +++ b/gcc/testsuite/gcc.dg/pr25521.c
> >> >> @@ -2,7 +2,8 @@
> >> >>      sections.
> >> >>
> >> >>      { dg-require-effective-target elf }
> >> >> -   { dg-do compile } */
> >> >> +   { dg-do compile }
> >> >> +   { dg-options "-msmall-data-limit=0" { target { riscv*-*-* } } }
> */
> >> >>
> >> >>   const volatile int foo = 30;
> >> >>
> >> >
> >> > Wouldn't this be better?  It avoids a target specific conditional by
> >> > instead extending what we look for to cover [s]rodata sections.
> >> >
> >> >
> >> > Thoughts?
> >> >
> >> > Jeff
> >> > diff --git a/gcc/testsuite/gcc.dg/pr25521.c
> >> b/gcc/testsuite/gcc.dg/pr25521.c
> >> > index 74fe2ae6626..63363a03b9f 100644
> >> > --- a/gcc/testsuite/gcc.dg/pr25521.c
> >> > +++ b/gcc/testsuite/gcc.dg/pr25521.c
> >> > @@ -7,4 +7,4 @@
> >> >  const volatile int foo = 30;
> >> >
> >> >
> >> > -/* { dg-final { scan-assembler "\\.rodata" } } */
> >> > +/* { dg-final { scan-assembler "\\.s\?rodata" } } */
> >>
> >> That's how I usually do it for these tests, there's some other targets
> >> with sdata too so it fixes the test for everyone.  IIRC I said something
> >> like that in the v1, but sorry if I'm just getting it confused with some
> >> other patch.
> >>
> >> There's a few of these that need to get chased down for every release,
> >> maybe we should add some sort of DG hepler?  Not sure that'd keep folks
> >> from matching on .data, though...
> >>
>

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Re: [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
  2022-11-17 21:50 ` Jeff Law
  2022-11-17 23:59   ` Palmer Dabbelt
@ 2022-11-18  5:52   ` 陈逸轩
  1 sibling, 0 replies; 7+ messages in thread
From: 陈逸轩 @ 2022-11-18  5:52 UTC (permalink / raw)
  To: Jeff Law; +Cc: gcc-patches, kito.cheng, andrew, oriachiuan

Thank you very much for your example! I have sent a new patch according to your guide.

&quot;Jeff Law&quot; &lt;jeffreyalaw@gmail.com&gt;wrote:
> 
> On 11/17/22 02:53, Yixuan Chen wrote:
> > 2022-11-17  Yixuan Chen  <chenyixuan@iscas.ac.cn>
> >
> >          * gcc/testsuite/gcc.dg/pr25521.c: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv.
> > ---
> >   gcc/testsuite/gcc.dg/pr25521.c | 3 ++-
> >   1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/gcc/testsuite/gcc.dg/pr25521.c b/gcc/testsuite/gcc.dg/pr25521.c
> > index 74fe2ae6626..628ddf1a761 100644
> > --- a/gcc/testsuite/gcc.dg/pr25521.c
> > +++ b/gcc/testsuite/gcc.dg/pr25521.c
> > @@ -2,7 +2,8 @@
> >      sections.
> >   
> >      { dg-require-effective-target elf }
> > -   { dg-do compile } */
> > +   { dg-do compile }
> > +   { dg-options "-msmall-data-limit=0" { target { riscv*-*-* } } } */
> >   
> >   const volatile int foo = 30;
> >   
> 
> Wouldn't this be better?  It avoids a target specific conditional by 
> instead extending what we look for to cover [s]rodata sections.
> 
> 
> Thoughts?
> 
> Jeff

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2022-11-18  5:52 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-17  9:53 [PATCH] Ver.2: Add compile option "-msmall-data-limit=0" to avoid using .srodata section for riscv Yixuan Chen
2022-11-17 21:50 ` Jeff Law
2022-11-17 23:59   ` Palmer Dabbelt
2022-11-18  3:30     ` Oria Chiuan
2022-11-18  5:02       ` Palmer Dabbelt
2022-11-18  5:21         ` Oria Chiuan
2022-11-18  5:52   ` 陈逸轩

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