From: Andrea Parri <andrea@rivosinc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Vineet Gupta <vineetg@rivosinc.com>,
jeffreyalaw@gmail.com, cmuellner@gcc.gnu.org,
gcc-patches@gcc.gnu.org, kito.cheng@sifive.com,
gnu-toolchain@rivosinc.com
Subject: Re: [PATCH v2 00/10] [RISC-V] Atomics improvements [PR100265/PR100266]
Date: Wed, 12 Oct 2022 19:16:20 +0200 [thread overview]
Message-ID: <Y0b2ZBPiz1aVNeKL@andrea> (raw)
In-Reply-To: <mhng-d009d127-c4f4-45d6-80da-e085ae3e6a12@palmer-ri-x1c9>
> > > +Andrea, in case he has time to look at the memory model / ABI
> > > issues.
> +Jeff, who was offering to help when the threads got crossed. I'd punted on
> a lot of this in the hope Andrea could help out, as I'm not really a memory
> model guy and this is pretty far down the rabbit hole. Happy to have the
> help if you're offering, though, as what's there is likely a pretty big
> performance issue for anyone with a reasonable memory system.
Thanks for linking me to the discussion and the remarks, Palmer. I'm
happy to help (and synchronized with Jeff/the community) as possible,
building a better understanding of the 'issues' at stake.
Andrea
next prev parent reply other threads:[~2022-10-12 17:16 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-05 19:36 Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 01/10] RISC-V: Simplify memory model code [PR 100265] Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 02/10] RISC-V: Emit proper memory ordering suffixes for AMOs " Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 03/10] RISC-V: Eliminate %F specifier from riscv_print_operand() " Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 04/10] RISC-V: Use STORE instead of AMOSWAP for atomic stores " Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 05/10] RISC-V: Emit fences according to chosen memory model " Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 06/10] RISC-V: Implement atomic_{load,store} " Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 07/10] RISC-V: Model INSNs for LR and SC [PR 100266] Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 08/10] RISC-V: Add s.ext-consuming " Christoph Muellner
2021-05-05 19:36 ` [PATCH v2 09/10] RISC-V: Provide programmatic implementation of CAS " Christoph Muellner
2021-05-06 0:27 ` Jim Wilson
2021-05-05 19:36 ` [PATCH v2 10/10] RISC-V: Introduce predicate "riscv_sync_memory_operand" " Christoph Muellner
2022-10-11 19:06 ` [PATCH v2 00/10] [RISC-V] Atomics improvements [PR100265/PR100266] Vineet Gupta
2022-10-11 19:31 ` Palmer Dabbelt
2022-10-11 20:46 ` Christoph Müllner
2022-10-11 23:31 ` Vineet Gupta
2022-10-12 0:15 ` Palmer Dabbelt
2022-10-12 8:03 ` Christoph Müllner
2022-10-13 23:11 ` Jeff Law
2022-10-12 17:16 ` Andrea Parri [this message]
2022-10-20 19:01 ` Andrea Parri
2022-10-29 5:02 ` Jeff Law
2022-10-13 23:04 ` Jeff Law
2022-10-13 22:39 ` Jeff Law
2022-10-13 23:14 ` Palmer Dabbelt
2022-10-14 11:03 ` Christoph Müllner
2022-10-14 20:39 ` Jeff Law
2022-10-14 21:57 ` Palmer Dabbelt
2022-10-15 0:31 ` Palmer Dabbelt
2022-10-14 0:14 ` Vineet Gupta
2022-10-11 23:14 ` Jeff Law
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