From: Mike Frysinger <vapier@gentoo.org>
To: jaydeep.patil@imgtec.com
Cc: gdb-patches@sourceware.org, aburgess@redhat.com,
joseph.faulls@imgtec.com, bhushan.attarde@imgtec.com
Subject: Re: [PATCH v2 2/3] [sim/riscv] Add support for compressed integer instruction set
Date: Wed, 29 Nov 2023 02:58:05 -0500 [thread overview]
Message-ID: <ZWbvDQhwlJ6bDjRm@vapier> (raw)
In-Reply-To: <20231030130042.1472535-3-jaydeep.patil@imgtec.com>
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On 30 Oct 2023 13:00, jaydeep.patil@imgtec.com wrote:
> Added support for compressed integer instruction set ("c").
i haven't been keeping up with riscv specs. is the compressed extension
finalized ? so you're only implementing official insns in the spec ? i
don't think it's appropriate for the sim to implement vendor-specific
stuff at this point in time.
> Added gdb.arch/riscv-insn-simulation.c to test it.
> Added simulator tests in sim/testsuite/riscv/c-ext.s
afaict, there is no relationship between the compression & semi-hosting work.
these are just two things you're working on ? so they don't really need to
be in the same patch series.
> .../gdb.arch/riscv-insn-simulation.c | 1544 +++++++++++++++++
> .../gdb.arch/riscv-insn-simulation.exp | 31 +
i'm missing something ... why does there need to be tests in gdb at all here ?
-mike
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next prev parent reply other threads:[~2023-11-29 7:58 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-30 13:00 [PATCH v2 0/3] sim: riscv: Compressed instruction simulation and semi-hosting support jaydeep.patil
2023-10-30 13:00 ` [PATCH v2 1/3] [sim/riscv] Add basic " jaydeep.patil
2023-11-29 7:57 ` Mike Frysinger
2023-12-12 17:24 ` Andrew Burgess
2023-12-13 3:43 ` Mike Frysinger
2023-12-18 12:44 ` Andrew Burgess
2023-12-18 23:06 ` Mike Frysinger
2023-12-19 6:13 ` [EXTERNAL] " Jaydeep Patil
2023-12-20 1:45 ` Mike Frysinger
2023-12-20 8:52 ` Jaydeep Patil
2023-12-12 17:57 ` Andrew Burgess
2023-10-30 13:00 ` [PATCH v2 2/3] [sim/riscv] Add support for compressed integer instruction set jaydeep.patil
2023-11-29 7:58 ` Mike Frysinger [this message]
2023-12-19 6:11 ` [EXTERNAL] " Jaydeep Patil
2023-12-20 1:32 ` Mike Frysinger
2023-10-30 13:00 ` [PATCH v2 3/3] [sim/riscv] Add semi-hosting support jaydeep.patil
2023-11-13 12:07 ` [PATCH v2 0/3] sim: riscv: Compressed instruction simulation and " Jaydeep Patil
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