* [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
@ 2022-12-30 2:40 Mark Harmstone
2022-12-30 2:40 ` [PATCH 2/8] Fix size of external_reloc for pe-aarch64 Mark Harmstone
` (8 more replies)
0 siblings, 9 replies; 34+ messages in thread
From: Mark Harmstone @ 2022-12-30 2:40 UTC (permalink / raw)
To: wej22007, zac.walker, tamar.christina, binutils; +Cc: Mark Harmstone
The second version of my aarch64-w64-mingw32 patches. With this, I'm now
able to compile a workable version of GCC, including the CRT (before it
was EFI-only).
Changes from last time:
* The aarch64pe emulation target is renamed to arm64pe. This is the name
that LLVM is already using, even though as a rule we call this arch aarch64.
Without this clang won't work with ld. Another possibility would be to
change the -m parameter if it's "arm64", but that seems to me like it's
making things more complicated than they need to be.
* The PE big-obj test is split into a separate patch, as per Jan's request
* Added support for BFD_RELOC_AARCH64_LDST128_LO12 relocations
* Relocations against absolute sections now work
* Added error for IMAGE_REL_ARM64_PAGEOFFSET_12L truncation
* Added pdb_vec to aarch64-w64-mingw32, now that it's complete
* Restored tc_pe_dwarf2_emit_offset in tc-aarch64.c, which is needed to
make sure that DWARF offsets are encoded correctly (they're secrels in
COFF). There were remnants of this there before, but they were removed
by Jedidiah's original patch - presumably because we didn't yet have
.secrel32.
Mark
---
ld/Makefile.am | 4 ++--
ld/Makefile.in | 6 +++---
ld/configure.tgt | 2 +-
ld/emulparams/{aarch64pe.sh => arm64pe.sh} | 0
ld/emultempl/pep.em | 4 ++--
ld/po/BLD-POTFILES.in | 2 +-
6 files changed, 9 insertions(+), 9 deletions(-)
rename ld/emulparams/{aarch64pe.sh => arm64pe.sh} (100%)
diff --git a/ld/Makefile.am b/ld/Makefile.am
index 65fef4e1690..b066b9d7323 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -388,7 +388,7 @@ ALL_64_EMULATION_SOURCES = \
eaarch64linux32.c \
eaarch64linux32b.c \
eaarch64linuxb.c \
- eaarch64pe.c \
+ earm64pe.c \
eelf32_x86_64.c \
eelf32b4300.c \
eelf32bmip.c \
@@ -879,7 +879,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linux32.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linux32b.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linuxb.Pc@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64pe.Pc@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/earm64pe.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_x86_64.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32b4300.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bmip.Pc@am__quote@
diff --git a/ld/Makefile.in b/ld/Makefile.in
index ff4c916c27b..edbdd06c705 100644
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -888,7 +888,7 @@ ALL_64_EMULATION_SOURCES = \
eaarch64linux32.c \
eaarch64linux32b.c \
eaarch64linuxb.c \
- eaarch64pe.c \
+ earm64pe.c \
eelf32_x86_64.c \
eelf32b4300.c \
eelf32bmip.c \
@@ -1264,7 +1264,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linux32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linux32b.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linuxb.Po@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64pe.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/earm64pe.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaix5ppc.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaix5rs6.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaixppc.Po@am__quote@
@@ -2553,7 +2553,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linux32.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linux32b.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linuxb.Pc@am__quote@
-@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64pe.Pc@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/earm64pe.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_x86_64.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32b4300.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bmip.Pc@am__quote@
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 741b246f67e..6b833f26248 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -119,7 +119,7 @@ aarch64-*-haiku*) targ_emul=aarch64haiku
targ_extra_emuls="aarch64elf aarch64elf32 aarch64elf32b aarch64elfb armelf armelfb armelf_haiku $targ_extra_libpath"
;;
aarch64-*-pe*)
- targ_emul=aarch64pe
+ targ_emul=arm64pe
targ_extra_ofiles="deffilep.o pep-dll-aarch64.o"
;;
alpha*-*-freebsd* | alpha*-*-kfreebsd*-gnu)
diff --git a/ld/emulparams/aarch64pe.sh b/ld/emulparams/arm64pe.sh
similarity index 100%
rename from ld/emulparams/aarch64pe.sh
rename to ld/emulparams/arm64pe.sh
diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em
index e2c538e6d99..e20339fa874 100644
--- a/ld/emultempl/pep.em
+++ b/ld/emultempl/pep.em
@@ -48,7 +48,7 @@ fragment <<EOF
#define COFF_IMAGE_WITH_PE
#define COFF_WITH_PE
-#ifdef TARGET_IS_aarch64pe
+#ifdef TARGET_IS_arm64pe
#define COFF_WITH_peAArch64
#elif defined (TARGET_IS_i386pep)
#define COFF_WITH_pex64
@@ -79,7 +79,7 @@ fragment <<EOF
header in generic PE code. */
#ifdef TARGET_IS_i386pep
# include "coff/x86_64.h"
-#elif defined TARGET_IS_aarch64pe
+#elif defined TARGET_IS_arm64pe
# include "coff/aarch64.h"
#endif
#include "coff/pe.h"
diff --git a/ld/po/BLD-POTFILES.in b/ld/po/BLD-POTFILES.in
index ff820172b98..cbd445b33e8 100644
--- a/ld/po/BLD-POTFILES.in
+++ b/ld/po/BLD-POTFILES.in
@@ -11,7 +11,7 @@ eaarch64linux.c
eaarch64linux32.c
eaarch64linux32b.c
eaarch64linuxb.c
-eaarch64pe.c
+earm64pe.c
eaix5ppc.c
eaix5rs6.c
eaixppc.c
--
2.37.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH 2/8] Fix size of external_reloc for pe-aarch64
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
@ 2022-12-30 2:40 ` Mark Harmstone
2022-12-30 2:40 ` [PATCH 3/8] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
` (7 subsequent siblings)
8 siblings, 0 replies; 34+ messages in thread
From: Mark Harmstone @ 2022-12-30 2:40 UTC (permalink / raw)
To: wej22007, zac.walker, tamar.christina, binutils; +Cc: Mark Harmstone
---
bfd/coff-aarch64.c | 4 ----
include/coff/aarch64.h | 3 +--
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index 2c3e225a222..0faa75c63d2 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -188,10 +188,6 @@ coff_aarch64_rtype_lookup (unsigned int code)
#define bfd_pe_print_pdata NULL
#endif
-/* Handle include/coff/aarch64.h external_reloc. */
-#define SWAP_IN_RELOC_OFFSET H_GET_32
-#define SWAP_OUT_RELOC_OFFSET H_PUT_32
-
/* Return TRUE if this relocation should
appear in the output .reloc section. */
diff --git a/include/coff/aarch64.h b/include/coff/aarch64.h
index 100e08f18ef..b670f28bd3e 100644
--- a/include/coff/aarch64.h
+++ b/include/coff/aarch64.h
@@ -54,11 +54,10 @@ struct external_reloc
char r_vaddr[4];
char r_symndx[4];
char r_type[2];
- char r_offset[4];
};
#define RELOC struct external_reloc
-#define RELSZ 14
+#define RELSZ 10
/* ARM64 relocations types. */
--
2.37.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH 3/8] Skip ELF-specific tests when targeting pe-aarch64
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
2022-12-30 2:40 ` [PATCH 2/8] Fix size of external_reloc for pe-aarch64 Mark Harmstone
@ 2022-12-30 2:40 ` Mark Harmstone
2022-12-30 2:40 ` [PATCH 4/8] Skip big-obj test for pe-aarch64 Mark Harmstone
` (6 subsequent siblings)
8 siblings, 0 replies; 34+ messages in thread
From: Mark Harmstone @ 2022-12-30 2:40 UTC (permalink / raw)
To: wej22007, zac.walker, tamar.christina, binutils; +Cc: Mark Harmstone
---
binutils/testsuite/binutils-all/objcopy.exp | 1 +
gas/testsuite/gas/aarch64/adr_1.d | 1 +
gas/testsuite/gas/aarch64/advsimd-mov-bad.d | 1 +
gas/testsuite/gas/aarch64/b_1.d | 1 +
gas/testsuite/gas/aarch64/beq_1.d | 1 +
gas/testsuite/gas/aarch64/bfloat16-directive-be.d | 1 +
gas/testsuite/gas/aarch64/bfloat16-directive-le.d | 1 +
gas/testsuite/gas/aarch64/codealign.d | 2 +-
gas/testsuite/gas/aarch64/codealign_1.d | 1 +
gas/testsuite/gas/aarch64/dwarf.d | 1 +
gas/testsuite/gas/aarch64/ilp32-basic.d | 1 +
gas/testsuite/gas/aarch64/int-insns.d | 1 +
gas/testsuite/gas/aarch64/ldr_1.d | 1 +
gas/testsuite/gas/aarch64/litpool.d | 2 +-
gas/testsuite/gas/aarch64/mapmisc.d | 2 +-
gas/testsuite/gas/aarch64/mapping.d | 2 +-
gas/testsuite/gas/aarch64/mapping2.d | 2 +-
gas/testsuite/gas/aarch64/mapping3.d | 2 +-
gas/testsuite/gas/aarch64/mapping4.d | 2 +-
gas/testsuite/gas/aarch64/mapping_5.d | 1 +
gas/testsuite/gas/aarch64/mapping_6.d | 1 +
gas/testsuite/gas/aarch64/mops_invalid_2.d | 1 +
gas/testsuite/gas/aarch64/movw_label.d | 1 +
gas/testsuite/gas/aarch64/optional.d | 1 +
gas/testsuite/gas/aarch64/pac_ab_key.d | 1 +
gas/testsuite/gas/aarch64/pac_negate_ra_state.d | 1 +
gas/testsuite/gas/aarch64/pr20364.d | 1 +
gas/testsuite/gas/aarch64/pr27217.d | 1 +
gas/testsuite/gas/aarch64/pr29519.d | 1 +
gas/testsuite/gas/aarch64/programmer-friendly.d | 1 +
gas/testsuite/gas/aarch64/reloc-data.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g0.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_g2.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d | 1 +
gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-gotoff_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-gottprel_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-insn.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g0.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g2.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-prel_g3.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d | 1 +
gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_1.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_10.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_11.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_12.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_13.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_14.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_15.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_16.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_17.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_18.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_19.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_2.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_20.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_21.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_22.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_23.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_24.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_25.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_26.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_27.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_28.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_3.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_4.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_5.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_6.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_7.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_8.d | 1 +
gas/testsuite/gas/aarch64/sve-movprfx_9.d | 1 +
gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d | 1 +
gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d | 1 +
gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d | 1 +
gas/testsuite/gas/aarch64/system.d | 1 +
gas/testsuite/gas/aarch64/tail_padding.d | 1 +
gas/testsuite/gas/aarch64/tbz_1.d | 1 +
gas/testsuite/gas/aarch64/tls-desc.d | 1 +
gas/testsuite/gas/aarch64/tls.d | 1 +
127 files changed, 127 insertions(+), 7 deletions(-)
diff --git a/binutils/testsuite/binutils-all/objcopy.exp b/binutils/testsuite/binutils-all/objcopy.exp
index de6f3aaaef2..40d18a0dc92 100644
--- a/binutils/testsuite/binutils-all/objcopy.exp
+++ b/binutils/testsuite/binutils-all/objcopy.exp
@@ -1413,6 +1413,7 @@ proc objcopy_test_without_global_symbol { } {
# The AArch64 and ARM targets preserve mapping symbols
# in object files, so they will fail this test.
setup_xfail aarch64*-*-* arm*-*-*
+clear_xfail aarch64*-*-pe* aarch64*-*-mingw*
objcopy_test_without_global_symbol
diff --git a/gas/testsuite/gas/aarch64/adr_1.d b/gas/testsuite/gas/aarch64/adr_1.d
index 4b5cc56144b..09ac6abe2a6 100644
--- a/gas/testsuite/gas/aarch64/adr_1.d
+++ b/gas/testsuite/gas/aarch64/adr_1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/advsimd-mov-bad.d b/gas/testsuite/gas/aarch64/advsimd-mov-bad.d
index 6ca98873ac2..02ac2a12715 100644
--- a/gas/testsuite/gas/aarch64/advsimd-mov-bad.d
+++ b/gas/testsuite/gas/aarch64/advsimd-mov-bad.d
@@ -1,5 +1,6 @@
#source: advsimd-mov-bad.s
#readelf: -s --wide
+#notarget: *-*-pe* *-*-mingw*
Symbol table '.symtab' contains 6 entries:
+Num:.*
diff --git a/gas/testsuite/gas/aarch64/b_1.d b/gas/testsuite/gas/aarch64/b_1.d
index 4815decb0c6..6268a8f9aec 100644
--- a/gas/testsuite/gas/aarch64/b_1.d
+++ b/gas/testsuite/gas/aarch64/b_1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/beq_1.d b/gas/testsuite/gas/aarch64/beq_1.d
index 525a17e75e5..4571e39e608 100644
--- a/gas/testsuite/gas/aarch64/beq_1.d
+++ b/gas/testsuite/gas/aarch64/beq_1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/bfloat16-directive-be.d b/gas/testsuite/gas/aarch64/bfloat16-directive-be.d
index 132d04e44fa..fad1c832f4d 100644
--- a/gas/testsuite/gas/aarch64/bfloat16-directive-be.d
+++ b/gas/testsuite/gas/aarch64/bfloat16-directive-be.d
@@ -2,6 +2,7 @@
# source: bfloat16-directive.s
# as: -mbig-endian
# objdump: -s --section=.data
+#notarget: *-*-pe* *-*-mingw*
.*: +file format .*
diff --git a/gas/testsuite/gas/aarch64/bfloat16-directive-le.d b/gas/testsuite/gas/aarch64/bfloat16-directive-le.d
index f22d610d84b..af96f4ad7b5 100644
--- a/gas/testsuite/gas/aarch64/bfloat16-directive-le.d
+++ b/gas/testsuite/gas/aarch64/bfloat16-directive-le.d
@@ -2,6 +2,7 @@
# source: bfloat16-directive.s
# as: -mlittle-endian
# objdump: -s --section=.data
+#notarget: *-*-pe* *-*-mingw*
.*: +file format .*
diff --git a/gas/testsuite/gas/aarch64/codealign.d b/gas/testsuite/gas/aarch64/codealign.d
index a44c1073e09..a3db195fc0e 100644
--- a/gas/testsuite/gas/aarch64/codealign.d
+++ b/gas/testsuite/gas/aarch64/codealign.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
# Minimum code alignment should be set.
# This test is only valid on ELF based ports.
-#notarget: *-*-pe *-*-wince
+#notarget: *-*-pe* *-*-wince *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/codealign_1.d b/gas/testsuite/gas/aarch64/codealign_1.d
index c4dc5270195..2b9819f174c 100644
--- a/gas/testsuite/gas/aarch64/codealign_1.d
+++ b/gas/testsuite/gas/aarch64/codealign_1.d
@@ -1,6 +1,7 @@
#objdump: --section-headers
#as: --generate-missing-build-notes=no
# Minimum code alignment should be set.
+#notarget: *-*-pe* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/dwarf.d b/gas/testsuite/gas/aarch64/dwarf.d
index 9e4184ab6e8..98c202e3613 100644
--- a/gas/testsuite/gas/aarch64/dwarf.d
+++ b/gas/testsuite/gas/aarch64/dwarf.d
@@ -1,5 +1,6 @@
#readelf: -s --debug-dump=aranges
#as: -g --generate-missing-build-notes=no
+#notarget: *-*-pe* *-*-mingw*
Symbol table '.symtab' contains 11 entries:
Num:[ ]+Value[ ]+Size[ ]+Type[ ]+Bind[ ]+Vis[ ]+Ndx[ ]+Name
diff --git a/gas/testsuite/gas/aarch64/ilp32-basic.d b/gas/testsuite/gas/aarch64/ilp32-basic.d
index 876f28cba28..9adb6876ac0 100644
--- a/gas/testsuite/gas/aarch64/ilp32-basic.d
+++ b/gas/testsuite/gas/aarch64/ilp32-basic.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format elf32-.*aarch64
diff --git a/gas/testsuite/gas/aarch64/int-insns.d b/gas/testsuite/gas/aarch64/int-insns.d
index 76f937c4fbf..9fe31551bde 100644
--- a/gas/testsuite/gas/aarch64/int-insns.d
+++ b/gas/testsuite/gas/aarch64/int-insns.d
@@ -1,5 +1,6 @@
#objdump: -dr
#as: -march=armv8-a -mabi=lp64
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/ldr_1.d b/gas/testsuite/gas/aarch64/ldr_1.d
index f68b01d6838..399edd63672 100644
--- a/gas/testsuite/gas/aarch64/ldr_1.d
+++ b/gas/testsuite/gas/aarch64/ldr_1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/litpool.d b/gas/testsuite/gas/aarch64/litpool.d
index 56044248b2e..5cd302ad9f3 100644
--- a/gas/testsuite/gas/aarch64/litpool.d
+++ b/gas/testsuite/gas/aarch64/litpool.d
@@ -1,7 +1,7 @@
#objdump: -d
#name: AArch64 Bignums in Literal Pool (PR 16688)
# This test is only valid on ELF based ports.
-#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe* *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapmisc.d b/gas/testsuite/gas/aarch64/mapmisc.d
index 1f2df6ea0d7..1a2ea4456f7 100644
--- a/gas/testsuite/gas/aarch64/mapmisc.d
+++ b/gas/testsuite/gas/aarch64/mapmisc.d
@@ -3,7 +3,7 @@
#name: AArch64 Mapping Symbols for miscellaneous directives
#source: mapmisc.s
# This test is only valid on ELF based ports.
-#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe* *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-mingw*
.*: +file format .*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping.d b/gas/testsuite/gas/aarch64/mapping.d
index d23c0fdbd54..c0255bf7d15 100644
--- a/gas/testsuite/gas/aarch64/mapping.d
+++ b/gas/testsuite/gas/aarch64/mapping.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols
# This test is only valid on ELF based ports.
-#notarget: *-*-pe *-*-wince
+#notarget: *-*-pe* *-*-wince *-*-mingw*
# Test the generation of AArch64 ELF Mapping Symbols
diff --git a/gas/testsuite/gas/aarch64/mapping2.d b/gas/testsuite/gas/aarch64/mapping2.d
index 4ad1a079aa5..927a5cc80a2 100644
--- a/gas/testsuite/gas/aarch64/mapping2.d
+++ b/gas/testsuite/gas/aarch64/mapping2.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 2
# This test is only valid on ELF based ports.
-#notarget: *-*-pe *-*-wince
+#notarget: *-*-pe* *-*-wince *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping3.d b/gas/testsuite/gas/aarch64/mapping3.d
index ece7de1cb7b..7805cadebd5 100644
--- a/gas/testsuite/gas/aarch64/mapping3.d
+++ b/gas/testsuite/gas/aarch64/mapping3.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 3
# This test is only valid on ELF based ports.
-#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe* *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping4.d b/gas/testsuite/gas/aarch64/mapping4.d
index d0495dafed4..324eea04b41 100644
--- a/gas/testsuite/gas/aarch64/mapping4.d
+++ b/gas/testsuite/gas/aarch64/mapping4.d
@@ -2,7 +2,7 @@
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 4
# This test is only valid on ELF based ports.
-#notarget: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#notarget: *-*-*coff *-*-pe* *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping_5.d b/gas/testsuite/gas/aarch64/mapping_5.d
index 04263484ae6..1c2ae76aef3 100644
--- a/gas/testsuite/gas/aarch64/mapping_5.d
+++ b/gas/testsuite/gas/aarch64/mapping_5.d
@@ -1,6 +1,7 @@
#objdump: --syms --special-syms
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 5
+#notarget: *-*-pe* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mapping_6.d b/gas/testsuite/gas/aarch64/mapping_6.d
index 96d0ed663c9..9da44901a65 100644
--- a/gas/testsuite/gas/aarch64/mapping_6.d
+++ b/gas/testsuite/gas/aarch64/mapping_6.d
@@ -1,6 +1,7 @@
#objdump: --syms --special-syms
#as: --generate-missing-build-notes=no
#name: AArch64 Mapping Symbols Test 6
+#notarget: *-*-pe* *-*-mingw*
.*: +file format.*aarch64.*
diff --git a/gas/testsuite/gas/aarch64/mops_invalid_2.d b/gas/testsuite/gas/aarch64/mops_invalid_2.d
index f5e7228f6e7..8acdc8edfb4 100644
--- a/gas/testsuite/gas/aarch64/mops_invalid_2.d
+++ b/gas/testsuite/gas/aarch64/mops_invalid_2.d
@@ -1,5 +1,6 @@
# warning_output: mops_invalid_2.l
# objdump: -dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.*
diff --git a/gas/testsuite/gas/aarch64/movw_label.d b/gas/testsuite/gas/aarch64/movw_label.d
index 8466570b33c..cff34433756 100644
--- a/gas/testsuite/gas/aarch64/movw_label.d
+++ b/gas/testsuite/gas/aarch64/movw_label.d
@@ -1,5 +1,6 @@
#objdump: -dr
#name: movw relocation symbol name
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/optional.d b/gas/testsuite/gas/aarch64/optional.d
index b2a123d55a2..c9971bbaf97 100644
--- a/gas/testsuite/gas/aarch64/optional.d
+++ b/gas/testsuite/gas/aarch64/optional.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/pac_ab_key.d b/gas/testsuite/gas/aarch64/pac_ab_key.d
index 5e7496a86bd..4a31fbfe631 100644
--- a/gas/testsuite/gas/aarch64/pac_ab_key.d
+++ b/gas/testsuite/gas/aarch64/pac_ab_key.d
@@ -2,6 +2,7 @@
# Test assembling a file with functions signed by two different pointer
# authentication keys. It must interpret .cfi_b_key_frame properly and emit a
# 'B' character into the correct CIE's augmentation string.
+#notarget: *-*-pe* *-*-mingw*
.+: file .+
diff --git a/gas/testsuite/gas/aarch64/pac_negate_ra_state.d b/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
index 62717767608..3ca21522734 100644
--- a/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
+++ b/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
@@ -1,4 +1,5 @@
#objdump: --dwarf=frames
+#notarget: *-*-pe* *-*-mingw*
.+: file .+
diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d
index babcff10304..1b77a9d4ceb 100644
--- a/gas/testsuite/gas/aarch64/pr20364.d
+++ b/gas/testsuite/gas/aarch64/pr20364.d
@@ -1,6 +1,7 @@
# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
#name: PR20364
#objdump: -d
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/pr27217.d b/gas/testsuite/gas/aarch64/pr27217.d
index 3397dfa2481..24434824323 100644
--- a/gas/testsuite/gas/aarch64/pr27217.d
+++ b/gas/testsuite/gas/aarch64/pr27217.d
@@ -1,6 +1,7 @@
# Check that expressions that generate relocations work when the symbol is a constant.
#name: PR27217
#objdump: -rd
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/pr29519.d b/gas/testsuite/gas/aarch64/pr29519.d
index 4bfea09bee0..c70e05f95ae 100644
--- a/gas/testsuite/gas/aarch64/pr29519.d
+++ b/gas/testsuite/gas/aarch64/pr29519.d
@@ -1,6 +1,7 @@
# Check that AArch64 specific pseudo-ops can be separated by the ; line separator character.
#name: PR29519 (Separating AArch64 pseudo-ops with ;)
#objdump: -rd
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/programmer-friendly.d b/gas/testsuite/gas/aarch64/programmer-friendly.d
index 8fa6aa70dbf..20ace20f707 100644
--- a/gas/testsuite/gas/aarch64/programmer-friendly.d
+++ b/gas/testsuite/gas/aarch64/programmer-friendly.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-data.d b/gas/testsuite/gas/aarch64/reloc-data.d
index 7bcf300f78c..9976585e40e 100644
--- a/gas/testsuite/gas/aarch64/reloc-data.d
+++ b/gas/testsuite/gas/aarch64/reloc-data.d
@@ -1,6 +1,7 @@
#as: -mabi=lp64
#objdump: -dr
#skip: aarch64_be-*-*
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
index 44b66762673..7a4e5c45c0e 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
index 6a6ec00a56d..fc25265732e 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
index c319e3d8dc8..7a944be92df 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
index 5d7f6cf3d5d..4da4da340fb 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
index 6a918065dfd..0b87c2f691c 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
index c5995f5541a..abee16b1d21 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
index 739eaa313d6..0782c758f70 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
index 00d278b53d1..6a9d4e6de6b 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
index 0235aeb9729..76479531db2 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
index f904850a9ed..f29c94c0863 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d
index ee1f504baf5..61465b4087c 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d
index a44f9d23066..403bdbad126 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
index cd793bb8b12..b4bcdb3691d 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst16.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
index ab5d869baaa..1db57093e42 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst32.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
index fa46d7b1f56..14032a05570 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst64.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
index f754449701e..f397cbc9b62 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ldst8.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
index b232b2f51fb..30501411c71 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
index 62ff7ab420e..5c457849bae 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
index 78074f5edb2..a2600f5e7f4 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
index 8eac3bd99d5..dcdca5e3fba 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
index 02695047fc9..4609ce91836 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
index 0a231f9f062..7f04bb82059 100644
--- a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d
index 858898a0748..4ceb95986ba 100644
--- a/gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-gotoff_g0_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-gotoff_g1.d b/gas/testsuite/gas/aarch64/reloc-gotoff_g1.d
index e6a68f06e47..2599b85a84c 100644
--- a/gas/testsuite/gas/aarch64/reloc-gotoff_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-gotoff_g1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d
index bae4e37b27d..46005c976db 100644
--- a/gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-gottprel_g0_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-gottprel_g1.d b/gas/testsuite/gas/aarch64/reloc-gottprel_g1.d
index 3061c2f5007..770c4e0a932 100644
--- a/gas/testsuite/gas/aarch64/reloc-gottprel_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-gottprel_g1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-insn.d b/gas/testsuite/gas/aarch64/reloc-insn.d
index 0f3b4143d96..4626b6f57a3 100644
--- a/gas/testsuite/gas/aarch64/reloc-insn.d
+++ b/gas/testsuite/gas/aarch64/reloc-insn.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g0.d b/gas/testsuite/gas/aarch64/reloc-prel_g0.d
index c5a7685b381..79667fed4c7 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g0.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g0.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
index f7a29194be2..7fd954cb0ac 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g0_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g1.d b/gas/testsuite/gas/aarch64/reloc-prel_g1.d
index 63c91e0d7e8..4295fcab0fe 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d b/gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d
index 4c0a1d943cc..438d9b3b7d2 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g1_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g2.d b/gas/testsuite/gas/aarch64/reloc-prel_g2.d
index 80d18704a57..e4c6cd21cc2 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g2.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g2.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d b/gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d
index dc3c58e44fd..8aeab101059 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g2_nc.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-prel_g3.d b/gas/testsuite/gas/aarch64/reloc-prel_g3.d
index 4a476ab954f..2b540f154a3 100644
--- a/gas/testsuite/gas/aarch64/reloc-prel_g3.d
+++ b/gas/testsuite/gas/aarch64/reloc-prel_g3.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d
index 606c801d053..35a061489ca 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d
index a046e787306..abe6811e1d4 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
Disassembly of section \.text:
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d
index f25913f4170..9749716983f 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsgd_g0_nc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d b/gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d
index 52a37aed62b..13864591246 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsgd_g1.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d
index 6b7132fb07e..7034e299a4b 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d
index 28686cd04ef..a7417eca554 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-ilp32-1.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d
index f4faa4bddeb..472f8c33efd 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-page-1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d
index e2c81efdfd5..b3f47b180cc 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm-page-ilp32-1.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d
index c7d1f6b0448..24ea06cb479 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d
index f068cfb85bb..c7a96501804 100644
--- a/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d
+++ b/gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d
@@ -1,5 +1,6 @@
#as: -mabi=ilp32
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
index 11ff08f8b17..1f537fb3bc8 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12-ldst16.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
index 66c17a444d6..06774a3b573 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst16.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
index 79cffb51bbd..b1d45bf2c26 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12-ldst32.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
index 17b2de3ee48..c2caaca6f34 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst32.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
index 25c6f2353e3..1969595c7ea 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12-ldst64.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
index 73277b38c56..30eb3fa2138 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst64.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
index 5b6f2330e6a..6a428c49f0b 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12-ldst8.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
index 781997473ce..3e5cb6796ef 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12-ldst8.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
index 896c6ca8447..28757a8a3c9 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12_nc-ldst16.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
index 06aa052b949..3ccc1b432a5 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst16.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
index 7b8f6bf495f..98ac7660969 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12_nc-ldst32.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
index c83044b3ac0..ae9432ee952 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst32.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
index f8827505a63..34d6832583a 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12_nc-ldst64.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
index 8e16b09d97c..6b176f9e287 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst64.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
index 14e3345b7d3..8464db797ca 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8-ilp32.d
@@ -1,6 +1,7 @@
#as: -mabi=ilp32
#source: reloc-tprel_lo12_nc-ldst8.s
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
index a87429f85d5..76a1e76ccd4 100644
--- a/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
+++ b/gas/testsuite/gas/aarch64/reloc-tprel_lo12_nc-ldst8.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_1.d b/gas/testsuite/gas/aarch64/sve-movprfx_1.d
index 13035db1d82..5ead32cfe4e 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_1.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_1.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_1.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_10.d b/gas/testsuite/gas/aarch64/sve-movprfx_10.d
index 575632f9a40..1dcbbacbaf3 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_10.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_10.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_10.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_11.d b/gas/testsuite/gas/aarch64/sve-movprfx_11.d
index 71bab8abd55..90ba848b615 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_11.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_11.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_11.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_12.d b/gas/testsuite/gas/aarch64/sve-movprfx_12.d
index dde3a926965..4698567b6d3 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_12.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_12.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_12.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_13.d b/gas/testsuite/gas/aarch64/sve-movprfx_13.d
index 46b0bb0a18f..4a12efe5008 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_13.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_13.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_13.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_14.d b/gas/testsuite/gas/aarch64/sve-movprfx_14.d
index 1024339a7c2..9d2a8f0c29c 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_14.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_14.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_14.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_15.d b/gas/testsuite/gas/aarch64/sve-movprfx_15.d
index 436e59f8269..9e77f04fed7 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_15.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_15.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_15.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_16.d b/gas/testsuite/gas/aarch64/sve-movprfx_16.d
index a6550b78990..e998e62afe5 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_16.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_16.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_16.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_17.d b/gas/testsuite/gas/aarch64/sve-movprfx_17.d
index ce96138339d..a873bfdfaa2 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_17.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_17.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_17.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_18.d b/gas/testsuite/gas/aarch64/sve-movprfx_18.d
index e158131331b..2868d8ed8ef 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_18.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_18.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_18.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_19.d b/gas/testsuite/gas/aarch64/sve-movprfx_19.d
index bf3b0631ef0..996316ad599 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_19.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_19.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_19.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_2.d b/gas/testsuite/gas/aarch64/sve-movprfx_2.d
index 905c1f4c120..81965828201 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_2.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_2.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_2.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_20.d b/gas/testsuite/gas/aarch64/sve-movprfx_20.d
index 80621d64adb..002879d6f33 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_20.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_20.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_20.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_21.d b/gas/testsuite/gas/aarch64/sve-movprfx_21.d
index 20eb85b3377..2c1eeb998dd 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_21.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_21.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_21.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_22.d b/gas/testsuite/gas/aarch64/sve-movprfx_22.d
index de4d1a3693b..32c1f79a101 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_22.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_22.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_22.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_23.d b/gas/testsuite/gas/aarch64/sve-movprfx_23.d
index e1c6c2c2cce..dac3a818408 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_23.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_23.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_23.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_24.d b/gas/testsuite/gas/aarch64/sve-movprfx_24.d
index ff1bdbe7109..8459324a354 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_24.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_24.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_24.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_25.d b/gas/testsuite/gas/aarch64/sve-movprfx_25.d
index 83a6500710c..02bcfd561a5 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_25.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_25.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_25.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_26.d b/gas/testsuite/gas/aarch64/sve-movprfx_26.d
index f0830cc718b..9a5827759c5 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_26.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_26.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_26.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_27.d b/gas/testsuite/gas/aarch64/sve-movprfx_27.d
index e71d1715b61..5e96bd328db 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_27.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_27.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_27.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_28.d b/gas/testsuite/gas/aarch64/sve-movprfx_28.d
index 808d07da892..3121b71ebec 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_28.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_28.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_28.l
#as: -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_3.d b/gas/testsuite/gas/aarch64/sve-movprfx_3.d
index 03909dbc62c..1aec576d130 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_3.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_3.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_3.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_4.d b/gas/testsuite/gas/aarch64/sve-movprfx_4.d
index fd71a4bac28..a3dedae230d 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_4.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_4.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_4.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_5.d b/gas/testsuite/gas/aarch64/sve-movprfx_5.d
index 511cf66c665..74a43dfd3e4 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_5.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_5.d
@@ -1,6 +1,7 @@
#source: sve-movprfx_5.s
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_6.d b/gas/testsuite/gas/aarch64/sve-movprfx_6.d
index 4af626993aa..1ae23ed68b3 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_6.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_6.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_6.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_7.d b/gas/testsuite/gas/aarch64/sve-movprfx_7.d
index 725a8a8604b..9be980436a4 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_7.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_7.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_7.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_8.d b/gas/testsuite/gas/aarch64/sve-movprfx_8.d
index f853e218b93..33be771eddd 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_8.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_8.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_8.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/sve-movprfx_9.d b/gas/testsuite/gas/aarch64/sve-movprfx_9.d
index 54a1733937b..34d85ba6d33 100644
--- a/gas/testsuite/gas/aarch64/sve-movprfx_9.d
+++ b/gas/testsuite/gas/aarch64/sve-movprfx_9.d
@@ -2,6 +2,7 @@
#warning_output: sve-movprfx_9.l
#as: -march=armv8-a+sve -I$srcdir/$subdir --generate-missing-build-notes=no
#objdump: -Dr -M notes
+#notarget: *-*-pe* *-*-mingw*
.* file format .*
diff --git a/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d b/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d
index ce99514b3da..85468aa0b0e 100644
--- a/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d
+++ b/gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d
@@ -1,5 +1,6 @@
#objdump: -t
#as: --generate-missing-build-notes=no
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d b/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d
index 5f46f27236d..001cf0da1e3 100644
--- a/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d
+++ b/gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d
@@ -1,5 +1,6 @@
#objdump: -t
#as: --generate-missing-build-notes=no
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d b/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d
index 8d05c1a6361..486a6c083b1 100644
--- a/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d
+++ b/gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d
@@ -1,5 +1,6 @@
#objdump: -t
#as: --generate-missing-build-notes=no
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
index 93c84a72982..4c1d9ff16a9 100644
--- a/gas/testsuite/gas/aarch64/system.d
+++ b/gas/testsuite/gas/aarch64/system.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/tail_padding.d b/gas/testsuite/gas/aarch64/tail_padding.d
index a816ac4a2de..5ef1e3a1c5e 100644
--- a/gas/testsuite/gas/aarch64/tail_padding.d
+++ b/gas/testsuite/gas/aarch64/tail_padding.d
@@ -1,6 +1,7 @@
#as: -mabi=lp64
#readelf: -S
#name: AArch64 section tail padding
+#notarget: *-*-pe* *-*-mingw*
There are .* section headers, starting at offset .*:
diff --git a/gas/testsuite/gas/aarch64/tbz_1.d b/gas/testsuite/gas/aarch64/tbz_1.d
index 54b7dbab079..e7ca8db5466 100644
--- a/gas/testsuite/gas/aarch64/tbz_1.d
+++ b/gas/testsuite/gas/aarch64/tbz_1.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/tls-desc.d b/gas/testsuite/gas/aarch64/tls-desc.d
index e393d455461..85d1f4b6a64 100644
--- a/gas/testsuite/gas/aarch64/tls-desc.d
+++ b/gas/testsuite/gas/aarch64/tls-desc.d
@@ -1,5 +1,6 @@
#as: -mabi=lp64
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
diff --git a/gas/testsuite/gas/aarch64/tls.d b/gas/testsuite/gas/aarch64/tls.d
index dc18949bd0c..f8ed49725e5 100644
--- a/gas/testsuite/gas/aarch64/tls.d
+++ b/gas/testsuite/gas/aarch64/tls.d
@@ -1,4 +1,5 @@
#objdump: -dr
+#notarget: *-*-pe* *-*-mingw*
.*: file format .*
--
2.37.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH 4/8] Skip big-obj test for pe-aarch64
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
2022-12-30 2:40 ` [PATCH 2/8] Fix size of external_reloc for pe-aarch64 Mark Harmstone
2022-12-30 2:40 ` [PATCH 3/8] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
@ 2022-12-30 2:40 ` Mark Harmstone
2022-12-30 2:40 ` [PATCH 5/8] Add pe-aarch64 relocations Mark Harmstone
` (5 subsequent siblings)
8 siblings, 0 replies; 34+ messages in thread
From: Mark Harmstone @ 2022-12-30 2:40 UTC (permalink / raw)
To: wej22007, zac.walker, tamar.christina, binutils; +Cc: Mark Harmstone
---
gas/testsuite/gas/pe/big-obj.d | 1 +
1 file changed, 1 insertion(+)
diff --git a/gas/testsuite/gas/pe/big-obj.d b/gas/testsuite/gas/pe/big-obj.d
index 27b351a7d60..ad44cd51310 100644
--- a/gas/testsuite/gas/pe/big-obj.d
+++ b/gas/testsuite/gas/pe/big-obj.d
@@ -1,6 +1,7 @@
#as: -mbig-obj
#objdump: -h
#name: PE big obj
+#notarget: aarch64-*
.*: *file format pe-bigobj-.*
--
2.37.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH 5/8] Add pe-aarch64 relocations
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
` (2 preceding siblings ...)
2022-12-30 2:40 ` [PATCH 4/8] Skip big-obj test for pe-aarch64 Mark Harmstone
@ 2022-12-30 2:40 ` Mark Harmstone
2022-12-30 2:40 ` [PATCH 6/8] Add .secrel32 for pe-aarch64 Mark Harmstone
` (4 subsequent siblings)
8 siblings, 0 replies; 34+ messages in thread
From: Mark Harmstone @ 2022-12-30 2:40 UTC (permalink / raw)
To: wej22007, zac.walker, tamar.christina, binutils; +Cc: Mark Harmstone
---
bfd/coff-aarch64.c | 674 +++++++++++++++++++++++++++++-
bfd/config.bfd | 6 -
gas/config/tc-aarch64.c | 24 +-
gas/testsuite/gas/pe/pe-aarch64.d | 230 +++++++++-
gas/testsuite/gas/pe/pe-aarch64.s | 162 ++++++-
ld/testsuite/ld-pe/aarch64.d | 158 +++++++
ld/testsuite/ld-pe/aarch64a.s | 159 +++++++
ld/testsuite/ld-pe/aarch64b.s | 8 +
ld/testsuite/ld-pe/pe.exp | 10 +-
9 files changed, 1388 insertions(+), 43 deletions(-)
create mode 100644 ld/testsuite/ld-pe/aarch64.d
create mode 100644 ld/testsuite/ld-pe/aarch64a.s
create mode 100644 ld/testsuite/ld-pe/aarch64b.s
diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index 0faa75c63d2..b63e21514b2 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -39,59 +39,310 @@
#include "libcoff.h"
+static bfd_reloc_status_type
+coff_aarch64_addr64_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint64_t val = reloc_entry->addend;
+
+ bfd_putl64 (val, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_addr32_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint64_t val;
+
+ if ((int64_t) reloc_entry->addend > 0x7fffffff
+ || (int64_t) reloc_entry->addend < -0x7fffffff)
+ return bfd_reloc_overflow;
+
+ val = reloc_entry->addend;
+
+ bfd_putl32 ((uint32_t) val, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_branch26_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ if (param > 0x7ffffff || param < -0x8000000)
+ return bfd_reloc_overflow;
+
+ op &= 0xfc000000;
+ op |= (param >> 2) & 0x3ffffff;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_rel21_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ if (param > 0xfffff || param < -0x100000)
+ return bfd_reloc_overflow;
+
+ op &= 0x9f00001f;
+ op |= (param & 0x1ffffc) << 3;
+ op |= (param & 0x3) << 29;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_po12l_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+ uint8_t shift;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend & 0xfff;
+
+ if ((op & 0xff800000) == 0x3d800000)
+ {
+ /* LDR / STR with q register */
+ shift = 4;
+ }
+ else
+ {
+ /* top two bits represent how much addend should be shifted */
+ shift = op >> 30;
+ }
+
+ if (param & ((1 << shift) - 1))
+ return bfd_reloc_overflow;
+
+ param >>= shift;
+
+ op &= 0xffc003ff;
+ op |= param << 10;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_branch19_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ if (param > 0xfffff || param < -0x100000)
+ return bfd_reloc_overflow;
+
+ op &= 0xff00001f;
+ op |= ((param >> 2) & 0x7ffff) << 5;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_branch14_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ if (param > 0x7fff || param < -0x8000)
+ return bfd_reloc_overflow;
+
+ op &= 0xfff8001f;
+ op |= ((param >> 2) & 0x3fff) << 5;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_po12a_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint32_t op;
+ int32_t param;
+
+ op = bfd_getl32 (data + reloc_entry->address);
+ param = reloc_entry->addend;
+
+ op &= 0xffc003ff;
+ op |= (param & 0xfff) << 10;
+
+ bfd_putl32 (op, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
+static bfd_reloc_status_type
+coff_aarch64_addr32nb_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ uint64_t val;
+
+ if ((int64_t) reloc_entry->addend > 0x7fffffff
+ || (int64_t) reloc_entry->addend < -0x7fffffff)
+ return bfd_reloc_overflow;
+
+ val = reloc_entry->addend;
+
+ bfd_putl32 ((uint32_t) val, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
#define MINUS_ONE (~ (bfd_vma) 0)
+static const reloc_howto_type arm64_reloc_howto_abs = HOWTO(IMAGE_REL_ARM64_ABSOLUTE, 0, 1, 0, false, 0,
+ complain_overflow_dont,
+ NULL, "IMAGE_REL_ARM64_ABSOLUTE",
+ false, 0, 0, false);
+
static const reloc_howto_type arm64_reloc_howto_64 = HOWTO(IMAGE_REL_ARM64_ADDR64, 0, 8, 64, false, 0,
complain_overflow_bitfield,
- NULL, "64",
+ coff_aarch64_addr64_reloc, "IMAGE_REL_ARM64_ADDR64",
false, MINUS_ONE, MINUS_ONE, false);
static const reloc_howto_type arm64_reloc_howto_32 = HOWTO (IMAGE_REL_ARM64_ADDR32, 0, 4, 32, false, 0,
complain_overflow_bitfield,
- NULL, "32",
+ coff_aarch64_addr32_reloc, "IMAGE_REL_ARM64_ADDR32",
false, 0xffffffff, 0xffffffff, false);
static const reloc_howto_type arm64_reloc_howto_32_pcrel = HOWTO (IMAGE_REL_ARM64_REL32, 0, 4, 32, true, 0,
complain_overflow_bitfield,
- NULL, "DISP32",
+ NULL, "IMAGE_REL_ARM64_REL32",
false, 0xffffffff, 0xffffffff, true);
static const reloc_howto_type arm64_reloc_howto_branch26 = HOWTO (IMAGE_REL_ARM64_BRANCH26, 0, 4, 26, true, 0,
complain_overflow_bitfield,
- NULL, "BRANCH26",
+ coff_aarch64_branch26_reloc, "IMAGE_REL_ARM64_BRANCH26",
false, 0x03ffffff, 0x03ffffff, true);
static const reloc_howto_type arm64_reloc_howto_page21 = HOWTO (IMAGE_REL_ARM64_PAGEBASE_REL21, 12, 4, 21, true, 0,
complain_overflow_signed,
- NULL, "PAGE21",
+ coff_aarch64_rel21_reloc, "IMAGE_REL_ARM64_PAGEBASE_REL21",
false, 0x1fffff, 0x1fffff, false);
static const reloc_howto_type arm64_reloc_howto_lo21 = HOWTO (IMAGE_REL_ARM64_REL21, 0, 4, 21, true, 0,
complain_overflow_signed,
- NULL, "LO21",
+ coff_aarch64_rel21_reloc, "IMAGE_REL_ARM64_REL21",
false, 0x1fffff, 0x1fffff, true);
-static const reloc_howto_type arm64_reloc_howto_pgoff12 = HOWTO (IMAGE_REL_ARM64_PAGEOFFSET_12L, 1, 4, 12, true, 0,
+static const reloc_howto_type arm64_reloc_howto_pgoff12l = HOWTO (IMAGE_REL_ARM64_PAGEOFFSET_12L, 1, 4, 12, true, 0,
complain_overflow_signed,
- NULL, "PGOFF12",
+ coff_aarch64_po12l_reloc, "IMAGE_REL_ARM64_PAGEOFFSET_12L",
false, 0xffe, 0xffe, true);
static const reloc_howto_type arm64_reloc_howto_branch19 = HOWTO (IMAGE_REL_ARM64_BRANCH19, 2, 4, 19, true, 0,
complain_overflow_signed,
- NULL, "BRANCH19",
+ coff_aarch64_branch19_reloc, "IMAGE_REL_ARM64_BRANCH19",
false, 0x7ffff, 0x7ffff, true);
+static const reloc_howto_type arm64_reloc_howto_branch14 = HOWTO (IMAGE_REL_ARM64_BRANCH14, 2, 4, 14, true, 0,
+ complain_overflow_signed,
+ coff_aarch64_branch14_reloc, "IMAGE_REL_ARM64_BRANCH14",
+ false, 0x3fff, 0x3fff, true);
+
+static const reloc_howto_type arm64_reloc_howto_pgoff12a = HOWTO (IMAGE_REL_ARM64_PAGEOFFSET_12A, 2, 4, 12, true, 10,
+ complain_overflow_dont,
+ coff_aarch64_po12a_reloc, "IMAGE_REL_ARM64_PAGEOFFSET_12A",
+ false, 0x3ffc00, 0x3ffc00, false);
+
+static const reloc_howto_type arm64_reloc_howto_32nb = HOWTO (IMAGE_REL_ARM64_ADDR32NB, 0, 4, 32, false, 0,
+ complain_overflow_bitfield,
+ coff_aarch64_addr32nb_reloc, "IMAGE_REL_ARM64_ADDR32NB",
+ false, 0xffffffff, 0xffffffff, false);
static const reloc_howto_type* const arm64_howto_table[] = {
+ &arm64_reloc_howto_abs,
&arm64_reloc_howto_64,
&arm64_reloc_howto_32,
&arm64_reloc_howto_32_pcrel,
&arm64_reloc_howto_branch26,
&arm64_reloc_howto_page21,
&arm64_reloc_howto_lo21,
- &arm64_reloc_howto_pgoff12,
- &arm64_reloc_howto_branch19
+ &arm64_reloc_howto_pgoff12l,
+ &arm64_reloc_howto_branch19,
+ &arm64_reloc_howto_branch14,
+ &arm64_reloc_howto_pgoff12a,
+ &arm64_reloc_howto_32nb
};
#ifndef NUM_ELEM
@@ -118,13 +369,24 @@ coff_aarch64_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, bfd_reloc_code_real
case BFD_RELOC_AARCH64_JUMP26:
return &arm64_reloc_howto_branch26;
case BFD_RELOC_AARCH64_ADR_HI21_PCREL:
+ case BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL:
return &arm64_reloc_howto_page21;
+ case BFD_RELOC_AARCH64_TSTBR14:
+ return &arm64_reloc_howto_branch14;
case BFD_RELOC_AARCH64_ADR_LO21_PCREL:
return &arm64_reloc_howto_lo21;
+ case BFD_RELOC_AARCH64_ADD_LO12:
+ return &arm64_reloc_howto_pgoff12a;
+ case BFD_RELOC_AARCH64_LDST8_LO12:
case BFD_RELOC_AARCH64_LDST16_LO12:
- return &arm64_reloc_howto_pgoff12;
+ case BFD_RELOC_AARCH64_LDST32_LO12:
+ case BFD_RELOC_AARCH64_LDST64_LO12:
+ case BFD_RELOC_AARCH64_LDST128_LO12:
+ return &arm64_reloc_howto_pgoff12l;
case BFD_RELOC_AARCH64_BRANCH19:
return &arm64_reloc_howto_branch19;
+ case BFD_RELOC_RVA:
+ return &arm64_reloc_howto_32nb;
default:
BFD_FAIL ();
return NULL;
@@ -155,6 +417,8 @@ coff_aarch64_rtype_lookup (unsigned int code)
{
switch (code)
{
+ case IMAGE_REL_ARM64_ABSOLUTE:
+ return &arm64_reloc_howto_abs;
case IMAGE_REL_ARM64_ADDR64:
return &arm64_reloc_howto_64;
case IMAGE_REL_ARM64_ADDR32:
@@ -168,9 +432,15 @@ coff_aarch64_rtype_lookup (unsigned int code)
case IMAGE_REL_ARM64_REL21:
return &arm64_reloc_howto_lo21;
case IMAGE_REL_ARM64_PAGEOFFSET_12L:
- return &arm64_reloc_howto_pgoff12;
+ return &arm64_reloc_howto_pgoff12l;
case IMAGE_REL_ARM64_BRANCH19:
return &arm64_reloc_howto_branch19;
+ case IMAGE_REL_ARM64_BRANCH14:
+ return &arm64_reloc_howto_branch14;
+ case IMAGE_REL_ARM64_PAGEOFFSET_12A:
+ return &arm64_reloc_howto_pgoff12a;
+ case IMAGE_REL_ARM64_ADDR32NB:
+ return &arm64_reloc_howto_32nb;
default:
BFD_FAIL ();
return NULL;
@@ -188,6 +458,7 @@ coff_aarch64_rtype_lookup (unsigned int code)
#define bfd_pe_print_pdata NULL
#endif
+#ifdef COFF_WITH_PE
/* Return TRUE if this relocation should
appear in the output .reloc section. */
@@ -197,9 +468,384 @@ in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
{
return !howto->pc_relative;
}
+#endif
+
+static bool
+coff_pe_aarch64_relocate_section (bfd *output_bfd,
+ struct bfd_link_info *info,
+ bfd *input_bfd,
+ asection *input_section,
+ bfd_byte *contents,
+ struct internal_reloc *relocs,
+ struct internal_syment *syms,
+ asection **sections)
+{
+ struct internal_reloc *rel;
+ struct internal_reloc *relend;
+
+ if (bfd_link_relocatable (info))
+ return true;
+
+ rel = relocs;
+ relend = rel + input_section->reloc_count;
+
+ /* The addend for a relocation is stored in the immediate bits of each
+ opcode. So for each relocation, we need to extract the immediate value,
+ use this to calculate what it should be for the symbol, and rewrite the
+ opcode into the section stream. */
+
+ for (; rel < relend; rel++)
+ {
+ long symndx;
+ struct coff_link_hash_entry *h;
+ bfd_vma sym_value;
+ asection *sec = NULL;
+ uint64_t dest_vma;
+
+ /* skip trivial relocations */
+ if (rel->r_type == IMAGE_REL_ARM64_ADDR32
+ || rel->r_type == IMAGE_REL_ARM64_ADDR64
+ || rel->r_type == IMAGE_REL_ARM64_ABSOLUTE)
+ continue;
+
+ symndx = rel->r_symndx;
+ sym_value = syms[symndx].n_value;
+
+ h = obj_coff_sym_hashes (input_bfd)[symndx];
+
+ if (h && h->root.type == bfd_link_hash_defined)
+ {
+ sec = h->root.u.def.section;
+ sym_value = h->root.u.def.value;
+ }
+ else
+ {
+ sec = sections[symndx];
+ }
+
+ if (!sec)
+ continue;
+
+ if (bfd_is_und_section (sec))
+ continue;
+
+ if (discarded_section (sec))
+ continue;
+
+ dest_vma = sec->output_section->vma + sec->output_offset + sym_value;
+
+ if (symndx < 0
+ || (unsigned long) symndx >= obj_raw_syment_count (input_bfd))
+ continue;
+
+ switch (rel->r_type)
+ {
+ case IMAGE_REL_ARM64_ADDR32NB:
+ {
+ uint64_t val;
+ int32_t addend;
+
+ addend = bfd_getl32 (contents + rel->r_vaddr);
+
+ dest_vma += addend;
+
+ val = dest_vma;
+ val -= pe_data (output_bfd)->pe_opthdr.ImageBase;
+
+ if (val > 0xffffffff)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_ADDR32NB", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ bfd_putl32 (val, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_BRANCH26:
+ {
+ uint64_t cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0x3ffffff) << 2;
+
+ if (addend & 0x8000000)
+ addend |= 0xfffffffff0000000;
+
+ dest_vma += addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = (dest_vma >> 2) - (cur_vma >> 2);
+
+ if (val > 0x1ffffff || val < -0x2000000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_BRANCH26", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0xfc000000;
+ opcode |= val & 0x3ffffff;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_BRANCH19:
+ {
+ uint64_t cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0xffffe0) >> 3;
+
+ if (addend & 0x100000)
+ addend |= 0xffffffffffe00000;
+
+ dest_vma += addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = (dest_vma >> 2) - (cur_vma >> 2);
+
+ if (val > 0x3ffff || val < -0x40000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_BRANCH19", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0xff00001f;
+ opcode |= (val & 0x7ffff) << 5;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_BRANCH14:
+ {
+ uint64_t cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0x7ffe0) >> 3;
+
+ if (addend & 0x8000)
+ addend |= 0xffffffffffff0000;
+
+ dest_vma += addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = (dest_vma >> 2) - (cur_vma >> 2);
+
+ if (val > 0x1fff || val < -0x2000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_BRANCH14", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0xfff8001f;
+ opcode |= (val & 0x3fff) << 5;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_PAGEBASE_REL21:
+ {
+ uint64_t cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = ((opcode & 0xffffe0) >> 3)
+ | ((opcode & 0x60000000) >> 29);
+
+ if (addend & 0x100000)
+ addend |= 0xffffffffffe00000;
+
+ dest_vma += addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = (dest_vma >> 12) - (cur_vma >> 12);
+
+ if (val > 0xfffff || val < -0x100000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_PAGEBASE_REL21", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0x9f00001f;
+ opcode |= (val & 0x3) << 29;
+ opcode |= (val & 0x1ffffc) << 3;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_REL21:
+ {
+ uint64_t cur_vma;
+ uint32_t opcode;
+ int64_t addend, val;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = ((opcode & 0xffffe0) >> 3)
+ | ((opcode & 0x60000000) >> 29);
+
+ if (addend & 0x100000)
+ addend |= 0xffffffffffe00000;
+
+ dest_vma += addend;
+ cur_vma = input_section->output_section->vma
+ + input_section->output_offset
+ + rel->r_vaddr;
+
+ val = dest_vma - cur_vma;
+
+ if (val > 0xfffff || val < -0x100000)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_REL21", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ opcode &= 0x9f00001f;
+ opcode |= (val & 0x3) << 29;
+ opcode |= (val & 0x1ffffc) << 3;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_PAGEOFFSET_12L:
+ {
+ uint32_t opcode, val;
+ uint8_t shift;
+ int32_t addend;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0x3ffc00) >> 10;
+
+ if ((opcode & 0xff800000) == 0x3d800000)
+ {
+ /* LDR / STR with q register */
+ shift = 4;
+ }
+ else
+ {
+ /* top two bits represent how much addend should be shifted */
+ shift = opcode >> 30;
+ }
+
+ addend <<= shift;
+
+ dest_vma += addend;
+
+ /* only interested in bottom 12 bits */
+ val = dest_vma & 0xfff;
+
+ if (val & ((1 << shift) - 1))
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_PAGEOFFSET_12L", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ val >>= shift;
+
+ opcode &= 0xffc003ff;
+ opcode |= val << 10;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ case IMAGE_REL_ARM64_PAGEOFFSET_12A:
+ {
+ uint32_t opcode, val;
+ int32_t addend;
+
+ opcode = bfd_getl32 (contents + rel->r_vaddr);
+
+ addend = (opcode & 0x3ffc00) >> 10;
+
+ dest_vma += addend;
+
+ /* only interested in bottom 12 bits */
+ val = dest_vma & 0xfff;
+
+ opcode &= 0xffc003ff;
+ opcode |= val << 10;
+
+ bfd_putl32 (opcode, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
+ default:
+ info->callbacks->einfo (_("%F%P: Unhandled relocation type %u\n"),
+ rel->r_type);
+ BFD_FAIL ();
+ return false;
+ }
+ }
+
+ return _bfd_coff_generic_relocate_section (output_bfd, info, input_bfd,
+ input_section, contents,
+ relocs, syms, sections);
+}
+
+#define coff_relocate_section coff_pe_aarch64_relocate_section
#include "coffcode.h"
+/* Prevent assertion in md_apply_fix by forcing use_rela_p on for new
+ sections. */
+static bool
+coff_aarch64_new_section_hook (bfd *abfd, asection *section)
+{
+ if (!coff_new_section_hook (abfd, section))
+ return false;
+
+ section->use_rela_p = 1;
+
+ return true;
+}
+
+#define coff_aarch64_close_and_cleanup coff_close_and_cleanup
+#define coff_aarch64_bfd_free_cached_info coff_bfd_free_cached_info
+#define coff_aarch64_get_section_contents coff_get_section_contents
+#define coff_aarch64_get_section_contents_in_window coff_get_section_contents_in_window
+
/* Target vectors. */
const bfd_target
#ifdef TARGET_SYM
@@ -266,7 +912,7 @@ const bfd_target
_bfd_bool_bfd_false_error
},
- BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_GENERIC (coff_aarch64),
BFD_JUMP_TABLE_COPY (coff),
BFD_JUMP_TABLE_CORE (_bfd_nocore),
BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 0bc27fdce97..92a6cff938b 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1495,12 +1495,6 @@ case "${targ}" in
;;
esac
-if test x"$targ_defvec" = x"aarch64-pe"; then
- # Not currently complete (and probably not stable), warn user
- echo "*** WARNING BFD aarch64-pe support not complete nor stable"
- echo "*** Do not rely on this for production purposes"
-fi
-
# All MIPS ELF targets need a 64-bit bfd_vma.
case "${targ_defvec} ${targ_selvecs}" in
*mips_elf*)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index c679d930e88..a50cdb019e6 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -1889,10 +1889,9 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
}
}
-#ifdef OBJ_ELF
+#if defined(OBJ_ELF) || defined(OBJ_COFF)
/* Forward declarations for functions below, in the MD interface
section. */
-static fixS *fix_new_aarch64 (fragS *, int, short, expressionS *, int, int);
static struct reloc_table_entry * find_reloc_table_entry (char **);
/* Directives: Data. */
@@ -1900,7 +1899,7 @@ static struct reloc_table_entry * find_reloc_table_entry (char **);
implemented properly. */
static void
-s_aarch64_elf_cons (int nbytes)
+s_aarch64_cons (int nbytes)
{
expressionS exp;
@@ -1950,6 +1949,12 @@ s_aarch64_elf_cons (int nbytes)
input_line_pointer--;
demand_empty_rest_of_line ();
}
+#endif
+
+#ifdef OBJ_ELF
+/* Forward declarations for functions below, in the MD interface
+ section. */
+ static fixS *fix_new_aarch64 (fragS *, int, short, expressionS *, int, int);
/* Mark symbol that it follows a variant PCS convention. */
@@ -2119,11 +2124,13 @@ const pseudo_typeS md_pseudo_table[] = {
{"tlsdescadd", s_tlsdescadd, 0},
{"tlsdesccall", s_tlsdesccall, 0},
{"tlsdescldr", s_tlsdescldr, 0},
- {"word", s_aarch64_elf_cons, 4},
- {"long", s_aarch64_elf_cons, 4},
- {"xword", s_aarch64_elf_cons, 8},
- {"dword", s_aarch64_elf_cons, 8},
{"variant_pcs", s_variant_pcs, 0},
+#endif
+#if defined(OBJ_ELF) || defined(OBJ_COFF)
+ {"word", s_aarch64_cons, 4},
+ {"long", s_aarch64_cons, 4},
+ {"xword", s_aarch64_cons, 8},
+ {"dword", s_aarch64_cons, 8},
#endif
{"float16", float_cons, 'h'},
{"bfloat16", float_cons, 'b'},
@@ -9260,6 +9267,9 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
/* An error will already have been reported. */
break;
+ case BFD_RELOC_RVA:
+ break;
+
default:
as_bad_where (fixP->fx_file, fixP->fx_line,
_("unexpected %s fixup"),
diff --git a/gas/testsuite/gas/pe/pe-aarch64.d b/gas/testsuite/gas/pe/pe-aarch64.d
index 0b8009da5c4..eb611031183 100644
--- a/gas/testsuite/gas/pe/pe-aarch64.d
+++ b/gas/testsuite/gas/pe/pe-aarch64.d
@@ -1,14 +1,232 @@
#as:
-#objdump: -d
+#objdump: -dr
.*: file format pe-aarch64-little
Disassembly of section .text:
-0000000000000000 <_start>:
- 0: d2800281 mov x1, #0x14 // #20
- 4: 14000001 b 8 <foo>
+0000000000000000 <.text>:
+ ...
-0000000000000008 <foo>:
- 8: d65f03c0 ret
+0000000000000010 <foo>:
+ 10: 12345678 and w24, w19, #0xfffff003
+ 14: 12345678 and w24, w19, #0xfffff003
+ 18: 00000010 udf #16
+ 18: IMAGE_REL_ARM64_ADDR32 .text
+ 1c: 00000010 udf #16
+ 1c: IMAGE_REL_ARM64_ADDR32 .text
+ ...
+ 20: IMAGE_REL_ARM64_ADDR32 bar
+ 24: IMAGE_REL_ARM64_ADDR32 bar
+ 28: 00000011 udf #17
+ 28: IMAGE_REL_ARM64_ADDR32 .text
+ 2c: 00000011 udf #17
+ 2c: IMAGE_REL_ARM64_ADDR32 .text
+ 30: 00000001 udf #1
+ 30: IMAGE_REL_ARM64_ADDR32 bar
+ 34: 00000001 udf #1
+ 34: IMAGE_REL_ARM64_ADDR32 bar
+ 38: 0000000f udf #15
+ 38: IMAGE_REL_ARM64_ADDR32 .text
+ 3c: 0000000f udf #15
+ 3c: IMAGE_REL_ARM64_ADDR32 .text
+ 40: ffffffff .inst 0xffffffff ; undefined
+ 40: IMAGE_REL_ARM64_ADDR32 bar
+ 44: ffffffff .inst 0xffffffff ; undefined
+ 44: IMAGE_REL_ARM64_ADDR32 bar
+ 48: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 4c: 12345678 and w24, w19, #0xfffff003
+ 50: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 54: 12345678 and w24, w19, #0xfffff003
+ 58: 00000010 udf #16
+ 58: IMAGE_REL_ARM64_ADDR64 .text
+ 5c: 00000000 udf #0
+ 60: 00000010 udf #16
+ 60: IMAGE_REL_ARM64_ADDR64 .text
+ ...
+ 68: IMAGE_REL_ARM64_ADDR64 bar
+ 70: IMAGE_REL_ARM64_ADDR64 bar
+ 78: 00000011 udf #17
+ 78: IMAGE_REL_ARM64_ADDR64 .text
+ 7c: 00000000 udf #0
+ 80: 00000011 udf #17
+ 80: IMAGE_REL_ARM64_ADDR64 .text
+ 84: 00000000 udf #0
+ 88: 00000001 udf #1
+ 88: IMAGE_REL_ARM64_ADDR64 bar
+ 8c: 00000000 udf #0
+ 90: 00000001 udf #1
+ 90: IMAGE_REL_ARM64_ADDR64 bar
+ 94: 00000000 udf #0
+ 98: 0000000f udf #15
+ 98: IMAGE_REL_ARM64_ADDR64 .text
+ 9c: 00000000 udf #0
+ a0: 0000000f udf #15
+ a0: IMAGE_REL_ARM64_ADDR64 .text
+ a4: 00000000 udf #0
+ a8: ffffffff .inst 0xffffffff ; undefined
+ a8: IMAGE_REL_ARM64_ADDR64 bar
+ ac: ffffffff .inst 0xffffffff ; undefined
+ b0: ffffffff .inst 0xffffffff ; undefined
+ b0: IMAGE_REL_ARM64_ADDR64 bar
+ b4: ffffffff .inst 0xffffffff ; undefined
+ b8: 00000010 udf #16
+ b8: IMAGE_REL_ARM64_ADDR32NB .text
+ bc: 00000000 udf #0
+ bc: IMAGE_REL_ARM64_ADDR32NB bar
+ c0: 00000011 udf #17
+ c0: IMAGE_REL_ARM64_ADDR32NB .text
+ c4: 00000001 udf #1
+ c4: IMAGE_REL_ARM64_ADDR32NB bar
+ c8: 0000000f udf #15
+ c8: IMAGE_REL_ARM64_ADDR32NB .text
+ cc: ffffffff .inst 0xffffffff ; undefined
+ cc: IMAGE_REL_ARM64_ADDR32NB bar
+ d0: 17ffffd0 b 10 <foo>
+ d4: 17ffffd0 b 14 <foo\+0x4>
+ d8: 17ffffcd b c <.text\+0xc>
+ dc: 14000000 b 0 <bar>
+ dc: IMAGE_REL_ARM64_BRANCH26 bar
+ e0: 14000001 b 4 <bar\+0x4>
+ e0: IMAGE_REL_ARM64_BRANCH26 bar
+ e4: 17ffffff b fffffffffffffffc <bar\+0xfffffffffffffffc>
+ e4: IMAGE_REL_ARM64_BRANCH26 bar
+ e8: 97ffffca bl 10 <foo>
+ ec: 97ffffca bl 14 <foo\+0x4>
+ f0: 97ffffc7 bl c <.text\+0xc>
+ f4: 94000000 bl 0 <bar>
+ f4: IMAGE_REL_ARM64_BRANCH26 bar
+ f8: 94000001 bl 4 <bar\+0x4>
+ f8: IMAGE_REL_ARM64_BRANCH26 bar
+ fc: 97ffffff bl fffffffffffffffc <bar\+0xfffffffffffffffc>
+ fc: IMAGE_REL_ARM64_BRANCH26 bar
+ 100: 97ffffbf bl fffffffffffffffc <foo\+0xffffffffffffffec>
+ 104: b4fff860 cbz x0, 10 <foo>
+ 108: b4fff860 cbz x0, 14 <foo\+0x4>
+ 10c: b4fff800 cbz x0, c <.text\+0xc>
+ 110: b4000000 cbz x0, 0 <bar>
+ 110: IMAGE_REL_ARM64_BRANCH19 bar
+ 114: b4000020 cbz x0, 4 <bar\+0x4>
+ 114: IMAGE_REL_ARM64_BRANCH19 bar
+ 118: b4ffffe0 cbz x0, fffffffffffffffc <bar\+0xfffffffffffffffc>
+ 118: IMAGE_REL_ARM64_BRANCH19 bar
+ 11c: b4fff700 cbz x0, fffffffffffffffc <foo\+0xffffffffffffffec>
+ 120: 3607f780 tbz w0, #0, 10 <foo>
+ 124: 3607f780 tbz w0, #0, 14 <foo\+0x4>
+ 128: 3607f720 tbz w0, #0, c <.text\+0xc>
+ 12c: 36000000 tbz w0, #0, 0 <bar>
+ 12c: IMAGE_REL_ARM64_BRANCH14 bar
+ 130: 36000020 tbz w0, #0, 4 <bar\+0x4>
+ 130: IMAGE_REL_ARM64_BRANCH14 bar
+ 134: 3607ffe0 tbz w0, #0, fffffffffffffffc <bar\+0xfffffffffffffffc>
+ 134: IMAGE_REL_ARM64_BRANCH14 bar
+ 138: 3607f620 tbz w0, #0, fffffffffffffffc <foo\+0xffffffffffffffec>
+ 13c: 90000080 adrp x0, 10000 <foo\+0xfff0>
+ 13c: IMAGE_REL_ARM64_PAGEBASE_REL21 .text
+ 140: b0000080 adrp x0, 11000 <foo\+0x10ff0>
+ 140: IMAGE_REL_ARM64_PAGEBASE_REL21 .text
+ 144: f0000060 adrp x0, f000 <foo\+0xeff0>
+ 144: IMAGE_REL_ARM64_PAGEBASE_REL21 .text
+ 148: 90000000 adrp x0, 0 <bar>
+ 148: IMAGE_REL_ARM64_PAGEBASE_REL21 bar
+ 14c: b0000000 adrp x0, 1000 <bar\+0x1000>
+ 14c: IMAGE_REL_ARM64_PAGEBASE_REL21 bar
+ 150: f0ffffe0 adrp x0, fffffffffffff000 <bar\+0xfffffffffffff000>
+ 150: IMAGE_REL_ARM64_PAGEBASE_REL21 bar
+ 154: 90ffffe0 adrp x0, ffffffffffffc000 <foo\+0xffffffffffffbff0>
+ 154: IMAGE_REL_ARM64_PAGEBASE_REL21 .text
+ 158: 10fff5c0 adr x0, 10 <foo>
+ 15c: 30fff5a0 adr x0, 11 <foo\+0x1>
+ 160: 70fff560 adr x0, f <.text\+0xf>
+ 164: 10000000 adr x0, 0 <bar>
+ 164: IMAGE_REL_ARM64_REL21 bar
+ 168: 30000000 adr x0, 1 <bar\+0x1>
+ 168: IMAGE_REL_ARM64_REL21 bar
+ 16c: 70ffffe0 adr x0, ffffffffffffffff <bar\+0xffffffffffffffff>
+ 16c: IMAGE_REL_ARM64_REL21 bar
+ 170: 70fff460 adr x0, ffffffffffffffff <foo\+0xffffffffffffffef>
+ 174: 39004000 strb w0, \[x0, #16\]
+ 174: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 178: 39005000 strb w0, \[x0, #20\]
+ 178: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 17c: 39003000 strb w0, \[x0, #12\]
+ 17c: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 180: 39000000 strb w0, \[x0\]
+ 180: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 184: 39001000 strb w0, \[x0, #4\]
+ 184: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 188: 393ff000 strb w0, \[x0, #4092\]
+ 188: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 18c: 393ff000 strb w0, \[x0, #4092\]
+ 18c: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 190: 79002000 strh w0, \[x0, #16\]
+ 190: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 194: 79002800 strh w0, \[x0, #20\]
+ 194: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 198: 79001800 strh w0, \[x0, #12\]
+ 198: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 19c: 79000000 strh w0, \[x0\]
+ 19c: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1a0: 79000800 strh w0, \[x0, #4\]
+ 1a0: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1a4: 791ff800 strh w0, \[x0, #4092\]
+ 1a4: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1a8: 791ff800 strh w0, \[x0, #4092\]
+ 1a8: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1ac: b9001000 str w0, \[x0, #16\]
+ 1ac: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1b0: b9001400 str w0, \[x0, #20\]
+ 1b0: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1b4: b9000c00 str w0, \[x0, #12\]
+ 1b4: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1b8: b9000000 str w0, \[x0\]
+ 1b8: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1bc: b9000400 str w0, \[x0, #4\]
+ 1bc: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1c0: b90ffc00 str w0, \[x0, #4092\]
+ 1c0: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1c4: b90ffc00 str w0, \[x0, #4092\]
+ 1c4: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1c8: f9000800 str x0, \[x0, #16\]
+ 1c8: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1cc: f9000c00 str x0, \[x0, #24\]
+ 1cc: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1d0: f9000400 str x0, \[x0, #8\]
+ 1d0: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1d4: f9000000 str x0, \[x0\]
+ 1d4: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1d8: f9000400 str x0, \[x0, #8\]
+ 1d8: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1dc: f907fc00 str x0, \[x0, #4088\]
+ 1dc: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1e0: f907fc00 str x0, \[x0, #4088\]
+ 1e0: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1e4: 3d800400 str q0, \[x0, #16\]
+ 1e4: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1e8: 3d800800 str q0, \[x0, #32\]
+ 1e8: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1ec: 3d800000 str q0, \[x0\]
+ 1ec: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 1f0: 3d800000 str q0, \[x0\]
+ 1f0: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1f4: 3d800400 str q0, \[x0, #16\]
+ 1f4: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1f8: 3d83fc00 str q0, \[x0, #4080\]
+ 1f8: IMAGE_REL_ARM64_PAGEOFFSET_12L bar
+ 1fc: 3d83fc00 str q0, \[x0, #4080\]
+ 1fc: IMAGE_REL_ARM64_PAGEOFFSET_12L .text
+ 200: 91004000 add x0, x0, #0x10
+ 200: IMAGE_REL_ARM64_PAGEOFFSET_12A .text
+ 204: 91004400 add x0, x0, #0x11
+ 204: IMAGE_REL_ARM64_PAGEOFFSET_12A .text
+ 208: 91003c00 add x0, x0, #0xf
+ 208: IMAGE_REL_ARM64_PAGEOFFSET_12A .text
+ 20c: 91000000 add x0, x0, #0x0
+ 20c: IMAGE_REL_ARM64_PAGEOFFSET_12A bar
+ 210: 91000400 add x0, x0, #0x1
+ 210: IMAGE_REL_ARM64_PAGEOFFSET_12A bar
+ 214: 913ffc00 add x0, x0, #0xfff
+ 214: IMAGE_REL_ARM64_PAGEOFFSET_12A bar
+ 218: 913ffc00 add x0, x0, #0xfff
+ 218: IMAGE_REL_ARM64_PAGEOFFSET_12A .text
diff --git a/gas/testsuite/gas/pe/pe-aarch64.s b/gas/testsuite/gas/pe/pe-aarch64.s
index 546d55fc361..2a02d2d1c0d 100644
--- a/gas/testsuite/gas/pe/pe-aarch64.s
+++ b/gas/testsuite/gas/pe/pe-aarch64.s
@@ -1,11 +1,157 @@
-# A little test to ensure pe-aarch64 is working in GAS.
-# Currently, the poor pe-aarch64 implementation in binutils
-# couldn't do anything useful, hence, this test is rather short
+.text
-.section .text
+.dword 0
+.dword 0
-_start:
- mov x1, 20
- b foo
foo:
- ret
+
+# 4-byte literal
+.long 0x12345678
+.word 0x12345678
+
+# IMAGE_REL_ARM64_ADDR32 (BFD_RELOC_32)
+.long foo
+.word foo
+.long bar
+.word bar
+.long foo + 1
+.word foo + 1
+.long bar + 1
+.word bar + 1
+.long foo - 1
+.word foo - 1
+.long bar - 1
+.word bar - 1
+
+# 8-byte literal
+.dword 0x123456789abcdef0
+.xword 0x123456789abcdef0
+
+# IMAGE_REL_ARM64_ADDR64 (BFD_RELOC_64)
+.dword foo
+.xword foo
+.dword bar
+.xword bar
+.dword foo + 1
+.xword foo + 1
+.dword bar + 1
+.xword bar + 1
+.dword foo - 1
+.xword foo - 1
+.dword bar - 1
+.xword bar - 1
+
+# IMAGE_REL_ARM64_ADDR32NB (BFD_RELOC_RVA)
+.rva foo
+.rva bar
+.rva foo + 1
+.rva bar + 1
+.rva foo - 1
+.rva bar - 1
+
+# IMAGE_REL_ARM64_BRANCH26 (BFD_RELOC_AARCH64_JUMP26)
+b foo
+b foo + 4
+b foo - 4
+b bar
+b bar + 4
+b bar - 4
+
+# IMAGE_REL_ARM64_BRANCH26 (BFD_RELOC_AARCH64_CALL26)
+bl foo
+bl foo + 4
+bl foo - 4
+bl bar
+bl bar + 4
+bl bar - 4
+bl .text - 4
+
+# IMAGE_REL_ARM64_BRANCH19 (BFD_RELOC_AARCH64_BRANCH19)
+cbz x0, foo
+cbz x0, foo + 4
+cbz x0, foo - 4
+cbz x0, bar
+cbz x0, bar + 4
+cbz x0, bar - 4
+cbz x0, .text - 4
+
+# IMAGE_REL_ARM64_BRANCH14 (BFD_RELOC_AARCH64_TSTBR14)
+tbz x0, 0, foo
+tbz x0, 0, foo + 4
+tbz x0, 0, foo - 4
+tbz x0, 0, bar
+tbz x0, 0, bar + 4
+tbz x0, 0, bar - 4
+tbz x0, 0, .text - 4
+
+# IMAGE_REL_ARM64_PAGEBASE_REL21 (BFD_RELOC_AARCH64_ADR_HI21_PCREL)
+adrp x0, foo
+adrp x0, foo + 1
+adrp x0, foo - 1
+adrp x0, bar
+adrp x0, bar + 1
+adrp x0, bar - 1
+adrp x0, .text - 4
+
+# IMAGE_REL_ARM64_REL21 (BFD_RELOC_AARCH64_ADR_LO21_PCREL)
+adr x0, foo
+adr x0, foo + 1
+adr x0, foo - 1
+adr x0, bar
+adr x0, bar + 1
+adr x0, bar - 1
+adr x0, .text - 1
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST8_LO12)
+strb w0, [x0,:lo12:foo]
+strb w0, [x0,:lo12:foo + 4]
+strb w0, [x0,:lo12:foo - 4]
+strb w0, [x0,:lo12:bar]
+strb w0, [x0,:lo12:bar + 4]
+strb w0, [x0,:lo12:bar - 4]
+strb w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST16_LO12)
+strh w0, [x0,:lo12:foo]
+strh w0, [x0,:lo12:foo + 4]
+strh w0, [x0,:lo12:foo - 4]
+strh w0, [x0,:lo12:bar]
+strh w0, [x0,:lo12:bar + 4]
+strh w0, [x0,:lo12:bar - 4]
+strh w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST32_LO12)
+str w0, [x0,:lo12:foo]
+str w0, [x0,:lo12:foo + 4]
+str w0, [x0,:lo12:foo - 4]
+str w0, [x0,:lo12:bar]
+str w0, [x0,:lo12:bar + 4]
+str w0, [x0,:lo12:bar - 4]
+str w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST64_LO12)
+str x0, [x0,:lo12:foo]
+str x0, [x0,:lo12:foo + 8]
+str x0, [x0,:lo12:foo - 8]
+str x0, [x0,:lo12:bar]
+str x0, [x0,:lo12:bar + 8]
+str x0, [x0,:lo12:bar - 8]
+str x0, [x0,:lo12:.text - 8]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST128_LO12)
+str q0, [x0,:lo12:foo]
+str q0, [x0,:lo12:foo + 16]
+str q0, [x0,:lo12:foo - 16]
+str q0, [x0,:lo12:bar]
+str q0, [x0,:lo12:bar + 16]
+str q0, [x0,:lo12:bar - 16]
+str q0, [x0,:lo12:.text - 16]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12A (BFD_RELOC_AARCH64_ADD_LO12)
+add x0, x0, #:lo12:foo
+add x0, x0, #:lo12:foo + 1
+add x0, x0, #:lo12:foo - 1
+add x0, x0, #:lo12:bar
+add x0, x0, #:lo12:bar + 1
+add x0, x0, #:lo12:bar - 1
+add x0, x0, #:lo12:.text - 1
diff --git a/ld/testsuite/ld-pe/aarch64.d b/ld/testsuite/ld-pe/aarch64.d
new file mode 100644
index 00000000000..cc3daf9e9cd
--- /dev/null
+++ b/ld/testsuite/ld-pe/aarch64.d
@@ -0,0 +1,158 @@
+
+tmpdir/aarch64.x: file format pei-aarch64-little
+
+
+Disassembly of section .text:
+
+0000000000002000 <__rt_psrelocs_end>:
+ ...
+
+0000000000002010 <foo>:
+ 2010: 12345678 and w24, w19, #0xfffff003
+ 2014: 12345678 and w24, w19, #0xfffff003
+ 2018: 00002000 udf #8192
+ 201c: 00002000 udf #8192
+ 2020: 00002220 udf #8736
+ 2024: 00002220 udf #8736
+ 2028: 00002001 udf #8193
+ 202c: 00002001 udf #8193
+ 2030: 00002221 udf #8737
+ 2034: 00002221 udf #8737
+ 2038: 00001fff udf #8191
+ 203c: 00001fff udf #8191
+ 2040: 0000221f udf #8735
+ 2044: 0000221f udf #8735
+ 2048: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 204c: 12345678 and w24, w19, #0xfffff003
+ 2050: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 2054: 12345678 and w24, w19, #0xfffff003
+ 2058: 00002000 udf #8192
+ 205c: 00000000 udf #0
+ 2060: 00002000 udf #8192
+ 2064: 00000000 udf #0
+ 2068: 00002220 udf #8736
+ 206c: 00000000 udf #0
+ 2070: 00002220 udf #8736
+ 2074: 00000000 udf #0
+ 2078: 00002001 udf #8193
+ 207c: 00000000 udf #0
+ 2080: 00002001 udf #8193
+ 2084: 00000000 udf #0
+ 2088: 00002221 udf #8737
+ 208c: 00000000 udf #0
+ 2090: 00002221 udf #8737
+ 2094: 00000000 udf #0
+ 2098: 00001fff udf #8191
+ 209c: 00000000 udf #0
+ 20a0: 00001fff udf #8191
+ 20a4: 00000000 udf #0
+ 20a8: 0000221f udf #8735
+ 20ac: 00000000 udf #0
+ 20b0: 0000221f udf #8735
+ 20b4: 00000000 udf #0
+ 20b8: 00001010 udf #4112
+ 20bc: 00001220 udf #4640
+ 20c0: 00001011 udf #4113
+ 20c4: 00001221 udf #4641
+ 20c8: 0000100f udf #4111
+ 20cc: 0000121f udf #4639
+ 20d0: 17ffffd0 b 2010 <foo>
+ 20d4: 17ffffd0 b 2014 <foo\+0x4>
+ 20d8: 17ffffcd b 200c <__rt_psrelocs_end\+0xc>
+ 20dc: 14000051 b 2220 <bar>
+ 20e0: 14000051 b 2224 <bar\+0x4>
+ 20e4: 1400004e b 221c <.text>
+ 20e8: 97ffffca bl 2010 <foo>
+ 20ec: 97ffffca bl 2014 <foo\+0x4>
+ 20f0: 97ffffc7 bl 200c <__rt_psrelocs_end\+0xc>
+ 20f4: 9400004b bl 2220 <bar>
+ 20f8: 9400004b bl 2224 <bar\+0x4>
+ 20fc: 94000048 bl 221c <.text>
+ 2100: 97ffffbf bl 1ffc <__ImageBase\+0xffc>
+ 2104: b4fff860 cbz x0, 2010 <foo>
+ 2108: b4fff860 cbz x0, 2014 <foo\+0x4>
+ 210c: b4fff800 cbz x0, 200c <__rt_psrelocs_end\+0xc>
+ 2110: b4000880 cbz x0, 2220 <bar>
+ 2114: b4000880 cbz x0, 2224 <bar\+0x4>
+ 2118: b4000820 cbz x0, 221c <.text>
+ 211c: b4fff700 cbz x0, 1ffc <__ImageBase\+0xffc>
+ 2120: 3607f780 tbz w0, #0, 2010 <foo>
+ 2124: 3607f780 tbz w0, #0, 2014 <foo\+0x4>
+ 2128: 3607f720 tbz w0, #0, 200c <__rt_psrelocs_end\+0xc>
+ 212c: 360007a0 tbz w0, #0, 2220 <bar>
+ 2130: 360007a0 tbz w0, #0, 2224 <bar\+0x4>
+ 2134: 36000740 tbz w0, #0, 221c <.text>
+ 2138: 3607f620 tbz w0, #0, 1ffc <__ImageBase\+0xffc>
+ 213c: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2140: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2144: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2148: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 214c: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2150: 90000000 adrp x0, 2000 <__rt_psrelocs_end>
+ 2154: f0ffffe0 adrp x0, 1000 <__ImageBase>
+ 2158: 10fff5c0 adr x0, 2010 <foo>
+ 215c: 30fff5a0 adr x0, 2011 <foo\+0x1>
+ 2160: 70fff560 adr x0, 200f <__rt_psrelocs_end\+0xf>
+ 2164: 100005e0 adr x0, 2220 <bar>
+ 2168: 300005c0 adr x0, 2221 <bar\+0x1>
+ 216c: 70000580 adr x0, 221f <.text\+0x3>
+ 2170: 70fff460 adr x0, 1fff <__ImageBase\+0xfff>
+ 2174: 39004000 strb w0, \[x0, #16\]
+ 2178: 39005000 strb w0, \[x0, #20\]
+ 217c: 39003000 strb w0, \[x0, #12\]
+ 2180: 39088000 strb w0, \[x0, #544\]
+ 2184: 39089000 strb w0, \[x0, #548\]
+ 2188: 39087000 strb w0, \[x0, #540\]
+ 218c: 393ff000 strb w0, \[x0, #4092\]
+ 2190: 79002000 strh w0, \[x0, #16\]
+ 2194: 79002800 strh w0, \[x0, #20\]
+ 2198: 79001800 strh w0, \[x0, #12\]
+ 219c: 79044000 strh w0, \[x0, #544\]
+ 21a0: 79044800 strh w0, \[x0, #548\]
+ 21a4: 79043800 strh w0, \[x0, #540\]
+ 21a8: 791ff800 strh w0, \[x0, #4092\]
+ 21ac: b9001000 str w0, \[x0, #16\]
+ 21b0: b9001400 str w0, \[x0, #20\]
+ 21b4: b9000c00 str w0, \[x0, #12\]
+ 21b8: b9022000 str w0, \[x0, #544\]
+ 21bc: b9022400 str w0, \[x0, #548\]
+ 21c0: b9021c00 str w0, \[x0, #540\]
+ 21c4: b90ffc00 str w0, \[x0, #4092\]
+ 21c8: f9000800 str x0, \[x0, #16\]
+ 21cc: f9000c00 str x0, \[x0, #24\]
+ 21d0: f9000400 str x0, \[x0, #8\]
+ 21d4: f9011000 str x0, \[x0, #544\]
+ 21d8: f9011400 str x0, \[x0, #552\]
+ 21dc: f9010c00 str x0, \[x0, #536\]
+ 21e0: f907fc00 str x0, \[x0, #4088\]
+ 21e4: 3d800400 str q0, \[x0, #16\]
+ 21e8: 3d800800 str q0, \[x0, #32\]
+ 21ec: 3d800000 str q0, \[x0\]
+ 21f0: 3d808800 str q0, \[x0, #544\]
+ 21f4: 3d808c00 str q0, \[x0, #560\]
+ 21f8: 3d808400 str q0, \[x0, #528\]
+ 21fc: 3d83fc00 str q0, \[x0, #4080\]
+ 2200: 91004000 add x0, x0, #0x10
+ 2204: 91004400 add x0, x0, #0x11
+ 2208: 91003c00 add x0, x0, #0xf
+ 220c: 91088000 add x0, x0, #0x220
+ 2210: 91088400 add x0, x0, #0x221
+ 2214: 91087c00 add x0, x0, #0x21f
+ 2218: 913ffc00 add x0, x0, #0xfff
+
+000000000000221c <.text>:
+ 221c: 00000000 udf #0
+
+0000000000002220 <bar>:
+ 2220: 9abcdef0 .inst 0x9abcdef0 ; undefined
+ 2224: 12345678 and w24, w19, #0xfffff003
+
+0000000000002228 <__CTOR_LIST__>:
+ 2228: ffffffff .inst 0xffffffff ; undefined
+ 222c: ffffffff .inst 0xffffffff ; undefined
+ ...
+
+0000000000002238 <__DTOR_LIST__>:
+ 2238: ffffffff .inst 0xffffffff ; undefined
+ 223c: ffffffff .inst 0xffffffff ; undefined
+ ...
diff --git a/ld/testsuite/ld-pe/aarch64a.s b/ld/testsuite/ld-pe/aarch64a.s
new file mode 100644
index 00000000000..58b8f5a00c0
--- /dev/null
+++ b/ld/testsuite/ld-pe/aarch64a.s
@@ -0,0 +1,159 @@
+.text
+
+.dword 0
+.dword 0
+
+# 2010
+.global foo
+foo:
+
+# 4-byte literal
+.long 0x12345678
+.word 0x12345678
+
+# IMAGE_REL_ARM64_ADDR32 (BFD_RELOC_32)
+.long foo
+.word foo
+.long bar
+.word bar
+.long foo + 1
+.word foo + 1
+.long bar + 1
+.word bar + 1
+.long foo - 1
+.word foo - 1
+.long bar - 1
+.word bar - 1
+
+# 8-byte literal
+.dword 0x123456789abcdef0
+.xword 0x123456789abcdef0
+
+# IMAGE_REL_ARM64_ADDR64 (BFD_RELOC_64)
+.dword foo
+.xword foo
+.dword bar
+.xword bar
+.dword foo + 1
+.xword foo + 1
+.dword bar + 1
+.xword bar + 1
+.dword foo - 1
+.xword foo - 1
+.dword bar - 1
+.xword bar - 1
+
+# IMAGE_REL_ARM64_ADDR32NB (BFD_RELOC_RVA)
+.rva foo
+.rva bar
+.rva foo + 1
+.rva bar + 1
+.rva foo - 1
+.rva bar - 1
+
+# IMAGE_REL_ARM64_BRANCH26 (BFD_RELOC_AARCH64_JUMP26)
+b foo
+b foo + 4
+b foo - 4
+b bar
+b bar + 4
+b bar - 4
+
+# IMAGE_REL_ARM64_BRANCH26 (BFD_RELOC_AARCH64_CALL26)
+bl foo
+bl foo + 4
+bl foo - 4
+bl bar
+bl bar + 4
+bl bar - 4
+bl .text - 4
+
+# IMAGE_REL_ARM64_BRANCH19 (BFD_RELOC_AARCH64_BRANCH19)
+cbz x0, foo
+cbz x0, foo + 4
+cbz x0, foo - 4
+cbz x0, bar
+cbz x0, bar + 4
+cbz x0, bar - 4
+cbz x0, .text - 4
+
+# IMAGE_REL_ARM64_BRANCH14 (BFD_RELOC_AARCH64_TSTBR14)
+tbz x0, 0, foo
+tbz x0, 0, foo + 4
+tbz x0, 0, foo - 4
+tbz x0, 0, bar
+tbz x0, 0, bar + 4
+tbz x0, 0, bar - 4
+tbz x0, 0, .text - 4
+
+# IMAGE_REL_ARM64_PAGEBASE_REL21 (BFD_RELOC_AARCH64_ADR_HI21_PCREL)
+adrp x0, foo
+adrp x0, foo + 1
+adrp x0, foo - 1
+adrp x0, bar
+adrp x0, bar + 1
+adrp x0, bar - 1
+adrp x0, .text - 4
+
+# IMAGE_REL_ARM64_REL21 (BFD_RELOC_AARCH64_ADR_LO21_PCREL)
+adr x0, foo
+adr x0, foo + 1
+adr x0, foo - 1
+adr x0, bar
+adr x0, bar + 1
+adr x0, bar - 1
+adr x0, .text - 1
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST8_LO12)
+strb w0, [x0,:lo12:foo]
+strb w0, [x0,:lo12:foo + 4]
+strb w0, [x0,:lo12:foo - 4]
+strb w0, [x0,:lo12:bar]
+strb w0, [x0,:lo12:bar + 4]
+strb w0, [x0,:lo12:bar - 4]
+strb w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST16_LO12)
+strh w0, [x0,:lo12:foo]
+strh w0, [x0,:lo12:foo + 4]
+strh w0, [x0,:lo12:foo - 4]
+strh w0, [x0,:lo12:bar]
+strh w0, [x0,:lo12:bar + 4]
+strh w0, [x0,:lo12:bar - 4]
+strh w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST32_LO12)
+str w0, [x0,:lo12:foo]
+str w0, [x0,:lo12:foo + 4]
+str w0, [x0,:lo12:foo - 4]
+str w0, [x0,:lo12:bar]
+str w0, [x0,:lo12:bar + 4]
+str w0, [x0,:lo12:bar - 4]
+str w0, [x0,:lo12:.text - 4]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST64_LO12)
+str x0, [x0,:lo12:foo]
+str x0, [x0,:lo12:foo + 8]
+str x0, [x0,:lo12:foo - 8]
+str x0, [x0,:lo12:bar]
+str x0, [x0,:lo12:bar + 8]
+str x0, [x0,:lo12:bar - 8]
+str x0, [x0,:lo12:.text - 8]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12L (BFD_RELOC_AARCH64_LDST128_LO12)
+str q0, [x0,:lo12:foo]
+str q0, [x0,:lo12:foo + 16]
+str q0, [x0,:lo12:foo - 16]
+str q0, [x0,:lo12:bar]
+str q0, [x0,:lo12:bar + 16]
+str q0, [x0,:lo12:bar - 16]
+str q0, [x0,:lo12:.text - 16]
+
+# IMAGE_REL_ARM64_PAGEOFFSET_12A (BFD_RELOC_AARCH64_ADD_LO12)
+add x0, x0, #:lo12:foo
+add x0, x0, #:lo12:foo + 1
+add x0, x0, #:lo12:foo - 1
+add x0, x0, #:lo12:bar
+add x0, x0, #:lo12:bar + 1
+add x0, x0, #:lo12:bar - 1
+add x0, x0, #:lo12:.text - 1
diff --git a/ld/testsuite/ld-pe/aarch64b.s b/ld/testsuite/ld-pe/aarch64b.s
new file mode 100644
index 00000000000..3f4ec48f724
--- /dev/null
+++ b/ld/testsuite/ld-pe/aarch64b.s
@@ -0,0 +1,8 @@
+.text
+
+.long 0
+
+# 2220
+.global bar
+bar:
+.dword 0x123456789abcdef0
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index d8595ee61e8..80019a48778 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -79,9 +79,15 @@ if {[istarget i*86-*-cygwin*]
}
if {[istarget "aarch64-*-pe*"]} {
- run_dump_test "pe-aarch64"
-}
+ run_dump_test "pe-aarch64"
+
+ set pe_tests {
+ {"aarch64" "--image-base 0x1000" "" "" {aarch64a.s aarch64b.s}
+ {{objdump -dr aarch64.d}} "aarch64.x"}
+ }
+ run_ld_link_tests $pe_tests
+}
run_dump_test "image_size"
run_dump_test "export_dynamic_warning"
--
2.37.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH 6/8] Add .secrel32 for pe-aarch64
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
` (3 preceding siblings ...)
2022-12-30 2:40 ` [PATCH 5/8] Add pe-aarch64 relocations Mark Harmstone
@ 2022-12-30 2:40 ` Mark Harmstone
2022-12-30 2:40 ` [PATCH 7/8] Add aarch64-w64-mingw32 target Mark Harmstone
` (3 subsequent siblings)
8 siblings, 0 replies; 34+ messages in thread
From: Mark Harmstone @ 2022-12-30 2:40 UTC (permalink / raw)
To: wej22007, zac.walker, tamar.christina, binutils; +Cc: Mark Harmstone
---
bfd/coff-aarch64.c | 47 +++++++++++++++++++++++-
gas/config/tc-aarch64.c | 75 +++++++++++++++++++++++++++++----------
gas/config/tc-aarch64.h | 4 +++
ld/testsuite/ld-pe/pe.exp | 2 ++
4 files changed, 108 insertions(+), 20 deletions(-)
diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index b63e21514b2..7f6511c82cb 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -267,6 +267,20 @@ coff_aarch64_addr32nb_reloc (bfd *abfd ATTRIBUTE_UNUSED,
return bfd_reloc_ok;
}
+static bfd_reloc_status_type
+coff_aarch64_secrel_reloc (bfd *abfd ATTRIBUTE_UNUSED,
+ arelent *reloc_entry,
+ asymbol *symbol ATTRIBUTE_UNUSED,
+ void *data,
+ asection *input_section ATTRIBUTE_UNUSED,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ char **error_message ATTRIBUTE_UNUSED)
+{
+ bfd_putl32 (reloc_entry->addend, data + reloc_entry->address);
+
+ return bfd_reloc_ok;
+}
+
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value. */
#define MINUS_ONE (~ (bfd_vma) 0)
@@ -330,6 +344,11 @@ static const reloc_howto_type arm64_reloc_howto_32nb = HOWTO (IMAGE_REL_ARM64_AD
coff_aarch64_addr32nb_reloc, "IMAGE_REL_ARM64_ADDR32NB",
false, 0xffffffff, 0xffffffff, false);
+static const reloc_howto_type arm64_reloc_howto_secrel = HOWTO (IMAGE_REL_ARM64_SECREL, 0, 4, 32, false, 0,
+ complain_overflow_bitfield,
+ coff_aarch64_secrel_reloc, "IMAGE_REL_ARM64_SECREL",
+ false, 0xffffffff, 0xffffffff, false);
+
static const reloc_howto_type* const arm64_howto_table[] = {
&arm64_reloc_howto_abs,
&arm64_reloc_howto_64,
@@ -342,7 +361,8 @@ static const reloc_howto_type* const arm64_howto_table[] = {
&arm64_reloc_howto_branch19,
&arm64_reloc_howto_branch14,
&arm64_reloc_howto_pgoff12a,
- &arm64_reloc_howto_32nb
+ &arm64_reloc_howto_32nb,
+ &arm64_reloc_howto_secrel
};
#ifndef NUM_ELEM
@@ -387,6 +407,8 @@ coff_aarch64_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, bfd_reloc_code_real
return &arm64_reloc_howto_branch19;
case BFD_RELOC_RVA:
return &arm64_reloc_howto_32nb;
+ case BFD_RELOC_32_SECREL:
+ return &arm64_reloc_howto_secrel;
default:
BFD_FAIL ();
return NULL;
@@ -441,6 +463,8 @@ coff_aarch64_rtype_lookup (unsigned int code)
return &arm64_reloc_howto_pgoff12a;
case IMAGE_REL_ARM64_ADDR32NB:
return &arm64_reloc_howto_32nb;
+ case IMAGE_REL_ARM64_SECREL:
+ return &arm64_reloc_howto_secrel;
default:
BFD_FAIL ();
return NULL;
@@ -811,6 +835,27 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
break;
}
+ case IMAGE_REL_ARM64_SECREL:
+ {
+ uint64_t val;
+ int32_t addend;
+
+ addend = bfd_getl32 (contents + rel->r_vaddr);
+
+ val = sec->output_offset + sym_value + addend;
+
+ if (val > 0xffffffff)
+ (*info->callbacks->reloc_overflow)
+ (info, h ? &h->root : NULL, syms[symndx]._n._n_name,
+ "IMAGE_REL_ARM64_SECREL", addend, input_bfd,
+ input_section, rel->r_vaddr - input_section->vma);
+
+ bfd_putl32 (val, contents + rel->r_vaddr);
+ rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+ break;
+ }
+
default:
info->callbacks->einfo (_("%F%P: Unhandled relocation type %u\n"),
rel->r_type);
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index a50cdb019e6..a72b96ffca7 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2097,6 +2097,27 @@ s_tlsdescldr (int ignored ATTRIBUTE_UNUSED)
}
#endif /* OBJ_ELF */
+#ifdef TE_PE
+static void
+s_secrel (int dummy ATTRIBUTE_UNUSED)
+{
+ expressionS exp;
+
+ do
+ {
+ expression (&exp);
+ if (exp.X_op == O_symbol)
+ exp.X_op = O_secrel;
+
+ emit_expr (&exp, 4);
+ }
+ while (*input_line_pointer++ == ',');
+
+ input_line_pointer--;
+ demand_empty_rest_of_line ();
+}
+#endif /* TE_PE */
+
static void s_aarch64_arch (int);
static void s_aarch64_cpu (int);
static void s_aarch64_arch_extension (int);
@@ -2131,6 +2152,9 @@ const pseudo_typeS md_pseudo_table[] = {
{"long", s_aarch64_cons, 4},
{"xword", s_aarch64_cons, 8},
{"dword", s_aarch64_cons, 8},
+#endif
+#ifdef TE_PE
+ {"secrel32", s_secrel, 0},
#endif
{"float16", float_cons, 'h'},
{"bfloat16", float_cons, 'b'},
@@ -9268,6 +9292,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
break;
case BFD_RELOC_RVA:
+ case BFD_RELOC_32_SECREL:
break;
default:
@@ -9353,27 +9378,39 @@ cons_fix_new_aarch64 (fragS * frag, int where, int size, expressionS * exp)
bfd_reloc_code_real_type type;
int pcrel = 0;
- /* Pick a reloc.
- FIXME: @@ Should look at CPU word size. */
- switch (size)
+#ifdef TE_PE
+ if (exp->X_op == O_secrel)
{
- case 1:
- type = BFD_RELOC_8;
- break;
- case 2:
- type = BFD_RELOC_16;
- break;
- case 4:
- type = BFD_RELOC_32;
- break;
- case 8:
- type = BFD_RELOC_64;
- break;
- default:
- as_bad (_("cannot do %u-byte relocation"), size);
- type = BFD_RELOC_UNUSED;
- break;
+ exp->X_op = O_symbol;
+ type = BFD_RELOC_32_SECREL;
}
+ else
+ {
+#endif
+ /* Pick a reloc.
+ FIXME: @@ Should look at CPU word size. */
+ switch (size)
+ {
+ case 1:
+ type = BFD_RELOC_8;
+ break;
+ case 2:
+ type = BFD_RELOC_16;
+ break;
+ case 4:
+ type = BFD_RELOC_32;
+ break;
+ case 8:
+ type = BFD_RELOC_64;
+ break;
+ default:
+ as_bad (_("cannot do %u-byte relocation"), size);
+ type = BFD_RELOC_UNUSED;
+ break;
+ }
+#ifdef TE_PE
+ }
+#endif
fix_new_exp (frag, where, (int) size, exp, pcrel, type);
}
diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h
index 7a9a4e77bff..5f82dd23824 100644
--- a/gas/config/tc-aarch64.h
+++ b/gas/config/tc-aarch64.h
@@ -314,4 +314,8 @@ extern void aarch64_handle_align (struct frag *);
extern int tc_aarch64_regname_to_dw2regnum (char *regname);
extern void tc_aarch64_frame_initial_instructions (void);
+#ifdef TE_PE
+#define O_secrel O_md1
+#endif /* TE_PE */
+
#endif /* TC_AARCH64 */
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index 80019a48778..83b20d0da45 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -84,6 +84,8 @@ if {[istarget "aarch64-*-pe*"]} {
set pe_tests {
{"aarch64" "--image-base 0x1000" "" "" {aarch64a.s aarch64b.s}
{{objdump -dr aarch64.d}} "aarch64.x"}
+ {".secrel32" "--disable-reloc-section" "" "" {secrel1.s secrel2.s}
+ {{objdump -s secrel_64.d}} "secrel.x"}
}
run_ld_link_tests $pe_tests
--
2.37.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH 7/8] Add aarch64-w64-mingw32 target
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
` (4 preceding siblings ...)
2022-12-30 2:40 ` [PATCH 6/8] Add .secrel32 for pe-aarch64 Mark Harmstone
@ 2022-12-30 2:40 ` Mark Harmstone
2022-12-30 2:40 ` [PATCH 8/8] gas: Restore tc_pe_dwarf2_emit_offset for pe-aarch64 Mark Harmstone
` (2 subsequent siblings)
8 siblings, 0 replies; 34+ messages in thread
From: Mark Harmstone @ 2022-12-30 2:40 UTC (permalink / raw)
To: wej22007, zac.walker, tamar.christina, binutils; +Cc: Mark Harmstone
---
bfd/config.bfd | 4 +--
bfd/peicode.h | 2 +-
binutils/configure | 10 ++++++
binutils/configure.ac | 10 ++++++
binutils/dlltool.c | 57 +++++++++++++++++++++++++++++---
binutils/rescoff.c | 3 ++
gas/configure.tgt | 2 +-
gas/testsuite/gas/pe/pe.exp | 2 +-
ld/configure.tgt | 4 +--
ld/emultempl/pep.em | 11 +++---
ld/pe-dll.c | 12 +++----
ld/testsuite/ld-pe/pe-aarch64.d | 13 ++++++--
ld/testsuite/ld-pe/pe.exp | 2 +-
ld/testsuite/ld-scripts/weak.exp | 1 +
14 files changed, 109 insertions(+), 24 deletions(-)
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 92a6cff938b..de1c4cd4fd7 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -249,9 +249,9 @@ case "${targ}" in
targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_le_vec aarch64_pe_le_vec"
want64=true
;;
- aarch64-*-pe*)
+ aarch64-*-pe* | aarch64-*-mingw*)
targ_defvec=aarch64_pe_le_vec
- targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec"
+ targ_selvecs="aarch64_pe_le_vec aarch64_pei_le_vec aarch64_elf64_le_vec aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec pdb_vec"
want64=true
targ_underscore=no
;;
diff --git a/bfd/peicode.h b/bfd/peicode.h
index f7ba24ae10a..26e95dc1f1b 100644
--- a/bfd/peicode.h
+++ b/bfd/peicode.h
@@ -440,7 +440,7 @@ pe_bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
#define SIZEOF_IDATA2 (5 * 4)
/* For PEx64 idata4 & 5 have thumb size of 8 bytes. */
-#ifdef COFF_WITH_pex64
+#if defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
#define SIZEOF_IDATA4 (2 * 4)
#define SIZEOF_IDATA5 (2 * 4)
#else
diff --git a/binutils/configure b/binutils/configure
index 5a3e5017b46..a88b66dae8f 100755
--- a/binutils/configure
+++ b/binutils/configure
@@ -14578,6 +14578,16 @@ do
esac
case $targ in
+ aarch64-*-mingw*)
+ BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
+ if test -z "$DLLTOOL_DEFAULT"; then
+ DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_AARCH64"
+ fi
+ DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_AARCH64"
+ BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
+ BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
+ BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
+ ;;
arm-wince-pe* | arm-*-wince | arm*-*-cegcc* | arm*-*-mingw32ce*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
diff --git a/binutils/configure.ac b/binutils/configure.ac
index 6243a2b0c2d..b51aeb9f38f 100644
--- a/binutils/configure.ac
+++ b/binutils/configure.ac
@@ -355,6 +355,16 @@ do
esac
case $targ in
+ aarch64-*-mingw*)
+ BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
+ if test -z "$DLLTOOL_DEFAULT"; then
+ DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_AARCH64"
+ fi
+ DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_AARCH64"
+ BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
+ BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
+ BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
+ ;;
arm-wince-pe* | arm-*-wince | arm*-*-cegcc* | arm*-*-mingw32ce*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
diff --git a/binutils/dlltool.c b/binutils/dlltool.c
index a3c5e0f778e..c9c53919dbf 100644
--- a/binutils/dlltool.c
+++ b/binutils/dlltool.c
@@ -442,6 +442,11 @@ static const char *mname = "arm";
static const char *mname = "arm-wince";
#endif
+#ifdef DLLTOOL_DEFAULT_AARCH64
+/* arm64 rather than aarch64 to match llvm-dlltool */
+static const char *mname = "arm64";
+#endif
+
#ifdef DLLTOOL_DEFAULT_I386
static const char *mname = "i386";
#endif
@@ -560,6 +565,14 @@ static const unsigned char mcore_le_jtab[] =
0x00, 0x00, 0x00, 0x00 /* <address> */
};
+static const unsigned char aarch64_jtab[] =
+{
+ 0x10, 0x00, 0x00, 0x90, /* adrp x16, 0 */
+ 0x10, 0x02, 0x00, 0x91, /* add x16, x16, #0x0 */
+ 0x10, 0x02, 0x40, 0xf9, /* ldr x16, [x16] */
+ 0x00, 0x02, 0x1f, 0xd6 /* br x16 */
+};
+
static const char i386_trampoline[] =
"\tpushl %%ecx\n"
"\tpushl %%edx\n"
@@ -717,6 +730,15 @@ mtable[] =
i386_x64_dljtab, sizeof (i386_x64_dljtab), 2, 9, 14, true, i386_x64_trampoline
}
,
+ {
+#define MAARCH64 10
+ "arm64", ".byte", ".short", ".long", ".asciz", "//",
+ "bl ", ".global", ".space", ".balign\t2", ".balign\t4", "",
+ "pe-aarch64-little", bfd_arch_aarch64,
+ aarch64_jtab, sizeof (aarch64_jtab), 0,
+ 0, 0, 0, 0, 0, false, 0
+ }
+ ,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
};
@@ -864,6 +886,7 @@ rvaafter (int mach)
case MMCORE_ELF:
case MMCORE_ELF_LE:
case MARM_WINCE:
+ case MAARCH64:
break;
default:
/* xgettext:c-format */
@@ -888,6 +911,7 @@ rvabefore (int mach)
case MMCORE_ELF:
case MMCORE_ELF_LE:
case MARM_WINCE:
+ case MAARCH64:
return ".rva\t";
default:
/* xgettext:c-format */
@@ -910,6 +934,7 @@ asm_prefix (int mach, const char *name)
case MMCORE_ELF:
case MMCORE_ELF_LE:
case MARM_WINCE:
+ case MAARCH64:
break;
case M386:
case MX86:
@@ -2474,6 +2499,8 @@ make_one_lib_file (export_type *exp, int i, int delay)
case TEXT:
if (! exp->data)
{
+ unsigned int rpp_len;
+
si->size = HOW_JTAB_SIZE;
si->data = xmalloc (HOW_JTAB_SIZE);
memcpy (si->data, HOW_JTAB, HOW_JTAB_SIZE);
@@ -2481,7 +2508,12 @@ make_one_lib_file (export_type *exp, int i, int delay)
/* Add the reloc into idata$5. */
rel = xmalloc (sizeof (arelent));
- rpp = xmalloc (sizeof (arelent *) * (delay ? 4 : 2));
+ rpp_len = delay ? 4 : 2;
+
+ if (machine == MAARCH64)
+ rpp_len++;
+
+ rpp = xmalloc (sizeof (arelent *) * rpp_len);
rpp[0] = rel;
rpp[1] = 0;
@@ -2507,6 +2539,22 @@ make_one_lib_file (export_type *exp, int i, int delay)
BFD_RELOC_32_PCREL);
rel->sym_ptr_ptr = iname_pp;
}
+ else if (machine == MAARCH64)
+ {
+ arelent *rel_add;
+
+ rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL);
+ rel->sym_ptr_ptr = secdata[IDATA5].sympp;
+
+ rel_add = xmalloc (sizeof (arelent));
+ rel_add->address = 4;
+ rel_add->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_AARCH64_ADD_LO12);
+ rel_add->sym_ptr_ptr = secdata[IDATA5].sympp;
+ rel_add->addend = 0;
+
+ rpp[rpp_len - 2] = rel_add;
+ rpp[rpp_len - 1] = 0;
+ }
else
{
rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
@@ -2527,7 +2575,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
}
sec->orelocation = rpp;
- sec->reloc_count = delay ? 3 : 1;
+ sec->reloc_count = rpp_len - 1;
}
break;
@@ -3674,7 +3722,7 @@ usage (FILE *file, int status)
fprintf (file, _("Usage %s <option(s)> <object-file(s)>\n"), program_name);
/* xgetext:c-format */
fprintf (file, _(" -m --machine <machine> Create as DLL for <machine>. [default: %s]\n"), mname);
- fprintf (file, _(" possible <machine>: arm[_interwork], i386, mcore[-elf]{-le|-be}, thumb\n"));
+ fprintf (file, _(" possible <machine>: arm[_interwork], arm64, i386, mcore[-elf]{-le|-be}, thumb\n"));
fprintf (file, _(" -e --output-exp <outname> Generate an export file.\n"));
fprintf (file, _(" -l --output-lib <outname> Generate an interface library.\n"));
fprintf (file, _(" -y --output-delaylib <outname> Create a delay-import library.\n"));
@@ -3967,7 +4015,8 @@ main (int ac, char **av)
machine = i;
/* Check if we generated PE+. */
- create_for_pep = strcmp (mname, "i386:x86-64") == 0;
+ create_for_pep = strcmp (mname, "i386:x86-64") == 0 ||
+ strcmp (mname, "arm64") == 0;
{
/* Check the default underscore */
diff --git a/binutils/rescoff.c b/binutils/rescoff.c
index 83b08634c7f..1ae02598313 100644
--- a/binutils/rescoff.c
+++ b/binutils/rescoff.c
@@ -463,6 +463,9 @@ write_coff_file (const char *filename, const char *target,
#elif defined DLLTOOL_ARM
if (! bfd_set_arch_mach (abfd, bfd_arch_arm, 0))
bfd_fatal ("bfd_set_arch_mach(arm)");
+#elif defined DLLTOOL_AARCH64
+ if (! bfd_set_arch_mach (abfd, bfd_arch_aarch64, 0))
+ bfd_fatal ("bfd_set_arch_mach(aarch64)");
#else
/* FIXME: This is obviously i386 specific. */
if (! bfd_set_arch_mach (abfd, bfd_arch_i386, 0))
diff --git a/gas/configure.tgt b/gas/configure.tgt
index 82f2d44f418..ba49003bc80 100644
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -135,7 +135,7 @@ case ${generic_target} in
esac ;;
aarch64*-*-netbsd*) fmt=elf em=nbsd;;
aarch64*-*-openbsd*) fmt=elf;;
- aarch64*-*-pe*) fmt=coff em=pepaarch64 ;;
+ aarch64*-*-pe* | aarch64*-*-mingw*) fmt=coff em=pepaarch64 ;;
alpha-*-*vms*) fmt=evax ;;
alpha-*-osf*) fmt=ecoff ;;
alpha-*-linux*ecoff*) fmt=ecoff ;;
diff --git a/gas/testsuite/gas/pe/pe.exp b/gas/testsuite/gas/pe/pe.exp
index 8df750f9dd0..231cdecb12b 100644
--- a/gas/testsuite/gas/pe/pe.exp
+++ b/gas/testsuite/gas/pe/pe.exp
@@ -54,7 +54,7 @@ if ([istarget "x86_64-*-mingw*"]) then {
# This test is only for AArch64
-if ([istarget "aarch64-*-pe*"]) {
+if {[istarget "aarch64-*-pe*"] || [istarget "aarch64-*-mingw*"]} {
run_dump_test "pe-aarch64"
}
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 6b833f26248..d8566daf8cf 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -118,9 +118,9 @@ aarch64-*-linux*) targ_emul=aarch64linux
aarch64-*-haiku*) targ_emul=aarch64haiku
targ_extra_emuls="aarch64elf aarch64elf32 aarch64elf32b aarch64elfb armelf armelfb armelf_haiku $targ_extra_libpath"
;;
-aarch64-*-pe*)
+aarch64-*-pe* | aarch64-*-mingw*)
targ_emul=arm64pe
- targ_extra_ofiles="deffilep.o pep-dll-aarch64.o"
+ targ_extra_ofiles="deffilep.o pep-dll-aarch64.o pe-dll.o"
;;
alpha*-*-freebsd* | alpha*-*-kfreebsd*-gnu)
targ_emul=elf64alpha_fbsd
diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em
index e20339fa874..e5cc15723a4 100644
--- a/ld/emultempl/pep.em
+++ b/ld/emultempl/pep.em
@@ -106,7 +106,7 @@ fragment <<EOF
#define PE_DEF_SECTION_ALIGNMENT ${OVERRIDE_SECTION_ALIGNMENT}
#endif
-#ifdef TARGET_IS_i386pep
+#if defined(TARGET_IS_i386pep) || defined(TARGET_IS_arm64pe)
#define DLL_SUPPORT
#endif
@@ -115,7 +115,7 @@ fragment <<EOF
| IMAGE_DLL_CHARACTERISTICS_HIGH_ENTROPY_VA \
| IMAGE_DLL_CHARACTERISTICS_NX_COMPAT)
-#if defined(TARGET_IS_i386pep) || ! defined(DLL_SUPPORT)
+#if defined(TARGET_IS_i386pep) || defined(TARGET_IS_arm64pe) || ! defined(DLL_SUPPORT)
#define PE_DEF_SUBSYSTEM 3
#undef NT_EXE_IMAGE_BASE
#define NT_EXE_IMAGE_BASE \
@@ -1195,6 +1195,7 @@ make_import_fixup (arelent *rel, asection *s, char *name, const char *symname)
else if (suc)
_addend = bfd_get_16 (s->owner, addend);
break;
+ case 26:
case 32:
suc = bfd_get_section_contents (s->owner, s, addend, rel->address, 4);
if (suc && rel->howto->pc_relative)
@@ -1541,14 +1542,14 @@ gld${EMULATION_NAME}_after_open (void)
if (pep_enable_stdcall_fixup) /* -1=warn or 1=enable */
pep_fixup_stdcalls ();
-#ifndef TARGET_IS_i386pep
+#if !defined(TARGET_IS_i386pep) && !defined(TARGET_IS_arm64pe)
if (bfd_link_pic (&link_info))
#else
if (!bfd_link_relocatable (&link_info))
#endif
pep_dll_build_sections (link_info.output_bfd, &link_info);
-#ifndef TARGET_IS_i386pep
+#if !defined(TARGET_IS_i386pep) && !defined(TARGET_IS_arm64pe)
else
pep_exe_build_sections (link_info.output_bfd, &link_info);
#endif
@@ -1844,6 +1845,8 @@ gld${EMULATION_NAME}_recognized_file (lang_input_statement_type *entry ATTRIBUTE
#ifdef DLL_SUPPORT
#ifdef TARGET_IS_i386pep
pep_dll_id_target ("pei-x86-64");
+#elif defined(TARGET_IS_arm64pe)
+ pep_dll_id_target ("pei-aarch64-little");
#endif
if (pep_bfd_is_dll (entry->the_bfd))
return pep_implied_import_dll (entry->filename);
diff --git a/ld/pe-dll.c b/ld/pe-dll.c
index df16e85bbe0..edfcda9cf16 100644
--- a/ld/pe-dll.c
+++ b/ld/pe-dll.c
@@ -2257,13 +2257,12 @@ static const unsigned char jmp_ix86_bytes[] =
0xff, 0x25, 0x00, 0x00, 0x00, 0x00, 0x90, 0x90
};
-/* _function:
- b <__imp_function>
- nop */
static const unsigned char jmp_aarch64_bytes[] =
{
- 0x00, 0x00, 0x00, 0x14,
- 0x1f, 0x20, 0x03, 0xD5
+ 0x10, 0x00, 0x00, 0x90, /* adrp x16, 0 */
+ 0x10, 0x02, 0x00, 0x91, /* add x16, x16, #0x0 */
+ 0x10, 0x02, 0x40, 0xf9, /* ldr x16, [x16] */
+ 0x00, 0x02, 0x1f, 0xd6 /* br x16 */
};
/* _function:
@@ -2431,7 +2430,8 @@ make_one (def_file_export *exp, bfd *parent, bool include_jmp_stub)
quick_reloc (abfd, 8, BFD_RELOC_32, 2);
break;
case PE_ARCH_aarch64:
- quick_reloc (abfd, 0, BFD_RELOC_AARCH64_JUMP26, 2);
+ quick_reloc (abfd, 0, BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL, 2);
+ quick_reloc (abfd, 4, BFD_RELOC_AARCH64_ADD_LO12, 2);
break;
default:
abort ();
diff --git a/ld/testsuite/ld-pe/pe-aarch64.d b/ld/testsuite/ld-pe/pe-aarch64.d
index fac02b5fd87..ab6370fb514 100644
--- a/ld/testsuite/ld-pe/pe-aarch64.d
+++ b/ld/testsuite/ld-pe/pe-aarch64.d
@@ -6,11 +6,20 @@
Disassembly of section .text:
-0000000140001000 <__rt_psrelocs_end>:
+0000000140001000 <___crt_xc_end__>:
140001000: d2800281 mov x1, #0x14 // #20
140001004: 14000001 b 140001008 <foo>
0000000140001008 <foo>:
140001008: d65f03c0 ret
14000100c: 00000000 udf #0
-#...
+
+0000000140001010 <__CTOR_LIST__>:
+ 140001010: ffffffff .inst 0xffffffff ; undefined
+ 140001014: ffffffff .inst 0xffffffff ; undefined
+ ...
+
+0000000140001020 <__DTOR_LIST__>:
+ 140001020: ffffffff .inst 0xffffffff ; undefined
+ 140001024: ffffffff .inst 0xffffffff ; undefined
+ ...
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index 83b20d0da45..58158cc657d 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -78,7 +78,7 @@ if {[istarget i*86-*-cygwin*]
run_ld_link_tests $pe_tests
}
-if {[istarget "aarch64-*-pe*"]} {
+if {[istarget "aarch64-*-pe*"] || [istarget "aarch64-*-mingw*"]} {
run_dump_test "pe-aarch64"
set pe_tests {
diff --git a/ld/testsuite/ld-scripts/weak.exp b/ld/testsuite/ld-scripts/weak.exp
index 68d70240f7b..2826e3bee78 100644
--- a/ld/testsuite/ld-scripts/weak.exp
+++ b/ld/testsuite/ld-scripts/weak.exp
@@ -31,6 +31,7 @@ if {! [is_elf_format] && ! [is_pecoff_format]} {
# Weak symbols are broken for most PE targets.
if {! [istarget i?86-*-*] && ! [istarget sh-*-*]} {
setup_xfail *-*-pe*
+ setup_xfail *-*-mingw*
}
# hppa64 is incredibly broken
--
2.37.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH 8/8] gas: Restore tc_pe_dwarf2_emit_offset for pe-aarch64
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
` (5 preceding siblings ...)
2022-12-30 2:40 ` [PATCH 7/8] Add aarch64-w64-mingw32 target Mark Harmstone
@ 2022-12-30 2:40 ` Mark Harmstone
2023-01-03 11:54 ` [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Nick Clifton
2023-01-03 11:59 ` NightStrike
8 siblings, 0 replies; 34+ messages in thread
From: Mark Harmstone @ 2022-12-30 2:40 UTC (permalink / raw)
To: wej22007, zac.walker, tamar.christina, binutils; +Cc: Mark Harmstone
---
gas/config/tc-aarch64.c | 11 +++++++++++
gas/config/tc-aarch64.h | 5 +++++
2 files changed, 16 insertions(+)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index a72b96ffca7..233a709f370 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2116,6 +2116,17 @@ s_secrel (int dummy ATTRIBUTE_UNUSED)
input_line_pointer--;
demand_empty_rest_of_line ();
}
+
+void
+tc_pe_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
+{
+ expressionS exp;
+
+ exp.X_op = O_secrel;
+ exp.X_add_symbol = symbol;
+ exp.X_add_number = 0;
+ emit_expr (&exp, size);
+}
#endif /* TE_PE */
static void s_aarch64_arch (int);
diff --git a/gas/config/tc-aarch64.h b/gas/config/tc-aarch64.h
index 5f82dd23824..0bf83f7618d 100644
--- a/gas/config/tc-aarch64.h
+++ b/gas/config/tc-aarch64.h
@@ -315,7 +315,12 @@ extern int tc_aarch64_regname_to_dw2regnum (char *regname);
extern void tc_aarch64_frame_initial_instructions (void);
#ifdef TE_PE
+
#define O_secrel O_md1
+
+#define TC_DWARF2_EMIT_OFFSET tc_pe_dwarf2_emit_offset
+void tc_pe_dwarf2_emit_offset (symbolS *, unsigned int);
+
#endif /* TE_PE */
#endif /* TC_AARCH64 */
--
2.37.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
` (6 preceding siblings ...)
2022-12-30 2:40 ` [PATCH 8/8] gas: Restore tc_pe_dwarf2_emit_offset for pe-aarch64 Mark Harmstone
@ 2023-01-03 11:54 ` Nick Clifton
2023-01-03 11:59 ` NightStrike
8 siblings, 0 replies; 34+ messages in thread
From: Nick Clifton @ 2023-01-03 11:54 UTC (permalink / raw)
To: Mark Harmstone, wej22007, zac.walker, tamar.christina, binutils
Hi Mark,
> * The aarch64pe emulation target is renamed to arm64pe. This is the name
> that LLVM is already using, even though as a rule we call this arch aarch64.
> Without this clang won't work with ld. Another possibility would be to
> change the -m parameter if it's "arm64", but that seems to me like it's
> making things more complicated than they need to be.
Agreed - but I think that you need to add a comment to arm64pe.sh explaining
why that name has been chosen. This should prevent future users from submitting
bug reports asking for it to be changed back...
Patch series approved - please apply - mainline only.
Cheers
Nick
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
` (7 preceding siblings ...)
2023-01-03 11:54 ` [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Nick Clifton
@ 2023-01-03 11:59 ` NightStrike
2023-01-03 12:09 ` Tamar Christina
2023-01-03 12:53 ` Martin Storsjö
8 siblings, 2 replies; 34+ messages in thread
From: NightStrike @ 2023-01-03 11:59 UTC (permalink / raw)
To: Mark Harmstone; +Cc: wej22007, zac.walker, tamar.christina, binutils
[-- Attachment #1: Type: text/plain, Size: 526 bytes --]
On Thu, Dec 29, 2022, 21:41 Mark Harmstone <mark@harmstone.com> wrote:
> * The aarch64pe emulation target is renamed to arm64pe. This is the name
> that LLVM is already using, even though as a rule we call this arch
> aarch64.
> Without this clang won't work with ld. Another possibility would be to
> change the -m parameter if it's "arm64", but that seems to me like it's
> making things more complicated than they need to be.
>
Or just fix clang. Seems like if clang wants to work with ld, clang should
use ld's name.
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 11:59 ` NightStrike
@ 2023-01-03 12:09 ` Tamar Christina
2023-01-03 14:08 ` Richard Earnshaw
2023-01-03 12:53 ` Martin Storsjö
1 sibling, 1 reply; 34+ messages in thread
From: Tamar Christina @ 2023-01-03 12:09 UTC (permalink / raw)
To: NightStrike, Mark Harmstone; +Cc: wej22007, zac.walker, binutils, nickc
[-- Attachment #1: Type: text/plain, Size: 1475 bytes --]
Unfortunately I don’t think it’s that simple..
Sadly the name Arm64 is the one Microsoft has chosen to call their target ABI. https://learn.microsoft.com/en-us/windows/arm/overview Further this is extended to Arm64EC etc https://learn.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=msvc-170.
So even though this is not the official naming that Arm uses, it’s however the official one on Windows and so it’s
reasonable that the PE target in LD follow this.
So this is reasonable so long as the actual target itself stays aarch64-little.
Kind Regards,
Tamar
From: NightStrike <nightstrike@gmail.com>
Sent: Tuesday, January 3, 2023 12:00 PM
To: Mark Harmstone <mark@harmstone.com>
Cc: wej22007@outlook.com; zac.walker@linaro.org; Tamar Christina <Tamar.Christina@arm.com>; binutils <binutils@sourceware.org>
Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
On Thu, Dec 29, 2022, 21:41 Mark Harmstone <mark@harmstone.com<mailto:mark@harmstone.com>> wrote:
* The aarch64pe emulation target is renamed to arm64pe. This is the name
that LLVM is already using, even though as a rule we call this arch aarch64.
Without this clang won't work with ld. Another possibility would be to
change the -m parameter if it's "arm64", but that seems to me like it's
making things more complicated than they need to be.
Or just fix clang. Seems like if clang wants to work with ld, clang should use ld's name.
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 11:59 ` NightStrike
2023-01-03 12:09 ` Tamar Christina
@ 2023-01-03 12:53 ` Martin Storsjö
1 sibling, 0 replies; 34+ messages in thread
From: Martin Storsjö @ 2023-01-03 12:53 UTC (permalink / raw)
To: NightStrike
Cc: Mark Harmstone, wej22007, zac.walker, tamar.christina, binutils
On Tue, 3 Jan 2023, NightStrike via Binutils wrote:
> On Thu, Dec 29, 2022, 21:41 Mark Harmstone <mark@harmstone.com> wrote:
>
>> * The aarch64pe emulation target is renamed to arm64pe. This is the name
>> that LLVM is already using, even though as a rule we call this arch
>> aarch64.
>> Without this clang won't work with ld. Another possibility would be to
>> change the -m parameter if it's "arm64", but that seems to me like it's
>> making things more complicated than they need to be.
>>
>
> Or just fix clang. Seems like if clang wants to work with ld, clang should
> use ld's name.
When lld added the "arm64pe" target in the mingw mode of lld, 5 years ago,
there was no support for such a target in binutils ld. That support is
being added now.
Therefore - there was no reference for what to name this particular target
in the ld.bfd like interface mode - so I picked one name which seemed to
make sense for it - "arm64pe". Now when binutils is catching up 5 years
later, I think it's courteous to go along with the name that was picked
within lld for this mode.
// Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 12:09 ` Tamar Christina
@ 2023-01-03 14:08 ` Richard Earnshaw
2023-01-03 14:13 ` Martin Storsjö
2023-01-03 14:14 ` Tamar Christina
0 siblings, 2 replies; 34+ messages in thread
From: Richard Earnshaw @ 2023-01-03 14:08 UTC (permalink / raw)
To: Tamar Christina, NightStrike, Mark Harmstone
Cc: wej22007, zac.walker, binutils, nickc
On 03/01/2023 12:09, Tamar Christina via Binutils wrote:
> Unfortunately I don’t think it’s that simple..
>
> Sadly the name Arm64 is the one Microsoft has chosen to call their target ABI. https://learn.microsoft.com/en-us/windows/arm/overview Further this is extended to Arm64EC etc https://learn.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=msvc-170.
>
> So even though this is not the official naming that Arm uses, it’s however the official one on Windows and so it’s
> reasonable that the PE target in LD follow this.
>
> So this is reasonable so long as the actual target itself stays aarch64-little.
>
> Kind Regards,
> Tamar
>
> From: NightStrike <nightstrike@gmail.com>
> Sent: Tuesday, January 3, 2023 12:00 PM
> To: Mark Harmstone <mark@harmstone.com>
> Cc: wej22007@outlook.com; zac.walker@linaro.org; Tamar Christina <Tamar.Christina@arm.com>; binutils <binutils@sourceware.org>
> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>
>
> On Thu, Dec 29, 2022, 21:41 Mark Harmstone <mark@harmstone.com<mailto:mark@harmstone.com>> wrote:
> * The aarch64pe emulation target is renamed to arm64pe. This is the name
> that LLVM is already using, even though as a rule we call this arch aarch64.
> Without this clang won't work with ld. Another possibility would be to
> change the -m parameter if it's "arm64", but that seems to me like it's
> making things more complicated than they need to be.
>
> Or just fix clang. Seems like if clang wants to work with ld, clang should use ld's name.
The problem with arm64 is that it also matches existing configure
scripts that use arm* for the 32-bit targets. I don't think this is a
good idea. GNU tools have consistently used the official name for all
targets.
R.
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 14:08 ` Richard Earnshaw
@ 2023-01-03 14:13 ` Martin Storsjö
2023-01-03 14:54 ` Tamar Christina
2023-01-03 14:14 ` Tamar Christina
1 sibling, 1 reply; 34+ messages in thread
From: Martin Storsjö @ 2023-01-03 14:13 UTC (permalink / raw)
To: Richard Earnshaw
Cc: Tamar Christina, NightStrike, Mark Harmstone, wej22007,
zac.walker, binutils, nickc
On Tue, 3 Jan 2023, Richard Earnshaw via Binutils wrote:
> The problem with arm64 is that it also matches existing configure scripts
> that use arm* for the 32-bit targets. I don't think this is a good idea.
> GNU tools have consistently used the official name for all targets.
This isn't for the name used in triples (which often are matched in
configure scripts etc), but used for the ld emulation mode - where the
current MinGW targets use the names "i386pe" for i386 and and "i386pep"
for x86_64. I don't believe it's common to match those emulation names in
configure scripts - these names are mostly a detail between how the
compiler driver invokes the linker, and the linker itself.
// Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 14:08 ` Richard Earnshaw
2023-01-03 14:13 ` Martin Storsjö
@ 2023-01-03 14:14 ` Tamar Christina
1 sibling, 0 replies; 34+ messages in thread
From: Tamar Christina @ 2023-01-03 14:14 UTC (permalink / raw)
To: Richard Earnshaw, NightStrike, Mark Harmstone
Cc: wej22007, zac.walker, binutils, nickc
> -----Original Message-----
> From: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
> Sent: Tuesday, January 3, 2023 2:09 PM
> To: Tamar Christina <Tamar.Christina@arm.com>; NightStrike
> <nightstrike@gmail.com>; Mark Harmstone <mark@harmstone.com>
> Cc: wej22007@outlook.com; zac.walker@linaro.org; binutils
> <binutils@sourceware.org>; nickc@redhat.com
> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>
> On 03/01/2023 12:09, Tamar Christina via Binutils wrote:
> > Unfortunately I don’t think it’s that simple..
> >
> > Sadly the name Arm64 is the one Microsoft has chosen to call their target
> ABI. https://learn.microsoft.com/en-us/windows/arm/overview Further
> this is extended to Arm64EC etc https://learn.microsoft.com/en-
> us/cpp/build/arm64-windows-abi-conventions?view=msvc-170.
> >
> > So even though this is not the official naming that Arm uses, it’s
> > however the official one on Windows and so it’s reasonable that the PE
> target in LD follow this.
> >
> > So this is reasonable so long as the actual target itself stays aarch64-little.
> >
> > Kind Regards,
> > Tamar
> >
> > From: NightStrike <nightstrike@gmail.com>
> > Sent: Tuesday, January 3, 2023 12:00 PM
> > To: Mark Harmstone <mark@harmstone.com>
> > Cc: wej22007@outlook.com; zac.walker@linaro.org; Tamar Christina
> > <Tamar.Christina@arm.com>; binutils <binutils@sourceware.org>
> > Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to
> > arm64pe
> >
> >
> > On Thu, Dec 29, 2022, 21:41 Mark Harmstone
> <mark@harmstone.com<mailto:mark@harmstone.com>> wrote:
> > * The aarch64pe emulation target is renamed to arm64pe. This is the
> > name that LLVM is already using, even though as a rule we call this arch
> aarch64.
> > Without this clang won't work with ld. Another possibility would be to
> > change the -m parameter if it's "arm64", but that seems to me like
> > it's making things more complicated than they need to be.
> >
> > Or just fix clang. Seems like if clang wants to work with ld, clang should use
> ld's name.
>
> The problem with arm64 is that it also matches existing configure scripts that
> use arm* for the 32-bit targets. I don't think this is a good idea. GNU tools
> have consistently used the official name for all targets.
>
But the proposal here isn't to rename the target itself to arm64, only the emulation name.
I.e. only when you explicitly use -m, The target itself stays aarch64-* so this shouldn't break any
configure though. But it will at least be consistent with the existing platform tools, of which binutils
is the last to the party.
Regards,
Tamar
> R.
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 14:13 ` Martin Storsjö
@ 2023-01-03 14:54 ` Tamar Christina
2023-01-03 15:51 ` Martin Storsjö
2023-01-03 18:21 ` Mark Harmstone
0 siblings, 2 replies; 34+ messages in thread
From: Tamar Christina @ 2023-01-03 14:54 UTC (permalink / raw)
To: Martin Storsjö, Richard Earnshaw
Cc: NightStrike, Mark Harmstone, wej22007, zac.walker, binutils, nickc
Hi All,
After some discussions, we would prefer if instead of renaming actual emul target
(which also renamed the internal macros) that we provide a `targ_emul_alias` or similar
instead. This would allow us to keep the current naming as is, while still supporting the
the emul as supported by clang.
This would be similar to the already existing targ_alias which is used to alias the target
triples.
I believe (from a quick look) that this should all be do-able by modifying configure.ac in a
similar way as targ_extra_emuls currently does.
Thanks,
Tamar
> -----Original Message-----
> From: Martin Storsjö <martin@martin.st>
> Sent: Tuesday, January 3, 2023 2:14 PM
> To: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
> Cc: Tamar Christina <Tamar.Christina@arm.com>; NightStrike
> <nightstrike@gmail.com>; Mark Harmstone <mark@harmstone.com>;
> wej22007@outlook.com; zac.walker@linaro.org; binutils
> <binutils@sourceware.org>; nickc@redhat.com
> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>
> On Tue, 3 Jan 2023, Richard Earnshaw via Binutils wrote:
>
> > The problem with arm64 is that it also matches existing configure
> > scripts that use arm* for the 32-bit targets. I don't think this is a good idea.
> > GNU tools have consistently used the official name for all targets.
>
> This isn't for the name used in triples (which often are matched in configure
> scripts etc), but used for the ld emulation mode - where the current MinGW
> targets use the names "i386pe" for i386 and and "i386pep"
> for x86_64. I don't believe it's common to match those emulation names in
> configure scripts - these names are mostly a detail between how the
> compiler driver invokes the linker, and the linker itself.
>
> // Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 14:54 ` Tamar Christina
@ 2023-01-03 15:51 ` Martin Storsjö
2023-01-03 15:57 ` Tamar Christina
2023-01-03 18:21 ` Mark Harmstone
1 sibling, 1 reply; 34+ messages in thread
From: Martin Storsjö @ 2023-01-03 15:51 UTC (permalink / raw)
To: Tamar Christina
Cc: Richard Earnshaw, NightStrike, Mark Harmstone, wej22007,
zac.walker, binutils, nickc
On Tue, 3 Jan 2023, Tamar Christina wrote:
> Hi All,
>
> After some discussions, we would prefer if instead of renaming actual emul target
> (which also renamed the internal macros) that we provide a `targ_emul_alias` or similar
> instead. This would allow us to keep the current naming as is, while still supporting the
> the emul as supported by clang.
>
> This would be similar to the already existing targ_alias which is used to alias the target
> triples.
>
> I believe (from a quick look) that this should all be do-able by modifying configure.ac in a
> similar way as targ_extra_emuls currently does.
Sure, that sounds reasonable to me, too.
IIRC there were some earlier aarch64pe code in binutils, for EFI usecases
- did that rely on keeping this name too?
// Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 15:51 ` Martin Storsjö
@ 2023-01-03 15:57 ` Tamar Christina
0 siblings, 0 replies; 34+ messages in thread
From: Tamar Christina @ 2023-01-03 15:57 UTC (permalink / raw)
To: Martin Storsjö
Cc: Richard Earnshaw, NightStrike, Mark Harmstone, wej22007,
zac.walker, binutils, nickc
> -----Original Message-----
> From: Martin Storsjö <martin@martin.st>
> Sent: Tuesday, January 3, 2023 3:51 PM
> To: Tamar Christina <Tamar.Christina@arm.com>
> Cc: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>; NightStrike
> <nightstrike@gmail.com>; Mark Harmstone <mark@harmstone.com>;
> wej22007@outlook.com; zac.walker@linaro.org; binutils
> <binutils@sourceware.org>; nickc@redhat.com
> Subject: RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>
> On Tue, 3 Jan 2023, Tamar Christina wrote:
>
> > Hi All,
> >
> > After some discussions, we would prefer if instead of renaming actual
> > emul target (which also renamed the internal macros) that we provide a
> > `targ_emul_alias` or similar instead. This would allow us to keep the
> > current naming as is, while still supporting the the emul as supported by
> clang.
> >
> > This would be similar to the already existing targ_alias which is used
> > to alias the target triples.
> >
> > I believe (from a quick look) that this should all be do-able by
> > modifying configure.ac in a similar way as targ_extra_emuls currently does.
>
> Sure, that sounds reasonable to me, too.
>
> IIRC there were some earlier aarch64pe code in binutils, for EFI usecases
> - did that rely on keeping this name too?
>
No, that relies on the target name, i.e. `aarch64-little`. There's some mapping code in
objcopy that maps the pseudo -efi targets to the physical targets.
Cheers,
Tamar
> // Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 14:54 ` Tamar Christina
2023-01-03 15:51 ` Martin Storsjö
@ 2023-01-03 18:21 ` Mark Harmstone
2023-01-03 18:33 ` Andrew Pinski
1 sibling, 1 reply; 34+ messages in thread
From: Mark Harmstone @ 2023-01-03 18:21 UTC (permalink / raw)
To: Tamar Christina, Martin Storsjö, Richard Earnshaw
Cc: NightStrike, wej22007, zac.walker, binutils, nickc
Hi Tamar,
Is there any practical benefit to this? The emulation "aarch64pe" hasn't yet been seen in a released version of binutils, so it's not that anybody's relying on it. Giving the emulation a different name from LLVM, then adding a workaround so that LLVM still works, seems like it's adding unneeded complexity. Plus it also implies that someone will also have to patch LLVM to add a workaround the other way round.
It's not like there's any consistency in the emulation naming as it is, as `ld -m help` will show you. Of the ELF emulations, some have "elf" at the beginning, some at the end, some have "elf32" or "elf64", others (presumably) have it implicit, some have underscores, some don't...
Mark
On 3/1/23 14:54, Tamar Christina wrote:
> Hi All,
>
> After some discussions, we would prefer if instead of renaming actual emul target
> (which also renamed the internal macros) that we provide a `targ_emul_alias` or similar
> instead. This would allow us to keep the current naming as is, while still supporting the
> the emul as supported by clang.
>
> This would be similar to the already existing targ_alias which is used to alias the target
> triples.
>
> I believe (from a quick look) that this should all be do-able by modifying configure.ac in a
> similar way as targ_extra_emuls currently does.
>
> Thanks,
> Tamar
>
>> -----Original Message-----
>> From: Martin Storsjö <martin@martin.st>
>> Sent: Tuesday, January 3, 2023 2:14 PM
>> To: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
>> Cc: Tamar Christina <Tamar.Christina@arm.com>; NightStrike
>> <nightstrike@gmail.com>; Mark Harmstone <mark@harmstone.com>;
>> wej22007@outlook.com; zac.walker@linaro.org; binutils
>> <binutils@sourceware.org>; nickc@redhat.com
>> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>>
>> On Tue, 3 Jan 2023, Richard Earnshaw via Binutils wrote:
>>
>>> The problem with arm64 is that it also matches existing configure
>>> scripts that use arm* for the 32-bit targets. I don't think this is a good idea.
>>> GNU tools have consistently used the official name for all targets.
>> This isn't for the name used in triples (which often are matched in configure
>> scripts etc), but used for the ld emulation mode - where the current MinGW
>> targets use the names "i386pe" for i386 and and "i386pep"
>> for x86_64. I don't believe it's common to match those emulation names in
>> configure scripts - these names are mostly a detail between how the
>> compiler driver invokes the linker, and the linker itself.
>>
>> // Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 18:21 ` Mark Harmstone
@ 2023-01-03 18:33 ` Andrew Pinski
2023-01-03 19:07 ` Mark Harmstone
2023-01-03 19:41 ` Tamar Christina
0 siblings, 2 replies; 34+ messages in thread
From: Andrew Pinski @ 2023-01-03 18:33 UTC (permalink / raw)
To: Mark Harmstone
Cc: Tamar Christina, Martin Storsjö,
Richard Earnshaw, NightStrike, wej22007, zac.walker, binutils,
nickc
On Tue, Jan 3, 2023 at 10:21 AM Mark Harmstone <mark@harmstone.com> wrote:
>
> Hi Tamar,
>
> Is there any practical benefit to this? The emulation "aarch64pe" hasn't yet been seen in a released version of binutils, so it's not that anybody's relying on it. Giving the emulation a different name from LLVM, then adding a workaround so that LLVM still works, seems like it's adding unneeded complexity. Plus it also implies that someone will also have to patch LLVM to add a workaround the other way round.
>
> It's not like there's any consistency in the emulation naming as it is, as `ld -m help` will show you. Of the ELF emulations, some have "elf" at the beginning, some at the end, some have "elf32" or "elf64", others (presumably) have it implicit, some have underscores, some don't...
My thoughts. arm64 has always been a bad name and should not be
referenced anywhere. It is bad that Microsoft and LLVM folks have
started using it.
We should be consistent with the elf targets here and use aarch64pe
and then add an alias just for compatibility reasons with LLVM.
We should push LLVM folks to the same and everyone over to aarch64
instead of arm64.
Thanks,
Andrew Pinski
>
> Mark
>
> On 3/1/23 14:54, Tamar Christina wrote:
> > Hi All,
> >
> > After some discussions, we would prefer if instead of renaming actual emul target
> > (which also renamed the internal macros) that we provide a `targ_emul_alias` or similar
> > instead. This would allow us to keep the current naming as is, while still supporting the
> > the emul as supported by clang.
> >
> > This would be similar to the already existing targ_alias which is used to alias the target
> > triples.
> >
> > I believe (from a quick look) that this should all be do-able by modifying configure.ac in a
> > similar way as targ_extra_emuls currently does.
> >
> > Thanks,
> > Tamar
> >
> >> -----Original Message-----
> >> From: Martin Storsjö <martin@martin.st>
> >> Sent: Tuesday, January 3, 2023 2:14 PM
> >> To: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
> >> Cc: Tamar Christina <Tamar.Christina@arm.com>; NightStrike
> >> <nightstrike@gmail.com>; Mark Harmstone <mark@harmstone.com>;
> >> wej22007@outlook.com; zac.walker@linaro.org; binutils
> >> <binutils@sourceware.org>; nickc@redhat.com
> >> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
> >>
> >> On Tue, 3 Jan 2023, Richard Earnshaw via Binutils wrote:
> >>
> >>> The problem with arm64 is that it also matches existing configure
> >>> scripts that use arm* for the 32-bit targets. I don't think this is a good idea.
> >>> GNU tools have consistently used the official name for all targets.
> >> This isn't for the name used in triples (which often are matched in configure
> >> scripts etc), but used for the ld emulation mode - where the current MinGW
> >> targets use the names "i386pe" for i386 and and "i386pep"
> >> for x86_64. I don't believe it's common to match those emulation names in
> >> configure scripts - these names are mostly a detail between how the
> >> compiler driver invokes the linker, and the linker itself.
> >>
> >> // Martin
>
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 18:33 ` Andrew Pinski
@ 2023-01-03 19:07 ` Mark Harmstone
2023-01-03 19:41 ` Tamar Christina
1 sibling, 0 replies; 34+ messages in thread
From: Mark Harmstone @ 2023-01-03 19:07 UTC (permalink / raw)
To: Andrew Pinski
Cc: Tamar Christina, Martin Storsjö,
Richard Earnshaw, NightStrike, wej22007, zac.walker, binutils,
nickc
On 3/1/23 18:33, Andrew Pinski wrote:
> My thoughts. arm64 has always been a bad name and should not be
> referenced anywhere. It is bad that Microsoft and LLVM folks have
> started using it.
> We should be consistent with the elf targets here and use aarch64pe
> and then add an alias just for compatibility reasons with LLVM.
> We should push LLVM folks to the same and everyone over to aarch64
> instead of arm64.
>
> Thanks,
> Andrew Pinski
What would this achieve? To reiterate, this is a string that the compiler passes to the linker. Users wouldn't ever see it unless they're doing some pretty low-level stuff.
I agree with Nick's suggestion, that we keep the patch as it is but add a comment explaining the name to anyone curious. Simplicity is a more important engineering principle than consistency... particularly when the naming scheme isn't consistent anyway.
Mark
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 18:33 ` Andrew Pinski
2023-01-03 19:07 ` Mark Harmstone
@ 2023-01-03 19:41 ` Tamar Christina
2023-01-03 20:05 ` Martin Storsjö
1 sibling, 1 reply; 34+ messages in thread
From: Tamar Christina @ 2023-01-03 19:41 UTC (permalink / raw)
To: Andrew Pinski, Mark Harmstone
Cc: Martin Storsjö,
Richard Earnshaw, NightStrike, wej22007, zac.walker, binutils,
nickc
Hi Mark,
> On Tue, Jan 3, 2023 at 10:21 AM Mark Harmstone <mark@harmstone.com>
> wrote:
> >
> > Hi Tamar,
> >
> > Is there any practical benefit to this? The emulation "aarch64pe" hasn't yet
> been seen in a released version of binutils, so it's not that anybody's relying
> on it. Giving the emulation a different name from LLVM, then adding a
> workaround so that LLVM still works, seems like it's adding unneeded
> complexity. Plus it also implies that someone will also have to patch LLVM to
> add a workaround the other way round.
The reason for insisting on this change is non-technical in nature. For a project such
as binutils we always want the primary name to reflect what the architecture calls things.
As a matter of compatibility with other projects we can on top of that accept aliases.
I don't think we'll need to patch LLVM as you typically don't specify the emulation when
using ld. Most projects that want cross toolchain support lookup the documentation where
we can explicitly point out that the alias is there for compatibility with other toolchains.
Kind Regards,
Tamar
> >
> > It's not like there's any consistency in the emulation naming as it is, as `ld -m
> help` will show you. Of the ELF emulations, some have "elf" at the beginning,
> some at the end, some have "elf32" or "elf64", others (presumably) have it
> implicit, some have underscores, some don't...
>
> My thoughts. arm64 has always been a bad name and should not be
> referenced anywhere. It is bad that Microsoft and LLVM folks have started
> using it.
> We should be consistent with the elf targets here and use aarch64pe and
> then add an alias just for compatibility reasons with LLVM.
> We should push LLVM folks to the same and everyone over to aarch64
> instead of arm64.
>
> Thanks,
> Andrew Pinski
>
> >
> > Mark
> >
> > On 3/1/23 14:54, Tamar Christina wrote:
> > > Hi All,
> > >
> > > After some discussions, we would prefer if instead of renaming
> > > actual emul target (which also renamed the internal macros) that we
> > > provide a `targ_emul_alias` or similar instead. This would allow us
> > > to keep the current naming as is, while still supporting the the emul as
> supported by clang.
> > >
> > > This would be similar to the already existing targ_alias which is
> > > used to alias the target triples.
> > >
> > > I believe (from a quick look) that this should all be do-able by
> > > modifying configure.ac in a similar way as targ_extra_emuls currently
> does.
> > >
> > > Thanks,
> > > Tamar
> > >
> > >> -----Original Message-----
> > >> From: Martin Storsjö <martin@martin.st>
> > >> Sent: Tuesday, January 3, 2023 2:14 PM
> > >> To: Richard Earnshaw <Richard.Earnshaw@foss.arm.com>
> > >> Cc: Tamar Christina <Tamar.Christina@arm.com>; NightStrike
> > >> <nightstrike@gmail.com>; Mark Harmstone <mark@harmstone.com>;
> > >> wej22007@outlook.com; zac.walker@linaro.org; binutils
> > >> <binutils@sourceware.org>; nickc@redhat.com
> > >> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to
> > >> arm64pe
> > >>
> > >> On Tue, 3 Jan 2023, Richard Earnshaw via Binutils wrote:
> > >>
> > >>> The problem with arm64 is that it also matches existing configure
> > >>> scripts that use arm* for the 32-bit targets. I don't think this is a good
> idea.
> > >>> GNU tools have consistently used the official name for all targets.
> > >> This isn't for the name used in triples (which often are matched in
> > >> configure scripts etc), but used for the ld emulation mode - where
> > >> the current MinGW targets use the names "i386pe" for i386 and and
> "i386pep"
> > >> for x86_64. I don't believe it's common to match those emulation
> > >> names in configure scripts - these names are mostly a detail
> > >> between how the compiler driver invokes the linker, and the linker
> itself.
> > >>
> > >> // Martin
> >
> >
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 19:41 ` Tamar Christina
@ 2023-01-03 20:05 ` Martin Storsjö
2023-01-04 2:38 ` Mark Harmstone
0 siblings, 1 reply; 34+ messages in thread
From: Martin Storsjö @ 2023-01-03 20:05 UTC (permalink / raw)
To: Tamar Christina
Cc: Andrew Pinski, Mark Harmstone, Richard Earnshaw, NightStrike,
wej22007, zac.walker, binutils, nickc
On Tue, 3 Jan 2023, Tamar Christina wrote:
> I don't think we'll need to patch LLVM as you typically don't specify
> the emulation when using ld.
When cross compiling, then the compiler driver (gcc or clang) will specify
it.
> Most projects that want cross toolchain support lookup the documentation
> where we can explicitly point out that the alias is there for
> compatibility with other toolchains.
Currently, in mingw scenarios, you can have gcc call ld.bfd or ld.lld, and
you can have clang call either ld.bfd or ld.lld.
Currently clang calls the linker with "-m arm64pe" and ld.lld recognizes
and handles that same option. If clang calls ld.bfd, then ld.bfd also
needs to recognize "-m arm64pe".
If gcc decides to go with a different option name than "-m arm64pe", then
ld.lld will also need to add support for that specific option spelling,
for the gcc+ld.lld combination to work.
Therefore, this just adds an entirely unnecessary split of the option
names - why not just stick with the current option name which is in active
use?
// Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-03 20:05 ` Martin Storsjö
@ 2023-01-04 2:38 ` Mark Harmstone
2023-01-04 9:51 ` Nick Clifton
0 siblings, 1 reply; 34+ messages in thread
From: Mark Harmstone @ 2023-01-04 2:38 UTC (permalink / raw)
To: Martin Storsjö, Tamar Christina
Cc: Andrew Pinski, Richard Earnshaw, NightStrike, wej22007,
zac.walker, binutils, nickc
On 3/1/23 20:05, Martin Storsjö wrote:
> On Tue, 3 Jan 2023, Tamar Christina wrote:
>
>> I don't think we'll need to patch LLVM as you typically don't specify the emulation when using ld.
>
> When cross compiling, then the compiler driver (gcc or clang) will specify it.
I'm not 100%, but I'm fairly sure that GCC *always* passes the emulation name to ld.
> On Tue, 3 Jan 2023, Tamar Christina wrote:
>
> The reason for insisting on this change is non-technical in nature. For a project such as binutils we always want the primary name to reflect what the architecture calls things.
Which, while valid, is obviously not important enough to warrant adding unneeded complexity. And ARM Ltd. has at the very least acquiesced in the naming of the architecture as ARM64: see https://developer.arm.com/documentation/102474/0100/Fundamentals-of-Armv8-Neon-technology, "GNU and Linux documentation sometimes refers to AArch64 as ARM64". Or Microsoft's "PE Format" page, which is an official part of the UEFI specification, which uses "ARM64" throughout. And that's before we get to the fact that the corresponding "aarch32" seems to be used hardly anywhere.
It's also worth pointing out that there's no concept of emulation aliases at the moment, so someone would have to develop and test that. And having 300+ emulations, and an alias for just one, seems a little perverse.
Nick, what do you want me to do here?
Mark
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 2:38 ` Mark Harmstone
@ 2023-01-04 9:51 ` Nick Clifton
2023-01-04 10:25 ` Martin Storsjö
0 siblings, 1 reply; 34+ messages in thread
From: Nick Clifton @ 2023-01-04 9:51 UTC (permalink / raw)
To: Mark Harmstone, Martin Storsjö, Tamar Christina
Cc: Andrew Pinski, Richard Earnshaw, NightStrike, wej22007,
zac.walker, binutils
Hi Guys,
> Nick, what do you want me to do here?
Well I still like simplicity, but in this case it seems that we need
to be little more accommodating.
> It's also worth pointing out that there's no concept of emulation aliases at the moment, so someone would have to develop and test that.
Do we actually need an alias ? Can't we just have arm64pe be an
extra emulation for the aarch64-*-pe target, along with the default
aarch64pe emulation ?
This would create duplicated code sure, but not too much, and it
would allow the linker to be compatible with Clang whilst still
also retaining the aarch64 moniker preferred by ARM.
Cheers
Nick
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 9:51 ` Nick Clifton
@ 2023-01-04 10:25 ` Martin Storsjö
2023-01-04 10:35 ` Tamar Christina
0 siblings, 1 reply; 34+ messages in thread
From: Martin Storsjö @ 2023-01-04 10:25 UTC (permalink / raw)
To: Nick Clifton
Cc: Mark Harmstone, Tamar Christina, Andrew Pinski, Richard Earnshaw,
NightStrike, wej22007, zac.walker, binutils
On Wed, 4 Jan 2023, Nick Clifton wrote:
> This would create duplicated code sure, but not too much, and it
> would allow the linker to be compatible with Clang whilst still
> also retaining the aarch64 moniker preferred by ARM.
As this still is framed as "compatible with Clang" - does this mean that
you still insist that GCC should use a different emulation name when
calling the linker, than what Clang does, forcing lld to also start
recognizing that new, different emulation name - different from the one
that has been in place for 5 years?
// Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 10:25 ` Martin Storsjö
@ 2023-01-04 10:35 ` Tamar Christina
2023-01-04 11:00 ` Martin Storsjö
0 siblings, 1 reply; 34+ messages in thread
From: Tamar Christina @ 2023-01-04 10:35 UTC (permalink / raw)
To: Martin Storsjö, nickc
Cc: Mark Harmstone, Andrew Pinski, Richard Earnshaw, NightStrike,
wej22007, zac.walker, binutils
> -----Original Message-----
> From: Martin Storsjö <martin@martin.st>
> Sent: Wednesday, January 4, 2023 10:25 AM
> To: nickc@redhat.com
> Cc: Mark Harmstone <mark@harmstone.com>; Tamar Christina
> <Tamar.Christina@arm.com>; Andrew Pinski <pinskia@gmail.com>; Richard
> Earnshaw <Richard.Earnshaw@foss.arm.com>; NightStrike
> <nightstrike@gmail.com>; wej22007@outlook.com; zac.walker@linaro.org;
> binutils <binutils@sourceware.org>
> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>
> On Wed, 4 Jan 2023, Nick Clifton wrote:
>
> > This would create duplicated code sure, but not too much, and it would
> > allow the linker to be compatible with Clang whilst still also
> > retaining the aarch64 moniker preferred by ARM.
>
> As this still is framed as "compatible with Clang" - does this mean that you still
> insist that GCC should use a different emulation name when calling the
> linker, than what Clang does, forcing lld to also start recognizing that new,
> different emulation name - different from the one that has been in place for
> 5 years?
To be clear, GCC will very likely reject any port upstreaming that uses Arm64
for the same reason. And GCC is a lot more tightly controlled. At least if you
want upstream support.
Believe it or not I'm actually trying to help you here, the fact that clang has
called it arm64 is why we want to allow the alias. As I mentioned before, it
just can't be the main name.
Tamar
>
> // Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 10:35 ` Tamar Christina
@ 2023-01-04 11:00 ` Martin Storsjö
2023-01-04 11:08 ` Tamar Christina
0 siblings, 1 reply; 34+ messages in thread
From: Martin Storsjö @ 2023-01-04 11:00 UTC (permalink / raw)
To: Tamar Christina
Cc: nickc, Mark Harmstone, Andrew Pinski, Richard Earnshaw,
NightStrike, wej22007, zac.walker, binutils
[-- Attachment #1: Type: text/plain, Size: 2074 bytes --]
On Wed, 4 Jan 2023, Tamar Christina wrote:
>> -----Original Message-----
>> From: Martin Storsjö <martin@martin.st>
>> Sent: Wednesday, January 4, 2023 10:25 AM
>> To: nickc@redhat.com
>> Cc: Mark Harmstone <mark@harmstone.com>; Tamar Christina
>> <Tamar.Christina@arm.com>; Andrew Pinski <pinskia@gmail.com>; Richard
>> Earnshaw <Richard.Earnshaw@foss.arm.com>; NightStrike
>> <nightstrike@gmail.com>; wej22007@outlook.com; zac.walker@linaro.org;
>> binutils <binutils@sourceware.org>
>> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>>
>> On Wed, 4 Jan 2023, Nick Clifton wrote:
>>
>>> This would create duplicated code sure, but not too much, and it would
>>> allow the linker to be compatible with Clang whilst still also
>>> retaining the aarch64 moniker preferred by ARM.
>>
>> As this still is framed as "compatible with Clang" - does this mean that you still
>> insist that GCC should use a different emulation name when calling the
>> linker, than what Clang does, forcing lld to also start recognizing that new,
>> different emulation name - different from the one that has been in place for
>> 5 years?
>
> To be clear, GCC will very likely reject any port upstreaming that uses
> Arm64 for the same reason. And GCC is a lot more tightly controlled.
> At least if you want upstream support.
>
> Believe it or not I'm actually trying to help you here, the fact that
> clang has called it arm64 is why we want to allow the alias. As I
> mentioned before, it just can't be the main name.
Right - but in the case of GCC, it wouldn't be the name of a new port - it
would only be a single word in a file for passing linker arguments. Just
like how "-m i386pep" is passed for x86_64 today here:
https://github.com/gcc-mirror/gcc/blob/345dffd0d4ebff7e705dfff1a8a72017a167120a/gcc/config/i386/mingw-w64.h#L74
So regardless of the binutils discussion, are you saying that GCC would
reject a patch that adds such an occurance that would pass "-m arm64pe",
in a patch that otherwise consistently calls the port "aarch64"?
// Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 11:00 ` Martin Storsjö
@ 2023-01-04 11:08 ` Tamar Christina
2023-01-04 11:36 ` Martin Storsjö
0 siblings, 1 reply; 34+ messages in thread
From: Tamar Christina @ 2023-01-04 11:08 UTC (permalink / raw)
To: Martin Storsjö
Cc: nickc, Mark Harmstone, Andrew Pinski, Richard Earnshaw,
NightStrike, wej22007, zac.walker, binutils
> -----Original Message-----
> From: Martin Storsjö <martin@martin.st>
> Sent: Wednesday, January 4, 2023 11:00 AM
> To: Tamar Christina <Tamar.Christina@arm.com>
> Cc: nickc@redhat.com; Mark Harmstone <mark@harmstone.com>; Andrew
> Pinski <pinskia@gmail.com>; Richard Earnshaw
> <Richard.Earnshaw@foss.arm.com>; NightStrike <nightstrike@gmail.com>;
> wej22007@outlook.com; zac.walker@linaro.org; binutils
> <binutils@sourceware.org>
> Subject: RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>
> On Wed, 4 Jan 2023, Tamar Christina wrote:
>
> >> -----Original Message-----
> >> From: Martin Storsj� <martin@martin.st>
> >> Sent: Wednesday, January 4, 2023 10:25 AM
> >> To: nickc@redhat.com
> >> Cc: Mark Harmstone <mark@harmstone.com>; Tamar Christina
> >> <Tamar.Christina@arm.com>; Andrew Pinski <pinskia@gmail.com>;
> Richard
> >> Earnshaw <Richard.Earnshaw@foss.arm.com>; NightStrike
> >> <nightstrike@gmail.com>; wej22007@outlook.com;
> zac.walker@linaro.org;
> >> binutils <binutils@sourceware.org>
> >> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to
> >> arm64pe
> >>
> >> On Wed, 4 Jan 2023, Nick Clifton wrote:
> >>
> >>> This would create duplicated code sure, but not too much, and it
> >>> would allow the linker to be compatible with Clang whilst still also
> >>> retaining the aarch64 moniker preferred by ARM.
> >>
> >> As this still is framed as "compatible with Clang" - does this mean
> >> that you still insist that GCC should use a different emulation name
> >> when calling the linker, than what Clang does, forcing lld to also
> >> start recognizing that new, different emulation name - different from
> >> the one that has been in place for
> >> 5 years?
> >
> > To be clear, GCC will very likely reject any port upstreaming that
> > uses
> > Arm64 for the same reason. And GCC is a lot more tightly controlled.
> > At least if you want upstream support.
> >
> > Believe it or not I'm actually trying to help you here, the fact that
> > clang has called it arm64 is why we want to allow the alias. As I
> > mentioned before, it just can't be the main name.
>
> Right - but in the case of GCC, it wouldn't be the name of a new port - it
> would only be a single word in a file for passing linker arguments. Just like
> how "-m i386pep" is passed for x86_64 today here:
> https://github.com/gcc-
> mirror/gcc/blob/345dffd0d4ebff7e705dfff1a8a72017a167120a/gcc/config/i38
> 6/mingw-w64.h#L74
>
> So regardless of the binutils discussion, are you saying that GCC would reject
> a patch that adds such an occurance that would pass "-m arm64pe", in a
> patch that otherwise consistently calls the port "aarch64"?
If it's driver only and has no source implications then It might be ok. But look at this
patch, it's not driver only. By renaming the emulation target it also renamed the internal
macros. It makes us have to maintain the name "arm64" in the source code along with
what everything else calls aarch64 and this has more implications.
Tamar
>
> // Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 11:08 ` Tamar Christina
@ 2023-01-04 11:36 ` Martin Storsjö
2023-01-04 15:02 ` Nick Clifton
0 siblings, 1 reply; 34+ messages in thread
From: Martin Storsjö @ 2023-01-04 11:36 UTC (permalink / raw)
To: Tamar Christina
Cc: nickc, Mark Harmstone, Andrew Pinski, Richard Earnshaw,
NightStrike, wej22007, zac.walker, binutils
[-- Attachment #1: Type: text/plain, Size: 1998 bytes --]
On Wed, 4 Jan 2023, Tamar Christina wrote:
>> -----Original Message-----
>> From: Martin Storsjö <martin@martin.st>
>> Sent: Wednesday, January 4, 2023 11:00 AM
>> To: Tamar Christina <Tamar.Christina@arm.com>
>> Cc: nickc@redhat.com; Mark Harmstone <mark@harmstone.com>; Andrew
>> Pinski <pinskia@gmail.com>; Richard Earnshaw
>> <Richard.Earnshaw@foss.arm.com>; NightStrike <nightstrike@gmail.com>;
>> wej22007@outlook.com; zac.walker@linaro.org; binutils
>> <binutils@sourceware.org>
>> Subject: RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>>
>> On Wed, 4 Jan 2023, Tamar Christina wrote:
>>
>>> To be clear, GCC will very likely reject any port upstreaming that
>>> uses
>>> Arm64 for the same reason. And GCC is a lot more tightly controlled.
>>> At least if you want upstream support.
>>>
>>> Believe it or not I'm actually trying to help you here, the fact that
>>> clang has called it arm64 is why we want to allow the alias. As I
>>> mentioned before, it just can't be the main name.
>>
>> Right - but in the case of GCC, it wouldn't be the name of a new port - it
>> would only be a single word in a file for passing linker arguments. Just like
>> how "-m i386pep" is passed for x86_64 today here:
>> https://github.com/gcc-
>> mirror/gcc/blob/345dffd0d4ebff7e705dfff1a8a72017a167120a/gcc/config/i38
>> 6/mingw-w64.h#L74
>>
>> So regardless of the binutils discussion, are you saying that GCC would reject
>> a patch that adds such an occurance that would pass "-m arm64pe", in a
>> patch that otherwise consistently calls the port "aarch64"?
>
> If it's driver only and has no source implications then It might be ok.
> But look at this patch, it's not driver only. By renaming the emulation
> target it also renamed the internal macros. It makes us have to
> maintain the name "arm64" in the source code along with what everything
> else calls aarch64 and this has more implications.
Ok, thanks for clarifying the concern - I see your point now.
// Martin
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 11:36 ` Martin Storsjö
@ 2023-01-04 15:02 ` Nick Clifton
2023-01-05 2:33 ` Mark Harmstone
2023-01-05 10:45 ` Tamar Christina
0 siblings, 2 replies; 34+ messages in thread
From: Nick Clifton @ 2023-01-04 15:02 UTC (permalink / raw)
To: Martin Storsjö, Tamar Christina
Cc: Mark Harmstone, Andrew Pinski, Richard Earnshaw, NightStrike,
wej22007, zac.walker, binutils
[-- Attachment #1: Type: text/plain, Size: 380 bytes --]
Hi Guys,
I am not sure what this talk of changing gcc is about, but this attached
is the patch that I am suggesting as a solution to this problem.
With it applied a linker configured as --target=aarch64pe will support
both aarch64pe and arm64pe emulations. Either can be used and they
will produce the same output.
Have I missed something ?
Cheers
Nick
[-- Attachment #2: arm64pe.patch --]
[-- Type: text/x-patch, Size: 2267 bytes --]
diff --git a/ld/Makefile.am b/ld/Makefile.am
index 12b2c3c453f..bfc24537a01 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -389,6 +389,7 @@ ALL_64_EMULATION_SOURCES = \
eaarch64linux32b.c \
eaarch64linuxb.c \
eaarch64pe.c \
+ earm64pe.c \
eelf32_x86_64.c \
eelf32b4300.c \
eelf32bmip.c \
@@ -881,6 +882,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linux32b.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64linuxb.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eaarch64pe.Pc@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/earm64pe.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32_x86_64.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32b4300.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf32bmip.Pc@am__quote@
diff --git a/ld/configure.tgt b/ld/configure.tgt
index eeaad476647..aa74d2521bf 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -120,6 +120,7 @@ aarch64-*-haiku*) targ_emul=aarch64haiku
;;
aarch64-*-pe*)
targ_emul=aarch64pe
+ targ_extra_emuls="arm64pe"
targ_extra_ofiles="deffilep.o pep-dll-aarch64.o"
;;
alpha*-*-freebsd* | alpha*-*-kfreebsd*-gnu)
diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em
index 4f281cab609..d61cab86d75 100644
--- a/ld/emultempl/pep.em
+++ b/ld/emultempl/pep.em
@@ -57,6 +57,8 @@ fragment <<EOF
#define COFF_WITH_PE
#ifdef TARGET_IS_aarch64pe
#define COFF_WITH_peAArch64
+#elif defined TARGET_IS_arm64pe
+#define COFF_WITH_peAArch64
#elif defined (TARGET_IS_i386pep)
#define COFF_WITH_pex64
#endif
@@ -88,6 +90,8 @@ ${pdb_support+#include \"pdb.h\"}
# include "coff/x86_64.h"
#elif defined TARGET_IS_aarch64pe
# include "coff/aarch64.h"
+#elif defined TARGET_IS_arm64pe
+# include "coff/aarch64.h"
#endif
#include "coff/pe.h"
--- /dev/null 2023-01-04 08:12:27.071001981 +0000
+++ current/ld/emulparams/arm64pe.sh 2023-01-04 14:53:11.272412233 +0000
@@ -0,0 +1,4 @@
+# The "arm64pe" emulation is used as an alias for "aarch64pe".
+# It is provided for compatibility with Clang, which uses this name when invoking the linker.
+
+. ${srcdir}/emulparams/aarch64pe.sh
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 15:02 ` Nick Clifton
@ 2023-01-05 2:33 ` Mark Harmstone
2023-01-05 11:01 ` Nick Clifton
2023-01-05 10:45 ` Tamar Christina
1 sibling, 1 reply; 34+ messages in thread
From: Mark Harmstone @ 2023-01-05 2:33 UTC (permalink / raw)
To: Nick Clifton, Martin Storsjö, Tamar Christina
Cc: Andrew Pinski, Richard Earnshaw, NightStrike, wej22007,
zac.walker, binutils
On 4/1/23 15:02, Nick Clifton wrote:
> Hi Guys,
>
> I am not sure what this talk of changing gcc is about, but this attached
> is the patch that I am suggesting as a solution to this problem.
>
> With it applied a linker configured as --target=aarch64pe will support
> both aarch64pe and arm64pe emulations. Either can be used and they
> will produce the same output.
>
> Have I missed something ?
>
> Cheers
> Nick
>
Thanks Nick, this looks fine to me. If you push this to master, I'll resubmit my patches rebased against this.
Mark
^ permalink raw reply [flat|nested] 34+ messages in thread
* RE: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-04 15:02 ` Nick Clifton
2023-01-05 2:33 ` Mark Harmstone
@ 2023-01-05 10:45 ` Tamar Christina
1 sibling, 0 replies; 34+ messages in thread
From: Tamar Christina @ 2023-01-05 10:45 UTC (permalink / raw)
To: nickc, Martin Storsjö
Cc: Mark Harmstone, Andrew Pinski, Richard Earnshaw, NightStrike,
wej22007, zac.walker, binutils
Hi Nick,
Yes, this works for us as well.
Thanks for the patch,
Tamar
> -----Original Message-----
> From: Nick Clifton <nickc@redhat.com>
> Sent: Wednesday, January 4, 2023 3:02 PM
> To: Martin Storsjö <martin@martin.st>; Tamar Christina
> <Tamar.Christina@arm.com>
> Cc: Mark Harmstone <mark@harmstone.com>; Andrew Pinski
> <pinskia@gmail.com>; Richard Earnshaw
> <Richard.Earnshaw@foss.arm.com>; NightStrike <nightstrike@gmail.com>;
> wej22007@outlook.com; zac.walker@linaro.org; binutils
> <binutils@sourceware.org>
> Subject: Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
>
> Hi Guys,
>
> I am not sure what this talk of changing gcc is about, but this attached
> is the patch that I am suggesting as a solution to this problem.
>
> With it applied a linker configured as --target=aarch64pe will support
> both aarch64pe and arm64pe emulations. Either can be used and they
> will produce the same output.
>
> Have I missed something ?
>
> Cheers
> Nick
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe
2023-01-05 2:33 ` Mark Harmstone
@ 2023-01-05 11:01 ` Nick Clifton
0 siblings, 0 replies; 34+ messages in thread
From: Nick Clifton @ 2023-01-05 11:01 UTC (permalink / raw)
To: Mark Harmstone, Martin Storsjö, Tamar Christina
Cc: Andrew Pinski, Richard Earnshaw, NightStrike, wej22007,
zac.walker, binutils
Hi Mark,
> Thanks Nick, this looks fine to me. If you push this to master, I'll resubmit my patches rebased against this.
The patch is now in.
Cheers
Nick
^ permalink raw reply [flat|nested] 34+ messages in thread
end of thread, other threads:[~2023-01-05 11:01 UTC | newest]
Thread overview: 34+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-12-30 2:40 [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Mark Harmstone
2022-12-30 2:40 ` [PATCH 2/8] Fix size of external_reloc for pe-aarch64 Mark Harmstone
2022-12-30 2:40 ` [PATCH 3/8] Skip ELF-specific tests when targeting pe-aarch64 Mark Harmstone
2022-12-30 2:40 ` [PATCH 4/8] Skip big-obj test for pe-aarch64 Mark Harmstone
2022-12-30 2:40 ` [PATCH 5/8] Add pe-aarch64 relocations Mark Harmstone
2022-12-30 2:40 ` [PATCH 6/8] Add .secrel32 for pe-aarch64 Mark Harmstone
2022-12-30 2:40 ` [PATCH 7/8] Add aarch64-w64-mingw32 target Mark Harmstone
2022-12-30 2:40 ` [PATCH 8/8] gas: Restore tc_pe_dwarf2_emit_offset for pe-aarch64 Mark Harmstone
2023-01-03 11:54 ` [PATCH 1/8] ld: Rename aarch64pe emulation target to arm64pe Nick Clifton
2023-01-03 11:59 ` NightStrike
2023-01-03 12:09 ` Tamar Christina
2023-01-03 14:08 ` Richard Earnshaw
2023-01-03 14:13 ` Martin Storsjö
2023-01-03 14:54 ` Tamar Christina
2023-01-03 15:51 ` Martin Storsjö
2023-01-03 15:57 ` Tamar Christina
2023-01-03 18:21 ` Mark Harmstone
2023-01-03 18:33 ` Andrew Pinski
2023-01-03 19:07 ` Mark Harmstone
2023-01-03 19:41 ` Tamar Christina
2023-01-03 20:05 ` Martin Storsjö
2023-01-04 2:38 ` Mark Harmstone
2023-01-04 9:51 ` Nick Clifton
2023-01-04 10:25 ` Martin Storsjö
2023-01-04 10:35 ` Tamar Christina
2023-01-04 11:00 ` Martin Storsjö
2023-01-04 11:08 ` Tamar Christina
2023-01-04 11:36 ` Martin Storsjö
2023-01-04 15:02 ` Nick Clifton
2023-01-05 2:33 ` Mark Harmstone
2023-01-05 11:01 ` Nick Clifton
2023-01-05 10:45 ` Tamar Christina
2023-01-03 14:14 ` Tamar Christina
2023-01-03 12:53 ` Martin Storsjö
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