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From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
	Nelson Chu <nelson.chu@sifive.com>,
	Kito Cheng <kito.cheng@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>
Cc: binutils@sourceware.org
Subject: [PATCH 2/2] RISC-V: Fix required bits on certain environments
Date: Sat,  9 Jul 2022 12:50:58 +0900	[thread overview]
Message-ID: <812ccac36d18defcff10975285f6f1233a411a96.1657338656.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1657338656.git.research_trasio@irq.a4lg.com>

If `unsigned long long' type has more than 64-bits, validate_riscv_insn
function generated wrong required_bits value.  This commit fixes this
small issue (may be too pedantic though).

gas/ChangeLog:

	* config/tc-riscv.c (validate_riscv_insn): Compute correct
	required_bits value when unsigned long long is larger than 64b.
---
 gas/config/tc-riscv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 8a961c05d95..9581a5c6e03 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -1110,7 +1110,7 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length)
   else
     insn_width = 8 * length;
 
-  required_bits = ~0ULL >> (64 - insn_width);
+  required_bits = ((insn_t)~0ULL) >> (64 - insn_width);
 
   if ((used_bits & opc->match) != (opc->match & required_bits))
     {
-- 
2.34.1


  parent reply	other threads:[~2022-07-09  3:51 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-09  3:50 [PATCH 0/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
2022-07-09  3:50 ` [PATCH 1/2] " Tsukasa OI
2022-07-09  3:50 ` Tsukasa OI [this message]
2022-10-06  4:40 ` [PATCH v2 0/2] " Tsukasa OI
2022-10-06  4:40   ` [PATCH v2 1/2] RISC-V: Fallback for instructions longer than 64b Tsukasa OI
2022-10-06  8:22     ` Jan Beulich
2022-10-06  9:52       ` Tsukasa OI
2022-10-06  4:40   ` [PATCH v2 2/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
2022-10-06  8:26     ` Jan Beulich
2022-10-06  8:34       ` Tsukasa OI
2022-10-06  8:43         ` Jan Beulich
2022-10-06  9:56   ` [PATCH v3 0/2] " Tsukasa OI
2022-10-06  9:56     ` [PATCH v3 1/2] RISC-V: Fallback for instructions longer than 64b Tsukasa OI
2022-10-14  1:32       ` Nelson Chu
2022-10-14  7:07         ` Jan Beulich
2022-10-16 13:32         ` Tsukasa OI
2022-10-28  9:41           ` Nelson Chu
2022-10-06  9:56     ` [PATCH v3 2/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI

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