From: Jan Beulich <jbeulich@suse.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>
Cc: binutils@sourceware.org, Nelson Chu <nelson@rivosinc.com>,
Kito Cheng <kito.cheng@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH v2 1/2] RISC-V: Fallback for instructions longer than 64b
Date: Thu, 6 Oct 2022 10:22:08 +0200 [thread overview]
Message-ID: <1834abf4-a48d-8712-f4dd-cf8434a009f7@suse.com> (raw)
In-Reply-To: <af45c5d57c221e43101c2aa38b14f4b4ac12d011.1665031170.git.research_trasio@irq.a4lg.com>
On 06.10.2022 06:40, Tsukasa OI via Binutils wrote:
> We don't support instructions longer than 64-bits yet. Still, we can
> modify validate_riscv_insn function to prevent unexpected behavior by
> limiting the "length" of an instruction to 64-bit (or less).
>
> gas/ChangeLog:
>
> * config/tc-riscv.c (validate_riscv_insn): Fix function
> description comment based on current usage. Limit instruction
> length up to 64-bit for now. Make sure that required_bits does
> not corrupt even if unsigned long long is longer than 64-bit.
While I agree with the code change, I don't agree with the adjustment
to the comment - you're changing it to match the sole present caller,
but imo such a comment ought to describe the behavior of the function
irrespective of how it's used at any given point in time.
Jan
next prev parent reply other threads:[~2022-10-06 8:22 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-09 3:50 [PATCH 0/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
2022-07-09 3:50 ` [PATCH 1/2] " Tsukasa OI
2022-07-09 3:50 ` [PATCH 2/2] RISC-V: Fix required bits on certain environments Tsukasa OI
2022-10-06 4:40 ` [PATCH v2 0/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
2022-10-06 4:40 ` [PATCH v2 1/2] RISC-V: Fallback for instructions longer than 64b Tsukasa OI
2022-10-06 8:22 ` Jan Beulich [this message]
2022-10-06 9:52 ` Tsukasa OI
2022-10-06 4:40 ` [PATCH v2 2/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
2022-10-06 8:26 ` Jan Beulich
2022-10-06 8:34 ` Tsukasa OI
2022-10-06 8:43 ` Jan Beulich
2022-10-06 9:56 ` [PATCH v3 0/2] " Tsukasa OI
2022-10-06 9:56 ` [PATCH v3 1/2] RISC-V: Fallback for instructions longer than 64b Tsukasa OI
2022-10-14 1:32 ` Nelson Chu
2022-10-14 7:07 ` Jan Beulich
2022-10-16 13:32 ` Tsukasa OI
2022-10-28 9:41 ` Nelson Chu
2022-10-06 9:56 ` [PATCH v3 2/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
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