From: Jan Beulich <jbeulich@suse.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>
Cc: binutils@sourceware.org, Nelson Chu <nelson@rivosinc.com>,
Kito Cheng <kito.cheng@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH v2 2/2] RISC-V: Improve "bits undefined" diagnostics
Date: Thu, 6 Oct 2022 10:26:21 +0200 [thread overview]
Message-ID: <c087fcc1-50c8-12ee-c8c3-6e9da80deab8@suse.com> (raw)
In-Reply-To: <c6e55781245dd3e8e9b8debd6130fc5449dfbd55.1665031170.git.research_trasio@irq.a4lg.com>
On 06.10.2022 06:40, Tsukasa OI via Binutils wrote:
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -1312,8 +1312,8 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length)
> if (used_bits != required_bits)
> {
> as_bad (_("internal: bad RISC-V opcode "
> - "(bits 0x%lx undefined): %s %s"),
> - ~(unsigned long)(used_bits & required_bits),
> + "(bits 0x%llx undefined or invalid): %s %s"),
> + (unsigned long long)(used_bits ^ required_bits),
May I encourage the use of the # format modifier in cases like this
one (i.e. %#llx here), for producing a one character shorter string
literal? Iirc a respective adjustment was done pretty recently to
some other parts of binutils.
Jan
next prev parent reply other threads:[~2022-10-06 8:26 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-09 3:50 [PATCH 0/2] " Tsukasa OI
2022-07-09 3:50 ` [PATCH 1/2] " Tsukasa OI
2022-07-09 3:50 ` [PATCH 2/2] RISC-V: Fix required bits on certain environments Tsukasa OI
2022-10-06 4:40 ` [PATCH v2 0/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
2022-10-06 4:40 ` [PATCH v2 1/2] RISC-V: Fallback for instructions longer than 64b Tsukasa OI
2022-10-06 8:22 ` Jan Beulich
2022-10-06 9:52 ` Tsukasa OI
2022-10-06 4:40 ` [PATCH v2 2/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
2022-10-06 8:26 ` Jan Beulich [this message]
2022-10-06 8:34 ` Tsukasa OI
2022-10-06 8:43 ` Jan Beulich
2022-10-06 9:56 ` [PATCH v3 0/2] " Tsukasa OI
2022-10-06 9:56 ` [PATCH v3 1/2] RISC-V: Fallback for instructions longer than 64b Tsukasa OI
2022-10-14 1:32 ` Nelson Chu
2022-10-14 7:07 ` Jan Beulich
2022-10-16 13:32 ` Tsukasa OI
2022-10-28 9:41 ` Nelson Chu
2022-10-06 9:56 ` [PATCH v3 2/2] RISC-V: Improve "bits undefined" diagnostics Tsukasa OI
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