public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed
From: "Jiang, Haochen" <haochen.jiang@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>
Cc: "hjl.tools@gmail.com" <hjl.tools@gmail.com>,
	"binutils@sourceware.org" <binutils@sourceware.org>,
	"Zhang, Jun" <jun.zhang@intel.com>
Subject: RE: [PATCH v2] Support Intel FRED LKGS
Date: Fri, 26 May 2023 06:50:13 +0000	[thread overview]
Message-ID: <SA1PR11MB59460753C0916773CB08C2F0EC479@SA1PR11MB5946.namprd11.prod.outlook.com> (raw)
In-Reply-To: <130cc200-e35b-57d8-91f5-3624194269c6@suse.com>


> > I just take a look at the whole thing.
> >
> > From my perspective, if we are going to use the same pattern like SLDT
> > and STR. Does that mean for the instruction below:
> >
> > lldt %ax
> >
> > We will need to add a 66 prefix for gas to make it happen or it will drop
> to %eax?
> >
> > It will change the current assembler behavior. Is my understanding correct?
> 
> No. The assembler was changed already. The disassembler simply wants to
> follow suit. IOW the assembler already avoids emitting any unnecessary
> prefixes. The disassembler, otoh, should correctly represent redundant
> prefixes (and preferably not as raw ones, e.g. not "data16" but a 16-bit sized
> register or an insn suffix for AT&T memory operands).

So for all the registers, is the ideal case that we should not emit suffixes since the
register will always be 16 bit?

If we are using D, I suppose we will emit suffixes under the current scenario.

Haochen

> 
> Jan

  reply	other threads:[~2023-05-26  6:50 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-22  6:07 Zhang, Jun
2023-05-22  9:11 ` Jan Beulich
2023-05-24  6:36   ` Jiang, Haochen
2023-05-25  7:57     ` Jiang, Haochen
2023-05-25  8:42       ` Jan Beulich
2023-05-26  6:50         ` Jiang, Haochen [this message]
2023-05-26  7:00           ` Jan Beulich
2023-05-26  8:26             ` [PATCH] x86: Add Evw to emit w suffix for several instrctions for word ptr Haochen Jiang
2023-05-26  8:46               ` Jan Beulich
2023-05-26  8:54                 ` Jiang, Haochen
2023-05-26 10:52                   ` Jan Beulich
2023-05-29  2:01                     ` Jiang, Haochen
2023-05-29  2:08                       ` Jiang, Haochen
2023-05-30  8:09                         ` Jan Beulich
2023-05-31  5:48                           ` Jiang, Haochen
2023-05-31  8:43                             ` Jan Beulich
2023-06-01  2:14               ` H.J. Lu
  -- strict thread matches above, loose matches on Subject: below --
2023-05-22  6:00 [PATCH v2] Support Intel FRED LKGS Zhang, Jun

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=SA1PR11MB59460753C0916773CB08C2F0EC479@SA1PR11MB5946.namprd11.prod.outlook.com \
    --to=haochen.jiang@intel.com \
    --cc=JBeulich@suse.com \
    --cc=binutils@sourceware.org \
    --cc=hjl.tools@gmail.com \
    --cc=jun.zhang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).