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From: "Jiang, Haochen" <haochen.jiang@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>
Cc: "hjl.tools@gmail.com" <hjl.tools@gmail.com>,
	"Zhang, Jun" <jun.zhang@intel.com>,
	"binutils@sourceware.org" <binutils@sourceware.org>
Subject: RE: [PATCH] x86: Add Evw to emit w suffix for several instrctions for word ptr
Date: Mon, 29 May 2023 02:01:51 +0000	[thread overview]
Message-ID: <SA1PR11MB5946F7BEA71555B5DB63F851EC4A9@SA1PR11MB5946.namprd11.prod.outlook.com> (raw)
In-Reply-To: <37736f27-73d5-6564-e27e-5e7cd5bf27da@suse.com>

> >>> Currently, for instructions lldt/ltr/verr/verw/lkgs, we are missing
> >>> w suffix for memory operands like sldt/str do. Also the Ew usage is
> >>> not that precise under this scenario. Add Evw to fix this problem.
> >>
> >> So why not Sv? It's used solely for segment register moves, sldt,
> >> str, and smsw right now. We're aiming for consistency among all insns
> >> loading / storing segment selector values (and smsw fits that
> >> pattern, but note that lmsw does not), so introducing a new Evw can't
> >> be the solution (or else Sv users would also need switching).
> >
> > There is a little difference between lldt/ltr/lkgs/verr/verw and
> > sldt/str. We need to fix the register to 16 bit while sldt/str did
> > not. That is why I am not using Sv. Sv will emit 'lldt %eax' but not
> > 'lldt %ax' for current testcases and I suppose that is not desired.
> 
> Did you read my reply on one of the "Support Intel FRED LKGS" threads,
> which I think I sent before this patch was sent? I do not follow why you think
> "we need to fix the register to 16 bit".

Maybe I got some wrong understanding on that. It comes from the current testcase.
Trying to clarify that on disassembler.

Let's take lldt as example. Will 0f00d2 emit eax register or ax register for lldt?

If we need a 66 in bytecode to emit ax register as always, Sv+D fits the need. And then
the only thing we might need to do is to adjust the current testcase.

Haochen

> 
> Jan

  reply	other threads:[~2023-05-29  2:01 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-22  6:07 [PATCH v2] Support Intel FRED LKGS Zhang, Jun
2023-05-22  9:11 ` Jan Beulich
2023-05-24  6:36   ` Jiang, Haochen
2023-05-25  7:57     ` Jiang, Haochen
2023-05-25  8:42       ` Jan Beulich
2023-05-26  6:50         ` Jiang, Haochen
2023-05-26  7:00           ` Jan Beulich
2023-05-26  8:26             ` [PATCH] x86: Add Evw to emit w suffix for several instrctions for word ptr Haochen Jiang
2023-05-26  8:46               ` Jan Beulich
2023-05-26  8:54                 ` Jiang, Haochen
2023-05-26 10:52                   ` Jan Beulich
2023-05-29  2:01                     ` Jiang, Haochen [this message]
2023-05-29  2:08                       ` Jiang, Haochen
2023-05-30  8:09                         ` Jan Beulich
2023-05-31  5:48                           ` Jiang, Haochen
2023-05-31  8:43                             ` Jan Beulich
2023-06-01  2:14               ` H.J. Lu

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