* [PATCH 0/1] objdump: Add callx support for BPF CPU v1 @ 2024-02-09 18:07 Will Hawkins 2024-02-09 18:07 ` [PATCH 1/1] " Will Hawkins 2024-02-12 17:01 ` [PATCH 0/1] " Nick Clifton 0 siblings, 2 replies; 6+ messages in thread From: Will Hawkins @ 2024-02-09 18:07 UTC (permalink / raw) To: binutils; +Cc: Will Hawkins Hello everyone! First time patch submitter but longtime GNU enthusiast. Thank you for all the work that you all do to maintain these vital pieces of software for the community. I am one of the maintainers of ubpf, a userspace eBPF runtime. As part of the ISA standardization process at the IETF, Dave Thaler discovered that clang is now emiting the callx instruction when targeting CPU versions all the way back to v1. I know from Jose that gcc emits that instruction in a special mode. There is a discussion at the ebpf-for-windows GitHub about adding callx support to prevail (and other related tools): https://github.com/microsoft/ebpf-for-windows/issues/3237 This patch adds the ability for objdump to decode the callx instruction for ELF-encoded binaries targeting CPU v1 and greater. I tried very hard to follow best practices for creating this patch submission but I am sure that I did something wrong. Please let me know what I can do differently or better. Again, thank you for your effort maintaining these programs for the community! Sincerely, Will Will Hawkins (1): objdump: Add callx support for BPF CPU v1 include/opcode/bpf.h | 2 +- opcodes/bpf-opc.c | 2 ++ sim/bpf/bpf-sim.c | 4 ++++ 3 files changed, 7 insertions(+), 1 deletion(-) -- 2.43.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/1] objdump: Add callx support for BPF CPU v1 2024-02-09 18:07 [PATCH 0/1] objdump: Add callx support for BPF CPU v1 Will Hawkins @ 2024-02-09 18:07 ` Will Hawkins 2024-02-10 4:47 ` Hans-Peter Nilsson 2024-02-12 17:01 ` [PATCH 0/1] " Nick Clifton 1 sibling, 1 reply; 6+ messages in thread From: Will Hawkins @ 2024-02-09 18:07 UTC (permalink / raw) To: binutils; +Cc: Will Hawkins Add support for disassembling the callx instruction back to CPU v1. include/ChangeLog: * opcode/bpf.h (enum bpf_insn_id): opcodes/ChangeLog: * bpf-opc.c: ChangeLog: * sim/bpf/bpf-sim.c (execute): Signed-off-by: Will Hawkins <hawkinsw@obs.cr> --- include/opcode/bpf.h | 2 +- opcodes/bpf-opc.c | 2 ++ sim/bpf/bpf-sim.c | 4 ++++ 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/include/opcode/bpf.h b/include/opcode/bpf.h index df1e3bd0918..48cef368e4e 100644 --- a/include/opcode/bpf.h +++ b/include/opcode/bpf.h @@ -202,7 +202,7 @@ enum bpf_insn_id BPF_INSN_JAR, BPF_INSN_JEQR, BPF_INSN_JGTR, BPF_INSN_JSGTR, BPF_INSN_JGER, BPF_INSN_JSGER, BPF_INSN_JLTR, BPF_INSN_JSLTR, BPF_INSN_JSLER, BPF_INSN_JLER, BPF_INSN_JSETR, BPF_INSN_JNER, - BPF_INSN_CALLR, BPF_INSN_CALL, BPF_INSN_EXIT, + BPF_INSN_CALLR, BPF_INSN_CALLX, BPF_INSN_CALL, BPF_INSN_EXIT, /* Compare-and-jump instructions (reg OP imm.) */ BPF_INSN_JEQI, BPF_INSN_JGTI, BPF_INSN_JSGTI, BPF_INSN_JGEI, BPF_INSN_JSGEI, BPF_INSN_JLTI, BPF_INSN_JSLTI, diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c index 19e096501a2..3f030a39c1b 100644 --- a/opcodes/bpf-opc.c +++ b/opcodes/bpf-opc.c @@ -274,6 +274,8 @@ const struct bpf_opcode bpf_opcodes[] = BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_JNE|BPF_SRC_X}, {BPF_INSN_CALLR, "call%W%dr", "callx%w%dr", BPF_XBPF, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_CALL|BPF_SRC_X}, + {BPF_INSN_CALLX, "callx%W%dr", "callx%w%dr", + BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_CALL|BPF_SRC_X}, {BPF_INSN_CALL, "call%W%d32", "call%w%d32", BPF_V1, BPF_CODE, BPF_CLASS_JMP|BPF_CODE_CALL|BPF_SRC_K}, {BPF_INSN_EXIT, "exit", "exit", diff --git a/sim/bpf/bpf-sim.c b/sim/bpf/bpf-sim.c index c1f103823fb..a3976d0b4bf 100644 --- a/sim/bpf/bpf-sim.c +++ b/sim/bpf/bpf-sim.c @@ -1096,6 +1096,10 @@ execute (SIM_CPU *cpu, struct bpf_insn *insn) BPF_TRACE ("BPF_INSN_CALLR\n"); bpf_call (cpu, DISP (bpf_regs[insn->dst]), insn->src); break; + case BPF_INSN_CALLX: + BPF_TRACE ("BPF_INSN_CALLX\n"); + bpf_call (cpu, DISP (bpf_regs[insn->dst]), insn->src); + break; case BPF_INSN_CALL: BPF_TRACE ("BPF_INSN_CALL\n"); bpf_call (cpu, insn->imm32, insn->src); -- 2.43.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/1] objdump: Add callx support for BPF CPU v1 2024-02-09 18:07 ` [PATCH 1/1] " Will Hawkins @ 2024-02-10 4:47 ` Hans-Peter Nilsson 2024-02-10 6:13 ` Will Hawkins 0 siblings, 1 reply; 6+ messages in thread From: Hans-Peter Nilsson @ 2024-02-10 4:47 UTC (permalink / raw) To: Will Hawkins; +Cc: binutils On Fri, 9 Feb 2024, Will Hawkins wrote: > Add support for disassembling the callx instruction back to CPU v1. > > include/ChangeLog: > > * opcode/bpf.h (enum bpf_insn_id): > > opcodes/ChangeLog: > > * bpf-opc.c: > > ChangeLog: > > * sim/bpf/bpf-sim.c (execute): Not commenting on the rest of the patch but there's missing text after ":" above. Beware: gcc/contrib/mklog.py doesn't help with that part. :) Happy hacking! brgds, H-P ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/1] objdump: Add callx support for BPF CPU v1 2024-02-10 4:47 ` Hans-Peter Nilsson @ 2024-02-10 6:13 ` Will Hawkins 2024-02-11 23:26 ` Will Hawkins 0 siblings, 1 reply; 6+ messages in thread From: Will Hawkins @ 2024-02-10 6:13 UTC (permalink / raw) To: Hans-Peter Nilsson; +Cc: binutils On Fri, Feb 9, 2024 at 11:47 PM Hans-Peter Nilsson <hp@bitrange.com> wrote: > > On Fri, 9 Feb 2024, Will Hawkins wrote: > > > Add support for disassembling the callx instruction back to CPU v1. > > > > include/ChangeLog: > > > > * opcode/bpf.h (enum bpf_insn_id): > > > > opcodes/ChangeLog: > > > > * bpf-opc.c: > > > > ChangeLog: > > > > * sim/bpf/bpf-sim.c (execute): > > Not commenting on the rest of the patch but there's missing text > after ":" above. Beware: gcc/contrib/mklog.py doesn't help with > that part. :) > Thank you! I thought something looked suspicious but because it was what contrib/mklog.py gave me, I assumed you all had special requirements! I will fix it and resubmit. Thank you again! Will > Happy hacking! > > brgds, H-P ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/1] objdump: Add callx support for BPF CPU v1 2024-02-10 6:13 ` Will Hawkins @ 2024-02-11 23:26 ` Will Hawkins 0 siblings, 0 replies; 6+ messages in thread From: Will Hawkins @ 2024-02-11 23:26 UTC (permalink / raw) To: Hans-Peter Nilsson; +Cc: binutils On Sat, Feb 10, 2024 at 1:13 AM Will Hawkins <hawkinsw@obs.cr> wrote: > > On Fri, Feb 9, 2024 at 11:47 PM Hans-Peter Nilsson <hp@bitrange.com> wrote: > > > > On Fri, 9 Feb 2024, Will Hawkins wrote: > > > > > Add support for disassembling the callx instruction back to CPU v1. > > > > > > include/ChangeLog: > > > > > > * opcode/bpf.h (enum bpf_insn_id): > > > > > > opcodes/ChangeLog: > > > > > > * bpf-opc.c: > > > > > > ChangeLog: > > > > > > * sim/bpf/bpf-sim.c (execute): > > > > Not commenting on the rest of the patch but there's missing text > > after ":" above. Beware: gcc/contrib/mklog.py doesn't help with > > that part. :) > > > > Thank you! I thought something looked suspicious but because it was > what contrib/mklog.py gave me, I assumed you all had special > requirements! I will fix it and resubmit. > > Thank you again! > Will > > Please disregard this version of the patch. I will resubmit a v2 patch soon. There is a discrepancy between the way that gcc encodes the callx (aka callr) and the way that clang encodes the callx. I am working with the author of the IETF standardization document for the BPF ISA to understand how the instruction encoding will be specified. Once that discussion has concluded, I will resubmit the patch. Sorry for the extra emails. Will > > > Happy hacking! > > > > brgds, H-P ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 0/1] objdump: Add callx support for BPF CPU v1 2024-02-09 18:07 [PATCH 0/1] objdump: Add callx support for BPF CPU v1 Will Hawkins 2024-02-09 18:07 ` [PATCH 1/1] " Will Hawkins @ 2024-02-12 17:01 ` Nick Clifton 1 sibling, 0 replies; 6+ messages in thread From: Nick Clifton @ 2024-02-12 17:01 UTC (permalink / raw) To: Will Hawkins, binutils Hi Will, > First time patch submitter but long time GNU enthusiast. Thank you for > all the work that you all do to maintain these vital pieces of software > for the community. Welcome on board and thank you contributing. > I tried very hard to follow best practices for creating this patch > submission but I am sure that I did something wrong. Please let me know > what I can do differently or better. No, no, what you did was excellent. My only suggestions is that with your v2 patch you consider adding a new assembler test (or extending an already existing one) that checks that the instruction can be assembled and then disassembled. For example you might like to add it to gas/testsuite/gas/bpf/call.s (and the associated call.d file for the disassembly). Cheers Nick ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-02-12 17:01 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2024-02-09 18:07 [PATCH 0/1] objdump: Add callx support for BPF CPU v1 Will Hawkins 2024-02-09 18:07 ` [PATCH 1/1] " Will Hawkins 2024-02-10 4:47 ` Hans-Peter Nilsson 2024-02-10 6:13 ` Will Hawkins 2024-02-11 23:26 ` Will Hawkins 2024-02-12 17:01 ` [PATCH 0/1] " Nick Clifton
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