[Bug tree-optimization/105394] New: [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[Bug tree-optimization/105394] New: [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

            Bug ID: 105394
           Summary: [12 Regression] ICE: verify_gimple failed with MVE
                    during GIMPLE pass: veclower2
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: acoplan at gcc dot gnu.org
  Target Milestone: ---

The following fails:

$ ./arm-eabi-gcc -c ~/toolchain/src/gcc/gcc/testsuite/g++.dg/opt/pr79734.C
-march=armv8.1-m.main+mve -mfloat-abi=hard -O
/home/alecop01/toolchain/src/gcc/gcc/testsuite/g++.dg/opt/pr79734.C: In
function 'void foo(V*, V*)':
/home/alecop01/toolchain/src/gcc/gcc/testsuite/g++.dg/opt/pr79734.C:9:1: error:
integral result type precision does not match field size of 'bit_field_ref'
    9 | foo (V *a, V *b)
      | ^~~
_40 = BIT_FIELD_REF <_6, 32, 0>;
/home/alecop01/toolchain/src/gcc/gcc/testsuite/g++.dg/opt/pr79734.C:9:1: error:
integral result type precision does not match field size of 'bit_field_ref'
_42 = BIT_FIELD_REF <_6, 32, 32>;
/home/alecop01/toolchain/src/gcc/gcc/testsuite/g++.dg/opt/pr79734.C:9:1: error:
integral result type precision does not match field size of 'bit_field_ref'
_44 = BIT_FIELD_REF <_6, 32, 64>;
/home/alecop01/toolchain/src/gcc/gcc/testsuite/g++.dg/opt/pr79734.C:9:1: error:
integral result type precision does not match field size of 'bit_field_ref'
_46 = BIT_FIELD_REF <_6, 32, 96>;
during GIMPLE pass: veclower2
/home/alecop01/toolchain/src/gcc/gcc/testsuite/g++.dg/opt/pr79734.C:9:1:
internal compiler error: verify_gimple failed
0x110c388 verify_gimple_in_cfg(function*, bool)
        /home/alecop01/toolchain/src/gcc/gcc/tree-cfg.cc:5561
0xfa3726 execute_function_todo
        /home/alecop01/toolchain/src/gcc/gcc/passes.cc:2085
0xfa388e do_per_function
        /home/alecop01/toolchain/src/gcc/gcc/passes.cc:1688
0xfa3a29 execute_todo
        /home/alecop01/toolchain/src/gcc/gcc/passes.cc:2139
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

Since commit r12-7339-g91224cf625dc90304bb515a0cc602beed48fe3da, the arm build
was broken. Commit r12-7356-gfd0ab7c734b04b91653467b94afd48ceca122083 fixes the
build, and we start seeing the ICE after this commit. So the triggering commit
is in this range.

[Bug tree-optimization/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot gnu.org
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2022-04-26
             Status|UNCONFIRMED                 |ASSIGNED

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
Hmm, in my cross-arm build I get

> ./cc1plus -quiet t.c -I include -march=armv8.1-m.main+mve -mfloat-abi=hard -O
cc1plus: error: target CPU does not support ARM mode

while in my cross-aarch64 build:

> ./cc1plus -quiet t.c -I include -march=armv8.1-m.main+mve -mfloat-abi=hard -O
cc1plus: error: unrecognized command-line option '-mfloat-abi=hard'
cc1plus: error: unknown value 'armv8.1-m.main+mve' for '-march'
cc1plus: note: valid arguments are: armv8-a armv8.1-a armv8.2-a armv8.3-a
armv8.4-a armv8.5-a armv8.6-a armv8.7-a armv8.8-a armv8-r armv9-a

in the cross-arm build adding -mthumb reproduces the ICE, I guess my
configury (--target=arm-none-linux-gnueabihf --with-float=hard
--with-cpu=cortex-a9 --with-fpu=neon-fp16) plays a role here.

I will have a look.

[Bug tree-optimization/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #2 from Alex Coplan <acoplan at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #1)
> Hmm, in my cross-arm build I get
> 
> > ./cc1plus -quiet t.c -I include -march=armv8.1-m.main+mve -mfloat-abi=hard -O
> cc1plus: error: target CPU does not support ARM mode

Try adding -mthumb (I think the driver does this automatically).

[Bug tree-optimization/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
We are calling tree_vec_extract with bitsize 32 but a QImode boolean type.

ICK.

(gdb) p debug_gimple_stmt (stmt)
_8 = VEC_COND_EXPR <_6, _7, { 3.0e+0, 3.0e+0, 3.0e+0, 3.0e+0 }>;
$15 = void
(gdb) p debug_tree (a)
 <ssa_name 0x7ffff6492318
    type <vector_type 0x7ffff66309d8
        type <boolean_type 0x7ffff6630930 public QI
            size <integer_cst 0x7ffff6526348 constant 8>
            unit-size <integer_cst 0x7ffff6526360 constant 1>
            align:8 warn_if_not_align:0 symtab:0 alias-set -1 canonical-type
0x7ffff6630930 precision:4 min <integer_cst 0x7ffff662e300 -8> max <integer_cst
0x7ffff662e348 7>>
        V4BI
        size <integer_cst 0x7ffff6526408 constant 16>
        unit-size <integer_cst 0x7ffff6526420 constant 2>
        align:16 warn_if_not_align:0 symtab:0 alias-set -1 canonical-type
0x7ffff66309d8 nunits:4>
    visited
    def_stmt _6 = _27;
    version:6>

so we have a non 1-precision BImode bool.  That's something we assume
doesn't happen (here).

I see V4BImode is 2 bytes in size, are there really 4 bits used for each
element?

The patch below assumes that and generates

  _40 = VIEW_CONVERT_EXPR<unsigned short>(_6);
  _41 = _40 & 15;
  _42 = _41 != 0 ? _30 : 3.0e+0;
  _43 = _40 & 240;
  _44 = _43 != 0 ? _33 : 3.0e+0;
  _45 = _40 & 3840;
  _46 = _45 != 0 ? _36 : 3.0e+0;
  _47 = _40 & 61440;
  _48 = _47 != 0 ? _39 : 3.0e+0;
  _8 = {_42, _44, _46, _48};

for the unsupported VEC_COND_EXPR.  The approach won't work for variable-length
vectors since we cannot pun that to an integer type (precision is always
constant).  So eventually using an adjusted BIT_FIELD_REF for the
vector BImode case is better - as said the current code simply assumes
a classical mask.

I suppose for SVE we never run into unsupported conds?

[Bug tree-optimization/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |12.0

[Bug target/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|tree-optimization           |target
           Assignee|rguenth at gcc dot gnu.org         |unassigned at gcc dot gnu.org
             Status|ASSIGNED                    |NEW
                 CC|                            |rguenth at gcc dot gnu.org,
                   |                            |rsandifo at gcc dot gnu.org

--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
I see for arm B4Imode as inner mode of V4BI but on aarch64 the VNxMBI modes all
have BImode as inner mode.  They'd of course still run into this issue if we
ever have to lower SVE ops.

But maybe that we run into this for MVE is also just because of missing
patterns in the machine description.

diff --git a/gcc/tree-vect-generic.cc b/gcc/tree-vect-generic.cc
index 8b7227e8b58..1258cc48b16 100644
--- a/gcc/tree-vect-generic.cc
+++ b/gcc/tree-vect-generic.cc
@@ -1034,6 +1034,7 @@ expand_vector_condition (gimple_stmt_iterator *gsi,
bitmap dce_ssa_names)
   tree a2 = NULL_TREE;
   bool a_is_comparison = false;
   bool a_is_scalar_bitmask = false;
+  unsigned bitmask_elwidth = 0;
   tree b = gimple_assign_rhs2 (stmt);
   tree c = gimple_assign_rhs3 (stmt);
   vec<constructor_elt, va_gc> *v;
@@ -1111,14 +1112,12 @@ expand_vector_condition (gimple_stmt_iterator *gsi,
bitmap dce_ssa_names)

   if (!a_is_comparison
       && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (a))
-      && SCALAR_INT_MODE_P (TYPE_MODE (TREE_TYPE (a)))
-      && known_lt (GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (a))),
-                  TYPE_VECTOR_SUBPARTS (TREE_TYPE (a))
-                  * GET_MODE_BITSIZE (SCALAR_TYPE_MODE
-                                               (TREE_TYPE (TREE_TYPE (a))))))
+      && (SCALAR_INT_MODE_P (TYPE_MODE (TREE_TYPE (a)))
+         || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (a))) == MODE_VECTOR_BOOL))
     {
       a_is_scalar_bitmask = true;
-      int prec = GET_MODE_PRECISION (SCALAR_TYPE_MODE (TREE_TYPE (a)));
+      bitmask_elwidth = TYPE_PRECISION (TREE_TYPE (TREE_TYPE (a)));
+      int prec = GET_MODE_PRECISION (TYPE_MODE (TREE_TYPE (a))).to_constant
();
       tree atype = build_nonstandard_integer_type (prec, 1);
       a = gimplify_build1 (gsi, VIEW_CONVERT_EXPR, atype, a);
     }
@@ -1141,7 +1140,8 @@ expand_vector_condition (gimple_stmt_iterator *gsi,
bitmap dce_ssa_names)
        }
       else if (a_is_scalar_bitmask)
        {
-         wide_int w = wi::set_bit_in_zero (i, TYPE_PRECISION (TREE_TYPE (a)));
+         wide_int w = wi::shifted_mask (i * bitmask_elwidth, bitmask_elwidth,
+                                        false, TYPE_PRECISION (TREE_TYPE
(a)));
          result = gimplify_build2 (gsi, BIT_AND_EXPR, TREE_TYPE (a),
                                    a, wide_int_to_tree (TREE_TYPE (a), w));
          aa = build2 (NE_EXPR, boolean_type_node, result,

[Bug target/105394] [12/13 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #5 from Richard Biener <rguenth at gcc dot gnu.org> ---
I think the fix should rather be to the

      else 
        aa = tree_vec_extract (gsi, cond_type, a, width, index);

part which assumes that if a is not a comparison or a integer mode mask then
the mask vector element width is the same as the data element width which
isn't the case for VnBImode vectors (neither on MVE which can have multi-bit
bitsize BImode elements nor on SVE/GCN which I think have one-bit bitsize
BImode elements only).

[Bug target/105394] [12/13 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #5)
> I think the fix should rather be to the
> 
>       else 
>         aa = tree_vec_extract (gsi, cond_type, a, width, index);
> 
> part which assumes that if a is not a comparison or a integer mode mask then
> the mask vector element width is the same as the data element width which
> isn't the case for VnBImode vectors (neither on MVE which can have multi-bit
> bitsize BImode elements nor on SVE/GCN which I think have one-bit bitsize
> BImode elements only).

And a proper refactoring of things would turn the tree_vec_extract
bitsize/bitpos arguments to poly_uint64 so we can do arithmetic in
non-trees in the caller(s) (maybe add an overload for simplicity).

[Bug target/105394] [12/13 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot gnu.org
             Status|NEW                         |ASSIGNED

--- Comment #7 from Richard Biener <rguenth at gcc dot gnu.org> ---
Created attachment 52904
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=52904&action=edit
patch

I am testing this patch on x86_64-unknwon-linux-gnu, can somebody test it on
ARM please?  And maybe come up with a cut&pastable testcase for gcc.dg/vect or
gcc.target/arm?

[Bug target/105394] [12/13 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #8 from Alex Coplan <acoplan at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #7)
> Created attachment 52904 [details]
> patch
> 
> I am testing this patch on x86_64-unknwon-linux-gnu, can somebody test it on
> ARM please?  And maybe come up with a cut&pastable testcase for gcc.dg/vect
> or gcc.target/arm?

Sure, I can test it.

[Bug target/105394] [12/13 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #9 from Alex Coplan <acoplan at gcc dot gnu.org> ---
Testing looks good: I regression tested a cross toolchain configured with
--with-arch=armv8.1-m.main+mve: no regressions, and it fixes the problem seen
here:

FAIL->PASS: g++.dg/opt/pr79734.C  -std=gnu++14 (test for excess errors)
FAIL->PASS: g++.dg/opt/pr79734.C  -std=gnu++17 (test for excess errors)
FAIL->PASS: g++.dg/opt/pr79734.C  -std=gnu++20 (test for excess errors)
FAIL->PASS: g++.dg/opt/pr79734.C  -std=gnu++98 (test for excess errors)

[Bug target/105394] [12/13 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenther at suse dot de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #10 from rguenther at suse dot de <rguenther at suse dot de> ---
On Tue, 3 May 2022, acoplan at gcc dot gnu.org wrote:

> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394
> 
> --- Comment #9 from Alex Coplan <acoplan at gcc dot gnu.org> ---
> Testing looks good: I regression tested a cross toolchain configured with
> --with-arch=armv8.1-m.main+mve: no regressions, and it fixes the problem seen
> here:
> 
> FAIL->PASS: g++.dg/opt/pr79734.C  -std=gnu++14 (test for excess errors)
> FAIL->PASS: g++.dg/opt/pr79734.C  -std=gnu++17 (test for excess errors)
> FAIL->PASS: g++.dg/opt/pr79734.C  -std=gnu++20 (test for excess errors)
> FAIL->PASS: g++.dg/opt/pr79734.C  -std=gnu++98 (test for excess errors)

Good, I'll push the patch to trunk then.

[Bug target/105394] [12/13 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #11 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Biener <rguenth@gcc.gnu.org>:

https://gcc.gnu.org/g:dfae0c5a29f336cdab234b28999f9ba9dc20a4d0

commit r13-81-gdfae0c5a29f336cdab234b28999f9ba9dc20a4d0
Author: Richard Biener <rguenther@suse.de>
Date:   Fri Apr 29 11:54:45 2022 +0200

    tree-optimization/105394 - vector lowering of compares

    The following fixes missing handling of non-integer mode but
    masked (SVE or MVE) compares in vector lowering by using the
    appropriate mask element width to extract the components and
    adjust the index.

    2022-04-29  Richard Biener  <rguenther@suse.de>

            PR tree-optimization/105394
            * tree-vect-generic.cc (expand_vector_condition): Adjust
            comp_width for non-integer mode masks as well.

[Bug target/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |13.0
            Summary|[12/13 Regression] ICE:     |[12 Regression] ICE:
                   |verify_gimple failed with   |verify_gimple failed with
                   |MVE during GIMPLE pass:     |MVE during GIMPLE pass:
                   |veclower2                   |veclower2

--- Comment #12 from Richard Biener <rguenth at gcc dot gnu.org> ---
Fixed on trunk sofar.

[Bug target/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|12.0                        |12.2

--- Comment #13 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 12.1 is being released, retargeting bugs to GCC 12.2.

[Bug target/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #14 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-12 branch has been updated by Richard Biener
<rguenth@gcc.gnu.org>:

https://gcc.gnu.org/g:e229f9b8f5d060056883ddb379b191c451e20139

commit r12-8341-ge229f9b8f5d060056883ddb379b191c451e20139
Author: Richard Biener <rguenther@suse.de>
Date:   Fri Apr 29 11:54:45 2022 +0200

    tree-optimization/105394 - vector lowering of compares

    The following fixes missing handling of non-integer mode but
    masked (SVE or MVE) compares in vector lowering by using the
    appropriate mask element width to extract the components and
    adjust the index.

    2022-04-29  Richard Biener  <rguenther@suse.de>

            PR tree-optimization/105394
            * tree-vect-generic.cc (expand_vector_condition): Adjust
            comp_width for non-integer mode masks as well.

    (cherry picked from commit dfae0c5a29f336cdab234b28999f9ba9dc20a4d0)

[Bug target/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
      Known to fail|12.0                        |12.1.0
      Known to work|                            |12.1.1
             Status|ASSIGNED                    |RESOLVED

--- Comment #15 from Richard Biener <rguenth at gcc dot gnu.org> ---
Fixed.