[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:fb5a0e51cc9f435071cf46090bd8dd0aa99b895a

commit fb5a0e51cc9f435071cf46090bd8dd0aa99b895a
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Jun 8 12:54:54 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 1c40084ce43..63644d60a12 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,4 +1,4 @@
-==================== Branch work122, patch #1 ====================
+==================== Branch work122, patch #2 ====================
 
 Fix power10 fusion and -fstack-protector, PR target/105325
 
@@ -6,10 +6,12 @@ This patch fixes an issue where if you use the -fstack-protector and
 -mcpu=power10 options and you have a large stack frame, the GCC compiler will
 generate a LWA instruction with a large offset.
 
-There are several problems:
+There are several problems with the current GCC:
 
     1)	The prefixed attribute was not checking insns with the type
-	fused_load_cmpi for being load insns.
+	fused_load_cmpi for being load insns.  This meant if the load + compare
+	fusion was not split, it would not know that the load should be
+	prefixed.
 
     2)	The recognition of LWA for being prefixed looks at the "sign_extend"
 	attribute and whether the register mode was different than the memory
@@ -18,7 +20,7 @@ There are several problems:
     3)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
 	and LD, when they should use "YZ".
 
-    4)	There is a lwa_operand that should be used instead of
+    4)	There is a lwa_operand predicate that should be used instead of
 	ds_form_mem_operand for the LWA instruction.
 
 The main fix is to modify genfusion.pl that it sets the appropriate predicates
@@ -33,15 +35,15 @@ I set the "sign_extend" attribute on the cases that generate LWA.
 
 I modified the "prefixed" attribute so that it also checks fused_load_cmpi.
 
-2023-06-06   Michael Meissner  <meissner@linux.ibm.com>
+2023-06-07   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/
 
 	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix constraints and
 	predicates for LD and LWA.  Optimize LWA/CMPDI to generate LWZ/CMPWI if
-	we don't need the result of the load after the comparison.  Change the
-	name of the insn pattern to reflect whether a DImode or SImode register
-	is loaded.  Set sign_extend attribute for LWA instruction.
+	we don't need the result of the load after the comparison.  Set the
+	sign_extend attribute for LWA instruction.  For LWA where we do not need
+	the result of the load after the comparison, use LWZ and CMPWI.
 	* config/rs6000/fusion.md: Regenerate.
 	* config/rs6000/rs6000.md (prefixed attribute): Treat fused_load_cmpi
 	insns as being load insns.
@@ -52,6 +54,8 @@ gcc/testsuite/
 	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust names and insn counts
 	for PR target/105325 fix.
 
+==================== Branch work122, patch #1 was reverted ====================
+
 ==================== Branch work122, baseline ====================
 
 2023-06-06   Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:1eba9b607cc94a5a32cdc66d6af24816b726a49f

commit 1eba9b607cc94a5a32cdc66d6af24816b726a49f
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Jun 13 19:25:46 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 50cef5a69f0..c44d1349a22 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -42,29 +42,34 @@ The solution involves:
     1)	Don't use ds_form_mem_operand for ld and lwa, always use
 	non_update_memory_operand.
 
-    2)	Delete ds_form_mem_operand since it is no longer use.
+    2)	Delete ds_form_mem_operand since it is no longer used.
 
     3)	Use the "YZ" constraints for ld/lwa instead of "m".
 
-    4)	Insure that the insn will be recognized as having a prefixed operand
-	(and hence the instruction length is 16 bytes instead of 8 bytes).
+    4)	If we don't need to sign extend the lwa, convert it to lwz, and use
+	cmpwi instead of cmpdi.  Adjust the insn name to reflect the code
+	generate.
 
-	4a) Set the prefixed and maybe_prefix attributes to know that
+    5)	Insure that the insn using lwa will be recognized as having a prefixed
+	operand (and hence the instruction length is 16 bytes instead of 8
+	bytes).
+
+	5a) Set the prefixed and maybe_prefix attributes to know that
 	    fused_load_cmpi are also load insns;
 
-	4b) In the case where we are just setting CC and not using the memory
+	5b) In the case where we are just setting CC and not using the memory
 	    afterward, set the clobber to use a DI register, and put an
 	    explicit sign_extend operation in the split;
 
-	4c) Set the sign_extend attribute to "yes".
+	5c) Set the sign_extend attribute to "yes".
 
-	4d) 4a-4c are the things that prefixed_load_p in rs6000.cc checks to
+	5d) 5a-5c are the things that prefixed_load_p in rs6000.cc checks to
 	    ensure that lwa is treated as a ds-form instruction and not as
 	    a d-form instruction (i.e. lwz).
 
-    5)	Add a new test case for this case.
+    6)	Add a new test case for this case.
 
-    6)	Adjust the insn counts in fusion-p10-ldcmpi.c.  Because we are no
+    7)	Adjust the insn counts in fusion-p10-ldcmpi.c.  Because we are no
 	longer using ds_form_mem_operand, the ld and lwa instructions will fuse
 	x-form (reg+reg) addresses in addition ds-form (reg+offset or reg).

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:6b3659d8b2093c33897ff3e4c5a9ef538e96c007

commit 6b3659d8b2093c33897ff3e4c5a9ef538e96c007
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Jun 13 13:23:19 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 80 +++++++++++++++++++++++++++++++++++++++-----------
 1 file changed, 63 insertions(+), 17 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 9fcb57178b8..50cef5a69f0 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,4 +1,4 @@
-==================== Branch work122, patch #5 ====================
+==================== Branch work122, patch #8 ====================
 
 Fix power10 fusion and -fstack-protector, PR target/105325
 
@@ -6,26 +6,67 @@ This patch fixes an issue where if you use the -fstack-protector and
 -mcpu=power10 options and you have a large stack frame, the GCC compiler will
 generate a LWA instruction with a large offset.
 
-There are several problems with the current GCC:
+The important thing in the bug is that -fstack-protector is used, but it could
+potentially happen with fused load-compare to any stack location when the stack
+frame is larger than 32K without -fstack-protector.
 
-    1)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
-	and LD, when they should use "YZ".
+What happens is the initial insn that is created is:
 
-    2)	The rules for automatically setting the prefixed attribute were not
-	checking that these fused load and compare immediate fusion operations
-	might have prefixed addresses.
+(insn 6 5 7 2 (parallel [
+            (set (reg:CC 119)
+                 (compare:CC (mem/c:SI (plus:DI (reg/f:DI 110 sfp)
+                                                (const_int -4))
+                             (const_int 0 [0])))
+            (clobber (scratch:DI))
+        ])
+     (nil))
 
-The fix is to modify genfusion.pl that it sets the "YZ" constraint instead of
-"m" for the ld and lwa instructions.
+After the stack size is finalized, the frame pointer removed, and the post
+reload phase is run, the insn is now:
 
-This patch also modifies the prefixed and maybe_prefixed attributes so that they
-check load + compare immediate instructions for be a load instruction.  The
-patch also modifies genfusion.pl so that the lwa_cmp* insns also sets things up
-so that the prefixed_load_p function declares the address to be prefixed.  These
-modifications include using a DImode scratch register instead of SImode, and
-setting the "sign_extend" attribute.
+(insn 6 5 7 2 (parallel [
+            (set (reg:CC 100 0 [119])
+                 (compare:CC (mem/c:SI (plus:DI (reg/f:DI 1 1)
+                                                (const_int 40044))
+                             (const_int 0 [0])))
+            (clobber (reg:DI 9 9 [120]))
+        ])
+     (nil))
 
-I also added a test case for this condition.
+When the split2 pass is run after reload has finished the ds_form_mem_operand
+predicate that used for lwa and ld no longer returns true.  This means that
+since the operand predicates aren't recognized, it won't be split.
+
+The solution involves:
+
+    1)	Don't use ds_form_mem_operand for ld and lwa, always use
+	non_update_memory_operand.
+
+    2)	Delete ds_form_mem_operand since it is no longer use.
+
+    3)	Use the "YZ" constraints for ld/lwa instead of "m".
+
+    4)	Insure that the insn will be recognized as having a prefixed operand
+	(and hence the instruction length is 16 bytes instead of 8 bytes).
+
+	4a) Set the prefixed and maybe_prefix attributes to know that
+	    fused_load_cmpi are also load insns;
+
+	4b) In the case where we are just setting CC and not using the memory
+	    afterward, set the clobber to use a DI register, and put an
+	    explicit sign_extend operation in the split;
+
+	4c) Set the sign_extend attribute to "yes".
+
+	4d) 4a-4c are the things that prefixed_load_p in rs6000.cc checks to
+	    ensure that lwa is treated as a ds-form instruction and not as
+	    a d-form instruction (i.e. lwz).
+
+    5)	Add a new test case for this case.
+
+    6)	Adjust the insn counts in fusion-p10-ldcmpi.c.  Because we are no
+	longer using ds_form_mem_operand, the ld and lwa instructions will fuse
+	x-form (reg+reg) addresses in addition ds-form (reg+offset or reg).
 
 2023-06-12   Michael Meissner  <meissner@linux.ibm.com>
 
@@ -34,6 +75,7 @@ gcc/
 	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
 	allowed prefixed lwa to be generated.
 	* config/rs6000/fusion.md: Regenerate.
+	* config/rs6000/predicates.md (ds_form_mem_operand): Delete.
 	* config/rs6000/rs6000.md (prefixed attribute): Add support for load
 	plus compare immediate fused insns.
 	(maybe_prefixed): Likewise.
@@ -41,8 +83,12 @@ gcc/
 gcc/testsuite/
 
 	* g++.target/powerpc/pr105325.C: New test.
+	* gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c: Update insn
+	counts.
 
-==================== Branch work122, patch #5 was reverted ====================
+==================== Branch work122, patch #7 was reverted ====================
+
+==================== Branch work122, patch #6 was reverted ====================
 
 ==================== Branch work122, patch #5 was reverted ====================

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:d14423e2decc297a34a6eb24aa033c8549dab4ef

commit d14423e2decc297a34a6eb24aa033c8549dab4ef
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Jun 12 22:58:32 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 30 +++++++++++-------------------
 1 file changed, 11 insertions(+), 19 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 6bee719341e..9fcb57178b8 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -11,34 +11,23 @@ There are several problems with the current GCC:
     1)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
 	and LD, when they should use "YZ".
 
-    2)	The calls to address_is_non_pfx_d_or_x doesn't work with lwa using
-	SImode as the mode.  You need to pass in DImode instead of SImode.  This
-	is to allow lwz to be treated differently than lwa.
-
-    3)	The rules for automatically setting the prefixed attribute were not
+    2)	The rules for automatically setting the prefixed attribute were not
 	checking that these fused load and compare immediate fusion operations
 	might have prefixed addresses.
 
-    4)	We should use lwa_operand for lwa instead of ds_form_mem_operand.  The
-	lwa_operand has some additional checks for the lwa instruction.
-
 The fix is to modify genfusion.pl that it sets the "YZ" constraint instead of
 "m" for the ld and lwa instructions.
 
-This patch also passes DImode to the address_is_non_pfx_d_or_x function for the
-lwa instruction so that it properly cheks for DS form restrictions when
-splitting the insn because it won't fuse.
-
-This patch also modifies the prefixed attribute so that it checks load + compare
-immediate instructions for be a load instruction.  This means that the
-lwa_cmpdi_cr0_SI_clobber_CC_none insn must ask for a DImode scratch register
-instead of SImode scratch register and also set the sign_extend attribute.  The
-code for checking if a load is a lwa expects that the register is DImode, the
-memory is SImode, and the sign_extend attribute is set.
+This patch also modifies the prefixed and maybe_prefixed attributes so that they
+check load + compare immediate instructions for be a load instruction.  The
+patch also modifies genfusion.pl so that the lwa_cmp* insns also sets things up
+so that the prefixed_load_p function declares the address to be prefixed.  These
+modifications include using a DImode scratch register instead of SImode, and
+setting the "sign_extend" attribute.
 
 I also added a test case for this condition.
 
-2023-06-08   Michael Meissner  <meissner@linux.ibm.com>
+2023-06-12   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/
 
@@ -47,6 +36,7 @@ gcc/
 	* config/rs6000/fusion.md: Regenerate.
 	* config/rs6000/rs6000.md (prefixed attribute): Add support for load
 	plus compare immediate fused insns.
+	(maybe_prefixed): Likewise.
 
 gcc/testsuite/
 
@@ -54,6 +44,8 @@ gcc/testsuite/
 
 ==================== Branch work122, patch #5 was reverted ====================
 
+==================== Branch work122, patch #5 was reverted ====================
+
 ==================== Branch work122, patch #4 was reverted ====================
 
 ==================== Branch work122, patch #3 was reverted ====================

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:723cf62e83af1327dbf7131dba6afbeb338307ae

commit 723cf62e83af1327dbf7131dba6afbeb338307ae
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Jun 9 17:06:31 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 27 +++++++++++++++++++++++++--
 1 file changed, 25 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3ba4840234b..6bee719341e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -15,9 +15,28 @@ There are several problems with the current GCC:
 	SImode as the mode.  You need to pass in DImode instead of SImode.  This
 	is to allow lwz to be treated differently than lwa.
 
+    3)	The rules for automatically setting the prefixed attribute were not
+	checking that these fused load and compare immediate fusion operations
+	might have prefixed addresses.
+
+    4)	We should use lwa_operand for lwa instead of ds_form_mem_operand.  The
+	lwa_operand has some additional checks for the lwa instruction.
+
 The fix is to modify genfusion.pl that it sets the "YZ" constraint instead of
-"m" for the ld and lwa instructions.  And to pass DImode to the
-address_is_non_pfx_d_or_x function for lwa.
+"m" for the ld and lwa instructions.
+
+This patch also passes DImode to the address_is_non_pfx_d_or_x function for the
+lwa instruction so that it properly cheks for DS form restrictions when
+splitting the insn because it won't fuse.
+
+This patch also modifies the prefixed attribute so that it checks load + compare
+immediate instructions for be a load instruction.  This means that the
+lwa_cmpdi_cr0_SI_clobber_CC_none insn must ask for a DImode scratch register
+instead of SImode scratch register and also set the sign_extend attribute.  The
+code for checking if a load is a lwa expects that the register is DImode, the
+memory is SImode, and the sign_extend attribute is set.
+
+I also added a test case for this condition.
 
 2023-06-08   Michael Meissner  <meissner@linux.ibm.com>
 
@@ -26,11 +45,15 @@ gcc/
 	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
 	allowed prefixed lwa to be generated.
 	* config/rs6000/fusion.md: Regenerate.
+	* config/rs6000/rs6000.md (prefixed attribute): Add support for load
+	plus compare immediate fused insns.
 
 gcc/testsuite/
 
 	* g++.target/powerpc/pr105325.C: New test.
 
+==================== Branch work122, patch #5 was reverted ====================
+
 ==================== Branch work122, patch #4 was reverted ====================
 
 ==================== Branch work122, patch #3 was reverted ====================

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:10017ae72ffb1c5b518de6abe4677fb9d90fbb29

commit 10017ae72ffb1c5b518de6abe4677fb9d90fbb29
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Jun 9 02:09:59 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 055d3cd71b8..3ba4840234b 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,4 +1,4 @@
-==================== Branch work122, patch #4 ====================
+==================== Branch work122, patch #5 ====================
 
 Fix power10 fusion and -fstack-protector, PR target/105325
 
@@ -11,15 +11,13 @@ There are several problems with the current GCC:
     1)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
 	and LD, when they should use "YZ".
 
-    2)	The normal calls to address_is_non_pfx_d_or_x doesn't work with lwa,
-	because you need to pass in DImode instead of SImode.  It is simplified
-	if you use the lwa_operand predicate instead of ds_form_mem_operand.
+    2)	The calls to address_is_non_pfx_d_or_x doesn't work with lwa using
+	SImode as the mode.  You need to pass in DImode instead of SImode.  This
+	is to allow lwz to be treated differently than lwa.
 
 The fix is to modify genfusion.pl that it sets the "YZ" constraint instead of
-"m" for the ld and lwa instructions.
-
-I modified the genfusion.pl code use to use lwa_operand for the lwa instruction
-to prevent prefixed addresses at combine time.
+"m" for the ld and lwa instructions.  And to pass DImode to the
+address_is_non_pfx_d_or_x function for lwa.
 
 2023-06-08   Michael Meissner  <meissner@linux.ibm.com>
 
@@ -33,6 +31,8 @@ gcc/testsuite/
 
 	* g++.target/powerpc/pr105325.C: New test.
 
+==================== Branch work122, patch #4 was reverted ====================
+
 ==================== Branch work122, patch #3 was reverted ====================
 
 ==================== Branch work122, patch #2 was reverted ====================

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:c2bb4e2b5131154648979c748d2029df2e457abb

commit c2bb4e2b5131154648979c748d2029df2e457abb
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Jun 9 00:18:09 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 35 ++++++++++-------------------------
 1 file changed, 10 insertions(+), 25 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 3bca12eb10e..055d3cd71b8 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,4 +1,4 @@
-==================== Branch work122, patch #2 ====================
+==================== Branch work122, patch #4 ====================
 
 Fix power10 fusion and -fstack-protector, PR target/105325
 
@@ -8,48 +8,33 @@ generate a LWA instruction with a large offset.
 
 There are several problems with the current GCC:
 
-    1)	The prefixed attribute was not checking insns with the type
-	fused_load_cmpi for being load insns.  This meant if the load + compare
-	fusion was not split, the insn size might be off, and the wrong
-	instruction might be generated.
-
-    2)	The code in prefixed_load_p looks at the "sign_extend" attribute and
-	whether the register mode was different than the memory for SImode loads
-	to detect LWA instructions.
-
-    3)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
+    1)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
 	and LD, when they should use "YZ".
 
-    4)	The code to determine whether to split the insn if it has a prefixed
-	address was passing in SImode.  For LWA, we need to pass in DImode and
-	not SImode to properly determine if the address is prefixed.
+    2)	The normal calls to address_is_non_pfx_d_or_x doesn't work with lwa,
+	because you need to pass in DImode instead of SImode.  It is simplified
+	if you use the lwa_operand predicate instead of ds_form_mem_operand.
 
 The fix is to modify genfusion.pl that it sets the "YZ" constraint instead of
 "m" for the ld and lwa instructions.
 
-I also set the signed attribute on the HI/SImode loads that do sign extension.
-
-I modified the predicate for lwa to use lwa_operand instead of the predicate
-ds_form_mem_operand.  This predicate has direct checks to prevent a prefixed lwa
-from being generated.  I also modified the condition for the insn splitter so
-that it passes DImode for the lwa instructions and not SImode.
+I modified the genfusion.pl code use to use lwa_operand for the lwa instruction
+to prevent prefixed addresses at combine time.
 
-I modified the "prefixed" attribute so that it also checks fused_load_cmpi.
-
-2023-06-07   Michael Meissner  <meissner@linux.ibm.com>
+2023-06-08   Michael Meissner  <meissner@linux.ibm.com>
 
 gcc/
 
 	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
 	allowed prefixed lwa to be generated.
 	* config/rs6000/fusion.md: Regenerate.
-	* config/rs6000/rs6000.md (prefixed attribute): Treat fused_load_cmpi
-	insns as being load insns.
 
 gcc/testsuite/
 
 	* g++.target/powerpc/pr105325.C: New test.
 
+==================== Branch work122, patch #3 was reverted ====================
+
 ==================== Branch work122, patch #2 was reverted ====================
 
 ==================== Branch work122, patch #1 was reverted ====================

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:7dd6680a5397d2f23f4fba8bb91f7739bd244e23

commit 7dd6680a5397d2f23f4fba8bb91f7739bd244e23
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Jun 8 21:33:22 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 40 +++++++++++++++++++---------------------
 1 file changed, 19 insertions(+), 21 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 63644d60a12..3bca12eb10e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -10,28 +10,29 @@ There are several problems with the current GCC:
 
     1)	The prefixed attribute was not checking insns with the type
 	fused_load_cmpi for being load insns.  This meant if the load + compare
-	fusion was not split, it would not know that the load should be
-	prefixed.
+	fusion was not split, the insn size might be off, and the wrong
+	instruction might be generated.
 
-    2)	The recognition of LWA for being prefixed looks at the "sign_extend"
-	attribute and whether the register mode was different than the memory
-	load (i.e. does it have a sign_extend wrapper around the load).
+    2)	The code in prefixed_load_p looks at the "sign_extend" attribute and
+	whether the register mode was different than the memory for SImode loads
+	to detect LWA instructions.
 
     3)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
 	and LD, when they should use "YZ".
 
-    4)	There is a lwa_operand predicate that should be used instead of
-	ds_form_mem_operand for the LWA instruction.
+    4)	The code to determine whether to split the insn if it has a prefixed
+	address was passing in SImode.  For LWA, we need to pass in DImode and
+	not SImode to properly determine if the address is prefixed.
 
-The main fix is to modify genfusion.pl that it sets the appropriate predicates
-and constraints.
+The fix is to modify genfusion.pl that it sets the "YZ" constraint instead of
+"m" for the ld and lwa instructions.
 
-I also added support in genfusion.md so that if we are doing a LWA operation and
-just setting the CC bits (throwing away the result of the load after the
-comparison), it generates a LWZ instruction and does a CMPWI instead of CMPDI.
-This way those loads can use normal D-FORM restrictions instead of DS-form.
+I also set the signed attribute on the HI/SImode loads that do sign extension.
 
-I set the "sign_extend" attribute on the cases that generate LWA.
+I modified the predicate for lwa to use lwa_operand instead of the predicate
+ds_form_mem_operand.  This predicate has direct checks to prevent a prefixed lwa
+from being generated.  I also modified the condition for the insn splitter so
+that it passes DImode for the lwa instructions and not SImode.
 
 I modified the "prefixed" attribute so that it also checks fused_load_cmpi.
 
@@ -39,11 +40,8 @@ I modified the "prefixed" attribute so that it also checks fused_load_cmpi.
 
 gcc/
 
-	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix constraints and
-	predicates for LD and LWA.  Optimize LWA/CMPDI to generate LWZ/CMPWI if
-	we don't need the result of the load after the comparison.  Set the
-	sign_extend attribute for LWA instruction.  For LWA where we do not need
-	the result of the load after the comparison, use LWZ and CMPWI.
+	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
+	allowed prefixed lwa to be generated.
 	* config/rs6000/fusion.md: Regenerate.
 	* config/rs6000/rs6000.md (prefixed attribute): Treat fused_load_cmpi
 	insns as being load insns.
@@ -51,8 +49,8 @@ gcc/
 gcc/testsuite/
 
 	* g++.target/powerpc/pr105325.C: New test.
-	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust names and insn counts
-	for PR target/105325 fix.
+
+==================== Branch work122, patch #2 was reverted ====================
 
 ==================== Branch work122, patch #1 was reverted ====================

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:f3e67c49a8c22d0eeb10697dab9840071fe7b413

commit f3e67c49a8c22d0eeb10697dab9840071fe7b413
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Jun 7 16:58:55 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 98e7004b034..1c40084ce43 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -49,11 +49,11 @@ gcc/
 gcc/testsuite/
 
 	* g++.target/powerpc/pr105325.C: New test.
-
+	* gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust names and insn counts
+	for PR target/105325 fix.
 
 ==================== Branch work122, baseline ====================
 
 2023-06-06   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
-

[gcc(refs/users/meissner/heads/work122)] Update ChangeLog.meissner

[Michael Meissner]

https://gcc.gnu.org/g:415f216b7a5559f3cb6eed910820e6be9da5cd15

commit 415f216b7a5559f3cb6eed910820e6be9da5cd15
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Jun 7 14:57:56 2023 -0400

    Update ChangeLog.meissner

Diff:
---
 gcc/ChangeLog.meissner | 53 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 108f9865e9e..98e7004b034 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,56 @@
+==================== Branch work122, patch #1 ====================
+
+Fix power10 fusion and -fstack-protector, PR target/105325
+
+This patch fixes an issue where if you use the -fstack-protector and
+-mcpu=power10 options and you have a large stack frame, the GCC compiler will
+generate a LWA instruction with a large offset.
+
+There are several problems:
+
+    1)	The prefixed attribute was not checking insns with the type
+	fused_load_cmpi for being load insns.
+
+    2)	The recognition of LWA for being prefixed looks at the "sign_extend"
+	attribute and whether the register mode was different than the memory
+	load (i.e. does it have a sign_extend wrapper around the load).
+
+    3)	The constraints in fusion.md (generated by genfusion.pl) use "m" for LWA
+	and LD, when they should use "YZ".
+
+    4)	There is a lwa_operand that should be used instead of
+	ds_form_mem_operand for the LWA instruction.
+
+The main fix is to modify genfusion.pl that it sets the appropriate predicates
+and constraints.
+
+I also added support in genfusion.md so that if we are doing a LWA operation and
+just setting the CC bits (throwing away the result of the load after the
+comparison), it generates a LWZ instruction and does a CMPWI instead of CMPDI.
+This way those loads can use normal D-FORM restrictions instead of DS-form.
+
+I set the "sign_extend" attribute on the cases that generate LWA.
+
+I modified the "prefixed" attribute so that it also checks fused_load_cmpi.
+
+2023-06-06   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+
+	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix constraints and
+	predicates for LD and LWA.  Optimize LWA/CMPDI to generate LWZ/CMPWI if
+	we don't need the result of the load after the comparison.  Change the
+	name of the insn pattern to reflect whether a DImode or SImode register
+	is loaded.  Set sign_extend attribute for LWA instruction.
+	* config/rs6000/fusion.md: Regenerate.
+	* config/rs6000/rs6000.md (prefixed attribute): Treat fused_load_cmpi
+	insns as being load insns.
+
+gcc/testsuite/
+
+	* g++.target/powerpc/pr105325.C: New test.
+
+
 ==================== Branch work122, baseline ====================
 
 2023-06-06   Michael Meissner  <meissner@linux.ibm.com>