Re: [PATCH 5/7] RISC-V: Recognize bexti in negated if-conversion

[Jeff Law <jeffreyalaw@gmail.com>]

On 11/12/22 14:29, Philipp Tomsich wrote:
> While the positive case "if ((bits >> SHAMT) & 1)" for SHAMT 0..10 can
> trigger conversion into efficient branchless sequences
>    - with Zbs (bexti + neg + and)
>    - with XVentanaCondOps (andi + vt.maskc)
> the inverted/negated case results in
>    andi a5,a0,1024
>    seqz a5,a5
>    neg a5,a5
>    and a5,a5,a1
> due to how the sequence presents to the combine pass.
>
> This adds an additional splitter to reassociate the polarity reversed
> case into bexti + addi, if Zbs is present.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
>
> gcc/ChangeLog:
>
>      * config/riscv/xventanacondops.md: Add split to reassociate
>        "andi + seqz + neg" into "bexti + addi".

OK once we've cleared the non-technical hurdles to committing vendor 
specific extensions.


Seeing the number of re association splitters that have been submitted 
and the fact that there's been a fair amount of commonality makes me 
wonder if we should instead be beefing up the generic split point code 
in combine.  Though IIRC that code may be strictly splitting without 
reassociation or rewriting..  Hmm, anyway, worth keeping in mind that we 
have some generic code to try and find good points to break down a 
complex insn into components that might be recognizable.


jeff