Re: [PATCH 3/7] RISC-V: Support noce_try_store_flag_mask as vt.maskc<n>

[Jeff Law <jeffreyalaw@gmail.com>]

On 11/12/22 14:29, Philipp Tomsich wrote:
> When if-conversion in noce_try_store_flag_mask starts the sequence off
> with an order-operator, our patterns for vt.maskc<n> will receive the
> result of the order-operator as a register argument; consequently,
> they can't know that the result will be either 1 or 0.
>
> To convey this information (and make vt.maskc<n> applicable), we wrap
> the result of the order-operator in a eq/ne against (const_int 0).
> This commit adds the split pattern to handle these cases.
>
> gcc/ChangeLog:
>
> 	* config/riscv/xventanacondops.md: Add split to wrap an an
>            order-operator suitably for generating vt.maskc<n>.
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
>
> Ref vrull/gcc#157
>
> RISC-V: Recognize 'ge<u>'/'le<u>' operators as 'slt<u>'/'sgt<u>'
>
> During if-conversion, if noce_try_store_flag_mask succeeds, we may see
>      if (cur < next) {
>          next = 0;
>      }
> transformed into
>     27: r82:SI=ltu(r76:DI,r75:DI)
>        REG_DEAD r76:DI
>     28: r81:SI=r82:SI^0x1
>        REG_DEAD r82:SI
>     29: r80:DI=zero_extend(r81:SI)
>        REG_DEAD r81:SI
>
> This currently escapes the combiner, as RISC-V does not have a pattern
> to apply the 'slt' instruction to 'geu' verbs.  By adding a pattern in
> this commit, we match such cases.
>
> gcc/ChangeLog:
>
> 	* config/riscv/predicates.md (anyge_operator): Define.
> 	(anygt_operator): Define.
> 	(anyle_operator): Define.
> 	(anylt_operator): Define.
> 	* config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>): Add a
> 	  pattern to map 'geu' onto slt w/ reversed operands.
> 	* config/riscv/riscv.md: Helpers for ge & le.
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/riscv/xventanacondops-le-01.c: New test.
> 	* gcc.target/riscv/xventanacondops-lt-03.c: New test.

Presumably the two splitters in riscv.md can't live in 
xventanacondops.md due to ordering issues?

OK once we've cleared the non-technical hurdles to committing vendor 
specific extensions.


Jeff