public inbox for libc-alpha@sourceware.org
 help / color / mirror / Atom feed
* [PATCH] LoongArch: Add soft floating-point fe* function implementations.
@ 2024-03-26 12:46 caiyinyu
  2024-03-26 17:34 ` Joseph Myers
  0 siblings, 1 reply; 16+ messages in thread
From: caiyinyu @ 2024-03-26 12:46 UTC (permalink / raw)
  To: libc-alpha; +Cc: adhemerval.zanella, xry111, caiyinyu

This patch accomplishes the following:
1. Implements soft floating-point functions to enhance compatibility and
  flexibility in environments without hardware floating-point support.
2. Refactors macro definitions by moving them from `fenv_libc.h` to
  `fpu_control.h`. This change not only simplifies the codebase but also
  eliminates the need for the unexported header file `fenv_libc.h`,
  streamlining the inclusion of floating-point utilities across different
  modules.

Signed-off-by: caiyinyu <caiyinyu@loongson.cn>
---
 sysdeps/loongarch/fpu/fclrexcpt.c             |  1 -
 sysdeps/loongarch/fpu/fedisblxcpt.c           |  3 +-
 sysdeps/loongarch/fpu/feenablxcpt.c           |  3 +-
 sysdeps/loongarch/fpu/fegetexcept.c           |  3 +-
 sysdeps/loongarch/fpu_control.h               | 29 +++++++------
 sysdeps/loongarch/math_private.h              |  1 -
 sysdeps/loongarch/nofpu/Makefile              | 10 +++++
 sysdeps/loongarch/nofpu/Subdirs               |  1 +
 sysdeps/loongarch/nofpu/Versions              |  5 +++
 sysdeps/loongarch/nofpu/fclrexcpt.c           | 37 ++++++++++++++++
 .../{fpu/fenv_libc.h => nofpu/fedisblxcpt.c}  | 24 ++++++-----
 sysdeps/loongarch/nofpu/feenablxcpt.c         | 32 ++++++++++++++
 sysdeps/loongarch/nofpu/fegetenv.c            | 32 ++++++++++++++
 sysdeps/loongarch/nofpu/fegetexcept.c         | 26 +++++++++++
 sysdeps/loongarch/nofpu/fegetmode.c           | 27 ++++++++++++
 sysdeps/loongarch/nofpu/fegetround.c          | 29 +++++++++++++
 sysdeps/loongarch/nofpu/feholdexcpt.c         | 37 ++++++++++++++++
 sysdeps/loongarch/nofpu/fesetenv.c            | 37 ++++++++++++++++
 sysdeps/loongarch/nofpu/fesetexcept.c         | 27 ++++++++++++
 sysdeps/loongarch/nofpu/fesetmode.c           | 34 +++++++++++++++
 sysdeps/loongarch/nofpu/fesetround.c          | 36 ++++++++++++++++
 sysdeps/loongarch/nofpu/feupdateenv.c         | 43 +++++++++++++++++++
 sysdeps/loongarch/nofpu/fgetexcptflg.c        | 28 ++++++++++++
 sysdeps/loongarch/nofpu/fraiseexcpt.c         | 42 ++++++++++++++++++
 sysdeps/loongarch/nofpu/fsetexcptflg.c        | 35 +++++++++++++++
 sysdeps/loongarch/nofpu/ftestexcept.c         | 27 ++++++++++++
 sysdeps/loongarch/nofpu/get-rounding-mode.h   | 34 +++++++++++++++
 sysdeps/loongarch/nofpu/sim-full.c            | 23 ++++++++++
 sysdeps/loongarch/nofpu/soft-supp.h           | 20 +++++++++
 29 files changed, 654 insertions(+), 32 deletions(-)
 create mode 100644 sysdeps/loongarch/nofpu/Makefile
 create mode 100644 sysdeps/loongarch/nofpu/Subdirs
 create mode 100644 sysdeps/loongarch/nofpu/Versions
 create mode 100644 sysdeps/loongarch/nofpu/fclrexcpt.c
 rename sysdeps/loongarch/{fpu/fenv_libc.h => nofpu/fedisblxcpt.c} (62%)
 create mode 100644 sysdeps/loongarch/nofpu/feenablxcpt.c
 create mode 100644 sysdeps/loongarch/nofpu/fegetenv.c
 create mode 100644 sysdeps/loongarch/nofpu/fegetexcept.c
 create mode 100644 sysdeps/loongarch/nofpu/fegetmode.c
 create mode 100644 sysdeps/loongarch/nofpu/fegetround.c
 create mode 100644 sysdeps/loongarch/nofpu/feholdexcpt.c
 create mode 100644 sysdeps/loongarch/nofpu/fesetenv.c
 create mode 100644 sysdeps/loongarch/nofpu/fesetexcept.c
 create mode 100644 sysdeps/loongarch/nofpu/fesetmode.c
 create mode 100644 sysdeps/loongarch/nofpu/fesetround.c
 create mode 100644 sysdeps/loongarch/nofpu/feupdateenv.c
 create mode 100644 sysdeps/loongarch/nofpu/fgetexcptflg.c
 create mode 100644 sysdeps/loongarch/nofpu/fraiseexcpt.c
 create mode 100644 sysdeps/loongarch/nofpu/fsetexcptflg.c
 create mode 100644 sysdeps/loongarch/nofpu/ftestexcept.c
 create mode 100644 sysdeps/loongarch/nofpu/get-rounding-mode.h
 create mode 100644 sysdeps/loongarch/nofpu/sim-full.c
 create mode 100644 sysdeps/loongarch/nofpu/soft-supp.h

diff --git a/sysdeps/loongarch/fpu/fclrexcpt.c b/sysdeps/loongarch/fpu/fclrexcpt.c
index 4301b1fd68..6ed9989760 100644
--- a/sysdeps/loongarch/fpu/fclrexcpt.c
+++ b/sysdeps/loongarch/fpu/fclrexcpt.c
@@ -17,7 +17,6 @@
    <https://www.gnu.org/licenses/>.  */
 
 #include <fenv.h>
-#include <fenv_libc.h>
 #include <fpu_control.h>
 
 int
diff --git a/sysdeps/loongarch/fpu/fedisblxcpt.c b/sysdeps/loongarch/fpu/fedisblxcpt.c
index a3f92f108d..5563e51d28 100644
--- a/sysdeps/loongarch/fpu/fedisblxcpt.c
+++ b/sysdeps/loongarch/fpu/fedisblxcpt.c
@@ -17,7 +17,6 @@
    <https://www.gnu.org/licenses/>.  */
 
 #include <fenv.h>
-#include <fenv_libc.h>
 #include <fpu_control.h>
 
 int
@@ -28,7 +27,7 @@ fedisableexcept (int excepts)
   /* Get the current control word.  */
   _FPU_GETCW (new_exc);
 
-  old_exc = (new_exc & ENABLE_MASK) << ENABLE_SHIFT;
+  old_exc = (new_exc & _FPU_ENABLE_MASK) << ENABLE_SHIFT;
 
   excepts &= FE_ALL_EXCEPT;
 
diff --git a/sysdeps/loongarch/fpu/feenablxcpt.c b/sysdeps/loongarch/fpu/feenablxcpt.c
index 9b415f09b7..84dc49db2a 100644
--- a/sysdeps/loongarch/fpu/feenablxcpt.c
+++ b/sysdeps/loongarch/fpu/feenablxcpt.c
@@ -17,7 +17,6 @@
    <https://www.gnu.org/licenses/>.  */
 
 #include <fenv.h>
-#include <fenv_libc.h>
 #include <fpu_control.h>
 
 int
@@ -28,7 +27,7 @@ feenableexcept (int excepts)
   /* Get the current control word.  */
   _FPU_GETCW (new_exc);
 
-  old_exc = (new_exc & ENABLE_MASK) << ENABLE_SHIFT;
+  old_exc = (new_exc & _FPU_ENABLE_MASK) << ENABLE_SHIFT;
 
   excepts &= FE_ALL_EXCEPT;
 
diff --git a/sysdeps/loongarch/fpu/fegetexcept.c b/sysdeps/loongarch/fpu/fegetexcept.c
index a57543fcd3..32ad3332ab 100644
--- a/sysdeps/loongarch/fpu/fegetexcept.c
+++ b/sysdeps/loongarch/fpu/fegetexcept.c
@@ -17,7 +17,6 @@
    <https://www.gnu.org/licenses/>.  */
 
 #include <fenv.h>
-#include <fenv_libc.h>
 #include <fpu_control.h>
 
 int
@@ -28,5 +27,5 @@ fegetexcept (void)
   /* Get the current control word.  */
   _FPU_GETCW (exc);
 
-  return (exc & ENABLE_MASK) << ENABLE_SHIFT;
+  return (exc & _FPU_ENABLE_MASK) << ENABLE_SHIFT;
 }
diff --git a/sysdeps/loongarch/fpu_control.h b/sysdeps/loongarch/fpu_control.h
index 54add4e01c..5a8148e781 100644
--- a/sysdeps/loongarch/fpu_control.h
+++ b/sysdeps/loongarch/fpu_control.h
@@ -51,10 +51,25 @@
 
 #include <features.h>
 
+#define _FPU_DEFAULT 0x0
+#define _FPU_IEEE 0x1F
+/* Mask for rounding control/enable/cause fields.  */
+#define _FPU_RC_MASK 0x300
+#define _FPU_ENABLE_MASK 0x0000001f
+#define _FPU_CAUSE_MASK  0x1f000000
+/* Shift for FE_* flags to get up to the ENABLE bits and the CAUSE bits.  */
+#define ENABLE_SHIFT 16
+#define CAUSE_SHIFT 8
+/* Masks for interrupts.  */
+#define _FPU_MASK_V 0x10 /* Invalid operation */
+#define _FPU_MASK_Z 0x08 /* Division by zero  */
+#define _FPU_MASK_O 0x04 /* Overflow */
+#define _FPU_MASK_U 0x02 /* Underflow */
+#define _FPU_MASK_I 0x01 /* Inexact operation */
+
 #ifdef __loongarch_soft_float
 
 #define _FPU_RESERVED 0xffffffff
-#define _FPU_DEFAULT 0x00000000
 typedef unsigned int fpu_control_t;
 #define _FPU_GETCW(cw) (cw) = 0
 #define _FPU_SETCW(cw) (void) (cw)
@@ -62,13 +77,6 @@ extern fpu_control_t __fpu_control;
 
 #else /* __loongarch_soft_float */
 
-/* Masks for interrupts.  */
-#define _FPU_MASK_V 0x10 /* Invalid operation */
-#define _FPU_MASK_Z 0x08 /* Division by zero  */
-#define _FPU_MASK_O 0x04 /* Overflow */
-#define _FPU_MASK_U 0x02 /* Underflow */
-#define _FPU_MASK_I 0x01 /* Inexact operation */
-
 /* Flush denormalized numbers to zero.  */
 #define _FPU_FLUSH_TZ 0x1000000
 
@@ -77,14 +85,9 @@ extern fpu_control_t __fpu_control;
 #define _FPU_RC_ZERO 0x100
 #define _FPU_RC_UP 0x200
 #define _FPU_RC_DOWN 0x300
-/* Mask for rounding control.  */
-#define _FPU_RC_MASK 0x300
 
 #define _FPU_RESERVED 0x0
 
-#define _FPU_DEFAULT 0x0
-#define _FPU_IEEE 0x1F
-
 /* Type of the control word.  */
 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
 
diff --git a/sysdeps/loongarch/math_private.h b/sysdeps/loongarch/math_private.h
index 40cd54c8cf..a2708a4af8 100644
--- a/sysdeps/loongarch/math_private.h
+++ b/sysdeps/loongarch/math_private.h
@@ -27,7 +27,6 @@
 #ifdef __loongarch_hard_float
 
 #include <fenv.h>
-#include <fenv_libc.h>
 #include <fpu_control.h>
 
 #define _FPU_MASK_ALL \
diff --git a/sysdeps/loongarch/nofpu/Makefile b/sysdeps/loongarch/nofpu/Makefile
new file mode 100644
index 0000000000..53b015c3dc
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/Makefile
@@ -0,0 +1,10 @@
+# Makefile fragment for LoongArch with no FPU.
+
+ifeq ($(subdir),soft-fp)
+sysdep_routines += $(gcc-single-routines) $(gcc-double-routines) \
+		   sim-full
+endif
+
+ifeq ($(subdir),math)
+CPPFLAGS += -I../soft-fp/
+endif
diff --git a/sysdeps/loongarch/nofpu/Subdirs b/sysdeps/loongarch/nofpu/Subdirs
new file mode 100644
index 0000000000..87eadf3024
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/Subdirs
@@ -0,0 +1 @@
+soft-fp
diff --git a/sysdeps/loongarch/nofpu/Versions b/sysdeps/loongarch/nofpu/Versions
new file mode 100644
index 0000000000..6d7f6aae6c
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/Versions
@@ -0,0 +1,5 @@
+libc {
+  GLIBC_PRIVATE {
+    __sim_cw_thread;
+  }
+}
diff --git a/sysdeps/loongarch/nofpu/fclrexcpt.c b/sysdeps/loongarch/nofpu/fclrexcpt.c
new file mode 100644
index 0000000000..2938331a09
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fclrexcpt.c
@@ -0,0 +1,37 @@
+/* Clear floating-point exceptions (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+feclearexcept (int excepts)
+{
+  /* Mask out unsupported bits/exceptions.  */
+  excepts &= FE_ALL_EXCEPT;
+
+  /* Clear exception flag bits and cause bits.  If the cause bit is not
+     cleared, the next CTC instruction (just below) will re-generate the
+     exception.  */
+
+  __sim_cw_thread &= ~(excepts | (excepts << CAUSE_SHIFT));
+
+  return 0;
+}
+
+libm_hidden_weak (feclearexcept)
diff --git a/sysdeps/loongarch/fpu/fenv_libc.h b/sysdeps/loongarch/nofpu/fedisblxcpt.c
similarity index 62%
rename from sysdeps/loongarch/fpu/fenv_libc.h
rename to sysdeps/loongarch/nofpu/fedisblxcpt.c
index 639e0b16b2..293b530461 100644
--- a/sysdeps/loongarch/fpu/fenv_libc.h
+++ b/sysdeps/loongarch/nofpu/fedisblxcpt.c
@@ -1,5 +1,5 @@
-/* Internal libc stuff for floating point environment routines.
-   Copyright (C) 2022-2024 Free Software Foundation, Inc.
+/* Disable exceptions (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -16,15 +16,17 @@
    License along with the GNU C Library.  If not, see
    <https://www.gnu.org/licenses/>.  */
 
-#ifndef _FENV_LIBC_H
-#define _FENV_LIBC_H 1
+#include "soft-fp.h"
+#include "soft-supp.h"
 
-/* Mask for enabling exceptions and for the CAUSE bits.  */
-#define ENABLE_MASK 0x0000001FU
-#define CAUSE_MASK 0x1F000000U
+int
+fedisableexcept (int excepts)
+{
+  unsigned int old_exc = (__sim_cw_thread & _FPU_ENABLE_MASK) << ENABLE_SHIFT;
 
-/* Shift for FE_* flags to get up to the ENABLE bits and the CAUSE bits.  */
-#define ENABLE_SHIFT 16
-#define CAUSE_SHIFT 8
+  excepts &= FE_ALL_EXCEPT;
 
-#endif /* _FENV_LIBC_H */
+  __sim_cw_thread &= ~(excepts >> ENABLE_SHIFT);
+
+  return old_exc;
+}
diff --git a/sysdeps/loongarch/nofpu/feenablxcpt.c b/sysdeps/loongarch/nofpu/feenablxcpt.c
new file mode 100644
index 0000000000..8dfbe371ea
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/feenablxcpt.c
@@ -0,0 +1,32 @@
+/* Enable exceptions (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+feenableexcept (int excepts)
+{
+  int old_exc = (__sim_cw_thread & _FPU_ENABLE_MASK) << ENABLE_SHIFT;
+
+  excepts &= FE_ALL_EXCEPT;
+
+  __sim_cw_thread |= excepts >> ENABLE_SHIFT;
+
+  return old_exc;
+}
diff --git a/sysdeps/loongarch/nofpu/fegetenv.c b/sysdeps/loongarch/nofpu/fegetenv.c
new file mode 100644
index 0000000000..7bccaf0250
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fegetenv.c
@@ -0,0 +1,32 @@
+/* Store current floating-point environment (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+__fegetenv (fenv_t *envp)
+{
+
+  envp->__fp_control_register = __sim_cw_thread;
+
+  return 0;
+}
+
+libm_hidden_def (__fegetenv) weak_alias (__fegetenv, fegetenv)
+libm_hidden_weak (fegetenv)
diff --git a/sysdeps/loongarch/nofpu/fegetexcept.c b/sysdeps/loongarch/nofpu/fegetexcept.c
new file mode 100644
index 0000000000..fab16a6485
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fegetexcept.c
@@ -0,0 +1,26 @@
+/* Get floating-point exceptions (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+fegetexcept (void)
+{
+  return (__sim_cw_thread & _FPU_ENABLE_MASK) << ENABLE_SHIFT;
+}
diff --git a/sysdeps/loongarch/nofpu/fegetmode.c b/sysdeps/loongarch/nofpu/fegetmode.c
new file mode 100644
index 0000000000..7751fe86a0
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fegetmode.c
@@ -0,0 +1,27 @@
+/* Store current floating-point control modes (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+fegetmode (femode_t *modep)
+{
+  *modep = __sim_cw_thread;
+  return 0;
+}
diff --git a/sysdeps/loongarch/nofpu/fegetround.c b/sysdeps/loongarch/nofpu/fegetround.c
new file mode 100644
index 0000000000..db440c1707
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fegetround.c
@@ -0,0 +1,29 @@
+/* Return current rounding mode (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+__fegetround (void)
+{
+  return __sim_cw_thread & _FPU_RC_MASK;
+}
+
+libm_hidden_def (__fegetround) weak_alias (__fegetround, fegetround)
+libm_hidden_weak (fegetround)
diff --git a/sysdeps/loongarch/nofpu/feholdexcpt.c b/sysdeps/loongarch/nofpu/feholdexcpt.c
new file mode 100644
index 0000000000..bbf106f41e
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/feholdexcpt.c
@@ -0,0 +1,37 @@
+/* Store current floating-point environment and clear exceptions
+   (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+__feholdexcept (fenv_t *envp)
+{
+
+  envp->__fp_control_register = __sim_cw_thread;
+
+  /* Clear all exception enable bits and flags.  */
+  __sim_cw_thread &= ~(_FPU_MASK_V | _FPU_MASK_Z | _FPU_MASK_O | _FPU_MASK_U
+		      | _FPU_MASK_I | FE_ALL_EXCEPT);
+
+  return 0;
+}
+
+libm_hidden_def (__feholdexcept) weak_alias (__feholdexcept, feholdexcept)
+libm_hidden_weak (feholdexcept)
diff --git a/sysdeps/loongarch/nofpu/fesetenv.c b/sysdeps/loongarch/nofpu/fesetenv.c
new file mode 100644
index 0000000000..31fd258cdb
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fesetenv.c
@@ -0,0 +1,37 @@
+/* Set floating point environment (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+__fesetenv (const fenv_t *envp)
+{
+
+  if (envp == FE_DFL_ENV)
+    __sim_cw_thread = _FPU_DEFAULT;
+  else if (envp == FE_NOMASK_ENV)
+    __sim_cw_thread = _FPU_IEEE;
+  else
+    __sim_cw_thread = envp->__fp_control_register;
+
+  return 0;
+}
+
+libm_hidden_def (__fesetenv) weak_alias (__fesetenv, fesetenv)
+libm_hidden_weak (fesetenv)
diff --git a/sysdeps/loongarch/nofpu/fesetexcept.c b/sysdeps/loongarch/nofpu/fesetexcept.c
new file mode 100644
index 0000000000..bceff28844
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fesetexcept.c
@@ -0,0 +1,27 @@
+/* Set given exception flags (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+fesetexcept (int excepts)
+{
+  __sim_cw_thread |= excepts & FE_ALL_EXCEPT;
+  return 0;
+}
diff --git a/sysdeps/loongarch/nofpu/fesetmode.c b/sysdeps/loongarch/nofpu/fesetmode.c
new file mode 100644
index 0000000000..185c97372b
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fesetmode.c
@@ -0,0 +1,34 @@
+/* Install given floating-point control modes (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+#define FCSR_STATUS 0x1f1f0000
+
+int
+fesetmode (const femode_t *modep)
+{
+  __sim_cw_thread &= FCSR_STATUS;
+  if (modep == FE_DFL_MODE)
+    __sim_cw_thread |= _FPU_DEFAULT;
+  else
+    __sim_cw_thread |= *modep & ~FCSR_STATUS;
+
+  return 0;
+}
diff --git a/sysdeps/loongarch/nofpu/fesetround.c b/sysdeps/loongarch/nofpu/fesetround.c
new file mode 100644
index 0000000000..6b16ce0828
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fesetround.c
@@ -0,0 +1,36 @@
+/* Set rounding mode (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+__fesetround (int round)
+{
+  if ((round & ~_FPU_RC_MASK) != 0)
+    /* ROUND is no valid rounding mode.  */
+    return 1;
+
+  /* Set rounding bits.  */
+  __sim_cw_thread &= ~_FPU_RC_MASK;
+  __sim_cw_thread |= round;
+
+  return 0;
+}
+libm_hidden_def (__fesetround) weak_alias (__fesetround, fesetround)
+libm_hidden_weak (fesetround)
diff --git a/sysdeps/loongarch/nofpu/feupdateenv.c b/sysdeps/loongarch/nofpu/feupdateenv.c
new file mode 100644
index 0000000000..1f7c1c475f
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/feupdateenv.c
@@ -0,0 +1,43 @@
+/* Install given floating-point environment and raise exceptions
+   (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+#include <signal.h>
+
+int
+__feupdateenv (const fenv_t *envp)
+{
+  int temp;
+
+  temp = __sim_cw_thread & FE_ALL_EXCEPT;
+
+  /* Install new environment.  */
+  __fesetenv (envp);
+
+  /* Raise the saved exception.  Incidentally for us the implementation
+     defined format of the values in objects of type fexcept_t is the
+     same as the ones specified using the FE_* constants.  */
+  __feraiseexcept (temp);
+
+  return 0;
+}
+
+libm_hidden_def (__feupdateenv) weak_alias (__feupdateenv, feupdateenv)
+libm_hidden_weak (feupdateenv)
diff --git a/sysdeps/loongarch/nofpu/fgetexcptflg.c b/sysdeps/loongarch/nofpu/fgetexcptflg.c
new file mode 100644
index 0000000000..dd16932966
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fgetexcptflg.c
@@ -0,0 +1,28 @@
+/* Store current representation for exceptions (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+fegetexceptflag (fexcept_t *flagp, int excepts)
+{
+  *flagp = (fexcept_t) __sim_cw_thread & excepts & FE_ALL_EXCEPT;
+
+  return 0;
+}
diff --git a/sysdeps/loongarch/nofpu/fraiseexcpt.c b/sysdeps/loongarch/nofpu/fraiseexcpt.c
new file mode 100644
index 0000000000..b701da1f86
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fraiseexcpt.c
@@ -0,0 +1,42 @@
+/* Raise given exceptions (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+#include <signal.h>
+
+int
+__feraiseexcept (int excepts)
+{
+  int enable;
+  /* Set flag bits (which are accumulative), and *also* set the
+     cause bits.  The setting of the cause bits is what actually causes
+     the hardware to generate the exception, if the corresponding enable
+     bit is set as well.  */
+
+  excepts &= FE_ALL_EXCEPT;
+  __sim_cw_thread |= excepts | (excepts << CAUSE_SHIFT);
+  enable = __sim_cw_thread & _FPU_ENABLE_MASK;
+  if (excepts & __sim_cw_thread & (enable << ENABLE_SHIFT))
+    raise (SIGFPE);
+
+  return 0;
+}
+
+libm_hidden_def (__feraiseexcept) weak_alias (__feraiseexcept, feraiseexcept)
+libm_hidden_weak (feraiseexcept)
diff --git a/sysdeps/loongarch/nofpu/fsetexcptflg.c b/sysdeps/loongarch/nofpu/fsetexcptflg.c
new file mode 100644
index 0000000000..cd7dd18b9c
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/fsetexcptflg.c
@@ -0,0 +1,35 @@
+/* Set floating-point environment exception handling (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+fesetexceptflag (const fexcept_t *flagp, int excepts)
+{
+  /* Make sure the flags we want restored are legal.  */
+  excepts &= FE_ALL_EXCEPT;
+
+  /* Now clear the bits called for, and copy them in from flagp.  Note that
+     we ignore all non-flag bits from *flagp, so they don't matter.  */
+  __sim_cw_thread = (__sim_cw_thread & ~excepts) | (*flagp & excepts);
+
+
+  /* Success.  */
+  return 0;
+}
diff --git a/sysdeps/loongarch/nofpu/ftestexcept.c b/sysdeps/loongarch/nofpu/ftestexcept.c
new file mode 100644
index 0000000000..549661c88d
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/ftestexcept.c
@@ -0,0 +1,27 @@
+/* Test floating-point exceptions (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-fp.h"
+#include "soft-supp.h"
+
+int
+fetestexcept (int excepts)
+{
+  return __sim_cw_thread & excepts & FE_ALL_EXCEPT;
+}
+libm_hidden_def (fetestexcept)
diff --git a/sysdeps/loongarch/nofpu/get-rounding-mode.h b/sysdeps/loongarch/nofpu/get-rounding-mode.h
new file mode 100644
index 0000000000..a4808cc54e
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/get-rounding-mode.h
@@ -0,0 +1,34 @@
+/* Determine floating-point rounding mode within libc (soft-float edition).
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#ifndef _LOONGARCH_NOFPU_GET_ROUNDING_MODE_H
+#define _LOONGARCH_NOFPU_GET_ROUNDING_MODE_H	1
+
+#include <fenv.h>
+#include <fpu_control.h>
+#include "soft-supp.h"
+
+/* Return the floating-point rounding mode.  */
+
+static inline int
+get_rounding_mode (void)
+{
+  return __sim_cw_thread & _FPU_RC_MASK;
+}
+
+#endif /* get-rounding-mode.h */
diff --git a/sysdeps/loongarch/nofpu/sim-full.c b/sysdeps/loongarch/nofpu/sim-full.c
new file mode 100644
index 0000000000..a2bbb9f880
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/sim-full.c
@@ -0,0 +1,23 @@
+/* Software floating-point exception handling emulation.
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include "soft-supp.h"
+
+/* By default, no exceptions should trap.  */
+__thread int __sim_cw_thread;
+libc_hidden_tls_def (__sim_cw_thread);
diff --git a/sysdeps/loongarch/nofpu/soft-supp.h b/sysdeps/loongarch/nofpu/soft-supp.h
new file mode 100644
index 0000000000..37d83399e8
--- /dev/null
+++ b/sysdeps/loongarch/nofpu/soft-supp.h
@@ -0,0 +1,20 @@
+/* Internal support stuff for complete soft float.
+   Copyright (C) 2024 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+extern __thread int __sim_cw_thread attribute_tls_model_ie;
+libc_hidden_tls_proto (__sim_cw_thread, tls_model ("initial-exec"));
-- 
2.39.3


^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [PATCH] LoongArch: Add soft floating-point fe* function implementations.
@ 2024-04-02 14:46 caiyinyu
  0 siblings, 0 replies; 16+ messages in thread
From: caiyinyu @ 2024-04-02 14:46 UTC (permalink / raw)
  To: Florian Weimer, Xi Ruoyao; +Cc: josmyers, libc-alpha, adhemerval.zanella

[-- Attachment #1: Type: text/plain, Size: 0 bytes --]



^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2024-04-02 21:18 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-03-26 12:46 [PATCH] LoongArch: Add soft floating-point fe* function implementations caiyinyu
2024-03-26 17:34 ` Joseph Myers
2024-03-27  8:42   ` caiyinyu
2024-03-27 17:10     ` Joseph Myers
2024-03-31 10:14       ` caiyinyu
2024-04-01 13:19         ` Florian Weimer
2024-04-02  3:40           ` caiyinyu
2024-04-02 10:40             ` Xi Ruoyao
2024-04-02 11:45               ` Florian Weimer
2024-04-02 12:02                 ` Xi Ruoyao
2024-04-02 12:34                   ` Florian Weimer
2024-04-02 12:12               ` Andreas Schwab
2024-04-02 21:18             ` Joseph Myers
2024-03-31 10:31       ` caiyinyu
2024-04-02 21:10         ` Joseph Myers
2024-04-02 14:46 caiyinyu

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).