From: Dmitry Selyutin <ghostmansd@gmail.com>
To: binutils@sourceware.org
Cc: Alan Modra <amodra@gmail.com>,
Luke Kenneth Casson Leighton <luke.leighton@gmail.com>,
Dmitry Selyutin <ghostmansd@gmail.com>
Subject: [PATCH v6 5/7] ppc/svp64: support svshape instruction
Date: Mon, 25 Jul 2022 16:10:18 +0300 [thread overview]
Message-ID: <20220725131020.128550-6-ghostmansd@gmail.com> (raw)
In-Reply-To: <20220725131020.128550-1-ghostmansd@gmail.com>
https://libre-soc.org/openpower/sv/
https://libre-soc.org/openpower/sv/remap/#svshape
https://libre-soc.org/openpower/isa/simplev/
---
gas/testsuite/gas/ppc/ppc.exp | 1 +
gas/testsuite/gas/ppc/svshape.d | 13 +++++++++++++
gas/testsuite/gas/ppc/svshape.s | 5 +++++
opcodes/ppc-opc.c | 23 +++++++++++++++++++++++
4 files changed, 42 insertions(+)
create mode 100644 gas/testsuite/gas/ppc/svshape.d
create mode 100644 gas/testsuite/gas/ppc/svshape.s
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index d126d03109..ea1c591a1e 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -157,3 +157,4 @@ run_dump_test "raw"
run_dump_test "setvl"
run_dump_test "svstep"
+run_dump_test "svshape"
diff --git a/gas/testsuite/gas/ppc/svshape.d b/gas/testsuite/gas/ppc/svshape.d
new file mode 100644
index 0000000000..8244741ed3
--- /dev/null
+++ b/gas/testsuite/gas/ppc/svshape.d
@@ -0,0 +1,13 @@
+#as: -mlibresoc
+#objdump: -dr -Mlibresoc
+
+.*: file format .*
+
+
+Disassembly of section \.text:
+0+ <\.text>:
+.*: (19 00 e0 5b|5b e0 00 19) svshape 32,1,1,0,0
+.*: (19 00 1f 58|58 1f 00 19) svshape 1,32,1,0,0
+.*: (19 f8 00 58|58 00 f8 19) svshape 1,1,32,0,0
+.*: (99 07 00 58|58 00 07 99) svshape 1,1,1,15,0
+.*: (59 00 00 58|58 00 00 59) svshape 1,1,1,0,1
diff --git a/gas/testsuite/gas/ppc/svshape.s b/gas/testsuite/gas/ppc/svshape.s
new file mode 100644
index 0000000000..c83373ba37
--- /dev/null
+++ b/gas/testsuite/gas/ppc/svshape.s
@@ -0,0 +1,5 @@
+svshape 32,1,1,0,0
+svshape 1,32,1,0,0
+svshape 1,1,32,0,0
+svshape 1,1,1,15,0
+svshape 1,1,1,0,1
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 99f4c147cf..bf77083037 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -3838,6 +3838,21 @@ const struct powerpc_operand powerpc_operands[] =
#define ms vs + 1
{ 0x1, 8, NULL, NULL, 0 },
+
+#define SVLcr ms + 1
+ { 0x1, 5, NULL, NULL, 0 },
+
+#define SVxd SVLcr + 1
+ { 0x1f, 21, NULL, NULL, PPC_OPERAND_NONZERO },
+
+#define SVyd SVxd + 1
+ { 0x1f, 16, NULL, NULL, PPC_OPERAND_NONZERO },
+
+#define SVzd SVyd + 1
+ { 0x1f, 11, NULL, NULL, PPC_OPERAND_NONZERO },
+
+#define SVrm SVzd + 1
+ { 0xf, 7, NULL, NULL, 0 },
};
const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
@@ -4720,6 +4735,12 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
| (((uint64_t)(rc)) & 1))
#define SVL_MASK SVL (0x3f, 0x1f, 1)
+/* An SVM form instruction. */
+#define SVM(op, xop) \
+ (OP (op) \
+ | (((uint64_t)(xop)) & 0x3f))
+#define SVM_MASK SVM (0x3f, 0x3f)
+
/* The BO encodings used in extended conditional branch mnemonics. */
#define BODNZF (0x0)
#define BODNZFP (0x1)
@@ -6792,6 +6813,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"svstep", SVL(22,19,0), SVL_MASK, SVP64, PPCVLE, {RT, SVi, vf}},
{"svstep.", SVL(22,19,1), SVL_MASK, SVP64, PPCVLE, {RT, SVi, vf}},
+{"svshape", SVM(22,25), SVM_MASK, SVP64, PPCVLE, {SVxd, SVyd, SVzd, SVrm, vf}},
+
{"setvl", SVL(22,27,0), SVL_MASK, SVP64, PPCVLE, {RT, RA, SVi, vf, vs, ms}},
{"setvl.", SVL(22,27,1), SVL_MASK, SVP64, PPCVLE, {RT, RA, SVi, vf, vs, ms}},
--
2.37.0
next prev parent reply other threads:[~2022-07-25 13:10 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-17 19:08 [PATCH 0/5] ppc/svp64: support SVP64 and its first insns Dmitry Selyutin
2022-06-17 19:08 ` [PATCH 1/5] svp64: support LibreSOC architecture Dmitry Selyutin
2022-06-17 19:08 ` [PATCH 2/5] ppc/svp64: support setvl instructions Dmitry Selyutin
2022-06-17 19:08 ` [PATCH 3/5] ppc/svp64: support svstep instructions Dmitry Selyutin
2022-06-17 19:08 ` [PATCH 4/5] ppc/svp64: support svshape instruction Dmitry Selyutin
2022-06-19 23:49 ` [PATCH 0/5] ppc/svp64: support SVP64 and its first insns Alan Modra
2022-06-21 11:55 ` Dmitry Selyutin
2022-06-21 11:51 ` [PATCH v2 " Dmitry Selyutin
2022-06-21 11:51 ` [PATCH v2 1/5] ppc/svp64: support LibreSOC architecture Dmitry Selyutin
2022-06-21 11:51 ` [PATCH v2 2/5] ppc/svp64: support setvl instructions Dmitry Selyutin
2022-06-21 18:25 ` Peter Bergner
2022-06-21 18:39 ` Peter Bergner
2022-06-21 11:51 ` [PATCH v2 3/5] ppc/svp64: support svstep instructions Dmitry Selyutin
2022-06-21 11:51 ` [PATCH v2 4/5] ppc/svp64: support svshape instruction Dmitry Selyutin
2022-06-22 6:41 ` [PATCH v2 0/5] ppc/svp64: support SVP64 and its first insns Jan Beulich
2022-06-22 6:44 ` Jan Beulich
2022-06-22 6:57 ` Dmitry Selyutin
2022-06-23 19:37 ` [PATCH v3 0/6] " Dmitry Selyutin
2022-06-23 19:37 ` [PATCH v3 1/6] ppc/svp64: support LibreSOC architecture Dmitry Selyutin
2022-06-23 19:37 ` [PATCH v3 2/6] ppc: introduce non-zero operand Dmitry Selyutin
2022-06-23 19:58 ` lkcl
2022-06-23 19:37 ` [PATCH v3 3/6] ppc/svp64: support setvl instructions Dmitry Selyutin
2022-06-23 19:37 ` [PATCH v3 4/6] ppc/svp64: support svstep instructions Dmitry Selyutin
2022-06-23 19:37 ` [PATCH v3 5/6] ppc/svp64: support svshape instruction Dmitry Selyutin
2022-06-23 19:37 ` [PATCH v3 6/6] ppc/svp64: support svremap instruction Dmitry Selyutin
2022-06-23 19:45 ` [PATCH v3 0/6] ppc/svp64: support SVP64 and its first insns Dmitry Selyutin
2022-06-23 20:10 ` Dmitry Selyutin
2022-06-24 11:38 ` Draft Simple-V roadmap for Power ISA (was: [PATCH v3 0/6] ppc/svp64: support SVP64 and its first insns) lkcl
2022-06-23 20:08 ` [PATCH v4 0/6] ppc/svp64: support SVP64 and its first insns Dmitry Selyutin
2022-06-23 20:08 ` [PATCH v4 1/6] ppc/svp64: support LibreSOC architecture Dmitry Selyutin
2022-06-23 20:08 ` [PATCH v4 2/6] ppc: introduce non-zero operand flag Dmitry Selyutin
2022-06-23 20:08 ` [PATCH v4 3/6] ppc/svp64: support setvl instructions Dmitry Selyutin
2022-06-23 20:08 ` [PATCH v4 4/6] ppc/svp64: support svstep instructions Dmitry Selyutin
2022-06-23 20:08 ` [PATCH v4 5/6] ppc/svp64: support svshape instruction Dmitry Selyutin
2022-06-23 20:08 ` [PATCH v4 6/6] ppc/svp64: support svremap instruction Dmitry Selyutin
2022-06-26 18:59 ` [PATCH v5 0/7] ppc/svp64: support SVP64 and its first insns Dmitry Selyutin
2022-06-26 18:59 ` [PATCH v5 1/7] ppc/svp64: support LibreSOC architecture Dmitry Selyutin
2022-06-26 19:00 ` [PATCH v5 2/7] ppc: introduce non-zero operand flag Dmitry Selyutin
2022-06-26 19:00 ` [PATCH v5 3/7] ppc/svp64: support setvl instructions Dmitry Selyutin
2022-06-26 19:00 ` [PATCH v5 4/7] ppc/svp64: support svstep instructions Dmitry Selyutin
2022-06-26 19:00 ` [PATCH v5 5/7] ppc/svp64: support svshape instruction Dmitry Selyutin
2022-06-26 19:00 ` [PATCH v5 6/7] ppc/svp64: support svremap instruction Dmitry Selyutin
2022-06-26 19:00 ` [PATCH v5 7/7] ppc/svp64: support svindex instruction Dmitry Selyutin
2022-07-25 13:10 ` [PATCH v6 0/7] ppc/svp64: support SVP64 and its first insns Dmitry Selyutin
2022-07-25 13:10 ` [PATCH v6 1/7] ppc/svp64: support LibreSOC architecture Dmitry Selyutin
2022-07-25 13:10 ` [PATCH v6 2/7] ppc: introduce non-zero operand flag Dmitry Selyutin
2022-07-25 13:10 ` [PATCH v6 3/7] ppc/svp64: support setvl instructions Dmitry Selyutin
2022-08-15 6:18 ` Jan Beulich
2022-08-15 12:58 ` lkcl
2022-08-15 13:08 ` Dmitry Selyutin
2022-08-21 14:53 ` Jan Beulich
2022-08-21 16:04 ` lkcl
2022-07-25 13:10 ` [PATCH v6 4/7] ppc/svp64: support svstep instructions Dmitry Selyutin
2022-07-25 13:10 ` Dmitry Selyutin [this message]
2022-07-25 13:10 ` [PATCH v6 6/7] ppc/svp64: support svremap instruction Dmitry Selyutin
2022-07-25 13:10 ` [PATCH v6 7/7] ppc/svp64: support svindex instruction Dmitry Selyutin
2022-07-26 13:14 ` [PATCH v6 0/7] ppc/svp64: support SVP64 and its first insns Dmitry Selyutin
2022-07-27 4:53 ` Alan Modra
2022-07-27 6:38 ` lkcl
2022-08-11 9:14 ` Alan Modra
2022-08-11 10:48 ` [PATCH 0/5] " lkcl
2022-08-12 3:30 ` [PATCH v6 0/7] " Dmitry Selyutin
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