* [PATCH 00/31] aarch64: Add SME2 support
@ 2023-03-30 10:26 Richard Sandiford
2023-03-30 10:26 ` [PATCH 01/31] aarch64: Add +sme2 Richard Sandiford
` (32 more replies)
0 siblings, 33 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This series of patches adds SME2 support to the AArch64 backend.
Details on SME2 are available here:
https://developer.arm.com/documentation/ddi0602/2022-12/SME-Instructions
Tested on aarch64-linux-gnu, and via automatic cross-checking
against the architecture description and the LLVM implementation.
I've pushed the series under GWP, but I'm more than happy
to update/adjust/fix based on post-commit review, so please
let me know if you spot anything you think should be changed.
Thanks,
Richard
Richard Sandiford (31):
aarch64: Add +sme2
aarch64: Add a _10 suffix to FLD_imm3
aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
aarch64: Add support for vgx2 and vgx4
aarch64; Add support for vector offset ranges
aarch64: Add support for predicate-as-counter registers
aarch64: Add the SME2 MOVA instructions
aarch64: Add the SME2 multivector LD1 and ST1 instructions
aarch64: Add the SME2 predicate-related instructions
aarch64: Add the SME2 ZT0 instructions
aarch64: Add the SME2 ADD and SUB instructions
aarch64: Add the SME2 maximum/minimum instructions
aarch64: Add the SME2 FMLA and FMLS instructions
aarch64: Add the SME2 MLAL and MLSL instructions
aarch64: Add the SME2 MLALL and MLSLL instructions
aarch64: Add the SME2 dot-product instructions
aarch64: Add the SME2 vertical dot-product instructions
aarch64: Add the SME2 MOPA and MOPS instructions
aarch64: Add the SME2 CLAMP instructions
aarch64: Add the SME2 FP<->int conversion instructions
aarch64: Add the SME2 FP<->FP conversion instructions
aarch64: Add the SME2 saturating conversion instructions
aarch64: Add the SME2 shift instructions
aarch64: Add the SME2 UNPK instructions
aarch64: Add the SME2 UZP and ZIP instructions
aarch64: Add the SVE BFMLSL instructions
aarch64: Add new SVE dot-product instructions
aarch64: Add new SVE saturating conversion instructions
aarch64: Add new SVE shift instructions
aarch64: Add the SVE FCLAMP instruction
aarch64: Add the RPRFM instruction
gas/NEWS | 2 +
gas/config/tc-aarch64.c | 307 +-
gas/doc/c-aarch64.texi | 2 +
gas/testsuite/gas/aarch64/illegal-sve2.l | 28 +-
gas/testsuite/gas/aarch64/legacy_reg_names.l | 2 +-
gas/testsuite/gas/aarch64/rprfm-1-invalid.d | 3 +
gas/testsuite/gas/aarch64/rprfm-1-invalid.l | 11 +
gas/testsuite/gas/aarch64/rprfm-1-invalid.s | 9 +
gas/testsuite/gas/aarch64/rprfm-1.d | 83 +
gas/testsuite/gas/aarch64/rprfm-1.s | 74 +
gas/testsuite/gas/aarch64/sme-2-illegal.l | 16 +
gas/testsuite/gas/aarch64/sme-2-illegal.s | 11 +
gas/testsuite/gas/aarch64/sme-3-illegal.l | 13 +-
gas/testsuite/gas/aarch64/sme-3-illegal.s | 6 +
gas/testsuite/gas/aarch64/sme-4-illegal.l | 6 +-
gas/testsuite/gas/aarch64/sme-5-illegal.l | 10 +
gas/testsuite/gas/aarch64/sme-5-illegal.s | 9 +
gas/testsuite/gas/aarch64/sme-6-illegal.l | 10 +
gas/testsuite/gas/aarch64/sme-6-illegal.s | 9 +
gas/testsuite/gas/aarch64/sme-7-illegal.l | 20 +
gas/testsuite/gas/aarch64/sme-7-illegal.s | 17 +
gas/testsuite/gas/aarch64/sme-9-illegal.l | 19 +
gas/testsuite/gas/aarch64/sme-9-illegal.s | 10 +
gas/testsuite/gas/aarch64/sme-9.d | 4 +-
gas/testsuite/gas/aarch64/sme2-1-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-1-invalid.l | 327 +
gas/testsuite/gas/aarch64/sme2-1-invalid.s | 323 +
gas/testsuite/gas/aarch64/sme2-1-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-1-noarch.l | 289 +
gas/testsuite/gas/aarch64/sme2-1.d | 305 +
gas/testsuite/gas/aarch64/sme2-1.s | 338 +
gas/testsuite/gas/aarch64/sme2-10-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-10-invalid.l | 67 +
gas/testsuite/gas/aarch64/sme2-10-invalid.s | 50 +
gas/testsuite/gas/aarch64/sme2-10-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-10-noarch.l | 641 ++
gas/testsuite/gas/aarch64/sme2-10.d | 649 ++
gas/testsuite/gas/aarch64/sme2-10.s | 799 ++
gas/testsuite/gas/aarch64/sme2-11-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-11-invalid.l | 101 +
gas/testsuite/gas/aarch64/sme2-11-invalid.s | 91 +
gas/testsuite/gas/aarch64/sme2-11-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-11-noarch.l | 117 +
gas/testsuite/gas/aarch64/sme2-11.d | 125 +
gas/testsuite/gas/aarch64/sme2-11.s | 127 +
gas/testsuite/gas/aarch64/sme2-12-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-12-invalid.l | 155 +
gas/testsuite/gas/aarch64/sme2-12-invalid.s | 136 +
gas/testsuite/gas/aarch64/sme2-12-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-12-noarch.l | 571 +
gas/testsuite/gas/aarch64/sme2-12.d | 579 +
gas/testsuite/gas/aarch64/sme2-12.s | 633 ++
gas/testsuite/gas/aarch64/sme2-13-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-13-invalid.l | 80 +
gas/testsuite/gas/aarch64/sme2-13-invalid.s | 83 +
gas/testsuite/gas/aarch64/sme2-13-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-13-noarch.l | 253 +
gas/testsuite/gas/aarch64/sme2-13.d | 261 +
gas/testsuite/gas/aarch64/sme2-13.s | 283 +
gas/testsuite/gas/aarch64/sme2-14-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-14-invalid.l | 7 +
gas/testsuite/gas/aarch64/sme2-14-invalid.s | 7 +
gas/testsuite/gas/aarch64/sme2-14-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-14-noarch.l | 107 +
gas/testsuite/gas/aarch64/sme2-14.d | 115 +
gas/testsuite/gas/aarch64/sme2-14.s | 118 +
gas/testsuite/gas/aarch64/sme2-15-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-15-invalid.l | 97 +
gas/testsuite/gas/aarch64/sme2-15-invalid.s | 87 +
gas/testsuite/gas/aarch64/sme2-15-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-15-noarch.l | 187 +
gas/testsuite/gas/aarch64/sme2-15.d | 195 +
gas/testsuite/gas/aarch64/sme2-15.s | 203 +
gas/testsuite/gas/aarch64/sme2-16-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-16-invalid.l | 97 +
gas/testsuite/gas/aarch64/sme2-16-invalid.s | 87 +
gas/testsuite/gas/aarch64/sme2-16-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-16-noarch.l | 249 +
gas/testsuite/gas/aarch64/sme2-16.d | 257 +
gas/testsuite/gas/aarch64/sme2-16.s | 271 +
gas/testsuite/gas/aarch64/sme2-17-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-17-invalid.l | 20 +
gas/testsuite/gas/aarch64/sme2-17-invalid.s | 12 +
gas/testsuite/gas/aarch64/sme2-17-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-17-noarch.l | 45 +
gas/testsuite/gas/aarch64/sme2-17.d | 53 +
gas/testsuite/gas/aarch64/sme2-17.s | 47 +
gas/testsuite/gas/aarch64/sme2-18-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-18-invalid.l | 21 +
gas/testsuite/gas/aarch64/sme2-18-invalid.s | 20 +
gas/testsuite/gas/aarch64/sme2-18-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-18-noarch.l | 21 +
gas/testsuite/gas/aarch64/sme2-18.d | 29 +
gas/testsuite/gas/aarch64/sme2-18.s | 21 +
gas/testsuite/gas/aarch64/sme2-19-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-19-invalid.l | 36 +
gas/testsuite/gas/aarch64/sme2-19-invalid.s | 36 +
gas/testsuite/gas/aarch64/sme2-19-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-19-noarch.l | 41 +
gas/testsuite/gas/aarch64/sme2-19.d | 49 +
gas/testsuite/gas/aarch64/sme2-19.s | 43 +
gas/testsuite/gas/aarch64/sme2-2-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-2-invalid.l | 229 +
gas/testsuite/gas/aarch64/sme2-2-invalid.s | 205 +
gas/testsuite/gas/aarch64/sme2-2-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-2-noarch.l | 481 +
gas/testsuite/gas/aarch64/sme2-2.d | 489 +
gas/testsuite/gas/aarch64/sme2-2.s | 511 +
gas/testsuite/gas/aarch64/sme2-20-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-20-invalid.l | 27 +
gas/testsuite/gas/aarch64/sme2-20-invalid.s | 23 +
gas/testsuite/gas/aarch64/sme2-20-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-20-noarch.l | 21 +
gas/testsuite/gas/aarch64/sme2-20.d | 29 +
gas/testsuite/gas/aarch64/sme2-20.s | 21 +
gas/testsuite/gas/aarch64/sme2-21-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-21-invalid.l | 18 +
gas/testsuite/gas/aarch64/sme2-21-invalid.s | 12 +
gas/testsuite/gas/aarch64/sme2-21-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-21-noarch.l | 43 +
gas/testsuite/gas/aarch64/sme2-21.d | 51 +
gas/testsuite/gas/aarch64/sme2-21.s | 47 +
gas/testsuite/gas/aarch64/sme2-22-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-22-invalid.l | 27 +
gas/testsuite/gas/aarch64/sme2-22-invalid.s | 13 +
gas/testsuite/gas/aarch64/sme2-22-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-22-noarch.l | 111 +
gas/testsuite/gas/aarch64/sme2-22.d | 119 +
gas/testsuite/gas/aarch64/sme2-22.s | 131 +
gas/testsuite/gas/aarch64/sme2-23-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-23-invalid.l | 14 +
gas/testsuite/gas/aarch64/sme2-23-invalid.s | 8 +
gas/testsuite/gas/aarch64/sme2-23-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-23-noarch.l | 65 +
gas/testsuite/gas/aarch64/sme2-23.d | 73 +
gas/testsuite/gas/aarch64/sme2-23.s | 79 +
gas/testsuite/gas/aarch64/sme2-24-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-24-invalid.l | 22 +
gas/testsuite/gas/aarch64/sme2-24-invalid.s | 13 +
gas/testsuite/gas/aarch64/sme2-24-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-24-noarch.l | 17 +
gas/testsuite/gas/aarch64/sme2-24.d | 25 +
gas/testsuite/gas/aarch64/sme2-24.s | 19 +
gas/testsuite/gas/aarch64/sme2-25-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-25-invalid.l | 48 +
gas/testsuite/gas/aarch64/sme2-25-invalid.s | 28 +
gas/testsuite/gas/aarch64/sme2-25-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-25-noarch.l | 37 +
gas/testsuite/gas/aarch64/sme2-25.d | 45 +
gas/testsuite/gas/aarch64/sme2-25.s | 44 +
gas/testsuite/gas/aarch64/sme2-26-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-26-invalid.l | 13 +
gas/testsuite/gas/aarch64/sme2-26-invalid.s | 14 +
gas/testsuite/gas/aarch64/sme2-26-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-26-noarch.l | 25 +
gas/testsuite/gas/aarch64/sme2-26.d | 33 +
gas/testsuite/gas/aarch64/sme2-26.s | 29 +
gas/testsuite/gas/aarch64/sme2-27-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-27-invalid.l | 31 +
gas/testsuite/gas/aarch64/sme2-27-invalid.s | 25 +
gas/testsuite/gas/aarch64/sme2-27-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-27-noarch.l | 50 +
gas/testsuite/gas/aarch64/sme2-27.d | 62 +
gas/testsuite/gas/aarch64/sme2-27.s | 71 +
gas/testsuite/gas/aarch64/sme2-28-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-28-invalid.l | 19 +
gas/testsuite/gas/aarch64/sme2-28-invalid.s | 11 +
gas/testsuite/gas/aarch64/sme2-28-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-28-noarch.l | 26 +
gas/testsuite/gas/aarch64/sme2-28.d | 34 +
gas/testsuite/gas/aarch64/sme2-28.s | 29 +
gas/testsuite/gas/aarch64/sme2-29-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-29-invalid.l | 39 +
gas/testsuite/gas/aarch64/sme2-29-invalid.s | 14 +
gas/testsuite/gas/aarch64/sme2-29-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-29-noarch.l | 37 +
gas/testsuite/gas/aarch64/sme2-29.d | 45 +
gas/testsuite/gas/aarch64/sme2-29.s | 47 +
gas/testsuite/gas/aarch64/sme2-3-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-3-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-3-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-3-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-3-noarch.l | 481 +
gas/testsuite/gas/aarch64/sme2-3.d | 489 +
gas/testsuite/gas/aarch64/sme2-3.s | 511 +
gas/testsuite/gas/aarch64/sme2-30-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-30-invalid.l | 29 +
gas/testsuite/gas/aarch64/sme2-30-invalid.s | 18 +
gas/testsuite/gas/aarch64/sme2-30-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-30-noarch.l | 91 +
gas/testsuite/gas/aarch64/sme2-30.d | 99 +
gas/testsuite/gas/aarch64/sme2-30.s | 109 +
gas/testsuite/gas/aarch64/sme2-4-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-4-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-4-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-4-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-4-noarch.l | 481 +
gas/testsuite/gas/aarch64/sme2-4.d | 489 +
gas/testsuite/gas/aarch64/sme2-4.s | 511 +
gas/testsuite/gas/aarch64/sme2-5-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-5-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-5-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-5-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-5-noarch.l | 481 +
gas/testsuite/gas/aarch64/sme2-5.d | 489 +
gas/testsuite/gas/aarch64/sme2-5.s | 511 +
gas/testsuite/gas/aarch64/sme2-6-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-6-invalid.l | 139 +
gas/testsuite/gas/aarch64/sme2-6-invalid.s | 92 +
gas/testsuite/gas/aarch64/sme2-6-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-6-noarch.l | 145 +
gas/testsuite/gas/aarch64/sme2-6.d | 153 +
gas/testsuite/gas/aarch64/sme2-6.s | 164 +
gas/testsuite/gas/aarch64/sme2-7-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-7-invalid.l | 20 +
gas/testsuite/gas/aarch64/sme2-7-invalid.s | 14 +
gas/testsuite/gas/aarch64/sme2-7-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-7-noarch.l | 321 +
gas/testsuite/gas/aarch64/sme2-7.d | 329 +
gas/testsuite/gas/aarch64/sme2-7.s | 351 +
gas/testsuite/gas/aarch64/sme2-8-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-8-invalid.l | 208 +
gas/testsuite/gas/aarch64/sme2-8-invalid.s | 116 +
gas/testsuite/gas/aarch64/sme2-8-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-8-noarch.l | 104 +
gas/testsuite/gas/aarch64/sme2-8.d | 112 +
gas/testsuite/gas/aarch64/sme2-8.s | 124 +
gas/testsuite/gas/aarch64/sme2-9-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-9-invalid.l | 179 +
gas/testsuite/gas/aarch64/sme2-9-invalid.s | 128 +
gas/testsuite/gas/aarch64/sme2-9-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-9-noarch.l | 177 +
gas/testsuite/gas/aarch64/sme2-9.d | 185 +
gas/testsuite/gas/aarch64/sme2-9.s | 199 +
.../gas/aarch64/sme2-f64f64-1-invalid.d | 3 +
.../gas/aarch64/sme2-f64f64-1-invalid.l | 27 +
.../gas/aarch64/sme2-f64f64-1-invalid.s | 20 +
.../gas/aarch64/sme2-f64f64-1-noarch.d | 3 +
.../gas/aarch64/sme2-f64f64-1-noarch.l | 33 +
gas/testsuite/gas/aarch64/sme2-f64f64-1.d | 41 +
gas/testsuite/gas/aarch64/sme2-f64f64-1.s | 35 +
.../gas/aarch64/sme2-f64f64-2-invalid.d | 3 +
.../gas/aarch64/sme2-f64f64-2-invalid.l | 98 +
.../gas/aarch64/sme2-f64f64-2-invalid.s | 87 +
.../gas/aarch64/sme2-f64f64-2-noarch.d | 3 +
.../gas/aarch64/sme2-f64f64-2-noarch.l | 117 +
gas/testsuite/gas/aarch64/sme2-f64f64-2.d | 125 +
gas/testsuite/gas/aarch64/sme2-f64f64-2.s | 127 +
.../gas/aarch64/sme2-i16i64-1-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-1-invalid.l | 111 +
.../gas/aarch64/sme2-i16i64-1-invalid.s | 86 +
.../gas/aarch64/sme2-i16i64-1-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-1-noarch.l | 57 +
gas/testsuite/gas/aarch64/sme2-i16i64-1.d | 65 +
gas/testsuite/gas/aarch64/sme2-i16i64-1.s | 61 +
.../gas/aarch64/sme2-i16i64-2-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-2-invalid.l | 95 +
.../gas/aarch64/sme2-i16i64-2-invalid.s | 88 +
.../gas/aarch64/sme2-i16i64-2-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-2-noarch.l | 253 +
gas/testsuite/gas/aarch64/sme2-i16i64-2.d | 261 +
gas/testsuite/gas/aarch64/sme2-i16i64-2.s | 283 +
.../gas/aarch64/sme2-i16i64-3-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-3-invalid.l | 19 +
.../gas/aarch64/sme2-i16i64-3-invalid.s | 12 +
.../gas/aarch64/sme2-i16i64-3-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-3-noarch.l | 125 +
gas/testsuite/gas/aarch64/sme2-i16i64-3.d | 133 +
gas/testsuite/gas/aarch64/sme2-i16i64-3.s | 135 +
.../gas/aarch64/sme2-i16i64-4-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-4-invalid.l | 11 +
.../gas/aarch64/sme2-i16i64-4-invalid.s | 12 +
.../gas/aarch64/sme2-i16i64-4-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-4-noarch.l | 21 +
gas/testsuite/gas/aarch64/sme2-i16i64-4.d | 29 +
gas/testsuite/gas/aarch64/sme2-i16i64-4.s | 21 +
gas/testsuite/gas/aarch64/sve-invalid.l | 24 +-
gas/testsuite/gas/aarch64/sve-invalid.s | 1 +
.../gas/aarch64/sve-sme2-1-invalid.d | 3 +
.../gas/aarch64/sve-sme2-1-invalid.l | 51 +
.../gas/aarch64/sve-sme2-1-invalid.s | 25 +
gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d | 3 +
gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l | 25 +
gas/testsuite/gas/aarch64/sve-sme2-1.d | 33 +
gas/testsuite/gas/aarch64/sve-sme2-1.s | 27 +
.../gas/aarch64/sve2-sme2-1-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-1-invalid.l | 12 +
.../gas/aarch64/sve2-sme2-1-invalid.s | 12 +
.../gas/aarch64/sve2-sme2-1-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-1-noarch.l | 33 +
gas/testsuite/gas/aarch64/sve2-sme2-1.d | 41 +
gas/testsuite/gas/aarch64/sve2-sme2-1.s | 35 +
.../gas/aarch64/sve2-sme2-2-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-2-invalid.l | 25 +
.../gas/aarch64/sve2-sme2-2-invalid.s | 12 +
.../gas/aarch64/sve2-sme2-2-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-2-noarch.l | 257 +
gas/testsuite/gas/aarch64/sve2-sme2-2.d | 265 +
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.../gas/aarch64/sve2-sme2-3-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-3-invalid.l | 17 +
.../gas/aarch64/sve2-sme2-3-invalid.s | 15 +
.../gas/aarch64/sve2-sme2-3-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-3-noarch.l | 29 +
gas/testsuite/gas/aarch64/sve2-sme2-3.d | 41 +
gas/testsuite/gas/aarch64/sve2-sme2-3.s | 35 +
.../gas/aarch64/sve2-sme2-4-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-4-invalid.l | 17 +
.../gas/aarch64/sve2-sme2-4-invalid.s | 15 +
.../gas/aarch64/sve2-sme2-4-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-4-noarch.l | 40 +
gas/testsuite/gas/aarch64/sve2-sme2-4.d | 54 +
gas/testsuite/gas/aarch64/sve2-sme2-4.s | 49 +
.../gas/aarch64/sve2-sme2-5-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-5-invalid.l | 27 +
.../gas/aarch64/sve2-sme2-5-invalid.s | 12 +
.../gas/aarch64/sve2-sme2-5-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-5-noarch.l | 13 +
gas/testsuite/gas/aarch64/sve2-sme2-5.d | 21 +
gas/testsuite/gas/aarch64/sve2-sme2-5.s | 14 +
.../gas/aarch64/sve2-sme2-6-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-6-invalid.l | 20 +
.../gas/aarch64/sve2-sme2-6-invalid.s | 14 +
.../gas/aarch64/sve2-sme2-6-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-6-noarch.l | 16 +
gas/testsuite/gas/aarch64/sve2-sme2-6.d | 24 +
gas/testsuite/gas/aarch64/sve2-sme2-6.s | 17 +
.../gas/aarch64/sve2-sme2-7-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-7-invalid.l | 29 +
.../gas/aarch64/sve2-sme2-7-invalid.s | 9 +
.../gas/aarch64/sve2-sme2-7-noarch.d | 3 +
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gas/testsuite/gas/aarch64/sve2-sme2-7.d | 24 +
gas/testsuite/gas/aarch64/sve2-sme2-7.s | 17 +
gas/testsuite/gas/aarch64/system.d | 2 +-
include/opcode/aarch64.h | 107 +-
opcodes/aarch64-asm-2.c | 350 +-
opcodes/aarch64-asm.c | 153 +-
opcodes/aarch64-asm.h | 5 +
opcodes/aarch64-dis-2.c | 9561 +++++++++++++----
opcodes/aarch64-dis.c | 171 +-
opcodes/aarch64-dis.h | 5 +
opcodes/aarch64-opc-2.c | 69 +-
opcodes/aarch64-opc.c | 526 +-
opcodes/aarch64-opc.h | 54 +-
opcodes/aarch64-tbl.h | 742 +-
346 files changed, 36993 insertions(+), 2255 deletions(-)
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create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1.d
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7.s
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 01/31] aarch64: Add +sme2
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 02/31] aarch64: Add a _10 suffix to FLD_imm3 Richard Sandiford
` (31 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds bare-bones support for +sme2. Later patches
fill in the rest.
---
gas/NEWS | 2 ++
gas/config/tc-aarch64.c | 2 ++
gas/doc/c-aarch64.texi | 2 ++
include/opcode/aarch64.h | 1 +
4 files changed, 7 insertions(+)
diff --git a/gas/NEWS b/gas/NEWS
index 4ae2089901c..05fbed113c2 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
-*- text -*-
+* Add SME2 support to the AArch64 port.
+
Changes in 2.40:
* Add support for Intel RAO-INT instructions.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 2d4c6106506..6ebfcda7dff 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10183,6 +10183,8 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
AARCH64_FEATURE (AARCH64_FEATURE_SME, 0)},
{"sme-i16i64", AARCH64_FEATURE (AARCH64_FEATURE_SME_I16I64, 0),
AARCH64_FEATURE (AARCH64_FEATURE_SME, 0)},
+ {"sme2", AARCH64_FEATURE (AARCH64_FEATURE_SME2, 0),
+ AARCH64_FEATURE (AARCH64_FEATURE_SME, 0)},
{"bf16", AARCH64_FEATURE (AARCH64_FEATURE_BFLOAT16, 0),
AARCH64_FEATURE (AARCH64_FEATURE_FP, 0)},
{"i8mm", AARCH64_FEATURE (AARCH64_FEATURE_I8MM, 0),
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 3921c0d368e..acde4a77dd2 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -235,6 +235,8 @@ automatically cause those extensions to be disabled.
@tab Enable SME F64F64 Extension.
@item @code{sme-i16i64} @tab Armv9-A @tab No
@tab Enable SME I16I64 Extension.
+@item @code{sme2} @tab Armv9-A @tab No
+ @tab Enable SME2. This implies @code{sme}.
@item @code{ssbs} @tab ARMv8-A @tab ARMv8.5-A or later
@tab Enable Speculative Store Bypassing Safe state read and write.
@item @code{sve} @tab ARMv8.2-A @tab Armv9-A or later
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index ef59d531d17..5c9b5e5dac1 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -100,6 +100,7 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_SME_I16I64 (1ULL << 58) /* SME I16I64. */
#define AARCH64_FEATURE_V8_8 (1ULL << 59) /* Armv8.8 processors. */
#define AARCH64_FEATURE_CSSC (1ULL << 60) /* Common Short Sequence Compression instructions. */
+#define AARCH64_FEATURE_SME2 (1ULL << 61) /* SME2. */
/* Crypto instructions are the combination of AES and SHA2. */
#define AARCH64_FEATURE_CRYPTO (AARCH64_FEATURE_SHA2 | AARCH64_FEATURE_AES)
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 02/31] aarch64: Add a _10 suffix to FLD_imm3
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
2023-03-30 10:26 ` [PATCH 01/31] aarch64: Add +sme2 Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 03/31] aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array Richard Sandiford
` (30 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
SME2 adds various new 3-bit immediate fields, so this patch adds
an lsb position suffix to the name of the field that we already have.
---
opcodes/aarch64-asm.c | 4 ++--
opcodes/aarch64-dis.c | 4 ++--
opcodes/aarch64-opc-2.c | 2 +-
opcodes/aarch64-opc.c | 2 +-
opcodes/aarch64-opc.h | 2 +-
opcodes/aarch64-tbl.h | 2 +-
6 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 7351c2417b2..5a9ca5a980d 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -943,7 +943,7 @@ aarch64_ins_reg_extended (const aarch64_operand *self ATTRIBUTE_UNUSED,
? AARCH64_MOD_UXTW : AARCH64_MOD_UXTX;
insert_field (FLD_option, code, aarch64_get_operand_modifier_value (kind), 0);
/* imm3 */
- insert_field (FLD_imm3, code, info->shifter.amount, 0);
+ insert_field (FLD_imm3_10, code, info->shifter.amount, 0);
return true;
}
@@ -1016,7 +1016,7 @@ aarch64_ins_sve_addr_ri_s9xvl (const aarch64_operand *self,
int factor = 1 + get_operand_specific_data (self);
insert_field (self->fields[0], code, info->addr.base_regno, 0);
insert_fields (code, info->addr.offset.imm / factor, 0,
- 2, FLD_imm3, FLD_SVE_imm6);
+ 2, FLD_imm3_10, FLD_SVE_imm6);
return true;
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index e722514053e..49bfd46906e 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -1395,7 +1395,7 @@ aarch64_ext_reg_extended (const aarch64_operand *self ATTRIBUTE_UNUSED,
info->shifter.kind =
aarch64_get_operand_modifier_from_value (value, true /* extend_p */);
/* imm3 */
- info->shifter.amount = extract_field (FLD_imm3, code, 0);
+ info->shifter.amount = extract_field (FLD_imm3_10, code, 0);
/* This makes the constraint checking happy. */
info->shifter.operator_present = 1;
@@ -1512,7 +1512,7 @@ aarch64_ext_sve_addr_ri_s9xvl (const aarch64_operand *self,
{
int offset;
- offset = extract_fields (code, 0, 2, FLD_SVE_imm6, FLD_imm3);
+ offset = extract_fields (code, 0, 2, FLD_SVE_imm6, FLD_imm3_10);
offset = (((offset + 256) & 511) - 256);
return aarch64_ext_sve_addr_reg_mul_vl (self, info, code, offset);
}
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 1d59a8bd332..fe67dbc9b62 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -214,7 +214,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM3", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm3}, "a 3-bit unsigned immediate"},
{AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM7", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm7}, "a 7-bit unsigned immediate"},
{AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM8", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm8}, "an 8-bit unsigned immediate"},
- {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM8_53", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm5,FLD_imm3}, "an 8-bit unsigned immediate"},
+ {AARCH64_OPND_CLASS_IMMEDIATE, "SVE_UIMM8_53", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm5,FLD_imm3_10}, "an 8-bit unsigned immediate"},
{AARCH64_OPND_CLASS_SIMD_REG, "SVE_VZn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn}, "a SIMD register"},
{AARCH64_OPND_CLASS_SIMD_REG, "SVE_Vd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Vd}, "a SIMD register"},
{AARCH64_OPND_CLASS_SIMD_REG, "SVE_Vm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Vm}, "a SIMD register"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 1a1e1bd22f3..969362a56cd 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -296,7 +296,7 @@ const aarch64_field fields[] =
{ 0, 4 }, /* cond2: condition in truly conditional-executed inst. */
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
- { 10, 3 }, /* imm3: in add/sub extended reg instructions. */
+ { 10, 3 }, /* imm3_10: in add/sub extended reg instructions. */
{ 0, 4 }, /* imm4_0: in rmif instructions. */
{ 5, 4 }, /* imm4_5: in SME instructions. */
{ 10, 4 }, /* imm4_10: in adddg/subg instructions. */
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 3ded6ab7958..e142ae6ee76 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -124,7 +124,7 @@ enum aarch64_field_kind
FLD_cond2,
FLD_defgh,
FLD_hw,
- FLD_imm3,
+ FLD_imm3_10,
FLD_imm4_0,
FLD_imm4_5,
FLD_imm4_10,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 82f4af2839f..aa05ca0f4a9 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5863,7 +5863,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
"a 7-bit unsigned immediate") \
Y(IMMEDIATE, imm, "SVE_UIMM8", 0, F(FLD_SVE_imm8), \
"an 8-bit unsigned immediate") \
- Y(IMMEDIATE, imm, "SVE_UIMM8_53", 0, F(FLD_imm5,FLD_imm3), \
+ Y(IMMEDIATE, imm, "SVE_UIMM8_53", 0, F(FLD_imm5,FLD_imm3_10), \
"an 8-bit unsigned immediate") \
Y(SIMD_REG, regno, "SVE_VZn", 0, F(FLD_SVE_Zn), "a SIMD register") \
Y(SIMD_REG, regno, "SVE_Vd", 0, F(FLD_SVE_Vd), "a SIMD register") \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 03/31] aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
2023-03-30 10:26 ` [PATCH 01/31] aarch64: Add +sme2 Richard Sandiford
2023-03-30 10:26 ` [PATCH 02/31] aarch64: Add a _10 suffix to FLD_imm3 Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 04/31] aarch64: Add support for vgx2 and vgx4 Richard Sandiford
` (29 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
SME2 adds various new fields that are similar to
AARCH64_OPND_SME_ZA_array, but are distinguished by the size of
their offset fields. This patch adds _off4 to the name of the
field that we already have.
---
gas/config/tc-aarch64.c | 2 +-
include/opcode/aarch64.h | 6 +++---
opcodes/aarch64-opc-2.c | 2 +-
opcodes/aarch64-opc.c | 6 +++---
opcodes/aarch64-tbl.h | 6 +++---
5 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 6ebfcda7dff..b4e0b937605 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -7647,7 +7647,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->imm.value = val;
break;
- case AARCH64_OPND_SME_ZA_array:
+ case AARCH64_OPND_SME_ZA_array_off4:
if (!parse_dual_indexed_reg (&str, REG_TYPE_ZA,
&info->indexed_za, &qualifier, 0))
goto failure;
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 5c9b5e5dac1..94584668517 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -487,11 +487,11 @@ enum aarch64_opnd
AARCH64_OPND_SME_ZA_HV_idx_dest, /* SME destination ZA tile vector. */
AARCH64_OPND_SME_Pm, /* SME scalable predicate register, bits [15:13]. */
AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */
- AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
- AARCH64_OPND_SME_ZA_array, /* SME ZA[<Wv>{, #<imm>}]. */
+ AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
+ AARCH64_OPND_SME_ZA_array_off4, /* SME ZA[<Wv>{, #<imm>}]. */
AARCH64_OPND_SME_ADDR_RI_U4xVL, /* SME [<Xn|SP>{, #<imm>, MUL VL}]. */
AARCH64_OPND_SME_SM_ZA, /* SME {SM | ZA}. */
- AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
+ AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */
AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */
AARCH64_OPND_MOPS_ADDR_Rd, /* [Rd]!, in bits [0, 4]. */
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index fe67dbc9b62..65ce8d42b0a 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -241,7 +241,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_PRED_REG, "SME_Pm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Pm}, "an SVE predicate register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
- {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm4_0}, "ZA array"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm4_0}, "ZA array"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 969362a56cd..e97201bb03a 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -1684,7 +1684,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
return 0;
break;
- case AARCH64_OPND_SME_ZA_array:
+ case AARCH64_OPND_SME_ZA_array_off4:
if (!check_za_access (opnd, mismatch_detail, idx, 12, 15))
return 0;
break;
@@ -2882,7 +2882,7 @@ aarch64_match_operands_constraint (aarch64_inst *inst,
*/
case sme_ldr:
case sme_str:
- assert (inst->operands[0].type == AARCH64_OPND_SME_ZA_array);
+ assert (inst->operands[0].type == AARCH64_OPND_SME_ZA_array_off4);
assert (inst->operands[1].type == AARCH64_OPND_SME_ADDR_RI_U4xVL);
if (inst->operands[0].indexed_za.index.imm
!= inst->operands[1].addr.offset.imm)
@@ -3686,7 +3686,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
print_sme_za_list (buf, size, opnd->reg.regno, styler);
break;
- case AARCH64_OPND_SME_ZA_array:
+ case AARCH64_OPND_SME_ZA_array_off4:
snprintf (buf, size, "%s[%s, %s]",
style_reg (styler, "za"),
style_reg (styler, "w%d", opnd->indexed_za.index.regno),
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index aa05ca0f4a9..75497ea6065 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5265,8 +5265,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME_INSN ("st1d", 0xe0e00000, 0xffe00010, sve_misc, 0, OP3 (SME_ZA_HV_idx_ldstr, SVE_Pg3, SVE_ADDR_R), OP_SVE_DUU, 0, 0),
SME_INSN ("st1q", 0xe1e00000, 0xffe00010, sve_misc, 0, OP3 (SME_ZA_HV_idx_ldstr, SVE_Pg3, SVE_ADDR_R), OP_SVE_QUU, 0, 0),
- SME_INSN ("ldr", 0xe1000000, 0xffff9c10, sme_ldr, 0, OP2 (SME_ZA_array, SME_ADDR_RI_U4xVL), {}, 0, 1),
- SME_INSN ("str", 0xe1200000, 0xffff9c10, sme_str, 0, OP2 (SME_ZA_array, SME_ADDR_RI_U4xVL), {}, 0, 1),
+ SME_INSN ("ldr", 0xe1000000, 0xffff9c10, sme_ldr, 0, OP2 (SME_ZA_array_off4, SME_ADDR_RI_U4xVL), {}, 0, 1),
+ SME_INSN ("str", 0xe1200000, 0xffff9c10, sme_str, 0, OP2 (SME_ZA_array_off4, SME_ADDR_RI_U4xVL), {}, 0, 1),
SME_INSNC ("revd", 0x52e8000, 0xffffe000, sme_misc, 0, OP3 (SVE_Zd, SVE_Pg3, SVE_Zn), OP_SVE_QMQ, 0, C_SCAN_MOVPRFX, 0),
SME_INSNC ("sclamp", 0x4400c000, 0xff20fc00, sve_size_bhsd, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, C_SCAN_MOVPRFX, 0),
@@ -5921,7 +5921,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \
F(FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \
"an SME horizontal or vertical vector access register") \
- Y(ZA_ACCESS, sme_za_array, "SME_ZA_array", 0, \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off4", 0, \
F(FLD_SME_Rv,FLD_imm4_0), "ZA array") \
Y(ADDRESS, sme_addr_ri_u4xvl, "SME_ADDR_RI_U4xVL", 0 << OPD_F_OD_LSB, \
F(FLD_Rn,FLD_imm4_0), "memory offset") \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 04/31] aarch64: Add support for vgx2 and vgx4
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (2 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 03/31] aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 05/31] aarch64; Add support for vector offset ranges Richard Sandiford
` (28 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
Many SME2 instructions operate on groups of 2 or 4 ZA vectors.
This is indicated by adding a "vgx2" or "vgx4" group size to the
ZA index. The group size is optional in assembly but preferred
for disassembly.
There is not a binary distinction between mnemonics that have
group sizes and mnemonics that don't, nor between mnemonics that
take vgx2 and mnemonics that take vgx4. We therefore get better
error messages if we allow any ZA index to have a group size
during parsing, and wait until constraint checking to reject
invalid sizes.
A quirk of the way errors are reported means that if an instruction
is wrong both in its qualifiers and its use of a group size, we'll
print suggested alternative instructions that also have an incorrect
group size. But that's a general property that also applies to
things like out-of-range immediates. It's also not obviously the
wrong thing to do. We need to be relatively confident that we're
looking at the right opcode before reporting detailed operand-specific
errors, so doing qualifier checking first seems resonable.
---
gas/config/tc-aarch64.c | 33 ++++++++++++++-
gas/testsuite/gas/aarch64/sme-2-illegal.l | 3 ++
gas/testsuite/gas/aarch64/sme-2-illegal.s | 4 ++
gas/testsuite/gas/aarch64/sme-3-illegal.l | 11 +++++
gas/testsuite/gas/aarch64/sme-3-illegal.s | 6 +++
gas/testsuite/gas/aarch64/sme-5-illegal.l | 6 +++
gas/testsuite/gas/aarch64/sme-5-illegal.s | 6 +++
gas/testsuite/gas/aarch64/sme-6-illegal.l | 6 +++
gas/testsuite/gas/aarch64/sme-6-illegal.s | 6 +++
gas/testsuite/gas/aarch64/sme-7-illegal.l | 12 ++++++
gas/testsuite/gas/aarch64/sme-7-illegal.s | 11 +++++
gas/testsuite/gas/aarch64/sme-9-illegal.l | 10 +++++
gas/testsuite/gas/aarch64/sme-9-illegal.s | 6 +++
include/opcode/aarch64.h | 13 ++++++
opcodes/aarch64-opc.c | 49 +++++++++++++++++++----
15 files changed, 173 insertions(+), 9 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index b4e0b937605..2d732ea1780 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4550,6 +4550,26 @@ parse_sme_za_index (char **str, struct aarch64_indexed_za *opnd)
return false;
}
+ opnd->group_size = 0;
+ if (skip_past_char (str, ','))
+ {
+ if (strncasecmp (*str, "vgx2", 4) == 0 && !ISALPHA ((*str)[4]))
+ {
+ *str += 4;
+ opnd->group_size = 2;
+ }
+ else if (strncasecmp (*str, "vgx4", 4) == 0 && !ISALPHA ((*str)[4]))
+ {
+ *str += 4;
+ opnd->group_size = 4;
+ }
+ else
+ {
+ set_syntax_error (_("invalid vector group size"));
+ return false;
+ }
+ }
+
if (!skip_past_char (str, ']'))
{
set_syntax_error (_("expected ']'"));
@@ -5067,6 +5087,7 @@ const char* operand_mismatch_kind_names[] =
"AARCH64_OPDE_SYNTAX_ERROR",
"AARCH64_OPDE_FATAL_SYNTAX_ERROR",
"AARCH64_OPDE_INVALID_VARIANT",
+ "AARCH64_OPDE_INVALID_VG_SIZE",
"AARCH64_OPDE_REG_LIST_LENGTH",
"AARCH64_OPDE_REG_LIST_STRIDE",
"AARCH64_OPDE_UNTIED_IMMS",
@@ -5095,7 +5116,8 @@ operand_error_higher_severity_p (enum aarch64_operand_error_kind lhs,
gas_assert (AARCH64_OPDE_SYNTAX_ERROR > AARCH64_OPDE_EXPECTED_A_AFTER_B);
gas_assert (AARCH64_OPDE_FATAL_SYNTAX_ERROR > AARCH64_OPDE_SYNTAX_ERROR);
gas_assert (AARCH64_OPDE_INVALID_VARIANT > AARCH64_OPDE_FATAL_SYNTAX_ERROR);
- gas_assert (AARCH64_OPDE_REG_LIST_LENGTH > AARCH64_OPDE_INVALID_VARIANT);
+ gas_assert (AARCH64_OPDE_INVALID_VG_SIZE > AARCH64_OPDE_INVALID_VARIANT);
+ gas_assert (AARCH64_OPDE_REG_LIST_LENGTH > AARCH64_OPDE_INVALID_VG_SIZE);
gas_assert (AARCH64_OPDE_REG_LIST_STRIDE > AARCH64_OPDE_REG_LIST_LENGTH);
gas_assert (AARCH64_OPDE_OUT_OF_RANGE > AARCH64_OPDE_REG_LIST_STRIDE);
gas_assert (AARCH64_OPDE_UNALIGNED > AARCH64_OPDE_OUT_OF_RANGE);
@@ -5749,6 +5771,15 @@ output_operand_error_record (const operand_error_record *record, char *str)
detail->data[0].i, idx + 1, str);
break;
+ case AARCH64_OPDE_INVALID_VG_SIZE:
+ if (detail->data[0].i == 0)
+ handler (_("unexpected vector group size at operand %d -- `%s'"),
+ idx + 1, str);
+ else
+ handler (_("operand %d must have a vector group size of %d -- `%s'"),
+ idx + 1, detail->data[0].i, str);
+ break;
+
case AARCH64_OPDE_REG_LIST_LENGTH:
if (detail->data[0].i == (1 << 1))
handler (_("expected a single-register list at operand %d -- `%s'"),
diff --git a/gas/testsuite/gas/aarch64/sme-2-illegal.l b/gas/testsuite/gas/aarch64/sme-2-illegal.l
index 1df18ef2002..fd36ed78381 100644
--- a/gas/testsuite/gas/aarch64/sme-2-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-2-illegal.l
@@ -25,3 +25,6 @@
[^:]*:[0-9]+: Error: expected '\]' at operand 3 -- `mova z0\.q,p0/m,za0v\.q\[w12,#1a\]'
[^:]*:[0-9]+: Error: expected '\]' at operand 3 -- `mova z0\.q,p0/m,za0v\.q\[w12,1a2\]'
[^:]*:[0-9]+: Error: expected '\]' at operand 3 -- `mova z0\.q,p0/m,za0v\.q\[w12,#1a2\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,#0,vgx2\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,#0,vgx4\]'
+[^:]*:[0-9]+: Error: invalid vector group size at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,#0,vgx8\]'
diff --git a/gas/testsuite/gas/aarch64/sme-2-illegal.s b/gas/testsuite/gas/aarch64/sme-2-illegal.s
index 28eb6719c91..8cc130ac9c0 100644
--- a/gas/testsuite/gas/aarch64/sme-2-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-2-illegal.s
@@ -30,3 +30,7 @@ mova z0.q, p0/m, za0v.q[w12, 1a]
mova z0.q, p0/m, za0v.q[w12, #1a]
mova z0.q, p0/m, za0v.q[w12, 1a2]
mova z0.q, p0/m, za0v.q[w12, #1a2]
+
+mova z0.b, p0/m, za0h.b[w12, #0, vgx2]
+mova z0.b, p0/m, za0h.b[w12, #0, vgx4]
+mova z0.b, p0/m, za0h.b[w12, #0, vgx8]
diff --git a/gas/testsuite/gas/aarch64/sme-3-illegal.l b/gas/testsuite/gas/aarch64/sme-3-illegal.l
index 717af3b54be..f5fb169b78a 100644
--- a/gas/testsuite/gas/aarch64/sme-3-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-3-illegal.l
@@ -9,3 +9,14 @@
[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `mova za3v\.s\[w15,#4\],p7/m,z31.s'
[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `mova za7v\.d\[w15,#2\],p7/m,z31.d'
[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za15v\.q\[w15,#1\],p7/m,z31.q'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `mova za0h\.b\[w12,#0,vgx2\],p0/m,z0\.b'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `mova za0h\.b\[w12,#0,vgx4\],p0/m,z0\.b'
+[^:]*:[0-9]+: Error: invalid vector group size at operand 1 -- `mova za0h\.b\[w12,#0,vgx8\],p0/m,z0\.b'
+[^:]*:[0-9]+: Error: operand mismatch -- `mova za0h\.b\[w12,#0,vgx2\],p0/z,z0\.b'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: mova za0h\.b\[w12, 0, vgx2\], p0/m, z0\.b
+[^:]*:[0-9]+: Info: other valid variant\(s\):
+[^:]*:[0-9]+: Info: mova za0h\.h\[w12, 0, vgx2\], p0/m, z0\.h
+[^:]*:[0-9]+: Info: mova za0h\.s\[w12, 0, vgx2\], p0/m, z0\.s
+[^:]*:[0-9]+: Info: mova za0h\.d\[w12, 0, vgx2\], p0/m, z0\.d
+[^:]*:[0-9]+: Info: mova za0h\.q\[w12, 0, vgx2\], p0/m, z0\.q
diff --git a/gas/testsuite/gas/aarch64/sme-3-illegal.s b/gas/testsuite/gas/aarch64/sme-3-illegal.s
index 6ed58ec60a1..aeeaf549e8f 100644
--- a/gas/testsuite/gas/aarch64/sme-3-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-3-illegal.s
@@ -12,3 +12,9 @@ mova za1v.h[w15, #8], p7/m, z31.h
mova za3v.s[w15, #4], p7/m, z31.s
mova za7v.d[w15, #2], p7/m, z31.d
mova za15v.q[w15, #1], p7/m, z31.q
+
+mova za0h.b[w12, #0, vgx2], p0/m, z0.b
+mova za0h.b[w12, #0, vgx4], p0/m, z0.b
+mova za0h.b[w12, #0, vgx8], p0/m, z0.b
+
+mova za0h.b[w12, #0, vgx2], p0/z, z0.b
diff --git a/gas/testsuite/gas/aarch64/sme-5-illegal.l b/gas/testsuite/gas/aarch64/sme-5-illegal.l
index f892dcd2090..f6eda9da5e2 100644
--- a/gas/testsuite/gas/aarch64/sme-5-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-5-illegal.l
@@ -56,3 +56,9 @@
[^:]*:[0-9]+: Error: missing braces at operand 1 -- `ld1w za0h.s\[w12,0\],p0/z,\[x0\]'
[^:]*:[0-9]+: Error: missing braces at operand 1 -- `ld1d za0h.d\[w12,0\],p0/z,\[x0\]'
[^:]*:[0-9]+: Error: missing braces at operand 1 -- `ld1q za0h.q\[w12,0\],p0/z,\[x0\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `ld1b {za0h\.b\[w12,0,vgx2\]},p0/z,\[x0\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `ld1b {za0h\.b\[w12,0,vgx4\]},p0/z,\[x0\]'
+[^:]*:[0-9]+: Error: invalid vector group size at operand 1 -- `ld1b {za0h\.b\[w12,0,vgx8\]},p0/z,\[x0\]'
+[^:]*:[0-9]+: Error: operand mismatch -- `ld1b {za0h\.b\[w12,0,vgx4\]},p0/m,\[x0\]'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: ld1b {za0h\.b\[w12, 0, vgx4\]}, p0/z, \[x0, xzr\]
diff --git a/gas/testsuite/gas/aarch64/sme-5-illegal.s b/gas/testsuite/gas/aarch64/sme-5-illegal.s
index 29f86669043..9dbce626a6e 100644
--- a/gas/testsuite/gas/aarch64/sme-5-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-5-illegal.s
@@ -57,3 +57,9 @@ ld1h za0h.h[w12, 0], p0/z, [x0]
ld1w za0h.s[w12, 0], p0/z, [x0]
ld1d za0h.d[w12, 0], p0/z, [x0]
ld1q za0h.q[w12, 0], p0/z, [x0]
+
+ld1b {za0h.b[w12, 0, vgx2]}, p0/z, [x0]
+ld1b {za0h.b[w12, 0, vgx4]}, p0/z, [x0]
+ld1b {za0h.b[w12, 0, vgx8]}, p0/z, [x0]
+
+ld1b {za0h.b[w12, 0, vgx4]}, p0/m, [x0]
diff --git a/gas/testsuite/gas/aarch64/sme-6-illegal.l b/gas/testsuite/gas/aarch64/sme-6-illegal.l
index c8141e086ab..bc0d19417fc 100644
--- a/gas/testsuite/gas/aarch64/sme-6-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-6-illegal.l
@@ -43,3 +43,9 @@
[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15h.q\[w15,1\]},p7,\[sp\]'
[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15v.q\[w15,1\]},p7,\[x0,x17,lsl#4\]'
[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15h.q\[w15,1\]},p7,\[sp,x17,lsl#4\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `st1b {za0h.b\[w12,0,vgx2\]},p0,\[x0\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `st1b {za0h\.b\[w12,0,vgx4\]},p0,\[x0\]'
+[^:]*:[0-9]+: Error: invalid vector group size at operand 1 -- `st1b {za0h\.b\[w12,0,vgx8\]},p0,\[x0\]'
+[^:]*:[0-9]+: Error: operand mismatch -- `st1b {za0h\.b\[w12,0,vgx2\]},p0/z,\[x0\]'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: st1b {za0h\.b\[w12, 0, vgx2\]}, p0, \[x0, xzr\]
diff --git a/gas/testsuite/gas/aarch64/sme-6-illegal.s b/gas/testsuite/gas/aarch64/sme-6-illegal.s
index d0de01d5a6c..04a508821bc 100644
--- a/gas/testsuite/gas/aarch64/sme-6-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-6-illegal.s
@@ -44,3 +44,9 @@ st1q {za15v.q[w15, 1]}, p7, [x17]
st1q {za15h.q[w15, 1]}, p7, [sp]
st1q {za15v.q[w15, 1]}, p7, [x0, x17, lsl #4]
st1q {za15h.q[w15, 1]}, p7, [sp, x17, lsl #4]
+
+st1b {za0h.b[w12, 0, vgx2]}, p0, [x0]
+st1b {za0h.b[w12, 0, vgx4]}, p0, [x0]
+st1b {za0h.b[w12, 0, vgx8]}, p0, [x0]
+
+st1b {za0h.b[w12, 0, vgx2]}, p0/z, [x0]
diff --git a/gas/testsuite/gas/aarch64/sme-7-illegal.l b/gas/testsuite/gas/aarch64/sme-7-illegal.l
index 0023a84da71..eb0c5e6f51a 100644
--- a/gas/testsuite/gas/aarch64/sme-7-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-7-illegal.l
@@ -54,3 +54,15 @@
[^:]*:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `ldr za0h.h\[w12,0\],\[x0\]'
[^:]*:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `ldr za0v\[w12,0\],\[x0\]'
[^:]*:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `ldr za0v.s\[w12,0\],\[x0\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `ldr za\[w12,0,vgx2\],\[x0\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `ldr za\[w12,0,vgx4\],\[x0\]'
+[^:]*:[0-9]+: Error: invalid vector group size at operand 1 -- `ldr za\[w12,0,vgx8\],\[x0\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `str za\[w12,0,vgx2\],\[x0\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `str za\[w12,0,vgx4\],\[x0\]'
+[^:]*:[0-9]+: Error: invalid vector group size at operand 1 -- `str za\[w12,0,vgx8\],\[x0\]'
+[^:]*:[0-9]+: Error: operand mismatch -- `ldr za\.b\[w12,0,vgx2\],\[x0\]'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: ldr za\[w12, 0, vgx2\], \[x0\]
+[^:]*:[0-9]+: Error: operand mismatch -- `str za\.b\[w12,0,vgx4\],\[x0\]'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: str za\[w12, 0, vgx4\], \[x0\]
diff --git a/gas/testsuite/gas/aarch64/sme-7-illegal.s b/gas/testsuite/gas/aarch64/sme-7-illegal.s
index 75e2810e647..05d7d23fe29 100644
--- a/gas/testsuite/gas/aarch64/sme-7-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-7-illegal.s
@@ -52,3 +52,14 @@ ldr za0h[w12, 0], [x0]
ldr za0h.h[w12, 0], [x0]
ldr za0v[w12, 0], [x0]
ldr za0v.s[w12, 0], [x0]
+
+ldr za[w12, 0, vgx2], [x0]
+ldr za[w12, 0, vgx4], [x0]
+ldr za[w12, 0, vgx8], [x0]
+
+str za[w12, 0, vgx2], [x0]
+str za[w12, 0, vgx4], [x0]
+str za[w12, 0, vgx8], [x0]
+
+ldr za.b[w12, 0, vgx2], [x0]
+str za.b[w12, 0, vgx4], [x0]
diff --git a/gas/testsuite/gas/aarch64/sme-9-illegal.l b/gas/testsuite/gas/aarch64/sme-9-illegal.l
index 0243c9efcdf..d7aff825288 100644
--- a/gas/testsuite/gas/aarch64/sme-9-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-9-illegal.l
@@ -27,6 +27,16 @@
[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 3 -- `psel p1,p8,p6.h\[w14,#8\]'
[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 3 -- `psel p8,p4,p15.s\[w13,#4\]'
[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 3 -- `psel p1,p1,p1.d\[w12,#2\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 3 -- `psel p0,p0,p0\.b\[w12,#0,vgx2\]'
+[^:]*:[0-9]+: Error: unexpected vector group size at operand 3 -- `psel p0,p0,p0\.b\[w12,#0,vgx4\]'
+[^:]*:[0-9]+: Error: invalid vector group size at operand 3 -- `psel p0,p0,p0\.b\[w12,#0,vgx8\]'
+[^:]*:[0-9]+: Error: operand mismatch -- `psel p0\.b,p0\.b,p0\.b\[w12,#0,vgx2\]'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: psel p0, p0, p0\.b\[w12, 0\]
+[^:]*:[0-9]+: Info: other valid variant\(s\):
+[^:]*:[0-9]+: Info: psel p0, p0, p0\.h\[w12, 0\]
+[^:]*:[0-9]+: Info: psel p0, p0, p0\.s\[w12, 0\]
+[^:]*:[0-9]+: Info: psel p0, p0, p0\.d\[w12, 0\]
[^:]*:[0-9]+: Error: operand mismatch -- `revd z0.q,p0/m,z0.b'
[^:]*:[0-9]+: Info: did you mean this\?
[^:]*:[0-9]+: Info: revd z0.q, p0/m, z0.q
diff --git a/gas/testsuite/gas/aarch64/sme-9-illegal.s b/gas/testsuite/gas/aarch64/sme-9-illegal.s
index f59582eeb8b..8f41298cd3c 100644
--- a/gas/testsuite/gas/aarch64/sme-9-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-9-illegal.s
@@ -17,6 +17,12 @@ psel p1, p8, p6.h[w14, #8]
psel p8, p4, p15.s[w13, #4]
psel p1, p1, p1.d[w12, #2]
+psel p0, p0, p0.b[w12, #0, vgx2]
+psel p0, p0, p0.b[w12, #0, vgx4]
+psel p0, p0, p0.b[w12, #0, vgx8]
+
+psel p0.b, p0.b, p0.b[w12, #0, vgx2]
+
revd z0.q, p0/m, z0.b
sclamp z8.b, z1.b, z31.q
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 94584668517..534bdaa869f 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -1120,6 +1120,7 @@ struct aarch64_indexed_za
int regno; /* <Wv> */
int64_t imm; /* <imm> */
} index;
+ unsigned group_size : 8;
unsigned v : 1; /* <HV> horizontal or vertical vector indicator. */
};
@@ -1294,6 +1295,17 @@ struct aarch64_inst
The following errors are only reported against an asm string that is
syntactically valid and that has valid operand qualifiers.
+ AARCH64_OPDE_INVALID_VG_SIZE
+ Error about a "VGx<n>" modifier in a ZA index not having the
+ correct <n>. This error effectively forms a pair with
+ AARCH64_OPDE_REG_LIST_LENGTH, since both errors relate to the number
+ of vectors that an instruction operates on. However, the "VGx<n>"
+ modifier is optional, whereas a register list always has a known
+ and explicit length. It therefore seems better to place more
+ importance on the register list length when selecting an opcode table
+ entry. This in turn means that having an incorrect register length
+ should be more severe than having an incorrect "VGx<n>".
+
AARCH64_OPDE_REG_LIST_LENGTH
Error about a register list operand having an unexpected number of
registers. This error is low severity because there might be another
@@ -1356,6 +1368,7 @@ enum aarch64_operand_error_kind
AARCH64_OPDE_SYNTAX_ERROR,
AARCH64_OPDE_FATAL_SYNTAX_ERROR,
AARCH64_OPDE_INVALID_VARIANT,
+ AARCH64_OPDE_INVALID_VG_SIZE,
AARCH64_OPDE_REG_LIST_LENGTH,
AARCH64_OPDE_REG_LIST_STRIDE,
AARCH64_OPDE_UNTIED_IMMS,
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index e97201bb03a..0d38ff250c4 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -1458,6 +1458,16 @@ set_reg_list_stride_error (aarch64_operand_error *mismatch_detail, int idx,
mismatch_detail->data[0].i = 1 << expected_num;
}
+static inline void
+set_invalid_vg_size (aarch64_operand_error *mismatch_detail,
+ int idx, int expected)
+{
+ if (mismatch_detail == NULL)
+ return;
+ set_error (mismatch_detail, AARCH64_OPDE_INVALID_VG_SIZE, idx, NULL);
+ mismatch_detail->data[0].i = expected;
+}
+
static inline void
set_other_error (aarch64_operand_error *mismatch_detail, int idx,
const char* error)
@@ -1517,12 +1527,14 @@ check_reglist (const aarch64_opnd_info *opnd,
- a selection register in the range [MIN_WREG, MIN_WREG + 3]
- - an immediate offset in the range [0, MAX_VALUE]. */
+ - an immediate offset in the range [0, MAX_VALUE].
+
+ - a vector group size of GROUP_SIZE. */
static bool
check_za_access (const aarch64_opnd_info *opnd,
aarch64_operand_error *mismatch_detail, int idx,
- int min_wreg, int max_value)
+ int min_wreg, int max_value, int group_size)
{
if (!value_in_range_p (opnd->indexed_za.index.regno, min_wreg, min_wreg + 3))
{
@@ -1540,6 +1552,15 @@ check_za_access (const aarch64_opnd_info *opnd,
set_offset_out_of_range_error (mismatch_detail, idx, 0, max_value);
return false;
}
+
+ /* The vector group specifier is optional in assembly code. */
+ if (opnd->indexed_za.group_size != 0
+ && opnd->indexed_za.group_size != group_size)
+ {
+ set_invalid_vg_size (mismatch_detail, idx, group_size);
+ return false;
+ }
+
return true;
}
@@ -1657,7 +1678,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
case AARCH64_OPND_SME_PnT_Wm_imm:
size = aarch64_get_qualifier_esize (opnd->qualifier);
max_value = 16 / size - 1;
- if (!check_za_access (opnd, mismatch_detail, idx, 12, max_value))
+ if (!check_za_access (opnd, mismatch_detail, idx, 12, max_value, 0))
return 0;
break;
@@ -1680,12 +1701,14 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
case AARCH64_OPND_SME_ZA_HV_idx_ldstr:
size = aarch64_get_qualifier_esize (opnd->qualifier);
max_value = 16 / size - 1;
- if (!check_za_access (opnd, mismatch_detail, idx, 12, max_value))
+ if (!check_za_access (opnd, mismatch_detail, idx, 12, max_value,
+ get_opcode_dependent_value (opcode)))
return 0;
break;
case AARCH64_OPND_SME_ZA_array_off4:
- if (!check_za_access (opnd, mismatch_detail, idx, 12, 15))
+ if (!check_za_access (opnd, mismatch_detail, idx, 12, 15,
+ get_opcode_dependent_value (opcode)))
return 0;
break;
@@ -3671,7 +3694,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SME_ZA_HV_idx_src:
case AARCH64_OPND_SME_ZA_HV_idx_dest:
case AARCH64_OPND_SME_ZA_HV_idx_ldstr:
- snprintf (buf, size, "%s%s[%s, %s]%s",
+ snprintf (buf, size, "%s%s[%s, %s%s%s]%s",
opnd->type == AARCH64_OPND_SME_ZA_HV_idx_ldstr ? "{" : "",
style_reg (styler, "za%d%c.%s",
opnd->indexed_za.regno,
@@ -3679,6 +3702,11 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
aarch64_get_qualifier_name (opnd->qualifier)),
style_reg (styler, "w%d", opnd->indexed_za.index.regno),
style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm),
+ opnd->indexed_za.group_size ? ", " : "",
+ opnd->indexed_za.group_size == 2
+ ? style_sub_mnem (styler, "vgx2")
+ : opnd->indexed_za.group_size == 4
+ ? style_sub_mnem (styler, "vgx4") : "",
opnd->type == AARCH64_OPND_SME_ZA_HV_idx_ldstr ? "}" : "");
break;
@@ -3687,10 +3715,15 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
break;
case AARCH64_OPND_SME_ZA_array_off4:
- snprintf (buf, size, "%s[%s, %s]",
+ snprintf (buf, size, "%s[%s, %s%s%s]",
style_reg (styler, "za"),
style_reg (styler, "w%d", opnd->indexed_za.index.regno),
- style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm));
+ style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm),
+ opnd->indexed_za.group_size ? ", " : "",
+ opnd->indexed_za.group_size == 2
+ ? style_sub_mnem (styler, "vgx2")
+ : opnd->indexed_za.group_size == 4
+ ? style_sub_mnem (styler, "vgx4") : "");
break;
case AARCH64_OPND_SME_SM_ZA:
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 05/31] aarch64; Add support for vector offset ranges
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (3 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 04/31] aarch64: Add support for vgx2 and vgx4 Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 06/31] aarch64: Add support for predicate-as-counter registers Richard Sandiford
` (27 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
Some SME2 instructions operate on a range of consecutive ZA vectors.
This is indicated by syntax such as:
za[<Wv>, <imml>:<immh>]
Like with the earlier vgx2 and vgx4 support, we get better error
messages if the parser allows all ZA indices to have a range.
We can then reject invalid cases during constraint checking.
---
gas/config/tc-aarch64.c | 23 +++++++++
gas/testsuite/gas/aarch64/sme-2-illegal.l | 13 ++++++
gas/testsuite/gas/aarch64/sme-2-illegal.s | 7 +++
gas/testsuite/gas/aarch64/sme-5-illegal.l | 4 ++
gas/testsuite/gas/aarch64/sme-5-illegal.s | 3 ++
gas/testsuite/gas/aarch64/sme-6-illegal.l | 4 ++
gas/testsuite/gas/aarch64/sme-6-illegal.s | 3 ++
gas/testsuite/gas/aarch64/sme-7-illegal.l | 8 ++++
gas/testsuite/gas/aarch64/sme-7-illegal.s | 6 +++
gas/testsuite/gas/aarch64/sme-9-illegal.l | 9 ++++
gas/testsuite/gas/aarch64/sme-9-illegal.s | 4 ++
include/opcode/aarch64.h | 23 +++++++--
opcodes/aarch64-opc.c | 57 +++++++++++++++++++----
13 files changed, 151 insertions(+), 13 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 2d732ea1780..5873fc754a3 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4550,6 +4550,29 @@ parse_sme_za_index (char **str, struct aarch64_indexed_za *opnd)
return false;
}
+ if (skip_past_char (str, ':'))
+ {
+ int64_t end;
+ if (!parse_sme_immediate (str, &end))
+ {
+ set_syntax_error (_("expected a constant immediate offset"));
+ return false;
+ }
+ if (end < opnd->index.imm)
+ {
+ set_syntax_error (_("the last offset is less than the"
+ " first offset"));
+ return false;
+ }
+ if (end == opnd->index.imm)
+ {
+ set_syntax_error (_("the last offset is equal to the"
+ " first offset"));
+ return false;
+ }
+ opnd->index.countm1 = (uint64_t) end - opnd->index.imm;
+ }
+
opnd->group_size = 0;
if (skip_past_char (str, ','))
{
diff --git a/gas/testsuite/gas/aarch64/sme-2-illegal.l b/gas/testsuite/gas/aarch64/sme-2-illegal.l
index fd36ed78381..71a104a2ecf 100644
--- a/gas/testsuite/gas/aarch64/sme-2-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-2-illegal.l
@@ -28,3 +28,16 @@
[^:]*:[0-9]+: Error: unexpected vector group size at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,#0,vgx2\]'
[^:]*:[0-9]+: Error: unexpected vector group size at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,#0,vgx4\]'
[^:]*:[0-9]+: Error: invalid vector group size at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,#0,vgx8\]'
+[^:]*:[0-9]+: Error: the last offset is less than the first offset at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,1:0\]'
+[^:]*:[0-9]+: Error: the last offset is equal to the first offset at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,0:0\]'
+[^:]*:[0-9]+: Error: expected a single offset rather than a range at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,0:1\]'
+[^:]*:[0-9]+: Error: expected a single offset rather than a range at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,0:2\]'
+[^:]+:[0-9]+: Error: operand mismatch -- `mova z0\.b,p0/m,za0h\.h\[w12,0:1\]'
+[^:]+:[0-9]+: Info: did you mean this\?
+[^:]+:[0-9]+: Info: mova z0\.b, p0/m, za0h\.b\[w12, 0:1\]
+[^:]+:[0-9]+: Info: other valid variant\(s\):
+[^:]+:[0-9]+: Info: mova z0\.h, p0/m, za0h\.h\[w12, 0:1\]
+[^:]+:[0-9]+: Info: mova z0\.s, p0/m, za0h\.s\[w12, 0:1\]
+[^:]+:[0-9]+: Info: mova z0\.d, p0/m, za0h\.d\[w12, 0:1\]
+[^:]+:[0-9]+: Info: mova z0\.q, p0/m, za0h\.q\[w12, 0:1\]
+[^:]*:[0-9]+: Error: expected a constant immediate offset at operand 3 -- `mova z0.b,p0/m,za0h.b\[w12,0:foo\]'
diff --git a/gas/testsuite/gas/aarch64/sme-2-illegal.s b/gas/testsuite/gas/aarch64/sme-2-illegal.s
index 8cc130ac9c0..41bbe4e930b 100644
--- a/gas/testsuite/gas/aarch64/sme-2-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-2-illegal.s
@@ -34,3 +34,10 @@ mova z0.q, p0/m, za0v.q[w12, #1a2]
mova z0.b, p0/m, za0h.b[w12, #0, vgx2]
mova z0.b, p0/m, za0h.b[w12, #0, vgx4]
mova z0.b, p0/m, za0h.b[w12, #0, vgx8]
+
+mova z0.b, p0/m, za0h.b[w12, 1:0]
+mova z0.b, p0/m, za0h.b[w12, 0:0]
+mova z0.b, p0/m, za0h.b[w12, 0:1]
+mova z0.b, p0/m, za0h.b[w12, 0:2]
+mova z0.b, p0/m, za0h.h[w12, 0:1]
+mova z0.b, p0/m, za0h.b[w12, 0:foo]
diff --git a/gas/testsuite/gas/aarch64/sme-5-illegal.l b/gas/testsuite/gas/aarch64/sme-5-illegal.l
index f6eda9da5e2..c4bfc1f8b5a 100644
--- a/gas/testsuite/gas/aarch64/sme-5-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-5-illegal.l
@@ -62,3 +62,7 @@
[^:]*:[0-9]+: Error: operand mismatch -- `ld1b {za0h\.b\[w12,0,vgx4\]},p0/m,\[x0\]'
[^:]*:[0-9]+: Info: did you mean this\?
[^:]*:[0-9]+: Info: ld1b {za0h\.b\[w12, 0, vgx4\]}, p0/z, \[x0, xzr\]
+[^:]*:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `ld1b {za0h\.b\[w12,0:1\]},p0/z,\[x0\]'
+[^:]+:[0-9]+: Error: operand mismatch -- `ld1b {za0h\.b\[w12,0:1\]},p0/m,\[x0\]'
+[^:]+:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: ld1b {za0h\.b\[w12, 0:1\]}, p0/z, \[x0, xzr\]
diff --git a/gas/testsuite/gas/aarch64/sme-5-illegal.s b/gas/testsuite/gas/aarch64/sme-5-illegal.s
index 9dbce626a6e..942a5cf9588 100644
--- a/gas/testsuite/gas/aarch64/sme-5-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-5-illegal.s
@@ -63,3 +63,6 @@ ld1b {za0h.b[w12, 0, vgx4]}, p0/z, [x0]
ld1b {za0h.b[w12, 0, vgx8]}, p0/z, [x0]
ld1b {za0h.b[w12, 0, vgx4]}, p0/m, [x0]
+
+ld1b {za0h.b[w12, 0:1]}, p0/z, [x0]
+ld1b {za0h.b[w12, 0:1]}, p0/m, [x0]
diff --git a/gas/testsuite/gas/aarch64/sme-6-illegal.l b/gas/testsuite/gas/aarch64/sme-6-illegal.l
index bc0d19417fc..b98b76faaed 100644
--- a/gas/testsuite/gas/aarch64/sme-6-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-6-illegal.l
@@ -49,3 +49,7 @@
[^:]*:[0-9]+: Error: operand mismatch -- `st1b {za0h\.b\[w12,0,vgx2\]},p0/z,\[x0\]'
[^:]*:[0-9]+: Info: did you mean this\?
[^:]*:[0-9]+: Info: st1b {za0h\.b\[w12, 0, vgx2\]}, p0, \[x0, xzr\]
+[^:]*:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `st1b {za0h\.b\[w12,0:1,vgx2\]},p0,\[x0\]'
+[^:]+:[0-9]+: Error: operand mismatch -- `st1b {za0h\.b\[w12,0:1,vgx2\]},p0/m,\[x0\]'
+[^:]+:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: st1b {za0h\.b\[w12, 0:1, vgx2\]}, p0, \[x0, xzr\]
diff --git a/gas/testsuite/gas/aarch64/sme-6-illegal.s b/gas/testsuite/gas/aarch64/sme-6-illegal.s
index 04a508821bc..bebbcb658e8 100644
--- a/gas/testsuite/gas/aarch64/sme-6-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-6-illegal.s
@@ -50,3 +50,6 @@ st1b {za0h.b[w12, 0, vgx4]}, p0, [x0]
st1b {za0h.b[w12, 0, vgx8]}, p0, [x0]
st1b {za0h.b[w12, 0, vgx2]}, p0/z, [x0]
+
+st1b {za0h.b[w12, 0:1, vgx2]}, p0, [x0]
+st1b {za0h.b[w12, 0:1, vgx2]}, p0/m, [x0]
diff --git a/gas/testsuite/gas/aarch64/sme-7-illegal.l b/gas/testsuite/gas/aarch64/sme-7-illegal.l
index eb0c5e6f51a..5ab025cc27e 100644
--- a/gas/testsuite/gas/aarch64/sme-7-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-7-illegal.l
@@ -66,3 +66,11 @@
[^:]*:[0-9]+: Error: operand mismatch -- `str za\.b\[w12,0,vgx4\],\[x0\]'
[^:]*:[0-9]+: Info: did you mean this\?
[^:]*:[0-9]+: Info: str za\[w12, 0, vgx4\], \[x0\]
+[^:]*:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `ldr za\[w12,0:1\],\[x0\]'
+[^:]*:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `str za\[w12,0:2,vgx4\],\[x0\]'
+[^:]*:[0-9]+: Error: operand mismatch -- `ldr za\.b\[w12,0:1\],\[x0\]'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: ldr za\[w12, 0:1\], \[x0\]
+[^:]*:[0-9]+: Error: operand mismatch -- `str za\.b\[w12,0:2,vgx4\],\[x0\]'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: str za\[w12, 0:2, vgx4\], \[x0\]
diff --git a/gas/testsuite/gas/aarch64/sme-7-illegal.s b/gas/testsuite/gas/aarch64/sme-7-illegal.s
index 05d7d23fe29..7e97f910cf8 100644
--- a/gas/testsuite/gas/aarch64/sme-7-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-7-illegal.s
@@ -63,3 +63,9 @@ str za[w12, 0, vgx8], [x0]
ldr za.b[w12, 0, vgx2], [x0]
str za.b[w12, 0, vgx4], [x0]
+
+ldr za[w12, 0:1], [x0]
+str za[w12, 0:2, vgx4], [x0]
+
+ldr za.b[w12, 0:1], [x0]
+str za.b[w12, 0:2, vgx4], [x0]
diff --git a/gas/testsuite/gas/aarch64/sme-9-illegal.l b/gas/testsuite/gas/aarch64/sme-9-illegal.l
index d7aff825288..7f44435ef08 100644
--- a/gas/testsuite/gas/aarch64/sme-9-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-9-illegal.l
@@ -37,6 +37,15 @@
[^:]*:[0-9]+: Info: psel p0, p0, p0\.h\[w12, 0\]
[^:]*:[0-9]+: Info: psel p0, p0, p0\.s\[w12, 0\]
[^:]*:[0-9]+: Info: psel p0, p0, p0\.d\[w12, 0\]
+[^:]*:[0-9]+: Error: expected a single offset rather than a range at operand 3 -- `psel p0,p0,p0\.b\[w12,0:1\]'
+[^:]*:[0-9]+: Error: expected a single offset rather than a range at operand 3 -- `psel p0,p0,p0\.b\[w12,0:1,vgx2\]'
+[^:]*:[0-9]+: Error: operand mismatch -- `psel p0\.b,p0\.b,p0\.b\[w12,0:1,vgx2\]'
+[^:]*:[0-9]+: Info: did you mean this\?
+[^:]*:[0-9]+: Info: psel p0, p0, p0\.b\[w12, 0\]
+[^:]*:[0-9]+: Info: other valid variant\(s\):
+[^:]*:[0-9]+: Info: psel p0, p0, p0\.h\[w12, 0\]
+[^:]*:[0-9]+: Info: psel p0, p0, p0\.s\[w12, 0\]
+[^:]*:[0-9]+: Info: psel p0, p0, p0\.d\[w12, 0\]
[^:]*:[0-9]+: Error: operand mismatch -- `revd z0.q,p0/m,z0.b'
[^:]*:[0-9]+: Info: did you mean this\?
[^:]*:[0-9]+: Info: revd z0.q, p0/m, z0.q
diff --git a/gas/testsuite/gas/aarch64/sme-9-illegal.s b/gas/testsuite/gas/aarch64/sme-9-illegal.s
index 8f41298cd3c..3c07e2d6fcb 100644
--- a/gas/testsuite/gas/aarch64/sme-9-illegal.s
+++ b/gas/testsuite/gas/aarch64/sme-9-illegal.s
@@ -23,6 +23,10 @@ psel p0, p0, p0.b[w12, #0, vgx8]
psel p0.b, p0.b, p0.b[w12, #0, vgx2]
+psel p0, p0, p0.b[w12, 0:1]
+psel p0, p0, p0.b[w12, 0:1, vgx2]
+psel p0.b, p0.b, p0.b[w12, 0:1, vgx2]
+
revd z0.q, p0/m, z0.b
sclamp z8.b, z1.b, z31.q
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 534bdaa869f..7ccbb0eda7c 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -1114,14 +1114,29 @@ const aarch64_cond* get_inverted_cond (const aarch64_cond *cond);
/* Information about a reference to part of ZA. */
struct aarch64_indexed_za
{
- int regno; /* <ZAn> */
+ /* Which tile is being accessed. Unused (and 0) for an index into ZA. */
+ int regno;
+
struct
{
- int regno; /* <Wv> */
- int64_t imm; /* <imm> */
+ /* The 32-bit index register. */
+ int regno;
+
+ /* The first (or only) immediate offset. */
+ int64_t imm;
+
+ /* The last immediate offset minus the first immediate offset.
+ Unlike the range size, this is guaranteed not to overflow
+ when the end offset > the start offset. */
+ uint64_t countm1;
} index;
+
+ /* The vector group size, or 0 if none. */
unsigned group_size : 8;
- unsigned v : 1; /* <HV> horizontal or vertical vector indicator. */
+
+ /* True if a tile access is vertical, false if it is horizontal.
+ Unused (and 0) for an index into ZA. */
+ unsigned v : 1;
};
/* Information about a list of registers. */
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 0d38ff250c4..4df1dc2cda8 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -1527,14 +1527,18 @@ check_reglist (const aarch64_opnd_info *opnd,
- a selection register in the range [MIN_WREG, MIN_WREG + 3]
- - an immediate offset in the range [0, MAX_VALUE].
+ - RANGE_SIZE consecutive immediate offsets.
+
+ - an initial immediate offset that is a multiple of RANGE_SIZE
+ in the range [0, MAX_VALUE * RANGE_SIZE]
- a vector group size of GROUP_SIZE. */
static bool
check_za_access (const aarch64_opnd_info *opnd,
aarch64_operand_error *mismatch_detail, int idx,
- int min_wreg, int max_value, int group_size)
+ int min_wreg, int max_value, unsigned int range_size,
+ int group_size)
{
if (!value_in_range_p (opnd->indexed_za.index.regno, min_wreg, min_wreg + 3))
{
@@ -1547,9 +1551,31 @@ check_za_access (const aarch64_opnd_info *opnd,
return false;
}
- if (!value_in_range_p (opnd->indexed_za.index.imm, 0, max_value))
+ int max_index = max_value * range_size;
+ if (!value_in_range_p (opnd->indexed_za.index.imm, 0, max_index))
+ {
+ set_offset_out_of_range_error (mismatch_detail, idx, 0, max_index);
+ return false;
+ }
+
+ if ((opnd->indexed_za.index.imm % range_size) != 0)
+ {
+ assert (range_size == 2 || range_size == 4);
+ set_other_error (mismatch_detail, idx,
+ range_size == 2
+ ? _("starting offset is not a multiple of 2")
+ : _("starting offset is not a multiple of 4"));
+ return false;
+ }
+
+ if (opnd->indexed_za.index.countm1 != range_size - 1)
{
- set_offset_out_of_range_error (mismatch_detail, idx, 0, max_value);
+ if (range_size == 1)
+ set_other_error (mismatch_detail, idx,
+ _("expected a single offset rather than"
+ " a range"));
+ else
+ abort ();
return false;
}
@@ -1678,7 +1704,8 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
case AARCH64_OPND_SME_PnT_Wm_imm:
size = aarch64_get_qualifier_esize (opnd->qualifier);
max_value = 16 / size - 1;
- if (!check_za_access (opnd, mismatch_detail, idx, 12, max_value, 0))
+ if (!check_za_access (opnd, mismatch_detail, idx,
+ 12, max_value, 1, 0))
return 0;
break;
@@ -1701,13 +1728,13 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
case AARCH64_OPND_SME_ZA_HV_idx_ldstr:
size = aarch64_get_qualifier_esize (opnd->qualifier);
max_value = 16 / size - 1;
- if (!check_za_access (opnd, mismatch_detail, idx, 12, max_value,
+ if (!check_za_access (opnd, mismatch_detail, idx, 12, max_value, 1,
get_opcode_dependent_value (opcode)))
return 0;
break;
case AARCH64_OPND_SME_ZA_array_off4:
- if (!check_za_access (opnd, mismatch_detail, idx, 12, 15,
+ if (!check_za_access (opnd, mismatch_detail, idx, 12, 15, 1,
get_opcode_dependent_value (opcode)))
return 0;
break;
@@ -3694,7 +3721,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SME_ZA_HV_idx_src:
case AARCH64_OPND_SME_ZA_HV_idx_dest:
case AARCH64_OPND_SME_ZA_HV_idx_ldstr:
- snprintf (buf, size, "%s%s[%s, %s%s%s]%s",
+ snprintf (buf, size, "%s%s[%s, %s%s%s%s%s]%s",
opnd->type == AARCH64_OPND_SME_ZA_HV_idx_ldstr ? "{" : "",
style_reg (styler, "za%d%c.%s",
opnd->indexed_za.regno,
@@ -3702,6 +3729,12 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
aarch64_get_qualifier_name (opnd->qualifier)),
style_reg (styler, "w%d", opnd->indexed_za.index.regno),
style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm),
+ opnd->indexed_za.index.countm1 ? ":" : "",
+ (opnd->indexed_za.index.countm1
+ ? style_imm (styler, "%d",
+ opnd->indexed_za.index.imm
+ + opnd->indexed_za.index.countm1)
+ : ""),
opnd->indexed_za.group_size ? ", " : "",
opnd->indexed_za.group_size == 2
? style_sub_mnem (styler, "vgx2")
@@ -3715,10 +3748,16 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
break;
case AARCH64_OPND_SME_ZA_array_off4:
- snprintf (buf, size, "%s[%s, %s%s%s]",
+ snprintf (buf, size, "%s[%s, %s%s%s%s%s]",
style_reg (styler, "za"),
style_reg (styler, "w%d", opnd->indexed_za.index.regno),
style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm),
+ opnd->indexed_za.index.countm1 ? ":" : "",
+ (opnd->indexed_za.index.countm1
+ ? style_imm (styler, "%d",
+ opnd->indexed_za.index.imm
+ + opnd->indexed_za.index.countm1)
+ : ""),
opnd->indexed_za.group_size ? ", " : "",
opnd->indexed_za.group_size == 2
? style_sub_mnem (styler, "vgx2")
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 06/31] aarch64: Add support for predicate-as-counter registers
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (4 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 05/31] aarch64; Add support for vector offset ranges Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 07/31] aarch64: Add the SME2 MOVA instructions Richard Sandiford
` (26 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
SME2 adds a new format for the existing SVE predicate registers:
predicates as counters rather than predicates as masks. In assembly
code, operands that interpret predicates as counters are written
pn<N> rather than p<N>.
This patch adds support for these registers and extends some
existing instructions to support them. Since the new forms
are just a programmer convenience, there's no need to make them
more restrictive than the earlier predicate-as-mask forms.
---
gas/config/tc-aarch64.c | 35 +-
.../gas/aarch64/sve-sme2-1-invalid.d | 3 +
.../gas/aarch64/sve-sme2-1-invalid.l | 51 +
.../gas/aarch64/sve-sme2-1-invalid.s | 25 +
gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d | 3 +
gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l | 25 +
gas/testsuite/gas/aarch64/sve-sme2-1.d | 33 +
gas/testsuite/gas/aarch64/sve-sme2-1.s | 27 +
.../gas/aarch64/sve2-sme2-1-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-1-invalid.l | 9 +
.../gas/aarch64/sve2-sme2-1-invalid.s | 8 +
.../gas/aarch64/sve2-sme2-1-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-1-noarch.l | 33 +
gas/testsuite/gas/aarch64/sve2-sme2-1.d | 41 +
gas/testsuite/gas/aarch64/sve2-sme2-1.s | 35 +
include/opcode/aarch64.h | 5 +
opcodes/aarch64-asm-2.c | 239 +-
opcodes/aarch64-asm.c | 1 +
opcodes/aarch64-dis-2.c | 2961 +++++++++--------
opcodes/aarch64-opc-2.c | 17 +-
opcodes/aarch64-opc.c | 13 +
opcodes/aarch64-tbl.h | 13 +
22 files changed, 1983 insertions(+), 1600 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1.d
create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 5873fc754a3..8d5cc5194de 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -307,6 +307,7 @@ struct reloc_entry
BASIC_REG_TYPE(V) /* v[0-31] */ \
BASIC_REG_TYPE(Z) /* z[0-31] */ \
BASIC_REG_TYPE(P) /* p[0-15] */ \
+ BASIC_REG_TYPE(PN) /* pn[0-15] */ \
BASIC_REG_TYPE(ZA) /* za */ \
BASIC_REG_TYPE(ZAT) /* za[0-15] (ZA tile) */ \
BASIC_REG_TYPE(ZATH) /* za[0-15]h (ZA tile horizontal slice) */ \
@@ -440,6 +441,16 @@ get_reg_expected_msg (unsigned int mask, unsigned int seen)
| reg_type_masks[REG_TYPE_ZATHV])))
return N_("expected 'za' rather than a ZA tile at operand %d");
+ if ((mask & reg_type_masks[REG_TYPE_PN])
+ && (seen & reg_type_masks[REG_TYPE_P]))
+ return N_("expected a predicate-as-counter rather than predicate-as-mask"
+ " register at operand %d");
+
+ if ((mask & reg_type_masks[REG_TYPE_P])
+ && (seen & reg_type_masks[REG_TYPE_PN]))
+ return N_("expected a predicate-as-mask rather than predicate-as-counter"
+ " register at operand %d");
+
/* Integer, zero and stack registers. */
if (mask == reg_type_masks[REG_TYPE_R_64])
return N_("expected a 64-bit integer register at operand %d");
@@ -456,7 +467,12 @@ get_reg_expected_msg (unsigned int mask, unsigned int seen)
return N_("expected an Advanced SIMD vector register at operand %d");
if (mask == reg_type_masks[REG_TYPE_Z])
return N_("expected an SVE vector register at operand %d");
- if (mask == reg_type_masks[REG_TYPE_P])
+ if (mask == reg_type_masks[REG_TYPE_P]
+ || mask == (reg_type_masks[REG_TYPE_P] | reg_type_masks[REG_TYPE_PN]))
+ /* Use this error for "predicate-as-mask only" and "either kind of
+ predicate". We report a more specific error if P is used where
+ PN is expected, and vice versa, so the issue at this point is
+ "predicate-like" vs. "not predicate-like". */
return N_("expected an SVE predicate register at operand %d");
if (mask == reg_type_masks[REG_TYPE_VZ])
return N_("expected a vector register at operand %d");
@@ -1127,6 +1143,7 @@ aarch64_valid_suffix_char_p (aarch64_reg_type type, char ch)
return ch == '.';
case REG_TYPE_P:
+ case REG_TYPE_PN:
return ch == '.' || ch == '/';
default:
@@ -6609,6 +6626,13 @@ parse_operands (char *str, const aarch64_opcode *opcode)
reg_type = REG_TYPE_Z;
goto vector_reg;
+ case AARCH64_OPND_SVE_PNd:
+ case AARCH64_OPND_SVE_PNg4_10:
+ case AARCH64_OPND_SVE_PNn:
+ case AARCH64_OPND_SVE_PNt:
+ reg_type = REG_TYPE_PN;
+ goto vector_reg;
+
case AARCH64_OPND_Va:
case AARCH64_OPND_Vd:
case AARCH64_OPND_Vn:
@@ -6622,7 +6646,9 @@ parse_operands (char *str, const aarch64_opcode *opcode)
goto failure;
info->reg.regno = reg->number;
- if ((reg_type == REG_TYPE_P || reg_type == REG_TYPE_Z)
+ if ((reg_type == REG_TYPE_P
+ || reg_type == REG_TYPE_PN
+ || reg_type == REG_TYPE_Z)
&& vectype.type == NT_invtype)
/* Unqualified P and Z registers are allowed in certain
contexts. Rely on F_STRICT qualifier checking to catch
@@ -8343,9 +8369,12 @@ static const reg_entry reg_names[] = {
/* SVE vector registers. */
REGSET (z, Z), REGSET (Z, Z),
- /* SVE predicate registers. */
+ /* SVE predicate(-as-mask) registers. */
REGSET16 (p, P), REGSET16 (P, P),
+ /* SVE predicate-as-counter registers. */
+ REGSET16 (pn, PN), REGSET16 (PN, PN),
+
/* SME ZA. We model this as a register because it acts syntactically
like ZA0H, supporting qualifier suffixes and indexing. */
REGDEF (za, 0, ZA), REGDEF (ZA, 0, ZA),
diff --git a/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.d b/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.d
new file mode 100644
index 00000000000..82d3724e2f3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sve-sme2-1-invalid.s
+#error_output: sve-sme2-1-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.l b/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.l
new file mode 100644
index 00000000000..7699801ed82
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.l
@@ -0,0 +1,51 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: operand mismatch -- `pfalse pn0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pfalse pn0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `pfalse pn0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pfalse pn0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `pfalse pn0\.d'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pfalse pn0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `pfalse pn0\.q'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pfalse pn0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `pfalse pn0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pfalse pn0\.b
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `mov pn0\.b,p0\.b'
+[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 2 -- `mov p0\.b,pn0\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov pn0\.b,pn1\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov pn0\.b, pn1\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov pn0\.h,pn1\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov pn0\.b, pn1\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov pn0\.h,pn1\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov pn0\.b, pn1\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov pn0\.s,pn1\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov pn0\.b, pn1\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov pn0\.d,pn1\.d'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov pn0\.b, pn1\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov pn0\.q,pn1\.q'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov pn0\.b, pn1\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov pn0,pn1'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov pn0\.b, pn1\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `ldr pn0\.b,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ldr pn0, \[x0\]
+[^ :]+:[0-9]+: Error: invalid base register at operand 2 -- `ldr pn0\.b,\[xzr\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -256 to 255 at operand 2 -- `ldr pn0,\[x0,#-257,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -256 to 255 at operand 2 -- `ldr pn0,\[x0,#256,mul vl\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `str pn0\.b,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: str pn0, \[x0\]
+[^ :]+:[0-9]+: Error: invalid base register at operand 2 -- `str pn0\.b,\[xzr\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -256 to 255 at operand 2 -- `str pn0,\[x0,#-257,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -256 to 255 at operand 2 -- `str pn0,\[x0,#256,mul vl\]'
diff --git a/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.s b/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.s
new file mode 100644
index 00000000000..e8410a64ed2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-sme2-1-invalid.s
@@ -0,0 +1,25 @@
+ pfalse pn0.h
+ pfalse pn0.s
+ pfalse pn0.d
+ pfalse pn0.q
+ pfalse pn0
+
+ mov pn0.b, p0.b
+ mov p0.b, pn0.b
+ mov pn0.b, pn1.h
+ mov pn0.h, pn1.b
+ mov pn0.h, pn1.h
+ mov pn0.s, pn1.s
+ mov pn0.d, pn1.d
+ mov pn0.q, pn1.q
+ mov pn0, pn1
+
+ ldr pn0.b, [x0]
+ ldr pn0.b, [xzr]
+ ldr pn0, [x0, #-257, mul vl]
+ ldr pn0, [x0, #256, mul vl]
+
+ str pn0.b, [x0]
+ str pn0.b, [xzr]
+ str pn0, [x0, #-257, mul vl]
+ str pn0, [x0, #256, mul vl]
diff --git a/gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d b/gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d
new file mode 100644
index 00000000000..ead5641171d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sve-sme2-1.s
+#error_output: sve-sme2-1-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l b/gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l
new file mode 100644
index 00000000000..e624ac6c019
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l
@@ -0,0 +1,25 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `pfalse pn0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `pfalse PN0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `pfalse pn5\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `pfalse pn15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov pn0\.b,pn0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov pn0\.b,pn15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov pn15\.b,pn0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov pn3\.b,pn12\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr pn0,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr pn15,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr pn0,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr pn0,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr pn0,\[x0,#-256,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr pn0,\[x0,#255,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr pn11,\[x14,#211,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str pn0,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str pn15,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str pn0,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str pn0,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str pn0,\[x0,#-256,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str pn0,\[x0,#255,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str pn5,\[x28,#-56,mul vl\]'
diff --git a/gas/testsuite/gas/aarch64/sve-sme2-1.d b/gas/testsuite/gas/aarch64/sve-sme2-1.d
new file mode 100644
index 00000000000..0dfb99c57d8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-sme2-1.d
@@ -0,0 +1,33 @@
+#as: -march=armv8-a+sve
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 2518e400 pfalse p0\.b
+[^:]+: 2518e400 pfalse p0\.b
+[^:]+: 2518e405 pfalse p5\.b
+[^:]+: 2518e40f pfalse p15\.b
+[^:]+: 25804000 mov p0\.b, p0\.b
+[^:]+: 258f7de0 mov p0\.b, p15\.b
+[^:]+: 2580400f mov p15\.b, p0\.b
+[^:]+: 258c7183 mov p3\.b, p12\.b
+[^:]+: 85800000 ldr p0, \[x0\]
+[^:]+: 8580000f ldr p15, \[x0\]
+[^:]+: 858003cf ldr p15, \[x30\]
+[^:]+: 858003e0 ldr p0, \[sp\]
+[^:]+: 85800000 ldr p0, \[x0\]
+[^:]+: 85a00000 ldr p0, \[x0, #-256, mul vl\]
+[^:]+: 859f1c00 ldr p0, \[x0, #255, mul vl\]
+[^:]+: 859a0dcb ldr p11, \[x14, #211, mul vl\]
+[^:]+: e5800000 str p0, \[x0\]
+[^:]+: e580000f str p15, \[x0\]
+[^:]+: e58003cf str p15, \[x30\]
+[^:]+: e58003e0 str p0, \[sp\]
+[^:]+: e5800000 str p0, \[x0\]
+[^:]+: e5a00000 str p0, \[x0, #-256, mul vl\]
+[^:]+: e59f1c00 str p0, \[x0, #255, mul vl\]
+[^:]+: e5b90385 str p5, \[x28, #-56, mul vl\]
diff --git a/gas/testsuite/gas/aarch64/sve-sme2-1.s b/gas/testsuite/gas/aarch64/sve-sme2-1.s
new file mode 100644
index 00000000000..c119363d6be
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve-sme2-1.s
@@ -0,0 +1,27 @@
+ pfalse pn0.b
+ PFALSE PN0.B
+ pfalse pn5.b
+ pfalse pn15.b
+
+ mov pn0.b, pn0.b
+ mov pn0.b, pn15.b
+ mov pn15.b, pn0.b
+ mov pn3.b, pn12.b
+
+ ldr pn0, [x0]
+ ldr pn15, [x0]
+ ldr pn15, [x30]
+ ldr pn0, [sp]
+ ldr pn0, [x0, #0, mul vl]
+ ldr pn0, [x0, #-256, mul vl]
+ ldr pn0, [x0, #255, mul vl]
+ ldr pn11, [x14, #211, mul vl]
+
+ str pn0, [x0]
+ str pn15, [x0]
+ str pn15, [x30]
+ str pn0, [sp]
+ str pn0, [x0, #0, mul vl]
+ str pn0, [x0, #-256, mul vl]
+ str pn0, [x0, #255, mul vl]
+ str pn5, [x28, #-56, mul vl]
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.d
new file mode 100644
index 00000000000..03f33afae8a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sve2-sme2-1-invalid.s
+#error_output: sve2-sme2-1-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l
new file mode 100644
index 00000000000..70cfd59b4c1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l
@@ -0,0 +1,9 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `psel pn0,p0,p0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `psel pn,pn0,p0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 3 -- `psel p0,p0,pn0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 3 -- `psel pn0,pn0,pn0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 3 -- `psel pn0,pn0,p0\.b\[w11,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 3 -- `psel pn0,pn0,p0\.b\[w16,0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 3 -- `psel pn0,pn0,p0\.b\[w12,-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 3 -- `psel pn0,pn0,p0\.b\[w12,16\]'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s
new file mode 100644
index 00000000000..c0da1d78587
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s
@@ -0,0 +1,8 @@
+ psel pn0, p0, p0.b[w12, 0]
+ psel pn, pn0, p0.b[w12, 0]
+ psel p0, p0, pn0.b[w12, 0]
+ psel pn0, pn0, pn0.b[w12, 0]
+ psel pn0, pn0, p0.b[w11, 0]
+ psel pn0, pn0, p0.b[w16, 0]
+ psel pn0, pn0, p0.b[w12, -1]
+ psel pn0, pn0, p0.b[w12, 16]
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.d
new file mode 100644
index 00000000000..23022a09c88
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sve2
+#source: sve2-sme2-1.s
+#error_output: sve2-sme2-1-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.l
new file mode 100644
index 00000000000..e911c53d7ac
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.l
@@ -0,0 +1,33 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel PN0,PN0,P0\.B\[W12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn15,pn0,p0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn15,p0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p15\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.b\[w15,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.b\[w12,15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn1,pn13,p6\.b\[w14,11\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.h\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel PN0,PN0,P0\.H\[W12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn15,pn0,p0\.h\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn15,p0\.h\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p15\.h\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.h\[w15,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.h\[w12,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn12,pn7,p14\.h\[w13,5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.s\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel PN0,PN0,P0\.S\[W12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn15,pn0,p0\.s\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn15,p0\.s\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p15\.s\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.s\[w15,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.s\[w12,3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn6,pn11,p11\.s\[w13,2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel PN0,PN0,P0\.D\[W12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn15,pn0,p0\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn15,p0\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p15\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.d\[w15,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn0,pn0,p0\.d\[w12,1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `psel pn7,pn9,p5\.d\[w13,1\]'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1.d b/gas/testsuite/gas/aarch64/sve2-sme2-1.d
new file mode 100644
index 00000000000..4918481410c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1.d
@@ -0,0 +1,41 @@
+#as: -march=armv8-a+sme
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 25244000 psel p0, p0, p0\.b\[w12, 0\]
+[^:]+: 25244000 psel p0, p0, p0\.b\[w12, 0\]
+[^:]+: 2524400f psel p15, p0, p0\.b\[w12, 0\]
+[^:]+: 25247c00 psel p0, p15, p0\.b\[w12, 0\]
+[^:]+: 252441e0 psel p0, p0, p15\.b\[w12, 0\]
+[^:]+: 25274000 psel p0, p0, p0\.b\[w15, 0\]
+[^:]+: 25fc4000 psel p0, p0, p0\.b\[w12, 15\]
+[^:]+: 25be74c1 psel p1, p13, p6\.b\[w14, 11\]
+[^:]+: 25284000 psel p0, p0, p0\.h\[w12, 0\]
+[^:]+: 25284000 psel p0, p0, p0\.h\[w12, 0\]
+[^:]+: 2528400f psel p15, p0, p0\.h\[w12, 0\]
+[^:]+: 25287c00 psel p0, p15, p0\.h\[w12, 0\]
+[^:]+: 252841e0 psel p0, p0, p15\.h\[w12, 0\]
+[^:]+: 252b4000 psel p0, p0, p0\.h\[w15, 0\]
+[^:]+: 25f84000 psel p0, p0, p0\.h\[w12, 7\]
+[^:]+: 25b95dcc psel p12, p7, p14\.h\[w13, 5\]
+[^:]+: 25304000 psel p0, p0, p0\.s\[w12, 0\]
+[^:]+: 25304000 psel p0, p0, p0\.s\[w12, 0\]
+[^:]+: 2530400f psel p15, p0, p0\.s\[w12, 0\]
+[^:]+: 25307c00 psel p0, p15, p0\.s\[w12, 0\]
+[^:]+: 253041e0 psel p0, p0, p15\.s\[w12, 0\]
+[^:]+: 25334000 psel p0, p0, p0\.s\[w15, 0\]
+[^:]+: 25f04000 psel p0, p0, p0\.s\[w12, 3\]
+[^:]+: 25b16d66 psel p6, p11, p11\.s\[w13, 2\]
+[^:]+: 25604000 psel p0, p0, p0\.d\[w12, 0\]
+[^:]+: 25604000 psel p0, p0, p0\.d\[w12, 0\]
+[^:]+: 2560400f psel p15, p0, p0\.d\[w12, 0\]
+[^:]+: 25607c00 psel p0, p15, p0\.d\[w12, 0\]
+[^:]+: 256041e0 psel p0, p0, p15\.d\[w12, 0\]
+[^:]+: 25634000 psel p0, p0, p0\.d\[w15, 0\]
+[^:]+: 25e04000 psel p0, p0, p0\.d\[w12, 1\]
+[^:]+: 25e164a7 psel p7, p9, p5\.d\[w13, 1\]
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1.s b/gas/testsuite/gas/aarch64/sve2-sme2-1.s
new file mode 100644
index 00000000000..3b7572b256d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1.s
@@ -0,0 +1,35 @@
+ psel pn0, pn0, p0.b[w12, 0]
+ PSEL PN0, PN0, P0.B[W12, 0]
+ psel pn15, pn0, p0.b[w12, 0]
+ psel pn0, pn15, p0.b[w12, 0]
+ psel pn0, pn0, p15.b[w12, 0]
+ psel pn0, pn0, p0.b[w15, 0]
+ psel pn0, pn0, p0.b[w12, 15]
+ psel pn1, pn13, p6.b[w14, 11]
+
+ psel pn0, pn0, p0.h[w12, 0]
+ PSEL PN0, PN0, P0.H[W12, 0]
+ psel pn15, pn0, p0.h[w12, 0]
+ psel pn0, pn15, p0.h[w12, 0]
+ psel pn0, pn0, p15.h[w12, 0]
+ psel pn0, pn0, p0.h[w15, 0]
+ psel pn0, pn0, p0.h[w12, 7]
+ psel pn12, pn7, p14.h[w13, 5]
+
+ psel pn0, pn0, p0.s[w12, 0]
+ PSEL PN0, PN0, P0.S[W12, 0]
+ psel pn15, pn0, p0.s[w12, 0]
+ psel pn0, pn15, p0.s[w12, 0]
+ psel pn0, pn0, p15.s[w12, 0]
+ psel pn0, pn0, p0.s[w15, 0]
+ psel pn0, pn0, p0.s[w12, 3]
+ psel pn6, pn11, p11.s[w13, 2]
+
+ psel pn0, pn0, p0.d[w12, 0]
+ PSEL PN0, PN0, P0.D[W12, 0]
+ psel pn15, pn0, p0.d[w12, 0]
+ psel pn0, pn15, p0.d[w12, 0]
+ psel pn0, pn0, p15.d[w12, 0]
+ psel pn0, pn0, p0.d[w15, 0]
+ psel pn0, pn0, p0.d[w12, 1]
+ psel pn7, pn9, p5.d[w13, 1]
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 7ccbb0eda7c..34893584065 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -439,13 +439,17 @@ enum aarch64_opnd
AARCH64_OPND_SVE_PATTERN_SCALED, /* Likewise, with additional MUL factor. */
AARCH64_OPND_SVE_PRFOP, /* SVE prefetch operation. */
AARCH64_OPND_SVE_Pd, /* SVE p0-p15 in Pd. */
+ AARCH64_OPND_SVE_PNd, /* SVE pn0-pn15 in Pd. */
AARCH64_OPND_SVE_Pg3, /* SVE p0-p7 in Pg. */
AARCH64_OPND_SVE_Pg4_5, /* SVE p0-p15 in Pg, bits [8,5]. */
AARCH64_OPND_SVE_Pg4_10, /* SVE p0-p15 in Pg, bits [13,10]. */
+ AARCH64_OPND_SVE_PNg4_10, /* SVE pn0-pn15 in Pg, bits [13,10]. */
AARCH64_OPND_SVE_Pg4_16, /* SVE p0-p15 in Pg, bits [19,16]. */
AARCH64_OPND_SVE_Pm, /* SVE p0-p15 in Pm. */
AARCH64_OPND_SVE_Pn, /* SVE p0-p15 in Pn. */
+ AARCH64_OPND_SVE_PNn, /* SVE pn0-pn15 in Pn. */
AARCH64_OPND_SVE_Pt, /* SVE p0-p15 in Pt. */
+ AARCH64_OPND_SVE_PNt, /* SVE pn0-pn15 in Pt. */
AARCH64_OPND_SVE_Rm, /* Integer Rm or ZR, alt. SVE position. */
AARCH64_OPND_SVE_Rn_SP, /* Integer Rn or SP, alt. SVE position. */
AARCH64_OPND_SVE_SHLIMM_PRED, /* SVE shift left amount (predicated). */
@@ -783,6 +787,7 @@ enum aarch64_op
OP_UXTL2,
OP_MOV_P_P,
+ OP_MOV_PN_PN,
OP_MOV_Z_P_Z,
OP_MOV_Z_V,
OP_MOV_Z_Z,
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index fd705bb8690..332b3f77846 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -479,124 +479,125 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1236: /* wfit */
value = 1236; /* --> wfit. */
break;
- case 2049: /* bic */
- case 1299: /* and */
- value = 1299; /* --> and. */
+ case 2053: /* bic */
+ case 1300: /* and */
+ value = 1300; /* --> and. */
break;
- case 1282: /* mov */
- case 1301: /* and */
- value = 1301; /* --> and. */
+ case 1283: /* mov */
+ case 1302: /* and */
+ value = 1302; /* --> and. */
break;
- case 1286: /* movs */
- case 1302: /* ands */
- value = 1302; /* --> ands. */
+ case 1287: /* movs */
+ case 1303: /* ands */
+ value = 1303; /* --> ands. */
break;
- case 2050: /* cmple */
- case 1337: /* cmpge */
- value = 1337; /* --> cmpge. */
+ case 2054: /* cmple */
+ case 1338: /* cmpge */
+ value = 1338; /* --> cmpge. */
break;
- case 2053: /* cmplt */
- case 1340: /* cmpgt */
- value = 1340; /* --> cmpgt. */
+ case 2057: /* cmplt */
+ case 1341: /* cmpgt */
+ value = 1341; /* --> cmpgt. */
break;
- case 2051: /* cmplo */
- case 1342: /* cmphi */
- value = 1342; /* --> cmphi. */
+ case 2055: /* cmplo */
+ case 1343: /* cmphi */
+ value = 1343; /* --> cmphi. */
break;
- case 2052: /* cmpls */
- case 1345: /* cmphs */
- value = 1345; /* --> cmphs. */
+ case 2056: /* cmpls */
+ case 1346: /* cmphs */
+ value = 1346; /* --> cmphs. */
break;
- case 1279: /* mov */
- case 1367: /* cpy */
- value = 1367; /* --> cpy. */
- break;
- case 1281: /* mov */
+ case 1280: /* mov */
case 1368: /* cpy */
value = 1368; /* --> cpy. */
break;
- case 2060: /* fmov */
- case 1284: /* mov */
+ case 1282: /* mov */
case 1369: /* cpy */
value = 1369; /* --> cpy. */
break;
- case 1274: /* mov */
- case 1381: /* dup */
- value = 1381; /* --> dup. */
+ case 2064: /* fmov */
+ case 1285: /* mov */
+ case 1370: /* cpy */
+ value = 1370; /* --> cpy. */
break;
- case 1276: /* mov */
- case 1273: /* mov */
+ case 1274: /* mov */
case 1382: /* dup */
value = 1382; /* --> dup. */
break;
- case 2059: /* fmov */
- case 1278: /* mov */
+ case 1277: /* mov */
+ case 1273: /* mov */
case 1383: /* dup */
value = 1383; /* --> dup. */
break;
- case 1277: /* mov */
- case 1384: /* dupm */
- value = 1384; /* --> dupm. */
+ case 2063: /* fmov */
+ case 1279: /* mov */
+ case 1384: /* dup */
+ value = 1384; /* --> dup. */
break;
- case 2054: /* eon */
- case 1386: /* eor */
- value = 1386; /* --> eor. */
+ case 1278: /* mov */
+ case 1385: /* dupm */
+ value = 1385; /* --> dupm. */
+ break;
+ case 2058: /* eon */
+ case 1387: /* eor */
+ value = 1387; /* --> eor. */
break;
- case 1287: /* not */
- case 1388: /* eor */
- value = 1388; /* --> eor. */
+ case 1288: /* not */
+ case 1389: /* eor */
+ value = 1389; /* --> eor. */
break;
- case 1288: /* nots */
- case 1389: /* eors */
- value = 1389; /* --> eors. */
+ case 1289: /* nots */
+ case 1390: /* eors */
+ value = 1390; /* --> eors. */
break;
- case 2055: /* facle */
- case 1394: /* facge */
- value = 1394; /* --> facge. */
+ case 2059: /* facle */
+ case 1395: /* facge */
+ value = 1395; /* --> facge. */
break;
- case 2056: /* faclt */
- case 1395: /* facgt */
- value = 1395; /* --> facgt. */
+ case 2060: /* faclt */
+ case 1396: /* facgt */
+ value = 1396; /* --> facgt. */
break;
- case 2057: /* fcmle */
- case 1408: /* fcmge */
- value = 1408; /* --> fcmge. */
+ case 2061: /* fcmle */
+ case 1409: /* fcmge */
+ value = 1409; /* --> fcmge. */
break;
- case 2058: /* fcmlt */
- case 1410: /* fcmgt */
- value = 1410; /* --> fcmgt. */
+ case 2062: /* fcmlt */
+ case 1411: /* fcmgt */
+ value = 1411; /* --> fcmgt. */
break;
case 1271: /* fmov */
- case 1416: /* fcpy */
- value = 1416; /* --> fcpy. */
+ case 1417: /* fcpy */
+ value = 1417; /* --> fcpy. */
break;
case 1270: /* fmov */
- case 1439: /* fdup */
- value = 1439; /* --> fdup. */
+ case 1440: /* fdup */
+ value = 1440; /* --> fdup. */
break;
case 1272: /* mov */
- case 1770: /* orr */
- value = 1770; /* --> orr. */
- break;
- case 2061: /* orn */
- case 1771: /* orr */
- value = 1771; /* --> orr. */
+ case 1772: /* orr */
+ value = 1772; /* --> orr. */
break;
- case 1275: /* mov */
+ case 2065: /* orn */
case 1773: /* orr */
value = 1773; /* --> orr. */
break;
- case 1285: /* movs */
- case 1774: /* orrs */
- value = 1774; /* --> orrs. */
+ case 1276: /* mov */
+ case 1275: /* mov */
+ case 1775: /* orr */
+ value = 1775; /* --> orr. */
break;
- case 1280: /* mov */
- case 1836: /* sel */
- value = 1836; /* --> sel. */
+ case 1286: /* movs */
+ case 1776: /* orrs */
+ value = 1776; /* --> orrs. */
break;
- case 1283: /* mov */
- case 1837: /* sel */
- value = 1837; /* --> sel. */
+ case 1281: /* mov */
+ case 1839: /* sel */
+ value = 1839; /* --> sel. */
+ break;
+ case 1284: /* mov */
+ case 1840: /* sel */
+ value = 1840; /* --> sel. */
break;
default: return NULL;
}
@@ -651,20 +652,24 @@ aarch64_insert_operand (const aarch64_operand *self,
case 174:
case 175:
case 176:
- case 191:
- case 192:
- case 193:
- case 194:
+ case 177:
+ case 178:
+ case 179:
+ case 180:
case 195:
case 196:
case 197:
case 198:
case 199:
- case 205:
- case 208:
- case 210:
- case 211:
+ case 200:
+ case 201:
+ case 202:
+ case 203:
+ case 209:
+ case 212:
case 214:
+ case 215:
+ case 218:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -676,7 +681,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 222:
+ case 226:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -713,18 +718,18 @@ aarch64_insert_operand (const aarch64_operand *self,
case 84:
case 164:
case 166:
- case 183:
- case 184:
- case 185:
- case 186:
case 187:
case 188:
case 189:
case 190:
- case 215:
- case 221:
- case 226:
- case 227:
+ case 191:
+ case 192:
+ case 193:
+ case 194:
+ case 219:
+ case 225:
+ case 230:
+ case 231:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -865,40 +870,40 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
case 165:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 177:
- case 178:
- case 179:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
- case 180:
case 181:
case 182:
+ case 183:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
+ case 184:
+ case 185:
+ case 186:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 200:
- case 201:
- case 202:
- case 203:
case 204:
- return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 205:
case 206:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
case 207:
- case 209:
- return aarch64_ins_sve_reglist (self, info, code, inst, errors);
- case 212:
+ case 208:
+ return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
+ case 210:
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
+ case 211:
case 213:
+ return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 216:
- return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 217:
+ case 220:
+ return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 221:
return aarch64_ins_sme_za_array (self, info, code, inst, errors);
- case 218:
+ case 222:
return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
- case 219:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
- case 220:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
case 223:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 224:
- case 225:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 227:
+ case 228:
+ case 229:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 5a9ca5a980d..10b70824b05 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1643,6 +1643,7 @@ do_misc_encoding (aarch64_inst *inst)
encode_asisd_fcvtxn (inst);
break;
case OP_MOV_P_P:
+ case OP_MOV_PN_PN:
case OP_MOVS_P_P:
/* Copy Pn to Pm and Pg. */
value = extract_field (FLD_SVE_Pn, inst->value, 0);
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index ec2bed95d8e..53fc8122ac8 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -60,7 +60,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx0xxxx
fmopa. */
- return 2361;
+ return 2365;
}
else
{
@@ -68,7 +68,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx1xxxx
fmops. */
- return 2364;
+ return 2368;
}
}
}
@@ -80,7 +80,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000x10xxxxxxxxxxxxxxxx0xxxx
fmopa. */
- return 2362;
+ return 2366;
}
else
{
@@ -88,7 +88,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000x10xxxxxxxxxxxxxxxx1xxxx
fmops. */
- return 2365;
+ return 2369;
}
}
}
@@ -104,7 +104,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx000x0xxxxxxxxxxxxxxxxx
mov. */
- return 2385;
+ return 2389;
}
else
{
@@ -116,7 +116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x0010x00xxxxxxxxxxxxxxxx
addha. */
- return 2353;
+ return 2357;
}
else
{
@@ -124,7 +124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x1010x00xxxxxxxxxxxxxxxx
addha. */
- return 2354;
+ return 2358;
}
}
else
@@ -135,7 +135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x0010x01xxxxxxxxxxxxxxxx
addva. */
- return 2357;
+ return 2361;
}
else
{
@@ -143,7 +143,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x1010x01xxxxxxxxxxxxxxxx
addva. */
- return 2358;
+ return 2362;
}
}
}
@@ -154,7 +154,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x1x0xxxxxxxxxxxxxxxxx
zero. */
- return 2388;
+ return 2392;
}
}
else
@@ -163,7 +163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xxx1xxxxxxxxxxxxxxxxx
mov. */
- return 2384;
+ return 2388;
}
}
}
@@ -179,7 +179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000000xxxxxxxxxxxxxxxx0xxxx
ld1b. */
- return 2389;
+ return 2393;
}
else
{
@@ -189,7 +189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx0xxxx
smopa. */
- return 2368;
+ return 2372;
}
else
{
@@ -197,7 +197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000100xxxxxxxxxxxxxxxx0xxxx
ld1w. */
- return 2391;
+ return 2395;
}
}
}
@@ -209,7 +209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000010xxxxxxxxxxxxxxxx0xxxx
ld1h. */
- return 2390;
+ return 2394;
}
else
{
@@ -219,7 +219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000110xxxxxxxxxxxxxxxx0xxxx
smopa. */
- return 2369;
+ return 2373;
}
else
{
@@ -227,7 +227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100000110xxxxxxxxxxxxxxxx0xxxx
ld1d. */
- return 2392;
+ return 2396;
}
}
}
@@ -240,7 +240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000x00xxxxxxxxxxxxxxxx1xxxx
smops. */
- return 2370;
+ return 2374;
}
else
{
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000x10xxxxxxxxxxxxxxxx1xxxx
smops. */
- return 2371;
+ return 2375;
}
}
}
@@ -265,7 +265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00000001xxxxxxxxxxxxxxxx0xxxx
st1b. */
- return 2399;
+ return 2403;
}
else
{
@@ -275,7 +275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000101xxxxxxxxxxxxxxxx0xxxx
sumopa. */
- return 2372;
+ return 2376;
}
else
{
@@ -283,7 +283,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00000101xxxxxxxxxxxxxxxx0xxxx
st1w. */
- return 2401;
+ return 2405;
}
}
}
@@ -295,7 +295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00000011xxxxxxxxxxxxxxxx0xxxx
st1h. */
- return 2400;
+ return 2404;
}
else
{
@@ -305,7 +305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000111xxxxxxxxxxxxxxxx0xxxx
sumopa. */
- return 2373;
+ return 2377;
}
else
{
@@ -313,7 +313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00000111xxxxxxxxxxxxxxxx0xxxx
st1d. */
- return 2402;
+ return 2406;
}
}
}
@@ -326,7 +326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00000x01xxxxxxxxxxxxxxxx1xxxx
sumops. */
- return 2374;
+ return 2378;
}
else
{
@@ -334,7 +334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00000x11xxxxxxxxxxxxxxxx1xxxx
sumops. */
- return 2375;
+ return 2379;
}
}
}
@@ -375,7 +375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxxxxxxxxxxxxx0xxxx
ldr. */
- return 2409;
+ return 2413;
}
else
{
@@ -385,7 +385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001100xxxxxxxxxxxxxxxx0xxxx
bfmopa. */
- return 2359;
+ return 2363;
}
else
{
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx0xxxx
usmopa. */
- return 2380;
+ return 2384;
}
}
}
@@ -405,7 +405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001x10xxxxxxxxxxxxxxxx0xxxx
usmopa. */
- return 2381;
+ return 2385;
}
else
{
@@ -413,7 +413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00001x10xxxxxxxxxxxxxxxx0xxxx
ld1q. */
- return 2393;
+ return 2397;
}
}
}
@@ -427,7 +427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001001xxxxxxxxxxxxxxxx0xxxx
str. */
- return 2410;
+ return 2414;
}
else
{
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001101xxxxxxxxxxxxxxxx0xxxx
fmopa. */
- return 2363;
+ return 2367;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001101xxxxxxxxxxxxxxxx0xxxx
umopa. */
- return 2376;
+ return 2380;
}
}
}
@@ -457,7 +457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001x11xxxxxxxxxxxxxxxx0xxxx
umopa. */
- return 2377;
+ return 2381;
}
else
{
@@ -465,7 +465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00001x11xxxxxxxxxxxxxxxx0xxxx
st1q. */
- return 2403;
+ return 2407;
}
}
}
@@ -482,7 +482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001x00xxxxxxxxxxxxxxxx1xxxx
bfmops. */
- return 2360;
+ return 2364;
}
else
{
@@ -490,7 +490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001x00xxxxxxxxxxxxxxxx1xxxx
usmops. */
- return 2382;
+ return 2386;
}
}
else
@@ -499,7 +499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001x10xxxxxxxxxxxxxxxx1xxxx
usmops. */
- return 2383;
+ return 2387;
}
}
else
@@ -512,7 +512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001x01xxxxxxxxxxxxxxxx1xxxx
fmops. */
- return 2366;
+ return 2370;
}
else
{
@@ -520,7 +520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001x01xxxxxxxxxxxxxxxx1xxxx
umops. */
- return 2378;
+ return 2382;
}
}
else
@@ -529,7 +529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001x11xxxxxxxxxxxxxxxx1xxxx
umops. */
- return 2379;
+ return 2383;
}
}
}
@@ -2896,7 +2896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2455;
+ return 2460;
}
else
{
@@ -2904,7 +2904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2463;
+ return 2468;
}
}
else
@@ -2915,7 +2915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2459;
+ return 2464;
}
else
{
@@ -2923,7 +2923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2466;
+ return 2471;
}
}
}
@@ -2961,7 +2961,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2515;
+ return 2520;
}
else
{
@@ -2969,7 +2969,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2521;
+ return 2526;
}
}
else
@@ -2980,7 +2980,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2518;
+ return 2523;
}
else
{
@@ -2988,7 +2988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2524;
+ return 2529;
}
}
}
@@ -3002,7 +3002,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2539;
+ return 2544;
}
else
{
@@ -3010,7 +3010,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2545;
+ return 2550;
}
}
else
@@ -3021,7 +3021,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2542;
+ return 2547;
}
else
{
@@ -3029,7 +3029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2548;
+ return 2553;
}
}
}
@@ -3046,7 +3046,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2527;
+ return 2532;
}
else
{
@@ -3054,7 +3054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2533;
+ return 2538;
}
}
else
@@ -3065,7 +3065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2530;
+ return 2535;
}
else
{
@@ -3073,7 +3073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2536;
+ return 2541;
}
}
}
@@ -3087,7 +3087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2551;
+ return 2556;
}
else
{
@@ -3095,7 +3095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2557;
+ return 2562;
}
}
else
@@ -3106,7 +3106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2554;
+ return 2559;
}
else
{
@@ -3114,7 +3114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2560;
+ return 2565;
}
}
}
@@ -3179,7 +3179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2456;
+ return 2461;
}
else
{
@@ -3187,7 +3187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2464;
+ return 2469;
}
}
else
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2460;
+ return 2465;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2467;
+ return 2472;
}
}
}
@@ -3244,7 +3244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2516;
+ return 2521;
}
else
{
@@ -3252,7 +3252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2522;
+ return 2527;
}
}
else
@@ -3263,7 +3263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2519;
+ return 2524;
}
else
{
@@ -3271,7 +3271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2525;
+ return 2530;
}
}
}
@@ -3285,7 +3285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2540;
+ return 2545;
}
else
{
@@ -3293,7 +3293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2546;
+ return 2551;
}
}
else
@@ -3304,7 +3304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2543;
+ return 2548;
}
else
{
@@ -3312,7 +3312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2549;
+ return 2554;
}
}
}
@@ -3329,7 +3329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2528;
+ return 2533;
}
else
{
@@ -3337,7 +3337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2534;
+ return 2539;
}
}
else
@@ -3348,7 +3348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2531;
+ return 2536;
}
else
{
@@ -3356,7 +3356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2537;
+ return 2542;
}
}
}
@@ -3370,7 +3370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2552;
+ return 2557;
}
else
{
@@ -3378,7 +3378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2558;
+ return 2563;
}
}
else
@@ -3389,7 +3389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2555;
+ return 2560;
}
else
{
@@ -3397,7 +3397,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2561;
+ return 2566;
}
}
}
@@ -3465,7 +3465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2458;
+ return 2463;
}
else
{
@@ -3473,7 +3473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2465;
+ return 2470;
}
}
else
@@ -3482,7 +3482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2462;
+ return 2467;
}
}
else
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2457;
+ return 2462;
}
else
{
@@ -3501,7 +3501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2461;
+ return 2466;
}
}
}
@@ -3563,7 +3563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2517;
+ return 2522;
}
else
{
@@ -3571,7 +3571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2611;
+ return 2616;
}
}
else
@@ -3582,7 +3582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2523;
+ return 2528;
}
else
{
@@ -3590,7 +3590,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2613;
+ return 2618;
}
}
}
@@ -3604,7 +3604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2520;
+ return 2525;
}
else
{
@@ -3612,7 +3612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2612;
+ return 2617;
}
}
else
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2526;
+ return 2531;
}
}
}
@@ -3637,7 +3637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2541;
+ return 2546;
}
else
{
@@ -3645,7 +3645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2617;
+ return 2622;
}
}
else
@@ -3656,7 +3656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2547;
+ return 2552;
}
else
{
@@ -3664,7 +3664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2619;
+ return 2624;
}
}
}
@@ -3678,7 +3678,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2544;
+ return 2549;
}
else
{
@@ -3686,7 +3686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2618;
+ return 2623;
}
}
else
@@ -3695,7 +3695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2550;
+ return 2555;
}
}
}
@@ -3714,7 +3714,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2529;
+ return 2534;
}
else
{
@@ -3722,7 +3722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2614;
+ return 2619;
}
}
else
@@ -3733,7 +3733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2535;
+ return 2540;
}
else
{
@@ -3741,7 +3741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2616;
+ return 2621;
}
}
}
@@ -3755,7 +3755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2532;
+ return 2537;
}
else
{
@@ -3763,7 +3763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2615;
+ return 2620;
}
}
else
@@ -3772,7 +3772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2538;
+ return 2543;
}
}
}
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2553;
+ return 2558;
}
else
{
@@ -3796,7 +3796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2620;
+ return 2625;
}
}
else
@@ -3807,7 +3807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2559;
+ return 2564;
}
else
{
@@ -3815,7 +3815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2622;
+ return 2627;
}
}
}
@@ -3829,7 +3829,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2556;
+ return 2561;
}
else
{
@@ -3837,7 +3837,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2621;
+ return 2626;
}
}
else
@@ -3846,7 +3846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2562;
+ return 2567;
}
}
}
@@ -4219,7 +4219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2640;
+ return 2645;
}
else
{
@@ -4237,7 +4237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2643;
+ return 2648;
}
}
}
@@ -4317,7 +4317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2453;
+ return 2458;
}
else
{
@@ -4325,7 +4325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2454;
+ return 2459;
}
}
else
@@ -4432,7 +4432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2645;
+ return 2650;
}
}
}
@@ -4448,7 +4448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2642;
+ return 2647;
}
else
{
@@ -4493,7 +4493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2452;
+ return 2457;
}
else
{
@@ -4587,7 +4587,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2644;
+ return 2649;
}
}
}
@@ -4717,7 +4717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2646;
+ return 2651;
}
}
}
@@ -4733,7 +4733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2641;
+ return 2646;
}
else
{
@@ -5064,7 +5064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000000000xxxxxxxxxxxxx
add. */
- return 1292;
+ return 1293;
}
else
{
@@ -5072,7 +5072,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010000000xxxxxxxxxxxxx
mul. */
- return 1761;
+ return 1763;
}
}
else
@@ -5083,7 +5083,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001000000xxxxxxxxxxxxx
smax. */
- return 1840;
+ return 1843;
}
else
{
@@ -5091,7 +5091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011000000xxxxxxxxxxxxx
orr. */
- return 1772;
+ return 1774;
}
}
}
@@ -5103,7 +5103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0100000xxxxxxxxxxxxx
sdiv. */
- return 1831;
+ return 1834;
}
else
{
@@ -5111,7 +5111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1100000xxxxxxxxxxxxx
sabd. */
- return 1822;
+ return 1825;
}
}
}
@@ -5125,7 +5125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0010000xxxxxxxxxxxxx
smulh. */
- return 1845;
+ return 1848;
}
else
{
@@ -5135,7 +5135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001010000xxxxxxxxxxxxx
smin. */
- return 1843;
+ return 1846;
}
else
{
@@ -5143,7 +5143,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011010000xxxxxxxxxxxxx
and. */
- return 1300;
+ return 1301;
}
}
}
@@ -5153,7 +5153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx110000xxxxxxxxxxxxx
sdivr. */
- return 1832;
+ return 1835;
}
}
}
@@ -5169,7 +5169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0001000xxxxxxxxxxxxx
sub. */
- return 1961;
+ return 1965;
}
else
{
@@ -5179,7 +5179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001001000xxxxxxxxxxxxx
umax. */
- return 1989;
+ return 1993;
}
else
{
@@ -5187,7 +5187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011001000xxxxxxxxxxxxx
eor. */
- return 1387;
+ return 1388;
}
}
}
@@ -5199,7 +5199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0101000xxxxxxxxxxxxx
udiv. */
- return 1983;
+ return 1987;
}
else
{
@@ -5207,7 +5207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1101000xxxxxxxxxxxxx
uabd. */
- return 1974;
+ return 1978;
}
}
}
@@ -5223,7 +5223,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000011000xxxxxxxxxxxxx
subr. */
- return 1963;
+ return 1967;
}
else
{
@@ -5231,7 +5231,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010011000xxxxxxxxxxxxx
umulh. */
- return 1994;
+ return 1998;
}
}
else
@@ -5242,7 +5242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001011000xxxxxxxxxxxxx
umin. */
- return 1992;
+ return 1996;
}
else
{
@@ -5250,7 +5250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011011000xxxxxxxxxxxxx
bic. */
- return 1312;
+ return 1313;
}
}
}
@@ -5260,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111000xxxxxxxxxxxxx
udivr. */
- return 1984;
+ return 1988;
}
}
}
@@ -5273,7 +5273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx000xxxxxxxxxxxxx
ld1sb. */
- return 1574;
+ return 1575;
}
else
{
@@ -5281,7 +5281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1585;
+ return 1586;
}
}
}
@@ -5299,7 +5299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx000000xxxxxxxxxx
sdot. */
- return 1833;
+ return 1836;
}
else
{
@@ -5307,7 +5307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx000010xxxxxxxxxx
sqdmlalbt. */
- return 2183;
+ return 2187;
}
}
else
@@ -5318,7 +5318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx000001xxxxxxxxxx
udot. */
- return 1985;
+ return 1989;
}
else
{
@@ -5326,7 +5326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx000011xxxxxxxxxx
sqdmlslbt. */
- return 2190;
+ return 2194;
}
}
}
@@ -5336,7 +5336,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx0001xxxxxxxxxxxx
cdot. */
- return 2072;
+ return 2076;
}
}
else
@@ -5347,7 +5347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x00x0xxxxx000xxxxxxxxxxxxx
ld1sb. */
- return 1578;
+ return 1579;
}
else
{
@@ -5355,7 +5355,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x0xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1589;
+ return 1590;
}
}
}
@@ -5376,7 +5376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000000xxxxxxxxxx
add. */
- return 1290;
+ return 1291;
}
else
{
@@ -5384,7 +5384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000100xxxxxxxxxx
sqadd. */
- return 1847;
+ return 1850;
}
}
else
@@ -5393,7 +5393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000x10xxxxxxxxxx
sqsub. */
- return 1877;
+ return 1880;
}
}
else
@@ -5406,7 +5406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000001xxxxxxxxxx
sub. */
- return 1959;
+ return 1963;
}
else
{
@@ -5414,7 +5414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000101xxxxxxxxxx
uqadd. */
- return 1995;
+ return 1999;
}
}
else
@@ -5423,7 +5423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx000x11xxxxxxxxxx
uqsub. */
- return 2025;
+ return 2029;
}
}
}
@@ -5435,7 +5435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx000xxxxxxxxxxxxx
prfb. */
- return 1780;
+ return 1783;
}
else
{
@@ -5443,7 +5443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1586;
+ return 1587;
}
}
}
@@ -5461,7 +5461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x1xxxxx000x00xxxxxxxxxx
sqrdmlah. */
- return 2208;
+ return 2212;
}
else
{
@@ -5469,7 +5469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x1xxxxx000x10xxxxxxxxxx
mla. */
- return 2115;
+ return 2119;
}
}
else
@@ -5480,7 +5480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x1xxxxx000x01xxxxxxxxxx
sqrdmlsh. */
- return 2212;
+ return 2216;
}
else
{
@@ -5488,7 +5488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x1xxxxx000x11xxxxxxxxxx
mls. */
- return 2118;
+ return 2122;
}
}
}
@@ -5498,7 +5498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x00x1xxxxx000xxxxxxxxxxxxx
prfb. */
- return 1781;
+ return 1784;
}
}
else
@@ -5517,7 +5517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000000xxxxxxxxxx
sdot. */
- return 1834;
+ return 1837;
}
else
{
@@ -5525,7 +5525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000000xxxxxxxxxx
sdot. */
- return 1835;
+ return 1838;
}
}
else
@@ -5536,7 +5536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000100xxxxxxxxxx
sqrdmlah. */
- return 2209;
+ return 2213;
}
else
{
@@ -5544,7 +5544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000100xxxxxxxxxx
sqrdmlah. */
- return 2210;
+ return 2214;
}
}
}
@@ -5558,7 +5558,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000010xxxxxxxxxx
mla. */
- return 2116;
+ return 2120;
}
else
{
@@ -5566,7 +5566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000010xxxxxxxxxx
mla. */
- return 2117;
+ return 2121;
}
}
else
@@ -5575,7 +5575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2472;
+ return 2477;
}
}
}
@@ -5591,7 +5591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000001xxxxxxxxxx
udot. */
- return 1986;
+ return 1990;
}
else
{
@@ -5599,7 +5599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000001xxxxxxxxxx
udot. */
- return 1987;
+ return 1991;
}
}
else
@@ -5610,7 +5610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000101xxxxxxxxxx
sqrdmlsh. */
- return 2213;
+ return 2217;
}
else
{
@@ -5618,7 +5618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000101xxxxxxxxxx
sqrdmlsh. */
- return 2214;
+ return 2218;
}
}
}
@@ -5632,7 +5632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx000011xxxxxxxxxx
mls. */
- return 2119;
+ return 2123;
}
else
{
@@ -5640,7 +5640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx000011xxxxxxxxxx
mls. */
- return 2120;
+ return 2124;
}
}
else
@@ -5649,7 +5649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2473;
+ return 2478;
}
}
}
@@ -5660,7 +5660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x1xxxxx000xxxxxxxxxxxxx
ld1sh. */
- return 1590;
+ return 1591;
}
}
}
@@ -5686,7 +5686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx000000100xxxxxxxxxxxxx
asr. */
- return 1308;
+ return 1309;
}
else
{
@@ -5696,7 +5696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010000100xxxxxxxxxxxxx
asr. */
- return 1306;
+ return 1307;
}
else
{
@@ -5704,7 +5704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx010000100xxxxxxxxxxxxx
shadd. */
- return 2149;
+ return 2153;
}
}
}
@@ -5716,7 +5716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx001000100xxxxxxxxxxxxx
sqshl. */
- return 2227;
+ return 2231;
}
else
{
@@ -5726,7 +5726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011000100xxxxxxxxxxxxx
asr. */
- return 1307;
+ return 1308;
}
else
{
@@ -5734,7 +5734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx011000100xxxxxxxxxxxxx
sqadd. */
- return 2178;
+ return 2182;
}
}
}
@@ -5749,7 +5749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx000100100xxxxxxxxxxxxx
asrd. */
- return 1309;
+ return 1310;
}
else
{
@@ -5759,7 +5759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010100100xxxxxxxxxxxxx
asrr. */
- return 1310;
+ return 1311;
}
else
{
@@ -5767,7 +5767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx010100100xxxxxxxxxxxxx
srhadd. */
- return 2240;
+ return 2244;
}
}
}
@@ -5781,7 +5781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001100100xxxxxxxxxxxxx
srshr. */
- return 2244;
+ return 2248;
}
else
{
@@ -5789,7 +5789,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx001100100xxxxxxxxxxxxx
sqshlr. */
- return 2228;
+ return 2232;
}
}
else
@@ -5798,7 +5798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx011100100xxxxxxxxxxxxx
suqadd. */
- return 2264;
+ return 2268;
}
}
}
@@ -5815,7 +5815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx000010100xxxxxxxxxxxxx
srshl. */
- return 2242;
+ return 2246;
}
else
{
@@ -5823,7 +5823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx010010100xxxxxxxxxxxxx
shsub. */
- return 2152;
+ return 2156;
}
}
else
@@ -5834,7 +5834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx001010100xxxxxxxxxxxxx
sqrshl. */
- return 2220;
+ return 2224;
}
else
{
@@ -5842,7 +5842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx011010100xxxxxxxxxxxxx
sqsub. */
- return 2234;
+ return 2238;
}
}
}
@@ -5858,7 +5858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000110100xxxxxxxxxxxxx
sqshl. */
- return 2226;
+ return 2230;
}
else
{
@@ -5866,7 +5866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx000110100xxxxxxxxxxxxx
srshlr. */
- return 2243;
+ return 2247;
}
}
else
@@ -5875,7 +5875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx010110100xxxxxxxxxxxxx
shsubr. */
- return 2153;
+ return 2157;
}
}
else
@@ -5886,7 +5886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx001110100xxxxxxxxxxxxx
sqrshlr. */
- return 2221;
+ return 2225;
}
else
{
@@ -5894,7 +5894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx011110100xxxxxxxxxxxxx
sqsubr. */
- return 2235;
+ return 2239;
}
}
}
@@ -5914,7 +5914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx000001100xxxxxxxxxxxxx
lsr. */
- return 1752;
+ return 1754;
}
else
{
@@ -5924,7 +5924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010001100xxxxxxxxxxxxx
lsr. */
- return 1750;
+ return 1752;
}
else
{
@@ -5932,7 +5932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx010001100xxxxxxxxxxxxx
uhadd. */
- return 2277;
+ return 2281;
}
}
}
@@ -5944,7 +5944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx001001100xxxxxxxxxxxxx
uqshl. */
- return 2307;
+ return 2311;
}
else
{
@@ -5954,7 +5954,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011001100xxxxxxxxxxxxx
lsr. */
- return 1751;
+ return 1753;
}
else
{
@@ -5962,7 +5962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx011001100xxxxxxxxxxxxx
uqadd. */
- return 2301;
+ return 2305;
}
}
}
@@ -5977,7 +5977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0101100xxxxxxxxxxxxx
lsrr. */
- return 1753;
+ return 1755;
}
else
{
@@ -5985,7 +5985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0x0101100xxxxxxxxxxxxx
urhadd. */
- return 2316;
+ return 2320;
}
}
else
@@ -5998,7 +5998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001101100xxxxxxxxxxxxx
urshr. */
- return 2319;
+ return 2323;
}
else
{
@@ -6006,7 +6006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx001101100xxxxxxxxxxxxx
uqshlr. */
- return 2308;
+ return 2312;
}
}
else
@@ -6015,7 +6015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx011101100xxxxxxxxxxxxx
usqadd. */
- return 2324;
+ return 2328;
}
}
}
@@ -6034,7 +6034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000011100xxxxxxxxxxxxx
lsl. */
- return 1746;
+ return 1748;
}
else
{
@@ -6042,7 +6042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx000011100xxxxxxxxxxxxx
urshl. */
- return 2317;
+ return 2321;
}
}
else
@@ -6053,7 +6053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010011100xxxxxxxxxxxxx
lsl. */
- return 1744;
+ return 1746;
}
else
{
@@ -6061,7 +6061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx010011100xxxxxxxxxxxxx
uhsub. */
- return 2278;
+ return 2282;
}
}
}
@@ -6073,7 +6073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx001011100xxxxxxxxxxxxx
uqrshl. */
- return 2302;
+ return 2306;
}
else
{
@@ -6083,7 +6083,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011011100xxxxxxxxxxxxx
lsl. */
- return 1745;
+ return 1747;
}
else
{
@@ -6091,7 +6091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx011011100xxxxxxxxxxxxx
uqsub. */
- return 2311;
+ return 2315;
}
}
}
@@ -6108,7 +6108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000111100xxxxxxxxxxxxx
uqshl. */
- return 2306;
+ return 2310;
}
else
{
@@ -6116,7 +6116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx000111100xxxxxxxxxxxxx
urshlr. */
- return 2318;
+ return 2322;
}
}
else
@@ -6127,7 +6127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010111100xxxxxxxxxxxxx
lslr. */
- return 1747;
+ return 1749;
}
else
{
@@ -6135,7 +6135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx010111100xxxxxxxxxxxxx
uhsubr. */
- return 2279;
+ return 2283;
}
}
}
@@ -6149,7 +6149,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001111100xxxxxxxxxxxxx
sqshlu. */
- return 2229;
+ return 2233;
}
else
{
@@ -6157,7 +6157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx001111100xxxxxxxxxxxxx
uqrshlr. */
- return 2303;
+ return 2307;
}
}
else
@@ -6166,7 +6166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x0001x0xx011111100xxxxxxxxxxxxx
uqsubr. */
- return 2312;
+ return 2316;
}
}
}
@@ -6185,7 +6185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx1000x0xxxxxxxxxx
asr. */
- return 1304;
+ return 1305;
}
else
{
@@ -6195,7 +6195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0x01xxxxx1000x0xxxxxxxxxx
smlalb. */
- return 2157;
+ return 2161;
}
else
{
@@ -6203,7 +6203,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0x11xxxxx1000x0xxxxxxxxxx
smlalb. */
- return 2158;
+ return 2162;
}
}
}
@@ -6215,7 +6215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx1001x0xxxxxxxxxx
asr. */
- return 1305;
+ return 1306;
}
else
{
@@ -6225,7 +6225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0x01xxxxx1001x0xxxxxxxxxx
umlalb. */
- return 2282;
+ return 2286;
}
else
{
@@ -6233,7 +6233,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0x11xxxxx1001x0xxxxxxxxxx
umlalb. */
- return 2283;
+ return 2287;
}
}
}
@@ -6250,7 +6250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100001xxxxxxxxxx
lsr. */
- return 1748;
+ return 1750;
}
else
{
@@ -6258,7 +6258,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100011xxxxxxxxxx
lsl. */
- return 1742;
+ return 1744;
}
}
else
@@ -6269,7 +6269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0x01xxxxx1000x1xxxxxxxxxx
smlalt. */
- return 2160;
+ return 2164;
}
else
{
@@ -6277,7 +6277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0x11xxxxx1000x1xxxxxxxxxx
smlalt. */
- return 2161;
+ return 2165;
}
}
}
@@ -6291,7 +6291,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100101xxxxxxxxxx
lsr. */
- return 1749;
+ return 1751;
}
else
{
@@ -6299,7 +6299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx100111xxxxxxxxxx
lsl. */
- return 1743;
+ return 1745;
}
}
else
@@ -6310,7 +6310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0x01xxxxx1001x1xxxxxxxxxx
umlalt. */
- return 2285;
+ return 2289;
}
else
{
@@ -6318,7 +6318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0x11xxxxx1001x1xxxxxxxxxx
umlalt. */
- return 2286;
+ return 2290;
}
}
}
@@ -6337,7 +6337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0001x0000xxxxx100xxxxxxxxxxxxx
ldnt1sb. */
- return 2109;
+ return 2113;
}
else
{
@@ -6345,7 +6345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0001x0100xxxxx100xxxxxxxxxxxxx
ldnt1sh. */
- return 2110;
+ return 2114;
}
}
else
@@ -6358,7 +6358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0001xxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1580;
+ return 1581;
}
else
{
@@ -6366,7 +6366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0001xxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1584;
+ return 1585;
}
}
else
@@ -6377,7 +6377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0101xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1593;
+ return 1594;
}
else
{
@@ -6385,7 +6385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0101xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1596;
+ return 1597;
}
}
}
@@ -6400,7 +6400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x001xxxxxx100xxxxxxxxxxxxx
ld1rb. */
- return 1550;
+ return 1551;
}
else
{
@@ -6410,7 +6410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0010xxxxx100xxxxxxxxxxxxx
ld1sb. */
- return 1579;
+ return 1580;
}
else
{
@@ -6418,7 +6418,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0011xxxxx100xxxxxxxxxxxxx
prfb. */
- return 1782;
+ return 1785;
}
}
}
@@ -6430,7 +6430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x011xxxxxx100xxxxxxxxxxxxx
ld1rsw. */
- return 1571;
+ return 1572;
}
else
{
@@ -6440,7 +6440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0110xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1591;
+ return 1592;
}
else
{
@@ -6448,7 +6448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0111xxxxx100xxxxxxxxxxxxx
ld1sh. */
- return 1592;
+ return 1593;
}
}
}
@@ -6470,7 +6470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx010xxxxxxxxxxxxx
mla. */
- return 1755;
+ return 1757;
}
else
{
@@ -6480,7 +6480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1516;
+ return 1517;
}
else
{
@@ -6488,7 +6488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1536;
+ return 1537;
}
}
}
@@ -6506,7 +6506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx010000xxxxxxxxxx
smlalb. */
- return 2159;
+ return 2163;
}
else
{
@@ -6514,7 +6514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx010100xxxxxxxxxx
smlslb. */
- return 2165;
+ return 2169;
}
}
else
@@ -6525,7 +6525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx010010xxxxxxxxxx
umlalb. */
- return 2284;
+ return 2288;
}
else
{
@@ -6533,7 +6533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx010110xxxxxxxxxx
umlslb. */
- return 2290;
+ return 2294;
}
}
}
@@ -6547,7 +6547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx010001xxxxxxxxxx
smlalt. */
- return 2162;
+ return 2166;
}
else
{
@@ -6555,7 +6555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx010101xxxxxxxxxx
smlslt. */
- return 2168;
+ return 2172;
}
}
else
@@ -6566,7 +6566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx010011xxxxxxxxxx
umlalt. */
- return 2287;
+ return 2291;
}
else
{
@@ -6574,7 +6574,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx010111xxxxxxxxxx
umlslt. */
- return 2293;
+ return 2297;
}
}
}
@@ -6587,7 +6587,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x00x0xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1521;
+ return 1522;
}
else
{
@@ -6595,7 +6595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x0xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1541;
+ return 1542;
}
}
}
@@ -6616,7 +6616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010000xxxxxxxxxx
index. */
- return 1507;
+ return 1508;
}
else
{
@@ -6624,7 +6624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010001xxxxxxxxxx
index. */
- return 1508;
+ return 1509;
}
}
else
@@ -6637,7 +6637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0001xxxxx01010xxxxxxxxxxx
addvl. */
- return 1294;
+ return 1295;
}
else
{
@@ -6645,7 +6645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0101xxxxx01010xxxxxxxxxxx
rdvl. */
- return 1816;
+ return 1819;
}
}
else
@@ -6654,7 +6654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x11xxxxx01010xxxxxxxxxxx
addpl. */
- return 1293;
+ return 1294;
}
}
}
@@ -6668,7 +6668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010010xxxxxxxxxx
index. */
- return 1509;
+ return 1510;
}
else
{
@@ -6676,7 +6676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx010011xxxxxxxxxx
index. */
- return 1506;
+ return 1507;
}
}
else
@@ -6689,7 +6689,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0001xxxxx01011xxxxxxxxxxx
addsvl. */
- return 2356;
+ return 2360;
}
else
{
@@ -6697,7 +6697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0101xxxxx01011xxxxxxxxxxx
rdsvl. */
- return 2367;
+ return 2371;
}
}
else
@@ -6706,7 +6706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x11xxxxx01011xxxxxxxxxxx
addspl. */
- return 2355;
+ return 2359;
}
}
}
@@ -6719,7 +6719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx010xxxxxxxxxxxxx
prfw. */
- return 1800;
+ return 1803;
}
else
{
@@ -6727,7 +6727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1537;
+ return 1538;
}
}
}
@@ -6739,7 +6739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx010xxxxxxxxxxxxx
prfw. */
- return 1802;
+ return 1805;
}
else
{
@@ -6751,7 +6751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx010xxxxxxxxxxxxx
cdot. */
- return 2074;
+ return 2078;
}
else
{
@@ -6759,7 +6759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx010xxxxxxxxxxxxx
cdot. */
- return 2073;
+ return 2077;
}
}
else
@@ -6768,7 +6768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x1xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1542;
+ return 1543;
}
}
}
@@ -6786,7 +6786,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx110xxxxxxxxxxxxx
mad. */
- return 1754;
+ return 1756;
}
else
{
@@ -6802,7 +6802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x010xxxx110x00xxxxxxxxxx
sqincw. */
- return 1874;
+ return 1877;
}
else
{
@@ -6812,7 +6812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx110x00xxxxxxxxxx
sqinch. */
- return 1868;
+ return 1871;
}
else
{
@@ -6820,7 +6820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx110x00xxxxxxxxxx
sqincd. */
- return 1865;
+ return 1868;
}
}
}
@@ -6832,7 +6832,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x011xxxx110x00xxxxxxxxxx
incw. */
- return 1504;
+ return 1505;
}
else
{
@@ -6842,7 +6842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx110x00xxxxxxxxxx
inch. */
- return 1500;
+ return 1501;
}
else
{
@@ -6850,7 +6850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx110x00xxxxxxxxxx
incd. */
- return 1498;
+ return 1499;
}
}
}
@@ -6863,7 +6863,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx110x10xxxxxxxxxx
sqdecw. */
- return 1860;
+ return 1863;
}
else
{
@@ -6873,7 +6873,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx110x10xxxxxxxxxx
sqdech. */
- return 1854;
+ return 1857;
}
else
{
@@ -6881,7 +6881,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx110x10xxxxxxxxxx
sqdecd. */
- return 1851;
+ return 1854;
}
}
}
@@ -6898,7 +6898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x010xxxx110x01xxxxxxxxxx
uqincw. */
- return 2022;
+ return 2026;
}
else
{
@@ -6908,7 +6908,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx110x01xxxxxxxxxx
uqinch. */
- return 2016;
+ return 2020;
}
else
{
@@ -6916,7 +6916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx110x01xxxxxxxxxx
uqincd. */
- return 2013;
+ return 2017;
}
}
}
@@ -6928,7 +6928,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x011xxxx110x01xxxxxxxxxx
decw. */
- return 1379;
+ return 1380;
}
else
{
@@ -6938,7 +6938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx110x01xxxxxxxxxx
dech. */
- return 1375;
+ return 1376;
}
else
{
@@ -6946,7 +6946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx110x01xxxxxxxxxx
decd. */
- return 1373;
+ return 1374;
}
}
}
@@ -6959,7 +6959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx110x11xxxxxxxxxx
uqdecw. */
- return 2008;
+ return 2012;
}
else
{
@@ -6969,7 +6969,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx110x11xxxxxxxxxx
uqdech. */
- return 2002;
+ return 2006;
}
else
{
@@ -6977,7 +6977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx110x11xxxxxxxxxx
uqdecd. */
- return 1999;
+ return 2003;
}
}
}
@@ -6996,7 +6996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0000xxxxx110xxxxxxxxxxxxx
prfb. */
- return 1779;
+ return 1782;
}
else
{
@@ -7004,7 +7004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0100xxxxx110xxxxxxxxxxxxx
prfh. */
- return 1794;
+ return 1797;
}
}
else
@@ -7015,7 +7015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0001xxxxx110xxxxxxxxxxxxx
ld1b. */
- return 1523;
+ return 1524;
}
else
{
@@ -7023,7 +7023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0101xxxxx110xxxxxxxxxxxxx
ld1h. */
- return 1545;
+ return 1546;
}
}
}
@@ -7035,7 +7035,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x001xxxxxx110xxxxxxxxxxxxx
ld1rb. */
- return 1552;
+ return 1553;
}
else
{
@@ -7043,7 +7043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x011xxxxxx110xxxxxxxxxxxxx
ld1rh. */
- return 1556;
+ return 1557;
}
}
}
@@ -7060,7 +7060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx110xx0xxxxxxxxxx
sclamp. */
- return 2412;
+ return 2416;
}
else
{
@@ -7068,7 +7068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx110xx1xxxxxxxxxx
uclamp. */
- return 2413;
+ return 2417;
}
}
else
@@ -7081,7 +7081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0000xxxxx110xxxxxxxxxxxxx
ldnt1b. */
- return 2105;
+ return 2109;
}
else
{
@@ -7089,7 +7089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0100xxxxx110xxxxxxxxxxxxx
ldnt1h. */
- return 2108;
+ return 2112;
}
}
else
@@ -7100,7 +7100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0010xxxxx110xxxxxxxxxxxxx
ld1b. */
- return 1522;
+ return 1523;
}
else
{
@@ -7108,7 +7108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0110xxxxx110xxxxxxxxxxxxx
ld1h. */
- return 1543;
+ return 1544;
}
}
}
@@ -7123,7 +7123,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0001xxxxx110xxxxxxxxxxxxx
ld1b. */
- return 1528;
+ return 1529;
}
else
{
@@ -7137,7 +7137,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1100x0xxxxxxxxxx
smullb. */
- return 2170;
+ return 2174;
}
else
{
@@ -7145,7 +7145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1101x0xxxxxxxxxx
umullb. */
- return 2295;
+ return 2299;
}
}
else
@@ -7156,7 +7156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1100x1xxxxxxxxxx
smullt. */
- return 2173;
+ return 2177;
}
else
{
@@ -7164,7 +7164,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1101x1xxxxxxxxxx
umullt. */
- return 2298;
+ return 2302;
}
}
}
@@ -7174,7 +7174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0101xxxxx110xxxxxxxxxxxxx
ld1h. */
- return 1549;
+ return 1550;
}
}
}
@@ -7186,7 +7186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0011xxxxx110xxxxxxxxxxxxx
prfw. */
- return 1803;
+ return 1806;
}
else
{
@@ -7200,7 +7200,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1100x0xxxxxxxxxx
smullb. */
- return 2171;
+ return 2175;
}
else
{
@@ -7208,7 +7208,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1101x0xxxxxxxxxx
umullb. */
- return 2296;
+ return 2300;
}
}
else
@@ -7219,7 +7219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1100x1xxxxxxxxxx
smullt. */
- return 2174;
+ return 2178;
}
else
{
@@ -7227,7 +7227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1101x1xxxxxxxxxx
umullt. */
- return 2299;
+ return 2303;
}
}
}
@@ -7237,7 +7237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0111xxxxx110xxxxxxxxxxxxx
ld1h. */
- return 1544;
+ return 1545;
}
}
}
@@ -7270,7 +7270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000x00001xxxxxxxxxxxxx
saddv. */
- return 1823;
+ return 1826;
}
else
{
@@ -7278,7 +7278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx000x01001xxxxxxxxxxxxx
uaddv. */
- return 1975;
+ return 1979;
}
}
else
@@ -7287,7 +7287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx010x0x001xxxxxxxxxxxxx
movprfx. */
- return 1758;
+ return 1760;
}
}
else
@@ -7300,7 +7300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001x00001xxxxxxxxxxxxx
smaxv. */
- return 1841;
+ return 1844;
}
else
{
@@ -7308,7 +7308,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011x00001xxxxxxxxxxxxx
orv. */
- return 1775;
+ return 1777;
}
}
else
@@ -7319,7 +7319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx001x01001xxxxxxxxxxxxx
umaxv. */
- return 1990;
+ return 1994;
}
else
{
@@ -7327,7 +7327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx011x01001xxxxxxxxxxxxx
eorv. */
- return 1390;
+ return 1391;
}
}
}
@@ -7342,7 +7342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx00xx10001xxxxxxxxxxxxx
sminv. */
- return 1844;
+ return 1847;
}
else
{
@@ -7350,7 +7350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx01xx10001xxxxxxxxxxxxx
andv. */
- return 1303;
+ return 1304;
}
}
else
@@ -7359,7 +7359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxx11001xxxxxxxxxxxxx
uminv. */
- return 1993;
+ return 1997;
}
}
}
@@ -7371,7 +7371,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx001xxxxxxxxxxxxx
ldff1sb. */
- return 1674;
+ return 1675;
}
else
{
@@ -7379,7 +7379,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx001xxxxxxxxxxxxx
ldff1sh. */
- return 1685;
+ return 1686;
}
}
}
@@ -7393,7 +7393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx0010xxxxxxxxxxxx
cmla. */
- return 2075;
+ return 2079;
}
else
{
@@ -7401,7 +7401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx0011xxxxxxxxxxxx
sqrdcmlah. */
- return 2207;
+ return 2211;
}
}
else
@@ -7412,7 +7412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x00x0xxxxx001xxxxxxxxxxxxx
ldff1sb. */
- return 1681;
+ return 1682;
}
else
{
@@ -7420,7 +7420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x0xxxxx001xxxxxxxxxxxxx
ldff1sh. */
- return 1691;
+ return 1692;
}
}
}
@@ -7443,7 +7443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0001xxxxx001x00xxxxxxxxxx
and. */
- return 1298;
+ return 1299;
}
else
{
@@ -7451,7 +7451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0101xxxxx001x00xxxxxxxxxx
eor. */
- return 1385;
+ return 1386;
}
}
else
@@ -7462,7 +7462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx001x00xxxxxxxxxx
orr. */
- return 1770;
+ return 1772;
}
else
{
@@ -7470,7 +7470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx001x00xxxxxxxxxx
bic. */
- return 1311;
+ return 1312;
}
}
}
@@ -7482,7 +7482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x01xxxxx001x10xxxxxxxxxx
eor3. */
- return 2078;
+ return 2082;
}
else
{
@@ -7490,7 +7490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0x11xxxxx001x10xxxxxxxxxx
bcax. */
- return 2067;
+ return 2071;
}
}
}
@@ -7502,7 +7502,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx001x01xxxxxxxxxx
xar. */
- return 2340;
+ return 2344;
}
else
{
@@ -7514,7 +7514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0001xxxxx001x11xxxxxxxxxx
bsl. */
- return 2068;
+ return 2072;
}
else
{
@@ -7522,7 +7522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0101xxxxx001x11xxxxxxxxxx
bsl2n. */
- return 2070;
+ return 2074;
}
}
else
@@ -7533,7 +7533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx001x11xxxxxxxxxx
bsl1n. */
- return 2069;
+ return 2073;
}
else
{
@@ -7541,7 +7541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx001x11xxxxxxxxxx
nbsl. */
- return 2125;
+ return 2129;
}
}
}
@@ -7555,7 +7555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx001xxxxxxxxxxxxx
prfh. */
- return 1793;
+ return 1796;
}
else
{
@@ -7563,7 +7563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx001xxxxxxxxxxxxx
ldff1sh. */
- return 1686;
+ return 1687;
}
}
}
@@ -7575,7 +7575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx001xxxxxxxxxxxxx
prfh. */
- return 1795;
+ return 1798;
}
else
{
@@ -7591,7 +7591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx0010x0xxxxxxxxxx
sqdmlalb. */
- return 2180;
+ return 2184;
}
else
{
@@ -7599,7 +7599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx0010x0xxxxxxxxxx
sqdmlalb. */
- return 2181;
+ return 2185;
}
}
else
@@ -7610,7 +7610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx0011x0xxxxxxxxxx
sqdmlslb. */
- return 2187;
+ return 2191;
}
else
{
@@ -7618,7 +7618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx0011x0xxxxxxxxxx
sqdmlslb. */
- return 2188;
+ return 2192;
}
}
}
@@ -7632,7 +7632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx0010x1xxxxxxxxxx
sqdmlalt. */
- return 2184;
+ return 2188;
}
else
{
@@ -7640,7 +7640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx0010x1xxxxxxxxxx
sqdmlalt. */
- return 2185;
+ return 2189;
}
}
else
@@ -7651,7 +7651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx0011x1xxxxxxxxxx
sqdmlslt. */
- return 2191;
+ return 2195;
}
else
{
@@ -7659,7 +7659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx0011x1xxxxxxxxxx
sqdmlslt. */
- return 2192;
+ return 2196;
}
}
}
@@ -7670,7 +7670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x1xxxxx001xxxxxxxxxxxxx
ldff1sh. */
- return 1692;
+ return 1693;
}
}
}
@@ -7696,7 +7696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0000101xxxxxxxxxxxxx
sxtb. */
- return 1966;
+ return 1970;
}
else
{
@@ -7704,7 +7704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1000101xxxxxxxxxxxxx
cls. */
- return 1331;
+ return 1332;
}
}
else
@@ -7715,7 +7715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0100101xxxxxxxxxxxxx
sxtw. */
- return 1968;
+ return 1972;
}
else
{
@@ -7723,7 +7723,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1100101xxxxxxxxxxxxx
fabs. */
- return 1393;
+ return 1394;
}
}
}
@@ -7737,7 +7737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0010101xxxxxxxxxxxxx
sxth. */
- return 1967;
+ return 1971;
}
else
{
@@ -7745,7 +7745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1010101xxxxxxxxxxxxx
cnt. */
- return 1360;
+ return 1361;
}
}
else
@@ -7756,7 +7756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0110101xxxxxxxxxxxxx
abs. */
- return 1289;
+ return 1290;
}
else
{
@@ -7764,7 +7764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1110101xxxxxxxxxxxxx
not. */
- return 1767;
+ return 1769;
}
}
}
@@ -7781,7 +7781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0001101xxxxxxxxxxxxx
uxtb. */
- return 2029;
+ return 2033;
}
else
{
@@ -7789,7 +7789,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1001101xxxxxxxxxxxxx
clz. */
- return 1332;
+ return 1333;
}
}
else
@@ -7800,7 +7800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0101101xxxxxxxxxxxxx
uxtw. */
- return 2031;
+ return 2035;
}
else
{
@@ -7808,7 +7808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1101101xxxxxxxxxxxxx
fneg. */
- return 1470;
+ return 1471;
}
}
}
@@ -7822,7 +7822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x0011101xxxxxxxxxxxxx
uxth. */
- return 2030;
+ return 2034;
}
else
{
@@ -7830,7 +7830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0x1011101xxxxxxxxxxxxx
cnot. */
- return 1359;
+ return 1360;
}
}
else
@@ -7839,7 +7839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xx111101xxxxxxxxxxxxx
neg. */
- return 1764;
+ return 1766;
}
}
}
@@ -7856,7 +7856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0001xxxxx1010xxxxxxxxxxxx
adr. */
- return 1295;
+ return 1296;
}
else
{
@@ -7864,7 +7864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx1010xxxxxxxxxxxx
adr. */
- return 1296;
+ return 1297;
}
}
else
@@ -7873,7 +7873,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01x1xxxxx1010xxxxxxxxxxxx
adr. */
- return 1297;
+ return 1298;
}
}
else
@@ -7886,7 +7886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx101100xxxxxxxxxx
ftssel. */
- return 1496;
+ return 1497;
}
else
{
@@ -7894,7 +7894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx101110xxxxxxxxxx
fexpa. */
- return 1440;
+ return 1441;
}
}
else
@@ -7903,7 +7903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx1011x1xxxxxxxxxx
movprfx. */
- return 1757;
+ return 1759;
}
}
}
@@ -7920,7 +7920,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0000xxxxx101xxxxxxxxxxxxx
ldnt1b. */
- return 2104;
+ return 2108;
}
else
{
@@ -7928,7 +7928,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0100xxxxx101xxxxxxxxxxxxx
ldnt1h. */
- return 2107;
+ return 2111;
}
}
else
@@ -7939,7 +7939,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0001xxxxx101xxxxxxxxxxxxx
ldff1sb. */
- return 1683;
+ return 1684;
}
else
{
@@ -7947,7 +7947,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0101xxxxx101xxxxxxxxxxxxx
ldff1sh. */
- return 1695;
+ return 1696;
}
}
}
@@ -7959,7 +7959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x001xxxxxx101xxxxxxxxxxxxx
ld1rb. */
- return 1551;
+ return 1552;
}
else
{
@@ -7967,7 +7967,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x011xxxxxx101xxxxxxxxxxxxx
ld1rh. */
- return 1555;
+ return 1556;
}
}
}
@@ -7990,7 +7990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0x0000101xxxxxxxxxxxxx
urecpe. */
- return 2315;
+ return 2319;
}
else
{
@@ -7998,7 +7998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0x1000101xxxxxxxxxxxxx
sqabs. */
- return 2177;
+ return 2181;
}
}
else
@@ -8009,7 +8009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx00x100101xxxxxxxxxxxxx
sadalp. */
- return 2141;
+ return 2145;
}
else
{
@@ -8017,7 +8017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx01x100101xxxxxxxxxxxxx
smaxp. */
- return 2155;
+ return 2159;
}
}
}
@@ -8027,7 +8027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxx10101xxxxxxxxxxxxx
sminp. */
- return 2156;
+ return 2160;
}
}
else
@@ -8044,7 +8044,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx000001101xxxxxxxxxxxxx
ursqrte. */
- return 2320;
+ return 2324;
}
else
{
@@ -8052,7 +8052,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx010001101xxxxxxxxxxxxx
addp. */
- return 2066;
+ return 2070;
}
}
else
@@ -8061,7 +8061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0x1001101xxxxxxxxxxxxx
sqneg. */
- return 2204;
+ return 2208;
}
}
else
@@ -8072,7 +8072,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx00x101101xxxxxxxxxxxxx
uadalp. */
- return 2272;
+ return 2276;
}
else
{
@@ -8080,7 +8080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx01x101101xxxxxxxxxxxxx
umaxp. */
- return 2280;
+ return 2284;
}
}
}
@@ -8090,7 +8090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxx11101xxxxxxxxxxxxx
uminp. */
- return 2281;
+ return 2285;
}
}
}
@@ -8102,7 +8102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x00x0xxxxx101xxxxxxxxxxxxx
ldff1sb. */
- return 1682;
+ return 1683;
}
else
{
@@ -8110,7 +8110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x0xxxxx101xxxxxxxxxxxxx
ldff1sh. */
- return 1693;
+ return 1694;
}
}
}
@@ -8124,7 +8124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0001xxxxx101xxxxxxxxxxxxx
ldff1sb. */
- return 1684;
+ return 1685;
}
else
{
@@ -8138,7 +8138,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1010x0xxxxxxxxxx
smlslb. */
- return 2163;
+ return 2167;
}
else
{
@@ -8146,7 +8146,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1011x0xxxxxxxxxx
umlslb. */
- return 2288;
+ return 2292;
}
}
else
@@ -8157,7 +8157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1010x1xxxxxxxxxx
smlslt. */
- return 2166;
+ return 2170;
}
else
{
@@ -8165,7 +8165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1011x1xxxxxxxxxx
umlslt. */
- return 2291;
+ return 2295;
}
}
}
@@ -8175,7 +8175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0101xxxxx101xxxxxxxxxxxxx
ldff1sh. */
- return 1696;
+ return 1697;
}
}
}
@@ -8187,7 +8187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0011xxxxx101xxxxxxxxxxxxx
prfh. */
- return 1796;
+ return 1799;
}
else
{
@@ -8201,7 +8201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1010x0xxxxxxxxxx
smlslb. */
- return 2164;
+ return 2168;
}
else
{
@@ -8209,7 +8209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1011x0xxxxxxxxxx
umlslb. */
- return 2289;
+ return 2293;
}
}
else
@@ -8220,7 +8220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1010x1xxxxxxxxxx
smlslt. */
- return 2167;
+ return 2171;
}
else
{
@@ -8228,7 +8228,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1011x1xxxxxxxxxx
umlslt. */
- return 2292;
+ return 2296;
}
}
}
@@ -8238,7 +8238,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0111xxxxx101xxxxxxxxxxxxx
ldff1sh. */
- return 1694;
+ return 1695;
}
}
}
@@ -8260,7 +8260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx011xxxxxxxxxxxxx
mls. */
- return 1756;
+ return 1758;
}
else
{
@@ -8270,7 +8270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x0xxxxx011xxxxxxxxxxxxx
ldff1b. */
- return 1640;
+ return 1641;
}
else
{
@@ -8278,7 +8278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x0xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1660;
+ return 1661;
}
}
}
@@ -8296,7 +8296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011000xxxxxxxxxx
sqdmlalb. */
- return 2182;
+ return 2186;
}
else
{
@@ -8304,7 +8304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011100xxxxxxxxxx
sqrdmlah. */
- return 2211;
+ return 2215;
}
}
else
@@ -8315,7 +8315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011010xxxxxxxxxx
sqdmlslb. */
- return 2189;
+ return 2193;
}
else
{
@@ -8323,7 +8323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2471;
+ return 2476;
}
}
}
@@ -8337,7 +8337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011001xxxxxxxxxx
sqdmlalt. */
- return 2186;
+ return 2190;
}
else
{
@@ -8345,7 +8345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011101xxxxxxxxxx
sqrdmlsh. */
- return 2215;
+ return 2219;
}
}
else
@@ -8354,7 +8354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011x11xxxxxxxxxx
sqdmlslt. */
- return 2193;
+ return 2197;
}
}
}
@@ -8366,7 +8366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x00x0xxxxx011xxxxxxxxxxxxx
ldff1b. */
- return 1649;
+ return 1650;
}
else
{
@@ -8374,7 +8374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x0xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1668;
+ return 1669;
}
}
}
@@ -8395,7 +8395,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx011000xxxxxxxxxx
mul. */
- return 2124;
+ return 2128;
}
else
{
@@ -8403,7 +8403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx011100xxxxxxxxxx
sqdmulh. */
- return 2197;
+ return 2201;
}
}
else
@@ -8412,7 +8412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx011x10xxxxxxxxxx
smulh. */
- return 2169;
+ return 2173;
}
}
else
@@ -8425,7 +8425,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx011001xxxxxxxxxx
pmul. */
- return 2127;
+ return 2131;
}
else
{
@@ -8433,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx011101xxxxxxxxxx
sqrdmulh. */
- return 2219;
+ return 2223;
}
}
else
@@ -8442,7 +8442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx1xxxxx011x11xxxxxxxxxx
umulh. */
- return 2294;
+ return 2298;
}
}
}
@@ -8454,7 +8454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x00x1xxxxx011xxxxxxxxxxxxx
prfd. */
- return 1786;
+ return 1789;
}
else
{
@@ -8462,7 +8462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x01x1xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1661;
+ return 1662;
}
}
}
@@ -8474,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x00x1xxxxx011xxxxxxxxxxxxx
prfd. */
- return 1788;
+ return 1791;
}
else
{
@@ -8488,7 +8488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx0110xxxxxxxxxxxx
cmla. */
- return 2076;
+ return 2080;
}
else
{
@@ -8496,7 +8496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx0110xxxxxxxxxxxx
cmla. */
- return 2077;
+ return 2081;
}
}
else
@@ -8507,7 +8507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx0111xxxxxxxxxxxx
sqrdcmlah. */
- return 2205;
+ return 2209;
}
else
{
@@ -8515,7 +8515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx0111xxxxxxxxxxxx
sqrdcmlah. */
- return 2206;
+ return 2210;
}
}
}
@@ -8525,7 +8525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x01x1xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1669;
+ return 1670;
}
}
}
@@ -8543,7 +8543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0xx0xxxxx111xxxxxxxxxxxxx
msb. */
- return 1759;
+ return 1761;
}
else
{
@@ -8563,7 +8563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00010xxxx111000xxxxxxxxxx
cntb. */
- return 1361;
+ return 1362;
}
else
{
@@ -8571,7 +8571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01010xxxx111000xxxxxxxxxx
cntw. */
- return 1365;
+ return 1366;
}
}
else
@@ -8582,7 +8582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx111000xxxxxxxxxx
cnth. */
- return 1363;
+ return 1364;
}
else
{
@@ -8590,7 +8590,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx111000xxxxxxxxxx
cntd. */
- return 1362;
+ return 1363;
}
}
}
@@ -8604,7 +8604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00011xxxx111000xxxxxxxxxx
incb. */
- return 1497;
+ return 1498;
}
else
{
@@ -8612,7 +8612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01011xxxx111000xxxxxxxxxx
incw. */
- return 1505;
+ return 1506;
}
}
else
@@ -8623,7 +8623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx111000xxxxxxxxxx
inch. */
- return 1501;
+ return 1502;
}
else
{
@@ -8631,7 +8631,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx111000xxxxxxxxxx
incd. */
- return 1499;
+ return 1500;
}
}
}
@@ -8648,7 +8648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00010xxxx111100xxxxxxxxxx
sqincb. */
- return 1864;
+ return 1867;
}
else
{
@@ -8656,7 +8656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01010xxxx111100xxxxxxxxxx
sqincw. */
- return 1876;
+ return 1879;
}
}
else
@@ -8667,7 +8667,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx111100xxxxxxxxxx
sqinch. */
- return 1870;
+ return 1873;
}
else
{
@@ -8675,7 +8675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx111100xxxxxxxxxx
sqincd. */
- return 1867;
+ return 1870;
}
}
}
@@ -8689,7 +8689,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00011xxxx111100xxxxxxxxxx
sqincb. */
- return 1863;
+ return 1866;
}
else
{
@@ -8697,7 +8697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01011xxxx111100xxxxxxxxxx
sqincw. */
- return 1875;
+ return 1878;
}
}
else
@@ -8708,7 +8708,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx111100xxxxxxxxxx
sqinch. */
- return 1869;
+ return 1872;
}
else
{
@@ -8716,7 +8716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx111100xxxxxxxxxx
sqincd. */
- return 1866;
+ return 1869;
}
}
}
@@ -8734,7 +8734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00010xxxx111x10xxxxxxxxxx
sqdecb. */
- return 1850;
+ return 1853;
}
else
{
@@ -8742,7 +8742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01010xxxx111x10xxxxxxxxxx
sqdecw. */
- return 1862;
+ return 1865;
}
}
else
@@ -8753,7 +8753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx111x10xxxxxxxxxx
sqdech. */
- return 1856;
+ return 1859;
}
else
{
@@ -8761,7 +8761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx111x10xxxxxxxxxx
sqdecd. */
- return 1853;
+ return 1856;
}
}
}
@@ -8775,7 +8775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00011xxxx111x10xxxxxxxxxx
sqdecb. */
- return 1849;
+ return 1852;
}
else
{
@@ -8783,7 +8783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01011xxxx111x10xxxxxxxxxx
sqdecw. */
- return 1861;
+ return 1864;
}
}
else
@@ -8794,7 +8794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx111x10xxxxxxxxxx
sqdech. */
- return 1855;
+ return 1858;
}
else
{
@@ -8802,7 +8802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx111x10xxxxxxxxxx
sqdecd. */
- return 1852;
+ return 1855;
}
}
}
@@ -8822,7 +8822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0001xxxxx111001xxxxxxxxxx
decb. */
- return 1372;
+ return 1373;
}
else
{
@@ -8830,7 +8830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0101xxxxx111001xxxxxxxxxx
decw. */
- return 1380;
+ return 1381;
}
}
else
@@ -8841,7 +8841,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0011xxxxx111001xxxxxxxxxx
dech. */
- return 1376;
+ return 1377;
}
else
{
@@ -8849,7 +8849,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x0111xxxxx111001xxxxxxxxxx
decd. */
- return 1374;
+ return 1375;
}
}
}
@@ -8865,7 +8865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00010xxxx111101xxxxxxxxxx
uqincb. */
- return 2011;
+ return 2015;
}
else
{
@@ -8873,7 +8873,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01010xxxx111101xxxxxxxxxx
uqincw. */
- return 2023;
+ return 2027;
}
}
else
@@ -8884,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx111101xxxxxxxxxx
uqinch. */
- return 2017;
+ return 2021;
}
else
{
@@ -8892,7 +8892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx111101xxxxxxxxxx
uqincd. */
- return 2014;
+ return 2018;
}
}
}
@@ -8906,7 +8906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00011xxxx111101xxxxxxxxxx
uqincb. */
- return 2012;
+ return 2016;
}
else
{
@@ -8914,7 +8914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01011xxxx111101xxxxxxxxxx
uqincw. */
- return 2024;
+ return 2028;
}
}
else
@@ -8925,7 +8925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx111101xxxxxxxxxx
uqinch. */
- return 2018;
+ return 2022;
}
else
{
@@ -8933,7 +8933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx111101xxxxxxxxxx
uqincd. */
- return 2015;
+ return 2019;
}
}
}
@@ -8951,7 +8951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00010xxxx111x11xxxxxxxxxx
uqdecb. */
- return 1997;
+ return 2001;
}
else
{
@@ -8959,7 +8959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01010xxxx111x11xxxxxxxxxx
uqdecw. */
- return 2009;
+ return 2013;
}
}
else
@@ -8970,7 +8970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00110xxxx111x11xxxxxxxxxx
uqdech. */
- return 2003;
+ return 2007;
}
else
{
@@ -8978,7 +8978,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01110xxxx111x11xxxxxxxxxx
uqdecd. */
- return 2000;
+ return 2004;
}
}
}
@@ -8992,7 +8992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00011xxxx111x11xxxxxxxxxx
uqdecb. */
- return 1998;
+ return 2002;
}
else
{
@@ -9000,7 +9000,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01011xxxx111x11xxxxxxxxxx
uqdecw. */
- return 2010;
+ return 2014;
}
}
else
@@ -9011,7 +9011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x00111xxxx111x11xxxxxxxxxx
uqdech. */
- return 2004;
+ return 2008;
}
else
{
@@ -9019,7 +9019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x01111xxxx111x11xxxxxxxxxx
uqdecd. */
- return 2001;
+ return 2005;
}
}
}
@@ -9039,7 +9039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0000xxxxx111xxxxxxxxxxxxx
prfb. */
- return 1783;
+ return 1786;
}
else
{
@@ -9047,7 +9047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0100xxxxx111xxxxxxxxxxxxx
prfh. */
- return 1797;
+ return 1800;
}
}
else
@@ -9058,7 +9058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0001xxxxx111xxxxxxxxxxxxx
ldff1b. */
- return 1651;
+ return 1652;
}
else
{
@@ -9066,7 +9066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x0101xxxxx111xxxxxxxxxxxxx
ldff1h. */
- return 1672;
+ return 1673;
}
}
}
@@ -9078,7 +9078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x001xxxxxx111xxxxxxxxxxxxx
ld1rb. */
- return 1553;
+ return 1554;
}
else
{
@@ -9086,7 +9086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x011xxxxxx111xxxxxxxxxxxxx
ld1rh. */
- return 1557;
+ return 1558;
}
}
}
@@ -9103,7 +9103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0000xxxxx111xxxxxxxxxxxxx
prfb. */
- return 1785;
+ return 1788;
}
else
{
@@ -9111,7 +9111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0100xxxxx111xxxxxxxxxxxxx
prfh. */
- return 1799;
+ return 1802;
}
}
else
@@ -9122,7 +9122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0010xxxxx111xxxxxxxxxxxxx
ldff1b. */
- return 1650;
+ return 1651;
}
else
{
@@ -9130,7 +9130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x0110xxxxx111xxxxxxxxxxxxx
ldff1h. */
- return 1670;
+ return 1671;
}
}
}
@@ -9148,7 +9148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x1xxxxx111x00xxxxxxxxxx
sqdmulh. */
- return 2194;
+ return 2198;
}
else
{
@@ -9156,7 +9156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x1xxxxx111x10xxxxxxxxxx
mul. */
- return 2121;
+ return 2125;
}
}
else
@@ -9165,7 +9165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x1xxxxx111xx1xxxxxxxxxx
sqrdmulh. */
- return 2216;
+ return 2220;
}
}
else
@@ -9176,7 +9176,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0001xxxxx111xxxxxxxxxxxxx
ldff1b. */
- return 1652;
+ return 1653;
}
else
{
@@ -9184,7 +9184,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0011xxxxx111xxxxxxxxxxxxx
prfd. */
- return 1789;
+ return 1792;
}
}
}
@@ -9202,7 +9202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1110x0xxxxxxxxxx
sqdmullb. */
- return 2198;
+ return 2202;
}
else
{
@@ -9212,7 +9212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx111100xxxxxxxxxx
sqdmulh. */
- return 2195;
+ return 2199;
}
else
{
@@ -9220,7 +9220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx111110xxxxxxxxxx
mul. */
- return 2122;
+ return 2126;
}
}
}
@@ -9232,7 +9232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1110x1xxxxxxxxxx
sqdmullt. */
- return 2201;
+ return 2205;
}
else
{
@@ -9240,7 +9240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0101xxxxx1111x1xxxxxxxxxx
sqrdmulh. */
- return 2217;
+ return 2221;
}
}
}
@@ -9250,7 +9250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0101xxxxx111xxxxxxxxxxxxx
ldff1h. */
- return 1673;
+ return 1674;
}
}
else
@@ -9265,7 +9265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1110x0xxxxxxxxxx
sqdmullb. */
- return 2199;
+ return 2203;
}
else
{
@@ -9275,7 +9275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx111100xxxxxxxxxx
sqdmulh. */
- return 2196;
+ return 2200;
}
else
{
@@ -9283,7 +9283,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx111110xxxxxxxxxx
mul. */
- return 2123;
+ return 2127;
}
}
}
@@ -9295,7 +9295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1110x1xxxxxxxxxx
sqdmullt. */
- return 2202;
+ return 2206;
}
else
{
@@ -9303,7 +9303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0111xxxxx1111x1xxxxxxxxxx
sqrdmulh. */
- return 2218;
+ return 2222;
}
}
}
@@ -9313,7 +9313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x0111xxxxx111xxxxxxxxxxxxx
ldff1h. */
- return 1671;
+ return 1672;
}
}
}
@@ -9343,7 +9343,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx000xxxxxxxx0xxxx
cmphs. */
- return 1345;
+ return 1346;
}
else
{
@@ -9351,7 +9351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx000xxxxxxxx1xxxx
cmphi. */
- return 1342;
+ return 1343;
}
}
else
@@ -9362,7 +9362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x0xxxxx000xxxxxxxxxxxxx
ld1rqb. */
- return 1559;
+ return 1560;
}
else
{
@@ -9370,7 +9370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x0xxxxx000xxxxxxxxxxxxx
ld1rqh. */
- return 1563;
+ return 1564;
}
}
}
@@ -9384,7 +9384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx010xxxxxxxx0xxxx
cmpge. */
- return 1336;
+ return 1337;
}
else
{
@@ -9392,7 +9392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx010xxxxxxxx1xxxx
cmpgt. */
- return 1339;
+ return 1340;
}
}
else
@@ -9405,7 +9405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0000xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1517;
+ return 1518;
}
else
{
@@ -9413,7 +9413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0100xxxxx010xxxxxxxxxxxxx
ld1sw. */
- return 1597;
+ return 1598;
}
}
else
@@ -9424,7 +9424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0010xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1519;
+ return 1520;
}
else
{
@@ -9432,7 +9432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0110xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1539;
+ return 1540;
}
}
}
@@ -9450,7 +9450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx001xxxxxxxx0xxxx
cmpeq. */
- return 1333;
+ return 1334;
}
else
{
@@ -9458,7 +9458,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx001xxxxxxxx1xxxx
cmpne. */
- return 1356;
+ return 1357;
}
}
else
@@ -9469,7 +9469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x0xxxxx001xxxxxxxxxxxxx
ld1rqb. */
- return 1558;
+ return 1559;
}
else
{
@@ -9477,7 +9477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x0xxxxx001xxxxxxxxxxxxx
ld1rqh. */
- return 1562;
+ return 1563;
}
}
}
@@ -9491,7 +9491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx011xxxxxxxx0xxxx
cmplt. */
- return 1354;
+ return 1355;
}
else
{
@@ -9499,7 +9499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx011xxxxxxxx1xxxx
cmple. */
- return 1348;
+ return 1349;
}
}
else
@@ -9512,7 +9512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0000xxxxx011xxxxxxxxxxxxx
ldff1b. */
- return 1641;
+ return 1642;
}
else
{
@@ -9520,7 +9520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0100xxxxx011xxxxxxxxxxxxx
ldff1sw. */
- return 1697;
+ return 1698;
}
}
else
@@ -9531,7 +9531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0010xxxxx011xxxxxxxxxxxxx
ldff1b. */
- return 1645;
+ return 1646;
}
else
{
@@ -9539,7 +9539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0110xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1664;
+ return 1665;
}
}
}
@@ -9554,7 +9554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0xx0xxxxx0xxxxxxxxxxxxxxx
fcmla. */
- return 1402;
+ return 1403;
}
else
{
@@ -9566,7 +9566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0x00xxxxx0x0xxxxxxxxxxxxx
st1b. */
- return 1879;
+ return 1882;
}
else
{
@@ -9576,7 +9576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0010xxxxx0x0xxxxxxxxxxxxx
st1b. */
- return 1883;
+ return 1886;
}
else
{
@@ -9584,7 +9584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0110xxxxx0x0xxxxxxxxxxxxx
st1h. */
- return 1904;
+ return 1907;
}
}
}
@@ -9600,7 +9600,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0000xxxxx001xxxxxxxxxxxxx
stnt1b. */
- return 2256;
+ return 2260;
}
else
{
@@ -9608,7 +9608,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0100xxxxx001xxxxxxxxxxxxx
stnt1h. */
- return 2259;
+ return 2263;
}
}
else
@@ -9619,7 +9619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0010xxxxx001xxxxxxxxxxxxx
stnt1b. */
- return 2255;
+ return 2259;
}
else
{
@@ -9627,7 +9627,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0110xxxxx001xxxxxxxxxxxxx
stnt1h. */
- return 2258;
+ return 2262;
}
}
}
@@ -9641,7 +9641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0000xxxxx011xxxxxxxxxxxxx
stnt1b. */
- return 1949;
+ return 1952;
}
else
{
@@ -9649,7 +9649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0100xxxxx011xxxxxxxxxxxxx
stnt1h. */
- return 1953;
+ return 1956;
}
}
else
@@ -9660,7 +9660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0010xxxxx011xxxxxxxxxxxxx
st3b. */
- return 1933;
+ return 1936;
}
else
{
@@ -9668,7 +9668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0110xxxxx011xxxxxxxxxxxxx
st3h. */
- return 1937;
+ return 1940;
}
}
}
@@ -9690,7 +9690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x0xx0xxxxx100xxxxxxxx0xxxx
cmpge. */
- return 1337;
+ return 1338;
}
else
{
@@ -9698,7 +9698,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x0xx0xxxxx100xxxxxxxx1xxxx
cmpgt. */
- return 1340;
+ return 1341;
}
}
else
@@ -9711,7 +9711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx110xxxxxxxx0xxxx
cmphs. */
- return 1346;
+ return 1347;
}
else
{
@@ -9719,7 +9719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx110xxxxxxxx1xxxx
cmphi. */
- return 1343;
+ return 1344;
}
}
else
@@ -9732,7 +9732,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0000xxxxx110xxxxxxxxxxxxx
ldnt1b. */
- return 1732;
+ return 1733;
}
else
{
@@ -9740,7 +9740,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0100xxxxx110xxxxxxxxxxxxx
ldnt1h. */
- return 1736;
+ return 1737;
}
}
else
@@ -9751,7 +9751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0010xxxxx110xxxxxxxxxxxxx
ld3b. */
- return 1624;
+ return 1625;
}
else
{
@@ -9759,7 +9759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0110xxxxx110xxxxxxxxxxxxx
ld3h. */
- return 1628;
+ return 1629;
}
}
}
@@ -9779,7 +9779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0xx00x00x1x0xxxxxxxxxxxxx
fcadd. */
- return 1401;
+ return 1402;
}
else
{
@@ -9787,7 +9787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0xx01x00x1x0xxxxxxxxxxxxx
faddp. */
- return 2082;
+ return 2086;
}
}
else
@@ -9798,7 +9798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0xx0xx1001x0xxxxxxxxxxxxx
fmaxnmp. */
- return 2090;
+ return 2094;
}
else
{
@@ -9806,7 +9806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0xx0xx1011x0xxxxxxxxxxxxx
fminnmp. */
- return 2092;
+ return 2096;
}
}
}
@@ -9818,7 +9818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0xx0xxx101x0xxxxxxxxxxxxx
fmaxp. */
- return 2091;
+ return 2095;
}
else
{
@@ -9826,7 +9826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0xx0xxx111x0xxxxxxxxxxxxx
fminp. */
- return 2093;
+ return 2097;
}
}
}
@@ -9840,7 +9840,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0000xxxxx1x0xxxxxxxxxxxxx
st1b. */
- return 1880;
+ return 1883;
}
else
{
@@ -9848,7 +9848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0100xxxxx1x0xxxxxxxxxxxxx
st1h. */
- return 1899;
+ return 1902;
}
}
else
@@ -9859,7 +9859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0010xxxxx1x0xxxxxxxxxxxxx
st1b. */
- return 1884;
+ return 1887;
}
else
{
@@ -9867,7 +9867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0110xxxxx1x0xxxxxxxxxxxxx
st1h. */
- return 1905;
+ return 1908;
}
}
}
@@ -9887,7 +9887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx101xxxxxxxx0xxxx
cmpeq. */
- return 1334;
+ return 1335;
}
else
{
@@ -9895,7 +9895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx101xxxxxxxx1xxxx
cmpne. */
- return 1357;
+ return 1358;
}
}
else
@@ -9910,7 +9910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00000xxxx101xxxxxxxxxxxxx
ld1b. */
- return 1524;
+ return 1525;
}
else
{
@@ -9918,7 +9918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01000xxxx101xxxxxxxxxxxxx
ld1sw. */
- return 1602;
+ return 1603;
}
}
else
@@ -9929,7 +9929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00100xxxx101xxxxxxxxxxxxx
ld1b. */
- return 1526;
+ return 1527;
}
else
{
@@ -9937,7 +9937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01100xxxx101xxxxxxxxxxxxx
ld1h. */
- return 1547;
+ return 1548;
}
}
}
@@ -9951,7 +9951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00001xxxx101xxxxxxxxxxxxx
ldnf1b. */
- return 1716;
+ return 1717;
}
else
{
@@ -9959,7 +9959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01001xxxx101xxxxxxxxxxxxx
ldnf1sw. */
- return 1729;
+ return 1730;
}
}
else
@@ -9970,7 +9970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00101xxxx101xxxxxxxxxxxxx
ldnf1b. */
- return 1718;
+ return 1719;
}
else
{
@@ -9978,7 +9978,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01101xxxx101xxxxxxxxxxxxx
ldnf1h. */
- return 1722;
+ return 1723;
}
}
}
@@ -9996,7 +9996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0000xxxxx101xxxxxxxxxxxxx
fcvtxnt. */
- return 2088;
+ return 2092;
}
else
{
@@ -10004,7 +10004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0000xxxxx101xxxxxxxxxxxxx
st1b. */
- return 1881;
+ return 1884;
}
}
else
@@ -10019,7 +10019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx00101xxxxxxxxxxxxx
fcvtnt. */
- return 2085;
+ return 2089;
}
else
{
@@ -10027,7 +10027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2500;
+ return 2505;
}
}
else
@@ -10036,7 +10036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxxx1101xxxxxxxxxxxxx
fcvtlt. */
- return 2083;
+ return 2087;
}
}
else
@@ -10045,7 +10045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0100xxxxx101xxxxxxxxxxxxx
st1h. */
- return 1900;
+ return 1903;
}
}
}
@@ -10057,7 +10057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0010xxxxx101xxxxxxxxxxxxx
st1b. */
- return 1888;
+ return 1891;
}
else
{
@@ -10069,7 +10069,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0110xxxx0101xxxxxxxxxxxxx
fcvtnt. */
- return 2086;
+ return 2090;
}
else
{
@@ -10077,7 +10077,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0110xxxx1101xxxxxxxxxxxxx
fcvtlt. */
- return 2084;
+ return 2088;
}
}
else
@@ -10086,7 +10086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0110xxxxx101xxxxxxxxxxxxx
st1h. */
- return 1909;
+ return 1912;
}
}
}
@@ -10104,7 +10104,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx111xxxxxxxx0xxxx
cmplo. */
- return 1350;
+ return 1351;
}
else
{
@@ -10112,7 +10112,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx0xxxxx111xxxxxxxx1xxxx
cmpls. */
- return 1352;
+ return 1353;
}
}
else
@@ -10125,7 +10125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0000xxxxx111xxxxxxxxxxxxx
ldnt1b. */
- return 1733;
+ return 1734;
}
else
{
@@ -10133,7 +10133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0100xxxxx111xxxxxxxxxxxxx
ldnt1h. */
- return 1737;
+ return 1738;
}
}
else
@@ -10144,7 +10144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0010xxxxx111xxxxxxxxxxxxx
ld3b. */
- return 1625;
+ return 1626;
}
else
{
@@ -10152,7 +10152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0110xxxxx111xxxxxxxxxxxxx
ld3h. */
- return 1629;
+ return 1630;
}
}
}
@@ -10167,7 +10167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0x000xxxx111xxxxxxxxxxxxx
st1b. */
- return 1886;
+ return 1889;
}
else
{
@@ -10177,7 +10177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x00100xxxx111xxxxxxxxxxxxx
st1b. */
- return 1889;
+ return 1892;
}
else
{
@@ -10185,7 +10185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x01100xxxx111xxxxxxxxxxxxx
st1h. */
- return 1910;
+ return 1913;
}
}
}
@@ -10199,7 +10199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x00001xxxx111xxxxxxxxxxxxx
stnt1b. */
- return 1950;
+ return 1953;
}
else
{
@@ -10207,7 +10207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x01001xxxx111xxxxxxxxxxxxx
stnt1h. */
- return 1954;
+ return 1957;
}
}
else
@@ -10218,7 +10218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x00101xxxx111xxxxxxxxxxxxx
st3b. */
- return 1934;
+ return 1937;
}
else
{
@@ -10226,7 +10226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x01101xxxx111xxxxxxxxxxxxx
st3h. */
- return 1938;
+ return 1941;
}
}
}
@@ -10249,7 +10249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx1xxxxxxx0xxxxxxxx0xxxx
cmphs. */
- return 1347;
+ return 1348;
}
else
{
@@ -10257,7 +10257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx1xxxxxxx0xxxxxxxx1xxxx
cmphi. */
- return 1344;
+ return 1345;
}
}
else
@@ -10270,7 +10270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2476;
+ return 2481;
}
else
{
@@ -10278,7 +10278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2477;
+ return 2482;
}
}
else
@@ -10293,7 +10293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0001xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1518;
+ return 1519;
}
else
{
@@ -10301,7 +10301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0101xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1538;
+ return 1539;
}
}
else
@@ -10312,7 +10312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0011xxxxx010xxxxxxxxxxxxx
ld1b. */
- return 1520;
+ return 1521;
}
else
{
@@ -10320,7 +10320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0111xxxxx010xxxxxxxxxxxxx
ld1h. */
- return 1540;
+ return 1541;
}
}
}
@@ -10334,7 +10334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0001xxxxx110xxxxxxxxxxxxx
ld2b. */
- return 1616;
+ return 1617;
}
else
{
@@ -10342,7 +10342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0101xxxxx110xxxxxxxxxxxxx
ld2h. */
- return 1620;
+ return 1621;
}
}
else
@@ -10353,7 +10353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0011xxxxx110xxxxxxxxxxxxx
ld4b. */
- return 1632;
+ return 1633;
}
else
{
@@ -10361,7 +10361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0111xxxxx110xxxxxxxxxxxxx
ld4h. */
- return 1636;
+ return 1637;
}
}
}
@@ -10384,7 +10384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x00x1xxxxx0000x0xxxxxxxxxx
fmla. */
- return 1455;
+ return 1456;
}
else
{
@@ -10394,7 +10394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0101xxxxx0000x0xxxxxxxxxx
fmla. */
- return 1456;
+ return 1457;
}
else
{
@@ -10402,7 +10402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0111xxxxx0000x0xxxxxxxxxx
fmla. */
- return 1457;
+ return 1458;
}
}
}
@@ -10414,7 +10414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x00x1xxxxx0000x1xxxxxxxxxx
fmls. */
- return 1459;
+ return 1460;
}
else
{
@@ -10424,7 +10424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0101xxxxx0000x1xxxxxxxxxx
fmls. */
- return 1460;
+ return 1461;
}
else
{
@@ -10432,7 +10432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0111xxxxx0000x1xxxxxxxxxx
fmls. */
- return 1461;
+ return 1462;
}
}
}
@@ -10445,7 +10445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0x01xxxxx0001xxxxxxxxxxxx
fcmla. */
- return 1403;
+ return 1404;
}
else
{
@@ -10453,7 +10453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0x11xxxxx0001xxxxxxxxxxxx
fcmla. */
- return 1404;
+ return 1405;
}
}
}
@@ -10467,7 +10467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0001xxxxx010xxxxxxxxxxxxx
st1b. */
- return 1882;
+ return 1885;
}
else
{
@@ -10479,7 +10479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx010xx0xxxxxxxxxx
fmlalb. */
- return 2094;
+ return 2098;
}
else
{
@@ -10487,7 +10487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx010xx1xxxxxxxxxx
fmlalt. */
- return 2096;
+ return 2100;
}
}
else
@@ -10496,7 +10496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0101xxxxx010xxxxxxxxxxxxx
st1h. */
- return 1901;
+ return 1904;
}
}
}
@@ -10510,7 +10510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2497;
+ return 2502;
}
else
{
@@ -10518,7 +10518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0011xxxxx010xxxxxxxxxxxxx
st1b. */
- return 1885;
+ return 1888;
}
}
else
@@ -10531,7 +10531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2504;
+ return 2509;
}
else
{
@@ -10539,7 +10539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2503;
+ return 2508;
}
}
else
@@ -10548,7 +10548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0111xxxxx010xxxxxxxxxxxxx
st1h. */
- return 1906;
+ return 1909;
}
}
}
@@ -10566,7 +10566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0x01xxxxx1x0xx0xxxxxxxxxx
fmlalb. */
- return 2095;
+ return 2099;
}
else
{
@@ -10574,7 +10574,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0x01xxxxx1x0xx1xxxxxxxxxx
fmlalt. */
- return 2097;
+ return 2101;
}
}
else
@@ -10583,7 +10583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0x01xxxxx1x0xxxxxxxxxxxxx
st1h. */
- return 1902;
+ return 1905;
}
}
else
@@ -10594,7 +10594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2496;
+ return 2501;
}
else
{
@@ -10606,7 +10606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2502;
+ return 2507;
}
else
{
@@ -10614,7 +10614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2501;
+ return 2506;
}
}
else
@@ -10623,7 +10623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0111xxxxx1x0xxxxxxxxxxxxx
st1h. */
- return 1907;
+ return 1910;
}
}
}
@@ -10642,7 +10642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx1xxxxxxx1xxxxxxxx0xxxx
cmplo. */
- return 1351;
+ return 1352;
}
else
{
@@ -10650,7 +10650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x0xx1xxxxxxx1xxxxxxxx1xxxx
cmpls. */
- return 1353;
+ return 1354;
}
}
else
@@ -10665,7 +10665,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2480;
+ return 2485;
}
else
{
@@ -10673,7 +10673,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2481;
+ return 2486;
}
}
else
@@ -10688,7 +10688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00010xxxx101xxxxxxxxxxxxx
ld1b. */
- return 1525;
+ return 1526;
}
else
{
@@ -10696,7 +10696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01010xxxx101xxxxxxxxxxxxx
ld1h. */
- return 1546;
+ return 1547;
}
}
else
@@ -10707,7 +10707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00110xxxx101xxxxxxxxxxxxx
ld1b. */
- return 1527;
+ return 1528;
}
else
{
@@ -10715,7 +10715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01110xxxx101xxxxxxxxxxxxx
ld1h. */
- return 1548;
+ return 1549;
}
}
}
@@ -10729,7 +10729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00011xxxx101xxxxxxxxxxxxx
ldnf1b. */
- return 1717;
+ return 1718;
}
else
{
@@ -10737,7 +10737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01011xxxx101xxxxxxxxxxxxx
ldnf1h. */
- return 1721;
+ return 1722;
}
}
else
@@ -10748,7 +10748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00111xxxx101xxxxxxxxxxxxx
ldnf1b. */
- return 1719;
+ return 1720;
}
else
{
@@ -10756,7 +10756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01111xxxx101xxxxxxxxxxxxx
ldnf1h. */
- return 1723;
+ return 1724;
}
}
}
@@ -10774,7 +10774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0001xxxxx011xxxxxxxxxxxxx
ldff1b. */
- return 1643;
+ return 1644;
}
else
{
@@ -10782,7 +10782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0101xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1662;
+ return 1663;
}
}
else
@@ -10793,7 +10793,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0011xxxxx011xxxxxxxxxxxxx
ldff1b. */
- return 1647;
+ return 1648;
}
else
{
@@ -10801,7 +10801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0111xxxxx011xxxxxxxxxxxxx
ldff1h. */
- return 1666;
+ return 1667;
}
}
}
@@ -10815,7 +10815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0001xxxxx111xxxxxxxxxxxxx
ld2b. */
- return 1617;
+ return 1618;
}
else
{
@@ -10823,7 +10823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0101xxxxx111xxxxxxxxxxxxx
ld2h. */
- return 1621;
+ return 1622;
}
}
else
@@ -10834,7 +10834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0011xxxxx111xxxxxxxxxxxxx
ld4b. */
- return 1633;
+ return 1634;
}
else
{
@@ -10842,7 +10842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x0111xxxxx111xxxxxxxxxxxxx
ld4h. */
- return 1637;
+ return 1638;
}
}
}
@@ -10861,7 +10861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x00x1xxxxx001xxxxxxxxxxxxx
fmul. */
- return 1466;
+ return 1467;
}
else
{
@@ -10871,7 +10871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0101xxxxx001xxxxxxxxxxxxx
fmul. */
- return 1467;
+ return 1468;
}
else
{
@@ -10879,7 +10879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0111xxxxx001xxxxxxxxxxxxx
fmul. */
- return 1468;
+ return 1469;
}
}
}
@@ -10895,7 +10895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0x01xxxxx101xx0xxxxxxxxxx
fmlslb. */
- return 2099;
+ return 2103;
}
else
{
@@ -10903,7 +10903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0x01xxxxx101xx1xxxxxxxxxx
fmlslt. */
- return 2101;
+ return 2105;
}
}
else
@@ -10912,7 +10912,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0x01xxxxx101xxxxxxxxxxxxx
st1h. */
- return 1903;
+ return 1906;
}
}
else
@@ -10923,7 +10923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx101xxxxxxxxxxxxx
st1b. */
- return 1890;
+ return 1893;
}
else
{
@@ -10931,7 +10931,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0111xxxxx101xxxxxxxxxxxxx
st1h. */
- return 1911;
+ return 1914;
}
}
}
@@ -10948,7 +10948,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0001xxxxx011xxxxxxxxxxxxx
st2b. */
- return 1925;
+ return 1928;
}
else
{
@@ -10960,7 +10960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx011xx0xxxxxxxxxx
fmlslb. */
- return 2098;
+ return 2102;
}
else
{
@@ -10968,7 +10968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx011xx1xxxxxxxxxx
fmlslt. */
- return 2100;
+ return 2104;
}
}
else
@@ -10977,7 +10977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x0101xxxxx011xxxxxxxxxxxxx
st2h. */
- return 1929;
+ return 1932;
}
}
}
@@ -10989,7 +10989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx011xxxxxxxxxxxxx
st4b. */
- return 1941;
+ return 1944;
}
else
{
@@ -10997,7 +10997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0111xxxxx011xxxxxxxxxxxxx
st4h. */
- return 1945;
+ return 1948;
}
}
}
@@ -11013,7 +11013,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x00010xxxx111xxxxxxxxxxxxx
st1b. */
- return 1887;
+ return 1890;
}
else
{
@@ -11021,7 +11021,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x00011xxxx111xxxxxxxxxxxxx
st2b. */
- return 1926;
+ return 1929;
}
}
else
@@ -11032,7 +11032,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2474;
+ return 2479;
}
else
{
@@ -11042,7 +11042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x01010xxxx111xxxxxxxxxxxxx
st1h. */
- return 1908;
+ return 1911;
}
else
{
@@ -11050,7 +11050,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x01011xxxx111xxxxxxxxxxxxx
st2h. */
- return 1930;
+ return 1933;
}
}
}
@@ -11065,7 +11065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2498;
+ return 2503;
}
else
{
@@ -11075,7 +11075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x00110xxxx111xxxxxxxxxxxxx
st1b. */
- return 1891;
+ return 1894;
}
else
{
@@ -11083,7 +11083,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x00111xxxx111xxxxxxxxxxxxx
st4b. */
- return 1942;
+ return 1945;
}
}
}
@@ -11095,7 +11095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2475;
+ return 2480;
}
else
{
@@ -11105,7 +11105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x01110xxxx111xxxxxxxxxxxxx
st1h. */
- return 1912;
+ return 1915;
}
else
{
@@ -11113,7 +11113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x01111xxxx111xxxxxxxxxxxxx
st4h. */
- return 1946;
+ return 1949;
}
}
}
@@ -11145,7 +11145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x10000xxxxxxxxxxxxxxxxxxxx
orr. */
- return 1771;
+ return 1773;
}
else
{
@@ -11153,7 +11153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x11000xxxxxxxxxxxxxxxxxxxx
and. */
- return 1299;
+ return 1300;
}
}
else
@@ -11164,7 +11164,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x10100xxxxxxxxxxxxxxxxxxxx
eor. */
- return 1386;
+ return 1387;
}
else
{
@@ -11172,7 +11172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x11100xxxxxxxxxxxxxxxxxxxx
dupm. */
- return 1384;
+ return 1385;
}
}
}
@@ -11184,7 +11184,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx01xxxx0xxxxxxxxxxxxxxx
cpy. */
- return 1369;
+ return 1370;
}
else
{
@@ -11192,7 +11192,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx01xxxx1xxxxxxxxxxxxxxx
fcpy. */
- return 1416;
+ return 1417;
}
}
}
@@ -11212,7 +11212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1001xxxxx000xxxxxxxxxxxxx
ext. */
- return 1391;
+ return 1392;
}
else
{
@@ -11224,7 +11224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2484;
+ return 2489;
}
else
{
@@ -11234,7 +11234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2486;
+ return 2491;
}
else
{
@@ -11242,7 +11242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2488;
+ return 2493;
}
}
}
@@ -11254,7 +11254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2485;
+ return 2490;
}
else
{
@@ -11264,7 +11264,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2487;
+ return 2492;
}
else
{
@@ -11272,7 +11272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2489;
+ return 2494;
}
}
}
@@ -11284,7 +11284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1x11xxxxx000xxxxxxxxxxxxx
ext. */
- return 2081;
+ return 2085;
}
}
else
@@ -11301,7 +11301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x0000100xxxxxxxxxxxxx
cpy. */
- return 1367;
+ return 1368;
}
else
{
@@ -11309,7 +11309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1000100xxxxxxxxxxxxx
clasta. */
- return 1325;
+ return 1326;
}
}
else
@@ -11320,7 +11320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x0100100xxxxxxxxxxxxx
revb. */
- return 1819;
+ return 1822;
}
else
{
@@ -11328,7 +11328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1100100xxxxxxxxxxxxx
splice. */
- return 1846;
+ return 1849;
}
}
}
@@ -11342,7 +11342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x0010100xxxxxxxxxxxxx
lasta. */
- return 1513;
+ return 1514;
}
else
{
@@ -11350,7 +11350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1010100xxxxxxxxxxxxx
clasta. */
- return 1326;
+ return 1327;
}
}
else
@@ -11361,7 +11361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x0110100xxxxxxxxxxxxx
revw. */
- return 1821;
+ return 1824;
}
else
{
@@ -11369,7 +11369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1110100xxxxxxxxxxxxx
revd. */
- return 2411;
+ return 2415;
}
}
}
@@ -11386,7 +11386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x0001100xxxxxxxxxxxxx
compact. */
- return 1366;
+ return 1367;
}
else
{
@@ -11394,7 +11394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1001100xxxxxxxxxxxxx
clastb. */
- return 1328;
+ return 1329;
}
}
else
@@ -11405,7 +11405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x0101100xxxxxxxxxxxxx
revh. */
- return 1820;
+ return 1823;
}
else
{
@@ -11413,7 +11413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1101100xxxxxxxxxxxxx
splice. */
- return 2176;
+ return 2180;
}
}
}
@@ -11427,7 +11427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x0011100xxxxxxxxxxxxx
lastb. */
- return 1515;
+ return 1516;
}
else
{
@@ -11435,7 +11435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1011100xxxxxxxxxxxxx
clastb. */
- return 1329;
+ return 1330;
}
}
else
@@ -11444,7 +11444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xx111100xxxxxxxxxxxxx
rbit. */
- return 1812;
+ return 1815;
}
}
}
@@ -11464,7 +11464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx001000xxxxxxxxxx
dup. */
- return 1382;
+ return 1383;
}
else
{
@@ -11472,7 +11472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx001100xxxxxxxxxx
tbl. */
- return 1969;
+ return 1973;
}
}
else
@@ -11483,7 +11483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx001010xxxxxxxxxx
tbl. */
- return 2265;
+ return 2269;
}
else
{
@@ -11501,7 +11501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx100000001110xxxxxxxxxx
dup. */
- return 1381;
+ return 1382;
}
else
{
@@ -11509,7 +11509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx110000001110xxxxxxxxxx
sunpklo. */
- return 1965;
+ return 1969;
}
}
else
@@ -11518,7 +11518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1000001110xxxxxxxxxx
rev. */
- return 1818;
+ return 1821;
}
}
else
@@ -11529,7 +11529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx10x100001110xxxxxxxxxx
insr. */
- return 1510;
+ return 1511;
}
else
{
@@ -11537,7 +11537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx11x100001110xxxxxxxxxx
insr. */
- return 1511;
+ return 1512;
}
}
}
@@ -11547,7 +11547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxx10001110xxxxxxxxxx
uunpklo. */
- return 2028;
+ return 2032;
}
}
else
@@ -11558,7 +11558,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxx01001110xxxxxxxxxx
sunpkhi. */
- return 1964;
+ return 1968;
}
else
{
@@ -11566,7 +11566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxx11001110xxxxxxxxxx
uunpkhi. */
- return 2027;
+ return 2031;
}
}
}
@@ -11578,7 +11578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx001xx1xxxxxxxxxx
tbx. */
- return 2266;
+ return 2270;
}
}
else
@@ -11593,7 +11593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx100xx0101xxxxxxxxxxxxx
lasta. */
- return 1512;
+ return 1513;
}
else
{
@@ -11601,7 +11601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx110xx0101xxxxxxxxxxxxx
clasta. */
- return 1327;
+ return 1328;
}
}
else
@@ -11610,7 +11610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1x1xx0101xxxxxxxxxxxxx
cpy. */
- return 1368;
+ return 1369;
}
}
else
@@ -11621,7 +11621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx10xxx1101xxxxxxxxxxxxx
lastb. */
- return 1514;
+ return 1515;
}
else
{
@@ -11629,7 +11629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx11xxx1101xxxxxxxxxxxxx
clastb. */
- return 1330;
+ return 1331;
}
}
}
@@ -11653,7 +11653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx10xxxx010000xxxxxxxxxx
zip1. */
- return 2045;
+ return 2049;
}
else
{
@@ -11665,7 +11665,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx11x0x0010000xxxxxxxxxx
punpklo. */
- return 1811;
+ return 1814;
}
else
{
@@ -11673,7 +11673,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx11x1x0010000xxxxxxxxxx
rev. */
- return 1817;
+ return 1820;
}
}
else
@@ -11682,7 +11682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx11xxx1010000xxxxxxxxxx
punpkhi. */
- return 1810;
+ return 1813;
}
}
}
@@ -11692,7 +11692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx011000xxxxxxxxxx
zip1. */
- return 2046;
+ return 2050;
}
}
else
@@ -11703,7 +11703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx010100xxxxxxxxxx
trn1. */
- return 1970;
+ return 1974;
}
else
{
@@ -11711,7 +11711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx011100xxxxxxxxxx
trn1. */
- return 1971;
+ return 1975;
}
}
}
@@ -11723,7 +11723,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx010x10xxxxxxxxxx
uzp1. */
- return 2032;
+ return 2036;
}
else
{
@@ -11731,7 +11731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx011x10xxxxxxxxxx
uzp1. */
- return 2033;
+ return 2037;
}
}
}
@@ -11747,7 +11747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx010001xxxxxxxxxx
zip2. */
- return 2047;
+ return 2051;
}
else
{
@@ -11755,7 +11755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx011001xxxxxxxxxx
zip2. */
- return 2048;
+ return 2052;
}
}
else
@@ -11766,7 +11766,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx010101xxxxxxxxxx
trn2. */
- return 1972;
+ return 1976;
}
else
{
@@ -11774,7 +11774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx011101xxxxxxxxxx
trn2. */
- return 1973;
+ return 1977;
}
}
}
@@ -11786,7 +11786,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx010x11xxxxxxxxxx
uzp2. */
- return 2034;
+ return 2038;
}
else
{
@@ -11794,7 +11794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx011x11xxxxxxxxxx
uzp2. */
- return 2035;
+ return 2039;
}
}
}
@@ -11805,7 +11805,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1xx1xxxxx11xxxxxxxxxxxxxx
sel. */
- return 1836;
+ return 1839;
}
}
}
@@ -11824,7 +11824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1x0xxxxxx000xxxxxxxxxxxxx
ldr. */
- return 1740;
+ return 1741;
}
else
{
@@ -11832,7 +11832,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1x1xxxxxx000xxxxxxxxxxxxx
prfb. */
- return 1784;
+ return 1787;
}
}
else
@@ -11843,7 +11843,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x10xxxxxxx100xxxxxxxxxxxxx
ld1rsh. */
- return 1569;
+ return 1570;
}
else
{
@@ -11851,7 +11851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x11xxxxxxx100xxxxxxxxxxxxx
ld1rsb. */
- return 1566;
+ return 1567;
}
}
}
@@ -11867,7 +11867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x10x0xxxxx010xxxxxxxxxxxxx
ld1w. */
- return 1604;
+ return 1605;
}
else
{
@@ -11875,7 +11875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x10x1xxxxx010xxxxxxxxxxxxx
ld1w. */
- return 1605;
+ return 1606;
}
}
else
@@ -11886,7 +11886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x110xxxxxx010xxxxxxxxxxxxx
ldr. */
- return 1741;
+ return 1743;
}
else
{
@@ -11894,7 +11894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x111xxxxxx010xxxxxxxxxxxxx
prfw. */
- return 1805;
+ return 1808;
}
}
}
@@ -11910,7 +11910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1000xxxxx110xxxxxxxxxxxxx
prfw. */
- return 1801;
+ return 1804;
}
else
{
@@ -11918,7 +11918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1100xxxxx110xxxxxxxxxxxxx
prfd. */
- return 1787;
+ return 1790;
}
}
else
@@ -11927,7 +11927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1x01xxxxx110xxxxxxxxxxxxx
ld1w. */
- return 1612;
+ return 1613;
}
}
else
@@ -11938,7 +11938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x101xxxxxx110xxxxxxxxxxxxx
ld1rw. */
- return 1572;
+ return 1573;
}
else
{
@@ -11946,7 +11946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x111xxxxxx110xxxxxxxxxxxxx
ld1rsb. */
- return 1568;
+ return 1569;
}
}
}
@@ -11962,7 +11962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1xxxxxxxx001xxxxxxxxxxxxx
prfh. */
- return 1798;
+ return 1801;
}
else
{
@@ -11972,7 +11972,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1x0xxxxxx101xxxxxxxxxxxxx
ldnt1w. */
- return 2112;
+ return 2116;
}
else
{
@@ -11982,7 +11982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x101xxxxxx101xxxxxxxxxxxxx
ld1rsh. */
- return 1570;
+ return 1571;
}
else
{
@@ -11990,7 +11990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x111xxxxxx101xxxxxxxxxxxxx
ld1rsb. */
- return 1567;
+ return 1568;
}
}
}
@@ -12007,7 +12007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x10x0xxxxx011xxxxxxxxxxxxx
ldff1w. */
- return 1704;
+ return 1705;
}
else
{
@@ -12015,7 +12015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x10x1xxxxx011xxxxxxxxxxxxx
ldff1w. */
- return 1705;
+ return 1706;
}
}
else
@@ -12024,7 +12024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x11xxxxxxx011xxxxxxxxxxxxx
prfd. */
- return 1791;
+ return 1794;
}
}
else
@@ -12039,7 +12039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1000xxxxx111xxxxxxxxxxxxx
prfw. */
- return 1804;
+ return 1807;
}
else
{
@@ -12047,7 +12047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1100xxxxx111xxxxxxxxxxxxx
prfd. */
- return 1790;
+ return 1793;
}
}
else
@@ -12056,7 +12056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x1x01xxxxx111xxxxxxxxxxxxx
ldff1w. */
- return 1714;
+ return 1715;
}
}
else
@@ -12067,7 +12067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x101xxxxxx111xxxxxxxxxxxxx
ld1rw. */
- return 1573;
+ return 1574;
}
else
{
@@ -12075,7 +12075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
100001x111xxxxxx111xxxxxxxxxxxxx
ld1rd. */
- return 1554;
+ return 1555;
}
}
}
@@ -12105,7 +12105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx000000xxxxxxxxxx
saddlb. */
- return 2142;
+ return 2146;
}
else
{
@@ -12113,7 +12113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx000100xxxxxxxxxx
ssublb. */
- return 2249;
+ return 2253;
}
}
else
@@ -12124,7 +12124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx000010xxxxxxxxxx
uaddlb. */
- return 2273;
+ return 2277;
}
else
{
@@ -12132,7 +12132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx000110xxxxxxxxxx
usublb. */
- return 2326;
+ return 2330;
}
}
}
@@ -12146,7 +12146,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx000001xxxxxxxxxx
saddlt. */
- return 2144;
+ return 2148;
}
else
{
@@ -12154,7 +12154,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx000101xxxxxxxxxx
ssublt. */
- return 2251;
+ return 2255;
}
}
else
@@ -12165,7 +12165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx000011xxxxxxxxxx
uaddlt. */
- return 2274;
+ return 2278;
}
else
{
@@ -12173,7 +12173,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx000111xxxxxxxxxx
usublt. */
- return 2327;
+ return 2331;
}
}
}
@@ -12184,7 +12184,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1xx0xxxxx000xxxxxxxxxxxxx
ld1sw. */
- return 1598;
+ return 1599;
}
}
else
@@ -12201,7 +12201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx000000xxxxxxxxxx
sqshrunb. */
- return 2232;
+ return 2236;
}
else
{
@@ -12209,7 +12209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx000100xxxxxxxxxx
shrnb. */
- return 2150;
+ return 2154;
}
}
else
@@ -12220,7 +12220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx000010xxxxxxxxxx
sqrshrunb. */
- return 2224;
+ return 2228;
}
else
{
@@ -12228,7 +12228,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx000110xxxxxxxxxx
rshrnb. */
- return 2132;
+ return 2136;
}
}
}
@@ -12242,7 +12242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx000001xxxxxxxxxx
sqshrunt. */
- return 2233;
+ return 2237;
}
else
{
@@ -12250,7 +12250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx000101xxxxxxxxxx
shrnt. */
- return 2151;
+ return 2155;
}
}
else
@@ -12261,7 +12261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx000011xxxxxxxxxx
sqrshrunt. */
- return 2225;
+ return 2229;
}
else
{
@@ -12269,7 +12269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx000111xxxxxxxxxx
rshrnt. */
- return 2133;
+ return 2137;
}
}
}
@@ -12280,7 +12280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1xx1xxxxx000xxxxxxxxxxxxx
ld1sw. */
- return 1599;
+ return 1600;
}
}
}
@@ -12300,7 +12300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx100000xxxxxxxxxx
saddlbt. */
- return 2143;
+ return 2147;
}
else
{
@@ -12308,7 +12308,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx100100xxxxxxxxxx
eorbt. */
- return 2079;
+ return 2083;
}
}
else
@@ -12319,7 +12319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx100010xxxxxxxxxx
ssublbt. */
- return 2250;
+ return 2254;
}
else
{
@@ -12331,7 +12331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2468;
+ return 2473;
}
else
{
@@ -12339,7 +12339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2470;
+ return 2475;
}
}
else
@@ -12348,7 +12348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2469;
+ return 2474;
}
}
}
@@ -12361,7 +12361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx100x01xxxxxxxxxx
eortb. */
- return 2080;
+ return 2084;
}
else
{
@@ -12369,7 +12369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx100x11xxxxxxxxxx
ssubltb. */
- return 2252;
+ return 2256;
}
}
}
@@ -12381,7 +12381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1x00xxxxx100xxxxxxxxxxxxx
ldnt1sw. */
- return 2111;
+ return 2115;
}
else
{
@@ -12389,7 +12389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1x10xxxxx100xxxxxxxxxxxxx
ld1sw. */
- return 1600;
+ return 1601;
}
}
}
@@ -12403,7 +12403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx100xxxxxxxx0xxxx
match. */
- return 2114;
+ return 2118;
}
else
{
@@ -12411,7 +12411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx100xxxxxxxx1xxxx
nmatch. */
- return 2126;
+ return 2130;
}
}
else
@@ -12422,7 +12422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1x01xxxxx100xxxxxxxxxxxxx
ld1sw. */
- return 1603;
+ return 1604;
}
else
{
@@ -12430,7 +12430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1x11xxxxx100xxxxxxxxxxxxx
ld1sw. */
- return 1601;
+ return 1602;
}
}
}
@@ -12454,7 +12454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx010000xxxxxxxxxx
saddwb. */
- return 2145;
+ return 2149;
}
else
{
@@ -12462,7 +12462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx010100xxxxxxxxxx
ssubwb. */
- return 2253;
+ return 2257;
}
}
else
@@ -12473,7 +12473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx010010xxxxxxxxxx
uaddwb. */
- return 2275;
+ return 2279;
}
else
{
@@ -12481,7 +12481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx010110xxxxxxxxxx
usubwb. */
- return 2328;
+ return 2332;
}
}
}
@@ -12495,7 +12495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx010001xxxxxxxxxx
saddwt. */
- return 2146;
+ return 2150;
}
else
{
@@ -12503,7 +12503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx010101xxxxxxxxxx
ssubwt. */
- return 2254;
+ return 2258;
}
}
else
@@ -12514,7 +12514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx010011xxxxxxxxxx
uaddwt. */
- return 2276;
+ return 2280;
}
else
{
@@ -12522,7 +12522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx010111xxxxxxxxxx
usubwt. */
- return 2329;
+ return 2333;
}
}
}
@@ -12535,7 +12535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x10x0xxxxx010xxxxxxxxxxxxx
ld1w. */
- return 1608;
+ return 1609;
}
else
{
@@ -12543,7 +12543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x11x0xxxxx010xxxxxxxxxxxxx
ld1d. */
- return 1530;
+ return 1531;
}
}
}
@@ -12563,7 +12563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxxx010000xxxxxxxxxx
sqxtnb. */
- return 2236;
+ return 2240;
}
else
{
@@ -12571,7 +12571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxxx010100xxxxxxxxxx
sqxtunb. */
- return 2238;
+ return 2242;
}
}
else
@@ -12580,7 +12580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxxx010x10xxxxxxxxxx
uqxtnb. */
- return 2313;
+ return 2317;
}
}
else
@@ -12593,7 +12593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxxx010001xxxxxxxxxx
sqxtnt. */
- return 2237;
+ return 2241;
}
else
{
@@ -12601,7 +12601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxxx010101xxxxxxxxxx
sqxtunt. */
- return 2239;
+ return 2243;
}
}
else
@@ -12610,7 +12610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxxx010x11xxxxxxxxxx
uqxtnt. */
- return 2314;
+ return 2318;
}
}
}
@@ -12620,7 +12620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x10x1xxxxx010xxxxxxxxxxxxx
ld1w. */
- return 1609;
+ return 1610;
}
}
else
@@ -12629,7 +12629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x11x1xxxxx010xxxxxxxxxxxxx
ld1d. */
- return 1531;
+ return 1532;
}
}
}
@@ -12649,7 +12649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx110000xxxxxxxxxx
sabalb. */
- return 2137;
+ return 2141;
}
else
{
@@ -12659,7 +12659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x0xxxxx110100xxxxxxxxxx
adclb. */
- return 2062;
+ return 2066;
}
else
{
@@ -12667,7 +12667,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x11x0xxxxx110100xxxxxxxxxx
sbclb. */
- return 2147;
+ return 2151;
}
}
}
@@ -12679,7 +12679,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx110001xxxxxxxxxx
sabalt. */
- return 2138;
+ return 2142;
}
else
{
@@ -12689,7 +12689,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x0xxxxx110101xxxxxxxxxx
adclt. */
- return 2063;
+ return 2067;
}
else
{
@@ -12697,7 +12697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x11x0xxxxx110101xxxxxxxxxx
sbclt. */
- return 2148;
+ return 2152;
}
}
}
@@ -12712,7 +12712,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx110010xxxxxxxxxx
uabalb. */
- return 2268;
+ return 2272;
}
else
{
@@ -12720,7 +12720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx110011xxxxxxxxxx
uabalt. */
- return 2269;
+ return 2273;
}
}
else
@@ -12731,7 +12731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxx011011xxxxxxxxxxx
cadd. */
- return 2071;
+ return 2075;
}
else
{
@@ -12739,7 +12739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxx111011xxxxxxxxxxx
sqcadd. */
- return 2179;
+ return 2183;
}
}
}
@@ -12754,7 +12754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1000xxxxx110xxxxxxxxxxxxx
ldnt1w. */
- return 2113;
+ return 2117;
}
else
{
@@ -12762,7 +12762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1100xxxxx110xxxxxxxxxxxxx
ldnt1d. */
- return 2106;
+ return 2110;
}
}
else
@@ -12773,7 +12773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1010xxxxx110xxxxxxxxxxxxx
ld1w. */
- return 1610;
+ return 1611;
}
else
{
@@ -12781,7 +12781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1110xxxxx110xxxxxxxxxxxxx
ld1d. */
- return 1532;
+ return 1533;
}
}
}
@@ -12796,7 +12796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x1001xxxxx110xxxxxxxxxxxxx
ld1w. */
- return 1615;
+ return 1616;
}
else
{
@@ -12804,7 +12804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x1011xxxxx110xxxxxxxxxxxxx
ld1w. */
- return 1611;
+ return 1612;
}
}
else
@@ -12815,7 +12815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x11x1xxxxx110xxxxxxxxxxxxx
histcnt. */
- return 2102;
+ return 2106;
}
else
{
@@ -12825,7 +12825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1101xxxxx110xxxxxxxxxxxxx
ld1d. */
- return 1535;
+ return 1536;
}
else
{
@@ -12833,7 +12833,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1111xxxxx110xxxxxxxxxxxxx
ld1d. */
- return 1533;
+ return 1534;
}
}
}
@@ -12859,7 +12859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx001x00xxxxxxxxxx
sabdlb. */
- return 2139;
+ return 2143;
}
else
{
@@ -12867,7 +12867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx001x10xxxxxxxxxx
uabdlb. */
- return 2270;
+ return 2274;
}
}
else
@@ -12878,7 +12878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx001x01xxxxxxxxxx
sabdlt. */
- return 2140;
+ return 2144;
}
else
{
@@ -12886,7 +12886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx001x11xxxxxxxxxx
uabdlt. */
- return 2271;
+ return 2275;
}
}
}
@@ -12896,7 +12896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1xx0xxxxx001xxxxxxxxxxxxx
ldff1sw. */
- return 1699;
+ return 1700;
}
}
else
@@ -12913,7 +12913,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx001000xxxxxxxxxx
sqshrnb. */
- return 2230;
+ return 2234;
}
else
{
@@ -12921,7 +12921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx001100xxxxxxxxxx
uqshrnb. */
- return 2309;
+ return 2313;
}
}
else
@@ -12932,7 +12932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx001010xxxxxxxxxx
sqrshrnb. */
- return 2222;
+ return 2226;
}
else
{
@@ -12940,7 +12940,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx001110xxxxxxxxxx
uqrshrnb. */
- return 2304;
+ return 2308;
}
}
}
@@ -12954,7 +12954,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx001001xxxxxxxxxx
sqshrnt. */
- return 2231;
+ return 2235;
}
else
{
@@ -12962,7 +12962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx001101xxxxxxxxxx
uqshrnt. */
- return 2310;
+ return 2314;
}
}
else
@@ -12973,7 +12973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx001011xxxxxxxxxx
sqrshrnt. */
- return 2223;
+ return 2227;
}
else
{
@@ -12981,7 +12981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx001111xxxxxxxxxx
uqrshrnt. */
- return 2305;
+ return 2309;
}
}
}
@@ -12992,7 +12992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1xx1xxxxx001xxxxxxxxxxxxx
ldff1sw. */
- return 1700;
+ return 1701;
}
}
}
@@ -13012,7 +13012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx101000xxxxxxxxxx
sshllb. */
- return 2246;
+ return 2250;
}
else
{
@@ -13020,7 +13020,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx101100xxxxxxxxxx
bext. */
- return 2351;
+ return 2355;
}
}
else
@@ -13031,7 +13031,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx101010xxxxxxxxxx
ushllb. */
- return 2322;
+ return 2326;
}
else
{
@@ -13039,7 +13039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx101110xxxxxxxxxx
bgrp. */
- return 2352;
+ return 2356;
}
}
}
@@ -13053,7 +13053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx101001xxxxxxxxxx
sshllt. */
- return 2247;
+ return 2251;
}
else
{
@@ -13061,7 +13061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx101101xxxxxxxxxx
bdep. */
- return 2350;
+ return 2354;
}
}
else
@@ -13070,7 +13070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx101x11xxxxxxxxxx
ushllt. */
- return 2323;
+ return 2327;
}
}
}
@@ -13080,7 +13080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1xx0xxxxx101xxxxxxxxxxxxx
ldff1sw. */
- return 1701;
+ return 1702;
}
}
else
@@ -13093,7 +13093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x01xxxxx101xxxxxxxxxxxxx
histseg. */
- return 2103;
+ return 2107;
}
else
{
@@ -13101,7 +13101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1x01xxxxx101xxxxxxxxxxxxx
ldff1sw. */
- return 1703;
+ return 1704;
}
}
else
@@ -13110,7 +13110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x1x11xxxxx101xxxxxxxxxxxxx
ldff1sw. */
- return 1702;
+ return 1703;
}
}
}
@@ -13133,7 +13133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx011000xxxxxxxxxx
sqdmullb. */
- return 2200;
+ return 2204;
}
else
{
@@ -13141,7 +13141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx011100xxxxxxxxxx
smullb. */
- return 2172;
+ return 2176;
}
}
else
@@ -13154,7 +13154,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x00xxxxx011010xxxxxxxxxx
pmullb. */
- return 2347;
+ return 2351;
}
else
{
@@ -13162,7 +13162,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx011010xxxxxxxxxx
pmullb. */
- return 2128;
+ return 2132;
}
}
else
@@ -13171,7 +13171,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx011110xxxxxxxxxx
umullb. */
- return 2297;
+ return 2301;
}
}
}
@@ -13185,7 +13185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx011001xxxxxxxxxx
sqdmullt. */
- return 2203;
+ return 2207;
}
else
{
@@ -13193,7 +13193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx011101xxxxxxxxxx
smullt. */
- return 2175;
+ return 2179;
}
}
else
@@ -13206,7 +13206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x00xxxxx011011xxxxxxxxxx
pmullt. */
- return 2348;
+ return 2352;
}
else
{
@@ -13214,7 +13214,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx011011xxxxxxxxxx
pmullt. */
- return 2129;
+ return 2133;
}
}
else
@@ -13223,7 +13223,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx011111xxxxxxxxxx
umullt. */
- return 2300;
+ return 2304;
}
}
}
@@ -13236,7 +13236,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x10x0xxxxx011xxxxxxxxxxxxx
ldff1w. */
- return 1710;
+ return 1711;
}
else
{
@@ -13244,7 +13244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x11x0xxxxx011xxxxxxxxxxxxx
ldff1d. */
- return 1655;
+ return 1656;
}
}
}
@@ -13262,7 +13262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx011000xxxxxxxxxx
addhnb. */
- return 2064;
+ return 2068;
}
else
{
@@ -13270,7 +13270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx011100xxxxxxxxxx
subhnb. */
- return 2262;
+ return 2266;
}
}
else
@@ -13281,7 +13281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx011010xxxxxxxxxx
raddhnb. */
- return 2130;
+ return 2134;
}
else
{
@@ -13289,7 +13289,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx011110xxxxxxxxxx
rsubhnb. */
- return 2134;
+ return 2138;
}
}
}
@@ -13303,7 +13303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx011001xxxxxxxxxx
addhnt. */
- return 2065;
+ return 2069;
}
else
{
@@ -13311,7 +13311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx011101xxxxxxxxxx
subhnt. */
- return 2263;
+ return 2267;
}
}
else
@@ -13322,7 +13322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx011011xxxxxxxxxx
raddhnt. */
- return 2131;
+ return 2135;
}
else
{
@@ -13330,7 +13330,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx1xxxxx011111xxxxxxxxxx
rsubhnt. */
- return 2135;
+ return 2139;
}
}
}
@@ -13343,7 +13343,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x10x1xxxxx011xxxxxxxxxxxxx
ldff1w. */
- return 1711;
+ return 1712;
}
else
{
@@ -13351,7 +13351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x11x1xxxxx011xxxxxxxxxxxxx
ldff1d. */
- return 1656;
+ return 1657;
}
}
}
@@ -13372,7 +13372,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx111000xxxxxxxxxx
ssra. */
- return 2248;
+ return 2252;
}
else
{
@@ -13380,7 +13380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx111100xxxxxxxxxx
sri. */
- return 2241;
+ return 2245;
}
}
else
@@ -13391,7 +13391,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx111010xxxxxxxxxx
srsra. */
- return 2245;
+ return 2249;
}
else
{
@@ -13399,7 +13399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx111110xxxxxxxxxx
saba. */
- return 2136;
+ return 2140;
}
}
}
@@ -13413,7 +13413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx111001xxxxxxxxxx
usra. */
- return 2325;
+ return 2329;
}
else
{
@@ -13421,7 +13421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx111101xxxxxxxxxx
sli. */
- return 2154;
+ return 2158;
}
}
else
@@ -13432,7 +13432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx111011xxxxxxxxxx
ursra. */
- return 2321;
+ return 2325;
}
else
{
@@ -13440,7 +13440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1xx0xxxxx111111xxxxxxxxxx
uaba. */
- return 2267;
+ return 2271;
}
}
}
@@ -13455,7 +13455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1000xxxxx111xxxxxxxxxxxxx
prfw. */
- return 1806;
+ return 1809;
}
else
{
@@ -13463,7 +13463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1100xxxxx111xxxxxxxxxxxxx
prfd. */
- return 1792;
+ return 1795;
}
}
else
@@ -13474,7 +13474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1010xxxxx111xxxxxxxxxxxxx
ldff1w. */
- return 1712;
+ return 1713;
}
else
{
@@ -13482,7 +13482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1110xxxxx111xxxxxxxxxxxxx
ldff1d. */
- return 1657;
+ return 1658;
}
}
}
@@ -13507,7 +13507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1001xxx001110x0xxxxxxxxxx
aesmc. */
- return 2346;
+ return 2350;
}
else
{
@@ -13515,7 +13515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1001xxx101110x0xxxxxxxxxx
aese. */
- return 2344;
+ return 2348;
}
}
else
@@ -13524,7 +13524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1001xxxx11110x0xxxxxxxxxx
sm4e. */
- return 2341;
+ return 2345;
}
}
else
@@ -13533,7 +13533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1001xxxxx1111x0xxxxxxxxxx
sm4ekey. */
- return 2342;
+ return 2346;
}
}
else
@@ -13546,7 +13546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1001xxx0x1110x1xxxxxxxxxx
aesimc. */
- return 2345;
+ return 2349;
}
else
{
@@ -13554,7 +13554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1001xxx1x1110x1xxxxxxxxxx
aesd. */
- return 2343;
+ return 2347;
}
}
else
@@ -13563,7 +13563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1001xxxxx1111x1xxxxxxxxxx
rax1. */
- return 2349;
+ return 2353;
}
}
}
@@ -13573,7 +13573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
110001x1001xxxxx111xxxxxxxxxxxxx
ldff1w. */
- return 1715;
+ return 1716;
}
}
else
@@ -13582,7 +13582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x1101xxxxx111xxxxxxxxxxxxx
ldff1d. */
- return 1659;
+ return 1660;
}
}
else
@@ -13593,7 +13593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x1011xxxxx111xxxxxxxxxxxxx
ldff1w. */
- return 1713;
+ return 1714;
}
else
{
@@ -13601,7 +13601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x1111xxxxx111xxxxxxxxxxxxx
ldff1d. */
- return 1658;
+ return 1659;
}
}
}
@@ -13630,7 +13630,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx0xxxxx000xxxxxxxx0xxxx
cmpge. */
- return 1338;
+ return 1339;
}
else
{
@@ -13638,7 +13638,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx0xxxxx000xxxxxxxx1xxxx
cmpgt. */
- return 1341;
+ return 1342;
}
}
else
@@ -13649,7 +13649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x0xxxxx000xxxxxxxxxxxxx
ld1rqw. */
- return 1565;
+ return 1566;
}
else
{
@@ -13657,7 +13657,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x0xxxxx000xxxxxxxxxxxxx
ld1rqd. */
- return 1561;
+ return 1562;
}
}
}
@@ -13677,7 +13677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000000xxxxx0xxxx
whilege. */
- return 2330;
+ return 2334;
}
else
{
@@ -13685,7 +13685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000100xxxxx0xxxx
whilege. */
- return 2331;
+ return 2335;
}
}
else
@@ -13696,7 +13696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000010xxxxx0xxxx
whilehs. */
- return 2336;
+ return 2340;
}
else
{
@@ -13704,7 +13704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000110xxxxx0xxxx
whilehs. */
- return 2337;
+ return 2341;
}
}
}
@@ -13718,7 +13718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000001xxxxx0xxxx
whilelt. */
- return 2042;
+ return 2046;
}
else
{
@@ -13726,7 +13726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000101xxxxx0xxxx
whilelt. */
- return 2043;
+ return 2047;
}
}
else
@@ -13737,7 +13737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000011xxxxx0xxxx
whilelo. */
- return 2038;
+ return 2042;
}
else
{
@@ -13745,7 +13745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000111xxxxx0xxxx
whilelo. */
- return 2039;
+ return 2043;
}
}
}
@@ -13762,7 +13762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000000xxxxx1xxxx
whilegt. */
- return 2332;
+ return 2336;
}
else
{
@@ -13770,7 +13770,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000100xxxxx1xxxx
whilegt. */
- return 2333;
+ return 2337;
}
}
else
@@ -13781,7 +13781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000010xxxxx1xxxx
whilehi. */
- return 2334;
+ return 2338;
}
else
{
@@ -13789,7 +13789,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000110xxxxx1xxxx
whilehi. */
- return 2335;
+ return 2339;
}
}
}
@@ -13803,7 +13803,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000001xxxxx1xxxx
whilele. */
- return 2036;
+ return 2040;
}
else
{
@@ -13811,7 +13811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000101xxxxx1xxxx
whilele. */
- return 2037;
+ return 2041;
}
}
else
@@ -13822,7 +13822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000011xxxxx1xxxx
whilels. */
- return 2040;
+ return 2044;
}
else
{
@@ -13830,7 +13830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx000111xxxxx1xxxx
whilels. */
- return 2041;
+ return 2045;
}
}
}
@@ -13844,7 +13844,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2478;
+ return 2483;
}
else
{
@@ -13852,7 +13852,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2479;
+ return 2484;
}
}
}
@@ -13871,7 +13871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx000x00xxxxxxxxxx
fadd. */
- return 1396;
+ return 1397;
}
else
{
@@ -13881,7 +13881,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx000010xxxxxxxxxx
fmul. */
- return 1463;
+ return 1464;
}
else
{
@@ -13889,7 +13889,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx000110xxxxxxxxxx
frecps. */
- return 1476;
+ return 1477;
}
}
}
@@ -13901,7 +13901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx000x01xxxxxxxxxx
fsub. */
- return 1489;
+ return 1490;
}
else
{
@@ -13911,7 +13911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx000011xxxxxxxxxx
ftsmul. */
- return 1495;
+ return 1496;
}
else
{
@@ -13919,7 +13919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx000111xxxxxxxxxx
frsqrts. */
- return 1486;
+ return 1487;
}
}
}
@@ -13930,7 +13930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx1xxxxx000xxxxxxxxxxxxx
fmla. */
- return 1454;
+ return 1455;
}
}
else
@@ -13939,7 +13939,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1xxxxxxxx000xxxxxxxxxxxxx
str. */
- return 1957;
+ return 1960;
}
}
}
@@ -13957,7 +13957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx0xxxxx001xxxxxxxx0xxxx
cmplt. */
- return 1355;
+ return 1356;
}
else
{
@@ -13965,7 +13965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx0xxxxx001xxxxxxxx1xxxx
cmple. */
- return 1349;
+ return 1350;
}
}
else
@@ -13976,7 +13976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x0xxxxx001xxxxxxxxxxxxx
ld1rqw. */
- return 1564;
+ return 1565;
}
else
{
@@ -13984,7 +13984,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x0xxxxx001xxxxxxxxxxxxx
ld1rqd. */
- return 1560;
+ return 1561;
}
}
}
@@ -14006,7 +14006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000000001xxxxxxxxxxxxx
faddv. */
- return 1400;
+ return 1401;
}
else
{
@@ -14016,7 +14016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx010000001xxxxxxxx0xxxx
fcmge. */
- return 1407;
+ return 1408;
}
else
{
@@ -14024,7 +14024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx010000001xxxxxxxx1xxxx
fcmgt. */
- return 1409;
+ return 1410;
}
}
}
@@ -14034,7 +14034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0x1000001xxxxxxxxxxxxx
fadda. */
- return 1399;
+ return 1400;
}
}
else
@@ -14043,7 +14043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xx100001xxxxxxxxxxxxx
fmaxnmv. */
- return 1446;
+ return 1447;
}
}
else
@@ -14054,7 +14054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xx010001xxxxxxxxxxxxx
fcmeq. */
- return 1405;
+ return 1406;
}
else
{
@@ -14064,7 +14064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0x0110001xxxxxxxxxxxxx
fmaxv. */
- return 1447;
+ return 1448;
}
else
{
@@ -14072,7 +14072,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0x1110001xxxxxxxxxxxxx
frecpe. */
- return 1475;
+ return 1476;
}
}
}
@@ -14089,7 +14089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xx001001xxxxxxxx0xxxx
fcmlt. */
- return 1412;
+ return 1413;
}
else
{
@@ -14097,7 +14097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xx001001xxxxxxxx1xxxx
fcmle. */
- return 1411;
+ return 1412;
}
}
else
@@ -14106,7 +14106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xx101001xxxxxxxxxxxxx
fminnmv. */
- return 1452;
+ return 1453;
}
}
else
@@ -14117,7 +14117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xx011001xxxxxxxxxxxxx
fcmne. */
- return 1413;
+ return 1414;
}
else
{
@@ -14127,7 +14127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0x0111001xxxxxxxxxxxxx
fminv. */
- return 1453;
+ return 1454;
}
else
{
@@ -14135,7 +14135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0x1111001xxxxxxxxxxxxx
frsqrte. */
- return 1485;
+ return 1486;
}
}
}
@@ -14151,7 +14151,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1000xxxxx001xxxxxxxxxxxxx
stnt1w. */
- return 2261;
+ return 2265;
}
else
{
@@ -14159,7 +14159,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1100xxxxx001xxxxxxxxxxxxx
stnt1d. */
- return 2257;
+ return 2261;
}
}
else
@@ -14168,7 +14168,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1x10xxxxx001xxxxxxxxxxxxx
stnt1w. */
- return 2260;
+ return 2264;
}
}
}
@@ -14187,7 +14187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx0010xxxxxxx0xxxx
ctermeq. */
- return 1370;
+ return 1371;
}
else
{
@@ -14195,7 +14195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx0011xxxxxxx0xxxx
whilewr. */
- return 2339;
+ return 2343;
}
}
else
@@ -14206,7 +14206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx0010xxxxxxx1xxxx
ctermne. */
- return 1371;
+ return 1372;
}
else
{
@@ -14214,7 +14214,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx0011xxxxxxx1xxxx
whilerw. */
- return 2338;
+ return 2342;
}
}
}
@@ -14226,7 +14226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2482;
+ return 2487;
}
else
{
@@ -14234,7 +14234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2483;
+ return 2488;
}
}
}
@@ -14244,7 +14244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x1xx1xxxxx001xxxxxxxxxxxxx
fmls. */
- return 1458;
+ return 1459;
}
}
}
@@ -14271,7 +14271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x10000xxxx01xxxx0xxxx0xxxx
and. */
- return 1301;
+ return 1302;
}
else
{
@@ -14279,7 +14279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x10000xxxx01xxxx0xxxx1xxxx
bic. */
- return 1313;
+ return 1314;
}
}
else
@@ -14290,7 +14290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x100010xxx01xxxx0xxxxxxxxx
brka. */
- return 1315;
+ return 1316;
}
else
{
@@ -14298,7 +14298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x100011xxx01xxxx0xxxxxxxxx
brkn. */
- return 1319;
+ return 1320;
}
}
}
@@ -14310,7 +14310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1000xxxxx01xxxx1xxxx0xxxx
eor. */
- return 1388;
+ return 1389;
}
else
{
@@ -14318,7 +14318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1000xxxxx01xxxx1xxxx1xxxx
sel. */
- return 1837;
+ return 1840;
}
}
}
@@ -14330,7 +14330,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1000xxxxx010xxxxxxxxxxxxx
ld1sh. */
- return 1587;
+ return 1588;
}
else
{
@@ -14338,7 +14338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1000xxxxx011xxxxxxxxxxxxx
ldff1sh. */
- return 1687;
+ return 1688;
}
}
}
@@ -14356,7 +14356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x11000xxxx01xxxx0xxxx0xxxx
orr. */
- return 1773;
+ return 1775;
}
else
{
@@ -14364,7 +14364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x11000xxxx01xxxx0xxxx1xxxx
orn. */
- return 1768;
+ return 1770;
}
}
else
@@ -14373,7 +14373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x11001xxxx01xxxx0xxxxxxxxx
brkb. */
- return 1317;
+ return 1318;
}
}
else
@@ -14384,7 +14384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1100xxxxx01xxxx1xxxx0xxxx
nor. */
- return 1765;
+ return 1767;
}
else
{
@@ -14392,7 +14392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1100xxxxx01xxxx1xxxx1xxxx
nand. */
- return 1762;
+ return 1764;
}
}
}
@@ -14404,7 +14404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1100xxxxx010xxxxxxxxxxxxx
ld1sb. */
- return 1575;
+ return 1576;
}
else
{
@@ -14412,7 +14412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1100xxxxx011xxxxxxxxxxxxx
ldff1sb. */
- return 1675;
+ return 1676;
}
}
}
@@ -14433,7 +14433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x10100xxxx01xxxx0xxxx0xxxx
ands. */
- return 1302;
+ return 1303;
}
else
{
@@ -14443,7 +14443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x101010xxx01xxxx0xxxx0xxxx
brkas. */
- return 1316;
+ return 1317;
}
else
{
@@ -14451,7 +14451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x101011xxx01xxxx0xxxx0xxxx
brkns. */
- return 1320;
+ return 1321;
}
}
}
@@ -14461,7 +14461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1010xxxxx01xxxx1xxxx0xxxx
eors. */
- return 1389;
+ return 1390;
}
}
else
@@ -14470,7 +14470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1010xxxxx01xxxxxxxxx1xxxx
bics. */
- return 1314;
+ return 1315;
}
}
else
@@ -14481,7 +14481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1010xxxxx010xxxxxxxxxxxxx
ld1w. */
- return 1606;
+ return 1607;
}
else
{
@@ -14489,7 +14489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1010xxxxx011xxxxxxxxxxxxx
ldff1w. */
- return 1706;
+ return 1707;
}
}
}
@@ -14507,7 +14507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x11100xxxx01xxxx0xxxx0xxxx
orrs. */
- return 1774;
+ return 1776;
}
else
{
@@ -14515,7 +14515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x11101xxxx01xxxx0xxxx0xxxx
brkbs. */
- return 1318;
+ return 1319;
}
}
else
@@ -14524,7 +14524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1110xxxxx01xxxx1xxxx0xxxx
nors. */
- return 1766;
+ return 1768;
}
}
else
@@ -14535,7 +14535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1110xxxxx01xxxx0xxxx1xxxx
orns. */
- return 1769;
+ return 1771;
}
else
{
@@ -14543,7 +14543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1110xxxxx01xxxx1xxxx1xxxx
nands. */
- return 1763;
+ return 1765;
}
}
}
@@ -14555,7 +14555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1110xxxxx010xxxxxxxxxxxxx
ld1sb. */
- return 1577;
+ return 1578;
}
else
{
@@ -14563,7 +14563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1110xxxxx011xxxxxxxxxxxxx
ldff1sb. */
- return 1679;
+ return 1680;
}
}
}
@@ -14577,7 +14577,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01xxxxxxxxxxxxxx
psel. */
- return 2414;
+ return 2418;
}
else
{
@@ -14591,7 +14591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1001xxxxx010xxxxxxxxxxxxx
ld1sh. */
- return 1588;
+ return 1589;
}
else
{
@@ -14599,7 +14599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1101xxxxx010xxxxxxxxxxxxx
ld1sb. */
- return 1576;
+ return 1577;
}
}
else
@@ -14610,7 +14610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1011xxxxx010xxxxxxxxxxxxx
ld1w. */
- return 1607;
+ return 1608;
}
else
{
@@ -14618,7 +14618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1111xxxxx010xxxxxxxxxxxxx
ld1d. */
- return 1529;
+ return 1530;
}
}
}
@@ -14632,7 +14632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1001xxxxx011xxxxxxxxxxxxx
ldff1sh. */
- return 1689;
+ return 1690;
}
else
{
@@ -14640,7 +14640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1101xxxxx011xxxxxxxxxxxxx
ldff1sb. */
- return 1677;
+ return 1678;
}
}
else
@@ -14651,7 +14651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1011xxxxx011xxxxxxxxxxxxx
ldff1w. */
- return 1708;
+ return 1709;
}
else
{
@@ -14659,7 +14659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1111xxxxx011xxxxxxxxxxxxx
ldff1d. */
- return 1653;
+ return 1654;
}
}
}
@@ -14680,7 +14680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx010xxxxxxxx0xxxx
fcmge. */
- return 1408;
+ return 1409;
}
else
{
@@ -14688,7 +14688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx010xxxxxxxx1xxxx
fcmgt. */
- return 1410;
+ return 1411;
}
}
else
@@ -14697,7 +14697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx1xxxxx010xxxxxxxxxxxxx
fnmla. */
- return 1472;
+ return 1473;
}
}
else
@@ -14708,7 +14708,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1x0xxxxxx010xxxxxxxxxxxxx
str. */
- return 1958;
+ return 1962;
}
else
{
@@ -14718,7 +14718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1x10xxxxx010xxxxxxxxxxxxx
st1w. */
- return 1917;
+ return 1920;
}
else
{
@@ -14728,7 +14728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1011xxxxx010xxxxxxxxxxxxx
st1w. */
- return 1919;
+ return 1922;
}
else
{
@@ -14736,7 +14736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1111xxxxx010xxxxxxxxxxxxx
st1d. */
- return 1896;
+ return 1899;
}
}
}
@@ -14754,7 +14754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx011xxxxxxxx0xxxx
fcmeq. */
- return 1406;
+ return 1407;
}
else
{
@@ -14762,7 +14762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx011xxxxxxxx1xxxx
fcmne. */
- return 1414;
+ return 1415;
}
}
else
@@ -14775,7 +14775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1000xxxxx011xxxxxxxxxxxxx
stnt1w. */
- return 1955;
+ return 1958;
}
else
{
@@ -14783,7 +14783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1100xxxxx011xxxxxxxxxxxxx
stnt1d. */
- return 1951;
+ return 1954;
}
}
else
@@ -14794,7 +14794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1010xxxxx011xxxxxxxxxxxxx
st3w. */
- return 1939;
+ return 1942;
}
else
{
@@ -14802,7 +14802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1110xxxxx011xxxxxxxxxxxxx
st3d. */
- return 1935;
+ return 1938;
}
}
}
@@ -14815,7 +14815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx1xxxxx011xxxxxxxxxxxxx
fnmls. */
- return 1473;
+ return 1474;
}
else
{
@@ -14827,7 +14827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1001xxxxx011xxxxxxxxxxxxx
st2w. */
- return 1931;
+ return 1934;
}
else
{
@@ -14835,7 +14835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1101xxxxx011xxxxxxxxxxxxx
st2d. */
- return 1927;
+ return 1930;
}
}
else
@@ -14846,7 +14846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1011xxxxx011xxxxxxxxxxxxx
st4w. */
- return 1947;
+ return 1950;
}
else
{
@@ -14854,7 +14854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1111xxxxx011xxxxxxxxxxxxx
st4d. */
- return 1943;
+ return 1946;
}
}
}
@@ -14879,7 +14879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x1xx0xxxxx100xxxxxxxx0xxxx
cmpeq. */
- return 1335;
+ return 1336;
}
else
{
@@ -14887,7 +14887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x1xx0xxxxx100xxxxxxxx1xxxx
cmpne. */
- return 1358;
+ return 1359;
}
}
else
@@ -14902,7 +14902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x10000xxxx101xxxxxxxxxxxxx
ld1sh. */
- return 1594;
+ return 1595;
}
else
{
@@ -14910,7 +14910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x11000xxxx101xxxxxxxxxxxxx
ld1sb. */
- return 1581;
+ return 1582;
}
}
else
@@ -14921,7 +14921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x10100xxxx101xxxxxxxxxxxxx
ld1w. */
- return 1613;
+ return 1614;
}
else
{
@@ -14929,7 +14929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x11100xxxx101xxxxxxxxxxxxx
ld1sb. */
- return 1583;
+ return 1584;
}
}
}
@@ -14943,7 +14943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x10001xxxx101xxxxxxxxxxxxx
ldnf1sh. */
- return 1727;
+ return 1728;
}
else
{
@@ -14951,7 +14951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x11001xxxx101xxxxxxxxxxxxx
ldnf1sb. */
- return 1724;
+ return 1725;
}
}
else
@@ -14962,7 +14962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x10101xxxx101xxxxxxxxxxxxx
ldnf1w. */
- return 1730;
+ return 1731;
}
else
{
@@ -14970,7 +14970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x11101xxxx101xxxxxxxxxxxxx
ldnf1sb. */
- return 1726;
+ return 1727;
}
}
}
@@ -14990,7 +14990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1x000xxxx11xxxxxxxxx0xxxx
brkpa. */
- return 1321;
+ return 1322;
}
else
{
@@ -14998,7 +14998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1x100xxxx11xxxxxxxxx0xxxx
brkpas. */
- return 1322;
+ return 1323;
}
}
else
@@ -15011,7 +15011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx010xx011xxxxxxxxx0xxxx
ptest. */
- return 1807;
+ return 1810;
}
else
{
@@ -15025,7 +15025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx011xx01100x0xxxxx0xxxx
pfirst. */
- return 1777;
+ return 1780;
}
else
{
@@ -15033,7 +15033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx011xx01110x0xxxxx0xxxx
ptrue. */
- return 1808;
+ return 1811;
}
}
else
@@ -15044,7 +15044,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1x0011xx011x1x0xxxxx0xxxx
rdffr. */
- return 1814;
+ return 1817;
}
else
{
@@ -15052,7 +15052,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1x1011xx011x1x0xxxxx0xxxx
rdffrs. */
- return 1815;
+ return 1818;
}
}
}
@@ -15062,7 +15062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx011xx011xxx1xxxxx0xxxx
pfalse. */
- return 1776;
+ return 1778;
}
}
}
@@ -15076,7 +15076,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx01xxx111x0x0xxxxx0xxxx
ptrues. */
- return 1809;
+ return 1812;
}
else
{
@@ -15084,7 +15084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx01xxx111x1x0xxxxx0xxxx
rdffr. */
- return 1813;
+ return 1816;
}
}
else
@@ -15093,7 +15093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx01xxx111xxx1xxxxx0xxxx
pnext. */
- return 1778;
+ return 1781;
}
}
}
@@ -15106,7 +15106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1x00xxxxx11xxxxxxxxx1xxxx
brkpb. */
- return 1323;
+ return 1324;
}
else
{
@@ -15114,7 +15114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1x10xxxxx11xxxxxxxxx1xxxx
brkpbs. */
- return 1324;
+ return 1325;
}
}
}
@@ -15130,7 +15130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1000xxxxx110xxxxxxxxxxxxx
ldnt1w. */
- return 1738;
+ return 1739;
}
else
{
@@ -15138,7 +15138,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1100xxxxx110xxxxxxxxxxxxx
ldnt1d. */
- return 1734;
+ return 1735;
}
}
else
@@ -15149,7 +15149,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1010xxxxx110xxxxxxxxxxxxx
ld3w. */
- return 1630;
+ return 1631;
}
else
{
@@ -15157,7 +15157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1110xxxxx110xxxxxxxxxxxxx
ld3d. */
- return 1626;
+ return 1627;
}
}
}
@@ -15171,7 +15171,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1000xxxxx111xxxxxxxxxxxxx
ldnt1w. */
- return 1739;
+ return 1740;
}
else
{
@@ -15179,7 +15179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1100xxxxx111xxxxxxxxxxxxx
ldnt1d. */
- return 1735;
+ return 1736;
}
}
else
@@ -15190,7 +15190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1010xxxxx111xxxxxxxxxxxxx
ld3w. */
- return 1631;
+ return 1632;
}
else
{
@@ -15198,7 +15198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1110xxxxx111xxxxxxxxxxxxx
ld3d. */
- return 1627;
+ return 1628;
}
}
}
@@ -15227,7 +15227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000000100xxxxxxxxxxxxx
fadd. */
- return 1397;
+ return 1398;
}
else
{
@@ -15235,7 +15235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000100100xxxxxxxxxxxxx
fmaxnm. */
- return 1444;
+ return 1445;
}
}
else
@@ -15246,7 +15246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000010100xxxxxxxxxxxxx
fmul. */
- return 1464;
+ return 1465;
}
else
{
@@ -15254,7 +15254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000110100xxxxxxxxxxxxx
fmax. */
- return 1442;
+ return 1443;
}
}
}
@@ -15268,7 +15268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000001100xxxxxxxxxxxxx
fsub. */
- return 1490;
+ return 1491;
}
else
{
@@ -15276,7 +15276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000101100xxxxxxxxxxxxx
fminnm. */
- return 1450;
+ return 1451;
}
}
else
@@ -15287,7 +15287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000011100xxxxxxxxxxxxx
fsubr. */
- return 1492;
+ return 1493;
}
else
{
@@ -15295,7 +15295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000111100xxxxxxxxxxxxx
fmin. */
- return 1448;
+ return 1449;
}
}
}
@@ -15306,7 +15306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx010xxx100xxxxxxxxxxxxx
ftmad. */
- return 1494;
+ return 1495;
}
}
else
@@ -15323,7 +15323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx001000100xxxxxxxxxxxxx
fabd. */
- return 1392;
+ return 1393;
}
else
{
@@ -15331,7 +15331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx011000100xxxxxxxxxxxxx
fadd. */
- return 1398;
+ return 1399;
}
}
else
@@ -15342,7 +15342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx001100100xxxxxxxxxxxxx
fdivr. */
- return 1438;
+ return 1439;
}
else
{
@@ -15350,7 +15350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx011100100xxxxxxxxxxxxx
fmaxnm. */
- return 1445;
+ return 1446;
}
}
}
@@ -15364,7 +15364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx001010100xxxxxxxxxxxxx
fmulx. */
- return 1469;
+ return 1470;
}
else
{
@@ -15372,7 +15372,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx011010100xxxxxxxxxxxxx
fmul. */
- return 1465;
+ return 1466;
}
}
else
@@ -15381,7 +15381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0x1110100xxxxxxxxxxxxx
fmax. */
- return 1443;
+ return 1444;
}
}
}
@@ -15397,7 +15397,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx001001100xxxxxxxxxxxxx
fscale. */
- return 1487;
+ return 1488;
}
else
{
@@ -15405,7 +15405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx011001100xxxxxxxxxxxxx
fsub. */
- return 1491;
+ return 1492;
}
}
else
@@ -15416,7 +15416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx001101100xxxxxxxxxxxxx
fdiv. */
- return 1437;
+ return 1438;
}
else
{
@@ -15424,7 +15424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx011101100xxxxxxxxxxxxx
fminnm. */
- return 1451;
+ return 1452;
}
}
}
@@ -15436,7 +15436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0x1011100xxxxxxxxxxxxx
fsubr. */
- return 1493;
+ return 1494;
}
else
{
@@ -15444,7 +15444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0x1111100xxxxxxxxxxxxx
fmin. */
- return 1449;
+ return 1450;
}
}
}
@@ -15458,7 +15458,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx110xxxxxxxx0xxxx
fcmuo. */
- return 1415;
+ return 1416;
}
else
{
@@ -15466,7 +15466,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx110xxxxxxxx1xxxx
facge. */
- return 1394;
+ return 1395;
}
}
}
@@ -15480,7 +15480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1000xxxxx1x0xxxxxxxxxxxxx
st1w. */
- return 1913;
+ return 1916;
}
else
{
@@ -15488,7 +15488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1100xxxxx1x0xxxxxxxxxxxxx
st1d. */
- return 1892;
+ return 1895;
}
}
else
@@ -15497,7 +15497,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1x10xxxxx1x0xxxxxxxxxxxxx
st1w. */
- return 1918;
+ return 1921;
}
}
}
@@ -15521,7 +15521,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000000101xxxxxxxxxxxxx
frintn. */
- return 1481;
+ return 1482;
}
else
{
@@ -15529,7 +15529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx010000101xxxxxxxxxxxxx
scvtf. */
- return 1827;
+ return 1830;
}
}
else
@@ -15540,7 +15540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000100101xxxxxxxxxxxxx
frinta. */
- return 1478;
+ return 1479;
}
else
{
@@ -15550,7 +15550,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x0010100101xxxxxxxxxxxxx
scvtf. */
- return 1826;
+ return 1829;
}
else
{
@@ -15560,7 +15560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x101010100101xxxxxxxxxxxxx
scvtf. */
- return 1825;
+ return 1828;
}
else
{
@@ -15568,7 +15568,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x111010100101xxxxxxxxxxxxx
scvtf. */
- return 1829;
+ return 1832;
}
}
}
@@ -15584,7 +15584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000010101xxxxxxxxxxxxx
frintm. */
- return 1480;
+ return 1481;
}
else
{
@@ -15592,7 +15592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx010010101xxxxxxxxxxxxx
scvtf. */
- return 1824;
+ return 1827;
}
}
else
@@ -15603,7 +15603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000110101xxxxxxxxxxxxx
frintx. */
- return 1483;
+ return 1484;
}
else
{
@@ -15613,7 +15613,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x10x010110101xxxxxxxxxxxxx
scvtf. */
- return 1828;
+ return 1831;
}
else
{
@@ -15621,7 +15621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x11x010110101xxxxxxxxxxxxx
scvtf. */
- return 1830;
+ return 1833;
}
}
}
@@ -15641,7 +15641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x0001000101xxxxxxxxxxxxx
fcvt. */
- return 1417;
+ return 1418;
}
else
{
@@ -15649,7 +15649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x1001000101xxxxxxxxxxxxx
fcvt. */
- return 1419;
+ return 1420;
}
}
else
@@ -15658,7 +15658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx001100101xxxxxxxxxxxxx
frecpx. */
- return 1477;
+ return 1478;
}
}
else
@@ -15671,7 +15671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x100001x10101xxxxxxxxxxxxx
fcvtx. */
- return 2087;
+ return 2091;
}
else
{
@@ -15679,7 +15679,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2499;
+ return 2504;
}
}
else
@@ -15688,7 +15688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x1001x10101xxxxxxxxxxxxx
fcvt. */
- return 1421;
+ return 1422;
}
}
}
@@ -15702,7 +15702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x100011xx0101xxxxxxxxxxxxx
flogb. */
- return 2089;
+ return 2093;
}
else
{
@@ -15710,7 +15710,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110011xx0101xxxxxxxxxxxxx
fcvtzs. */
- return 1426;
+ return 1427;
}
}
else
@@ -15723,7 +15723,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x1011000101xxxxxxxxxxxxx
fcvtzs. */
- return 1427;
+ return 1428;
}
else
{
@@ -15733,7 +15733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x101011100101xxxxxxxxxxxxx
fcvtzs. */
- return 1424;
+ return 1425;
}
else
{
@@ -15741,7 +15741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x111011100101xxxxxxxxxxxxx
fcvtzs. */
- return 1428;
+ return 1429;
}
}
}
@@ -15753,7 +15753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x1011010101xxxxxxxxxxxxx
fcvtzs. */
- return 1423;
+ return 1424;
}
else
{
@@ -15763,7 +15763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x101011110101xxxxxxxxxxxxx
fcvtzs. */
- return 1425;
+ return 1426;
}
else
{
@@ -15771,7 +15771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x111011110101xxxxxxxxxxxxx
fcvtzs. */
- return 1429;
+ return 1430;
}
}
}
@@ -15793,7 +15793,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000001101xxxxxxxxxxxxx
frintp. */
- return 1482;
+ return 1483;
}
else
{
@@ -15801,7 +15801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx010001101xxxxxxxxxxxxx
ucvtf. */
- return 1979;
+ return 1983;
}
}
else
@@ -15814,7 +15814,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x0001001101xxxxxxxxxxxxx
fcvt. */
- return 1418;
+ return 1419;
}
else
{
@@ -15822,7 +15822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x1001001101xxxxxxxxxxxxx
fcvt. */
- return 1420;
+ return 1421;
}
}
else
@@ -15831,7 +15831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx011001101xxxxxxxxxxxxx
fcvtzu. */
- return 1434;
+ return 1435;
}
}
}
@@ -15845,7 +15845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x00x0101101xxxxxxxxxxxxx
ucvtf. */
- return 1978;
+ return 1982;
}
else
{
@@ -15855,7 +15855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1010x0101101xxxxxxxxxxxxx
ucvtf. */
- return 1977;
+ return 1981;
}
else
{
@@ -15863,7 +15863,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1110x0101101xxxxxxxxxxxxx
ucvtf. */
- return 1981;
+ return 1985;
}
}
}
@@ -15875,7 +15875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx001101101xxxxxxxxxxxxx
fsqrt. */
- return 1488;
+ return 1489;
}
else
{
@@ -15885,7 +15885,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1x0011101101xxxxxxxxxxxxx
fcvtzu. */
- return 1433;
+ return 1434;
}
else
{
@@ -15895,7 +15895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x101011101101xxxxxxxxxxxxx
fcvtzu. */
- return 1431;
+ return 1432;
}
else
{
@@ -15903,7 +15903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x111011101101xxxxxxxxxxxxx
fcvtzu. */
- return 1435;
+ return 1436;
}
}
}
@@ -15922,7 +15922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000011101xxxxxxxxxxxxx
frintz. */
- return 1484;
+ return 1485;
}
else
{
@@ -15930,7 +15930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx010011101xxxxxxxxxxxxx
ucvtf. */
- return 1976;
+ return 1980;
}
}
else
@@ -15941,7 +15941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx001011101xxxxxxxxxxxxx
fcvt. */
- return 1422;
+ return 1423;
}
else
{
@@ -15949,7 +15949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx011011101xxxxxxxxxxxxx
fcvtzu. */
- return 1430;
+ return 1431;
}
}
}
@@ -15963,7 +15963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx000111101xxxxxxxxxxxxx
frinti. */
- return 1479;
+ return 1480;
}
else
{
@@ -15973,7 +15973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x10x010111101xxxxxxxxxxxxx
ucvtf. */
- return 1980;
+ return 1984;
}
else
{
@@ -15981,7 +15981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x11x010111101xxxxxxxxxxxxx
ucvtf. */
- return 1982;
+ return 1986;
}
}
}
@@ -15993,7 +15993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x10x0x1111101xxxxxxxxxxxxx
fcvtzu. */
- return 1432;
+ return 1433;
}
else
{
@@ -16001,7 +16001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x11x0x1111101xxxxxxxxxxxxx
fcvtzu. */
- return 1436;
+ return 1437;
}
}
}
@@ -16018,7 +16018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1000xxxxx101xxxxxxxxxxxxx
st1w. */
- return 1914;
+ return 1917;
}
else
{
@@ -16026,7 +16026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1100xxxxx101xxxxxxxxxxxxx
st1d. */
- return 1893;
+ return 1896;
}
}
else
@@ -16037,7 +16037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1010xxxxx101xxxxxxxxxxxxx
st1w. */
- return 1921;
+ return 1924;
}
else
{
@@ -16045,7 +16045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1110xxxxx101xxxxxxxxxxxxx
st1d. */
- return 1897;
+ return 1900;
}
}
}
@@ -16058,7 +16058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx0xxxxx111xxxxxxxxxxxxx
facgt. */
- return 1395;
+ return 1396;
}
else
{
@@ -16068,7 +16068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1xx00xxxx111xxxxxxxxxxxxx
st1w. */
- return 1922;
+ return 1925;
}
else
{
@@ -16080,7 +16080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x10001xxxx111xxxxxxxxxxxxx
stnt1w. */
- return 1956;
+ return 1959;
}
else
{
@@ -16088,7 +16088,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x11001xxxx111xxxxxxxxxxxxx
stnt1d. */
- return 1952;
+ return 1955;
}
}
else
@@ -16099,7 +16099,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x10101xxxx111xxxxxxxxxxxxx
st3w. */
- return 1940;
+ return 1943;
}
else
{
@@ -16107,7 +16107,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x11101xxxx111xxxxxxxxxxxxx
st3d. */
- return 1936;
+ return 1939;
}
}
}
@@ -16138,7 +16138,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10000010xxxxxxxxxxxxxx
cntp. */
- return 1364;
+ return 1365;
}
else
{
@@ -16152,7 +16152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10100010x000xxxxxxxxxx
sqincp. */
- return 1871;
+ return 1874;
}
else
{
@@ -16160,7 +16160,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10100010x100xxxxxxxxxx
wrffr. */
- return 2044;
+ return 2048;
}
}
else
@@ -16169,7 +16169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10100010xx10xxxxxxxxxx
sqincp. */
- return 1873;
+ return 1876;
}
}
else
@@ -16178,7 +16178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10100010xxx1xxxxxxxxxx
sqincp. */
- return 1872;
+ return 1875;
}
}
}
@@ -16192,7 +16192,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10x10010x00xxxxxxxxxxx
incp. */
- return 1502;
+ return 1503;
}
else
{
@@ -16200,7 +16200,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10x10010x10xxxxxxxxxxx
setffr. */
- return 1838;
+ return 1841;
}
}
else
@@ -16209,7 +16209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10x10010xx1xxxxxxxxxxx
incp. */
- return 1503;
+ return 1504;
}
}
}
@@ -16223,7 +16223,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xx1010xx00xxxxxxxxxx
sqdecp. */
- return 1857;
+ return 1860;
}
else
{
@@ -16231,7 +16231,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xx1010xx10xxxxxxxxxx
sqdecp. */
- return 1859;
+ return 1862;
}
}
else
@@ -16240,7 +16240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xx1010xxx1xxxxxxxxxx
sqdecp. */
- return 1858;
+ return 1861;
}
}
}
@@ -16258,7 +16258,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10x00110xx00xxxxxxxxxx
uqincp. */
- return 2019;
+ return 2023;
}
else
{
@@ -16266,7 +16266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10x10110xx00xxxxxxxxxx
decp. */
- return 1377;
+ return 1378;
}
}
else
@@ -16275,7 +16275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xx1110xx00xxxxxxxxxx
uqdecp. */
- return 2005;
+ return 2009;
}
}
else
@@ -16288,7 +16288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10x00110xx10xxxxxxxxxx
uqincp. */
- return 2020;
+ return 2024;
}
else
{
@@ -16296,7 +16296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10x10110xx10xxxxxxxxxx
decp. */
- return 1378;
+ return 1379;
}
}
else
@@ -16305,7 +16305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xx1110xx10xxxxxxxxxx
uqdecp. */
- return 2006;
+ return 2010;
}
}
}
@@ -16317,7 +16317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xx0110xxx1xxxxxxxxxx
uqincp. */
- return 2021;
+ return 2025;
}
else
{
@@ -16325,7 +16325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xx1110xxx1xxxxxxxxxx
uqdecp. */
- return 2007;
+ return 2011;
}
}
}
@@ -16340,7 +16340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10010xxxx10xxxxxxxxxxxxxx
ld1sh. */
- return 1595;
+ return 1596;
}
else
{
@@ -16348,7 +16348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11010xxxx10xxxxxxxxxxxxxx
ld1sb. */
- return 1582;
+ return 1583;
}
}
else
@@ -16359,7 +16359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10110xxxx10xxxxxxxxxxxxxx
ld1w. */
- return 1614;
+ return 1615;
}
else
{
@@ -16367,7 +16367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11110xxxx10xxxxxxxxxxxxxx
ld1d. */
- return 1534;
+ return 1535;
}
}
}
@@ -16382,7 +16382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x10011xxxx10xxxxxxxxxxxxxx
ldnf1sh. */
- return 1728;
+ return 1729;
}
else
{
@@ -16390,7 +16390,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x11011xxxx10xxxxxxxxxxxxxx
ldnf1sb. */
- return 1725;
+ return 1726;
}
}
else
@@ -16401,7 +16401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x10111xxxx10xxxxxxxxxxxxxx
ldnf1w. */
- return 1731;
+ return 1732;
}
else
{
@@ -16409,7 +16409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01001x11111xxxx10xxxxxxxxxxxxxx
ldnf1d. */
- return 1720;
+ return 1721;
}
}
}
@@ -16432,7 +16432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10000011xxxxxxxxxxxxxx
add. */
- return 1291;
+ return 1292;
}
else
{
@@ -16440,7 +16440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx11000011xxxxxxxxxxxxxx
mul. */
- return 1760;
+ return 1762;
}
}
else
@@ -16451,7 +16451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10100011xxxxxxxxxxxxxx
smax. */
- return 1839;
+ return 1842;
}
else
{
@@ -16459,7 +16459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx11100011xxxxxxxxxxxxxx
dup. */
- return 1383;
+ return 1384;
}
}
}
@@ -16469,7 +16469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xx10011xxxxxxxxxxxxxx
sqadd. */
- return 1848;
+ return 1851;
}
}
else
@@ -16480,7 +16480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xx01011xxxxxxxxxxxxxx
smin. */
- return 1842;
+ return 1845;
}
else
{
@@ -16488,7 +16488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xx11011xxxxxxxxxxxxxx
sqsub. */
- return 1878;
+ return 1881;
}
}
}
@@ -16504,7 +16504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1x000111xxxxxxxxxxxxxx
sub. */
- return 1960;
+ return 1964;
}
else
{
@@ -16514,7 +16514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10100111xxxxxxxxxxxxxx
umax. */
- return 1988;
+ return 1992;
}
else
{
@@ -16522,7 +16522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx11100111xxxxxxxxxxxxxx
fdup. */
- return 1439;
+ return 1440;
}
}
}
@@ -16532,7 +16532,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xx10111xxxxxxxxxxxxxx
uqadd. */
- return 1996;
+ return 2000;
}
}
else
@@ -16545,7 +16545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1x001111xxxxxxxxxxxxxx
subr. */
- return 1962;
+ return 1966;
}
else
{
@@ -16553,7 +16553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1x101111xxxxxxxxxxxxxx
umin. */
- return 1991;
+ return 1995;
}
}
else
@@ -16562,7 +16562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xx11111xxxxxxxxxxxxxx
uqsub. */
- return 2026;
+ return 2030;
}
}
}
@@ -16579,7 +16579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1001xxxxx110xxxxxxxxxxxxx
ld2w. */
- return 1622;
+ return 1623;
}
else
{
@@ -16587,7 +16587,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1101xxxxx110xxxxxxxxxxxxx
ld2d. */
- return 1618;
+ return 1619;
}
}
else
@@ -16598,7 +16598,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1011xxxxx110xxxxxxxxxxxxx
ld4w. */
- return 1638;
+ return 1639;
}
else
{
@@ -16606,7 +16606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1111xxxxx110xxxxxxxxxxxxx
ld4d. */
- return 1634;
+ return 1635;
}
}
}
@@ -16620,7 +16620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1001xxxxx111xxxxxxxxxxxxx
ld2w. */
- return 1623;
+ return 1624;
}
else
{
@@ -16628,7 +16628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1101xxxxx111xxxxxxxxxxxxx
ld2d. */
- return 1619;
+ return 1620;
}
}
else
@@ -16639,7 +16639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1011xxxxx111xxxxxxxxxxxxx
ld4w. */
- return 1639;
+ return 1640;
}
else
{
@@ -16647,7 +16647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x1111xxxxx111xxxxxxxxxxxxx
ld4d. */
- return 1635;
+ return 1636;
}
}
}
@@ -16666,7 +16666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx1xxxxx100xxxxxxxxxxxxx
fmad. */
- return 1441;
+ return 1442;
}
else
{
@@ -16674,7 +16674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx1xxxxx110xxxxxxxxxxxxx
fnmad. */
- return 1471;
+ return 1472;
}
}
else
@@ -16687,7 +16687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1001xxxxx1x0xxxxxxxxxxxxx
st1w. */
- return 1915;
+ return 1918;
}
else
{
@@ -16695,7 +16695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1101xxxxx1x0xxxxxxxxxxxxx
st1d. */
- return 1894;
+ return 1897;
}
}
else
@@ -16704,7 +16704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1x11xxxxx1x0xxxxxxxxxxxxx
st1w. */
- return 1920;
+ return 1923;
}
}
}
@@ -16718,7 +16718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx1xxxxx101xxxxxxxxxxxxx
fmsb. */
- return 1462;
+ return 1463;
}
else
{
@@ -16730,7 +16730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1001xxxxx101xxxxxxxxxxxxx
st1w. */
- return 1916;
+ return 1919;
}
else
{
@@ -16738,7 +16738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1101xxxxx101xxxxxxxxxxxxx
st1d. */
- return 1895;
+ return 1898;
}
}
else
@@ -16747,7 +16747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x1x11xxxxx101xxxxxxxxxxxxx
st1w. */
- return 1923;
+ return 1926;
}
}
}
@@ -16759,7 +16759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x1xx1xxxxx111xxxxxxxxxxxxx
fnmsb. */
- return 1474;
+ return 1475;
}
else
{
@@ -16771,7 +16771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x10x10xxxx111xxxxxxxxxxxxx
st1w. */
- return 1924;
+ return 1927;
}
else
{
@@ -16779,7 +16779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x11x10xxxx111xxxxxxxxxxxxx
st1d. */
- return 1898;
+ return 1901;
}
}
else
@@ -16792,7 +16792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x10011xxxx111xxxxxxxxxxxxx
st2w. */
- return 1932;
+ return 1935;
}
else
{
@@ -16800,7 +16800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x11011xxxx111xxxxxxxxxxxxx
st2d. */
- return 1928;
+ return 1931;
}
}
else
@@ -16811,7 +16811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x10111xxxx111xxxxxxxxxxxxx
st4w. */
- return 1948;
+ return 1951;
}
else
{
@@ -16819,7 +16819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
111001x11111xxxx111xxxxxxxxxxxxx
st4d. */
- return 1944;
+ return 1947;
}
}
}
@@ -17029,7 +17029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2635;
+ return 2640;
}
else
{
@@ -17609,7 +17609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2563;
+ return 2568;
}
else
{
@@ -17617,7 +17617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2565;
+ return 2570;
}
}
else
@@ -17628,7 +17628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2569;
+ return 2574;
}
else
{
@@ -17636,7 +17636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2571;
+ return 2576;
}
}
}
@@ -17650,7 +17650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2566;
+ return 2571;
}
else
{
@@ -17658,7 +17658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2568;
+ return 2573;
}
}
else
@@ -17669,7 +17669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2572;
+ return 2577;
}
else
{
@@ -17677,7 +17677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2574;
+ return 2579;
}
}
}
@@ -17694,7 +17694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2587;
+ return 2592;
}
else
{
@@ -17702,7 +17702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2589;
+ return 2594;
}
}
else
@@ -17713,7 +17713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2593;
+ return 2598;
}
else
{
@@ -17721,7 +17721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2595;
+ return 2600;
}
}
}
@@ -17735,7 +17735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2590;
+ return 2595;
}
else
{
@@ -17743,7 +17743,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2592;
+ return 2597;
}
}
else
@@ -17754,7 +17754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2596;
+ return 2601;
}
else
{
@@ -17762,7 +17762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2598;
+ return 2603;
}
}
}
@@ -17782,7 +17782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2575;
+ return 2580;
}
else
{
@@ -17790,7 +17790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2577;
+ return 2582;
}
}
else
@@ -17801,7 +17801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2581;
+ return 2586;
}
else
{
@@ -17809,7 +17809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2583;
+ return 2588;
}
}
}
@@ -17823,7 +17823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2578;
+ return 2583;
}
else
{
@@ -17831,7 +17831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2580;
+ return 2585;
}
}
else
@@ -17842,7 +17842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2584;
+ return 2589;
}
else
{
@@ -17850,7 +17850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2586;
+ return 2591;
}
}
}
@@ -17867,7 +17867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2599;
+ return 2604;
}
else
{
@@ -17875,7 +17875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2601;
+ return 2606;
}
}
else
@@ -17886,7 +17886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2605;
+ return 2610;
}
else
{
@@ -17894,7 +17894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2607;
+ return 2612;
}
}
}
@@ -17908,7 +17908,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2602;
+ return 2607;
}
else
{
@@ -17916,7 +17916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2604;
+ return 2609;
}
}
else
@@ -17927,7 +17927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2608;
+ return 2613;
}
else
{
@@ -17935,7 +17935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2610;
+ return 2615;
}
}
}
@@ -17969,7 +17969,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2564;
+ return 2569;
}
else
{
@@ -17977,7 +17977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2623;
+ return 2628;
}
}
else
@@ -17988,7 +17988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2570;
+ return 2575;
}
else
{
@@ -17996,7 +17996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2625;
+ return 2630;
}
}
}
@@ -18010,7 +18010,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2567;
+ return 2572;
}
else
{
@@ -18018,7 +18018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2624;
+ return 2629;
}
}
else
@@ -18027,7 +18027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2573;
+ return 2578;
}
}
}
@@ -18043,7 +18043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2588;
+ return 2593;
}
else
{
@@ -18051,7 +18051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2629;
+ return 2634;
}
}
else
@@ -18062,7 +18062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2594;
+ return 2599;
}
else
{
@@ -18070,7 +18070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2631;
+ return 2636;
}
}
}
@@ -18084,7 +18084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2591;
+ return 2596;
}
else
{
@@ -18092,7 +18092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2630;
+ return 2635;
}
}
else
@@ -18101,7 +18101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2597;
+ return 2602;
}
}
}
@@ -18120,7 +18120,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2576;
+ return 2581;
}
else
{
@@ -18128,7 +18128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2626;
+ return 2631;
}
}
else
@@ -18139,7 +18139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2582;
+ return 2587;
}
else
{
@@ -18147,7 +18147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2628;
+ return 2633;
}
}
}
@@ -18161,7 +18161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2579;
+ return 2584;
}
else
{
@@ -18169,7 +18169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2627;
+ return 2632;
}
}
else
@@ -18178,7 +18178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2585;
+ return 2590;
}
}
}
@@ -18194,7 +18194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2600;
+ return 2605;
}
else
{
@@ -18202,7 +18202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2632;
+ return 2637;
}
}
else
@@ -18213,7 +18213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2606;
+ return 2611;
}
else
{
@@ -18221,7 +18221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2634;
+ return 2639;
}
}
}
@@ -18235,7 +18235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2603;
+ return 2608;
}
else
{
@@ -18243,7 +18243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2633;
+ return 2638;
}
}
else
@@ -18252,7 +18252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2609;
+ return 2614;
}
}
}
@@ -18419,7 +18419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2490;
+ return 2495;
}
}
}
@@ -18452,7 +18452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2416;
+ return 2421;
}
}
else
@@ -18526,7 +18526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2492;
+ return 2497;
}
}
}
@@ -18559,7 +18559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2493;
+ return 2498;
}
}
else
@@ -18606,7 +18606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2423;
+ return 2428;
}
else
{
@@ -18614,7 +18614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2425;
+ return 2430;
}
}
else
@@ -18625,7 +18625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2427;
+ return 2432;
}
else
{
@@ -18639,7 +18639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2428;
+ return 2433;
}
else
{
@@ -18647,7 +18647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2421;
+ return 2426;
}
}
else
@@ -18656,7 +18656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2430;
+ return 2435;
}
}
else
@@ -18669,7 +18669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2429;
+ return 2434;
}
else
{
@@ -18677,7 +18677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2434;
+ return 2439;
}
}
else
@@ -18686,7 +18686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2431;
+ return 2436;
}
}
}
@@ -18867,7 +18867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2415;
+ return 2420;
}
}
else
@@ -18898,7 +18898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2491;
+ return 2496;
}
else
{
@@ -18917,7 +18917,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2507;
+ return 2512;
}
else
{
@@ -18927,7 +18927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2505;
+ return 2510;
}
else
{
@@ -18937,7 +18937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2512;
+ return 2517;
}
else
{
@@ -18945,7 +18945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2511;
+ return 2516;
}
}
}
@@ -19529,7 +19529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2508;
+ return 2513;
}
else
{
@@ -19537,7 +19537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2509;
+ return 2514;
}
}
}
@@ -19855,7 +19855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2426;
+ return 2431;
}
}
else
@@ -20466,7 +20466,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2419;
+ return 2424;
}
}
}
@@ -20518,7 +20518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2432;
+ return 2437;
}
}
}
@@ -20761,7 +20761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2422;
+ return 2427;
}
}
else
@@ -20837,7 +20837,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2435;
+ return 2440;
}
}
else
@@ -21663,7 +21663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2420;
+ return 2425;
}
}
else
@@ -21695,7 +21695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2433;
+ return 2438;
}
}
else
@@ -21935,7 +21935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2424;
+ return 2429;
}
}
else
@@ -21967,7 +21967,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2438;
+ return 2443;
}
else
{
@@ -21975,7 +21975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2442;
+ return 2447;
}
}
}
@@ -21997,7 +21997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2439;
+ return 2444;
}
else
{
@@ -22005,7 +22005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2443;
+ return 2448;
}
}
}
@@ -22044,7 +22044,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2436;
+ return 2441;
}
else
{
@@ -22052,7 +22052,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2440;
+ return 2445;
}
}
else
@@ -22074,7 +22074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2437;
+ return 2442;
}
else
{
@@ -22082,7 +22082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2441;
+ return 2446;
}
}
else
@@ -23890,7 +23890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2444;
+ return 2449;
}
else
{
@@ -23898,7 +23898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2448;
+ return 2453;
}
}
else
@@ -23920,7 +23920,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2445;
+ return 2450;
}
else
{
@@ -23928,7 +23928,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2449;
+ return 2454;
}
}
else
@@ -24434,7 +24434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2446;
+ return 2451;
}
else
{
@@ -24442,7 +24442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2450;
+ return 2455;
}
}
}
@@ -24464,7 +24464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2447;
+ return 2452;
}
else
{
@@ -24472,7 +24472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2451;
+ return 2456;
}
}
}
@@ -24528,7 +24528,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2418;
+ return 2423;
}
else
{
@@ -24536,7 +24536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2417;
+ return 2422;
}
}
}
@@ -24639,7 +24639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2495;
+ return 2500;
}
else
{
@@ -24647,7 +24647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2494;
+ return 2499;
}
}
else
@@ -24658,7 +24658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2506;
+ return 2511;
}
else
{
@@ -24668,7 +24668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2514;
+ return 2519;
}
else
{
@@ -24676,7 +24676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2513;
+ return 2518;
}
}
}
@@ -25163,36 +25163,36 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
int value;
switch (key)
{
- case 2385: value = 2387; break; /* mov --> mova. */
- case 2387: return NULL; /* mova --> NULL. */
- case 2384: value = 2386; break; /* mov --> mova. */
- case 2386: return NULL; /* mova --> NULL. */
- case 2389: value = 2394; break; /* ld1b --> ld1b. */
- case 2394: return NULL; /* ld1b --> NULL. */
- case 2391: value = 2396; break; /* ld1w --> ld1w. */
- case 2396: return NULL; /* ld1w --> NULL. */
- case 2390: value = 2395; break; /* ld1h --> ld1h. */
- case 2395: return NULL; /* ld1h --> NULL. */
- case 2392: value = 2397; break; /* ld1d --> ld1d. */
- case 2397: return NULL; /* ld1d --> NULL. */
- case 2399: value = 2404; break; /* st1b --> st1b. */
- case 2404: return NULL; /* st1b --> NULL. */
- case 2401: value = 2406; break; /* st1w --> st1w. */
- case 2406: return NULL; /* st1w --> NULL. */
- case 2400: value = 2405; break; /* st1h --> st1h. */
- case 2405: return NULL; /* st1h --> NULL. */
- case 2402: value = 2407; break; /* st1d --> st1d. */
- case 2407: return NULL; /* st1d --> NULL. */
- case 2393: value = 2398; break; /* ld1q --> ld1q. */
- case 2398: return NULL; /* ld1q --> NULL. */
- case 2403: value = 2408; break; /* st1q --> st1q. */
- case 2408: return NULL; /* st1q --> NULL. */
+ case 2389: value = 2391; break; /* mov --> mova. */
+ case 2391: return NULL; /* mova --> NULL. */
+ case 2388: value = 2390; break; /* mov --> mova. */
+ case 2390: return NULL; /* mova --> NULL. */
+ case 2393: value = 2398; break; /* ld1b --> ld1b. */
+ case 2398: return NULL; /* ld1b --> NULL. */
+ case 2395: value = 2400; break; /* ld1w --> ld1w. */
+ case 2400: return NULL; /* ld1w --> NULL. */
+ case 2394: value = 2399; break; /* ld1h --> ld1h. */
+ case 2399: return NULL; /* ld1h --> NULL. */
+ case 2396: value = 2401; break; /* ld1d --> ld1d. */
+ case 2401: return NULL; /* ld1d --> NULL. */
+ case 2403: value = 2408; break; /* st1b --> st1b. */
+ case 2408: return NULL; /* st1b --> NULL. */
+ case 2405: value = 2410; break; /* st1w --> st1w. */
+ case 2410: return NULL; /* st1w --> NULL. */
+ case 2404: value = 2409; break; /* st1h --> st1h. */
+ case 2409: return NULL; /* st1h --> NULL. */
+ case 2406: value = 2411; break; /* st1d --> st1d. */
+ case 2411: return NULL; /* st1d --> NULL. */
+ case 2397: value = 2402; break; /* ld1q --> ld1q. */
+ case 2402: return NULL; /* ld1q --> NULL. */
+ case 2407: value = 2412; break; /* st1q --> st1q. */
+ case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2636; break; /* addg --> smax. */
- case 2636: value = 2637; break; /* smax --> umax. */
- case 2637: value = 2638; break; /* umax --> smin. */
- case 2638: value = 2639; break; /* smin --> umin. */
- case 2639: return NULL; /* umin --> NULL. */
+ case 19: value = 2641; break; /* addg --> smax. */
+ case 2641: value = 2642; break; /* smax --> umax. */
+ case 2642: value = 2643; break; /* umax --> smin. */
+ case 2643: value = 2644; break; /* smin --> umin. */
+ case 2644: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -25201,38 +25201,46 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 970: return NULL; /* stllrh --> NULL. */
case 972: value = 976; break; /* ldnp --> ldp. */
case 976: return NULL; /* ldp --> NULL. */
- case 1641: value = 1642; break; /* ldff1b --> ldff1b. */
- case 1642: return NULL; /* ldff1b --> NULL. */
- case 1697: value = 1698; break; /* ldff1sw --> ldff1sw. */
- case 1698: return NULL; /* ldff1sw --> NULL. */
- case 1645: value = 1646; break; /* ldff1b --> ldff1b. */
- case 1646: return NULL; /* ldff1b --> NULL. */
- case 1664: value = 1665; break; /* ldff1h --> ldff1h. */
- case 1665: return NULL; /* ldff1h --> NULL. */
- case 1643: value = 1644; break; /* ldff1b --> ldff1b. */
- case 1644: return NULL; /* ldff1b --> NULL. */
- case 1662: value = 1663; break; /* ldff1h --> ldff1h. */
- case 1663: return NULL; /* ldff1h --> NULL. */
- case 1647: value = 1648; break; /* ldff1b --> ldff1b. */
- case 1648: return NULL; /* ldff1b --> NULL. */
- case 1666: value = 1667; break; /* ldff1h --> ldff1h. */
- case 1667: return NULL; /* ldff1h --> NULL. */
- case 1687: value = 1688; break; /* ldff1sh --> ldff1sh. */
- case 1688: return NULL; /* ldff1sh --> NULL. */
- case 1675: value = 1676; break; /* ldff1sb --> ldff1sb. */
- case 1676: return NULL; /* ldff1sb --> NULL. */
- case 1706: value = 1707; break; /* ldff1w --> ldff1w. */
- case 1707: return NULL; /* ldff1w --> NULL. */
- case 1679: value = 1680; break; /* ldff1sb --> ldff1sb. */
- case 1680: return NULL; /* ldff1sb --> NULL. */
- case 1689: value = 1690; break; /* ldff1sh --> ldff1sh. */
- case 1690: return NULL; /* ldff1sh --> NULL. */
- case 1677: value = 1678; break; /* ldff1sb --> ldff1sb. */
- case 1678: return NULL; /* ldff1sb --> NULL. */
- case 1708: value = 1709; break; /* ldff1w --> ldff1w. */
- case 1709: return NULL; /* ldff1w --> NULL. */
- case 1653: value = 1654; break; /* ldff1d --> ldff1d. */
- case 1654: return NULL; /* ldff1d --> NULL. */
+ case 1642: value = 1643; break; /* ldff1b --> ldff1b. */
+ case 1643: return NULL; /* ldff1b --> NULL. */
+ case 1698: value = 1699; break; /* ldff1sw --> ldff1sw. */
+ case 1699: return NULL; /* ldff1sw --> NULL. */
+ case 1646: value = 1647; break; /* ldff1b --> ldff1b. */
+ case 1647: return NULL; /* ldff1b --> NULL. */
+ case 1665: value = 1666; break; /* ldff1h --> ldff1h. */
+ case 1666: return NULL; /* ldff1h --> NULL. */
+ case 1644: value = 1645; break; /* ldff1b --> ldff1b. */
+ case 1645: return NULL; /* ldff1b --> NULL. */
+ case 1663: value = 1664; break; /* ldff1h --> ldff1h. */
+ case 1664: return NULL; /* ldff1h --> NULL. */
+ case 1648: value = 1649; break; /* ldff1b --> ldff1b. */
+ case 1649: return NULL; /* ldff1b --> NULL. */
+ case 1667: value = 1668; break; /* ldff1h --> ldff1h. */
+ case 1668: return NULL; /* ldff1h --> NULL. */
+ case 1741: value = 1742; break; /* ldr --> ldr. */
+ case 1742: return NULL; /* ldr --> NULL. */
+ case 1960: value = 1961; break; /* str --> str. */
+ case 1961: return NULL; /* str --> NULL. */
+ case 1688: value = 1689; break; /* ldff1sh --> ldff1sh. */
+ case 1689: return NULL; /* ldff1sh --> NULL. */
+ case 1676: value = 1677; break; /* ldff1sb --> ldff1sb. */
+ case 1677: return NULL; /* ldff1sb --> NULL. */
+ case 1707: value = 1708; break; /* ldff1w --> ldff1w. */
+ case 1708: return NULL; /* ldff1w --> NULL. */
+ case 1680: value = 1681; break; /* ldff1sb --> ldff1sb. */
+ case 1681: return NULL; /* ldff1sb --> NULL. */
+ case 2418: value = 2419; break; /* psel --> psel. */
+ case 2419: return NULL; /* psel --> NULL. */
+ case 1690: value = 1691; break; /* ldff1sh --> ldff1sh. */
+ case 1691: return NULL; /* ldff1sh --> NULL. */
+ case 1678: value = 1679; break; /* ldff1sb --> ldff1sb. */
+ case 1679: return NULL; /* ldff1sb --> NULL. */
+ case 1709: value = 1710; break; /* ldff1w --> ldff1w. */
+ case 1710: return NULL; /* ldff1w --> NULL. */
+ case 1654: value = 1655; break; /* ldff1d --> ldff1d. */
+ case 1655: return NULL; /* ldff1d --> NULL. */
+ case 1778: value = 1779; break; /* pfalse --> pfalse. */
+ case 1779: return NULL; /* pfalse --> NULL. */
case 811: value = 812; break; /* xaflag --> axflag. */
case 812: value = 1194; break; /* axflag --> tcommit. */
case 1194: value = 1197; break; /* tcommit --> smstart. */
@@ -25342,8 +25350,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2510; break; /* fcvt --> bfcvt. */
- case 2510: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2515; break; /* fcvt --> bfcvt. */
+ case 2515: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -25561,35 +25569,35 @@ aarch64_find_alias_opcode (const aarch64_opcode *opcode)
case 1230: value = 1239; break; /* sys --> cpp. */
case 1235: value = 1235; break; /* wfet --> wfet. */
case 1236: value = 1236; break; /* wfit --> wfit. */
- case 1299: value = 2049; break; /* and --> bic. */
- case 1301: value = 1282; break; /* and --> mov. */
- case 1302: value = 1286; break; /* ands --> movs. */
- case 1337: value = 2050; break; /* cmpge --> cmple. */
- case 1340: value = 2053; break; /* cmpgt --> cmplt. */
- case 1342: value = 2051; break; /* cmphi --> cmplo. */
- case 1345: value = 2052; break; /* cmphs --> cmpls. */
- case 1367: value = 1279; break; /* cpy --> mov. */
- case 1368: value = 1281; break; /* cpy --> mov. */
- case 1369: value = 2060; break; /* cpy --> fmov. */
- case 1381: value = 1274; break; /* dup --> mov. */
- case 1382: value = 1276; break; /* dup --> mov. */
- case 1383: value = 2059; break; /* dup --> fmov. */
- case 1384: value = 1277; break; /* dupm --> mov. */
- case 1386: value = 2054; break; /* eor --> eon. */
- case 1388: value = 1287; break; /* eor --> not. */
- case 1389: value = 1288; break; /* eors --> nots. */
- case 1394: value = 2055; break; /* facge --> facle. */
- case 1395: value = 2056; break; /* facgt --> faclt. */
- case 1408: value = 2057; break; /* fcmge --> fcmle. */
- case 1410: value = 2058; break; /* fcmgt --> fcmlt. */
- case 1416: value = 1271; break; /* fcpy --> fmov. */
- case 1439: value = 1270; break; /* fdup --> fmov. */
- case 1770: value = 1272; break; /* orr --> mov. */
- case 1771: value = 2061; break; /* orr --> orn. */
- case 1773: value = 1275; break; /* orr --> mov. */
- case 1774: value = 1285; break; /* orrs --> movs. */
- case 1836: value = 1280; break; /* sel --> mov. */
- case 1837: value = 1283; break; /* sel --> mov. */
+ case 1300: value = 2053; break; /* and --> bic. */
+ case 1302: value = 1283; break; /* and --> mov. */
+ case 1303: value = 1287; break; /* ands --> movs. */
+ case 1338: value = 2054; break; /* cmpge --> cmple. */
+ case 1341: value = 2057; break; /* cmpgt --> cmplt. */
+ case 1343: value = 2055; break; /* cmphi --> cmplo. */
+ case 1346: value = 2056; break; /* cmphs --> cmpls. */
+ case 1368: value = 1280; break; /* cpy --> mov. */
+ case 1369: value = 1282; break; /* cpy --> mov. */
+ case 1370: value = 2064; break; /* cpy --> fmov. */
+ case 1382: value = 1274; break; /* dup --> mov. */
+ case 1383: value = 1277; break; /* dup --> mov. */
+ case 1384: value = 2063; break; /* dup --> fmov. */
+ case 1385: value = 1278; break; /* dupm --> mov. */
+ case 1387: value = 2058; break; /* eor --> eon. */
+ case 1389: value = 1288; break; /* eor --> not. */
+ case 1390: value = 1289; break; /* eors --> nots. */
+ case 1395: value = 2059; break; /* facge --> facle. */
+ case 1396: value = 2060; break; /* facgt --> faclt. */
+ case 1409: value = 2061; break; /* fcmge --> fcmle. */
+ case 1411: value = 2062; break; /* fcmgt --> fcmlt. */
+ case 1417: value = 1271; break; /* fcpy --> fmov. */
+ case 1440: value = 1270; break; /* fdup --> fmov. */
+ case 1772: value = 1272; break; /* orr --> mov. */
+ case 1773: value = 2065; break; /* orr --> orn. */
+ case 1775: value = 1276; break; /* orr --> mov. */
+ case 1776: value = 1286; break; /* orrs --> movs. */
+ case 1839: value = 1281; break; /* sel --> mov. */
+ case 1840: value = 1284; break; /* sel --> mov. */
default: return NULL;
}
@@ -25750,38 +25758,39 @@ aarch64_find_next_alias_opcode (const aarch64_opcode *opcode)
case 1233: value = 1232; break; /* ic --> dc. */
case 1232: value = 1231; break; /* dc --> at. */
case 1231: value = 1230; break; /* at --> sys. */
- case 2049: value = 1299; break; /* bic --> and. */
- case 1282: value = 1301; break; /* mov --> and. */
- case 1286: value = 1302; break; /* movs --> ands. */
- case 2050: value = 1337; break; /* cmple --> cmpge. */
- case 2053: value = 1340; break; /* cmplt --> cmpgt. */
- case 2051: value = 1342; break; /* cmplo --> cmphi. */
- case 2052: value = 1345; break; /* cmpls --> cmphs. */
- case 1279: value = 1367; break; /* mov --> cpy. */
- case 1281: value = 1368; break; /* mov --> cpy. */
- case 2060: value = 1284; break; /* fmov --> mov. */
- case 1284: value = 1369; break; /* mov --> cpy. */
- case 1274: value = 1381; break; /* mov --> dup. */
- case 1276: value = 1273; break; /* mov --> mov. */
- case 1273: value = 1382; break; /* mov --> dup. */
- case 2059: value = 1278; break; /* fmov --> mov. */
- case 1278: value = 1383; break; /* mov --> dup. */
- case 1277: value = 1384; break; /* mov --> dupm. */
- case 2054: value = 1386; break; /* eon --> eor. */
- case 1287: value = 1388; break; /* not --> eor. */
- case 1288: value = 1389; break; /* nots --> eors. */
- case 2055: value = 1394; break; /* facle --> facge. */
- case 2056: value = 1395; break; /* faclt --> facgt. */
- case 2057: value = 1408; break; /* fcmle --> fcmge. */
- case 2058: value = 1410; break; /* fcmlt --> fcmgt. */
- case 1271: value = 1416; break; /* fmov --> fcpy. */
- case 1270: value = 1439; break; /* fmov --> fdup. */
- case 1272: value = 1770; break; /* mov --> orr. */
- case 2061: value = 1771; break; /* orn --> orr. */
- case 1275: value = 1773; break; /* mov --> orr. */
- case 1285: value = 1774; break; /* movs --> orrs. */
- case 1280: value = 1836; break; /* mov --> sel. */
- case 1283: value = 1837; break; /* mov --> sel. */
+ case 2053: value = 1300; break; /* bic --> and. */
+ case 1283: value = 1302; break; /* mov --> and. */
+ case 1287: value = 1303; break; /* movs --> ands. */
+ case 2054: value = 1338; break; /* cmple --> cmpge. */
+ case 2057: value = 1341; break; /* cmplt --> cmpgt. */
+ case 2055: value = 1343; break; /* cmplo --> cmphi. */
+ case 2056: value = 1346; break; /* cmpls --> cmphs. */
+ case 1280: value = 1368; break; /* mov --> cpy. */
+ case 1282: value = 1369; break; /* mov --> cpy. */
+ case 2064: value = 1285; break; /* fmov --> mov. */
+ case 1285: value = 1370; break; /* mov --> cpy. */
+ case 1274: value = 1382; break; /* mov --> dup. */
+ case 1277: value = 1273; break; /* mov --> mov. */
+ case 1273: value = 1383; break; /* mov --> dup. */
+ case 2063: value = 1279; break; /* fmov --> mov. */
+ case 1279: value = 1384; break; /* mov --> dup. */
+ case 1278: value = 1385; break; /* mov --> dupm. */
+ case 2058: value = 1387; break; /* eon --> eor. */
+ case 1288: value = 1389; break; /* not --> eor. */
+ case 1289: value = 1390; break; /* nots --> eors. */
+ case 2059: value = 1395; break; /* facle --> facge. */
+ case 2060: value = 1396; break; /* faclt --> facgt. */
+ case 2061: value = 1409; break; /* fcmle --> fcmge. */
+ case 2062: value = 1411; break; /* fcmlt --> fcmgt. */
+ case 1271: value = 1417; break; /* fmov --> fcpy. */
+ case 1270: value = 1440; break; /* fmov --> fdup. */
+ case 1272: value = 1772; break; /* mov --> orr. */
+ case 2065: value = 1773; break; /* orn --> orr. */
+ case 1276: value = 1275; break; /* mov --> mov. */
+ case 1275: value = 1775; break; /* mov --> orr. */
+ case 1286: value = 1776; break; /* movs --> orrs. */
+ case 1281: value = 1839; break; /* mov --> sel. */
+ case 1284: value = 1840; break; /* mov --> sel. */
default: return NULL;
}
@@ -25834,20 +25843,24 @@ aarch64_extract_operand (const aarch64_operand *self,
case 174:
case 175:
case 176:
- case 191:
- case 192:
- case 193:
- case 194:
+ case 177:
+ case 178:
+ case 179:
+ case 180:
case 195:
case 196:
case 197:
case 198:
case 199:
- case 205:
- case 208:
- case 210:
- case 211:
+ case 200:
+ case 201:
+ case 202:
+ case 203:
+ case 209:
+ case 212:
case 214:
+ case 215:
+ case 218:
return aarch64_ext_regno (self, info, code, inst, errors);
case 10:
return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -25863,7 +25876,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 222:
+ case 226:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -25901,18 +25914,18 @@ aarch64_extract_operand (const aarch64_operand *self,
case 84:
case 164:
case 166:
- case 183:
- case 184:
- case 185:
- case 186:
case 187:
case 188:
case 189:
case 190:
- case 215:
- case 221:
- case 226:
- case 227:
+ case 191:
+ case 192:
+ case 193:
+ case 194:
+ case 219:
+ case 225:
+ case 230:
+ case 231:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -26055,40 +26068,40 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sve_limm_mov (self, info, code, inst, errors);
case 165:
return aarch64_ext_sve_scale (self, info, code, inst, errors);
- case 177:
- case 178:
- case 179:
- return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
- case 180:
case 181:
case 182:
+ case 183:
+ return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
+ case 184:
+ case 185:
+ case 186:
return aarch64_ext_sve_shrimm (self, info, code, inst, errors);
- case 200:
- case 201:
- case 202:
- case 203:
case 204:
- return aarch64_ext_sve_quad_index (self, info, code, inst, errors);
+ case 205:
case 206:
- return aarch64_ext_sve_index (self, info, code, inst, errors);
case 207:
- case 209:
- return aarch64_ext_sve_reglist (self, info, code, inst, errors);
- case 212:
+ case 208:
+ return aarch64_ext_sve_quad_index (self, info, code, inst, errors);
+ case 210:
+ return aarch64_ext_sve_index (self, info, code, inst, errors);
+ case 211:
case 213:
+ return aarch64_ext_sve_reglist (self, info, code, inst, errors);
case 216:
- return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
case 217:
+ case 220:
+ return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 221:
return aarch64_ext_sme_za_array (self, info, code, inst, errors);
- case 218:
+ case 222:
return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
- case 219:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
- case 220:
- return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
case 223:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 224:
- case 225:
+ return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 227:
+ case 228:
+ case 229:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 65ce8d42b0a..b00b22aaaf7 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -192,13 +192,17 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_IMMEDIATE, "SVE_PATTERN_SCALED", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_pattern}, "an enumeration value such as POW2"},
{AARCH64_OPND_CLASS_IMMEDIATE, "SVE_PRFOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_prfop}, "an enumeration value such as PLDL1KEEP"},
{AARCH64_OPND_CLASS_PRED_REG, "SVE_Pd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pd}, "an SVE predicate register"},
+ {AARCH64_OPND_CLASS_PRED_REG, "SVE_PNd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pd}, "an SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_PRED_REG, "SVE_Pg3", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pg3}, "an SVE predicate register"},
{AARCH64_OPND_CLASS_PRED_REG, "SVE_Pg4_5", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pg4_5}, "an SVE predicate register"},
{AARCH64_OPND_CLASS_PRED_REG, "SVE_Pg4_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pg4_10}, "an SVE predicate register"},
+ {AARCH64_OPND_CLASS_PRED_REG, "SVE_PNg4_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pg4_10}, "an SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_PRED_REG, "SVE_Pg4_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pg4_16}, "an SVE predicate register"},
{AARCH64_OPND_CLASS_PRED_REG, "SVE_Pm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pm}, "an SVE predicate register"},
{AARCH64_OPND_CLASS_PRED_REG, "SVE_Pn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pn}, "an SVE predicate register"},
+ {AARCH64_OPND_CLASS_PRED_REG, "SVE_PNn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pn}, "an SVE predicate register"},
{AARCH64_OPND_CLASS_PRED_REG, "SVE_Pt", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pt}, "an SVE predicate register"},
+ {AARCH64_OPND_CLASS_PRED_REG, "SVE_PNt", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pt}, "an SVE predicate register"},
{AARCH64_OPND_CLASS_INT_REG, "SVE_Rm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Rm}, "an integer register or zero"},
{AARCH64_OPND_CLASS_INT_REG, "SVE_Rn_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Rn}, "an integer register or SP"},
{AARCH64_OPND_CLASS_IMMEDIATE, "SVE_SHLIMM_PRED", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_tszh,FLD_SVE_imm5}, "a shift-left immediate operand"},
@@ -330,16 +334,17 @@ static const unsigned op_enum_table [] =
413,
415,
1275,
- 1280,
+ 1276,
+ 1281,
1273,
1272,
- 1276,
- 1283,
- 1285,
+ 1277,
+ 1284,
1286,
- 1282,
- 1288,
1287,
+ 1283,
+ 1289,
+ 1288,
131,
};
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 4df1dc2cda8..1944b8fe87d 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -3679,6 +3679,19 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
aarch64_get_qualifier_name (opnd->qualifier)));
break;
+ case AARCH64_OPND_SVE_PNd:
+ case AARCH64_OPND_SVE_PNg4_10:
+ case AARCH64_OPND_SVE_PNn:
+ case AARCH64_OPND_SVE_PNt:
+ if (opnd->qualifier == AARCH64_OPND_QLF_NIL)
+ snprintf (buf, size, "%s",
+ style_reg (styler, "pn%d", opnd->reg.regno));
+ else
+ snprintf (buf, size, "%s",
+ style_reg (styler, "pn%d.%s", opnd->reg.regno,
+ aarch64_get_qualifier_name (opnd->qualifier)));
+ break;
+
case AARCH64_OPND_SVE_Za_5:
case AARCH64_OPND_SVE_Za_16:
case AARCH64_OPND_SVE_Zd:
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 75497ea6065..72f3c3ced88 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -4110,6 +4110,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
_SVE_INSN ("mov", 0x05202000, 0xff20fc00, sve_index, OP_MOV_Z_V, OP2 (SVE_Zd, SVE_VZn), OP_SVE_VV_BHSDQ, F_ALIAS | F_MISC, 0),
_SVE_INSN ("mov", 0x05203800, 0xff3ffc00, sve_size_bhsd, 0, OP2 (SVE_Zd, Rn_SP), OP_SVE_VR_BHSD, F_ALIAS, 0),
_SVE_INSN ("mov", 0x25804000, 0xfff0c210, sve_misc, OP_MOV_P_P, OP2 (SVE_Pd, SVE_Pn), OP_SVE_BB, F_ALIAS | F_MISC, 0),
+ _SVE_INSN ("mov", 0x25804000, 0xfff0c210, sve_misc, OP_MOV_PN_PN, OP2 (SVE_PNd, SVE_PNn), OP_SVE_BB, F_ALIAS | F_MISC, 0),
_SVE_INSN ("mov", 0x05202000, 0xff20fc00, sve_index, OP_MOV_Z_Zi, OP2 (SVE_Zd, SVE_Zn_INDEX), OP_SVE_VV_BHSDQ, F_ALIAS | F_MISC, 0),
_SVE_INSN ("mov", 0x05c00000, 0xfffc0000, sve_limm, 0, OP2 (SVE_Zd, SVE_LIMM_MOV), OP_SVE_VU_BHSD, F_ALIAS, 0),
_SVE_INSN ("mov", 0x2538c000, 0xff3fc000, sve_size_bhsd, 0, OP2 (SVE_Zd, SVE_ASIMM), OP_SVE_VU_BHSD, F_ALIAS, 0),
@@ -4583,6 +4584,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
_SVE_INSN ("ldnt1w", 0xa500c000, 0xffe0e000, sve_misc, 0, OP3 (SVE_ZtxN, SVE_Pg3, SVE_ADDR_RX_LSL2), OP_SVE_SZU, F_OD(1), 0),
_SVE_INSN ("ldnt1w", 0xa500e000, 0xfff0e000, sve_misc, 0, OP3 (SVE_ZtxN, SVE_Pg3, SVE_ADDR_RI_S4xVL), OP_SVE_SZU, F_OD(1), 0),
_SVE_INSN ("ldr", 0x85800000, 0xffc0e010, sve_misc, 0, OP2 (SVE_Pt, SVE_ADDR_RI_S9xVL), {}, 0, 0),
+ _SVE_INSN ("ldr", 0x85800000, 0xffc0e010, sve_misc, 0, OP2 (SVE_PNt, SVE_ADDR_RI_S9xVL), {}, 0, 0),
_SVE_INSN ("ldr", 0x85804000, 0xffc0e000, sve_misc, 0, OP2 (SVE_Zt, SVE_ADDR_RI_S9xVL), {}, 0, 0),
_SVE_INSN ("lsl", 0x04208c00, 0xff20fc00, sve_size_bhs, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVD_BHS, 0, 0),
_SVE_INSN ("lsl", 0x04209c00, 0xff20fc00, sve_shift_unpred, 0, OP3 (SVE_Zd, SVE_Zn, SVE_SHLIMM_UNPRED), OP_SVE_VVU_BHSD, 0, 0),
@@ -4619,6 +4621,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
_SVE_INSN ("orrs", 0x25c04000, 0xfff0c210, sve_misc, 0, OP4 (SVE_Pd, SVE_Pg4_10, SVE_Pn, SVE_Pm), OP_SVE_BZBB, F_HAS_ALIAS, 0),
_SVE_INSN ("orv", 0x04182000, 0xff3fe000, sve_size_bhsd, 0, OP3 (SVE_Vd, SVE_Pg3, SVE_Zn), OP_SVE_VUV_BHSD, 0, 0),
_SVE_INSN ("pfalse", 0x2518e400, 0xfffffff0, sve_misc, 0, OP1 (SVE_Pd), OP_SVE_B, 0, 0),
+ _SVE_INSN ("pfalse", 0x2518e400, 0xfffffff0, sve_misc, 0, OP1 (SVE_PNd), OP_SVE_B, 0, 0),
_SVE_INSN ("pfirst", 0x2558c000, 0xfffffe10, sve_misc, 0, OP3 (SVE_Pd, SVE_Pg4_5, SVE_Pd), OP_SVE_BUB, 0, 2),
_SVE_INSN ("pnext", 0x2519c400, 0xff3ffe10, sve_size_bhsd, 0, OP3 (SVE_Pd, SVE_Pg4_5, SVE_Pd), OP_SVE_VUV_BHSD, 0, 2),
_SVE_INSN ("prfb", 0x8400c000, 0xffe0e010, sve_misc, 0, OP3 (SVE_PRFOP, SVE_Pg3, SVE_ADDR_RX), {}, 0, 0),
@@ -4800,6 +4803,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
_SVE_INSN ("stnt1w", 0xe5006000, 0xffe0e000, sve_misc, 0, OP3 (SVE_ZtxN, SVE_Pg3, SVE_ADDR_RX_LSL2), OP_SVE_SUU, F_OD(1), 0),
_SVE_INSN ("stnt1w", 0xe510e000, 0xfff0e000, sve_misc, 0, OP3 (SVE_ZtxN, SVE_Pg3, SVE_ADDR_RI_S4xVL), OP_SVE_SUU, F_OD(1), 0),
_SVE_INSN ("str", 0xe5800000, 0xffc0e010, sve_misc, 0, OP2 (SVE_Pt, SVE_ADDR_RI_S9xVL), {}, 0, 0),
+ _SVE_INSN ("str", 0xe5800000, 0xffc0e010, sve_misc, 0, OP2 (SVE_PNt, SVE_ADDR_RI_S9xVL), {}, 0, 0),
_SVE_INSN ("str", 0xe5804000, 0xffc0e000, sve_misc, 0, OP2 (SVE_Zt, SVE_ADDR_RI_S9xVL), {}, 0, 0),
_SVE_INSN ("sub", 0x04200400, 0xff20fc00, sve_size_bhsd, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
_SVE_INSNC ("sub", 0x2521c000, 0xff3fc000, sve_size_bhsd, 0, OP3 (SVE_Zd, SVE_Zd, SVE_AIMM), OP_SVE_VVU_BHSD, 0, C_SCAN_MOVPRFX, 1),
@@ -5272,6 +5276,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME_INSNC ("sclamp", 0x4400c000, 0xff20fc00, sve_size_bhsd, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, C_SCAN_MOVPRFX, 0),
SME_INSNC ("uclamp", 0x4400c400, 0xff20fc00, sve_size_bhsd, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, C_SCAN_MOVPRFX, 0),
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_Pd, SVE_Pg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
+ SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_PNd, SVE_PNg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
/* SIMD Dot Product (optional in v8.2-A). */
DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
@@ -5817,20 +5822,28 @@ const struct aarch64_opcode aarch64_opcode_table[] =
"an enumeration value such as PLDL1KEEP") \
Y(PRED_REG, regno, "SVE_Pd", 0, F(FLD_SVE_Pd), \
"an SVE predicate register") \
+ Y(PRED_REG, regno, "SVE_PNd", 0, F(FLD_SVE_Pd), \
+ "an SVE predicate-as-counter register") \
Y(PRED_REG, regno, "SVE_Pg3", 0, F(FLD_SVE_Pg3), \
"an SVE predicate register") \
Y(PRED_REG, regno, "SVE_Pg4_5", 0, F(FLD_SVE_Pg4_5), \
"an SVE predicate register") \
Y(PRED_REG, regno, "SVE_Pg4_10", 0, F(FLD_SVE_Pg4_10), \
"an SVE predicate register") \
+ Y(PRED_REG, regno, "SVE_PNg4_10", 0, F(FLD_SVE_Pg4_10), \
+ "an SVE predicate-as-counter register") \
Y(PRED_REG, regno, "SVE_Pg4_16", 0, F(FLD_SVE_Pg4_16), \
"an SVE predicate register") \
Y(PRED_REG, regno, "SVE_Pm", 0, F(FLD_SVE_Pm), \
"an SVE predicate register") \
Y(PRED_REG, regno, "SVE_Pn", 0, F(FLD_SVE_Pn), \
"an SVE predicate register") \
+ Y(PRED_REG, regno, "SVE_PNn", 0, F(FLD_SVE_Pn), \
+ "an SVE predicate register") \
Y(PRED_REG, regno, "SVE_Pt", 0, F(FLD_SVE_Pt), \
"an SVE predicate register") \
+ Y(PRED_REG, regno, "SVE_PNt", 0, F(FLD_SVE_Pt), \
+ "an SVE predicate register") \
Y(INT_REG, regno, "SVE_Rm", 0, F(FLD_SVE_Rm), \
"an integer register or zero") \
Y(INT_REG, regno, "SVE_Rn_SP", OPD_F_MAYBE_SP, F(FLD_SVE_Rn), \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 07/31] aarch64: Add the SME2 MOVA instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (5 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 06/31] aarch64: Add support for predicate-as-counter registers Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 08/31] aarch64: Add the SME2 multivector LD1 and ST1 instructions Richard Sandiford
` (25 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
SME2 defines new MOVA instructions for moving multiple registers
to and from ZA. As with SME, the instructions are also available
through MOV aliases.
One notable feature of these instructions (and many other SME2
instructions) is that some register lists must start at a multiple
of the list's size. The patch uses the general error "start register
out of range" when this constraint isn't met, rather than an error
specifically about multiples. This ensures that the error is
consistent between these simple consecutive lists and later
strided lists, for which the requirements aren't a simple multiple.
---
gas/config/tc-aarch64.c | 8 +
gas/testsuite/gas/aarch64/legacy_reg_names.l | 2 +-
gas/testsuite/gas/aarch64/sme-3-illegal.l | 2 +-
gas/testsuite/gas/aarch64/sme2-1-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-1-invalid.l | 327 +++++++++
gas/testsuite/gas/aarch64/sme2-1-invalid.s | 323 +++++++++
gas/testsuite/gas/aarch64/sme2-1-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-1-noarch.l | 289 ++++++++
gas/testsuite/gas/aarch64/sme2-1.d | 305 ++++++++
gas/testsuite/gas/aarch64/sme2-1.s | 338 +++++++++
include/opcode/aarch64.h | 10 +
opcodes/aarch64-asm-2.c | 34 +-
opcodes/aarch64-asm.c | 50 +-
opcodes/aarch64-asm.h | 2 +
opcodes/aarch64-dis-2.c | 702 +++++++++++--------
opcodes/aarch64-dis.c | 60 +-
opcodes/aarch64-dis.h | 2 +
opcodes/aarch64-opc-2.c | 8 +
opcodes/aarch64-opc.c | 79 ++-
opcodes/aarch64-opc.h | 6 +
opcodes/aarch64-tbl.h | 43 ++
21 files changed, 2282 insertions(+), 314 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-1-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-1-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-1-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-1.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-1.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 8d5cc5194de..bf9771d1010 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6712,6 +6712,10 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_ZnxN:
case AARCH64_OPND_SVE_ZtxN:
+ case AARCH64_OPND_SME_Zdnx2:
+ case AARCH64_OPND_SME_Zdnx4:
+ case AARCH64_OPND_SME_Znx2:
+ case AARCH64_OPND_SME_Znx4:
reg_type = REG_TYPE_Z;
goto vector_reg_list;
@@ -7708,7 +7712,9 @@ parse_operands (char *str, const aarch64_opcode *opcode)
break;
case AARCH64_OPND_SME_ZA_HV_idx_src:
+ case AARCH64_OPND_SME_ZA_HV_idx_srcxN:
case AARCH64_OPND_SME_ZA_HV_idx_dest:
+ case AARCH64_OPND_SME_ZA_HV_idx_destxN:
case AARCH64_OPND_SME_ZA_HV_idx_ldstr:
if (operands[i] == AARCH64_OPND_SME_ZA_HV_idx_ldstr
? !parse_sme_za_hv_tiles_operand_with_braces (&str,
@@ -7727,6 +7733,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->imm.value = val;
break;
+ case AARCH64_OPND_SME_ZA_array_off3_0:
+ case AARCH64_OPND_SME_ZA_array_off3_5:
case AARCH64_OPND_SME_ZA_array_off4:
if (!parse_dual_indexed_reg (&str, REG_TYPE_ZA,
&info->indexed_za, &qualifier, 0))
diff --git a/gas/testsuite/gas/aarch64/legacy_reg_names.l b/gas/testsuite/gas/aarch64/legacy_reg_names.l
index f3dde54e418..ca5f86cdfe9 100644
--- a/gas/testsuite/gas/aarch64/legacy_reg_names.l
+++ b/gas/testsuite/gas/aarch64/legacy_reg_names.l
@@ -1,4 +1,4 @@
[^:]*: Assembler messages:
[^:]*:5: Error: indexed vector register expected at operand 1 -- `dup v0.b,v1.b\[7\]'
-[^:]*:6: Error: expected a register at operand 1 -- `mov r0.w,r1.w'
+[^:]*:6: Error: expected a register or register list at operand 1 -- `mov r0.w,r1.w'
[^:]*:7: Error: expected an Advanced SIMD vector register at operand 2 -- `dup s0,s1\[3\]'
diff --git a/gas/testsuite/gas/aarch64/sme-3-illegal.l b/gas/testsuite/gas/aarch64/sme-3-illegal.l
index f5fb169b78a..dd1bf7922f7 100644
--- a/gas/testsuite/gas/aarch64/sme-3-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-3-illegal.l
@@ -3,7 +3,7 @@
[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,#0\],p0/m,z0.h'
[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,#0\],p0/m,z0.s'
[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,#0\],p0/m,z0.d'
-[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `mova za16v\.q\[w12\],p0/m,z0.q'
+[^:]*:[0-9]+: Error: expected a register or register list at operand 1 -- `mova za16v\.q\[w12\],p0/m,z0.q'
[^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `mova za0v\.b\[w15,#16\],p7/m,z31.b'
[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za1v\.h\[w15,#8\],p7/m,z31.h'
[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `mova za3v\.s\[w15,#4\],p7/m,z31.s'
diff --git a/gas/testsuite/gas/aarch64/sme2-1-invalid.d b/gas/testsuite/gas/aarch64/sme2-1-invalid.d
new file mode 100644
index 00000000000..5ca0674ab0b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-1-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-1-invalid.s
+#error_output: sme2-1-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-1-invalid.l
new file mode 100644
index 00000000000..d8d2d77c0a4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-1-invalid.l
@@ -0,0 +1,327 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `mov 0,za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mov {z0\.b-z1\.b},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov {z0\.d-z1\.d},za\.q\[w8,0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov {z0\.d-z1\.d}, za\.d\[w8, 0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: mov {z0\.b-z1\.b}, za\.b\[w8, 0\]
+[^ :]+:[0-9]+: Info: mov {z0\.h-z1\.h}, za\.h\[w8, 0\]
+[^ :]+:[0-9]+: Info: mov {z0\.s-z1\.s}, za\.s\[w8, 0\]
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w7,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w8,-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w8,8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mov {z0\.d-z3\.d},za\.q\[w8,0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mov {z0\.d-z3\.d}, za\.d\[w8, 0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: mov {z0\.b-z3\.b}, za\.b\[w8, 0\]
+[^ :]+:[0-9]+: Info: mov {z0\.h-z3\.h}, za\.h\[w8, 0\]
+[^ :]+:[0-9]+: Info: mov {z0\.s-z3\.s}, za\.s\[w8, 0\]
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z4\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.d-z5\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.d-z6\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w7,0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w8,-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w8,8\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.b-z2\.b},za0h\.b\[w8,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z1\.b},za1h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z1\.b},za1v\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w11,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w16,0:1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,-2:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,15:16\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,16:17\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.b-z1\.b},za0\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.h-z2\.h},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z1\.h},za2h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z1\.h},za2v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w11,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w16,0:1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,-2:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,7:8\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,8:9\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.h-z1\.h},za0\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.s-z2\.s},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z1\.s},za4h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z1\.s},za4v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w11,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w16,0:1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,-2:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,3:4\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,4:5\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.s-z1\.s},za0\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z1\.d},za8h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z1\.d},za8v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w11,0:1\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w16,0:1\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,-2:-1\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,2:3\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.d-z1\.d},za0\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.b-z4\.b},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.b-z5\.b},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.b-z6\.b},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z3\.b},za1h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z3\.b},za1v\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w11,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w16,0:3\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,-4:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,1:4\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,2:5\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,3:6\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,13:16\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,14:17\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,15:18\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,16:19\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.b-z3\.b},za0\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.h-z2\.h},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.h-z5\.h},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.h-z6\.h},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z3\.h},za2h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z3\.h},za2v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w11,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w16,0:3\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,-4:-1\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,1:2\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,5:8\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,6:9\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,7:10\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,8:11\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.h-z3\.h},za0\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.s-z2\.s},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.s-z5\.s},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.s-z6\.s},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z3\.s},za4h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z3\.s},za4v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w11,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w16,0:3\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,-4:-1\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,1:4\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,2:5\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,3:6\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,4:7\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.s-z3\.s},za0\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.d-z5\.d},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.d-z6\.d},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z3\.d},za8h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z3\.d},za8v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w11,0:3\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w16,0:3\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,-4:-1\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,1:4\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,2:5\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,3:6\]'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,4:7\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3,vgx2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3,vgx4\]'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.d-z3\.d},za0\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `mova 0,za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mova {z0\.b-z1\.b},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{z0\.q-z1\.q}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mova za\.b\[w8, 0\], {z0\.b-z1\.b}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: mova za\.h\[w8, 0\], {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Info: mova za\.s\[w8, 0\], {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: mova za\.d\[w8, 0\], {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z1\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{z0\.q-z3\.q}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: mova za\.b\[w8, 0\], {z0\.b-z3\.b}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: mova za\.h\[w8, 0\], {z0\.h-z3\.h}
+[^ :]+:[0-9]+: Info: mova za\.s\[w8, 0\], {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Info: mova za\.d\[w8, 0\], {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z1\.d-z4\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z2\.d-z5\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z3\.d-z6\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w8,0:1\],{z1\.b-z2\.b}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-2:-1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:2\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:16\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:17\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx2\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx4\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:1\],{z1\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-2:-1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:8\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:9\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx2\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx4\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:1\],{z1\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-2:-1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:2\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:4\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:5\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx2\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx4\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:1\],{z1\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-2:-1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:2\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:3\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx2\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx4\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z1\.b-z4\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z2\.b-z5\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z3\.b-z6\.b}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-4:-1\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:4\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,2:5\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,3:6\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,13:16\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,14:17\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:18\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:19\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx2\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx4\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{z1\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{z2\.h-z5\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{z3\.h-z6\.h}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-4:-1\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,5:8\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,6:9\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:10\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:11\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx2\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx4\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{z1\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{z2\.s-z5\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{z3\.s-z6\.s}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-4:-1\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:4\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,2:5\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:6\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:7\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx2\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx4\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{z1\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{z2\.d-z5\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{z3\.d-z6\.d}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-4:-1\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:4\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:5\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,3:6\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,4:7\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx2\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx4\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:3\],{z0\.d-z3\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-1-invalid.s b/gas/testsuite/gas/aarch64/sme2-1-invalid.s
new file mode 100644
index 00000000000..36ee20f64f9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-1-invalid.s
@@ -0,0 +1,323 @@
+ mov 0, za.b[w8, 0]
+ mov { z0.b - z1.b }, 0
+
+ mov { z0.d - z1.d }, za.q[w8, 0]
+ mov { z1.d - z2.d }, za.d[w8, 0]
+ mov { z0.d - z1.d }, za.d[w7, 0]
+ mov { z0.d - z1.d }, za.d[w12, 0]
+ mov { z0.d - z1.d }, za.d[w8, -1]
+ mov { z0.d - z1.d }, za.d[w8, 8]
+
+ mov { z0.d - z3.d }, za.q[w8, 0]
+ mov { z1.d - z4.d }, za.d[w8, 0]
+ mov { z2.d - z5.d }, za.d[w8, 0]
+ mov { z3.d - z6.d }, za.d[w8, 0]
+ mov { z0.d - z3.d }, za.d[w7, 0]
+ mov { z0.d - z3.d }, za.d[w12, 0]
+ mov { z0.d - z3.d }, za.d[w8, -1]
+ mov { z0.d - z3.d }, za.d[w8, 8]
+
+ mov { z1.b - z2.b }, za0h.b[w8, 0:1]
+ mov { z0.b - z1.b }, za1h.b[w12, 0:1]
+ mov { z0.b - z1.b }, za1v.b[w12, 0:1]
+ mov { z0.b - z1.b }, za0h.b[w11, 0:1]
+ mov { z0.b - z1.b }, za0h.b[w16, 0:1]
+ mov { z0.b - z1.b }, za0h.b[w12, -2:-1]
+ mov { z0.b - z1.b }, za0h.b[w12, 1:2]
+ mov { z0.b - z1.b }, za0h.b[w12, 15:16]
+ mov { z0.b - z1.b }, za0h.b[w12, 16:17]
+ mov { z0.b - z1.b }, za0h.b[w12, 0]
+ mov { z0.b - z1.b }, za0h.b[w12, 0:2]
+ mov { z0.b - z1.b }, za0h.b[w12, 0:3]
+ mov { z0.b - z1.b }, za0h.b[w12, 0:1, vgx2]
+ mov { z0.b - z1.b }, za0h.b[w12, 0:1, vgx4]
+ mov { z0.b - z1.b }, za0.b[w12, 0:1]
+
+ mov { z1.h - z2.h }, za0h.h[w12, 0:1]
+ mov { z0.h - z1.h }, za2h.h[w12, 0:1]
+ mov { z0.h - z1.h }, za2v.h[w12, 0:1]
+ mov { z0.h - z1.h }, za0h.h[w11, 0:1]
+ mov { z0.h - z1.h }, za0h.h[w16, 0:1]
+ mov { z0.h - z1.h }, za0h.h[w12, -2:-1]
+ mov { z0.h - z1.h }, za0h.h[w12, 1:2]
+ mov { z0.h - z1.h }, za0h.h[w12, 7:8]
+ mov { z0.h - z1.h }, za0h.h[w12, 8:9]
+ mov { z0.h - z1.h }, za0h.h[w12, 0]
+ mov { z0.h - z1.h }, za0h.h[w12, 0:2]
+ mov { z0.h - z1.h }, za0h.h[w12, 0:3]
+ mov { z0.h - z1.h }, za0h.h[w12, 0:1, vgx2]
+ mov { z0.h - z1.h }, za0h.h[w12, 0:1, vgx4]
+ mov { z0.h - z1.h }, za0.h[w12, 0:1]
+
+ mov { z1.s - z2.s }, za0h.s[w12, 0:1]
+ mov { z0.s - z1.s }, za4h.s[w12, 0:1]
+ mov { z0.s - z1.s }, za4v.s[w12, 0:1]
+ mov { z0.s - z1.s }, za0h.s[w11, 0:1]
+ mov { z0.s - z1.s }, za0h.s[w16, 0:1]
+ mov { z0.s - z1.s }, za0h.s[w12, -2:-1]
+ mov { z0.s - z1.s }, za0h.s[w12, 1:2]
+ mov { z0.s - z1.s }, za0h.s[w12, 3:4]
+ mov { z0.s - z1.s }, za0h.s[w12, 4:5]
+ mov { z0.s - z1.s }, za0h.s[w12, 0]
+ mov { z0.s - z1.s }, za0h.s[w12, 0:2]
+ mov { z0.s - z1.s }, za0h.s[w12, 0:3]
+ mov { z0.s - z1.s }, za0h.s[w12, 0:1, vgx2]
+ mov { z0.s - z1.s }, za0h.s[w12, 0:1, vgx4]
+ mov { z0.s - z1.s }, za0.s[w12, 0:1]
+
+ mov { z1.d - z2.d }, za0h.d[w12, 0:1]
+ mov { z0.d - z1.d }, za8h.d[w12, 0:1]
+ mov { z0.d - z1.d }, za8v.d[w12, 0:1]
+ mov { z0.d - z1.d }, za0h.d[w11, 0:1]
+ mov { z0.d - z1.d }, za0h.d[w16, 0:1]
+ mov { z0.d - z1.d }, za0h.d[w12, -2:-1]
+ mov { z0.d - z1.d }, za0h.d[w12, 1:2]
+ mov { z0.d - z1.d }, za0h.d[w12, 2:3]
+ mov { z0.d - z1.d }, za0h.d[w12, 0]
+ mov { z0.d - z1.d }, za0h.d[w12, 0:2]
+ mov { z0.d - z1.d }, za0h.d[w12, 0:3]
+ mov { z0.d - z1.d }, za0h.d[w12, 0:1, vgx2]
+ mov { z0.d - z1.d }, za0h.d[w12, 0:1, vgx4]
+ mov { z0.d - z1.d }, za0.d[w12, 0:1]
+
+ mov { z1.b - z4.b }, za0h.b[w12, 0:3]
+ mov { z2.b - z5.b }, za0h.b[w12, 0:3]
+ mov { z3.b - z6.b }, za0h.b[w12, 0:3]
+ mov { z0.b - z3.b }, za1h.b[w12, 0:3]
+ mov { z0.b - z3.b }, za1v.b[w12, 0:3]
+ mov { z0.b - z3.b }, za0h.b[w11, 0:3]
+ mov { z0.b - z3.b }, za0h.b[w16, 0:3]
+ mov { z0.b - z3.b }, za0h.b[w12, -4:-1]
+ mov { z0.b - z3.b }, za0h.b[w12, 1:4]
+ mov { z0.b - z3.b }, za0h.b[w12, 2:5]
+ mov { z0.b - z3.b }, za0h.b[w12, 3:6]
+ mov { z0.b - z3.b }, za0h.b[w12, 13:16]
+ mov { z0.b - z3.b }, za0h.b[w12, 14:17]
+ mov { z0.b - z3.b }, za0h.b[w12, 15:18]
+ mov { z0.b - z3.b }, za0h.b[w12, 16:19]
+ mov { z0.b - z3.b }, za0h.b[w12, 0]
+ mov { z0.b - z3.b }, za0h.b[w12, 0:1]
+ mov { z0.b - z3.b }, za0h.b[w12, 0:2]
+ mov { z0.b - z3.b }, za0h.b[w12, 0:3, vgx2]
+ mov { z0.b - z3.b }, za0h.b[w12, 0:3, vgx4]
+ mov { z0.b - z3.b }, za0.b[w12, 0:3]
+
+ mov { z1.h - z2.h }, za0h.h[w12, 0:3]
+ mov { z2.h - z5.h }, za0h.h[w12, 0:3]
+ mov { z3.h - z6.h }, za0h.h[w12, 0:3]
+ mov { z0.h - z3.h }, za2h.h[w12, 0:3]
+ mov { z0.h - z3.h }, za2v.h[w12, 0:3]
+ mov { z0.h - z3.h }, za0h.h[w11, 0:3]
+ mov { z0.h - z3.h }, za0h.h[w16, 0:3]
+ mov { z0.h - z3.h }, za0h.h[w12, -4:-1]
+ mov { z0.h - z3.h }, za0h.h[w12, 1:2]
+ mov { z0.h - z3.h }, za0h.h[w12, 5:8]
+ mov { z0.h - z3.h }, za0h.h[w12, 6:9]
+ mov { z0.h - z3.h }, za0h.h[w12, 7:10]
+ mov { z0.h - z3.h }, za0h.h[w12, 8:11]
+ mov { z0.h - z3.h }, za0h.h[w12, 0]
+ mov { z0.h - z3.h }, za0h.h[w12, 0:1]
+ mov { z0.h - z3.h }, za0h.h[w12, 0:2]
+ mov { z0.h - z3.h }, za0h.h[w12, 0:3, vgx2]
+ mov { z0.h - z3.h }, za0h.h[w12, 0:3, vgx4]
+ mov { z0.h - z3.h }, za0.h[w12, 0:3]
+
+ mov { z1.s - z2.s }, za0h.s[w12, 0:3]
+ mov { z2.s - z5.s }, za0h.s[w12, 0:3]
+ mov { z3.s - z6.s }, za0h.s[w12, 0:3]
+ mov { z0.s - z3.s }, za4h.s[w12, 0:3]
+ mov { z0.s - z3.s }, za4v.s[w12, 0:3]
+ mov { z0.s - z3.s }, za0h.s[w11, 0:3]
+ mov { z0.s - z3.s }, za0h.s[w16, 0:3]
+ mov { z0.s - z3.s }, za0h.s[w12, -4:-1]
+ mov { z0.s - z3.s }, za0h.s[w12, 1:4]
+ mov { z0.s - z3.s }, za0h.s[w12, 2:5]
+ mov { z0.s - z3.s }, za0h.s[w12, 3:6]
+ mov { z0.s - z3.s }, za0h.s[w12, 4:7]
+ mov { z0.s - z3.s }, za0h.s[w12, 0]
+ mov { z0.s - z3.s }, za0h.s[w12, 0:1]
+ mov { z0.s - z3.s }, za0h.s[w12, 0:2]
+ mov { z0.s - z3.s }, za0h.s[w12, 0:3, vgx2]
+ mov { z0.s - z3.s }, za0h.s[w12, 0:3, vgx4]
+ mov { z0.s - z3.s }, za0.s[w12, 0:3]
+
+ mov { z1.d - z2.d }, za0h.d[w12, 0:3]
+ mov { z2.d - z5.d }, za0h.d[w12, 0:3]
+ mov { z3.d - z6.d }, za0h.d[w12, 0:3]
+ mov { z0.d - z3.d }, za8h.d[w12, 0:3]
+ mov { z0.d - z3.d }, za8v.d[w12, 0:3]
+ mov { z0.d - z3.d }, za0h.d[w11, 0:3]
+ mov { z0.d - z3.d }, za0h.d[w16, 0:3]
+ mov { z0.d - z3.d }, za0h.d[w12, -4:-1]
+ mov { z0.d - z3.d }, za0h.d[w12, 1:4]
+ mov { z0.d - z3.d }, za0h.d[w12, 2:5]
+ mov { z0.d - z3.d }, za0h.d[w12, 3:6]
+ mov { z0.d - z3.d }, za0h.d[w12, 4:7]
+ mov { z0.d - z3.d }, za0h.d[w12, 0]
+ mov { z0.d - z3.d }, za0h.d[w12, 0:1]
+ mov { z0.d - z3.d }, za0h.d[w12, 0:2]
+ mov { z0.d - z3.d }, za0h.d[w12, 0:3, vgx2]
+ mov { z0.d - z3.d }, za0h.d[w12, 0:3, vgx4]
+ mov { z0.d - z3.d }, za0.d[w12, 0:3]
+
+ mova 0, za.b[w8, 0]
+ mova { z0.b - z1.b }, 0
+
+ mova za.q[w8, 0], { z0.q - z1.q }
+ mova za.d[w7, 0], { z0.d - z1.d }
+ mova za.d[w12, 0], { z0.d - z1.d }
+ mova za.d[w8, -1], { z0.d - z1.d }
+ mova za.d[w8, 8], { z0.d - z1.d }
+ mova za.d[w8, 0], { z1.d - z2.d }
+
+ mova za.q[w8, 0], { z0.q - z3.q }
+ mova za.d[w7, 0], { z0.d - z3.d }
+ mova za.d[w12, 0], { z0.d - z3.d }
+ mova za.d[w8, -1], { z0.d - z3.d }
+ mova za.d[w8, 8], { z0.d - z3.d }
+ mova za.d[w8, 0], { z1.d - z4.d }
+ mova za.d[w8, 0], { z2.d - z5.d }
+ mova za.d[w8, 0], { z3.d - z6.d }
+
+ mova za0h.b[w8, 0:1], { z1.b - z2.b }
+ mova za1h.b[w12, 0:1], { z0.b - z1.b }
+ mova za1v.b[w12, 0:1], { z0.b - z1.b }
+ mova za0h.b[w11, 0:1], { z0.b - z1.b }
+ mova za0h.b[w16, 0:1], { z0.b - z1.b }
+ mova za0h.b[w12, -2:-1], { z0.b - z1.b }
+ mova za0h.b[w12, 1:2], { z0.b - z1.b }
+ mova za0h.b[w12, 15:16], { z0.b - z1.b }
+ mova za0h.b[w12, 16:17], { z0.b - z1.b }
+ mova za0h.b[w12, 0], { z0.b - z1.b }
+ mova za0h.b[w12, 0:2], { z0.b - z1.b }
+ mova za0h.b[w12, 0:3], { z0.b - z1.b }
+ mova za0h.b[w12, 0:1, vgx2], { z0.b - z1.b }
+ mova za0h.b[w12, 0:1, vgx4], { z0.b - z1.b }
+ mova za0.b[w12, 0:1], { z0.b - z1.b }
+
+ mova za0h.h[w12, 0:1], { z1.h - z2.h }
+ mova za2h.h[w12, 0:1], { z0.h - z1.h }
+ mova za2v.h[w12, 0:1], { z0.h - z1.h }
+ mova za0h.h[w11, 0:1], { z0.h - z1.h }
+ mova za0h.h[w16, 0:1], { z0.h - z1.h }
+ mova za0h.h[w12, -2:-1], { z0.h - z1.h }
+ mova za0h.h[w12, 1:2], { z0.h - z1.h }
+ mova za0h.h[w12, 7:8], { z0.h - z1.h }
+ mova za0h.h[w12, 8:9], { z0.h - z1.h }
+ mova za0h.h[w12, 0], { z0.h - z1.h }
+ mova za0h.h[w12, 0:2], { z0.h - z1.h }
+ mova za0h.h[w12, 0:3], { z0.h - z1.h }
+ mova za0h.h[w12, 0:1, vgx2], { z0.h - z1.h }
+ mova za0h.h[w12, 0:1, vgx4], { z0.h - z1.h }
+ mova za0.h[w12, 0:1], { z0.h - z1.h }
+
+ mova za0h.s[w12, 0:1], { z1.s - z2.s }
+ mova za4h.s[w12, 0:1], { z0.s - z1.s }
+ mova za4v.s[w12, 0:1], { z0.s - z1.s }
+ mova za0h.s[w11, 0:1], { z0.s - z1.s }
+ mova za0h.s[w16, 0:1], { z0.s - z1.s }
+ mova za0h.s[w12, -2:-1], { z0.s - z1.s }
+ mova za0h.s[w12, 1:2], { z0.s - z1.s }
+ mova za0h.s[w12, 3:4], { z0.s - z1.s }
+ mova za0h.s[w12, 4:5], { z0.s - z1.s }
+ mova za0h.s[w12, 0], { z0.s - z1.s }
+ mova za0h.s[w12, 0:2], { z0.s - z1.s }
+ mova za0h.s[w12, 0:3], { z0.s - z1.s }
+ mova za0h.s[w12, 0:1, vgx2], { z0.s - z1.s }
+ mova za0h.s[w12, 0:1, vgx4], { z0.s - z1.s }
+ mova za0.s[w12, 0:1], { z0.s - z1.s }
+
+ mova za0h.d[w12, 0:1], { z1.d - z2.d }
+ mova za8h.d[w12, 0:1], { z0.d - z1.d }
+ mova za8v.d[w12, 0:1], { z0.d - z1.d }
+ mova za0h.d[w11, 0:1], { z0.d - z1.d }
+ mova za0h.d[w16, 0:1], { z0.d - z1.d }
+ mova za0h.d[w12, -2:-1], { z0.d - z1.d }
+ mova za0h.d[w12, 1:2], { z0.d - z1.d }
+ mova za0h.d[w12, 2:3], { z0.d - z1.d }
+ mova za0h.d[w12, 0], { z0.d - z1.d }
+ mova za0h.d[w12, 0:2], { z0.d - z1.d }
+ mova za0h.d[w12, 0:3], { z0.d - z1.d }
+ mova za0h.d[w12, 0:1, vgx2], { z0.d - z1.d }
+ mova za0h.d[w12, 0:1, vgx4], { z0.d - z1.d }
+ mova za0.d[w12, 0:1], { z0.d - z1.d }
+
+ mova za0h.b[w12, 0:3], { z1.b - z4.b }
+ mova za0h.b[w12, 0:3], { z2.b - z5.b }
+ mova za0h.b[w12, 0:3], { z3.b - z6.b }
+ mova za1h.b[w12, 0:3], { z0.b - z3.b }
+ mova za1v.b[w12, 0:3], { z0.b - z3.b }
+ mova za0h.b[w11, 0:3], { z0.b - z3.b }
+ mova za0h.b[w16, 0:3], { z0.b - z3.b }
+ mova za0h.b[w12, -4:-1], { z0.b - z3.b }
+ mova za0h.b[w12, 1:4], { z0.b - z3.b }
+ mova za0h.b[w12, 2:5], { z0.b - z3.b }
+ mova za0h.b[w12, 3:6], { z0.b - z3.b }
+ mova za0h.b[w12, 13:16], { z0.b - z3.b }
+ mova za0h.b[w12, 14:17], { z0.b - z3.b }
+ mova za0h.b[w12, 15:18], { z0.b - z3.b }
+ mova za0h.b[w12, 16:19], { z0.b - z3.b }
+ mova za0h.b[w12, 0], { z0.b - z3.b }
+ mova za0h.b[w12, 0:1], { z0.b - z3.b }
+ mova za0h.b[w12, 0:2], { z0.b - z3.b }
+ mova za0h.b[w12, 0:3, vgx2], { z0.b - z3.b }
+ mova za0h.b[w12, 0:3, vgx4], { z0.b - z3.b }
+ mova za0.b[w12, 0:3], { z0.b - z3.b }
+
+ mova za0h.h[w12, 0:3], { z1.h - z2.h }
+ mova za0h.h[w12, 0:3], { z2.h - z5.h }
+ mova za0h.h[w12, 0:3], { z3.h - z6.h }
+ mova za2h.h[w12, 0:3], { z0.h - z3.h }
+ mova za2v.h[w12, 0:3], { z0.h - z3.h }
+ mova za0h.h[w11, 0:3], { z0.h - z3.h }
+ mova za0h.h[w16, 0:3], { z0.h - z3.h }
+ mova za0h.h[w12, -4:-1], { z0.h - z3.h }
+ mova za0h.h[w12, 1:2], { z0.h - z3.h }
+ mova za0h.h[w12, 5:8], { z0.h - z3.h }
+ mova za0h.h[w12, 6:9], { z0.h - z3.h }
+ mova za0h.h[w12, 7:10], { z0.h - z3.h }
+ mova za0h.h[w12, 8:11], { z0.h - z3.h }
+ mova za0h.h[w12, 0], { z0.h - z3.h }
+ mova za0h.h[w12, 0:1], { z0.h - z3.h }
+ mova za0h.h[w12, 0:2], { z0.h - z3.h }
+ mova za0h.h[w12, 0:3, vgx2], { z0.h - z3.h }
+ mova za0h.h[w12, 0:3, vgx4], { z0.h - z3.h }
+ mova za0.h[w12, 0:3], { z0.h - z3.h }
+
+ mova za0h.s[w12, 0:3], { z1.s - z2.s }
+ mova za0h.s[w12, 0:3], { z2.s - z5.s }
+ mova za0h.s[w12, 0:3], { z3.s - z6.s }
+ mova za4h.s[w12, 0:3], { z0.s - z3.s }
+ mova za4v.s[w12, 0:3], { z0.s - z3.s }
+ mova za0h.s[w11, 0:3], { z0.s - z3.s }
+ mova za0h.s[w16, 0:3], { z0.s - z3.s }
+ mova za0h.s[w12, -4:-1], { z0.s - z3.s }
+ mova za0h.s[w12, 1:4], { z0.s - z3.s }
+ mova za0h.s[w12, 2:5], { z0.s - z3.s }
+ mova za0h.s[w12, 3:6], { z0.s - z3.s }
+ mova za0h.s[w12, 4:7], { z0.s - z3.s }
+ mova za0h.s[w12, 0], { z0.s - z3.s }
+ mova za0h.s[w12, 0:1], { z0.s - z3.s }
+ mova za0h.s[w12, 0:2], { z0.s - z3.s }
+ mova za0h.s[w12, 0:3, vgx2], { z0.s - z3.s }
+ mova za0h.s[w12, 0:3, vgx4], { z0.s - z3.s }
+ mova za0.s[w12, 0:3], { z0.s - z3.s }
+
+ mova za0h.d[w12, 0:3], { z1.d - z2.d }
+ mova za0h.d[w12, 0:3], { z2.d - z5.d }
+ mova za0h.d[w12, 0:3], { z3.d - z6.d }
+ mova za8h.d[w12, 0:3], { z0.d - z3.d }
+ mova za8v.d[w12, 0:3], { z0.d - z3.d }
+ mova za0h.d[w11, 0:3], { z0.d - z3.d }
+ mova za0h.d[w16, 0:3], { z0.d - z3.d }
+ mova za0h.d[w12, -4:-1], { z0.d - z3.d }
+ mova za0h.d[w12, 1:4], { z0.d - z3.d }
+ mova za0h.d[w12, 2:5], { z0.d - z3.d }
+ mova za0h.d[w12, 3:6], { z0.d - z3.d }
+ mova za0h.d[w12, 4:7], { z0.d - z3.d }
+ mova za0h.d[w12, 0], { z0.d - z3.d }
+ mova za0h.d[w12, 0:1], { z0.d - z3.d }
+ mova za0h.d[w12, 0:2], { z0.d - z3.d }
+ mova za0h.d[w12, 0:3, vgx2], { z0.d - z3.d }
+ mova za0h.d[w12, 0:3, vgx4], { z0.d - z3.d }
+ mova za0.d[w12, 0:3], { z0.d - z3.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-1-noarch.d b/gas/testsuite/gas/aarch64/sme2-1-noarch.d
new file mode 100644
index 00000000000..cb6665108da
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-1-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-1.s
+#error_output: sme2-1-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-1-noarch.l
new file mode 100644
index 00000000000..9d9fd083d7c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-1-noarch.l
@@ -0,0 +1,289 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za\.h\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za\.s\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.d-z31\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w11,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w8,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za\.h\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za\.s\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.d-z31\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w11,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w8,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.b-z31\.b},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0v\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w12,14:15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z8\.b-z9\.b},za0h\.b\[w14,6:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.h-z31\.h},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za1h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za1v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w12,6:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z10\.h-z11\.h},za0h\.h\[w13,2:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.s-z31\.s},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za3h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za3v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w12,2:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z18\.s-z19\.s},za2h\.s\[w14,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.d-z31\.d},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za7h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za7v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0h\.d\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z22\.d-z23\.d},za6h\.d\[w13,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.b-z31\.b},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0v\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w12,12:15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z12\.b-z15\.b},za0h\.b\[w14,8:11\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.h-z31\.h},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za1h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za1v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w12,4:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z16\.h-z19\.h},za0h\.h\[w13,4:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.s-z31\.s},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za3h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za3v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0h\.s\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z20\.s-z23\.s},za2h\.s\[w13,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.d-z31\.d},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za7h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za7v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0h\.d\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov {z24\.d-z27\.d},za5h\.d\[w13,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w9,5\],{z2\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w10,1\],{z20\.d-z23\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,14:15\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,6:7\],{z8\.b-z9\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,6:7\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,2:3\],{z10\.h-z11\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,2:3\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w14,0:1\],{z18\.s-z19\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za6h\.d\[w13,0:1\],{z22\.d-z23\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,12:15\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,8:11\],{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,4:7\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,4:7\],{z16\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w13,0:3\],{z20\.s-z23\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mov za5h\.d\[w13,0:3\],{z24\.d-z27\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za\.h\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za\.s\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.d-z31\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w11,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w8,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za\.b\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za\.h\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za\.s\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.d-z31\.d},za\.d\[w8,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w11,0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w8,7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.b-z31\.b},za0h\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0v\.b\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w12,14:15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z8\.b-z9\.b},za0h\.b\[w14,6:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.h-z31\.h},za0h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za1h\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za1v\.h\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w12,6:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z10\.h-z11\.h},za0h\.h\[w13,2:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.s-z31\.s},za0h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za3h\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za3v\.s\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w12,2:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z18\.s-z19\.s},za2h\.s\[w14,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.d-z31\.d},za0h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za7h\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za7v\.d\[w12,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0h\.d\[w15,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z22\.d-z23\.d},za6h\.d\[w13,0:1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.b-z31\.b},za0h\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0v\.b\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w12,12:15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z12\.b-z15\.b},za0h\.b\[w14,8:11\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.h-z31\.h},za0h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za1h\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za1v\.h\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w12,4:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z16\.h-z19\.h},za0h\.h\[w13,4:7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.s-z31\.s},za0h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za3h\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za3v\.s\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0h\.s\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z20\.s-z23\.s},za2h\.s\[w13,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.d-z31\.d},za0h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za7h\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za7v\.d\[w12,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0h\.d\[w15,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova {z24\.d-z27\.d},za5h\.d\[w13,0:3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w9,5\],{z2\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w10,1\],{z20\.d-z23\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:1\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,14:15\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,6:7\],{z8\.b-z9\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:1\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,6:7\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,2:3\],{z10\.h-z11\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,2:3\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w14,0:1\],{z18\.s-z19\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za6h\.d\[w13,0:1\],{z22\.d-z23\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:3\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,12:15\],{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,8:11\],{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:3\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,4:7\],{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,4:7\],{z16\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:3\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w13,0:3\],{z20\.s-z23\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:3\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `mova za5h\.d\[w13,0:3\],{z24\.d-z27\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-1.d b/gas/testsuite/gas/aarch64/sme2-1.d
new file mode 100644
index 00000000000..6fc248bb21f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-1.d
@@ -0,0 +1,305 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c0060800 mov {z0\.d-z1\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c0060800 mov {z0\.d-z1\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c0060800 mov {z0\.d-z1\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c0060800 mov {z0\.d-z1\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c006081e mov {z30\.d-z31\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c0066800 mov {z0\.d-z1\.d}, za\.d\[w11, 0, vgx2\]
+[^:]+: c00608e0 mov {z0\.d-z1\.d}, za\.d\[w8, 7, vgx2\]
+[^:]+: c0060c00 mov {z0\.d-z3\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0060c00 mov {z0\.d-z3\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0060c00 mov {z0\.d-z3\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0060c00 mov {z0\.d-z3\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0060c1c mov {z28\.d-z31\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0066c00 mov {z0\.d-z3\.d}, za\.d\[w11, 0, vgx4\]
+[^:]+: c0060ce0 mov {z0\.d-z3\.d}, za\.d\[w8, 7, vgx4\]
+[^:]+: c0060000 mov {z0\.b-z1\.b}, za0h\.b\[w12, 0:1\]
+[^:]+: c006001e mov {z30\.b-z31\.b}, za0h\.b\[w12, 0:1\]
+[^:]+: c0068000 mov {z0\.b-z1\.b}, za0v\.b\[w12, 0:1\]
+[^:]+: c0066000 mov {z0\.b-z1\.b}, za0h\.b\[w15, 0:1\]
+[^:]+: c00600e0 mov {z0\.b-z1\.b}, za0h\.b\[w12, 14:15\]
+[^:]+: c0064068 mov {z8\.b-z9\.b}, za0h\.b\[w14, 6:7\]
+[^:]+: c0460000 mov {z0\.h-z1\.h}, za0h\.h\[w12, 0:1\]
+[^:]+: c046001e mov {z30\.h-z31\.h}, za0h\.h\[w12, 0:1\]
+[^:]+: c0468000 mov {z0\.h-z1\.h}, za0v\.h\[w12, 0:1\]
+[^:]+: c0460080 mov {z0\.h-z1\.h}, za1h\.h\[w12, 0:1\]
+[^:]+: c0468080 mov {z0\.h-z1\.h}, za1v\.h\[w12, 0:1\]
+[^:]+: c0466000 mov {z0\.h-z1\.h}, za0h\.h\[w15, 0:1\]
+[^:]+: c0460060 mov {z0\.h-z1\.h}, za0h\.h\[w12, 6:7\]
+[^:]+: c046202a mov {z10\.h-z11\.h}, za0h\.h\[w13, 2:3\]
+[^:]+: c0860000 mov {z0\.s-z1\.s}, za0h\.s\[w12, 0:1\]
+[^:]+: c086001e mov {z30\.s-z31\.s}, za0h\.s\[w12, 0:1\]
+[^:]+: c0868000 mov {z0\.s-z1\.s}, za0v\.s\[w12, 0:1\]
+[^:]+: c08600c0 mov {z0\.s-z1\.s}, za3h\.s\[w12, 0:1\]
+[^:]+: c08680c0 mov {z0\.s-z1\.s}, za3v\.s\[w12, 0:1\]
+[^:]+: c0866000 mov {z0\.s-z1\.s}, za0h\.s\[w15, 0:1\]
+[^:]+: c0860020 mov {z0\.s-z1\.s}, za0h\.s\[w12, 2:3\]
+[^:]+: c0864092 mov {z18\.s-z19\.s}, za2h\.s\[w14, 0:1\]
+[^:]+: c0c60000 mov {z0\.d-z1\.d}, za0h\.d\[w12, 0:1\]
+[^:]+: c0c6001e mov {z30\.d-z31\.d}, za0h\.d\[w12, 0:1\]
+[^:]+: c0c68000 mov {z0\.d-z1\.d}, za0v\.d\[w12, 0:1\]
+[^:]+: c0c600e0 mov {z0\.d-z1\.d}, za7h\.d\[w12, 0:1\]
+[^:]+: c0c680e0 mov {z0\.d-z1\.d}, za7v\.d\[w12, 0:1\]
+[^:]+: c0c66000 mov {z0\.d-z1\.d}, za0h\.d\[w15, 0:1\]
+[^:]+: c0c620d6 mov {z22\.d-z23\.d}, za6h\.d\[w13, 0:1\]
+[^:]+: c0060400 mov {z0\.b-z3\.b}, za0h\.b\[w12, 0:3\]
+[^:]+: c006041c mov {z28\.b-z31\.b}, za0h\.b\[w12, 0:3\]
+[^:]+: c0068400 mov {z0\.b-z3\.b}, za0v\.b\[w12, 0:3\]
+[^:]+: c0066400 mov {z0\.b-z3\.b}, za0h\.b\[w15, 0:3\]
+[^:]+: c0060460 mov {z0\.b-z3\.b}, za0h\.b\[w12, 12:15\]
+[^:]+: c006444c mov {z12\.b-z15\.b}, za0h\.b\[w14, 8:11\]
+[^:]+: c0460400 mov {z0\.h-z3\.h}, za0h\.h\[w12, 0:3\]
+[^:]+: c046041c mov {z28\.h-z31\.h}, za0h\.h\[w12, 0:3\]
+[^:]+: c0468400 mov {z0\.h-z3\.h}, za0v\.h\[w12, 0:3\]
+[^:]+: c0460440 mov {z0\.h-z3\.h}, za1h\.h\[w12, 0:3\]
+[^:]+: c0468440 mov {z0\.h-z3\.h}, za1v\.h\[w12, 0:3\]
+[^:]+: c0466400 mov {z0\.h-z3\.h}, za0h\.h\[w15, 0:3\]
+[^:]+: c0460420 mov {z0\.h-z3\.h}, za0h\.h\[w12, 4:7\]
+[^:]+: c0462430 mov {z16\.h-z19\.h}, za0h\.h\[w13, 4:7\]
+[^:]+: c0860400 mov {z0\.s-z3\.s}, za0h\.s\[w12, 0:3\]
+[^:]+: c086041c mov {z28\.s-z31\.s}, za0h\.s\[w12, 0:3\]
+[^:]+: c0868400 mov {z0\.s-z3\.s}, za0v\.s\[w12, 0:3\]
+[^:]+: c0860460 mov {z0\.s-z3\.s}, za3h\.s\[w12, 0:3\]
+[^:]+: c0868460 mov {z0\.s-z3\.s}, za3v\.s\[w12, 0:3\]
+[^:]+: c0866400 mov {z0\.s-z3\.s}, za0h\.s\[w15, 0:3\]
+[^:]+: c0862454 mov {z20\.s-z23\.s}, za2h\.s\[w13, 0:3\]
+[^:]+: c0c60400 mov {z0\.d-z3\.d}, za0h\.d\[w12, 0:3\]
+[^:]+: c0c6041c mov {z28\.d-z31\.d}, za0h\.d\[w12, 0:3\]
+[^:]+: c0c68400 mov {z0\.d-z3\.d}, za0v\.d\[w12, 0:3\]
+[^:]+: c0c604e0 mov {z0\.d-z3\.d}, za7h\.d\[w12, 0:3\]
+[^:]+: c0c684e0 mov {z0\.d-z3\.d}, za7v\.d\[w12, 0:3\]
+[^:]+: c0c66400 mov {z0\.d-z3\.d}, za0h\.d\[w15, 0:3\]
+[^:]+: c0c624b8 mov {z24\.d-z27\.d}, za5h\.d\[w13, 0:3\]
+[^:]+: c0060480 \.inst 0xc0060480 ; undefined
+[^:]+: c00604e0 \.inst 0xc00604e0 ; undefined
+[^:]+: c0460480 \.inst 0xc0460480 ; undefined
+[^:]+: c04604e0 \.inst 0xc04604e0 ; undefined
+[^:]+: c0860480 \.inst 0xc0860480 ; undefined
+[^:]+: c08604e0 \.inst 0xc08604e0 ; undefined
+[^:]+: c0c60480 mov {z0\.d-z3\.d}, za4h\.d\[w12, 0:3\]
+[^:]+: c0c604e0 mov {z0\.d-z3\.d}, za7h\.d\[w12, 0:3\]
+[^:]+: c0040800 mov za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040800 mov za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040800 mov za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040800 mov za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0046800 mov za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040807 mov za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040bc0 mov za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}
+[^:]+: c0042845 mov za\.d\[w9, 5, vgx2\], {z2\.d-z3\.d}
+[^:]+: c0040c00 mov za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040c00 mov za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040c00 mov za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040c00 mov za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0046c00 mov za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040c07 mov za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040f80 mov za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}
+[^:]+: c0044e81 mov za\.d\[w10, 1, vgx4\], {z20\.d-z23\.d}
+[^:]+: c0040000 mov za0h\.b\[w12, 0:1\], {z0\.b-z1\.b}
+[^:]+: c0048000 mov za0v\.b\[w12, 0:1\], {z0\.b-z1\.b}
+[^:]+: c0046000 mov za0h\.b\[w15, 0:1\], {z0\.b-z1\.b}
+[^:]+: c0040007 mov za0h\.b\[w12, 14:15\], {z0\.b-z1\.b}
+[^:]+: c00403c0 mov za0h\.b\[w12, 0:1\], {z30\.b-z31\.b}
+[^:]+: c0044103 mov za0h\.b\[w14, 6:7\], {z8\.b-z9\.b}
+[^:]+: c0440000 mov za0h\.h\[w12, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0448000 mov za0v\.h\[w12, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0440004 mov za1h\.h\[w12, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0448004 mov za1v\.h\[w12, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0446000 mov za0h\.h\[w15, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0440003 mov za0h\.h\[w12, 6:7\], {z0\.h-z1\.h}
+[^:]+: c04403c0 mov za0h\.h\[w12, 0:1\], {z30\.h-z31\.h}
+[^:]+: c0442141 mov za0h\.h\[w13, 2:3\], {z10\.h-z11\.h}
+[^:]+: c0840000 mov za0h\.s\[w12, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0848000 mov za0v\.s\[w12, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0840006 mov za3h\.s\[w12, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0848006 mov za3v\.s\[w12, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0846000 mov za0h\.s\[w15, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0840001 mov za0h\.s\[w12, 2:3\], {z0\.s-z1\.s}
+[^:]+: c08403c0 mov za0h\.s\[w12, 0:1\], {z30\.s-z31\.s}
+[^:]+: c0844244 mov za2h\.s\[w14, 0:1\], {z18\.s-z19\.s}
+[^:]+: c0c40000 mov za0h\.d\[w12, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c48000 mov za0v\.d\[w12, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c40007 mov za7h\.d\[w12, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c48007 mov za7v\.d\[w12, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c46000 mov za0h\.d\[w15, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c403c0 mov za0h\.d\[w12, 0:1\], {z30\.d-z31\.d}
+[^:]+: c0c422c6 mov za6h\.d\[w13, 0:1\], {z22\.d-z23\.d}
+[^:]+: c0040400 mov za0h\.b\[w12, 0:3\], {z0\.b-z3\.b}
+[^:]+: c0048400 mov za0v\.b\[w12, 0:3\], {z0\.b-z3\.b}
+[^:]+: c0046400 mov za0h\.b\[w15, 0:3\], {z0\.b-z3\.b}
+[^:]+: c0040403 mov za0h\.b\[w12, 12:15\], {z0\.b-z3\.b}
+[^:]+: c0040780 mov za0h\.b\[w12, 0:3\], {z28\.b-z31\.b}
+[^:]+: c0044582 mov za0h\.b\[w14, 8:11\], {z12\.b-z15\.b}
+[^:]+: c0440400 mov za0h\.h\[w12, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0448400 mov za0v\.h\[w12, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0440402 mov za1h\.h\[w12, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0448402 mov za1v\.h\[w12, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0446400 mov za0h\.h\[w15, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0440401 mov za0h\.h\[w12, 4:7\], {z0\.h-z3\.h}
+[^:]+: c0440780 mov za0h\.h\[w12, 0:3\], {z28\.h-z31\.h}
+[^:]+: c0442601 mov za0h\.h\[w13, 4:7\], {z16\.h-z19\.h}
+[^:]+: c0840400 mov za0h\.s\[w12, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0848400 mov za0v\.s\[w12, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0840403 mov za3h\.s\[w12, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0848403 mov za3v\.s\[w12, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0846400 mov za0h\.s\[w15, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0840780 mov za0h\.s\[w12, 0:3\], {z28\.s-z31\.s}
+[^:]+: c0842682 mov za2h\.s\[w13, 0:3\], {z20\.s-z23\.s}
+[^:]+: c0c40400 mov za0h\.d\[w12, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c48400 mov za0v\.d\[w12, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c40407 mov za7h\.d\[w12, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c48407 mov za7v\.d\[w12, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c46400 mov za0h\.d\[w15, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c40780 mov za0h\.d\[w12, 0:3\], {z28\.d-z31\.d}
+[^:]+: c0c42705 mov za5h\.d\[w13, 0:3\], {z24\.d-z27\.d}
+[^:]+: c0060800 mov {z0\.d-z1\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c0060800 mov {z0\.d-z1\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c0060800 mov {z0\.d-z1\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c0060800 mov {z0\.d-z1\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c006081e mov {z30\.d-z31\.d}, za\.d\[w8, 0, vgx2\]
+[^:]+: c0066800 mov {z0\.d-z1\.d}, za\.d\[w11, 0, vgx2\]
+[^:]+: c00608e0 mov {z0\.d-z1\.d}, za\.d\[w8, 7, vgx2\]
+[^:]+: c0060c00 mov {z0\.d-z3\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0060c00 mov {z0\.d-z3\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0060c00 mov {z0\.d-z3\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0060c00 mov {z0\.d-z3\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0060c1c mov {z28\.d-z31\.d}, za\.d\[w8, 0, vgx4\]
+[^:]+: c0066c00 mov {z0\.d-z3\.d}, za\.d\[w11, 0, vgx4\]
+[^:]+: c0060ce0 mov {z0\.d-z3\.d}, za\.d\[w8, 7, vgx4\]
+[^:]+: c0060000 mov {z0\.b-z1\.b}, za0h\.b\[w12, 0:1\]
+[^:]+: c006001e mov {z30\.b-z31\.b}, za0h\.b\[w12, 0:1\]
+[^:]+: c0068000 mov {z0\.b-z1\.b}, za0v\.b\[w12, 0:1\]
+[^:]+: c0066000 mov {z0\.b-z1\.b}, za0h\.b\[w15, 0:1\]
+[^:]+: c00600e0 mov {z0\.b-z1\.b}, za0h\.b\[w12, 14:15\]
+[^:]+: c0064068 mov {z8\.b-z9\.b}, za0h\.b\[w14, 6:7\]
+[^:]+: c0460000 mov {z0\.h-z1\.h}, za0h\.h\[w12, 0:1\]
+[^:]+: c046001e mov {z30\.h-z31\.h}, za0h\.h\[w12, 0:1\]
+[^:]+: c0468000 mov {z0\.h-z1\.h}, za0v\.h\[w12, 0:1\]
+[^:]+: c0460080 mov {z0\.h-z1\.h}, za1h\.h\[w12, 0:1\]
+[^:]+: c0468080 mov {z0\.h-z1\.h}, za1v\.h\[w12, 0:1\]
+[^:]+: c0466000 mov {z0\.h-z1\.h}, za0h\.h\[w15, 0:1\]
+[^:]+: c0460060 mov {z0\.h-z1\.h}, za0h\.h\[w12, 6:7\]
+[^:]+: c046202a mov {z10\.h-z11\.h}, za0h\.h\[w13, 2:3\]
+[^:]+: c0860000 mov {z0\.s-z1\.s}, za0h\.s\[w12, 0:1\]
+[^:]+: c086001e mov {z30\.s-z31\.s}, za0h\.s\[w12, 0:1\]
+[^:]+: c0868000 mov {z0\.s-z1\.s}, za0v\.s\[w12, 0:1\]
+[^:]+: c08600c0 mov {z0\.s-z1\.s}, za3h\.s\[w12, 0:1\]
+[^:]+: c08680c0 mov {z0\.s-z1\.s}, za3v\.s\[w12, 0:1\]
+[^:]+: c0866000 mov {z0\.s-z1\.s}, za0h\.s\[w15, 0:1\]
+[^:]+: c0860020 mov {z0\.s-z1\.s}, za0h\.s\[w12, 2:3\]
+[^:]+: c0864092 mov {z18\.s-z19\.s}, za2h\.s\[w14, 0:1\]
+[^:]+: c0c60000 mov {z0\.d-z1\.d}, za0h\.d\[w12, 0:1\]
+[^:]+: c0c6001e mov {z30\.d-z31\.d}, za0h\.d\[w12, 0:1\]
+[^:]+: c0c68000 mov {z0\.d-z1\.d}, za0v\.d\[w12, 0:1\]
+[^:]+: c0c600e0 mov {z0\.d-z1\.d}, za7h\.d\[w12, 0:1\]
+[^:]+: c0c680e0 mov {z0\.d-z1\.d}, za7v\.d\[w12, 0:1\]
+[^:]+: c0c66000 mov {z0\.d-z1\.d}, za0h\.d\[w15, 0:1\]
+[^:]+: c0c620d6 mov {z22\.d-z23\.d}, za6h\.d\[w13, 0:1\]
+[^:]+: c0060400 mov {z0\.b-z3\.b}, za0h\.b\[w12, 0:3\]
+[^:]+: c006041c mov {z28\.b-z31\.b}, za0h\.b\[w12, 0:3\]
+[^:]+: c0068400 mov {z0\.b-z3\.b}, za0v\.b\[w12, 0:3\]
+[^:]+: c0066400 mov {z0\.b-z3\.b}, za0h\.b\[w15, 0:3\]
+[^:]+: c0060460 mov {z0\.b-z3\.b}, za0h\.b\[w12, 12:15\]
+[^:]+: c006444c mov {z12\.b-z15\.b}, za0h\.b\[w14, 8:11\]
+[^:]+: c0460400 mov {z0\.h-z3\.h}, za0h\.h\[w12, 0:3\]
+[^:]+: c046041c mov {z28\.h-z31\.h}, za0h\.h\[w12, 0:3\]
+[^:]+: c0468400 mov {z0\.h-z3\.h}, za0v\.h\[w12, 0:3\]
+[^:]+: c0460440 mov {z0\.h-z3\.h}, za1h\.h\[w12, 0:3\]
+[^:]+: c0468440 mov {z0\.h-z3\.h}, za1v\.h\[w12, 0:3\]
+[^:]+: c0466400 mov {z0\.h-z3\.h}, za0h\.h\[w15, 0:3\]
+[^:]+: c0460420 mov {z0\.h-z3\.h}, za0h\.h\[w12, 4:7\]
+[^:]+: c0462430 mov {z16\.h-z19\.h}, za0h\.h\[w13, 4:7\]
+[^:]+: c0860400 mov {z0\.s-z3\.s}, za0h\.s\[w12, 0:3\]
+[^:]+: c086041c mov {z28\.s-z31\.s}, za0h\.s\[w12, 0:3\]
+[^:]+: c0868400 mov {z0\.s-z3\.s}, za0v\.s\[w12, 0:3\]
+[^:]+: c0860460 mov {z0\.s-z3\.s}, za3h\.s\[w12, 0:3\]
+[^:]+: c0868460 mov {z0\.s-z3\.s}, za3v\.s\[w12, 0:3\]
+[^:]+: c0866400 mov {z0\.s-z3\.s}, za0h\.s\[w15, 0:3\]
+[^:]+: c0862454 mov {z20\.s-z23\.s}, za2h\.s\[w13, 0:3\]
+[^:]+: c0c60400 mov {z0\.d-z3\.d}, za0h\.d\[w12, 0:3\]
+[^:]+: c0c6041c mov {z28\.d-z31\.d}, za0h\.d\[w12, 0:3\]
+[^:]+: c0c68400 mov {z0\.d-z3\.d}, za0v\.d\[w12, 0:3\]
+[^:]+: c0c604e0 mov {z0\.d-z3\.d}, za7h\.d\[w12, 0:3\]
+[^:]+: c0c684e0 mov {z0\.d-z3\.d}, za7v\.d\[w12, 0:3\]
+[^:]+: c0c66400 mov {z0\.d-z3\.d}, za0h\.d\[w15, 0:3\]
+[^:]+: c0c624b8 mov {z24\.d-z27\.d}, za5h\.d\[w13, 0:3\]
+[^:]+: c0040800 mov za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040800 mov za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040800 mov za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040800 mov za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0046800 mov za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040807 mov za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}
+[^:]+: c0040bc0 mov za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}
+[^:]+: c0042845 mov za\.d\[w9, 5, vgx2\], {z2\.d-z3\.d}
+[^:]+: c0040c00 mov za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040c00 mov za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040c00 mov za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040c00 mov za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0046c00 mov za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040c07 mov za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}
+[^:]+: c0040f80 mov za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}
+[^:]+: c0044e81 mov za\.d\[w10, 1, vgx4\], {z20\.d-z23\.d}
+[^:]+: c0040000 mov za0h\.b\[w12, 0:1\], {z0\.b-z1\.b}
+[^:]+: c0048000 mov za0v\.b\[w12, 0:1\], {z0\.b-z1\.b}
+[^:]+: c0046000 mov za0h\.b\[w15, 0:1\], {z0\.b-z1\.b}
+[^:]+: c0040007 mov za0h\.b\[w12, 14:15\], {z0\.b-z1\.b}
+[^:]+: c00403c0 mov za0h\.b\[w12, 0:1\], {z30\.b-z31\.b}
+[^:]+: c0044103 mov za0h\.b\[w14, 6:7\], {z8\.b-z9\.b}
+[^:]+: c0440000 mov za0h\.h\[w12, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0448000 mov za0v\.h\[w12, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0440004 mov za1h\.h\[w12, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0448004 mov za1v\.h\[w12, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0446000 mov za0h\.h\[w15, 0:1\], {z0\.h-z1\.h}
+[^:]+: c0440003 mov za0h\.h\[w12, 6:7\], {z0\.h-z1\.h}
+[^:]+: c04403c0 mov za0h\.h\[w12, 0:1\], {z30\.h-z31\.h}
+[^:]+: c0442141 mov za0h\.h\[w13, 2:3\], {z10\.h-z11\.h}
+[^:]+: c0840000 mov za0h\.s\[w12, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0848000 mov za0v\.s\[w12, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0840006 mov za3h\.s\[w12, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0848006 mov za3v\.s\[w12, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0846000 mov za0h\.s\[w15, 0:1\], {z0\.s-z1\.s}
+[^:]+: c0840001 mov za0h\.s\[w12, 2:3\], {z0\.s-z1\.s}
+[^:]+: c08403c0 mov za0h\.s\[w12, 0:1\], {z30\.s-z31\.s}
+[^:]+: c0844244 mov za2h\.s\[w14, 0:1\], {z18\.s-z19\.s}
+[^:]+: c0c40000 mov za0h\.d\[w12, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c48000 mov za0v\.d\[w12, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c40007 mov za7h\.d\[w12, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c48007 mov za7v\.d\[w12, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c46000 mov za0h\.d\[w15, 0:1\], {z0\.d-z1\.d}
+[^:]+: c0c403c0 mov za0h\.d\[w12, 0:1\], {z30\.d-z31\.d}
+[^:]+: c0c422c6 mov za6h\.d\[w13, 0:1\], {z22\.d-z23\.d}
+[^:]+: c0040400 mov za0h\.b\[w12, 0:3\], {z0\.b-z3\.b}
+[^:]+: c0048400 mov za0v\.b\[w12, 0:3\], {z0\.b-z3\.b}
+[^:]+: c0046400 mov za0h\.b\[w15, 0:3\], {z0\.b-z3\.b}
+[^:]+: c0040403 mov za0h\.b\[w12, 12:15\], {z0\.b-z3\.b}
+[^:]+: c0040780 mov za0h\.b\[w12, 0:3\], {z28\.b-z31\.b}
+[^:]+: c0044582 mov za0h\.b\[w14, 8:11\], {z12\.b-z15\.b}
+[^:]+: c0440400 mov za0h\.h\[w12, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0448400 mov za0v\.h\[w12, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0440402 mov za1h\.h\[w12, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0448402 mov za1v\.h\[w12, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0446400 mov za0h\.h\[w15, 0:3\], {z0\.h-z3\.h}
+[^:]+: c0440401 mov za0h\.h\[w12, 4:7\], {z0\.h-z3\.h}
+[^:]+: c0440780 mov za0h\.h\[w12, 0:3\], {z28\.h-z31\.h}
+[^:]+: c0442601 mov za0h\.h\[w13, 4:7\], {z16\.h-z19\.h}
+[^:]+: c0840400 mov za0h\.s\[w12, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0848400 mov za0v\.s\[w12, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0840403 mov za3h\.s\[w12, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0848403 mov za3v\.s\[w12, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0846400 mov za0h\.s\[w15, 0:3\], {z0\.s-z3\.s}
+[^:]+: c0840780 mov za0h\.s\[w12, 0:3\], {z28\.s-z31\.s}
+[^:]+: c0842682 mov za2h\.s\[w13, 0:3\], {z20\.s-z23\.s}
+[^:]+: c0c40400 mov za0h\.d\[w12, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c48400 mov za0v\.d\[w12, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c40407 mov za7h\.d\[w12, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c48407 mov za7v\.d\[w12, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c46400 mov za0h\.d\[w15, 0:3\], {z0\.d-z3\.d}
+[^:]+: c0c40780 mov za0h\.d\[w12, 0:3\], {z28\.d-z31\.d}
+[^:]+: c0c42705 mov za5h\.d\[w13, 0:3\], {z24\.d-z27\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-1.s b/gas/testsuite/gas/aarch64/sme2-1.s
new file mode 100644
index 00000000000..222f8e06b96
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-1.s
@@ -0,0 +1,338 @@
+ mov { z0.b - z1.b }, za.b[w8, 0]
+ mov { z0.h - z1.h }, za.h[w8, 0]
+ mov { z0.s - z1.s }, za.s[w8, 0]
+ mov { z0.d - z1.d }, za.d[w8, 0]
+ mov { z30.d - z31.d }, za.d[w8, 0]
+ mov { z0.d - z1.d }, za.d[w11, 0]
+ mov { z0.d - z1.d }, za.d[w8, 7]
+
+ mov { z0.b - z3.b }, za.b[w8, 0]
+ mov { z0.h - z3.h }, za.h[w8, 0]
+ mov { z0.s - z3.s }, za.s[w8, 0]
+ mov { z0.d - z3.d }, za.d[w8, 0]
+ mov { z28.d - z31.d }, za.d[w8, 0]
+ mov { z0.d - z3.d }, za.d[w11, 0]
+ mov { z0.d - z3.d }, za.d[w8, 7]
+
+ mov { z0.b - z1.b }, za0h.b[w12, 0:1]
+ mov { z30.b - z31.b }, za0h.b[w12, 0:1]
+ mov { z0.b - z1.b }, za0v.b[w12, 0:1]
+ mov { z0.b - z1.b }, za0h.b[w15, 0:1]
+ mov { z0.b - z1.b }, za0h.b[w12, 14:15]
+ mov { z8.b - z9.b }, za0h.b[w14, 6:7]
+
+ mov { z0.h - z1.h }, za0h.h[w12, 0:1]
+ mov { z30.h - z31.h }, za0h.h[w12, 0:1]
+ mov { z0.h - z1.h }, za0v.h[w12, 0:1]
+ mov { z0.h - z1.h }, za1h.h[w12, 0:1]
+ mov { z0.h - z1.h }, za1v.h[w12, 0:1]
+ mov { z0.h - z1.h }, za0h.h[w15, 0:1]
+ mov { z0.h - z1.h }, za0h.h[w12, 6:7]
+ mov { z10.h - z11.h }, za0h.h[w13, 2:3]
+
+ mov { z0.s - z1.s }, za0h.s[w12, 0:1]
+ mov { z30.s - z31.s }, za0h.s[w12, 0:1]
+ mov { z0.s - z1.s }, za0v.s[w12, 0:1]
+ mov { z0.s - z1.s }, za3h.s[w12, 0:1]
+ mov { z0.s - z1.s }, za3v.s[w12, 0:1]
+ mov { z0.s - z1.s }, za0h.s[w15, 0:1]
+ mov { z0.s - z1.s }, za0h.s[w12, 2:3]
+ mov { z18.s - z19.s }, za2h.s[w14, 0:1]
+
+ mov { z0.d - z1.d }, za0h.d[w12, 0:1]
+ mov { z30.d - z31.d }, za0h.d[w12, 0:1]
+ mov { z0.d - z1.d }, za0v.d[w12, 0:1]
+ mov { z0.d - z1.d }, za7h.d[w12, 0:1]
+ mov { z0.d - z1.d }, za7v.d[w12, 0:1]
+ mov { z0.d - z1.d }, za0h.d[w15, 0:1]
+ mov { z22.d - z23.d }, za6h.d[w13, 0:1]
+
+ mov { z0.b - z3.b }, za0h.b[w12, 0:3]
+ mov { z28.b - z31.b }, za0h.b[w12, 0:3]
+ mov { z0.b - z3.b }, za0v.b[w12, 0:3]
+ mov { z0.b - z3.b }, za0h.b[w15, 0:3]
+ mov { z0.b - z3.b }, za0h.b[w12, 12:15]
+ mov { z12.b - z15.b }, za0h.b[w14, 8:11]
+
+ mov { z0.h - z3.h }, za0h.h[w12, 0:3]
+ mov { z28.h - z31.h }, za0h.h[w12, 0:3]
+ mov { z0.h - z3.h }, za0v.h[w12, 0:3]
+ mov { z0.h - z3.h }, za1h.h[w12, 0:3]
+ mov { z0.h - z3.h }, za1v.h[w12, 0:3]
+ mov { z0.h - z3.h }, za0h.h[w15, 0:3]
+ mov { z0.h - z3.h }, za0h.h[w12, 4:7]
+ mov { z16.h - z19.h }, za0h.h[w13, 4:7]
+
+ mov { z0.s - z3.s }, za0h.s[w12, 0:3]
+ mov { z28.s - z31.s }, za0h.s[w12, 0:3]
+ mov { z0.s - z3.s }, za0v.s[w12, 0:3]
+ mov { z0.s - z3.s }, za3h.s[w12, 0:3]
+ mov { z0.s - z3.s }, za3v.s[w12, 0:3]
+ mov { z0.s - z3.s }, za0h.s[w15, 0:3]
+ mov { z20.s - z23.s }, za2h.s[w13, 0:3]
+
+ mov { z0.d - z3.d }, za0h.d[w12, 0:3]
+ mov { z28.d - z31.d }, za0h.d[w12, 0:3]
+ mov { z0.d - z3.d }, za0v.d[w12, 0:3]
+ mov { z0.d - z3.d }, za7h.d[w12, 0:3]
+ mov { z0.d - z3.d }, za7v.d[w12, 0:3]
+ mov { z0.d - z3.d }, za0h.d[w15, 0:3]
+ mov { z24.d - z27.d }, za5h.d[w13, 0:3]
+
+ // Invalid MOVAs
+ .inst 0xc0060480
+ .inst 0xc00604e0
+ .inst 0xc0460480
+ .inst 0xc04604e0
+ .inst 0xc0860480
+ .inst 0xc08604e0
+ // Valid MOVAs
+ .inst 0xc0c60480
+ .inst 0xc0c604e0
+
+ mov za.b[w8, 0], { z0.b - z1.b }
+ mov za.h[w8, 0], { z0.h - z1.h }
+ mov za.s[w8, 0], { z0.s - z1.s }
+ mov za.d[w8, 0], { z0.d - z1.d }
+ mov za.d[w11, 0], { z0.d - z1.d }
+ mov za.d[w8, 7], { z0.d - z1.d }
+ mov za.d[w8, 0], { z30.d - z31.d }
+ mov za.d[w9, 5], { z2.d - z3.d }
+
+ mov za.b[w8, 0], { z0.b - z3.b }
+ mov za.h[w8, 0], { z0.h - z3.h }
+ mov za.s[w8, 0], { z0.s - z3.s }
+ mov za.d[w8, 0], { z0.d - z3.d }
+ mov za.d[w11, 0], { z0.d - z3.d }
+ mov za.d[w8, 7], { z0.d - z3.d }
+ mov za.d[w8, 0], { z28.d - z31.d }
+ mov za.d[w10, 1], { z20.d - z23.d }
+
+ mov za0h.b[w12, 0:1], { z0.b - z1.b }
+ mov za0v.b[w12, 0:1], { z0.b - z1.b }
+ mov za0h.b[w15, 0:1], { z0.b - z1.b }
+ mov za0h.b[w12, 14:15], { z0.b - z1.b }
+ mov za0h.b[w12, 0:1], { z30.b - z31.b }
+ mov za0h.b[w14, 6:7], { z8.b - z9.b }
+
+ mov za0h.h[w12, 0:1], { z0.h - z1.h }
+ mov za0v.h[w12, 0:1], { z0.h - z1.h }
+ mov za1h.h[w12, 0:1], { z0.h - z1.h }
+ mov za1v.h[w12, 0:1], { z0.h - z1.h }
+ mov za0h.h[w15, 0:1], { z0.h - z1.h }
+ mov za0h.h[w12, 6:7], { z0.h - z1.h }
+ mov za0h.h[w12, 0:1], { z30.h - z31.h }
+ mov za0h.h[w13, 2:3], { z10.h - z11.h }
+
+ mov za0h.s[w12, 0:1], { z0.s - z1.s }
+ mov za0v.s[w12, 0:1], { z0.s - z1.s }
+ mov za3h.s[w12, 0:1], { z0.s - z1.s }
+ mov za3v.s[w12, 0:1], { z0.s - z1.s }
+ mov za0h.s[w15, 0:1], { z0.s - z1.s }
+ mov za0h.s[w12, 2:3], { z0.s - z1.s }
+ mov za0h.s[w12, 0:1], { z30.s - z31.s }
+ mov za2h.s[w14, 0:1], { z18.s - z19.s }
+
+ mov za0h.d[w12, 0:1], { z0.d - z1.d }
+ mov za0v.d[w12, 0:1], { z0.d - z1.d }
+ mov za7h.d[w12, 0:1], { z0.d - z1.d }
+ mov za7v.d[w12, 0:1], { z0.d - z1.d }
+ mov za0h.d[w15, 0:1], { z0.d - z1.d }
+ mov za0h.d[w12, 0:1], { z30.d - z31.d }
+ mov za6h.d[w13, 0:1], { z22.d - z23.d }
+
+ mov za0h.b[w12, 0:3], { z0.b - z3.b }
+ mov za0v.b[w12, 0:3], { z0.b - z3.b }
+ mov za0h.b[w15, 0:3], { z0.b - z3.b }
+ mov za0h.b[w12, 12:15], { z0.b - z3.b }
+ mov za0h.b[w12, 0:3], { z28.b - z31.b }
+ mov za0h.b[w14, 8:11], { z12.b - z15.b }
+
+ mov za0h.h[w12, 0:3], { z0.h - z3.h }
+ mov za0v.h[w12, 0:3], { z0.h - z3.h }
+ mov za1h.h[w12, 0:3], { z0.h - z3.h }
+ mov za1v.h[w12, 0:3], { z0.h - z3.h }
+ mov za0h.h[w15, 0:3], { z0.h - z3.h }
+ mov za0h.h[w12, 4:7], { z0.h - z3.h }
+ mov za0h.h[w12, 0:3], { z28.h - z31.h }
+ mov za0h.h[w13, 4:7], { z16.h - z19.h }
+
+ mov za0h.s[w12, 0:3], { z0.s - z3.s }
+ mov za0v.s[w12, 0:3], { z0.s - z3.s }
+ mov za3h.s[w12, 0:3], { z0.s - z3.s }
+ mov za3v.s[w12, 0:3], { z0.s - z3.s }
+ mov za0h.s[w15, 0:3], { z0.s - z3.s }
+ mov za0h.s[w12, 0:3], { z28.s - z31.s }
+ mov za2h.s[w13, 0:3], { z20.s - z23.s }
+
+ mov za0h.d[w12, 0:3], { z0.d - z3.d }
+ mov za0v.d[w12, 0:3], { z0.d - z3.d }
+ mov za7h.d[w12, 0:3], { z0.d - z3.d }
+ mov za7v.d[w12, 0:3], { z0.d - z3.d }
+ mov za0h.d[w15, 0:3], { z0.d - z3.d }
+ mov za0h.d[w12, 0:3], { z28.d - z31.d }
+ mov za5h.d[w13, 0:3], { z24.d - z27.d }
+
+ mova { z0.b - z1.b }, za.b[w8, 0]
+ mova { z0.h - z1.h }, za.h[w8, 0]
+ mova { z0.s - z1.s }, za.s[w8, 0]
+ mova { z0.d - z1.d }, za.d[w8, 0]
+ mova { z30.d - z31.d }, za.d[w8, 0]
+ mova { z0.d - z1.d }, za.d[w11, 0]
+ mova { z0.d - z1.d }, za.d[w8, 7]
+
+ mova { z0.b - z3.b }, za.b[w8, 0]
+ mova { z0.h - z3.h }, za.h[w8, 0]
+ mova { z0.s - z3.s }, za.s[w8, 0]
+ mova { z0.d - z3.d }, za.d[w8, 0]
+ mova { z28.d - z31.d }, za.d[w8, 0]
+ mova { z0.d - z3.d }, za.d[w11, 0]
+ mova { z0.d - z3.d }, za.d[w8, 7]
+
+ mova { z0.b - z1.b }, za0h.b[w12, 0:1]
+ mova { z30.b - z31.b }, za0h.b[w12, 0:1]
+ mova { z0.b - z1.b }, za0v.b[w12, 0:1]
+ mova { z0.b - z1.b }, za0h.b[w15, 0:1]
+ mova { z0.b - z1.b }, za0h.b[w12, 14:15]
+ mova { z8.b - z9.b }, za0h.b[w14, 6:7]
+
+ mova { z0.h - z1.h }, za0h.h[w12, 0:1]
+ mova { z30.h - z31.h }, za0h.h[w12, 0:1]
+ mova { z0.h - z1.h }, za0v.h[w12, 0:1]
+ mova { z0.h - z1.h }, za1h.h[w12, 0:1]
+ mova { z0.h - z1.h }, za1v.h[w12, 0:1]
+ mova { z0.h - z1.h }, za0h.h[w15, 0:1]
+ mova { z0.h - z1.h }, za0h.h[w12, 6:7]
+ mova { z10.h - z11.h }, za0h.h[w13, 2:3]
+
+ mova { z0.s - z1.s }, za0h.s[w12, 0:1]
+ mova { z30.s - z31.s }, za0h.s[w12, 0:1]
+ mova { z0.s - z1.s }, za0v.s[w12, 0:1]
+ mova { z0.s - z1.s }, za3h.s[w12, 0:1]
+ mova { z0.s - z1.s }, za3v.s[w12, 0:1]
+ mova { z0.s - z1.s }, za0h.s[w15, 0:1]
+ mova { z0.s - z1.s }, za0h.s[w12, 2:3]
+ mova { z18.s - z19.s }, za2h.s[w14, 0:1]
+
+ mova { z0.d - z1.d }, za0h.d[w12, 0:1]
+ mova { z30.d - z31.d }, za0h.d[w12, 0:1]
+ mova { z0.d - z1.d }, za0v.d[w12, 0:1]
+ mova { z0.d - z1.d }, za7h.d[w12, 0:1]
+ mova { z0.d - z1.d }, za7v.d[w12, 0:1]
+ mova { z0.d - z1.d }, za0h.d[w15, 0:1]
+ mova { z22.d - z23.d }, za6h.d[w13, 0:1]
+
+ mova { z0.b - z3.b }, za0h.b[w12, 0:3]
+ mova { z28.b - z31.b }, za0h.b[w12, 0:3]
+ mova { z0.b - z3.b }, za0v.b[w12, 0:3]
+ mova { z0.b - z3.b }, za0h.b[w15, 0:3]
+ mova { z0.b - z3.b }, za0h.b[w12, 12:15]
+ mova { z12.b - z15.b }, za0h.b[w14, 8:11]
+
+ mova { z0.h - z3.h }, za0h.h[w12, 0:3]
+ mova { z28.h - z31.h }, za0h.h[w12, 0:3]
+ mova { z0.h - z3.h }, za0v.h[w12, 0:3]
+ mova { z0.h - z3.h }, za1h.h[w12, 0:3]
+ mova { z0.h - z3.h }, za1v.h[w12, 0:3]
+ mova { z0.h - z3.h }, za0h.h[w15, 0:3]
+ mova { z0.h - z3.h }, za0h.h[w12, 4:7]
+ mova { z16.h - z19.h }, za0h.h[w13, 4:7]
+
+ mova { z0.s - z3.s }, za0h.s[w12, 0:3]
+ mova { z28.s - z31.s }, za0h.s[w12, 0:3]
+ mova { z0.s - z3.s }, za0v.s[w12, 0:3]
+ mova { z0.s - z3.s }, za3h.s[w12, 0:3]
+ mova { z0.s - z3.s }, za3v.s[w12, 0:3]
+ mova { z0.s - z3.s }, za0h.s[w15, 0:3]
+ mova { z20.s - z23.s }, za2h.s[w13, 0:3]
+
+ mova { z0.d - z3.d }, za0h.d[w12, 0:3]
+ mova { z28.d - z31.d }, za0h.d[w12, 0:3]
+ mova { z0.d - z3.d }, za0v.d[w12, 0:3]
+ mova { z0.d - z3.d }, za7h.d[w12, 0:3]
+ mova { z0.d - z3.d }, za7v.d[w12, 0:3]
+ mova { z0.d - z3.d }, za0h.d[w15, 0:3]
+ mova { z24.d - z27.d }, za5h.d[w13, 0:3]
+
+ mova za.b[w8, 0], { z0.b - z1.b }
+ mova za.h[w8, 0], { z0.h - z1.h }
+ mova za.s[w8, 0], { z0.s - z1.s }
+ mova za.d[w8, 0], { z0.d - z1.d }
+ mova za.d[w11, 0], { z0.d - z1.d }
+ mova za.d[w8, 7], { z0.d - z1.d }
+ mova za.d[w8, 0], { z30.d - z31.d }
+ mova za.d[w9, 5], { z2.d - z3.d }
+
+ mova za.b[w8, 0], { z0.b - z3.b }
+ mova za.h[w8, 0], { z0.h - z3.h }
+ mova za.s[w8, 0], { z0.s - z3.s }
+ mova za.d[w8, 0], { z0.d - z3.d }
+ mova za.d[w11, 0], { z0.d - z3.d }
+ mova za.d[w8, 7], { z0.d - z3.d }
+ mova za.d[w8, 0], { z28.d - z31.d }
+ mova za.d[w10, 1], { z20.d - z23.d }
+
+ mova za0h.b[w12, 0:1], { z0.b - z1.b }
+ mova za0v.b[w12, 0:1], { z0.b - z1.b }
+ mova za0h.b[w15, 0:1], { z0.b - z1.b }
+ mova za0h.b[w12, 14:15], { z0.b - z1.b }
+ mova za0h.b[w12, 0:1], { z30.b - z31.b }
+ mova za0h.b[w14, 6:7], { z8.b - z9.b }
+
+ mova za0h.h[w12, 0:1], { z0.h - z1.h }
+ mova za0v.h[w12, 0:1], { z0.h - z1.h }
+ mova za1h.h[w12, 0:1], { z0.h - z1.h }
+ mova za1v.h[w12, 0:1], { z0.h - z1.h }
+ mova za0h.h[w15, 0:1], { z0.h - z1.h }
+ mova za0h.h[w12, 6:7], { z0.h - z1.h }
+ mova za0h.h[w12, 0:1], { z30.h - z31.h }
+ mova za0h.h[w13, 2:3], { z10.h - z11.h }
+
+ mova za0h.s[w12, 0:1], { z0.s - z1.s }
+ mova za0v.s[w12, 0:1], { z0.s - z1.s }
+ mova za3h.s[w12, 0:1], { z0.s - z1.s }
+ mova za3v.s[w12, 0:1], { z0.s - z1.s }
+ mova za0h.s[w15, 0:1], { z0.s - z1.s }
+ mova za0h.s[w12, 2:3], { z0.s - z1.s }
+ mova za0h.s[w12, 0:1], { z30.s - z31.s }
+ mova za2h.s[w14, 0:1], { z18.s - z19.s }
+
+ mova za0h.d[w12, 0:1], { z0.d - z1.d }
+ mova za0v.d[w12, 0:1], { z0.d - z1.d }
+ mova za7h.d[w12, 0:1], { z0.d - z1.d }
+ mova za7v.d[w12, 0:1], { z0.d - z1.d }
+ mova za0h.d[w15, 0:1], { z0.d - z1.d }
+ mova za0h.d[w12, 0:1], { z30.d - z31.d }
+ mova za6h.d[w13, 0:1], { z22.d - z23.d }
+
+ mova za0h.b[w12, 0:3], { z0.b - z3.b }
+ mova za0v.b[w12, 0:3], { z0.b - z3.b }
+ mova za0h.b[w15, 0:3], { z0.b - z3.b }
+ mova za0h.b[w12, 12:15], { z0.b - z3.b }
+ mova za0h.b[w12, 0:3], { z28.b - z31.b }
+ mova za0h.b[w14, 8:11], { z12.b - z15.b }
+
+ mova za0h.h[w12, 0:3], { z0.h - z3.h }
+ mova za0v.h[w12, 0:3], { z0.h - z3.h }
+ mova za1h.h[w12, 0:3], { z0.h - z3.h }
+ mova za1v.h[w12, 0:3], { z0.h - z3.h }
+ mova za0h.h[w15, 0:3], { z0.h - z3.h }
+ mova za0h.h[w12, 4:7], { z0.h - z3.h }
+ mova za0h.h[w12, 0:3], { z28.h - z31.h }
+ mova za0h.h[w13, 4:7], { z16.h - z19.h }
+
+ mova za0h.s[w12, 0:3], { z0.s - z3.s }
+ mova za0v.s[w12, 0:3], { z0.s - z3.s }
+ mova za3h.s[w12, 0:3], { z0.s - z3.s }
+ mova za3v.s[w12, 0:3], { z0.s - z3.s }
+ mova za0h.s[w15, 0:3], { z0.s - z3.s }
+ mova za0h.s[w12, 0:3], { z28.s - z31.s }
+ mova za2h.s[w13, 0:3], { z20.s - z23.s }
+
+ mova za0h.d[w12, 0:3], { z0.d - z3.d }
+ mova za0v.d[w12, 0:3], { z0.d - z3.d }
+ mova za7h.d[w12, 0:3], { z0.d - z3.d }
+ mova za7v.d[w12, 0:3], { z0.d - z3.d }
+ mova za0h.d[w15, 0:3], { z0.d - z3.d }
+ mova za0h.d[w12, 0:3], { z28.d - z31.d }
+ mova za5h.d[w13, 0:3], { z24.d - z27.d }
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 34893584065..4d2e054c7f8 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -485,13 +485,21 @@ enum aarch64_opnd
AARCH64_OPND_SVE_ZnxN, /* SVE vector register list in Zn. */
AARCH64_OPND_SVE_Zt, /* SVE vector register in Zt. */
AARCH64_OPND_SVE_ZtxN, /* SVE vector register list in Zt. */
+ AARCH64_OPND_SME_Zdnx2, /* SVE vector register list from [4:1]*2. */
+ AARCH64_OPND_SME_Zdnx4, /* SVE vector register list from [4:2]*4. */
+ AARCH64_OPND_SME_Znx2, /* SVE vector register list from [9:6]*2. */
+ AARCH64_OPND_SME_Znx4, /* SVE vector register list from [9:7]*4. */
AARCH64_OPND_SME_ZAda_2b, /* SME <ZAda>.S, 2-bits. */
AARCH64_OPND_SME_ZAda_3b, /* SME <ZAda>.D, 3-bits. */
AARCH64_OPND_SME_ZA_HV_idx_src, /* SME source ZA tile vector. */
+ AARCH64_OPND_SME_ZA_HV_idx_srcxN, /* SME N source ZA tile vectors. */
AARCH64_OPND_SME_ZA_HV_idx_dest, /* SME destination ZA tile vector. */
+ AARCH64_OPND_SME_ZA_HV_idx_destxN, /* SME N dest ZA tile vectors. */
AARCH64_OPND_SME_Pm, /* SME scalable predicate register, bits [15:13]. */
AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */
AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
+ AARCH64_OPND_SME_ZA_array_off3_0, /* SME ZA[<Wv>{, #<imm3>}]. */
+ AARCH64_OPND_SME_ZA_array_off3_5, /* SME ZA[<Wv>{, #<imm3>}]. */
AARCH64_OPND_SME_ZA_array_off4, /* SME ZA[<Wv>{, #<imm>}]. */
AARCH64_OPND_SME_ADDR_RI_U4xVL, /* SME [<Xn|SP>{, #<imm>, MUL VL}]. */
AARCH64_OPND_SME_SM_ZA, /* SME {SM | ZA}. */
@@ -669,9 +677,11 @@ enum aarch64_insn_class
sme_mov,
sme_ldr,
sme_psel,
+ sme_size_22,
sme_str,
sme_start,
sme_stop,
+ sme2_mov,
sve_cpy,
sve_index,
sve_limm,
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 332b3f77846..daba55b4c62 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -667,9 +667,9 @@ aarch64_insert_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 214:
- case 215:
case 218:
+ case 219:
+ case 224:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -681,7 +681,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 226:
+ case 234:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -726,10 +726,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 219:
case 225:
- case 230:
- case 231:
+ case 233:
+ case 238:
+ case 239:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -889,21 +889,31 @@ aarch64_insert_operand (const aarch64_operand *self,
case 211:
case 213:
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
+ case 214:
+ case 215:
case 216:
case 217:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 220:
+ case 222:
+ case 226:
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 221:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
- case 222:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 223:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
- case 224:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 227:
case 228:
case 229:
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
+ case 230:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 231:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 232:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 235:
+ case 236:
+ case 237:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 10b70824b05..516aa8ecb81 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1167,6 +1167,19 @@ aarch64_ins_sve_aimm (const aarch64_operand *self,
return true;
}
+bool
+aarch64_ins_sve_aligned_reglist (const aarch64_operand *self,
+ const aarch64_opnd_info *info,
+ aarch64_insn *code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors ATTRIBUTE_UNUSED)
+{
+ unsigned int num_regs = get_operand_specific_data (self);
+ unsigned int val = info->reglist.first_regno;
+ insert_field (self->fields[0], code, val / num_regs, 0);
+ return true;
+}
+
/* Encode an SVE CPY/DUP immediate. */
bool
aarch64_ins_sve_asimm (const aarch64_operand *self,
@@ -1384,6 +1397,35 @@ aarch64_ins_sme_za_hv_tiles (const aarch64_operand *self,
return true;
}
+bool
+aarch64_ins_sme_za_hv_tiles_range (const aarch64_operand *self,
+ const aarch64_opnd_info *info,
+ aarch64_insn *code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors
+ ATTRIBUTE_UNUSED)
+{
+ int ebytes = aarch64_get_qualifier_esize (info->qualifier);
+ int range_size = get_opcode_dependent_value (inst->opcode);
+ int fld_v = info->indexed_za.v;
+ int fld_rv = info->indexed_za.index.regno - 12;
+ int imm = info->indexed_za.index.imm;
+ int max_value = 16 / range_size / ebytes;
+
+ if (max_value == 0)
+ max_value = 1;
+
+ assert (imm % range_size == 0 && (imm / range_size) < max_value);
+ int fld_zan_imm = (info->indexed_za.regno * max_value) | (imm / range_size);
+ assert (fld_zan_imm < (range_size == 4 && ebytes < 8 ? 4 : 8));
+
+ insert_field (self->fields[0], code, fld_v, 0);
+ insert_field (self->fields[1], code, fld_rv, 0);
+ insert_field (self->fields[2], code, fld_zan_imm, 0);
+
+ return true;
+}
+
/* Encode in SME instruction ZERO list of up to eight 64-bit element tile names
separated by commas, encoded in the "imm8" field.
@@ -1410,7 +1452,7 @@ aarch64_ins_sme_za_array (const aarch64_operand *self,
const aarch64_inst *inst ATTRIBUTE_UNUSED,
aarch64_operand_error *errors ATTRIBUTE_UNUSED)
{
- int regno = info->indexed_za.index.regno - 12;
+ int regno = info->indexed_za.index.regno & 3;
int imm = info->indexed_za.index.imm;
insert_field (self->fields[0], code, regno, 0);
insert_field (self->fields[1], code, imm, 0);
@@ -1858,6 +1900,11 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
/* The variant is encoded as part of the immediate. */
break;
+ case sme_size_22:
+ insert_field (FLD_SME_size_22, &inst->value,
+ aarch64_get_variant (inst), 0);
+ break;
+
case sve_cpy:
insert_fields (&inst->value, aarch64_get_variant (inst),
0, 2, FLD_SVE_M_14, FLD_size);
@@ -1873,6 +1920,7 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
break;
case sve_limm:
+ case sme2_mov:
/* For sve_limm, the .B, .H, and .S forms are just a convenience
and depend on the immediate. They don't have a separate
encoding. */
diff --git a/opcodes/aarch64-asm.h b/opcodes/aarch64-asm.h
index 56f53545531..eb881707b65 100644
--- a/opcodes/aarch64-asm.h
+++ b/opcodes/aarch64-asm.h
@@ -87,6 +87,7 @@ AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_lsl);
AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_sxtw);
AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_uxtw);
AARCH64_DECL_OPD_INSERTER (ins_sve_aimm);
+AARCH64_DECL_OPD_INSERTER (ins_sve_aligned_reglist);
AARCH64_DECL_OPD_INSERTER (ins_sve_asimm);
AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_one);
AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_two);
@@ -99,6 +100,7 @@ AARCH64_DECL_OPD_INSERTER (ins_sve_scale);
AARCH64_DECL_OPD_INSERTER (ins_sve_shlimm);
AARCH64_DECL_OPD_INSERTER (ins_sve_shrimm);
AARCH64_DECL_OPD_INSERTER (ins_sme_za_hv_tiles);
+AARCH64_DECL_OPD_INSERTER (ins_sme_za_hv_tiles_range);
AARCH64_DECL_OPD_INSERTER (ins_sme_za_list);
AARCH64_DECL_OPD_INSERTER (ins_sme_za_array);
AARCH64_DECL_OPD_INSERTER (ins_sme_addr_ri_u4xvl);
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 53fc8122ac8..3e7ca5cc373 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -96,74 +96,162 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 17) & 0x1) == 0)
{
- if (((word >> 19) & 0x1) == 0)
+ if (((word >> 18) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000xx000x0xxxxxxxxxxxxxxxxx
- mov. */
- return 2389;
- }
- else
+ if (((word >> 19) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000x0010x00xxxxxxxxxxxxxxxx
- addha. */
- return 2357;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000x1010x00xxxxxxxxxxxxxxxx
- addha. */
- return 2358;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx00000xxxxxxxxxxxxxxxxx
+ mov. */
+ return 2389;
}
else
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 16) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000x0010x01xxxxxxxxxxxxxxxx
- addva. */
- return 2361;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x0010000xxxxxxxxxxxxxxxx
+ addha. */
+ return 2357;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x1010000xxxxxxxxxxxxxxxx
+ addha. */
+ return 2358;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000x1010x01xxxxxxxxxxxxxxxx
- addva. */
- return 2362;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x0010001xxxxxxxxxxxxxxxx
+ addva. */
+ return 2361;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x1010001xxxxxxxxxxxxxxxx
+ addva. */
+ return 2362;
+ }
}
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0x100xxxxxxxxxxxxxxxxx
+ zero. */
+ return 2392;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000xx0x1x0xxxxxxxxxxxxxxxxx
- zero. */
- return 2392;
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx10xxxxx00xxxxxxxxxx
+ mov. */
+ return 2426;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx10xxxxx10xxxxxxxxxx
+ mov. */
+ return 2424;
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx10xxxxx01xxxxxxxxxx
+ mov. */
+ return 2427;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx10xxxxx11xxxxxxxxxx
+ mov. */
+ return 2425;
+ }
+ }
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000xx0xxx1xxxxxxxxxxxxxxxxx
- mov. */
- return 2388;
+ if (((word >> 18) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx01xxxxxxxxxxxxxxxxx
+ mov. */
+ return 2388;
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx11xxxxx00xxxxxxxxxx
+ mov. */
+ return 2422;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx11xxxxx10xxxxxxxxxx
+ mov. */
+ return 2420;
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx11xxxxx01xxxxxxxxxx
+ mov. */
+ return 2423;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0xx11xxxxx11xxxxxxxxxx
+ mov. */
+ return 2421;
+ }
+ }
+ }
}
}
}
@@ -2896,7 +2984,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2460;
+ return 2476;
}
else
{
@@ -2904,7 +2992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2468;
+ return 2484;
}
}
else
@@ -2915,7 +3003,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2464;
+ return 2480;
}
else
{
@@ -2923,7 +3011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2471;
+ return 2487;
}
}
}
@@ -2961,7 +3049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2520;
+ return 2536;
}
else
{
@@ -2969,7 +3057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2526;
+ return 2542;
}
}
else
@@ -2980,7 +3068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2523;
+ return 2539;
}
else
{
@@ -2988,7 +3076,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2529;
+ return 2545;
}
}
}
@@ -3002,7 +3090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2544;
+ return 2560;
}
else
{
@@ -3010,7 +3098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2550;
+ return 2566;
}
}
else
@@ -3021,7 +3109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2547;
+ return 2563;
}
else
{
@@ -3029,7 +3117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2553;
+ return 2569;
}
}
}
@@ -3046,7 +3134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2532;
+ return 2548;
}
else
{
@@ -3054,7 +3142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2538;
+ return 2554;
}
}
else
@@ -3065,7 +3153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2535;
+ return 2551;
}
else
{
@@ -3073,7 +3161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2541;
+ return 2557;
}
}
}
@@ -3087,7 +3175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2556;
+ return 2572;
}
else
{
@@ -3095,7 +3183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2562;
+ return 2578;
}
}
else
@@ -3106,7 +3194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2559;
+ return 2575;
}
else
{
@@ -3114,7 +3202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2565;
+ return 2581;
}
}
}
@@ -3179,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2461;
+ return 2477;
}
else
{
@@ -3187,7 +3275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2469;
+ return 2485;
}
}
else
@@ -3198,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2465;
+ return 2481;
}
else
{
@@ -3206,7 +3294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2472;
+ return 2488;
}
}
}
@@ -3244,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2521;
+ return 2537;
}
else
{
@@ -3252,7 +3340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2527;
+ return 2543;
}
}
else
@@ -3263,7 +3351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2524;
+ return 2540;
}
else
{
@@ -3271,7 +3359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2530;
+ return 2546;
}
}
}
@@ -3285,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2545;
+ return 2561;
}
else
{
@@ -3293,7 +3381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2551;
+ return 2567;
}
}
else
@@ -3304,7 +3392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2548;
+ return 2564;
}
else
{
@@ -3312,7 +3400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2554;
+ return 2570;
}
}
}
@@ -3329,7 +3417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2533;
+ return 2549;
}
else
{
@@ -3337,7 +3425,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2539;
+ return 2555;
}
}
else
@@ -3348,7 +3436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2536;
+ return 2552;
}
else
{
@@ -3356,7 +3444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2542;
+ return 2558;
}
}
}
@@ -3370,7 +3458,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2557;
+ return 2573;
}
else
{
@@ -3378,7 +3466,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2563;
+ return 2579;
}
}
else
@@ -3389,7 +3477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2560;
+ return 2576;
}
else
{
@@ -3397,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2566;
+ return 2582;
}
}
}
@@ -3465,7 +3553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2463;
+ return 2479;
}
else
{
@@ -3473,7 +3561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2470;
+ return 2486;
}
}
else
@@ -3482,7 +3570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2467;
+ return 2483;
}
}
else
@@ -3493,7 +3581,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2462;
+ return 2478;
}
else
{
@@ -3501,7 +3589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2466;
+ return 2482;
}
}
}
@@ -3563,7 +3651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2522;
+ return 2538;
}
else
{
@@ -3571,7 +3659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2616;
+ return 2632;
}
}
else
@@ -3582,7 +3670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2528;
+ return 2544;
}
else
{
@@ -3590,7 +3678,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2618;
+ return 2634;
}
}
}
@@ -3604,7 +3692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2525;
+ return 2541;
}
else
{
@@ -3612,7 +3700,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2617;
+ return 2633;
}
}
else
@@ -3621,7 +3709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2531;
+ return 2547;
}
}
}
@@ -3637,7 +3725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2546;
+ return 2562;
}
else
{
@@ -3645,7 +3733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2622;
+ return 2638;
}
}
else
@@ -3656,7 +3744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2552;
+ return 2568;
}
else
{
@@ -3664,7 +3752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2624;
+ return 2640;
}
}
}
@@ -3678,7 +3766,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2549;
+ return 2565;
}
else
{
@@ -3686,7 +3774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2623;
+ return 2639;
}
}
else
@@ -3695,7 +3783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2555;
+ return 2571;
}
}
}
@@ -3714,7 +3802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2534;
+ return 2550;
}
else
{
@@ -3722,7 +3810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2619;
+ return 2635;
}
}
else
@@ -3733,7 +3821,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2540;
+ return 2556;
}
else
{
@@ -3741,7 +3829,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2621;
+ return 2637;
}
}
}
@@ -3755,7 +3843,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2537;
+ return 2553;
}
else
{
@@ -3763,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2620;
+ return 2636;
}
}
else
@@ -3772,7 +3860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2543;
+ return 2559;
}
}
}
@@ -3788,7 +3876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2558;
+ return 2574;
}
else
{
@@ -3796,7 +3884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2625;
+ return 2641;
}
}
else
@@ -3807,7 +3895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2564;
+ return 2580;
}
else
{
@@ -3815,7 +3903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2627;
+ return 2643;
}
}
}
@@ -3829,7 +3917,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2561;
+ return 2577;
}
else
{
@@ -3837,7 +3925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2626;
+ return 2642;
}
}
else
@@ -3846,7 +3934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2567;
+ return 2583;
}
}
}
@@ -4219,7 +4307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2645;
+ return 2661;
}
else
{
@@ -4237,7 +4325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2648;
+ return 2664;
}
}
}
@@ -4317,7 +4405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2458;
+ return 2474;
}
else
{
@@ -4325,7 +4413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2459;
+ return 2475;
}
}
else
@@ -4432,7 +4520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2650;
+ return 2666;
}
}
}
@@ -4448,7 +4536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2647;
+ return 2663;
}
else
{
@@ -4493,7 +4581,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2457;
+ return 2473;
}
else
{
@@ -4587,7 +4675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2649;
+ return 2665;
}
}
}
@@ -4717,7 +4805,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2651;
+ return 2667;
}
}
}
@@ -4733,7 +4821,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2646;
+ return 2662;
}
else
{
@@ -5575,7 +5663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2477;
+ return 2493;
}
}
}
@@ -5649,7 +5737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2478;
+ return 2494;
}
}
}
@@ -8323,7 +8411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2476;
+ return 2492;
}
}
}
@@ -10027,7 +10115,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2505;
+ return 2521;
}
}
else
@@ -10270,7 +10358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2481;
+ return 2497;
}
else
{
@@ -10278,7 +10366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2482;
+ return 2498;
}
}
else
@@ -10510,7 +10598,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2502;
+ return 2518;
}
else
{
@@ -10531,7 +10619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2509;
+ return 2525;
}
else
{
@@ -10539,7 +10627,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2508;
+ return 2524;
}
}
else
@@ -10594,7 +10682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2501;
+ return 2517;
}
else
{
@@ -10606,7 +10694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2507;
+ return 2523;
}
else
{
@@ -10614,7 +10702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2506;
+ return 2522;
}
}
else
@@ -10665,7 +10753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2485;
+ return 2501;
}
else
{
@@ -10673,7 +10761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2486;
+ return 2502;
}
}
else
@@ -11032,7 +11120,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2479;
+ return 2495;
}
else
{
@@ -11065,7 +11153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2503;
+ return 2519;
}
else
{
@@ -11095,7 +11183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2480;
+ return 2496;
}
else
{
@@ -11224,7 +11312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2489;
+ return 2505;
}
else
{
@@ -11234,7 +11322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2491;
+ return 2507;
}
else
{
@@ -11242,7 +11330,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2493;
+ return 2509;
}
}
}
@@ -11254,7 +11342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2490;
+ return 2506;
}
else
{
@@ -11264,7 +11352,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2492;
+ return 2508;
}
else
{
@@ -11272,7 +11360,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2494;
+ return 2510;
}
}
}
@@ -12331,7 +12419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2473;
+ return 2489;
}
else
{
@@ -12339,7 +12427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2475;
+ return 2491;
}
}
else
@@ -12348,7 +12436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2474;
+ return 2490;
}
}
}
@@ -13844,7 +13932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2483;
+ return 2499;
}
else
{
@@ -13852,7 +13940,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2484;
+ return 2500;
}
}
}
@@ -14226,7 +14314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2487;
+ return 2503;
}
else
{
@@ -14234,7 +14322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2488;
+ return 2504;
}
}
}
@@ -15679,7 +15767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2504;
+ return 2520;
}
}
else
@@ -17029,7 +17117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2640;
+ return 2656;
}
else
{
@@ -17609,7 +17697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2568;
+ return 2584;
}
else
{
@@ -17617,7 +17705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2570;
+ return 2586;
}
}
else
@@ -17628,7 +17716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2574;
+ return 2590;
}
else
{
@@ -17636,7 +17724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2576;
+ return 2592;
}
}
}
@@ -17650,7 +17738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2571;
+ return 2587;
}
else
{
@@ -17658,7 +17746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2573;
+ return 2589;
}
}
else
@@ -17669,7 +17757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2577;
+ return 2593;
}
else
{
@@ -17677,7 +17765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2579;
+ return 2595;
}
}
}
@@ -17694,7 +17782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2592;
+ return 2608;
}
else
{
@@ -17702,7 +17790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2594;
+ return 2610;
}
}
else
@@ -17713,7 +17801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2598;
+ return 2614;
}
else
{
@@ -17721,7 +17809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2600;
+ return 2616;
}
}
}
@@ -17735,7 +17823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2595;
+ return 2611;
}
else
{
@@ -17743,7 +17831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2597;
+ return 2613;
}
}
else
@@ -17754,7 +17842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2601;
+ return 2617;
}
else
{
@@ -17762,7 +17850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2603;
+ return 2619;
}
}
}
@@ -17782,7 +17870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2580;
+ return 2596;
}
else
{
@@ -17790,7 +17878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2582;
+ return 2598;
}
}
else
@@ -17801,7 +17889,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2586;
+ return 2602;
}
else
{
@@ -17809,7 +17897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2588;
+ return 2604;
}
}
}
@@ -17823,7 +17911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2583;
+ return 2599;
}
else
{
@@ -17831,7 +17919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2585;
+ return 2601;
}
}
else
@@ -17842,7 +17930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2589;
+ return 2605;
}
else
{
@@ -17850,7 +17938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2591;
+ return 2607;
}
}
}
@@ -17867,7 +17955,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2604;
+ return 2620;
}
else
{
@@ -17875,7 +17963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2606;
+ return 2622;
}
}
else
@@ -17886,7 +17974,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2610;
+ return 2626;
}
else
{
@@ -17894,7 +17982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2612;
+ return 2628;
}
}
}
@@ -17908,7 +17996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2607;
+ return 2623;
}
else
{
@@ -17916,7 +18004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2609;
+ return 2625;
}
}
else
@@ -17927,7 +18015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2613;
+ return 2629;
}
else
{
@@ -17935,7 +18023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2615;
+ return 2631;
}
}
}
@@ -17969,7 +18057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2569;
+ return 2585;
}
else
{
@@ -17977,7 +18065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2628;
+ return 2644;
}
}
else
@@ -17988,7 +18076,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2575;
+ return 2591;
}
else
{
@@ -17996,7 +18084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2630;
+ return 2646;
}
}
}
@@ -18010,7 +18098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2572;
+ return 2588;
}
else
{
@@ -18018,7 +18106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2629;
+ return 2645;
}
}
else
@@ -18027,7 +18115,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2578;
+ return 2594;
}
}
}
@@ -18043,7 +18131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2593;
+ return 2609;
}
else
{
@@ -18051,7 +18139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2634;
+ return 2650;
}
}
else
@@ -18062,7 +18150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2599;
+ return 2615;
}
else
{
@@ -18070,7 +18158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2636;
+ return 2652;
}
}
}
@@ -18084,7 +18172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2596;
+ return 2612;
}
else
{
@@ -18092,7 +18180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2635;
+ return 2651;
}
}
else
@@ -18101,7 +18189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2602;
+ return 2618;
}
}
}
@@ -18120,7 +18208,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2581;
+ return 2597;
}
else
{
@@ -18128,7 +18216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2631;
+ return 2647;
}
}
else
@@ -18139,7 +18227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2587;
+ return 2603;
}
else
{
@@ -18147,7 +18235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2633;
+ return 2649;
}
}
}
@@ -18161,7 +18249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2584;
+ return 2600;
}
else
{
@@ -18169,7 +18257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2632;
+ return 2648;
}
}
else
@@ -18178,7 +18266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2590;
+ return 2606;
}
}
}
@@ -18194,7 +18282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2605;
+ return 2621;
}
else
{
@@ -18202,7 +18290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2637;
+ return 2653;
}
}
else
@@ -18213,7 +18301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2611;
+ return 2627;
}
else
{
@@ -18221,7 +18309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2639;
+ return 2655;
}
}
}
@@ -18235,7 +18323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2608;
+ return 2624;
}
else
{
@@ -18243,7 +18331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2638;
+ return 2654;
}
}
else
@@ -18252,7 +18340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2614;
+ return 2630;
}
}
}
@@ -18419,7 +18507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2495;
+ return 2511;
}
}
}
@@ -18452,7 +18540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2421;
+ return 2437;
}
}
else
@@ -18526,7 +18614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2497;
+ return 2513;
}
}
}
@@ -18559,7 +18647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2498;
+ return 2514;
}
}
else
@@ -18606,7 +18694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2428;
+ return 2444;
}
else
{
@@ -18614,7 +18702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2430;
+ return 2446;
}
}
else
@@ -18625,7 +18713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2432;
+ return 2448;
}
else
{
@@ -18639,7 +18727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2433;
+ return 2449;
}
else
{
@@ -18647,7 +18735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2426;
+ return 2442;
}
}
else
@@ -18656,7 +18744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2435;
+ return 2451;
}
}
else
@@ -18669,7 +18757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2434;
+ return 2450;
}
else
{
@@ -18677,7 +18765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2439;
+ return 2455;
}
}
else
@@ -18686,7 +18774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2436;
+ return 2452;
}
}
}
@@ -18867,7 +18955,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2420;
+ return 2436;
}
}
else
@@ -18898,7 +18986,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2496;
+ return 2512;
}
else
{
@@ -18917,7 +19005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2512;
+ return 2528;
}
else
{
@@ -18927,7 +19015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2510;
+ return 2526;
}
else
{
@@ -18937,7 +19025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2517;
+ return 2533;
}
else
{
@@ -18945,7 +19033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2516;
+ return 2532;
}
}
}
@@ -19529,7 +19617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2513;
+ return 2529;
}
else
{
@@ -19537,7 +19625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2514;
+ return 2530;
}
}
}
@@ -19855,7 +19943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2431;
+ return 2447;
}
}
else
@@ -20466,7 +20554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2424;
+ return 2440;
}
}
}
@@ -20518,7 +20606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2437;
+ return 2453;
}
}
}
@@ -20761,7 +20849,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2427;
+ return 2443;
}
}
else
@@ -20837,7 +20925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2440;
+ return 2456;
}
}
else
@@ -21663,7 +21751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2425;
+ return 2441;
}
}
else
@@ -21695,7 +21783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2438;
+ return 2454;
}
}
else
@@ -21935,7 +22023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2429;
+ return 2445;
}
}
else
@@ -21967,7 +22055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2443;
+ return 2459;
}
else
{
@@ -21975,7 +22063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2447;
+ return 2463;
}
}
}
@@ -21997,7 +22085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2444;
+ return 2460;
}
else
{
@@ -22005,7 +22093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2448;
+ return 2464;
}
}
}
@@ -22044,7 +22132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2441;
+ return 2457;
}
else
{
@@ -22052,7 +22140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2445;
+ return 2461;
}
}
else
@@ -22074,7 +22162,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2442;
+ return 2458;
}
else
{
@@ -22082,7 +22170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2446;
+ return 2462;
}
}
else
@@ -23890,7 +23978,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2449;
+ return 2465;
}
else
{
@@ -23898,7 +23986,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2453;
+ return 2469;
}
}
else
@@ -23920,7 +24008,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2450;
+ return 2466;
}
else
{
@@ -23928,7 +24016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2454;
+ return 2470;
}
}
else
@@ -24434,7 +24522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2451;
+ return 2467;
}
else
{
@@ -24442,7 +24530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2455;
+ return 2471;
}
}
}
@@ -24464,7 +24552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2452;
+ return 2468;
}
else
{
@@ -24472,7 +24560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2456;
+ return 2472;
}
}
}
@@ -24528,7 +24616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2423;
+ return 2439;
}
else
{
@@ -24536,7 +24624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2422;
+ return 2438;
}
}
}
@@ -24639,7 +24727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2500;
+ return 2516;
}
else
{
@@ -24647,7 +24735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2499;
+ return 2515;
}
}
else
@@ -24658,7 +24746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2511;
+ return 2527;
}
else
{
@@ -24668,7 +24756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2519;
+ return 2535;
}
else
{
@@ -24676,7 +24764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2518;
+ return 2534;
}
}
}
@@ -25165,8 +25253,24 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
{
case 2389: value = 2391; break; /* mov --> mova. */
case 2391: return NULL; /* mova --> NULL. */
+ case 2426: value = 2434; break; /* mov --> mova. */
+ case 2434: return NULL; /* mova --> NULL. */
+ case 2424: value = 2432; break; /* mov --> mova. */
+ case 2432: return NULL; /* mova --> NULL. */
+ case 2427: value = 2435; break; /* mov --> mova. */
+ case 2435: return NULL; /* mova --> NULL. */
+ case 2425: value = 2433; break; /* mov --> mova. */
+ case 2433: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
+ case 2422: value = 2430; break; /* mov --> mova. */
+ case 2430: return NULL; /* mova --> NULL. */
+ case 2420: value = 2428; break; /* mov --> mova. */
+ case 2428: return NULL; /* mova --> NULL. */
+ case 2423: value = 2431; break; /* mov --> mova. */
+ case 2431: return NULL; /* mova --> NULL. */
+ case 2421: value = 2429; break; /* mov --> mova. */
+ case 2429: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -25188,11 +25292,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2641; break; /* addg --> smax. */
- case 2641: value = 2642; break; /* smax --> umax. */
- case 2642: value = 2643; break; /* umax --> smin. */
- case 2643: value = 2644; break; /* smin --> umin. */
- case 2644: return NULL; /* umin --> NULL. */
+ case 19: value = 2657; break; /* addg --> smax. */
+ case 2657: value = 2658; break; /* smax --> umax. */
+ case 2658: value = 2659; break; /* umax --> smin. */
+ case 2659: value = 2660; break; /* smin --> umin. */
+ case 2660: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -25350,8 +25454,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2515; break; /* fcvt --> bfcvt. */
- case 2515: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2531; break; /* fcvt --> bfcvt. */
+ case 2531: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -25858,9 +25962,9 @@ aarch64_extract_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 214:
- case 215:
case 218:
+ case 219:
+ case 224:
return aarch64_ext_regno (self, info, code, inst, errors);
case 10:
return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -25876,7 +25980,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 226:
+ case 234:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -25922,10 +26026,10 @@ aarch64_extract_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 219:
case 225:
- case 230:
- case 231:
+ case 233:
+ case 238:
+ case 239:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -26087,21 +26191,31 @@ aarch64_extract_operand (const aarch64_operand *self,
case 211:
case 213:
return aarch64_ext_sve_reglist (self, info, code, inst, errors);
+ case 214:
+ case 215:
case 216:
case 217:
+ return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 220:
+ case 222:
+ case 226:
return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
case 221:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
- case 222:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 223:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
- case 224:
- return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 227:
case 228:
case 229:
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
+ case 230:
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 231:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ case 232:
+ return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 235:
+ case 236:
+ case 237:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 49bfd46906e..7b2cf3130c4 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -1715,6 +1715,20 @@ aarch64_ext_sve_aimm (const aarch64_operand *self,
&& decode_sve_aimm (info, (uint8_t) info->imm.value));
}
+bool
+aarch64_ext_sve_aligned_reglist (const aarch64_operand *self,
+ aarch64_opnd_info *info, aarch64_insn code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors ATTRIBUTE_UNUSED)
+{
+ unsigned int num_regs = get_operand_specific_data (self);
+ unsigned int val = extract_field (self->fields[0], code, 0);
+ info->reglist.first_regno = val * num_regs;
+ info->reglist.num_regs = num_regs;
+ info->reglist.stride = 1;
+ return true;
+}
+
/* Decode an SVE CPY/DUP immediate. */
bool
aarch64_ext_sve_asimm (const aarch64_operand *self,
@@ -1823,6 +1837,36 @@ aarch64_ext_sme_za_hv_tiles (const aarch64_operand *self,
return true;
}
+bool
+aarch64_ext_sme_za_hv_tiles_range (const aarch64_operand *self,
+ aarch64_opnd_info *info, aarch64_insn code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors
+ ATTRIBUTE_UNUSED)
+{
+ int ebytes = aarch64_get_qualifier_esize (info->qualifier);
+ int range_size = get_opcode_dependent_value (inst->opcode);
+ int fld_v = extract_field (self->fields[0], code, 0);
+ int fld_rv = extract_field (self->fields[1], code, 0);
+ int fld_zan_imm = extract_field (self->fields[2], code, 0);
+ int max_value = 16 / range_size / ebytes;
+
+ if (max_value == 0)
+ max_value = 1;
+
+ int regno = fld_zan_imm / max_value;
+ if (regno >= ebytes)
+ return false;
+
+ info->indexed_za.regno = regno;
+ info->indexed_za.index.imm = (fld_zan_imm % max_value) * range_size;
+ info->indexed_za.index.countm1 = range_size - 1;
+ info->indexed_za.index.regno = fld_rv + 12;
+ info->indexed_za.v = fld_v;
+
+ return true;
+}
+
/* Decode in SME instruction ZERO list of up to eight 64-bit element tile names
separated by commas, encoded in the "imm8" field.
@@ -1850,10 +1894,15 @@ aarch64_ext_sme_za_array (const aarch64_operand *self,
const aarch64_inst *inst ATTRIBUTE_UNUSED,
aarch64_operand_error *errors ATTRIBUTE_UNUSED)
{
- int regno = extract_field (self->fields[0], code, 0) + 12;
+ int regno = extract_field (self->fields[0], code, 0);
+ if (info->type == AARCH64_OPND_SME_ZA_array_off4)
+ regno += 12;
+ else
+ regno += 8;
int imm = extract_field (self->fields[1], code, 0);
info->indexed_za.index.regno = regno;
info->indexed_za.index.imm = imm;
+ info->indexed_za.group_size = get_opcode_dependent_value (inst->opcode);
return true;
}
@@ -2979,6 +3028,10 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
}
break;
+ case sme_size_22:
+ variant = extract_field (FLD_SME_size_22, inst->value, 0);
+ break;
+
case sve_cpy:
variant = extract_fields (inst->value, 0, 2, FLD_size, FLD_SVE_M_14);
break;
@@ -3006,6 +3059,11 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
variant = 3;
break;
+ case sme2_mov:
+ /* .D is preferred over the other sizes in disassembly. */
+ variant = 3;
+ break;
+
case sme_misc:
case sve_misc:
/* These instructions have only a single variant. */
diff --git a/opcodes/aarch64-dis.h b/opcodes/aarch64-dis.h
index 255445c9580..1d459858e0d 100644
--- a/opcodes/aarch64-dis.h
+++ b/opcodes/aarch64-dis.h
@@ -111,6 +111,7 @@ AARCH64_DECL_OPD_EXTRACTOR (ext_sve_addr_zz_lsl);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_addr_zz_sxtw);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_addr_zz_uxtw);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_aimm);
+AARCH64_DECL_OPD_EXTRACTOR (ext_sve_aligned_reglist);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_asimm);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_float_half_one);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_float_half_two);
@@ -123,6 +124,7 @@ AARCH64_DECL_OPD_EXTRACTOR (ext_sve_scale);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_shlimm);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_shrimm);
AARCH64_DECL_OPD_EXTRACTOR (ext_sme_za_hv_tiles);
+AARCH64_DECL_OPD_EXTRACTOR (ext_sme_za_hv_tiles_range);
AARCH64_DECL_OPD_EXTRACTOR (ext_sme_za_list);
AARCH64_DECL_OPD_EXTRACTOR (ext_sme_za_array);
AARCH64_DECL_OPD_EXTRACTOR (ext_sme_addr_ri_u4xvl);
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index b00b22aaaf7..f1103efd23f 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -238,13 +238,21 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REGLIST, "SVE_ZnxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zt", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "an SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SVE_ZtxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn2}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn4}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn2}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn4}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_ZAda_2b", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZAda_2b}, "an SME ZA tile ZA0-ZA3"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_ZAda_3b", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZAda_3b}, "an SME ZA tile ZA0-ZA7"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_src", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_5}, "an SME horizontal or vertical vector access register"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_srcxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_V,FLD_SME_Rv,FLD_imm3_5}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_dest", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_destxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_V,FLD_SME_Rv,FLD_imm3_0}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_PRED_REG, "SME_Pm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Pm}, "an SVE predicate register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_5", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_5}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm4_0}, "ZA array"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 1944b8fe87d..b3308955cc8 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -227,6 +227,10 @@ const aarch64_field fields[] =
{ 15, 1 }, /* SME_V: (horizontal / vertical tiles), bit 15. */
{ 0, 2 }, /* SME_ZAda_2b: tile ZA0-ZA3. */
{ 0, 3 }, /* SME_ZAda_3b: tile ZA0-ZA7. */
+ { 1, 4 }, /* SME_Zdn2: Z0-Z31, multiple of 2, bits [4:1]. */
+ { 2, 3 }, /* SME_Zdn4: Z0-Z31, multiple of 4, bits [4:2]. */
+ { 6, 4 }, /* SME_Zn2: Z0-Z31, multiple of 2, bits [9:6]. */
+ { 7, 3 }, /* SME_Zn4: Z0-Z31, multiple of 4, bits [9:7]. */
{ 23, 1 }, /* SME_i1: immediate field, bit 23. */
{ 22, 2 }, /* SME_size_22: size<1>, size<0> class field, [23:22]. */
{ 22, 1 }, /* SME_tszh: immediate and qualifier field, bit 22. */
@@ -296,6 +300,8 @@ const aarch64_field fields[] =
{ 0, 4 }, /* cond2: condition in truly conditional-executed inst. */
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
+ { 0, 3 }, /* imm3_0: general immediate in bits [2:0]. */
+ { 5, 3 }, /* imm3_5: general immediate in bits [7:5]. */
{ 10, 3 }, /* imm3_10: in add/sub extended reg instructions. */
{ 0, 4 }, /* imm4_0: in rmif instructions. */
{ 5, 4 }, /* imm4_5: in SME instructions. */
@@ -1546,6 +1552,10 @@ check_za_access (const aarch64_opnd_info *opnd,
set_other_error (mismatch_detail, idx,
_("expected a selection register in the"
" range w12-w15"));
+ else if (min_wreg == 8)
+ set_other_error (mismatch_detail, idx,
+ _("expected a selection register in the"
+ " range w8-w11"));
else
abort ();
return false;
@@ -1574,6 +1584,12 @@ check_za_access (const aarch64_opnd_info *opnd,
set_other_error (mismatch_detail, idx,
_("expected a single offset rather than"
" a range"));
+ else if (range_size == 2)
+ set_other_error (mismatch_detail, idx,
+ _("expected a range of two offsets"));
+ else if (range_size == 4)
+ set_other_error (mismatch_detail, idx,
+ _("expected a range of four offsets"));
else
abort ();
return false;
@@ -1715,9 +1731,33 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
break;
case AARCH64_OPND_CLASS_SVE_REGLIST:
- num = get_opcode_dependent_value (opcode);
- if (!check_reglist (opnd, mismatch_detail, idx, num, 1))
- return 0;
+ switch (type)
+ {
+ case AARCH64_OPND_SME_Zdnx2:
+ case AARCH64_OPND_SME_Zdnx4:
+ case AARCH64_OPND_SME_Znx2:
+ case AARCH64_OPND_SME_Znx4:
+ num = get_operand_specific_data (&aarch64_operands[type]);
+ if (!check_reglist (opnd, mismatch_detail, idx, num, 1))
+ return 0;
+ if ((opnd->reglist.first_regno % num) != 0)
+ {
+ set_other_error (mismatch_detail, idx,
+ _("start register out of range"));
+ return 0;
+ }
+ break;
+
+ case AARCH64_OPND_SVE_ZnxN:
+ case AARCH64_OPND_SVE_ZtxN:
+ num = get_opcode_dependent_value (opcode);
+ if (!check_reglist (opnd, mismatch_detail, idx, num, 1))
+ return 0;
+ break;
+
+ default:
+ abort ();
+ }
break;
case AARCH64_OPND_CLASS_ZA_ACCESS:
@@ -1739,6 +1779,25 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
return 0;
break;
+ case AARCH64_OPND_SME_ZA_array_off3_0:
+ case AARCH64_OPND_SME_ZA_array_off3_5:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 7, 1,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
+ case AARCH64_OPND_SME_ZA_HV_idx_srcxN:
+ case AARCH64_OPND_SME_ZA_HV_idx_destxN:
+ size = aarch64_get_qualifier_esize (opnd->qualifier);
+ num = get_opcode_dependent_value (opcode);
+ max_value = 16 / num / size;
+ if (max_value > 0)
+ max_value -= 1;
+ if (!check_za_access (opnd, mismatch_detail, idx,
+ 12, max_value, num, 0))
+ return 0;
+ break;
+
default:
abort ();
}
@@ -3709,6 +3768,10 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_ZnxN:
case AARCH64_OPND_SVE_ZtxN:
+ case AARCH64_OPND_SME_Zdnx2:
+ case AARCH64_OPND_SME_Zdnx4:
+ case AARCH64_OPND_SME_Znx2:
+ case AARCH64_OPND_SME_Znx4:
print_register_list (buf, size, opnd, "z", styler);
break;
@@ -3732,7 +3795,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
break;
case AARCH64_OPND_SME_ZA_HV_idx_src:
+ case AARCH64_OPND_SME_ZA_HV_idx_srcxN:
case AARCH64_OPND_SME_ZA_HV_idx_dest:
+ case AARCH64_OPND_SME_ZA_HV_idx_destxN:
case AARCH64_OPND_SME_ZA_HV_idx_ldstr:
snprintf (buf, size, "%s%s[%s, %s%s%s%s%s]%s",
opnd->type == AARCH64_OPND_SME_ZA_HV_idx_ldstr ? "{" : "",
@@ -3760,9 +3825,15 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
print_sme_za_list (buf, size, opnd->reg.regno, styler);
break;
+ case AARCH64_OPND_SME_ZA_array_off3_0:
+ case AARCH64_OPND_SME_ZA_array_off3_5:
case AARCH64_OPND_SME_ZA_array_off4:
snprintf (buf, size, "%s[%s, %s%s%s%s%s]",
- style_reg (styler, "za"),
+ style_reg (styler, "za%s%s",
+ opnd->qualifier == AARCH64_OPND_QLF_NIL ? "" : ".",
+ (opnd->qualifier == AARCH64_OPND_QLF_NIL
+ ? ""
+ : aarch64_get_qualifier_name (opnd->qualifier))),
style_reg (styler, "w%d", opnd->indexed_za.index.regno),
style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm),
opnd->indexed_za.index.countm1 ? ":" : "",
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index e142ae6ee76..c604af5124c 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -55,6 +55,10 @@ enum aarch64_field_kind
FLD_SME_V,
FLD_SME_ZAda_2b,
FLD_SME_ZAda_3b,
+ FLD_SME_Zdn2,
+ FLD_SME_Zdn4,
+ FLD_SME_Zn2,
+ FLD_SME_Zn4,
FLD_SME_i1,
FLD_SME_size_22,
FLD_SME_tszh,
@@ -124,6 +128,8 @@ enum aarch64_field_kind
FLD_cond2,
FLD_defgh,
FLD_hw,
+ FLD_imm3_0,
+ FLD_imm3_5,
FLD_imm3_10,
FLD_imm4_0,
FLD_imm4_5,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 72f3c3ced88..93e124906d8 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2477,6 +2477,9 @@ static const aarch64_feature_set aarch64_feature_sme_f64f64 =
static const aarch64_feature_set aarch64_feature_sme_i16i64 =
AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME
| AARCH64_FEATURE_SME_I16I64, 0);
+static const aarch64_feature_set aarch64_feature_sme2 =
+ AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME
+ | AARCH64_FEATURE_SME2, 0);
static const aarch64_feature_set aarch64_feature_v8_6 =
AARCH64_FEATURE (AARCH64_FEATURE_V8_6, 0);
static const aarch64_feature_set aarch64_feature_v8_7 =
@@ -2545,6 +2548,7 @@ static const aarch64_feature_set aarch64_feature_cssc =
#define SME &aarch64_feature_sme
#define SME_F64F64 &aarch64_feature_sme_f64f64
#define SME_I16I64 &aarch64_feature_sme_i16i64
+#define SME2 &aarch64_feature_sme2
#define ARMV8_6 &aarch64_feature_v8_6
#define ARMV8_6_SVE &aarch64_feature_v8_6
#define BFLOAT16_SVE &aarch64_feature_bfloat16_sve
@@ -2656,6 +2660,9 @@ static const aarch64_feature_set aarch64_feature_cssc =
#define SME_INSNC(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,CONSTRAINTS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SME, OPS, QUALS, \
F_STRICT | FLAGS, CONSTRAINTS, TIED, NULL }
+#define SME2_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
+ { NAME, OPCODE, MASK, CLASS, OP, SME2, OPS, QUALS, \
+ F_STRICT | FLAGS, 0, TIED, NULL }
#define SVE2BITPERM_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SVE2_BITPERM, OPS, QUALS, \
FLAGS | F_STRICT, 0, TIED, NULL }
@@ -5278,6 +5285,24 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_Pd, SVE_Pg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_PNd, SVE_PNg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
+ /* SME2 extensions to SME. */
+ SME2_INSN ("mov", 0xc0060800, 0xffff9f01, sme2_mov, 0, OP2 (SME_Zdnx2, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (2), 0),
+ SME2_INSN ("mov", 0xc0060c00, 0xffff9f03, sme2_mov, 0, OP2 (SME_Zdnx4, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (4), 0),
+ SME2_INSN ("mov", 0xc0060000, 0xff3f1f01, sme_size_22, 0, OP2 (SME_Zdnx2, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (2), 0),
+ SME2_INSN ("mov", 0xc0060400, 0xff3f1f03, sme_size_22, 0, OP2 (SME_Zdnx4, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (4), 0),
+ SME2_INSN ("mov", 0xc0040800, 0xffff9c38, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VV_BHSD, F_OD (2), 0),
+ SME2_INSN ("mov", 0xc0040c00, 0xffff9c78, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VV_BHSD, F_OD (4), 0),
+ SME2_INSN ("mov", 0xc0040000, 0xff3f1c38, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx2), OP_SVE_VV_BHSDQ, F_OD (2), 0),
+ SME2_INSN ("mov", 0xc0040400, 0xff3f1c78, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx4), OP_SVE_VV_BHSDQ, F_OD (4), 0),
+ SME2_INSN ("mova", 0xc0060800, 0xffff9f01, sme2_mov, 0, OP2 (SME_Zdnx2, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (2), 0),
+ SME2_INSN ("mova", 0xc0060c00, 0xffff9f03, sme2_mov, 0, OP2 (SME_Zdnx4, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (4), 0),
+ SME2_INSN ("mova", 0xc0060000, 0xff3f1f01, sme_size_22, 0, OP2 (SME_Zdnx2, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (2), 0),
+ SME2_INSN ("mova", 0xc0060400, 0xff3f1f03, sme_size_22, 0, OP2 (SME_Zdnx4, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (4), 0),
+ SME2_INSN ("mova", 0xc0040800, 0xffff9c38, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VV_BHSD, F_OD (2), 0),
+ SME2_INSN ("mova", 0xc0040c00, 0xffff9c78, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VV_BHSD, F_OD (4), 0),
+ SME2_INSN ("mova", 0xc0040000, 0xff3f1c38, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx2), OP_SVE_VV_BHSDQ, F_OD (2), 0),
+ SME2_INSN ("mova", 0xc0040400, 0xff3f1c78, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx4), OP_SVE_VV_BHSDQ, F_OD (4), 0),
+
/* SIMD Dot Product (optional in v8.2-A). */
DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
DOT_INSN ("sdot", 0xe009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
@@ -5917,6 +5942,14 @@ const struct aarch64_opcode aarch64_opcode_table[] =
"an SVE vector register") \
Y(SVE_REGLIST, sve_reglist, "SVE_ZtxN", 0, F(FLD_SVE_Zt), \
"a list of SVE vector registers") \
+ Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zdnx2", 2 << OPD_F_OD_LSB, \
+ F(FLD_SME_Zdn2), "a list of SVE vector registers") \
+ Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zdnx4", 4 << OPD_F_OD_LSB, \
+ F(FLD_SME_Zdn4), "a list of SVE vector registers") \
+ Y(SVE_REGLIST, sve_aligned_reglist, "SME_Znx2", 2 << OPD_F_OD_LSB, \
+ F(FLD_SME_Zn2), "a list of SVE vector registers") \
+ Y(SVE_REGLIST, sve_aligned_reglist, "SME_Znx4", 4 << OPD_F_OD_LSB, \
+ F(FLD_SME_Zn4), "a list of SVE vector registers") \
Y(SVE_REG, regno, "SME_ZAda_2b", 0, F(FLD_SME_ZAda_2b), \
"an SME ZA tile ZA0-ZA3") \
Y(SVE_REG, regno, "SME_ZAda_3b", 0, F(FLD_SME_ZAda_3b), \
@@ -5924,9 +5957,15 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_src", 0, \
F(FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_5), \
"an SME horizontal or vertical vector access register") \
+ Y(ZA_ACCESS, sme_za_hv_tiles_range, "SME_ZA_HV_idx_srcxN", 0, \
+ F(FLD_SME_V,FLD_SME_Rv,FLD_imm3_5), \
+ "an SME horizontal or vertical vector access register") \
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_dest", 0, \
F(FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \
"an SME horizontal or vertical vector access register") \
+ Y(ZA_ACCESS, sme_za_hv_tiles_range, "SME_ZA_HV_idx_destxN", 0, \
+ F(FLD_SME_V,FLD_SME_Rv,FLD_imm3_0), \
+ "an SME horizontal or vertical vector access register") \
Y(PRED_REG, regno, "SME_Pm", 0, F(FLD_SME_Pm), \
"an SVE predicate register") \
Y(SVE_REG, imm, "SME_list_of_64bit_tiles", 0, \
@@ -5934,6 +5973,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \
F(FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \
"an SME horizontal or vertical vector access register") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_0", 0, \
+ F(FLD_SME_Rv,FLD_imm3_0), "ZA array") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_5", 0, \
+ F(FLD_SME_Rv,FLD_imm3_5), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off4", 0, \
F(FLD_SME_Rv,FLD_imm4_0), "ZA array") \
Y(ADDRESS, sme_addr_ri_u4xvl, "SME_ADDR_RI_U4xVL", 0 << OPD_F_OD_LSB, \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 08/31] aarch64: Add the SME2 multivector LD1 and ST1 instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (6 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 07/31] aarch64: Add the SME2 MOVA instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 09/31] aarch64: Add the SME2 predicate-related instructions Richard Sandiford
` (24 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
SME2 adds LD1 and ST1 variants for lists of 2 and 4 registers.
The registers can be consecutive or strided. In the strided case,
2-register lists have a stride of 8, starting at register x0xxx.
4-register lists have a stride of 4, starting at register x00xx.
The instructions are predicated on a predicate-as-counter register in
the range pn8-pn15. Although we already had register fields with upper
bounds of 7 and 15, this is the first plain register operand to have a
nonzero lower bound. The patch uses the operand-specific data field
to record the minimum value, rather than having separate inserters
and extractors for each lower bound. This in turn required adding
an extra bit to the field.
---
gas/config/tc-aarch64.c | 11 +
gas/testsuite/gas/aarch64/sme2-2-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-2-invalid.l | 229 ++
gas/testsuite/gas/aarch64/sme2-2-invalid.s | 205 ++
gas/testsuite/gas/aarch64/sme2-2-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-2-noarch.l | 481 +++++
gas/testsuite/gas/aarch64/sme2-2.d | 489 +++++
gas/testsuite/gas/aarch64/sme2-2.s | 511 +++++
gas/testsuite/gas/aarch64/sme2-3-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-3-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-3-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-3-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-3-noarch.l | 481 +++++
gas/testsuite/gas/aarch64/sme2-3.d | 489 +++++
gas/testsuite/gas/aarch64/sme2-3.s | 511 +++++
gas/testsuite/gas/aarch64/sme2-4-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-4-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-4-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-4-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-4-noarch.l | 481 +++++
gas/testsuite/gas/aarch64/sme2-4.d | 489 +++++
gas/testsuite/gas/aarch64/sme2-4.s | 511 +++++
gas/testsuite/gas/aarch64/sme2-5-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-5-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-5-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-5-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-5-noarch.l | 481 +++++
gas/testsuite/gas/aarch64/sme2-5.d | 489 +++++
gas/testsuite/gas/aarch64/sme2-5.s | 511 +++++
include/opcode/aarch64.h | 3 +
opcodes/aarch64-asm-2.c | 44 +-
opcodes/aarch64-asm.c | 23 +-
opcodes/aarch64-asm.h | 1 +
opcodes/aarch64-dis-2.c | 2250 ++++++++++++++++----
opcodes/aarch64-dis.c | 21 +-
opcodes/aarch64-dis.h | 1 +
opcodes/aarch64-opc-2.c | 3 +
opcodes/aarch64-opc.c | 48 +-
opcodes/aarch64-opc.h | 9 +-
opcodes/aarch64-tbl.h | 136 ++
40 files changed, 8895 insertions(+), 448 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-2-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-2-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-2-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-2-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-2-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-2.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-2.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-3-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-3-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-3-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-3-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-3-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-3.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-3.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-4-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-4-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-4-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-4-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-4-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-4.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-4.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-5-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-5-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-5-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-5-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-5-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-5.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-5.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index bf9771d1010..a61ad5dab15 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -5827,6 +5827,10 @@ output_operand_error_record (const operand_error_record *record, char *str)
else if ((detail->data[0].i & -detail->data[0].i) == detail->data[0].i)
handler (_("expected a list of %d registers at operand %d -- `%s'"),
get_log2 (detail->data[0].i), idx + 1, str);
+ else if (detail->data[0].i == 0x14)
+ handler (_("expected a list of %d or %d registers at"
+ " operand %d -- `%s'"),
+ 2, 4, idx + 1, str);
else
handler (_("invalid number of registers in the list"
" at operand %d -- `%s'"), idx + 1, str);
@@ -5836,6 +5840,10 @@ output_operand_error_record (const operand_error_record *record, char *str)
if (detail->data[0].i == (1 << 1))
handler (_("the register list must have a stride of %d"
" at operand %d -- `%s'"), 1, idx + 1, str);
+ else if (detail->data[0].i == 0x12 || detail->data[0].i == 0x102)
+ handler (_("the register list must have a stride of %d or %d"
+ " at operand %d -- `%s`"), 1,
+ detail->data[0].i == 0x12 ? 4 : 8, idx + 1, str);
else
handler (_("invalid register stride at operand %d -- `%s'"),
idx + 1, str);
@@ -6630,6 +6638,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_PNg4_10:
case AARCH64_OPND_SVE_PNn:
case AARCH64_OPND_SVE_PNt:
+ case AARCH64_OPND_SME_PNg3:
reg_type = REG_TYPE_PN;
goto vector_reg;
@@ -6716,6 +6725,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SME_Zdnx4:
case AARCH64_OPND_SME_Znx2:
case AARCH64_OPND_SME_Znx4:
+ case AARCH64_OPND_SME_Ztx2_STRIDED:
+ case AARCH64_OPND_SME_Ztx4_STRIDED:
reg_type = REG_TYPE_Z;
goto vector_reg_list;
diff --git a/gas/testsuite/gas/aarch64/sme2-2-invalid.d b/gas/testsuite/gas/aarch64/sme2-2-invalid.d
new file mode 100644
index 00000000000..a040f54c0ba
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-2-invalid.s
+#error_output: sme2-2-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-2-invalid.l
new file mode 100644
index 00000000000..8f2801f4115
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-invalid.l
@@ -0,0 +1,229 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1b 0,pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1b {z0\.b-z1\.b},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b-z2\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z2\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z1\.b},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8/m,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8\.b,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn7/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-18,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#13,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#16,mul vl\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z4\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z2\.b-z5\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z3\.b-z6\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z3\.b},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8/m,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8\.b,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn0/z,\[x0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn7/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#4\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-36,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-30,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-14,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#25,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#26,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#27,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#30,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#32,mul vl\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z8\.b,z16\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z2\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z3\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z4\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z5\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z6\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z7\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z9\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z15\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z16\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z23\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z24\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z31\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z16\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z9\.b,z17\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z10\.b,z18\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z11\.b,z19\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z12\.b,z20\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z13\.b,z21\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z14\.b,z22\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z15\.b,z23\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z24\.b,z0\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z25\.b,z1\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z26\.b,z2\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z27\.b,z3\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z28\.b,z4\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z29\.b,z5\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z30\.b,z6\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z31\.b,z7\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z8\.b,z0\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.h,z8\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z8\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z8\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `ld1b {z0,z8},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z8\.b},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-17,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#13,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#16,mul vl\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z4\.b,z8\.b,z12\.b,z16\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z5\.b,z9\.b,z13\.b,z17\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z6\.b,z10\.b,z14\.b,z18\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z7\.b,z11\.b,z15\.b,z19\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z12\.b,z16\.b,z20\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z9\.b,z13\.b,z17\.b,z21\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z10\.b,z14\.b,z18\.b,z22\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z11\.b,z15\.b,z19\.b,z23\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z12\.b,z16\.b,z20\.b,z24\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z13\.b,z17\.b,z21\.b,z25\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z14\.b,z18\.b,z22\.b,z26\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z15\.b,z19\.b,z23\.b,z27\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z20\.b,z24\.b,z28\.b,z0\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z2\.b,z4\.b,z6\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z3\.b,z6\.b,z9\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z8\.b,z16\.b,z24\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z4\.b,z5\.b,z6\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z9\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z1\.b,z3\.b,z7\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.h,z4\.h,z8\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-64,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-36,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#25,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#26,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#27,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#32,mul vl\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b-z2\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z2\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z1\.b},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8/m,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8\.b,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn0/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn7/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[w0,w1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[xzr,x1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[sp,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,w1,sxtw\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,w1,uxtw\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z4\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z2\.b-z5\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z3\.b-z6\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z3\.b},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8/m,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8\.b,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn0/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn7/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[w0,w1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[xzr,x1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[sp,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,w1,sxtw\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,w1,uxtw\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z2\.b},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z3\.b},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z4\.b},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z16\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z24\.b,z0\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z8\.b,z0\.b},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z8\.h},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z8\.b},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[w0,w30\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[xzr,xzr\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z4\.b,z8\.b,z12\.b,z16\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z20\.b,z24\.b,z28\.b,z0\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[w0,w30\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[xzr,xzr\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-2-invalid.s b/gas/testsuite/gas/aarch64/sme2-2-invalid.s
new file mode 100644
index 00000000000..43e9e97b51b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-invalid.s
@@ -0,0 +1,205 @@
+ ld1b 0, pn8/z, [x0]
+ ld1b { z0.b - z1.b }, 0, [x0]
+ ld1b { z0.b - z1.b }, pn8/z, 0
+
+ ld1b { z0.b }, pn8/z, [x0]
+ ld1b { z0.b - z2.b }, pn8/z, [x0]
+ ld1b { z1.b - z2.b }, pn8/z, [x0]
+ ld1b { z0.b - z1.b }, p8/z, [x0]
+ ld1b { z0.b - z1.b }, pn8, [x0]
+ ld1b { z0.b - z1.b }, pn8/m, [x0]
+ ld1b { z0.b - z1.b }, pn8.b, [x0]
+ ld1b { z0.b - z1.b }, pn7/z, [x0]
+ ld1b { z0.b - z1.b }, pn8/z, [w0]
+ ld1b { z0.b - z1.b }, pn8/z, [xzr]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #1]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-32, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-18, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-15, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-1, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #1, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #13, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #15, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #16, mul vl]
+
+ ld1b { z1.b - z4.b }, pn8/z, [x0]
+ ld1b { z2.b - z5.b }, pn8/z, [x0]
+ ld1b { z3.b - z6.b }, pn8/z, [x0]
+ ld1b { z0.b - z3.b }, p8/z, [x0]
+ ld1b { z0.b - z3.b }, pn8, [x0]
+ ld1b { z0.b - z3.b }, pn8/m, [x0]
+ ld1b { z0.b - z3.b }, pn8.b, [x0]
+ ld1b { z0.b - z3.b }, pn0/z, [x0]
+ ld1b { z0.b - z3.b }, pn7/z, [x0]
+ ld1b { z0.b - z3.b }, pn8/z, [w0]
+ ld1b { z0.b - z3.b }, pn8/z, [xzr]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #4]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-36, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-31, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-30, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-29, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-14, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-3, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-2, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-1, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #1, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #2, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #3, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #14, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #25, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #26, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #27, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #29, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #30, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #31, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #32, mul vl]
+
+ ld1b { z0.b, z8.b, z16.s }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.s }, pn8/z, [x0]
+
+ ld1b { z0.b, z2.b }, pn8/z, [x0]
+ ld1b { z0.b, z3.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b }, pn8/z, [x0]
+ ld1b { z0.b, z5.b }, pn8/z, [x0]
+ ld1b { z0.b, z6.b }, pn8/z, [x0]
+ ld1b { z0.b, z7.b }, pn8/z, [x0]
+ ld1b { z0.b, z9.b }, pn8/z, [x0]
+ ld1b { z0.b, z15.b }, pn8/z, [x0]
+ ld1b { z0.b, z16.b }, pn8/z, [x0]
+ ld1b { z0.b, z23.b }, pn8/z, [x0]
+ ld1b { z0.b, z24.b }, pn8/z, [x0]
+ ld1b { z0.b, z31.b }, pn8/z, [x0]
+ ld1b { z8.b, z16.b }, pn8/z, [x0]
+ ld1b { z9.b, z17.b }, pn8/z, [x0]
+ ld1b { z10.b, z18.b }, pn8/z, [x0]
+ ld1b { z11.b, z19.b }, pn8/z, [x0]
+ ld1b { z12.b, z20.b }, pn8/z, [x0]
+ ld1b { z13.b, z21.b }, pn8/z, [x0]
+ ld1b { z14.b, z22.b }, pn8/z, [x0]
+ ld1b { z15.b, z23.b }, pn8/z, [x0]
+ ld1b { z24.b, z0.b }, pn8/z, [x0]
+ ld1b { z25.b, z1.b }, pn8/z, [x0]
+ ld1b { z26.b, z2.b }, pn8/z, [x0]
+ ld1b { z27.b, z3.b }, pn8/z, [x0]
+ ld1b { z28.b, z4.b }, pn8/z, [x0]
+ ld1b { z29.b, z5.b }, pn8/z, [x0]
+ ld1b { z30.b, z6.b }, pn8/z, [x0]
+ ld1b { z31.b, z7.b }, pn8/z, [x0]
+ ld1b { z8.b, z0.b }, pn8/z, [x0]
+ ld1b { z0.h, z8.b }, pn8/z, [x0]
+ ld1b { z0.b, z8.h }, pn8/z, [x0]
+ ld1b { z0.h, z8.h }, pn8/z, [x0]
+ ld1b { z0, z8 }, pn8/z, [x0]
+ ld1b { z0.b, z8.b }, p8/z, [x0]
+ ld1b { z0.b, z8.b }, pn8/z, [w0]
+ ld1b { z0.b, z8.b }, pn8/z, [xzr]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-16]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-1]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-32, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-17, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-15, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-1, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #13, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #15, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #16, mul vl]
+
+ ld1b { z4.b, z8.b, z12.b, z16.b }, pn8/z, [x0]
+ ld1b { z5.b, z9.b, z13.b, z17.b }, pn8/z, [x0]
+ ld1b { z6.b, z10.b, z14.b, z18.b }, pn8/z, [x0]
+ ld1b { z7.b, z11.b, z15.b, z19.b }, pn8/z, [x0]
+ ld1b { z8.b, z12.b, z16.b, z20.b }, pn8/z, [x0]
+ ld1b { z9.b, z13.b, z17.b, z21.b }, pn8/z, [x0]
+ ld1b { z10.b, z14.b, z18.b, z22.b }, pn8/z, [x0]
+ ld1b { z11.b, z15.b, z19.b, z23.b }, pn8/z, [x0]
+ ld1b { z12.b, z16.b, z20.b, z24.b }, pn8/z, [x0]
+ ld1b { z13.b, z17.b, z21.b, z25.b }, pn8/z, [x0]
+ ld1b { z14.b, z18.b, z22.b, z26.b }, pn8/z, [x0]
+ ld1b { z15.b, z19.b, z23.b, z27.b }, pn8/z, [x0]
+ ld1b { z20.b, z24.b, z28.b, z0.b }, pn8/z, [x0]
+ ld1b { z0.b, z2.b, z4.b, z6.b }, pn8/z, [x0]
+ ld1b { z0.b, z3.b, z6.b, z9.b }, pn8/z, [x0]
+ ld1b { z0.b, z8.b, z16.b, z24.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z5.b, z6.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z9.b }, pn8/z, [x0]
+ ld1b { z0.b, z1.b, z3.b, z7.b }, pn8/z, [x0]
+ ld1b { z0.h, z4.h, z8.b, z12.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.h, z12.h }, pn8/z, [x0]
+ ld1b { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, p8/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [w0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [xzr]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-32]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-64, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-36, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-31, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-3, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-2, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-1, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #1, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #2, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #3, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #25, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #26, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #27, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #29, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #32, mul vl]
+
+ ld1b { z0.b - z2.b }, pn8/z, [x0, x1]
+ ld1b { z1.b - z2.b }, pn8/z, [x0, x1]
+ ld1b { z0.b - z1.b }, p8/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8/m, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8.b, [x0, x1]
+ ld1b { z0.b - z1.b }, pn0/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn7/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8/z, [w0, w1]
+ ld1b { z0.b - z1.b }, pn8/z, [xzr, x1]
+ ld1b { z0.b - z1.b }, pn8/z, [sp, sp]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #1]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #2]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #3]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #4]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, w1, sxtw]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, w1, uxtw]
+
+ ld1b { z1.b - z4.b }, pn8/z, [x0, x1]
+ ld1b { z2.b - z5.b }, pn8/z, [x0, x1]
+ ld1b { z3.b - z6.b }, pn8/z, [x0, x1]
+ ld1b { z0.b - z3.b }, p8/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8/m, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8.b, [x0, x1]
+ ld1b { z0.b - z3.b }, pn0/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn7/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8/z, [w0, w1]
+ ld1b { z0.b - z3.b }, pn8/z, [xzr, x1]
+ ld1b { z0.b - z3.b }, pn8/z, [sp, sp]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #1]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #2]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #3]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #4]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, w1, sxtw]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, w1, uxtw]
+
+ ld1b { z0.b, z2.b }, pn8/z, [x0, x1]
+ ld1b { z0.b, z3.b }, pn8/z, [x0, x1]
+ ld1b { z0.b, z4.b }, pn8/z, [x0, x1]
+ ld1b { z8.b, z16.b }, pn8/z, [x0, x1]
+ ld1b { z24.b, z0.b }, pn8/z, [x0, x1]
+ ld1b { z8.b, z0.b }, pn8/z, [x0, x1]
+ ld1b { z0.h, z8.h }, pn8/z, [x0, x1]
+ ld1b { z0.b, z8.b }, p8/z, [x0, x1]
+ ld1b { z0.b, z8.b }, pn8/z, [w0, w30]
+ ld1b { z0.b, z8.b }, pn8/z, [xzr, xzr]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, sp]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, x1, lsl #1]
+
+ ld1b { z4.b, z8.b, z12.b, z16.b }, pn8/z, [x0, x1]
+ ld1b { z20.b, z24.b, z28.b, z0.b }, pn8/z, [x0, x1]
+ ld1b { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, p8/z, [x0, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [w0, w30]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [xzr, xzr]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, sp]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, x1, lsl #1]
diff --git a/gas/testsuite/gas/aarch64/sme2-2-noarch.d b/gas/testsuite/gas/aarch64/sme2-2-noarch.d
new file mode 100644
index 00000000000..ac339fb2574
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-2.s
+#error_output: sme2-2-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-2-noarch.l
new file mode 100644
index 00000000000..48b6049c8a6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-noarch.l
@@ -0,0 +1,481 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z1\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z30\.b-z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z12\.b-z13\.b},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z3\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z28\.b-z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z8\.b-z11\.b},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z8\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z9\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z10\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z4\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z6\.b,z14\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z7\.b,z15\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z24\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z25\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z26\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z27\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z20\.b,z28\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z21\.b,z29\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z22\.b,z30\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z23\.b,z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z1\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z30\.b-z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z14\.b-z15\.b},pn9/z,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z3\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z28\.b-z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z8\.b-z11\.b},pn11/z,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z8\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z9\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z10\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z4\.b,z12\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z6\.b,z14\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z7\.b,z15\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z24\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z25\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z26\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z27\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z20\.b,z28\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z21\.b,z29\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z22\.b,z30\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z23\.b,z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn14/z,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11/z,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z1\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z30\.b-z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z12\.b-z13\.b},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z3\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z28\.b-z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z8\.b-z11\.b},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z8\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z9\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z10\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z4\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z6\.b,z14\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z7\.b,z15\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z24\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z25\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z26\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z27\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z20\.b,z28\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z21\.b,z29\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z22\.b,z30\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z23\.b,z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z1\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z30\.b-z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z14\.b-z15\.b},pn9/z,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z3\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z28\.b-z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z8\.b-z11\.b},pn11/z,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z8\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z9\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z10\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z4\.b,z12\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z6\.b,z14\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z7\.b,z15\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z24\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z25\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z26\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z27\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z20\.b,z28\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z21\.b,z29\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z22\.b,z30\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z23\.b,z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn14/z,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11/z,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z1\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z30\.b-z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z12\.b-z13\.b},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z3\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z28\.b-z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z8\.b-z11\.b},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z8\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z9\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z10\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z4\.b,z12\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z6\.b,z14\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z7\.b,z15\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z24\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z25\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z26\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z27\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z20\.b,z28\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z21\.b,z29\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z22\.b,z30\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z23\.b,z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z1\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z30\.b-z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z14\.b-z15\.b},pn9,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z3\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z28\.b-z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z8\.b-z11\.b},pn11,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z8\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z9\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z10\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z4\.b,z12\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z6\.b,z14\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z7\.b,z15\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z24\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z25\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z26\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z27\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z20\.b,z28\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z21\.b,z29\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z22\.b,z30\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z23\.b,z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn14,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z1\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z30\.b-z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z12\.b-z13\.b},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z3\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z28\.b-z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z8\.b-z11\.b},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z8\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z9\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z10\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z4\.b,z12\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z6\.b,z14\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z7\.b,z15\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z24\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z25\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z26\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z27\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z20\.b,z28\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z21\.b,z29\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z22\.b,z30\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z23\.b,z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z1\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z30\.b-z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z14\.b-z15\.b},pn9,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z3\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z28\.b-z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z8\.b-z11\.b},pn11,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z8\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z9\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z10\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z4\.b,z12\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z6\.b,z14\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z7\.b,z15\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z24\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z25\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z26\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z27\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z20\.b,z28\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z21\.b,z29\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z22\.b,z30\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z23\.b,z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn14,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11,\[x4,x6\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-2.d b/gas/testsuite/gas/aarch64/sme2-2.d
new file mode 100644
index 00000000000..acaa80c9e1f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2.d
@@ -0,0 +1,489 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: a0400000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a0400000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a0400000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a040001e ld1b {z30\.b-z31\.b}, pn8/z, \[x0\]
+[^:]+: a0401c00 ld1b {z0\.b-z1\.b}, pn15/z, \[x0\]
+[^:]+: a04003c0 ld1b {z0\.b-z1\.b}, pn8/z, \[x30\]
+[^:]+: a04003e0 ld1b {z0\.b-z1\.b}, pn8/z, \[sp\]
+[^:]+: a0480000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0470000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b156c ld1b {z12\.b-z13\.b}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a0408000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a0408000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a0408000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a040801c ld1b {z28\.b-z31\.b}, pn8/z, \[x0\]
+[^:]+: a0409c00 ld1b {z0\.b-z3\.b}, pn15/z, \[x0\]
+[^:]+: a04083c0 ld1b {z0\.b-z3\.b}, pn8/z, \[x30\]
+[^:]+: a04083e0 ld1b {z0\.b-z3\.b}, pn8/z, \[sp\]
+[^:]+: a0488000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a0478000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a0458e28 ld1b {z8\.b-z11\.b}, pn11/z, \[x17, #20, mul vl\]
+[^:]+: a1400000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400001 ld1b {z1\.b, z9\.b}, pn8/z, \[x0\]
+[^:]+: a1400002 ld1b {z2\.b, z10\.b}, pn8/z, \[x0\]
+[^:]+: a1400003 ld1b {z3\.b, z11\.b}, pn8/z, \[x0\]
+[^:]+: a1400004 ld1b {z4\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1400005 ld1b {z5\.b, z13\.b}, pn8/z, \[x0\]
+[^:]+: a1400006 ld1b {z6\.b, z14\.b}, pn8/z, \[x0\]
+[^:]+: a1400007 ld1b {z7\.b, z15\.b}, pn8/z, \[x0\]
+[^:]+: a1400010 ld1b {z16\.b, z24\.b}, pn8/z, \[x0\]
+[^:]+: a1400011 ld1b {z17\.b, z25\.b}, pn8/z, \[x0\]
+[^:]+: a1400012 ld1b {z18\.b, z26\.b}, pn8/z, \[x0\]
+[^:]+: a1400013 ld1b {z19\.b, z27\.b}, pn8/z, \[x0\]
+[^:]+: a1400014 ld1b {z20\.b, z28\.b}, pn8/z, \[x0\]
+[^:]+: a1400015 ld1b {z21\.b, z29\.b}, pn8/z, \[x0\]
+[^:]+: a1400016 ld1b {z22\.b, z30\.b}, pn8/z, \[x0\]
+[^:]+: a1400017 ld1b {z23\.b, z31\.b}, pn8/z, \[x0\]
+[^:]+: a1401c00 ld1b {z0\.b, z8\.b}, pn15/z, \[x0\]
+[^:]+: a14003c0 ld1b {z0\.b, z8\.b}, pn8/z, \[x30\]
+[^:]+: a14003e0 ld1b {z0\.b, z8\.b}, pn8/z, \[sp\]
+[^:]+: a1480000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a1470000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1430ac3 ld1b {z3\.b, z11\.b}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a1408000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408001 ld1b {z1\.b, z5\.b, z9\.b, z13\.b}, pn8/z, \[x0\]
+[^:]+: a1408002 ld1b {z2\.b, z6\.b, z10\.b, z14\.b}, pn8/z, \[x0\]
+[^:]+: a1408003 ld1b {z3\.b, z7\.b, z11\.b, z15\.b}, pn8/z, \[x0\]
+[^:]+: a1408010 ld1b {z16\.b, z20\.b, z24\.b, z28\.b}, pn8/z, \[x0\]
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+[^:]+: a12103e8 stnt1b {z0\.b, z8\.b}, pn8, \[sp, x1\]
+[^:]+: a13e0008 stnt1b {z0\.b, z8\.b}, pn8, \[x0, x30\]
+[^:]+: a13f0008 stnt1b {z0\.b, z8\.b}, pn8, \[x0, xzr\]
+[^:]+: a13819ed stnt1b {z5\.b, z13\.b}, pn14, \[x15, x24\]
+[^:]+: a1218008 stnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8, \[x0, x1\]
+[^:]+: a1218008 stnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8, \[x0, x1\]
+[^:]+: a1218008 stnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8, \[x0, x1\]
+[^:]+: a1218009 stnt1b {z1\.b, z5\.b, z9\.b, z13\.b}, pn8, \[x0, x1\]
+[^:]+: a121800a stnt1b {z2\.b, z6\.b, z10\.b, z14\.b}, pn8, \[x0, x1\]
+[^:]+: a121800b stnt1b {z3\.b, z7\.b, z11\.b, z15\.b}, pn8, \[x0, x1\]
+[^:]+: a1218018 stnt1b {z16\.b, z20\.b, z24\.b, z28\.b}, pn8, \[x0, x1\]
+[^:]+: a1218019 stnt1b {z17\.b, z21\.b, z25\.b, z29\.b}, pn8, \[x0, x1\]
+[^:]+: a121801a stnt1b {z18\.b, z22\.b, z26\.b, z30\.b}, pn8, \[x0, x1\]
+[^:]+: a121801b stnt1b {z19\.b, z23\.b, z27\.b, z31\.b}, pn8, \[x0, x1\]
+[^:]+: a1219c08 stnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn15, \[x0, x1\]
+[^:]+: a12183c8 stnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8, \[x30, x1\]
+[^:]+: a12183e8 stnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8, \[sp, x1\]
+[^:]+: a13e8008 stnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8, \[x0, x30\]
+[^:]+: a13f8008 stnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8, \[x0, xzr\]
+[^:]+: a1268c99 stnt1b {z17\.b, z21\.b, z25\.b, z29\.b}, pn11, \[x4, x6\]
diff --git a/gas/testsuite/gas/aarch64/sme2-2.s b/gas/testsuite/gas/aarch64/sme2-2.s
new file mode 100644
index 00000000000..980718ce431
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2.s
@@ -0,0 +1,511 @@
+ ld1b { z0.b - z1.b }, pn8/z, [x0]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #0, mul vl]
+ LD1B { Z0.B - Z1.B }, PN8/Z, [X0]
+ ld1b { z30.b - z31.b }, pn8/z, [x0]
+ ld1b { z0.b - z1.b }, pn15/z, [x0]
+ ld1b { z0.b - z1.b }, pn8/z, [x30]
+ ld1b { z0.b - z1.b }, pn8/z, [sp]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-16, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #14, mul vl]
+ ld1b { z12.b - z13.b }, pn13/z, [x11, #-10, mul vl]
+
+ ld1b { z0.b - z3.b }, pn8/z, [x0]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #0, mul vl]
+ LD1B { Z0.B - Z3.B }, PN8/Z, [X0]
+ ld1b { z28.b - z31.b }, pn8/z, [x0]
+ ld1b { z0.b - z3.b }, pn15/z, [x0]
+ ld1b { z0.b - z3.b }, pn8/z, [x30]
+ ld1b { z0.b - z3.b }, pn8/z, [sp]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-32, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #28, mul vl]
+ ld1b { z8.b - z11.b }, pn11/z, [x17, #20, mul vl]
+
+ ld1b { z0.b, z8.b }, pn8/z, [x0]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #0, mul vl]
+ LD1B { Z0.B, Z8.B }, PN8/Z, [X0]
+ ld1b { z1.b, z9.b }, pn8/z, [x0]
+ ld1b { z2.b, z10.b }, pn8/z, [x0]
+ ld1b { z3.b, z11.b }, pn8/z, [x0]
+ ld1b { z4.b, z12.b }, pn8/z, [x0]
+ ld1b { z5.b, z13.b }, pn8/z, [x0]
+ ld1b { z6.b, z14.b }, pn8/z, [x0]
+ ld1b { z7.b, z15.b }, pn8/z, [x0]
+ ld1b { z16.b, z24.b }, pn8/z, [x0]
+ ld1b { z17.b, z25.b }, pn8/z, [x0]
+ ld1b { z18.b, z26.b }, pn8/z, [x0]
+ ld1b { z19.b, z27.b }, pn8/z, [x0]
+ ld1b { z20.b, z28.b }, pn8/z, [x0]
+ ld1b { z21.b, z29.b }, pn8/z, [x0]
+ ld1b { z22.b, z30.b }, pn8/z, [x0]
+ ld1b { z23.b, z31.b }, pn8/z, [x0]
+ ld1b { z0.b, z8.b }, pn15/z, [x0]
+ ld1b { z0.b, z8.b }, pn8/z, [x30]
+ ld1b { z0.b, z8.b }, pn8/z, [sp]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-16, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #14, mul vl]
+ ld1b { z3.b, z11.b }, pn10/z, [x22, #6, mul vl]
+
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #0, mul vl]
+ LD1B { Z0.B, Z4.B, Z8.B, Z12.B }, PN8/Z, [X0]
+ ld1b { z1.b, z5.b, z9.b, z13.b }, pn8/z, [x0]
+ ld1b { z2.b, z6.b, z10.b, z14.b }, pn8/z, [x0]
+ ld1b { z3.b, z7.b, z11.b, z15.b }, pn8/z, [x0]
+ ld1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [x0]
+ ld1b { z17.b, z21.b, z25.b, z29.b }, pn8/z, [x0]
+ ld1b { z18.b, z22.b, z26.b, z30.b }, pn8/z, [x0]
+ ld1b { z19.b, z23.b, z27.b, z31.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn15/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x30]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [sp]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-32, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #28, mul vl]
+ ld1b { z2.b, z6.b, z10.b, z14.b }, pn14/z, [x29, #8, mul vl]
+
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #0]
+ LD1B { Z0.B - Z1.B }, PN8/Z, [X0, X1]
+ ld1b { z30.b - z31.b }, pn8/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn15/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8/z, [x30, x1]
+ ld1b { z0.b - z1.b }, pn8/z, [sp, x1]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x30]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, xzr]
+ ld1b { z14.b - z15.b }, pn9/z, [x26, x3]
+
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #0]
+ LD1B { Z0.B - Z3.B }, PN8/Z, [X0, X1]
+ ld1b { z28.b - z31.b }, pn8/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn15/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8/z, [x30, x1]
+ ld1b { z0.b - z3.b }, pn8/z, [sp, x1]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x30]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, xzr]
+ ld1b { z8.b - z11.b }, pn11/z, [x27, x1]
+
+ ld1b { z0.b, z8.b }, pn8/z, [x0, x1]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, x1, lsl #0]
+ LD1B { Z0.B, Z8.B }, PN8/Z, [X0, X1]
+ ld1b { z1.b, z9.b }, pn8/z, [x0, x1]
+ ld1b { z2.b, z10.b }, pn8/z, [x0, x1]
+ ld1b { z3.b, z11.b }, pn8/z, [x0, x1]
+ ld1b { z4.b, z12.b }, pn8/z, [x0, x1]
+ ld1b { z5.b, z13.b }, pn8/z, [x0, x1]
+ ld1b { z6.b, z14.b }, pn8/z, [x0, x1]
+ ld1b { z7.b, z15.b }, pn8/z, [x0, x1]
+ ld1b { z16.b, z24.b }, pn8/z, [x0, x1]
+ ld1b { z17.b, z25.b }, pn8/z, [x0, x1]
+ ld1b { z18.b, z26.b }, pn8/z, [x0, x1]
+ ld1b { z19.b, z27.b }, pn8/z, [x0, x1]
+ ld1b { z20.b, z28.b }, pn8/z, [x0, x1]
+ ld1b { z21.b, z29.b }, pn8/z, [x0, x1]
+ ld1b { z22.b, z30.b }, pn8/z, [x0, x1]
+ ld1b { z23.b, z31.b }, pn8/z, [x0, x1]
+ ld1b { z0.b, z8.b }, pn15/z, [x0, x1]
+ ld1b { z0.b, z8.b }, pn8/z, [x30, x1]
+ ld1b { z0.b, z8.b }, pn8/z, [sp, x1]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, x30]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, xzr]
+ ld1b { z5.b, z13.b }, pn14/z, [x15, x24]
+
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, x1, lsl #0]
+ LD1B { Z0.B, Z4.B, Z8.B, Z12.B }, PN8/Z, [X0, X1]
+ ld1b { z1.b, z5.b, z9.b, z13.b }, pn8/z, [x0, x1]
+ ld1b { z2.b, z6.b, z10.b, z14.b }, pn8/z, [x0, x1]
+ ld1b { z3.b, z7.b, z11.b, z15.b }, pn8/z, [x0, x1]
+ ld1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [x0, x1]
+ ld1b { z17.b, z21.b, z25.b, z29.b }, pn8/z, [x0, x1]
+ ld1b { z18.b, z22.b, z26.b, z30.b }, pn8/z, [x0, x1]
+ ld1b { z19.b, z23.b, z27.b, z31.b }, pn8/z, [x0, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn15/z, [x0, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x30, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [sp, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, x30]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, xzr]
+ ld1b { z17.b, z21.b, z25.b, z29.b }, pn11/z, [x4, x6]
+
+ ldnt1b { z0.b - z1.b }, pn8/z, [x0]
+ ldnt1b { z0.b - z1.b }, pn8/z, [x0, #0, mul vl]
+ LDNT1B { Z0.B - Z1.B }, PN8/Z, [X0]
+ ldnt1b { z30.b - z31.b }, pn8/z, [x0]
+ ldnt1b { z0.b - z1.b }, pn15/z, [x0]
+ ldnt1b { z0.b - z1.b }, pn8/z, [x30]
+ ldnt1b { z0.b - z1.b }, pn8/z, [sp]
+ ldnt1b { z0.b - z1.b }, pn8/z, [x0, #-16, mul vl]
+ ldnt1b { z0.b - z1.b }, pn8/z, [x0, #14, mul vl]
+ ldnt1b { z12.b - z13.b }, pn13/z, [x11, #-10, mul vl]
+
+ ldnt1b { z0.b - z3.b }, pn8/z, [x0]
+ ldnt1b { z0.b - z3.b }, pn8/z, [x0, #0, mul vl]
+ LDNT1B { Z0.B - Z3.B }, PN8/Z, [X0]
+ ldnt1b { z28.b - z31.b }, pn8/z, [x0]
+ ldnt1b { z0.b - z3.b }, pn15/z, [x0]
+ ldnt1b { z0.b - z3.b }, pn8/z, [x30]
+ ldnt1b { z0.b - z3.b }, pn8/z, [sp]
+ ldnt1b { z0.b - z3.b }, pn8/z, [x0, #-32, mul vl]
+ ldnt1b { z0.b - z3.b }, pn8/z, [x0, #28, mul vl]
+ ldnt1b { z8.b - z11.b }, pn11/z, [x17, #20, mul vl]
+
+ ldnt1b { z0.b, z8.b }, pn8/z, [x0]
+ ldnt1b { z0.b, z8.b }, pn8/z, [x0, #0, mul vl]
+ LDNT1B { Z0.B, Z8.B }, PN8/Z, [X0]
+ ldnt1b { z1.b, z9.b }, pn8/z, [x0]
+ ldnt1b { z2.b, z10.b }, pn8/z, [x0]
+ ldnt1b { z3.b, z11.b }, pn8/z, [x0]
+ ldnt1b { z4.b, z12.b }, pn8/z, [x0]
+ ldnt1b { z5.b, z13.b }, pn8/z, [x0]
+ ldnt1b { z6.b, z14.b }, pn8/z, [x0]
+ ldnt1b { z7.b, z15.b }, pn8/z, [x0]
+ ldnt1b { z16.b, z24.b }, pn8/z, [x0]
+ ldnt1b { z17.b, z25.b }, pn8/z, [x0]
+ ldnt1b { z18.b, z26.b }, pn8/z, [x0]
+ ldnt1b { z19.b, z27.b }, pn8/z, [x0]
+ ldnt1b { z20.b, z28.b }, pn8/z, [x0]
+ ldnt1b { z21.b, z29.b }, pn8/z, [x0]
+ ldnt1b { z22.b, z30.b }, pn8/z, [x0]
+ ldnt1b { z23.b, z31.b }, pn8/z, [x0]
+ ldnt1b { z0.b, z8.b }, pn15/z, [x0]
+ ldnt1b { z0.b, z8.b }, pn8/z, [x30]
+ ldnt1b { z0.b, z8.b }, pn8/z, [sp]
+ ldnt1b { z0.b, z8.b }, pn8/z, [x0, #-16, mul vl]
+ ldnt1b { z0.b, z8.b }, pn8/z, [x0, #14, mul vl]
+ ldnt1b { z3.b, z11.b }, pn10/z, [x22, #6, mul vl]
+
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #0, mul vl]
+ LDNT1B { Z0.B, Z4.B, Z8.B, Z12.B }, PN8/Z, [X0]
+ ldnt1b { z1.b, z5.b, z9.b, z13.b }, pn8/z, [x0]
+ ldnt1b { z2.b, z6.b, z10.b, z14.b }, pn8/z, [x0]
+ ldnt1b { z3.b, z7.b, z11.b, z15.b }, pn8/z, [x0]
+ ldnt1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [x0]
+ ldnt1b { z17.b, z21.b, z25.b, z29.b }, pn8/z, [x0]
+ ldnt1b { z18.b, z22.b, z26.b, z30.b }, pn8/z, [x0]
+ ldnt1b { z19.b, z23.b, z27.b, z31.b }, pn8/z, [x0]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn15/z, [x0]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x30]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [sp]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-32, mul vl]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #28, mul vl]
+ ldnt1b { z2.b, z6.b, z10.b, z14.b }, pn14/z, [x29, #8, mul vl]
+
+ ldnt1b { z0.b - z1.b }, pn8/z, [x0, x1]
+ ldnt1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #0]
+ LDNT1B { Z0.B - Z1.B }, PN8/Z, [X0, X1]
+ ldnt1b { z30.b - z31.b }, pn8/z, [x0, x1]
+ ldnt1b { z0.b - z1.b }, pn15/z, [x0, x1]
+ ldnt1b { z0.b - z1.b }, pn8/z, [x30, x1]
+ ldnt1b { z0.b - z1.b }, pn8/z, [sp, x1]
+ ldnt1b { z0.b - z1.b }, pn8/z, [x0, x30]
+ ldnt1b { z0.b - z1.b }, pn8/z, [x0, xzr]
+ ldnt1b { z14.b - z15.b }, pn9/z, [x26, x3]
+
+ ldnt1b { z0.b - z3.b }, pn8/z, [x0, x1]
+ ldnt1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #0]
+ LDNT1B { Z0.B - Z3.B }, PN8/Z, [X0, X1]
+ ldnt1b { z28.b - z31.b }, pn8/z, [x0, x1]
+ ldnt1b { z0.b - z3.b }, pn15/z, [x0, x1]
+ ldnt1b { z0.b - z3.b }, pn8/z, [x30, x1]
+ ldnt1b { z0.b - z3.b }, pn8/z, [sp, x1]
+ ldnt1b { z0.b - z3.b }, pn8/z, [x0, x30]
+ ldnt1b { z0.b - z3.b }, pn8/z, [x0, xzr]
+ ldnt1b { z8.b - z11.b }, pn11/z, [x27, x1]
+
+ ldnt1b { z0.b, z8.b }, pn8/z, [x0, x1]
+ ldnt1b { z0.b, z8.b }, pn8/z, [x0, x1, lsl #0]
+ LDNT1B { Z0.B, Z8.B }, PN8/Z, [X0, X1]
+ ldnt1b { z1.b, z9.b }, pn8/z, [x0, x1]
+ ldnt1b { z2.b, z10.b }, pn8/z, [x0, x1]
+ ldnt1b { z3.b, z11.b }, pn8/z, [x0, x1]
+ ldnt1b { z4.b, z12.b }, pn8/z, [x0, x1]
+ ldnt1b { z5.b, z13.b }, pn8/z, [x0, x1]
+ ldnt1b { z6.b, z14.b }, pn8/z, [x0, x1]
+ ldnt1b { z7.b, z15.b }, pn8/z, [x0, x1]
+ ldnt1b { z16.b, z24.b }, pn8/z, [x0, x1]
+ ldnt1b { z17.b, z25.b }, pn8/z, [x0, x1]
+ ldnt1b { z18.b, z26.b }, pn8/z, [x0, x1]
+ ldnt1b { z19.b, z27.b }, pn8/z, [x0, x1]
+ ldnt1b { z20.b, z28.b }, pn8/z, [x0, x1]
+ ldnt1b { z21.b, z29.b }, pn8/z, [x0, x1]
+ ldnt1b { z22.b, z30.b }, pn8/z, [x0, x1]
+ ldnt1b { z23.b, z31.b }, pn8/z, [x0, x1]
+ ldnt1b { z0.b, z8.b }, pn15/z, [x0, x1]
+ ldnt1b { z0.b, z8.b }, pn8/z, [x30, x1]
+ ldnt1b { z0.b, z8.b }, pn8/z, [sp, x1]
+ ldnt1b { z0.b, z8.b }, pn8/z, [x0, x30]
+ ldnt1b { z0.b, z8.b }, pn8/z, [x0, xzr]
+ ldnt1b { z5.b, z13.b }, pn14/z, [x15, x24]
+
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, x1]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, x1, lsl #0]
+ LDNT1B { Z0.B, Z4.B, Z8.B, Z12.B }, PN8/Z, [X0, X1]
+ ldnt1b { z1.b, z5.b, z9.b, z13.b }, pn8/z, [x0, x1]
+ ldnt1b { z2.b, z6.b, z10.b, z14.b }, pn8/z, [x0, x1]
+ ldnt1b { z3.b, z7.b, z11.b, z15.b }, pn8/z, [x0, x1]
+ ldnt1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [x0, x1]
+ ldnt1b { z17.b, z21.b, z25.b, z29.b }, pn8/z, [x0, x1]
+ ldnt1b { z18.b, z22.b, z26.b, z30.b }, pn8/z, [x0, x1]
+ ldnt1b { z19.b, z23.b, z27.b, z31.b }, pn8/z, [x0, x1]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn15/z, [x0, x1]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x30, x1]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [sp, x1]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, x30]
+ ldnt1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, xzr]
+ ldnt1b { z17.b, z21.b, z25.b, z29.b }, pn11/z, [x4, x6]
+
+ st1b { z0.b - z1.b }, pn8, [x0]
+ st1b { z0.b - z1.b }, pn8, [x0, #0, mul vl]
+ ST1B { Z0.B - Z1.B }, PN8, [X0]
+ st1b { z30.b - z31.b }, pn8, [x0]
+ st1b { z0.b - z1.b }, pn15, [x0]
+ st1b { z0.b - z1.b }, pn8, [x30]
+ st1b { z0.b - z1.b }, pn8, [sp]
+ st1b { z0.b - z1.b }, pn8, [x0, #-16, mul vl]
+ st1b { z0.b - z1.b }, pn8, [x0, #14, mul vl]
+ st1b { z12.b - z13.b }, pn13, [x11, #-10, mul vl]
+
+ st1b { z0.b - z3.b }, pn8, [x0]
+ st1b { z0.b - z3.b }, pn8, [x0, #0, mul vl]
+ ST1B { Z0.B - Z3.B }, PN8, [X0]
+ st1b { z28.b - z31.b }, pn8, [x0]
+ st1b { z0.b - z3.b }, pn15, [x0]
+ st1b { z0.b - z3.b }, pn8, [x30]
+ st1b { z0.b - z3.b }, pn8, [sp]
+ st1b { z0.b - z3.b }, pn8, [x0, #-32, mul vl]
+ st1b { z0.b - z3.b }, pn8, [x0, #28, mul vl]
+ st1b { z8.b - z11.b }, pn11, [x17, #20, mul vl]
+
+ st1b { z0.b, z8.b }, pn8, [x0]
+ st1b { z0.b, z8.b }, pn8, [x0, #0, mul vl]
+ ST1B { Z0.B, Z8.B }, PN8, [X0]
+ st1b { z1.b, z9.b }, pn8, [x0]
+ st1b { z2.b, z10.b }, pn8, [x0]
+ st1b { z3.b, z11.b }, pn8, [x0]
+ st1b { z4.b, z12.b }, pn8, [x0]
+ st1b { z5.b, z13.b }, pn8, [x0]
+ st1b { z6.b, z14.b }, pn8, [x0]
+ st1b { z7.b, z15.b }, pn8, [x0]
+ st1b { z16.b, z24.b }, pn8, [x0]
+ st1b { z17.b, z25.b }, pn8, [x0]
+ st1b { z18.b, z26.b }, pn8, [x0]
+ st1b { z19.b, z27.b }, pn8, [x0]
+ st1b { z20.b, z28.b }, pn8, [x0]
+ st1b { z21.b, z29.b }, pn8, [x0]
+ st1b { z22.b, z30.b }, pn8, [x0]
+ st1b { z23.b, z31.b }, pn8, [x0]
+ st1b { z0.b, z8.b }, pn15, [x0]
+ st1b { z0.b, z8.b }, pn8, [x30]
+ st1b { z0.b, z8.b }, pn8, [sp]
+ st1b { z0.b, z8.b }, pn8, [x0, #-16, mul vl]
+ st1b { z0.b, z8.b }, pn8, [x0, #14, mul vl]
+ st1b { z3.b, z11.b }, pn10, [x22, #6, mul vl]
+
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, #0, mul vl]
+ ST1B { Z0.B, Z4.B, Z8.B, Z12.B }, PN8, [X0]
+ st1b { z1.b, z5.b, z9.b, z13.b }, pn8, [x0]
+ st1b { z2.b, z6.b, z10.b, z14.b }, pn8, [x0]
+ st1b { z3.b, z7.b, z11.b, z15.b }, pn8, [x0]
+ st1b { z16.b, z20.b, z24.b, z28.b }, pn8, [x0]
+ st1b { z17.b, z21.b, z25.b, z29.b }, pn8, [x0]
+ st1b { z18.b, z22.b, z26.b, z30.b }, pn8, [x0]
+ st1b { z19.b, z23.b, z27.b, z31.b }, pn8, [x0]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn15, [x0]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x30]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [sp]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, #-32, mul vl]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, #28, mul vl]
+ st1b { z2.b, z6.b, z10.b, z14.b }, pn14, [x29, #8, mul vl]
+
+ st1b { z0.b - z1.b }, pn8, [x0, x1]
+ st1b { z0.b - z1.b }, pn8, [x0, x1, lsl #0]
+ ST1B { Z0.B - Z1.B }, PN8, [X0, X1]
+ st1b { z30.b - z31.b }, pn8, [x0, x1]
+ st1b { z0.b - z1.b }, pn15, [x0, x1]
+ st1b { z0.b - z1.b }, pn8, [x30, x1]
+ st1b { z0.b - z1.b }, pn8, [sp, x1]
+ st1b { z0.b - z1.b }, pn8, [x0, x30]
+ st1b { z0.b - z1.b }, pn8, [x0, xzr]
+ st1b { z14.b - z15.b }, pn9, [x26, x3]
+
+ st1b { z0.b - z3.b }, pn8, [x0, x1]
+ st1b { z0.b - z3.b }, pn8, [x0, x1, lsl #0]
+ ST1B { Z0.B - Z3.B }, PN8, [X0, X1]
+ st1b { z28.b - z31.b }, pn8, [x0, x1]
+ st1b { z0.b - z3.b }, pn15, [x0, x1]
+ st1b { z0.b - z3.b }, pn8, [x30, x1]
+ st1b { z0.b - z3.b }, pn8, [sp, x1]
+ st1b { z0.b - z3.b }, pn8, [x0, x30]
+ st1b { z0.b - z3.b }, pn8, [x0, xzr]
+ st1b { z8.b - z11.b }, pn11, [x27, x1]
+
+ st1b { z0.b, z8.b }, pn8, [x0, x1]
+ st1b { z0.b, z8.b }, pn8, [x0, x1, lsl #0]
+ ST1B { Z0.B, Z8.B }, PN8, [X0, X1]
+ st1b { z1.b, z9.b }, pn8, [x0, x1]
+ st1b { z2.b, z10.b }, pn8, [x0, x1]
+ st1b { z3.b, z11.b }, pn8, [x0, x1]
+ st1b { z4.b, z12.b }, pn8, [x0, x1]
+ st1b { z5.b, z13.b }, pn8, [x0, x1]
+ st1b { z6.b, z14.b }, pn8, [x0, x1]
+ st1b { z7.b, z15.b }, pn8, [x0, x1]
+ st1b { z16.b, z24.b }, pn8, [x0, x1]
+ st1b { z17.b, z25.b }, pn8, [x0, x1]
+ st1b { z18.b, z26.b }, pn8, [x0, x1]
+ st1b { z19.b, z27.b }, pn8, [x0, x1]
+ st1b { z20.b, z28.b }, pn8, [x0, x1]
+ st1b { z21.b, z29.b }, pn8, [x0, x1]
+ st1b { z22.b, z30.b }, pn8, [x0, x1]
+ st1b { z23.b, z31.b }, pn8, [x0, x1]
+ st1b { z0.b, z8.b }, pn15, [x0, x1]
+ st1b { z0.b, z8.b }, pn8, [x30, x1]
+ st1b { z0.b, z8.b }, pn8, [sp, x1]
+ st1b { z0.b, z8.b }, pn8, [x0, x30]
+ st1b { z0.b, z8.b }, pn8, [x0, xzr]
+ st1b { z5.b, z13.b }, pn14, [x15, x24]
+
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, x1]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, x1, lsl #0]
+ ST1B { Z0.B, Z4.B, Z8.B, Z12.B }, PN8, [X0, X1]
+ st1b { z1.b, z5.b, z9.b, z13.b }, pn8, [x0, x1]
+ st1b { z2.b, z6.b, z10.b, z14.b }, pn8, [x0, x1]
+ st1b { z3.b, z7.b, z11.b, z15.b }, pn8, [x0, x1]
+ st1b { z16.b, z20.b, z24.b, z28.b }, pn8, [x0, x1]
+ st1b { z17.b, z21.b, z25.b, z29.b }, pn8, [x0, x1]
+ st1b { z18.b, z22.b, z26.b, z30.b }, pn8, [x0, x1]
+ st1b { z19.b, z23.b, z27.b, z31.b }, pn8, [x0, x1]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn15, [x0, x1]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x30, x1]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [sp, x1]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, x30]
+ st1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, xzr]
+ st1b { z17.b, z21.b, z25.b, z29.b }, pn11, [x4, x6]
+
+ stnt1b { z0.b - z1.b }, pn8, [x0]
+ stnt1b { z0.b - z1.b }, pn8, [x0, #0, mul vl]
+ STNT1B { Z0.B - Z1.B }, PN8, [X0]
+ stnt1b { z30.b - z31.b }, pn8, [x0]
+ stnt1b { z0.b - z1.b }, pn15, [x0]
+ stnt1b { z0.b - z1.b }, pn8, [x30]
+ stnt1b { z0.b - z1.b }, pn8, [sp]
+ stnt1b { z0.b - z1.b }, pn8, [x0, #-16, mul vl]
+ stnt1b { z0.b - z1.b }, pn8, [x0, #14, mul vl]
+ stnt1b { z12.b - z13.b }, pn13, [x11, #-10, mul vl]
+
+ stnt1b { z0.b - z3.b }, pn8, [x0]
+ stnt1b { z0.b - z3.b }, pn8, [x0, #0, mul vl]
+ STNT1B { Z0.B - Z3.B }, PN8, [X0]
+ stnt1b { z28.b - z31.b }, pn8, [x0]
+ stnt1b { z0.b - z3.b }, pn15, [x0]
+ stnt1b { z0.b - z3.b }, pn8, [x30]
+ stnt1b { z0.b - z3.b }, pn8, [sp]
+ stnt1b { z0.b - z3.b }, pn8, [x0, #-32, mul vl]
+ stnt1b { z0.b - z3.b }, pn8, [x0, #28, mul vl]
+ stnt1b { z8.b - z11.b }, pn11, [x17, #20, mul vl]
+
+ stnt1b { z0.b, z8.b }, pn8, [x0]
+ stnt1b { z0.b, z8.b }, pn8, [x0, #0, mul vl]
+ STNT1B { Z0.B, Z8.B }, PN8, [X0]
+ stnt1b { z1.b, z9.b }, pn8, [x0]
+ stnt1b { z2.b, z10.b }, pn8, [x0]
+ stnt1b { z3.b, z11.b }, pn8, [x0]
+ stnt1b { z4.b, z12.b }, pn8, [x0]
+ stnt1b { z5.b, z13.b }, pn8, [x0]
+ stnt1b { z6.b, z14.b }, pn8, [x0]
+ stnt1b { z7.b, z15.b }, pn8, [x0]
+ stnt1b { z16.b, z24.b }, pn8, [x0]
+ stnt1b { z17.b, z25.b }, pn8, [x0]
+ stnt1b { z18.b, z26.b }, pn8, [x0]
+ stnt1b { z19.b, z27.b }, pn8, [x0]
+ stnt1b { z20.b, z28.b }, pn8, [x0]
+ stnt1b { z21.b, z29.b }, pn8, [x0]
+ stnt1b { z22.b, z30.b }, pn8, [x0]
+ stnt1b { z23.b, z31.b }, pn8, [x0]
+ stnt1b { z0.b, z8.b }, pn15, [x0]
+ stnt1b { z0.b, z8.b }, pn8, [x30]
+ stnt1b { z0.b, z8.b }, pn8, [sp]
+ stnt1b { z0.b, z8.b }, pn8, [x0, #-16, mul vl]
+ stnt1b { z0.b, z8.b }, pn8, [x0, #14, mul vl]
+ stnt1b { z3.b, z11.b }, pn10, [x22, #6, mul vl]
+
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, #0, mul vl]
+ STNT1B { Z0.B, Z4.B, Z8.B, Z12.B }, PN8, [X0]
+ stnt1b { z1.b, z5.b, z9.b, z13.b }, pn8, [x0]
+ stnt1b { z2.b, z6.b, z10.b, z14.b }, pn8, [x0]
+ stnt1b { z3.b, z7.b, z11.b, z15.b }, pn8, [x0]
+ stnt1b { z16.b, z20.b, z24.b, z28.b }, pn8, [x0]
+ stnt1b { z17.b, z21.b, z25.b, z29.b }, pn8, [x0]
+ stnt1b { z18.b, z22.b, z26.b, z30.b }, pn8, [x0]
+ stnt1b { z19.b, z23.b, z27.b, z31.b }, pn8, [x0]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn15, [x0]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x30]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [sp]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, #-32, mul vl]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, #28, mul vl]
+ stnt1b { z2.b, z6.b, z10.b, z14.b }, pn14, [x29, #8, mul vl]
+
+ stnt1b { z0.b - z1.b }, pn8, [x0, x1]
+ stnt1b { z0.b - z1.b }, pn8, [x0, x1, lsl #0]
+ STNT1B { Z0.B - Z1.B }, PN8, [X0, X1]
+ stnt1b { z30.b - z31.b }, pn8, [x0, x1]
+ stnt1b { z0.b - z1.b }, pn15, [x0, x1]
+ stnt1b { z0.b - z1.b }, pn8, [x30, x1]
+ stnt1b { z0.b - z1.b }, pn8, [sp, x1]
+ stnt1b { z0.b - z1.b }, pn8, [x0, x30]
+ stnt1b { z0.b - z1.b }, pn8, [x0, xzr]
+ stnt1b { z14.b - z15.b }, pn9, [x26, x3]
+
+ stnt1b { z0.b - z3.b }, pn8, [x0, x1]
+ stnt1b { z0.b - z3.b }, pn8, [x0, x1, lsl #0]
+ STNT1B { Z0.B - Z3.B }, PN8, [X0, X1]
+ stnt1b { z28.b - z31.b }, pn8, [x0, x1]
+ stnt1b { z0.b - z3.b }, pn15, [x0, x1]
+ stnt1b { z0.b - z3.b }, pn8, [x30, x1]
+ stnt1b { z0.b - z3.b }, pn8, [sp, x1]
+ stnt1b { z0.b - z3.b }, pn8, [x0, x30]
+ stnt1b { z0.b - z3.b }, pn8, [x0, xzr]
+ stnt1b { z8.b - z11.b }, pn11, [x27, x1]
+
+ stnt1b { z0.b, z8.b }, pn8, [x0, x1]
+ stnt1b { z0.b, z8.b }, pn8, [x0, x1, lsl #0]
+ STNT1B { Z0.B, Z8.B }, PN8, [X0, X1]
+ stnt1b { z1.b, z9.b }, pn8, [x0, x1]
+ stnt1b { z2.b, z10.b }, pn8, [x0, x1]
+ stnt1b { z3.b, z11.b }, pn8, [x0, x1]
+ stnt1b { z4.b, z12.b }, pn8, [x0, x1]
+ stnt1b { z5.b, z13.b }, pn8, [x0, x1]
+ stnt1b { z6.b, z14.b }, pn8, [x0, x1]
+ stnt1b { z7.b, z15.b }, pn8, [x0, x1]
+ stnt1b { z16.b, z24.b }, pn8, [x0, x1]
+ stnt1b { z17.b, z25.b }, pn8, [x0, x1]
+ stnt1b { z18.b, z26.b }, pn8, [x0, x1]
+ stnt1b { z19.b, z27.b }, pn8, [x0, x1]
+ stnt1b { z20.b, z28.b }, pn8, [x0, x1]
+ stnt1b { z21.b, z29.b }, pn8, [x0, x1]
+ stnt1b { z22.b, z30.b }, pn8, [x0, x1]
+ stnt1b { z23.b, z31.b }, pn8, [x0, x1]
+ stnt1b { z0.b, z8.b }, pn15, [x0, x1]
+ stnt1b { z0.b, z8.b }, pn8, [x30, x1]
+ stnt1b { z0.b, z8.b }, pn8, [sp, x1]
+ stnt1b { z0.b, z8.b }, pn8, [x0, x30]
+ stnt1b { z0.b, z8.b }, pn8, [x0, xzr]
+ stnt1b { z5.b, z13.b }, pn14, [x15, x24]
+
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, x1]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, x1, lsl #0]
+ STNT1B { Z0.B, Z4.B, Z8.B, Z12.B }, PN8, [X0, X1]
+ stnt1b { z1.b, z5.b, z9.b, z13.b }, pn8, [x0, x1]
+ stnt1b { z2.b, z6.b, z10.b, z14.b }, pn8, [x0, x1]
+ stnt1b { z3.b, z7.b, z11.b, z15.b }, pn8, [x0, x1]
+ stnt1b { z16.b, z20.b, z24.b, z28.b }, pn8, [x0, x1]
+ stnt1b { z17.b, z21.b, z25.b, z29.b }, pn8, [x0, x1]
+ stnt1b { z18.b, z22.b, z26.b, z30.b }, pn8, [x0, x1]
+ stnt1b { z19.b, z23.b, z27.b, z31.b }, pn8, [x0, x1]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn15, [x0, x1]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x30, x1]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [sp, x1]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, x30]
+ stnt1b { z0.b, z4.b, z8.b, z12.b }, pn8, [x0, xzr]
+ stnt1b { z17.b, z21.b, z25.b, z29.b }, pn11, [x4, x6]
diff --git a/gas/testsuite/gas/aarch64/sme2-3-invalid.d b/gas/testsuite/gas/aarch64/sme2-3-invalid.d
new file mode 100644
index 00000000000..82a4d30f476
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-3-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-3-invalid.s
+#error_output: sme2-3-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-3-invalid.l b/gas/testsuite/gas/aarch64/sme2-3-invalid.l
new file mode 100644
index 00000000000..90345d40ff6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-3-invalid.l
@@ -0,0 +1,75 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1d 0,pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1d {z0\.d-z1\.d},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1d {z0\.d-z2\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z1\.d-z2\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d-z1\.d},p8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8/m,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8\.d,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z1\.d},pn0/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z1\.d},pn7/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[w0,w1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[xzr,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[sp,sp,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,w1,sxtw#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,w1,uxtw#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z1\.d-z4\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z2\.d-z5\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z3\.d-z6\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d-z3\.d},p8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8/m,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8\.d,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z3\.d},pn0/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z3\.d},pn7/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[w0,w1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[xzr,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[sp,sp,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,w1,sxtw#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,w1,uxtw#3\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z2\.d},pn8/z,\[x0,x1,lsl#3\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z3\.d},pn8/z,\[x0,x1,lsl#3\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z4\.d},pn8/z,\[x0,x1,lsl#3\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z8\.d,z16\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z24\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z8\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d,z8\.d},p8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[w0,w30,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[xzr,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[x0,sp,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z4\.d,z8\.d,z12\.d,z16\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z20\.d,z24\.d,z28\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},p8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[w0,w30,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[xzr,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,sp,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-3-invalid.s b/gas/testsuite/gas/aarch64/sme2-3-invalid.s
new file mode 100644
index 00000000000..6e57ad25040
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-3-invalid.s
@@ -0,0 +1,62 @@
+ ld1d 0, pn8/z, [x0]
+ ld1d { z0.d - z1.d }, 0, [x0]
+ ld1d { z0.d - z1.d }, pn8/z, 0
+
+ ld1d { z0.d - z2.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z1.d - z2.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, p8/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/m, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8.d, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn0/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn7/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/z, [w0, w1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/z, [xzr, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/z, [sp, sp, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, x1]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, x1, lsl #1]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, x1, lsl #2]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, x1, lsl #4]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, w1, sxtw #3]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, w1, uxtw #3]
+
+ ld1d { z1.d - z4.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z2.d - z5.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z3.d - z6.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, p8/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/m, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8.d, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn0/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn7/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/z, [w0, w1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/z, [xzr, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/z, [sp, sp, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, x1]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, x1, lsl #1]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, x1, lsl #2]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, x1, lsl #4]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, w1, sxtw #3]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, w1, uxtw #3]
+
+ ld1d { z0.d, z2.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z3.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z4.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z8.d, z16.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z24.d, z0.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z8.d, z0.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.h, z8.h }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z8.d }, p8/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z8.d }, pn8/z, [w0, w30, lsl #3]
+ ld1d { z0.d, z8.d }, pn8/z, [xzr, xzr, lsl #3]
+ ld1d { z0.d, z8.d }, pn8/z, [x0, sp, lsl #3]
+ ld1d { z0.d, z8.d }, pn8/z, [x0, x1, lsl #1]
+
+ ld1d { z4.d, z8.d, z12.d, z16.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z20.d, z24.d, z28.d, z0.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, p8/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [w0, w30, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [xzr, xzr, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, sp, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x1, lsl #1]
diff --git a/gas/testsuite/gas/aarch64/sme2-3-noarch.d b/gas/testsuite/gas/aarch64/sme2-3-noarch.d
new file mode 100644
index 00000000000..b1829bdefdd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-3-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-3.s
+#error_output: sme2-3-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-3-noarch.l b/gas/testsuite/gas/aarch64/sme2-3-noarch.l
new file mode 100644
index 00000000000..16eba8f86f4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-3-noarch.l
@@ -0,0 +1,481 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z1\.D},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z30\.d-z31\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z12\.d-z13\.d},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z3\.D},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z28\.d-z31\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z8\.d-z11\.d},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z8\.D},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z9\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z10\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z4\.d,z12\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z6\.d,z14\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z7\.d,z15\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z24\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z25\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z26\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z27\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z20\.d,z28\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z21\.d,z29\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z22\.d,z30\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z23\.d,z31\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z1\.D},PN8/Z,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z30\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn15/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z14\.d-z15\.d},pn9/z,\[x26,x3,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z3\.D},PN8/Z,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z28\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn15/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z8\.d-z11\.d},pn11/z,\[x27,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z8\.D},PN8/Z,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z9\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z10\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z4\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z6\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z7\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z24\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z25\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z26\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z27\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z20\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z21\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z22\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z23\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn15/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn14/z,\[x15,x24,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11/z,\[x4,x6,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z1\.D},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z30\.d-z31\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z12\.d-z13\.d},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z3\.D},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z28\.d-z31\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z8\.d-z11\.d},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z8\.D},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z9\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z10\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z4\.d,z12\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z6\.d,z14\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z7\.d,z15\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z24\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z25\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z26\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z27\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z20\.d,z28\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z21\.d,z29\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z22\.d,z30\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z23\.d,z31\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z1\.D},PN8/Z,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z30\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn15/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z14\.d-z15\.d},pn9/z,\[x26,x3,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z3\.D},PN8/Z,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z28\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn15/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z8\.d-z11\.d},pn11/z,\[x27,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z8\.D},PN8/Z,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z9\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z10\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z4\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z6\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z7\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z24\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z25\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z26\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z27\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z20\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z21\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z22\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z23\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn15/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn14/z,\[x15,x24,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11/z,\[x4,x6,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z1\.D},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z30\.d-z31\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z12\.d-z13\.d},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z3\.D},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z28\.d-z31\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z8\.d-z11\.d},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z8\.D},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z9\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z10\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z4\.d,z12\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z6\.d,z14\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z7\.d,z15\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z24\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z25\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z26\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z27\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z20\.d,z28\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z21\.d,z29\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z22\.d,z30\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z23\.d,z31\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z1\.D},PN8,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z30\.d-z31\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn15,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z14\.d-z15\.d},pn9,\[x26,x3,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z3\.D},PN8,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z28\.d-z31\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn15,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z8\.d-z11\.d},pn11,\[x27,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z8\.D},PN8,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z9\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z10\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z4\.d,z12\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z6\.d,z14\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z7\.d,z15\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z24\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z25\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z26\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z27\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z20\.d,z28\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z21\.d,z29\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z22\.d,z30\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z23\.d,z31\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn15,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn14,\[x15,x24,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11,\[x4,x6,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z1\.D},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z30\.d-z31\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z12\.d-z13\.d},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z3\.D},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z28\.d-z31\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z8\.d-z11\.d},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z8\.D},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z9\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z10\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z4\.d,z12\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z6\.d,z14\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z7\.d,z15\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z24\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z25\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z26\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z27\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z20\.d,z28\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z21\.d,z29\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z22\.d,z30\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z23\.d,z31\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z1\.D},PN8,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z30\.d-z31\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn15,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z14\.d-z15\.d},pn9,\[x26,x3,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z3\.D},PN8,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z28\.d-z31\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn15,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z8\.d-z11\.d},pn11,\[x27,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z8\.D},PN8,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z9\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z10\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z4\.d,z12\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z6\.d,z14\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z7\.d,z15\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z24\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z25\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z26\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z27\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z20\.d,z28\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z21\.d,z29\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z22\.d,z30\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z23\.d,z31\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn15,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn14,\[x15,x24,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl 3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0,X1,LSL#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x30,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,xzr,lsl#3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11,\[x4,x6,lsl#3\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-3.d b/gas/testsuite/gas/aarch64/sme2-3.d
new file mode 100644
index 00000000000..e290747af01
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-3.d
@@ -0,0 +1,489 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: a0406000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0\]
+[^:]+: a0406000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0\]
+[^:]+: a0406000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0\]
+[^:]+: a040601e ld1d {z30\.d-z31\.d}, pn8/z, \[x0\]
+[^:]+: a0407c00 ld1d {z0\.d-z1\.d}, pn15/z, \[x0\]
+[^:]+: a04063c0 ld1d {z0\.d-z1\.d}, pn8/z, \[x30\]
+[^:]+: a04063e0 ld1d {z0\.d-z1\.d}, pn8/z, \[sp\]
+[^:]+: a0486000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0476000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b756c ld1d {z12\.d-z13\.d}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a040e000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0\]
+[^:]+: a040e000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0\]
+[^:]+: a040e000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0\]
+[^:]+: a040e01c ld1d {z28\.d-z31\.d}, pn8/z, \[x0\]
+[^:]+: a040fc00 ld1d {z0\.d-z3\.d}, pn15/z, \[x0\]
+[^:]+: a040e3c0 ld1d {z0\.d-z3\.d}, pn8/z, \[x30\]
+[^:]+: a040e3e0 ld1d {z0\.d-z3\.d}, pn8/z, \[sp\]
+[^:]+: a048e000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a047e000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a045ee28 ld1d {z8\.d-z11\.d}, pn11/z, \[x17, #20, mul vl\]
+[^:]+: a1406000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0\]
+[^:]+: a1406000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0\]
+[^:]+: a1406000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0\]
+[^:]+: a1406001 ld1d {z1\.d, z9\.d}, pn8/z, \[x0\]
+[^:]+: a1406002 ld1d {z2\.d, z10\.d}, pn8/z, \[x0\]
+[^:]+: a1406003 ld1d {z3\.d, z11\.d}, pn8/z, \[x0\]
+[^:]+: a1406004 ld1d {z4\.d, z12\.d}, pn8/z, \[x0\]
+[^:]+: a1406005 ld1d {z5\.d, z13\.d}, pn8/z, \[x0\]
+[^:]+: a1406006 ld1d {z6\.d, z14\.d}, pn8/z, \[x0\]
+[^:]+: a1406007 ld1d {z7\.d, z15\.d}, pn8/z, \[x0\]
+[^:]+: a1406010 ld1d {z16\.d, z24\.d}, pn8/z, \[x0\]
+[^:]+: a1406011 ld1d {z17\.d, z25\.d}, pn8/z, \[x0\]
+[^:]+: a1406012 ld1d {z18\.d, z26\.d}, pn8/z, \[x0\]
+[^:]+: a1406013 ld1d {z19\.d, z27\.d}, pn8/z, \[x0\]
+[^:]+: a1406014 ld1d {z20\.d, z28\.d}, pn8/z, \[x0\]
+[^:]+: a1406015 ld1d {z21\.d, z29\.d}, pn8/z, \[x0\]
+[^:]+: a1406016 ld1d {z22\.d, z30\.d}, pn8/z, \[x0\]
+[^:]+: a1406017 ld1d {z23\.d, z31\.d}, pn8/z, \[x0\]
+[^:]+: a1407c00 ld1d {z0\.d, z8\.d}, pn15/z, \[x0\]
+[^:]+: a14063c0 ld1d {z0\.d, z8\.d}, pn8/z, \[x30\]
+[^:]+: a14063e0 ld1d {z0\.d, z8\.d}, pn8/z, \[sp\]
+[^:]+: a1486000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a1476000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1436ac3 ld1d {z3\.d, z11\.d}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a140e000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0\]
+[^:]+: a140e000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0\]
+[^:]+: a140e000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0\]
+[^:]+: a140e001 ld1d {z1\.d, z5\.d, z9\.d, z13\.d}, pn8/z, \[x0\]
+[^:]+: a140e002 ld1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn8/z, \[x0\]
+[^:]+: a140e003 ld1d {z3\.d, z7\.d, z11\.d, z15\.d}, pn8/z, \[x0\]
+[^:]+: a140e010 ld1d {z16\.d, z20\.d, z24\.d, z28\.d}, pn8/z, \[x0\]
+[^:]+: a140e011 ld1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn8/z, \[x0\]
+[^:]+: a140e012 ld1d {z18\.d, z22\.d, z26\.d, z30\.d}, pn8/z, \[x0\]
+[^:]+: a140e013 ld1d {z19\.d, z23\.d, z27\.d, z31\.d}, pn8/z, \[x0\]
+[^:]+: a140fc00 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn15/z, \[x0\]
+[^:]+: a140e3c0 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x30\]
+[^:]+: a140e3e0 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[sp\]
+[^:]+: a148e000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a147e000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a142fba2 ld1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn14/z, \[x29, #8, mul vl\]
+[^:]+: a0016000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a0016000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a0016000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001601e ld1d {z30\.d-z31\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a0017c00 ld1d {z0\.d-z1\.d}, pn15/z, \[x0, x1, lsl #3\]
+[^:]+: a00163c0 ld1d {z0\.d-z1\.d}, pn8/z, \[x30, x1, lsl #3\]
+[^:]+: a00163e0 ld1d {z0\.d-z1\.d}, pn8/z, \[sp, x1, lsl #3\]
+[^:]+: a01e6000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x30, lsl #3\]
+[^:]+: a01f6000 ld1d {z0\.d-z1\.d}, pn8/z, \[x0, xzr, lsl #3\]
+[^:]+: a003674e ld1d {z14\.d-z15\.d}, pn9/z, \[x26, x3, lsl #3\]
+[^:]+: a001e000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001e000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001e000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001e01c ld1d {z28\.d-z31\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001fc00 ld1d {z0\.d-z3\.d}, pn15/z, \[x0, x1, lsl #3\]
+[^:]+: a001e3c0 ld1d {z0\.d-z3\.d}, pn8/z, \[x30, x1, lsl #3\]
+[^:]+: a001e3e0 ld1d {z0\.d-z3\.d}, pn8/z, \[sp, x1, lsl #3\]
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+[^:]+: a01fe000 ld1d {z0\.d-z3\.d}, pn8/z, \[x0, xzr, lsl #3\]
+[^:]+: a001ef68 ld1d {z8\.d-z11\.d}, pn11/z, \[x27, x1, lsl #3\]
+[^:]+: a1016000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016001 ld1d {z1\.d, z9\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016002 ld1d {z2\.d, z10\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016003 ld1d {z3\.d, z11\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016004 ld1d {z4\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016005 ld1d {z5\.d, z13\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016006 ld1d {z6\.d, z14\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016007 ld1d {z7\.d, z15\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016010 ld1d {z16\.d, z24\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016011 ld1d {z17\.d, z25\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016012 ld1d {z18\.d, z26\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016013 ld1d {z19\.d, z27\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016014 ld1d {z20\.d, z28\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016015 ld1d {z21\.d, z29\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016016 ld1d {z22\.d, z30\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016017 ld1d {z23\.d, z31\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1017c00 ld1d {z0\.d, z8\.d}, pn15/z, \[x0, x1, lsl #3\]
+[^:]+: a10163c0 ld1d {z0\.d, z8\.d}, pn8/z, \[x30, x1, lsl #3\]
+[^:]+: a10163e0 ld1d {z0\.d, z8\.d}, pn8/z, \[sp, x1, lsl #3\]
+[^:]+: a11e6000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0, x30, lsl #3\]
+[^:]+: a11f6000 ld1d {z0\.d, z8\.d}, pn8/z, \[x0, xzr, lsl #3\]
+[^:]+: a11879e5 ld1d {z5\.d, z13\.d}, pn14/z, \[x15, x24, lsl #3\]
+[^:]+: a101e000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e001 ld1d {z1\.d, z5\.d, z9\.d, z13\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e002 ld1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e003 ld1d {z3\.d, z7\.d, z11\.d, z15\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e010 ld1d {z16\.d, z20\.d, z24\.d, z28\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e011 ld1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e012 ld1d {z18\.d, z22\.d, z26\.d, z30\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e013 ld1d {z19\.d, z23\.d, z27\.d, z31\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101fc00 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn15/z, \[x0, x1, lsl #3\]
+[^:]+: a101e3c0 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x30, x1, lsl #3\]
+[^:]+: a101e3e0 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[sp, x1, lsl #3\]
+[^:]+: a11ee000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x30, lsl #3\]
+[^:]+: a11fe000 ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, xzr, lsl #3\]
+[^:]+: a106ec91 ld1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn11/z, \[x4, x6, lsl #3\]
+[^:]+: a0406001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0\]
+[^:]+: a0406001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0\]
+[^:]+: a0406001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0\]
+[^:]+: a040601f ldnt1d {z30\.d-z31\.d}, pn8/z, \[x0\]
+[^:]+: a0407c01 ldnt1d {z0\.d-z1\.d}, pn15/z, \[x0\]
+[^:]+: a04063c1 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x30\]
+[^:]+: a04063e1 ldnt1d {z0\.d-z1\.d}, pn8/z, \[sp\]
+[^:]+: a0486001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0476001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b756d ldnt1d {z12\.d-z13\.d}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a040e001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0\]
+[^:]+: a040e001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0\]
+[^:]+: a040e001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0\]
+[^:]+: a040e01d ldnt1d {z28\.d-z31\.d}, pn8/z, \[x0\]
+[^:]+: a040fc01 ldnt1d {z0\.d-z3\.d}, pn15/z, \[x0\]
+[^:]+: a040e3c1 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x30\]
+[^:]+: a040e3e1 ldnt1d {z0\.d-z3\.d}, pn8/z, \[sp\]
+[^:]+: a048e001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a047e001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a045ee29 ldnt1d {z8\.d-z11\.d}, pn11/z, \[x17, #20, mul vl\]
+[^:]+: a1406008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0\]
+[^:]+: a1406008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0\]
+[^:]+: a1406008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0\]
+[^:]+: a1406009 ldnt1d {z1\.d, z9\.d}, pn8/z, \[x0\]
+[^:]+: a140600a ldnt1d {z2\.d, z10\.d}, pn8/z, \[x0\]
+[^:]+: a140600b ldnt1d {z3\.d, z11\.d}, pn8/z, \[x0\]
+[^:]+: a140600c ldnt1d {z4\.d, z12\.d}, pn8/z, \[x0\]
+[^:]+: a140600d ldnt1d {z5\.d, z13\.d}, pn8/z, \[x0\]
+[^:]+: a140600e ldnt1d {z6\.d, z14\.d}, pn8/z, \[x0\]
+[^:]+: a140600f ldnt1d {z7\.d, z15\.d}, pn8/z, \[x0\]
+[^:]+: a1406018 ldnt1d {z16\.d, z24\.d}, pn8/z, \[x0\]
+[^:]+: a1406019 ldnt1d {z17\.d, z25\.d}, pn8/z, \[x0\]
+[^:]+: a140601a ldnt1d {z18\.d, z26\.d}, pn8/z, \[x0\]
+[^:]+: a140601b ldnt1d {z19\.d, z27\.d}, pn8/z, \[x0\]
+[^:]+: a140601c ldnt1d {z20\.d, z28\.d}, pn8/z, \[x0\]
+[^:]+: a140601d ldnt1d {z21\.d, z29\.d}, pn8/z, \[x0\]
+[^:]+: a140601e ldnt1d {z22\.d, z30\.d}, pn8/z, \[x0\]
+[^:]+: a140601f ldnt1d {z23\.d, z31\.d}, pn8/z, \[x0\]
+[^:]+: a1407c08 ldnt1d {z0\.d, z8\.d}, pn15/z, \[x0\]
+[^:]+: a14063c8 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x30\]
+[^:]+: a14063e8 ldnt1d {z0\.d, z8\.d}, pn8/z, \[sp\]
+[^:]+: a1486008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a1476008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1436acb ldnt1d {z3\.d, z11\.d}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a140e008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0\]
+[^:]+: a140e008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0\]
+[^:]+: a140e008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0\]
+[^:]+: a140e009 ldnt1d {z1\.d, z5\.d, z9\.d, z13\.d}, pn8/z, \[x0\]
+[^:]+: a140e00a ldnt1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn8/z, \[x0\]
+[^:]+: a140e00b ldnt1d {z3\.d, z7\.d, z11\.d, z15\.d}, pn8/z, \[x0\]
+[^:]+: a140e018 ldnt1d {z16\.d, z20\.d, z24\.d, z28\.d}, pn8/z, \[x0\]
+[^:]+: a140e019 ldnt1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn8/z, \[x0\]
+[^:]+: a140e01a ldnt1d {z18\.d, z22\.d, z26\.d, z30\.d}, pn8/z, \[x0\]
+[^:]+: a140e01b ldnt1d {z19\.d, z23\.d, z27\.d, z31\.d}, pn8/z, \[x0\]
+[^:]+: a140fc08 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn15/z, \[x0\]
+[^:]+: a140e3c8 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x30\]
+[^:]+: a140e3e8 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[sp\]
+[^:]+: a148e008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a147e008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a142fbaa ldnt1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn14/z, \[x29, #8, mul vl\]
+[^:]+: a0016001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a0016001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a0016001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001601f ldnt1d {z30\.d-z31\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a0017c01 ldnt1d {z0\.d-z1\.d}, pn15/z, \[x0, x1, lsl #3\]
+[^:]+: a00163c1 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x30, x1, lsl #3\]
+[^:]+: a00163e1 ldnt1d {z0\.d-z1\.d}, pn8/z, \[sp, x1, lsl #3\]
+[^:]+: a01e6001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0, x30, lsl #3\]
+[^:]+: a01f6001 ldnt1d {z0\.d-z1\.d}, pn8/z, \[x0, xzr, lsl #3\]
+[^:]+: a003674f ldnt1d {z14\.d-z15\.d}, pn9/z, \[x26, x3, lsl #3\]
+[^:]+: a001e001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001e001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001e001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001e01d ldnt1d {z28\.d-z31\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a001fc01 ldnt1d {z0\.d-z3\.d}, pn15/z, \[x0, x1, lsl #3\]
+[^:]+: a001e3c1 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x30, x1, lsl #3\]
+[^:]+: a001e3e1 ldnt1d {z0\.d-z3\.d}, pn8/z, \[sp, x1, lsl #3\]
+[^:]+: a01ee001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0, x30, lsl #3\]
+[^:]+: a01fe001 ldnt1d {z0\.d-z3\.d}, pn8/z, \[x0, xzr, lsl #3\]
+[^:]+: a001ef69 ldnt1d {z8\.d-z11\.d}, pn11/z, \[x27, x1, lsl #3\]
+[^:]+: a1016008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016009 ldnt1d {z1\.d, z9\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101600a ldnt1d {z2\.d, z10\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101600b ldnt1d {z3\.d, z11\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101600c ldnt1d {z4\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101600d ldnt1d {z5\.d, z13\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101600e ldnt1d {z6\.d, z14\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101600f ldnt1d {z7\.d, z15\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016018 ldnt1d {z16\.d, z24\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1016019 ldnt1d {z17\.d, z25\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101601a ldnt1d {z18\.d, z26\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101601b ldnt1d {z19\.d, z27\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101601c ldnt1d {z20\.d, z28\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101601d ldnt1d {z21\.d, z29\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101601e ldnt1d {z22\.d, z30\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101601f ldnt1d {z23\.d, z31\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a1017c08 ldnt1d {z0\.d, z8\.d}, pn15/z, \[x0, x1, lsl #3\]
+[^:]+: a10163c8 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x30, x1, lsl #3\]
+[^:]+: a10163e8 ldnt1d {z0\.d, z8\.d}, pn8/z, \[sp, x1, lsl #3\]
+[^:]+: a11e6008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0, x30, lsl #3\]
+[^:]+: a11f6008 ldnt1d {z0\.d, z8\.d}, pn8/z, \[x0, xzr, lsl #3\]
+[^:]+: a11879ed ldnt1d {z5\.d, z13\.d}, pn14/z, \[x15, x24, lsl #3\]
+[^:]+: a101e008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e009 ldnt1d {z1\.d, z5\.d, z9\.d, z13\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e00a ldnt1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e00b ldnt1d {z3\.d, z7\.d, z11\.d, z15\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e018 ldnt1d {z16\.d, z20\.d, z24\.d, z28\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e019 ldnt1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e01a ldnt1d {z18\.d, z22\.d, z26\.d, z30\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101e01b ldnt1d {z19\.d, z23\.d, z27\.d, z31\.d}, pn8/z, \[x0, x1, lsl #3\]
+[^:]+: a101fc08 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn15/z, \[x0, x1, lsl #3\]
+[^:]+: a101e3c8 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x30, x1, lsl #3\]
+[^:]+: a101e3e8 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[sp, x1, lsl #3\]
+[^:]+: a11ee008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x30, lsl #3\]
+[^:]+: a11fe008 ldnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, xzr, lsl #3\]
+[^:]+: a106ec99 ldnt1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn11/z, \[x4, x6, lsl #3\]
+[^:]+: a0606000 st1d {z0\.d-z1\.d}, pn8, \[x0\]
+[^:]+: a0606000 st1d {z0\.d-z1\.d}, pn8, \[x0\]
+[^:]+: a0606000 st1d {z0\.d-z1\.d}, pn8, \[x0\]
+[^:]+: a060601e st1d {z30\.d-z31\.d}, pn8, \[x0\]
+[^:]+: a0607c00 st1d {z0\.d-z1\.d}, pn15, \[x0\]
+[^:]+: a06063c0 st1d {z0\.d-z1\.d}, pn8, \[x30\]
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+[^:]+: a060e000 st1d {z0\.d-z3\.d}, pn8, \[x0\]
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+[^:]+: a060e3e0 st1d {z0\.d-z3\.d}, pn8, \[sp\]
+[^:]+: a068e000 st1d {z0\.d-z3\.d}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a067e000 st1d {z0\.d-z3\.d}, pn8, \[x0, #28, mul vl\]
+[^:]+: a065ee28 st1d {z8\.d-z11\.d}, pn11, \[x17, #20, mul vl\]
+[^:]+: a1606000 st1d {z0\.d, z8\.d}, pn8, \[x0\]
+[^:]+: a1606000 st1d {z0\.d, z8\.d}, pn8, \[x0\]
+[^:]+: a1606000 st1d {z0\.d, z8\.d}, pn8, \[x0\]
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+[^:]+: a1607c00 st1d {z0\.d, z8\.d}, pn15, \[x0\]
+[^:]+: a16063c0 st1d {z0\.d, z8\.d}, pn8, \[x30\]
+[^:]+: a16063e0 st1d {z0\.d, z8\.d}, pn8, \[sp\]
+[^:]+: a1686000 st1d {z0\.d, z8\.d}, pn8, \[x0, #-16, mul vl\]
+[^:]+: a1676000 st1d {z0\.d, z8\.d}, pn8, \[x0, #14, mul vl\]
+[^:]+: a1636ac3 st1d {z3\.d, z11\.d}, pn10, \[x22, #6, mul vl\]
+[^:]+: a160e000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0\]
+[^:]+: a160e000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0\]
+[^:]+: a160e000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0\]
+[^:]+: a160e001 st1d {z1\.d, z5\.d, z9\.d, z13\.d}, pn8, \[x0\]
+[^:]+: a160e002 st1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn8, \[x0\]
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+[^:]+: a160e010 st1d {z16\.d, z20\.d, z24\.d, z28\.d}, pn8, \[x0\]
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+[^:]+: a160e012 st1d {z18\.d, z22\.d, z26\.d, z30\.d}, pn8, \[x0\]
+[^:]+: a160e013 st1d {z19\.d, z23\.d, z27\.d, z31\.d}, pn8, \[x0\]
+[^:]+: a160fc00 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn15, \[x0\]
+[^:]+: a160e3c0 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x30\]
+[^:]+: a160e3e0 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[sp\]
+[^:]+: a168e000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a167e000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, #28, mul vl\]
+[^:]+: a162fba2 st1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn14, \[x29, #8, mul vl\]
+[^:]+: a0216000 st1d {z0\.d-z1\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a0216000 st1d {z0\.d-z1\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a0216000 st1d {z0\.d-z1\.d}, pn8, \[x0, x1, lsl #3\]
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+[^:]+: a0217c00 st1d {z0\.d-z1\.d}, pn15, \[x0, x1, lsl #3\]
+[^:]+: a02163c0 st1d {z0\.d-z1\.d}, pn8, \[x30, x1, lsl #3\]
+[^:]+: a02163e0 st1d {z0\.d-z1\.d}, pn8, \[sp, x1, lsl #3\]
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+[^:]+: a03f6000 st1d {z0\.d-z1\.d}, pn8, \[x0, xzr, lsl #3\]
+[^:]+: a023674e st1d {z14\.d-z15\.d}, pn9, \[x26, x3, lsl #3\]
+[^:]+: a021e000 st1d {z0\.d-z3\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a021e000 st1d {z0\.d-z3\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a021e000 st1d {z0\.d-z3\.d}, pn8, \[x0, x1, lsl #3\]
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+[^:]+: a021fc00 st1d {z0\.d-z3\.d}, pn15, \[x0, x1, lsl #3\]
+[^:]+: a021e3c0 st1d {z0\.d-z3\.d}, pn8, \[x30, x1, lsl #3\]
+[^:]+: a021e3e0 st1d {z0\.d-z3\.d}, pn8, \[sp, x1, lsl #3\]
+[^:]+: a03ee000 st1d {z0\.d-z3\.d}, pn8, \[x0, x30, lsl #3\]
+[^:]+: a03fe000 st1d {z0\.d-z3\.d}, pn8, \[x0, xzr, lsl #3\]
+[^:]+: a021ef68 st1d {z8\.d-z11\.d}, pn11, \[x27, x1, lsl #3\]
+[^:]+: a1216000 st1d {z0\.d, z8\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216000 st1d {z0\.d, z8\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216000 st1d {z0\.d, z8\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216001 st1d {z1\.d, z9\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216002 st1d {z2\.d, z10\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216003 st1d {z3\.d, z11\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216004 st1d {z4\.d, z12\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216005 st1d {z5\.d, z13\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216006 st1d {z6\.d, z14\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216007 st1d {z7\.d, z15\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216010 st1d {z16\.d, z24\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216011 st1d {z17\.d, z25\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216012 st1d {z18\.d, z26\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216013 st1d {z19\.d, z27\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216014 st1d {z20\.d, z28\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216015 st1d {z21\.d, z29\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216016 st1d {z22\.d, z30\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216017 st1d {z23\.d, z31\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1217c00 st1d {z0\.d, z8\.d}, pn15, \[x0, x1, lsl #3\]
+[^:]+: a12163c0 st1d {z0\.d, z8\.d}, pn8, \[x30, x1, lsl #3\]
+[^:]+: a12163e0 st1d {z0\.d, z8\.d}, pn8, \[sp, x1, lsl #3\]
+[^:]+: a13e6000 st1d {z0\.d, z8\.d}, pn8, \[x0, x30, lsl #3\]
+[^:]+: a13f6000 st1d {z0\.d, z8\.d}, pn8, \[x0, xzr, lsl #3\]
+[^:]+: a13879e5 st1d {z5\.d, z13\.d}, pn14, \[x15, x24, lsl #3\]
+[^:]+: a121e000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e001 st1d {z1\.d, z5\.d, z9\.d, z13\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e002 st1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e003 st1d {z3\.d, z7\.d, z11\.d, z15\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e010 st1d {z16\.d, z20\.d, z24\.d, z28\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e011 st1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e012 st1d {z18\.d, z22\.d, z26\.d, z30\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e013 st1d {z19\.d, z23\.d, z27\.d, z31\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121fc00 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn15, \[x0, x1, lsl #3\]
+[^:]+: a121e3c0 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x30, x1, lsl #3\]
+[^:]+: a121e3e0 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[sp, x1, lsl #3\]
+[^:]+: a13ee000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, x30, lsl #3\]
+[^:]+: a13fe000 st1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, xzr, lsl #3\]
+[^:]+: a126ec91 st1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn11, \[x4, x6, lsl #3\]
+[^:]+: a0606001 stnt1d {z0\.d-z1\.d}, pn8, \[x0\]
+[^:]+: a0606001 stnt1d {z0\.d-z1\.d}, pn8, \[x0\]
+[^:]+: a0606001 stnt1d {z0\.d-z1\.d}, pn8, \[x0\]
+[^:]+: a060601f stnt1d {z30\.d-z31\.d}, pn8, \[x0\]
+[^:]+: a0607c01 stnt1d {z0\.d-z1\.d}, pn15, \[x0\]
+[^:]+: a06063c1 stnt1d {z0\.d-z1\.d}, pn8, \[x30\]
+[^:]+: a06063e1 stnt1d {z0\.d-z1\.d}, pn8, \[sp\]
+[^:]+: a0686001 stnt1d {z0\.d-z1\.d}, pn8, \[x0, #-16, mul vl\]
+[^:]+: a0676001 stnt1d {z0\.d-z1\.d}, pn8, \[x0, #14, mul vl\]
+[^:]+: a06b756d stnt1d {z12\.d-z13\.d}, pn13, \[x11, #-10, mul vl\]
+[^:]+: a060e001 stnt1d {z0\.d-z3\.d}, pn8, \[x0\]
+[^:]+: a060e001 stnt1d {z0\.d-z3\.d}, pn8, \[x0\]
+[^:]+: a060e001 stnt1d {z0\.d-z3\.d}, pn8, \[x0\]
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+[^:]+: a060fc01 stnt1d {z0\.d-z3\.d}, pn15, \[x0\]
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+[^:]+: a060e3e1 stnt1d {z0\.d-z3\.d}, pn8, \[sp\]
+[^:]+: a068e001 stnt1d {z0\.d-z3\.d}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a067e001 stnt1d {z0\.d-z3\.d}, pn8, \[x0, #28, mul vl\]
+[^:]+: a065ee29 stnt1d {z8\.d-z11\.d}, pn11, \[x17, #20, mul vl\]
+[^:]+: a1606008 stnt1d {z0\.d, z8\.d}, pn8, \[x0\]
+[^:]+: a1606008 stnt1d {z0\.d, z8\.d}, pn8, \[x0\]
+[^:]+: a1606008 stnt1d {z0\.d, z8\.d}, pn8, \[x0\]
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+[^:]+: a160600a stnt1d {z2\.d, z10\.d}, pn8, \[x0\]
+[^:]+: a160600b stnt1d {z3\.d, z11\.d}, pn8, \[x0\]
+[^:]+: a160600c stnt1d {z4\.d, z12\.d}, pn8, \[x0\]
+[^:]+: a160600d stnt1d {z5\.d, z13\.d}, pn8, \[x0\]
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+[^:]+: a160600f stnt1d {z7\.d, z15\.d}, pn8, \[x0\]
+[^:]+: a1606018 stnt1d {z16\.d, z24\.d}, pn8, \[x0\]
+[^:]+: a1606019 stnt1d {z17\.d, z25\.d}, pn8, \[x0\]
+[^:]+: a160601a stnt1d {z18\.d, z26\.d}, pn8, \[x0\]
+[^:]+: a160601b stnt1d {z19\.d, z27\.d}, pn8, \[x0\]
+[^:]+: a160601c stnt1d {z20\.d, z28\.d}, pn8, \[x0\]
+[^:]+: a160601d stnt1d {z21\.d, z29\.d}, pn8, \[x0\]
+[^:]+: a160601e stnt1d {z22\.d, z30\.d}, pn8, \[x0\]
+[^:]+: a160601f stnt1d {z23\.d, z31\.d}, pn8, \[x0\]
+[^:]+: a1607c08 stnt1d {z0\.d, z8\.d}, pn15, \[x0\]
+[^:]+: a16063c8 stnt1d {z0\.d, z8\.d}, pn8, \[x30\]
+[^:]+: a16063e8 stnt1d {z0\.d, z8\.d}, pn8, \[sp\]
+[^:]+: a1686008 stnt1d {z0\.d, z8\.d}, pn8, \[x0, #-16, mul vl\]
+[^:]+: a1676008 stnt1d {z0\.d, z8\.d}, pn8, \[x0, #14, mul vl\]
+[^:]+: a1636acb stnt1d {z3\.d, z11\.d}, pn10, \[x22, #6, mul vl\]
+[^:]+: a160e008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0\]
+[^:]+: a160e008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0\]
+[^:]+: a160e008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0\]
+[^:]+: a160e009 stnt1d {z1\.d, z5\.d, z9\.d, z13\.d}, pn8, \[x0\]
+[^:]+: a160e00a stnt1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn8, \[x0\]
+[^:]+: a160e00b stnt1d {z3\.d, z7\.d, z11\.d, z15\.d}, pn8, \[x0\]
+[^:]+: a160e018 stnt1d {z16\.d, z20\.d, z24\.d, z28\.d}, pn8, \[x0\]
+[^:]+: a160e019 stnt1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn8, \[x0\]
+[^:]+: a160e01a stnt1d {z18\.d, z22\.d, z26\.d, z30\.d}, pn8, \[x0\]
+[^:]+: a160e01b stnt1d {z19\.d, z23\.d, z27\.d, z31\.d}, pn8, \[x0\]
+[^:]+: a160fc08 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn15, \[x0\]
+[^:]+: a160e3c8 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x30\]
+[^:]+: a160e3e8 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[sp\]
+[^:]+: a168e008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a167e008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, #28, mul vl\]
+[^:]+: a162fbaa stnt1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn14, \[x29, #8, mul vl\]
+[^:]+: a0216001 stnt1d {z0\.d-z1\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a0216001 stnt1d {z0\.d-z1\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a0216001 stnt1d {z0\.d-z1\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a021601f stnt1d {z30\.d-z31\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a0217c01 stnt1d {z0\.d-z1\.d}, pn15, \[x0, x1, lsl #3\]
+[^:]+: a02163c1 stnt1d {z0\.d-z1\.d}, pn8, \[x30, x1, lsl #3\]
+[^:]+: a02163e1 stnt1d {z0\.d-z1\.d}, pn8, \[sp, x1, lsl #3\]
+[^:]+: a03e6001 stnt1d {z0\.d-z1\.d}, pn8, \[x0, x30, lsl #3\]
+[^:]+: a03f6001 stnt1d {z0\.d-z1\.d}, pn8, \[x0, xzr, lsl #3\]
+[^:]+: a023674f stnt1d {z14\.d-z15\.d}, pn9, \[x26, x3, lsl #3\]
+[^:]+: a021e001 stnt1d {z0\.d-z3\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a021e001 stnt1d {z0\.d-z3\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a021e001 stnt1d {z0\.d-z3\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a021e01d stnt1d {z28\.d-z31\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a021fc01 stnt1d {z0\.d-z3\.d}, pn15, \[x0, x1, lsl #3\]
+[^:]+: a021e3c1 stnt1d {z0\.d-z3\.d}, pn8, \[x30, x1, lsl #3\]
+[^:]+: a021e3e1 stnt1d {z0\.d-z3\.d}, pn8, \[sp, x1, lsl #3\]
+[^:]+: a03ee001 stnt1d {z0\.d-z3\.d}, pn8, \[x0, x30, lsl #3\]
+[^:]+: a03fe001 stnt1d {z0\.d-z3\.d}, pn8, \[x0, xzr, lsl #3\]
+[^:]+: a021ef69 stnt1d {z8\.d-z11\.d}, pn11, \[x27, x1, lsl #3\]
+[^:]+: a1216008 stnt1d {z0\.d, z8\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216008 stnt1d {z0\.d, z8\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216008 stnt1d {z0\.d, z8\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216009 stnt1d {z1\.d, z9\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121600a stnt1d {z2\.d, z10\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121600b stnt1d {z3\.d, z11\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121600c stnt1d {z4\.d, z12\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121600d stnt1d {z5\.d, z13\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121600e stnt1d {z6\.d, z14\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121600f stnt1d {z7\.d, z15\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216018 stnt1d {z16\.d, z24\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1216019 stnt1d {z17\.d, z25\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121601a stnt1d {z18\.d, z26\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121601b stnt1d {z19\.d, z27\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121601c stnt1d {z20\.d, z28\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121601d stnt1d {z21\.d, z29\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121601e stnt1d {z22\.d, z30\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121601f stnt1d {z23\.d, z31\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a1217c08 stnt1d {z0\.d, z8\.d}, pn15, \[x0, x1, lsl #3\]
+[^:]+: a12163c8 stnt1d {z0\.d, z8\.d}, pn8, \[x30, x1, lsl #3\]
+[^:]+: a12163e8 stnt1d {z0\.d, z8\.d}, pn8, \[sp, x1, lsl #3\]
+[^:]+: a13e6008 stnt1d {z0\.d, z8\.d}, pn8, \[x0, x30, lsl #3\]
+[^:]+: a13f6008 stnt1d {z0\.d, z8\.d}, pn8, \[x0, xzr, lsl #3\]
+[^:]+: a13879ed stnt1d {z5\.d, z13\.d}, pn14, \[x15, x24, lsl #3\]
+[^:]+: a121e008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e009 stnt1d {z1\.d, z5\.d, z9\.d, z13\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e00a stnt1d {z2\.d, z6\.d, z10\.d, z14\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e00b stnt1d {z3\.d, z7\.d, z11\.d, z15\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e018 stnt1d {z16\.d, z20\.d, z24\.d, z28\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e019 stnt1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e01a stnt1d {z18\.d, z22\.d, z26\.d, z30\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121e01b stnt1d {z19\.d, z23\.d, z27\.d, z31\.d}, pn8, \[x0, x1, lsl #3\]
+[^:]+: a121fc08 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn15, \[x0, x1, lsl #3\]
+[^:]+: a121e3c8 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x30, x1, lsl #3\]
+[^:]+: a121e3e8 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[sp, x1, lsl #3\]
+[^:]+: a13ee008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, x30, lsl #3\]
+[^:]+: a13fe008 stnt1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8, \[x0, xzr, lsl #3\]
+[^:]+: a126ec99 stnt1d {z17\.d, z21\.d, z25\.d, z29\.d}, pn11, \[x4, x6, lsl #3\]
diff --git a/gas/testsuite/gas/aarch64/sme2-3.s b/gas/testsuite/gas/aarch64/sme2-3.s
new file mode 100644
index 00000000000..d90b5e34ece
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-3.s
@@ -0,0 +1,511 @@
+ ld1d { z0.d - z1.d }, pn8/z, [x0]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, #0, mul vl]
+ LD1D { Z0.D - Z1.D }, PN8/Z, [X0]
+ ld1d { z30.d - z31.d }, pn8/z, [x0]
+ ld1d { z0.d - z1.d }, pn15/z, [x0]
+ ld1d { z0.d - z1.d }, pn8/z, [x30]
+ ld1d { z0.d - z1.d }, pn8/z, [sp]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, #-16, mul vl]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, #14, mul vl]
+ ld1d { z12.d - z13.d }, pn13/z, [x11, #-10, mul vl]
+
+ ld1d { z0.d - z3.d }, pn8/z, [x0]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, #0, mul vl]
+ LD1D { Z0.D - Z3.D }, PN8/Z, [X0]
+ ld1d { z28.d - z31.d }, pn8/z, [x0]
+ ld1d { z0.d - z3.d }, pn15/z, [x0]
+ ld1d { z0.d - z3.d }, pn8/z, [x30]
+ ld1d { z0.d - z3.d }, pn8/z, [sp]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, #-32, mul vl]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, #28, mul vl]
+ ld1d { z8.d - z11.d }, pn11/z, [x17, #20, mul vl]
+
+ ld1d { z0.d, z8.d }, pn8/z, [x0]
+ ld1d { z0.d, z8.d }, pn8/z, [x0, #0, mul vl]
+ LD1D { Z0.D, Z8.D }, PN8/Z, [X0]
+ ld1d { z1.d, z9.d }, pn8/z, [x0]
+ ld1d { z2.d, z10.d }, pn8/z, [x0]
+ ld1d { z3.d, z11.d }, pn8/z, [x0]
+ ld1d { z4.d, z12.d }, pn8/z, [x0]
+ ld1d { z5.d, z13.d }, pn8/z, [x0]
+ ld1d { z6.d, z14.d }, pn8/z, [x0]
+ ld1d { z7.d, z15.d }, pn8/z, [x0]
+ ld1d { z16.d, z24.d }, pn8/z, [x0]
+ ld1d { z17.d, z25.d }, pn8/z, [x0]
+ ld1d { z18.d, z26.d }, pn8/z, [x0]
+ ld1d { z19.d, z27.d }, pn8/z, [x0]
+ ld1d { z20.d, z28.d }, pn8/z, [x0]
+ ld1d { z21.d, z29.d }, pn8/z, [x0]
+ ld1d { z22.d, z30.d }, pn8/z, [x0]
+ ld1d { z23.d, z31.d }, pn8/z, [x0]
+ ld1d { z0.d, z8.d }, pn15/z, [x0]
+ ld1d { z0.d, z8.d }, pn8/z, [x30]
+ ld1d { z0.d, z8.d }, pn8/z, [sp]
+ ld1d { z0.d, z8.d }, pn8/z, [x0, #-16, mul vl]
+ ld1d { z0.d, z8.d }, pn8/z, [x0, #14, mul vl]
+ ld1d { z3.d, z11.d }, pn10/z, [x22, #6, mul vl]
+
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, #0, mul vl]
+ LD1D { Z0.D, Z4.D, Z8.D, Z12.D }, PN8/Z, [X0]
+ ld1d { z1.d, z5.d, z9.d, z13.d }, pn8/z, [x0]
+ ld1d { z2.d, z6.d, z10.d, z14.d }, pn8/z, [x0]
+ ld1d { z3.d, z7.d, z11.d, z15.d }, pn8/z, [x0]
+ ld1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [x0]
+ ld1d { z17.d, z21.d, z25.d, z29.d }, pn8/z, [x0]
+ ld1d { z18.d, z22.d, z26.d, z30.d }, pn8/z, [x0]
+ ld1d { z19.d, z23.d, z27.d, z31.d }, pn8/z, [x0]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn15/z, [x0]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x30]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [sp]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, #-32, mul vl]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, #28, mul vl]
+ ld1d { z2.d, z6.d, z10.d, z14.d }, pn14/z, [x29, #8, mul vl]
+
+ ld1d { z0.d - z1.d }, pn8/z, [x0, x1, lsl 3]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, x1, lsl #3]
+ LD1D { Z0.D - Z1.D }, PN8/Z, [X0, X1, LSL #3]
+ ld1d { z30.d - z31.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn15/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/z, [x30, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/z, [sp, x1, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, x30, lsl #3]
+ ld1d { z0.d - z1.d }, pn8/z, [x0, xzr, lsl #3]
+ ld1d { z14.d - z15.d }, pn9/z, [x26, x3, lsl #3]
+
+ ld1d { z0.d - z3.d }, pn8/z, [x0, x1, lsl 3]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, x1, lsl #3]
+ LD1D { Z0.D - Z3.D }, PN8/Z, [X0, X1, LSL #3]
+ ld1d { z28.d - z31.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn15/z, [x0, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/z, [x30, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/z, [sp, x1, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, x30, lsl #3]
+ ld1d { z0.d - z3.d }, pn8/z, [x0, xzr, lsl #3]
+ ld1d { z8.d - z11.d }, pn11/z, [x27, x1, lsl #3]
+
+ ld1d { z0.d, z8.d }, pn8/z, [x0, x1, lsl 3]
+ ld1d { z0.d, z8.d }, pn8/z, [x0, x1, lsl #3]
+ LD1D { Z0.D, Z8.D }, PN8/Z, [X0, X1, LSL #3]
+ ld1d { z1.d, z9.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z2.d, z10.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z3.d, z11.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z4.d, z12.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z5.d, z13.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z6.d, z14.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z7.d, z15.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z16.d, z24.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z17.d, z25.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z18.d, z26.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z19.d, z27.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z20.d, z28.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z21.d, z29.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z22.d, z30.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z23.d, z31.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z8.d }, pn15/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z8.d }, pn8/z, [x30, x1, lsl #3]
+ ld1d { z0.d, z8.d }, pn8/z, [sp, x1, lsl #3]
+ ld1d { z0.d, z8.d }, pn8/z, [x0, x30, lsl #3]
+ ld1d { z0.d, z8.d }, pn8/z, [x0, xzr, lsl #3]
+ ld1d { z5.d, z13.d }, pn14/z, [x15, x24, lsl #3]
+
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x1, lsl 3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x1, lsl #3]
+ LD1D { Z0.D, Z4.D, Z8.D, Z12.D }, PN8/Z, [X0, X1, LSL #3]
+ ld1d { z1.d, z5.d, z9.d, z13.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z2.d, z6.d, z10.d, z14.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z3.d, z7.d, z11.d, z15.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z17.d, z21.d, z25.d, z29.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z18.d, z22.d, z26.d, z30.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z19.d, z23.d, z27.d, z31.d }, pn8/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn15/z, [x0, x1, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x30, x1, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [sp, x1, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x30, lsl #3]
+ ld1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, xzr, lsl #3]
+ ld1d { z17.d, z21.d, z25.d, z29.d }, pn11/z, [x4, x6, lsl #3]
+
+ ldnt1d { z0.d - z1.d }, pn8/z, [x0]
+ ldnt1d { z0.d - z1.d }, pn8/z, [x0, #0, mul vl]
+ LDNT1D { Z0.D - Z1.D }, PN8/Z, [X0]
+ ldnt1d { z30.d - z31.d }, pn8/z, [x0]
+ ldnt1d { z0.d - z1.d }, pn15/z, [x0]
+ ldnt1d { z0.d - z1.d }, pn8/z, [x30]
+ ldnt1d { z0.d - z1.d }, pn8/z, [sp]
+ ldnt1d { z0.d - z1.d }, pn8/z, [x0, #-16, mul vl]
+ ldnt1d { z0.d - z1.d }, pn8/z, [x0, #14, mul vl]
+ ldnt1d { z12.d - z13.d }, pn13/z, [x11, #-10, mul vl]
+
+ ldnt1d { z0.d - z3.d }, pn8/z, [x0]
+ ldnt1d { z0.d - z3.d }, pn8/z, [x0, #0, mul vl]
+ LDNT1D { Z0.D - Z3.D }, PN8/Z, [X0]
+ ldnt1d { z28.d - z31.d }, pn8/z, [x0]
+ ldnt1d { z0.d - z3.d }, pn15/z, [x0]
+ ldnt1d { z0.d - z3.d }, pn8/z, [x30]
+ ldnt1d { z0.d - z3.d }, pn8/z, [sp]
+ ldnt1d { z0.d - z3.d }, pn8/z, [x0, #-32, mul vl]
+ ldnt1d { z0.d - z3.d }, pn8/z, [x0, #28, mul vl]
+ ldnt1d { z8.d - z11.d }, pn11/z, [x17, #20, mul vl]
+
+ ldnt1d { z0.d, z8.d }, pn8/z, [x0]
+ ldnt1d { z0.d, z8.d }, pn8/z, [x0, #0, mul vl]
+ LDNT1D { Z0.D, Z8.D }, PN8/Z, [X0]
+ ldnt1d { z1.d, z9.d }, pn8/z, [x0]
+ ldnt1d { z2.d, z10.d }, pn8/z, [x0]
+ ldnt1d { z3.d, z11.d }, pn8/z, [x0]
+ ldnt1d { z4.d, z12.d }, pn8/z, [x0]
+ ldnt1d { z5.d, z13.d }, pn8/z, [x0]
+ ldnt1d { z6.d, z14.d }, pn8/z, [x0]
+ ldnt1d { z7.d, z15.d }, pn8/z, [x0]
+ ldnt1d { z16.d, z24.d }, pn8/z, [x0]
+ ldnt1d { z17.d, z25.d }, pn8/z, [x0]
+ ldnt1d { z18.d, z26.d }, pn8/z, [x0]
+ ldnt1d { z19.d, z27.d }, pn8/z, [x0]
+ ldnt1d { z20.d, z28.d }, pn8/z, [x0]
+ ldnt1d { z21.d, z29.d }, pn8/z, [x0]
+ ldnt1d { z22.d, z30.d }, pn8/z, [x0]
+ ldnt1d { z23.d, z31.d }, pn8/z, [x0]
+ ldnt1d { z0.d, z8.d }, pn15/z, [x0]
+ ldnt1d { z0.d, z8.d }, pn8/z, [x30]
+ ldnt1d { z0.d, z8.d }, pn8/z, [sp]
+ ldnt1d { z0.d, z8.d }, pn8/z, [x0, #-16, mul vl]
+ ldnt1d { z0.d, z8.d }, pn8/z, [x0, #14, mul vl]
+ ldnt1d { z3.d, z11.d }, pn10/z, [x22, #6, mul vl]
+
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, #0, mul vl]
+ LDNT1D { Z0.D, Z4.D, Z8.D, Z12.D }, PN8/Z, [X0]
+ ldnt1d { z1.d, z5.d, z9.d, z13.d }, pn8/z, [x0]
+ ldnt1d { z2.d, z6.d, z10.d, z14.d }, pn8/z, [x0]
+ ldnt1d { z3.d, z7.d, z11.d, z15.d }, pn8/z, [x0]
+ ldnt1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [x0]
+ ldnt1d { z17.d, z21.d, z25.d, z29.d }, pn8/z, [x0]
+ ldnt1d { z18.d, z22.d, z26.d, z30.d }, pn8/z, [x0]
+ ldnt1d { z19.d, z23.d, z27.d, z31.d }, pn8/z, [x0]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn15/z, [x0]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x30]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [sp]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, #-32, mul vl]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, #28, mul vl]
+ ldnt1d { z2.d, z6.d, z10.d, z14.d }, pn14/z, [x29, #8, mul vl]
+
+ ldnt1d { z0.d - z1.d }, pn8/z, [x0, x1, lsl 3]
+ ldnt1d { z0.d - z1.d }, pn8/z, [x0, x1, lsl #3]
+ LDNT1D { Z0.D - Z1.D }, PN8/Z, [X0, X1, LSL #3]
+ ldnt1d { z30.d - z31.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z0.d - z1.d }, pn15/z, [x0, x1, lsl #3]
+ ldnt1d { z0.d - z1.d }, pn8/z, [x30, x1, lsl #3]
+ ldnt1d { z0.d - z1.d }, pn8/z, [sp, x1, lsl #3]
+ ldnt1d { z0.d - z1.d }, pn8/z, [x0, x30, lsl #3]
+ ldnt1d { z0.d - z1.d }, pn8/z, [x0, xzr, lsl #3]
+ ldnt1d { z14.d - z15.d }, pn9/z, [x26, x3, lsl #3]
+
+ ldnt1d { z0.d - z3.d }, pn8/z, [x0, x1, lsl 3]
+ ldnt1d { z0.d - z3.d }, pn8/z, [x0, x1, lsl #3]
+ LDNT1D { Z0.D - Z3.D }, PN8/Z, [X0, X1, LSL #3]
+ ldnt1d { z28.d - z31.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z0.d - z3.d }, pn15/z, [x0, x1, lsl #3]
+ ldnt1d { z0.d - z3.d }, pn8/z, [x30, x1, lsl #3]
+ ldnt1d { z0.d - z3.d }, pn8/z, [sp, x1, lsl #3]
+ ldnt1d { z0.d - z3.d }, pn8/z, [x0, x30, lsl #3]
+ ldnt1d { z0.d - z3.d }, pn8/z, [x0, xzr, lsl #3]
+ ldnt1d { z8.d - z11.d }, pn11/z, [x27, x1, lsl #3]
+
+ ldnt1d { z0.d, z8.d }, pn8/z, [x0, x1, lsl 3]
+ ldnt1d { z0.d, z8.d }, pn8/z, [x0, x1, lsl #3]
+ LDNT1D { Z0.D, Z8.D }, PN8/Z, [X0, X1, LSL #3]
+ ldnt1d { z1.d, z9.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z2.d, z10.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z3.d, z11.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z4.d, z12.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z5.d, z13.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z6.d, z14.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z7.d, z15.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z16.d, z24.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z17.d, z25.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z18.d, z26.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z19.d, z27.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z20.d, z28.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z21.d, z29.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z22.d, z30.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z23.d, z31.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z0.d, z8.d }, pn15/z, [x0, x1, lsl #3]
+ ldnt1d { z0.d, z8.d }, pn8/z, [x30, x1, lsl #3]
+ ldnt1d { z0.d, z8.d }, pn8/z, [sp, x1, lsl #3]
+ ldnt1d { z0.d, z8.d }, pn8/z, [x0, x30, lsl #3]
+ ldnt1d { z0.d, z8.d }, pn8/z, [x0, xzr, lsl #3]
+ ldnt1d { z5.d, z13.d }, pn14/z, [x15, x24, lsl #3]
+
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x1, lsl 3]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x1, lsl #3]
+ LDNT1D { Z0.D, Z4.D, Z8.D, Z12.D }, PN8/Z, [X0, X1, LSL #3]
+ ldnt1d { z1.d, z5.d, z9.d, z13.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z2.d, z6.d, z10.d, z14.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z3.d, z7.d, z11.d, z15.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z17.d, z21.d, z25.d, z29.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z18.d, z22.d, z26.d, z30.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z19.d, z23.d, z27.d, z31.d }, pn8/z, [x0, x1, lsl #3]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn15/z, [x0, x1, lsl #3]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x30, x1, lsl #3]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [sp, x1, lsl #3]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x30, lsl #3]
+ ldnt1d { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, xzr, lsl #3]
+ ldnt1d { z17.d, z21.d, z25.d, z29.d }, pn11/z, [x4, x6, lsl #3]
+
+ st1d { z0.d - z1.d }, pn8, [x0]
+ st1d { z0.d - z1.d }, pn8, [x0, #0, mul vl]
+ ST1D { Z0.D - Z1.D }, PN8, [X0]
+ st1d { z30.d - z31.d }, pn8, [x0]
+ st1d { z0.d - z1.d }, pn15, [x0]
+ st1d { z0.d - z1.d }, pn8, [x30]
+ st1d { z0.d - z1.d }, pn8, [sp]
+ st1d { z0.d - z1.d }, pn8, [x0, #-16, mul vl]
+ st1d { z0.d - z1.d }, pn8, [x0, #14, mul vl]
+ st1d { z12.d - z13.d }, pn13, [x11, #-10, mul vl]
+
+ st1d { z0.d - z3.d }, pn8, [x0]
+ st1d { z0.d - z3.d }, pn8, [x0, #0, mul vl]
+ ST1D { Z0.D - Z3.D }, PN8, [X0]
+ st1d { z28.d - z31.d }, pn8, [x0]
+ st1d { z0.d - z3.d }, pn15, [x0]
+ st1d { z0.d - z3.d }, pn8, [x30]
+ st1d { z0.d - z3.d }, pn8, [sp]
+ st1d { z0.d - z3.d }, pn8, [x0, #-32, mul vl]
+ st1d { z0.d - z3.d }, pn8, [x0, #28, mul vl]
+ st1d { z8.d - z11.d }, pn11, [x17, #20, mul vl]
+
+ st1d { z0.d, z8.d }, pn8, [x0]
+ st1d { z0.d, z8.d }, pn8, [x0, #0, mul vl]
+ ST1D { Z0.D, Z8.D }, PN8, [X0]
+ st1d { z1.d, z9.d }, pn8, [x0]
+ st1d { z2.d, z10.d }, pn8, [x0]
+ st1d { z3.d, z11.d }, pn8, [x0]
+ st1d { z4.d, z12.d }, pn8, [x0]
+ st1d { z5.d, z13.d }, pn8, [x0]
+ st1d { z6.d, z14.d }, pn8, [x0]
+ st1d { z7.d, z15.d }, pn8, [x0]
+ st1d { z16.d, z24.d }, pn8, [x0]
+ st1d { z17.d, z25.d }, pn8, [x0]
+ st1d { z18.d, z26.d }, pn8, [x0]
+ st1d { z19.d, z27.d }, pn8, [x0]
+ st1d { z20.d, z28.d }, pn8, [x0]
+ st1d { z21.d, z29.d }, pn8, [x0]
+ st1d { z22.d, z30.d }, pn8, [x0]
+ st1d { z23.d, z31.d }, pn8, [x0]
+ st1d { z0.d, z8.d }, pn15, [x0]
+ st1d { z0.d, z8.d }, pn8, [x30]
+ st1d { z0.d, z8.d }, pn8, [sp]
+ st1d { z0.d, z8.d }, pn8, [x0, #-16, mul vl]
+ st1d { z0.d, z8.d }, pn8, [x0, #14, mul vl]
+ st1d { z3.d, z11.d }, pn10, [x22, #6, mul vl]
+
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, #0, mul vl]
+ ST1D { Z0.D, Z4.D, Z8.D, Z12.D }, PN8, [X0]
+ st1d { z1.d, z5.d, z9.d, z13.d }, pn8, [x0]
+ st1d { z2.d, z6.d, z10.d, z14.d }, pn8, [x0]
+ st1d { z3.d, z7.d, z11.d, z15.d }, pn8, [x0]
+ st1d { z16.d, z20.d, z24.d, z28.d }, pn8, [x0]
+ st1d { z17.d, z21.d, z25.d, z29.d }, pn8, [x0]
+ st1d { z18.d, z22.d, z26.d, z30.d }, pn8, [x0]
+ st1d { z19.d, z23.d, z27.d, z31.d }, pn8, [x0]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn15, [x0]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x30]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [sp]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, #-32, mul vl]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, #28, mul vl]
+ st1d { z2.d, z6.d, z10.d, z14.d }, pn14, [x29, #8, mul vl]
+
+ st1d { z0.d - z1.d }, pn8, [x0, x1, lsl 3]
+ st1d { z0.d - z1.d }, pn8, [x0, x1, lsl #3]
+ ST1D { Z0.D - Z1.D }, PN8, [X0, X1, LSL #3]
+ st1d { z30.d - z31.d }, pn8, [x0, x1, lsl #3]
+ st1d { z0.d - z1.d }, pn15, [x0, x1, lsl #3]
+ st1d { z0.d - z1.d }, pn8, [x30, x1, lsl #3]
+ st1d { z0.d - z1.d }, pn8, [sp, x1, lsl #3]
+ st1d { z0.d - z1.d }, pn8, [x0, x30, lsl #3]
+ st1d { z0.d - z1.d }, pn8, [x0, xzr, lsl #3]
+ st1d { z14.d - z15.d }, pn9, [x26, x3, lsl #3]
+
+ st1d { z0.d - z3.d }, pn8, [x0, x1, lsl 3]
+ st1d { z0.d - z3.d }, pn8, [x0, x1, lsl #3]
+ ST1D { Z0.D - Z3.D }, PN8, [X0, X1, LSL #3]
+ st1d { z28.d - z31.d }, pn8, [x0, x1, lsl #3]
+ st1d { z0.d - z3.d }, pn15, [x0, x1, lsl #3]
+ st1d { z0.d - z3.d }, pn8, [x30, x1, lsl #3]
+ st1d { z0.d - z3.d }, pn8, [sp, x1, lsl #3]
+ st1d { z0.d - z3.d }, pn8, [x0, x30, lsl #3]
+ st1d { z0.d - z3.d }, pn8, [x0, xzr, lsl #3]
+ st1d { z8.d - z11.d }, pn11, [x27, x1, lsl #3]
+
+ st1d { z0.d, z8.d }, pn8, [x0, x1, lsl 3]
+ st1d { z0.d, z8.d }, pn8, [x0, x1, lsl #3]
+ ST1D { Z0.D, Z8.D }, PN8, [X0, X1, LSL #3]
+ st1d { z1.d, z9.d }, pn8, [x0, x1, lsl #3]
+ st1d { z2.d, z10.d }, pn8, [x0, x1, lsl #3]
+ st1d { z3.d, z11.d }, pn8, [x0, x1, lsl #3]
+ st1d { z4.d, z12.d }, pn8, [x0, x1, lsl #3]
+ st1d { z5.d, z13.d }, pn8, [x0, x1, lsl #3]
+ st1d { z6.d, z14.d }, pn8, [x0, x1, lsl #3]
+ st1d { z7.d, z15.d }, pn8, [x0, x1, lsl #3]
+ st1d { z16.d, z24.d }, pn8, [x0, x1, lsl #3]
+ st1d { z17.d, z25.d }, pn8, [x0, x1, lsl #3]
+ st1d { z18.d, z26.d }, pn8, [x0, x1, lsl #3]
+ st1d { z19.d, z27.d }, pn8, [x0, x1, lsl #3]
+ st1d { z20.d, z28.d }, pn8, [x0, x1, lsl #3]
+ st1d { z21.d, z29.d }, pn8, [x0, x1, lsl #3]
+ st1d { z22.d, z30.d }, pn8, [x0, x1, lsl #3]
+ st1d { z23.d, z31.d }, pn8, [x0, x1, lsl #3]
+ st1d { z0.d, z8.d }, pn15, [x0, x1, lsl #3]
+ st1d { z0.d, z8.d }, pn8, [x30, x1, lsl #3]
+ st1d { z0.d, z8.d }, pn8, [sp, x1, lsl #3]
+ st1d { z0.d, z8.d }, pn8, [x0, x30, lsl #3]
+ st1d { z0.d, z8.d }, pn8, [x0, xzr, lsl #3]
+ st1d { z5.d, z13.d }, pn14, [x15, x24, lsl #3]
+
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, x1, lsl 3]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, x1, lsl #3]
+ ST1D { Z0.D, Z4.D, Z8.D, Z12.D }, PN8, [X0, X1, LSL #3]
+ st1d { z1.d, z5.d, z9.d, z13.d }, pn8, [x0, x1, lsl #3]
+ st1d { z2.d, z6.d, z10.d, z14.d }, pn8, [x0, x1, lsl #3]
+ st1d { z3.d, z7.d, z11.d, z15.d }, pn8, [x0, x1, lsl #3]
+ st1d { z16.d, z20.d, z24.d, z28.d }, pn8, [x0, x1, lsl #3]
+ st1d { z17.d, z21.d, z25.d, z29.d }, pn8, [x0, x1, lsl #3]
+ st1d { z18.d, z22.d, z26.d, z30.d }, pn8, [x0, x1, lsl #3]
+ st1d { z19.d, z23.d, z27.d, z31.d }, pn8, [x0, x1, lsl #3]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn15, [x0, x1, lsl #3]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x30, x1, lsl #3]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [sp, x1, lsl #3]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, x30, lsl #3]
+ st1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, xzr, lsl #3]
+ st1d { z17.d, z21.d, z25.d, z29.d }, pn11, [x4, x6, lsl #3]
+
+ stnt1d { z0.d - z1.d }, pn8, [x0]
+ stnt1d { z0.d - z1.d }, pn8, [x0, #0, mul vl]
+ STNT1D { Z0.D - Z1.D }, PN8, [X0]
+ stnt1d { z30.d - z31.d }, pn8, [x0]
+ stnt1d { z0.d - z1.d }, pn15, [x0]
+ stnt1d { z0.d - z1.d }, pn8, [x30]
+ stnt1d { z0.d - z1.d }, pn8, [sp]
+ stnt1d { z0.d - z1.d }, pn8, [x0, #-16, mul vl]
+ stnt1d { z0.d - z1.d }, pn8, [x0, #14, mul vl]
+ stnt1d { z12.d - z13.d }, pn13, [x11, #-10, mul vl]
+
+ stnt1d { z0.d - z3.d }, pn8, [x0]
+ stnt1d { z0.d - z3.d }, pn8, [x0, #0, mul vl]
+ STNT1D { Z0.D - Z3.D }, PN8, [X0]
+ stnt1d { z28.d - z31.d }, pn8, [x0]
+ stnt1d { z0.d - z3.d }, pn15, [x0]
+ stnt1d { z0.d - z3.d }, pn8, [x30]
+ stnt1d { z0.d - z3.d }, pn8, [sp]
+ stnt1d { z0.d - z3.d }, pn8, [x0, #-32, mul vl]
+ stnt1d { z0.d - z3.d }, pn8, [x0, #28, mul vl]
+ stnt1d { z8.d - z11.d }, pn11, [x17, #20, mul vl]
+
+ stnt1d { z0.d, z8.d }, pn8, [x0]
+ stnt1d { z0.d, z8.d }, pn8, [x0, #0, mul vl]
+ STNT1D { Z0.D, Z8.D }, PN8, [X0]
+ stnt1d { z1.d, z9.d }, pn8, [x0]
+ stnt1d { z2.d, z10.d }, pn8, [x0]
+ stnt1d { z3.d, z11.d }, pn8, [x0]
+ stnt1d { z4.d, z12.d }, pn8, [x0]
+ stnt1d { z5.d, z13.d }, pn8, [x0]
+ stnt1d { z6.d, z14.d }, pn8, [x0]
+ stnt1d { z7.d, z15.d }, pn8, [x0]
+ stnt1d { z16.d, z24.d }, pn8, [x0]
+ stnt1d { z17.d, z25.d }, pn8, [x0]
+ stnt1d { z18.d, z26.d }, pn8, [x0]
+ stnt1d { z19.d, z27.d }, pn8, [x0]
+ stnt1d { z20.d, z28.d }, pn8, [x0]
+ stnt1d { z21.d, z29.d }, pn8, [x0]
+ stnt1d { z22.d, z30.d }, pn8, [x0]
+ stnt1d { z23.d, z31.d }, pn8, [x0]
+ stnt1d { z0.d, z8.d }, pn15, [x0]
+ stnt1d { z0.d, z8.d }, pn8, [x30]
+ stnt1d { z0.d, z8.d }, pn8, [sp]
+ stnt1d { z0.d, z8.d }, pn8, [x0, #-16, mul vl]
+ stnt1d { z0.d, z8.d }, pn8, [x0, #14, mul vl]
+ stnt1d { z3.d, z11.d }, pn10, [x22, #6, mul vl]
+
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, #0, mul vl]
+ STNT1D { Z0.D, Z4.D, Z8.D, Z12.D }, PN8, [X0]
+ stnt1d { z1.d, z5.d, z9.d, z13.d }, pn8, [x0]
+ stnt1d { z2.d, z6.d, z10.d, z14.d }, pn8, [x0]
+ stnt1d { z3.d, z7.d, z11.d, z15.d }, pn8, [x0]
+ stnt1d { z16.d, z20.d, z24.d, z28.d }, pn8, [x0]
+ stnt1d { z17.d, z21.d, z25.d, z29.d }, pn8, [x0]
+ stnt1d { z18.d, z22.d, z26.d, z30.d }, pn8, [x0]
+ stnt1d { z19.d, z23.d, z27.d, z31.d }, pn8, [x0]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn15, [x0]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x30]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [sp]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, #-32, mul vl]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, #28, mul vl]
+ stnt1d { z2.d, z6.d, z10.d, z14.d }, pn14, [x29, #8, mul vl]
+
+ stnt1d { z0.d - z1.d }, pn8, [x0, x1, lsl 3]
+ stnt1d { z0.d - z1.d }, pn8, [x0, x1, lsl #3]
+ STNT1D { Z0.D - Z1.D }, PN8, [X0, X1, LSL #3]
+ stnt1d { z30.d - z31.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z0.d - z1.d }, pn15, [x0, x1, lsl #3]
+ stnt1d { z0.d - z1.d }, pn8, [x30, x1, lsl #3]
+ stnt1d { z0.d - z1.d }, pn8, [sp, x1, lsl #3]
+ stnt1d { z0.d - z1.d }, pn8, [x0, x30, lsl #3]
+ stnt1d { z0.d - z1.d }, pn8, [x0, xzr, lsl #3]
+ stnt1d { z14.d - z15.d }, pn9, [x26, x3, lsl #3]
+
+ stnt1d { z0.d - z3.d }, pn8, [x0, x1, lsl 3]
+ stnt1d { z0.d - z3.d }, pn8, [x0, x1, lsl #3]
+ STNT1D { Z0.D - Z3.D }, PN8, [X0, X1, LSL #3]
+ stnt1d { z28.d - z31.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z0.d - z3.d }, pn15, [x0, x1, lsl #3]
+ stnt1d { z0.d - z3.d }, pn8, [x30, x1, lsl #3]
+ stnt1d { z0.d - z3.d }, pn8, [sp, x1, lsl #3]
+ stnt1d { z0.d - z3.d }, pn8, [x0, x30, lsl #3]
+ stnt1d { z0.d - z3.d }, pn8, [x0, xzr, lsl #3]
+ stnt1d { z8.d - z11.d }, pn11, [x27, x1, lsl #3]
+
+ stnt1d { z0.d, z8.d }, pn8, [x0, x1, lsl 3]
+ stnt1d { z0.d, z8.d }, pn8, [x0, x1, lsl #3]
+ STNT1D { Z0.D, Z8.D }, PN8, [X0, X1, LSL #3]
+ stnt1d { z1.d, z9.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z2.d, z10.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z3.d, z11.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z4.d, z12.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z5.d, z13.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z6.d, z14.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z7.d, z15.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z16.d, z24.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z17.d, z25.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z18.d, z26.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z19.d, z27.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z20.d, z28.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z21.d, z29.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z22.d, z30.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z23.d, z31.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z0.d, z8.d }, pn15, [x0, x1, lsl #3]
+ stnt1d { z0.d, z8.d }, pn8, [x30, x1, lsl #3]
+ stnt1d { z0.d, z8.d }, pn8, [sp, x1, lsl #3]
+ stnt1d { z0.d, z8.d }, pn8, [x0, x30, lsl #3]
+ stnt1d { z0.d, z8.d }, pn8, [x0, xzr, lsl #3]
+ stnt1d { z5.d, z13.d }, pn14, [x15, x24, lsl #3]
+
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, x1, lsl 3]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, x1, lsl #3]
+ STNT1D { Z0.D, Z4.D, Z8.D, Z12.D }, PN8, [X0, X1, LSL #3]
+ stnt1d { z1.d, z5.d, z9.d, z13.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z2.d, z6.d, z10.d, z14.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z3.d, z7.d, z11.d, z15.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z16.d, z20.d, z24.d, z28.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z17.d, z21.d, z25.d, z29.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z18.d, z22.d, z26.d, z30.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z19.d, z23.d, z27.d, z31.d }, pn8, [x0, x1, lsl #3]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn15, [x0, x1, lsl #3]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x30, x1, lsl #3]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [sp, x1, lsl #3]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, x30, lsl #3]
+ stnt1d { z0.d, z4.d, z8.d, z12.d }, pn8, [x0, xzr, lsl #3]
+ stnt1d { z17.d, z21.d, z25.d, z29.d }, pn11, [x4, x6, lsl #3]
diff --git a/gas/testsuite/gas/aarch64/sme2-4-invalid.d b/gas/testsuite/gas/aarch64/sme2-4-invalid.d
new file mode 100644
index 00000000000..8c097df8dfd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-4-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-4-invalid.s
+#error_output: sme2-4-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-4-invalid.l b/gas/testsuite/gas/aarch64/sme2-4-invalid.l
new file mode 100644
index 00000000000..d763939ebab
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-4-invalid.l
@@ -0,0 +1,75 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1h 0,pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1h {z0\.h-z1\.h},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1h {z0\.h-z2\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z1\.h-z2\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h-z1\.h},p8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8/m,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8\.h,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z1\.h},pn0/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z1\.h},pn7/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[w0,w1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[xzr,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[sp,sp,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,w1,sxtw#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,w1,uxtw#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z1\.h-z4\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z2\.h-z5\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z3\.h-z6\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h-z3\.h},p8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8/m,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8\.h,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z3\.h},pn0/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z3\.h},pn7/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[w0,w1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[xzr,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[sp,sp,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,w1,sxtw#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,w1,uxtw#1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z2\.h},pn8/z,\[x0,x1,lsl#1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z3\.h},pn8/z,\[x0,x1,lsl#1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z4\.h},pn8/z,\[x0,x1,lsl#1\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z8\.h,z16\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z24\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z8\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1h {z0\.h, z8\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h,z8\.h},p8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[w0,w30,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[xzr,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[x0,sp,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z4\.h,z8\.h,z12\.h,z16\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z20\.h,z24\.h,z28\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},p8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[w0,w30,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[xzr,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,sp,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#3\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-4-invalid.s b/gas/testsuite/gas/aarch64/sme2-4-invalid.s
new file mode 100644
index 00000000000..060b0b6e134
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-4-invalid.s
@@ -0,0 +1,62 @@
+ ld1h 0, pn8/z, [x0]
+ ld1h { z0.h - z1.h }, 0, [x0]
+ ld1h { z0.h - z1.h }, pn8/z, 0
+
+ ld1h { z0.h - z2.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z1.h - z2.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, p8/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/m, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8.h, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn0/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn7/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/z, [w0, w1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/z, [xzr, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/z, [sp, sp, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, x1]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, x1, lsl #2]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, x1, lsl #3]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, x1, lsl #4]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, w1, sxtw #1]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, w1, uxtw #1]
+
+ ld1h { z1.h - z4.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z2.h - z5.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z3.h - z6.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, p8/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/m, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8.h, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn0/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn7/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/z, [w0, w1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/z, [xzr, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/z, [sp, sp, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, x1]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, x1, lsl #2]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, x1, lsl #3]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, x1, lsl #4]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, w1, sxtw #1]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, w1, uxtw #1]
+
+ ld1h { z0.h, z2.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z3.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z4.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z8.h, z16.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z24.h, z0.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z8.h, z0.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.d, z8.d }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z8.h }, p8/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z8.h }, pn8/z, [w0, w30, lsl #1]
+ ld1h { z0.h, z8.h }, pn8/z, [xzr, xzr, lsl #1]
+ ld1h { z0.h, z8.h }, pn8/z, [x0, sp, lsl #1]
+ ld1h { z0.h, z8.h }, pn8/z, [x0, x1, lsl #2]
+
+ ld1h { z4.h, z8.h, z12.h, z16.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z20.h, z24.h, z28.h, z0.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.d, z4.d, z8.d, z12.d }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, p8/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [w0, w30, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [xzr, xzr, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, sp, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1, lsl #3]
diff --git a/gas/testsuite/gas/aarch64/sme2-4-noarch.d b/gas/testsuite/gas/aarch64/sme2-4-noarch.d
new file mode 100644
index 00000000000..f952d6a77f5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-4-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-4.s
+#error_output: sme2-4-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-4-noarch.l b/gas/testsuite/gas/aarch64/sme2-4-noarch.l
new file mode 100644
index 00000000000..c061de80c1a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-4-noarch.l
@@ -0,0 +1,481 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z1\.H},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z30\.h-z31\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z12\.h-z13\.h},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z3\.H},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z28\.h-z31\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z8\.h-z11\.h},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z8\.H},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z9\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z10\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z4\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z6\.h,z14\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z7\.h,z15\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z24\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z25\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z26\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z27\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z20\.h,z28\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z21\.h,z29\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z22\.h,z30\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z23\.h,z31\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z1\.H},PN8/Z,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z30\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn15/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z14\.h-z15\.h},pn9/z,\[x26,x3,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z3\.H},PN8/Z,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z28\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn15/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z8\.h-z11\.h},pn11/z,\[x27,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z8\.H},PN8/Z,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z9\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z10\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z4\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z6\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z7\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z24\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z25\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z26\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z27\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z20\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z21\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z22\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z23\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn15/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn14/z,\[x15,x24,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11/z,\[x4,x6,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z1\.H},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z30\.h-z31\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z12\.h-z13\.h},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z3\.H},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z28\.h-z31\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z8\.h-z11\.h},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z8\.H},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z9\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z10\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z4\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z6\.h,z14\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z7\.h,z15\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z24\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z25\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z26\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z27\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z20\.h,z28\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z21\.h,z29\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z22\.h,z30\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z23\.h,z31\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z1\.H},PN8/Z,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z30\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn15/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z14\.h-z15\.h},pn9/z,\[x26,x3,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z3\.H},PN8/Z,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z28\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn15/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z8\.h-z11\.h},pn11/z,\[x27,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z8\.H},PN8/Z,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z9\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z10\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z4\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z6\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z7\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z24\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z25\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z26\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z27\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z20\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z21\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z22\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z23\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn15/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn14/z,\[x15,x24,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11/z,\[x4,x6,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z1\.H},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z30\.h-z31\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z12\.h-z13\.h},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z3\.H},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z28\.h-z31\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z8\.h-z11\.h},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z8\.H},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z9\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z10\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z4\.h,z12\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z6\.h,z14\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z7\.h,z15\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z24\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z25\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z26\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z27\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z20\.h,z28\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z21\.h,z29\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z22\.h,z30\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z23\.h,z31\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z1\.H},PN8,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z30\.h-z31\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn15,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z14\.h-z15\.h},pn9,\[x26,x3,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z3\.H},PN8,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z28\.h-z31\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn15,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z8\.h-z11\.h},pn11,\[x27,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z8\.H},PN8,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z9\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z10\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z4\.h,z12\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z6\.h,z14\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z7\.h,z15\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z24\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z25\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z26\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z27\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z20\.h,z28\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z21\.h,z29\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z22\.h,z30\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z23\.h,z31\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn15,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn14,\[x15,x24,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11,\[x4,x6,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z1\.H},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z30\.h-z31\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z12\.h-z13\.h},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z3\.H},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z28\.h-z31\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z8\.h-z11\.h},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z8\.H},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z9\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z10\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z4\.h,z12\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z6\.h,z14\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z7\.h,z15\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z24\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z25\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z26\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z27\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z20\.h,z28\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z21\.h,z29\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z22\.h,z30\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z23\.h,z31\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z1\.H},PN8,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z30\.h-z31\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn15,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z14\.h-z15\.h},pn9,\[x26,x3,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z3\.H},PN8,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z28\.h-z31\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn15,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z8\.h-z11\.h},pn11,\[x27,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z8\.H},PN8,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z9\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z10\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z4\.h,z12\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z6\.h,z14\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z7\.h,z15\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z24\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z25\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z26\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z27\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z20\.h,z28\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z21\.h,z29\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z22\.h,z30\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z23\.h,z31\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn15,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn14,\[x15,x24,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl 1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0,X1,LSL#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x30,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,xzr,lsl#1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11,\[x4,x6,lsl#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-4.d b/gas/testsuite/gas/aarch64/sme2-4.d
new file mode 100644
index 00000000000..3aed5c5e4dc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-4.d
@@ -0,0 +1,489 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: a0402000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0\]
+[^:]+: a0402000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0\]
+[^:]+: a0402000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0\]
+[^:]+: a040201e ld1h {z30\.h-z31\.h}, pn8/z, \[x0\]
+[^:]+: a0403c00 ld1h {z0\.h-z1\.h}, pn15/z, \[x0\]
+[^:]+: a04023c0 ld1h {z0\.h-z1\.h}, pn8/z, \[x30\]
+[^:]+: a04023e0 ld1h {z0\.h-z1\.h}, pn8/z, \[sp\]
+[^:]+: a0482000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0472000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b356c ld1h {z12\.h-z13\.h}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a040a000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0\]
+[^:]+: a040a000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0\]
+[^:]+: a040a000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0\]
+[^:]+: a040a01c ld1h {z28\.h-z31\.h}, pn8/z, \[x0\]
+[^:]+: a040bc00 ld1h {z0\.h-z3\.h}, pn15/z, \[x0\]
+[^:]+: a040a3c0 ld1h {z0\.h-z3\.h}, pn8/z, \[x30\]
+[^:]+: a040a3e0 ld1h {z0\.h-z3\.h}, pn8/z, \[sp\]
+[^:]+: a048a000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a047a000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a045ae28 ld1h {z8\.h-z11\.h}, pn11/z, \[x17, #20, mul vl\]
+[^:]+: a1402000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0\]
+[^:]+: a1402000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0\]
+[^:]+: a1402000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0\]
+[^:]+: a1402001 ld1h {z1\.h, z9\.h}, pn8/z, \[x0\]
+[^:]+: a1402002 ld1h {z2\.h, z10\.h}, pn8/z, \[x0\]
+[^:]+: a1402003 ld1h {z3\.h, z11\.h}, pn8/z, \[x0\]
+[^:]+: a1402004 ld1h {z4\.h, z12\.h}, pn8/z, \[x0\]
+[^:]+: a1402005 ld1h {z5\.h, z13\.h}, pn8/z, \[x0\]
+[^:]+: a1402006 ld1h {z6\.h, z14\.h}, pn8/z, \[x0\]
+[^:]+: a1402007 ld1h {z7\.h, z15\.h}, pn8/z, \[x0\]
+[^:]+: a1402010 ld1h {z16\.h, z24\.h}, pn8/z, \[x0\]
+[^:]+: a1402011 ld1h {z17\.h, z25\.h}, pn8/z, \[x0\]
+[^:]+: a1402012 ld1h {z18\.h, z26\.h}, pn8/z, \[x0\]
+[^:]+: a1402013 ld1h {z19\.h, z27\.h}, pn8/z, \[x0\]
+[^:]+: a1402014 ld1h {z20\.h, z28\.h}, pn8/z, \[x0\]
+[^:]+: a1402015 ld1h {z21\.h, z29\.h}, pn8/z, \[x0\]
+[^:]+: a1402016 ld1h {z22\.h, z30\.h}, pn8/z, \[x0\]
+[^:]+: a1402017 ld1h {z23\.h, z31\.h}, pn8/z, \[x0\]
+[^:]+: a1403c00 ld1h {z0\.h, z8\.h}, pn15/z, \[x0\]
+[^:]+: a14023c0 ld1h {z0\.h, z8\.h}, pn8/z, \[x30\]
+[^:]+: a14023e0 ld1h {z0\.h, z8\.h}, pn8/z, \[sp\]
+[^:]+: a1482000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a1472000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1432ac3 ld1h {z3\.h, z11\.h}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a140a000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0\]
+[^:]+: a140a000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0\]
+[^:]+: a140a000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0\]
+[^:]+: a140a001 ld1h {z1\.h, z5\.h, z9\.h, z13\.h}, pn8/z, \[x0\]
+[^:]+: a140a002 ld1h {z2\.h, z6\.h, z10\.h, z14\.h}, pn8/z, \[x0\]
+[^:]+: a140a003 ld1h {z3\.h, z7\.h, z11\.h, z15\.h}, pn8/z, \[x0\]
+[^:]+: a140a010 ld1h {z16\.h, z20\.h, z24\.h, z28\.h}, pn8/z, \[x0\]
+[^:]+: a140a011 ld1h {z17\.h, z21\.h, z25\.h, z29\.h}, pn8/z, \[x0\]
+[^:]+: a140a012 ld1h {z18\.h, z22\.h, z26\.h, z30\.h}, pn8/z, \[x0\]
+[^:]+: a140a013 ld1h {z19\.h, z23\.h, z27\.h, z31\.h}, pn8/z, \[x0\]
+[^:]+: a140bc00 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn15/z, \[x0\]
+[^:]+: a140a3c0 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x30\]
+[^:]+: a140a3e0 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[sp\]
+[^:]+: a148a000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a147a000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a142bba2 ld1h {z2\.h, z6\.h, z10\.h, z14\.h}, pn14/z, \[x29, #8, mul vl\]
+[^:]+: a0012000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a0012000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a0012000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a001201e ld1h {z30\.h-z31\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a0013c00 ld1h {z0\.h-z1\.h}, pn15/z, \[x0, x1, lsl #1\]
+[^:]+: a00123c0 ld1h {z0\.h-z1\.h}, pn8/z, \[x30, x1, lsl #1\]
+[^:]+: a00123e0 ld1h {z0\.h-z1\.h}, pn8/z, \[sp, x1, lsl #1\]
+[^:]+: a01e2000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x30, lsl #1\]
+[^:]+: a01f2000 ld1h {z0\.h-z1\.h}, pn8/z, \[x0, xzr, lsl #1\]
+[^:]+: a003274e ld1h {z14\.h-z15\.h}, pn9/z, \[x26, x3, lsl #1\]
+[^:]+: a001a000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a001a000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a001a000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a001a01c ld1h {z28\.h-z31\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a001bc00 ld1h {z0\.h-z3\.h}, pn15/z, \[x0, x1, lsl #1\]
+[^:]+: a001a3c0 ld1h {z0\.h-z3\.h}, pn8/z, \[x30, x1, lsl #1\]
+[^:]+: a001a3e0 ld1h {z0\.h-z3\.h}, pn8/z, \[sp, x1, lsl #1\]
+[^:]+: a01ea000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x30, lsl #1\]
+[^:]+: a01fa000 ld1h {z0\.h-z3\.h}, pn8/z, \[x0, xzr, lsl #1\]
+[^:]+: a001af68 ld1h {z8\.h-z11\.h}, pn11/z, \[x27, x1, lsl #1\]
+[^:]+: a1012000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012001 ld1h {z1\.h, z9\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012002 ld1h {z2\.h, z10\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012003 ld1h {z3\.h, z11\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012004 ld1h {z4\.h, z12\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012005 ld1h {z5\.h, z13\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012006 ld1h {z6\.h, z14\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012007 ld1h {z7\.h, z15\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012010 ld1h {z16\.h, z24\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012011 ld1h {z17\.h, z25\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012012 ld1h {z18\.h, z26\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012013 ld1h {z19\.h, z27\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012014 ld1h {z20\.h, z28\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012015 ld1h {z21\.h, z29\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012016 ld1h {z22\.h, z30\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1012017 ld1h {z23\.h, z31\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a1013c00 ld1h {z0\.h, z8\.h}, pn15/z, \[x0, x1, lsl #1\]
+[^:]+: a10123c0 ld1h {z0\.h, z8\.h}, pn8/z, \[x30, x1, lsl #1\]
+[^:]+: a10123e0 ld1h {z0\.h, z8\.h}, pn8/z, \[sp, x1, lsl #1\]
+[^:]+: a11e2000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0, x30, lsl #1\]
+[^:]+: a11f2000 ld1h {z0\.h, z8\.h}, pn8/z, \[x0, xzr, lsl #1\]
+[^:]+: a11839e5 ld1h {z5\.h, z13\.h}, pn14/z, \[x15, x24, lsl #1\]
+[^:]+: a101a000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a001 ld1h {z1\.h, z5\.h, z9\.h, z13\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a002 ld1h {z2\.h, z6\.h, z10\.h, z14\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a003 ld1h {z3\.h, z7\.h, z11\.h, z15\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a010 ld1h {z16\.h, z20\.h, z24\.h, z28\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a011 ld1h {z17\.h, z21\.h, z25\.h, z29\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a012 ld1h {z18\.h, z22\.h, z26\.h, z30\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101a013 ld1h {z19\.h, z23\.h, z27\.h, z31\.h}, pn8/z, \[x0, x1, lsl #1\]
+[^:]+: a101bc00 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn15/z, \[x0, x1, lsl #1\]
+[^:]+: a101a3c0 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x30, x1, lsl #1\]
+[^:]+: a101a3e0 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[sp, x1, lsl #1\]
+[^:]+: a11ea000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, x30, lsl #1\]
+[^:]+: a11fa000 ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, xzr, lsl #1\]
+[^:]+: a106ac91 ld1h {z17\.h, z21\.h, z25\.h, z29\.h}, pn11/z, \[x4, x6, lsl #1\]
+[^:]+: a0402001 ldnt1h {z0\.h-z1\.h}, pn8/z, \[x0\]
+[^:]+: a0402001 ldnt1h {z0\.h-z1\.h}, pn8/z, \[x0\]
+[^:]+: a0402001 ldnt1h {z0\.h-z1\.h}, pn8/z, \[x0\]
+[^:]+: a040201f ldnt1h {z30\.h-z31\.h}, pn8/z, \[x0\]
+[^:]+: a0403c01 ldnt1h {z0\.h-z1\.h}, pn15/z, \[x0\]
+[^:]+: a04023c1 ldnt1h {z0\.h-z1\.h}, pn8/z, \[x30\]
+[^:]+: a04023e1 ldnt1h {z0\.h-z1\.h}, pn8/z, \[sp\]
+[^:]+: a0482001 ldnt1h {z0\.h-z1\.h}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0472001 ldnt1h {z0\.h-z1\.h}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b356d ldnt1h {z12\.h-z13\.h}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a040a001 ldnt1h {z0\.h-z3\.h}, pn8/z, \[x0\]
+[^:]+: a040a001 ldnt1h {z0\.h-z3\.h}, pn8/z, \[x0\]
+[^:]+: a040a001 ldnt1h {z0\.h-z3\.h}, pn8/z, \[x0\]
+[^:]+: a040a01d ldnt1h {z28\.h-z31\.h}, pn8/z, \[x0\]
+[^:]+: a040bc01 ldnt1h {z0\.h-z3\.h}, pn15/z, \[x0\]
+[^:]+: a040a3c1 ldnt1h {z0\.h-z3\.h}, pn8/z, \[x30\]
+[^:]+: a040a3e1 ldnt1h {z0\.h-z3\.h}, pn8/z, \[sp\]
+[^:]+: a048a001 ldnt1h {z0\.h-z3\.h}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a047a001 ldnt1h {z0\.h-z3\.h}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a045ae29 ldnt1h {z8\.h-z11\.h}, pn11/z, \[x17, #20, mul vl\]
+[^:]+: a1402008 ldnt1h {z0\.h, z8\.h}, pn8/z, \[x0\]
+[^:]+: a1402008 ldnt1h {z0\.h, z8\.h}, pn8/z, \[x0\]
+[^:]+: a1402008 ldnt1h {z0\.h, z8\.h}, pn8/z, \[x0\]
+[^:]+: a1402009 ldnt1h {z1\.h, z9\.h}, pn8/z, \[x0\]
+[^:]+: a140200a ldnt1h {z2\.h, z10\.h}, pn8/z, \[x0\]
+[^:]+: a140200b ldnt1h {z3\.h, z11\.h}, pn8/z, \[x0\]
+[^:]+: a140200c ldnt1h {z4\.h, z12\.h}, pn8/z, \[x0\]
+[^:]+: a140200d ldnt1h {z5\.h, z13\.h}, pn8/z, \[x0\]
+[^:]+: a140200e ldnt1h {z6\.h, z14\.h}, pn8/z, \[x0\]
+[^:]+: a140200f ldnt1h {z7\.h, z15\.h}, pn8/z, \[x0\]
+[^:]+: a1402018 ldnt1h {z16\.h, z24\.h}, pn8/z, \[x0\]
+[^:]+: a1402019 ldnt1h {z17\.h, z25\.h}, pn8/z, \[x0\]
+[^:]+: a140201a ldnt1h {z18\.h, z26\.h}, pn8/z, \[x0\]
+[^:]+: a140201b ldnt1h {z19\.h, z27\.h}, pn8/z, \[x0\]
+[^:]+: a140201c ldnt1h {z20\.h, z28\.h}, pn8/z, \[x0\]
+[^:]+: a140201d ldnt1h {z21\.h, z29\.h}, pn8/z, \[x0\]
+[^:]+: a140201e ldnt1h {z22\.h, z30\.h}, pn8/z, \[x0\]
+[^:]+: a140201f ldnt1h {z23\.h, z31\.h}, pn8/z, \[x0\]
+[^:]+: a1403c08 ldnt1h {z0\.h, z8\.h}, pn15/z, \[x0\]
+[^:]+: a14023c8 ldnt1h {z0\.h, z8\.h}, pn8/z, \[x30\]
+[^:]+: a14023e8 ldnt1h {z0\.h, z8\.h}, pn8/z, \[sp\]
+[^:]+: a1482008 ldnt1h {z0\.h, z8\.h}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a1472008 ldnt1h {z0\.h, z8\.h}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1432acb ldnt1h {z3\.h, z11\.h}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a140a008 ldnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0\]
+[^:]+: a140a008 ldnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0\]
+[^:]+: a140a008 ldnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0\]
+[^:]+: a140a009 ldnt1h {z1\.h, z5\.h, z9\.h, z13\.h}, pn8/z, \[x0\]
+[^:]+: a140a00a ldnt1h {z2\.h, z6\.h, z10\.h, z14\.h}, pn8/z, \[x0\]
+[^:]+: a140a00b ldnt1h {z3\.h, z7\.h, z11\.h, z15\.h}, pn8/z, \[x0\]
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+[^:]+: a121a3e0 st1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[sp, x1, lsl #1\]
+[^:]+: a13ea000 st1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, x30, lsl #1\]
+[^:]+: a13fa000 st1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, xzr, lsl #1\]
+[^:]+: a126ac91 st1h {z17\.h, z21\.h, z25\.h, z29\.h}, pn11, \[x4, x6, lsl #1\]
+[^:]+: a0602001 stnt1h {z0\.h-z1\.h}, pn8, \[x0\]
+[^:]+: a0602001 stnt1h {z0\.h-z1\.h}, pn8, \[x0\]
+[^:]+: a0602001 stnt1h {z0\.h-z1\.h}, pn8, \[x0\]
+[^:]+: a060201f stnt1h {z30\.h-z31\.h}, pn8, \[x0\]
+[^:]+: a0603c01 stnt1h {z0\.h-z1\.h}, pn15, \[x0\]
+[^:]+: a06023c1 stnt1h {z0\.h-z1\.h}, pn8, \[x30\]
+[^:]+: a06023e1 stnt1h {z0\.h-z1\.h}, pn8, \[sp\]
+[^:]+: a0682001 stnt1h {z0\.h-z1\.h}, pn8, \[x0, #-16, mul vl\]
+[^:]+: a0672001 stnt1h {z0\.h-z1\.h}, pn8, \[x0, #14, mul vl\]
+[^:]+: a06b356d stnt1h {z12\.h-z13\.h}, pn13, \[x11, #-10, mul vl\]
+[^:]+: a060a001 stnt1h {z0\.h-z3\.h}, pn8, \[x0\]
+[^:]+: a060a001 stnt1h {z0\.h-z3\.h}, pn8, \[x0\]
+[^:]+: a060a001 stnt1h {z0\.h-z3\.h}, pn8, \[x0\]
+[^:]+: a060a01d stnt1h {z28\.h-z31\.h}, pn8, \[x0\]
+[^:]+: a060bc01 stnt1h {z0\.h-z3\.h}, pn15, \[x0\]
+[^:]+: a060a3c1 stnt1h {z0\.h-z3\.h}, pn8, \[x30\]
+[^:]+: a060a3e1 stnt1h {z0\.h-z3\.h}, pn8, \[sp\]
+[^:]+: a068a001 stnt1h {z0\.h-z3\.h}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a067a001 stnt1h {z0\.h-z3\.h}, pn8, \[x0, #28, mul vl\]
+[^:]+: a065ae29 stnt1h {z8\.h-z11\.h}, pn11, \[x17, #20, mul vl\]
+[^:]+: a1602008 stnt1h {z0\.h, z8\.h}, pn8, \[x0\]
+[^:]+: a1602008 stnt1h {z0\.h, z8\.h}, pn8, \[x0\]
+[^:]+: a1602008 stnt1h {z0\.h, z8\.h}, pn8, \[x0\]
+[^:]+: a1602009 stnt1h {z1\.h, z9\.h}, pn8, \[x0\]
+[^:]+: a160200a stnt1h {z2\.h, z10\.h}, pn8, \[x0\]
+[^:]+: a160200b stnt1h {z3\.h, z11\.h}, pn8, \[x0\]
+[^:]+: a160200c stnt1h {z4\.h, z12\.h}, pn8, \[x0\]
+[^:]+: a160200d stnt1h {z5\.h, z13\.h}, pn8, \[x0\]
+[^:]+: a160200e stnt1h {z6\.h, z14\.h}, pn8, \[x0\]
+[^:]+: a160200f stnt1h {z7\.h, z15\.h}, pn8, \[x0\]
+[^:]+: a1602018 stnt1h {z16\.h, z24\.h}, pn8, \[x0\]
+[^:]+: a1602019 stnt1h {z17\.h, z25\.h}, pn8, \[x0\]
+[^:]+: a160201a stnt1h {z18\.h, z26\.h}, pn8, \[x0\]
+[^:]+: a160201b stnt1h {z19\.h, z27\.h}, pn8, \[x0\]
+[^:]+: a160201c stnt1h {z20\.h, z28\.h}, pn8, \[x0\]
+[^:]+: a160201d stnt1h {z21\.h, z29\.h}, pn8, \[x0\]
+[^:]+: a160201e stnt1h {z22\.h, z30\.h}, pn8, \[x0\]
+[^:]+: a160201f stnt1h {z23\.h, z31\.h}, pn8, \[x0\]
+[^:]+: a1603c08 stnt1h {z0\.h, z8\.h}, pn15, \[x0\]
+[^:]+: a16023c8 stnt1h {z0\.h, z8\.h}, pn8, \[x30\]
+[^:]+: a16023e8 stnt1h {z0\.h, z8\.h}, pn8, \[sp\]
+[^:]+: a1682008 stnt1h {z0\.h, z8\.h}, pn8, \[x0, #-16, mul vl\]
+[^:]+: a1672008 stnt1h {z0\.h, z8\.h}, pn8, \[x0, #14, mul vl\]
+[^:]+: a1632acb stnt1h {z3\.h, z11\.h}, pn10, \[x22, #6, mul vl\]
+[^:]+: a160a008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0\]
+[^:]+: a160a008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0\]
+[^:]+: a160a008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0\]
+[^:]+: a160a009 stnt1h {z1\.h, z5\.h, z9\.h, z13\.h}, pn8, \[x0\]
+[^:]+: a160a00a stnt1h {z2\.h, z6\.h, z10\.h, z14\.h}, pn8, \[x0\]
+[^:]+: a160a00b stnt1h {z3\.h, z7\.h, z11\.h, z15\.h}, pn8, \[x0\]
+[^:]+: a160a018 stnt1h {z16\.h, z20\.h, z24\.h, z28\.h}, pn8, \[x0\]
+[^:]+: a160a019 stnt1h {z17\.h, z21\.h, z25\.h, z29\.h}, pn8, \[x0\]
+[^:]+: a160a01a stnt1h {z18\.h, z22\.h, z26\.h, z30\.h}, pn8, \[x0\]
+[^:]+: a160a01b stnt1h {z19\.h, z23\.h, z27\.h, z31\.h}, pn8, \[x0\]
+[^:]+: a160bc08 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn15, \[x0\]
+[^:]+: a160a3c8 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x30\]
+[^:]+: a160a3e8 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[sp\]
+[^:]+: a168a008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a167a008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, #28, mul vl\]
+[^:]+: a162bbaa stnt1h {z2\.h, z6\.h, z10\.h, z14\.h}, pn14, \[x29, #8, mul vl\]
+[^:]+: a0212001 stnt1h {z0\.h-z1\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a0212001 stnt1h {z0\.h-z1\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a0212001 stnt1h {z0\.h-z1\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a021201f stnt1h {z30\.h-z31\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a0213c01 stnt1h {z0\.h-z1\.h}, pn15, \[x0, x1, lsl #1\]
+[^:]+: a02123c1 stnt1h {z0\.h-z1\.h}, pn8, \[x30, x1, lsl #1\]
+[^:]+: a02123e1 stnt1h {z0\.h-z1\.h}, pn8, \[sp, x1, lsl #1\]
+[^:]+: a03e2001 stnt1h {z0\.h-z1\.h}, pn8, \[x0, x30, lsl #1\]
+[^:]+: a03f2001 stnt1h {z0\.h-z1\.h}, pn8, \[x0, xzr, lsl #1\]
+[^:]+: a023274f stnt1h {z14\.h-z15\.h}, pn9, \[x26, x3, lsl #1\]
+[^:]+: a021a001 stnt1h {z0\.h-z3\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a021a001 stnt1h {z0\.h-z3\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a021a001 stnt1h {z0\.h-z3\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a021a01d stnt1h {z28\.h-z31\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a021bc01 stnt1h {z0\.h-z3\.h}, pn15, \[x0, x1, lsl #1\]
+[^:]+: a021a3c1 stnt1h {z0\.h-z3\.h}, pn8, \[x30, x1, lsl #1\]
+[^:]+: a021a3e1 stnt1h {z0\.h-z3\.h}, pn8, \[sp, x1, lsl #1\]
+[^:]+: a03ea001 stnt1h {z0\.h-z3\.h}, pn8, \[x0, x30, lsl #1\]
+[^:]+: a03fa001 stnt1h {z0\.h-z3\.h}, pn8, \[x0, xzr, lsl #1\]
+[^:]+: a021af69 stnt1h {z8\.h-z11\.h}, pn11, \[x27, x1, lsl #1\]
+[^:]+: a1212008 stnt1h {z0\.h, z8\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a1212008 stnt1h {z0\.h, z8\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a1212008 stnt1h {z0\.h, z8\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a1212009 stnt1h {z1\.h, z9\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121200a stnt1h {z2\.h, z10\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121200b stnt1h {z3\.h, z11\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121200c stnt1h {z4\.h, z12\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121200d stnt1h {z5\.h, z13\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121200e stnt1h {z6\.h, z14\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121200f stnt1h {z7\.h, z15\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a1212018 stnt1h {z16\.h, z24\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a1212019 stnt1h {z17\.h, z25\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121201a stnt1h {z18\.h, z26\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121201b stnt1h {z19\.h, z27\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121201c stnt1h {z20\.h, z28\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121201d stnt1h {z21\.h, z29\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121201e stnt1h {z22\.h, z30\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121201f stnt1h {z23\.h, z31\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a1213c08 stnt1h {z0\.h, z8\.h}, pn15, \[x0, x1, lsl #1\]
+[^:]+: a12123c8 stnt1h {z0\.h, z8\.h}, pn8, \[x30, x1, lsl #1\]
+[^:]+: a12123e8 stnt1h {z0\.h, z8\.h}, pn8, \[sp, x1, lsl #1\]
+[^:]+: a13e2008 stnt1h {z0\.h, z8\.h}, pn8, \[x0, x30, lsl #1\]
+[^:]+: a13f2008 stnt1h {z0\.h, z8\.h}, pn8, \[x0, xzr, lsl #1\]
+[^:]+: a13839ed stnt1h {z5\.h, z13\.h}, pn14, \[x15, x24, lsl #1\]
+[^:]+: a121a008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a009 stnt1h {z1\.h, z5\.h, z9\.h, z13\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a00a stnt1h {z2\.h, z6\.h, z10\.h, z14\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a00b stnt1h {z3\.h, z7\.h, z11\.h, z15\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a018 stnt1h {z16\.h, z20\.h, z24\.h, z28\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a019 stnt1h {z17\.h, z21\.h, z25\.h, z29\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a01a stnt1h {z18\.h, z22\.h, z26\.h, z30\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121a01b stnt1h {z19\.h, z23\.h, z27\.h, z31\.h}, pn8, \[x0, x1, lsl #1\]
+[^:]+: a121bc08 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn15, \[x0, x1, lsl #1\]
+[^:]+: a121a3c8 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x30, x1, lsl #1\]
+[^:]+: a121a3e8 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[sp, x1, lsl #1\]
+[^:]+: a13ea008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, x30, lsl #1\]
+[^:]+: a13fa008 stnt1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8, \[x0, xzr, lsl #1\]
+[^:]+: a126ac99 stnt1h {z17\.h, z21\.h, z25\.h, z29\.h}, pn11, \[x4, x6, lsl #1\]
diff --git a/gas/testsuite/gas/aarch64/sme2-4.s b/gas/testsuite/gas/aarch64/sme2-4.s
new file mode 100644
index 00000000000..b6a443b3723
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-4.s
@@ -0,0 +1,511 @@
+ ld1h { z0.h - z1.h }, pn8/z, [x0]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, #0, mul vl]
+ LD1H { Z0.H - Z1.H }, PN8/Z, [X0]
+ ld1h { z30.h - z31.h }, pn8/z, [x0]
+ ld1h { z0.h - z1.h }, pn15/z, [x0]
+ ld1h { z0.h - z1.h }, pn8/z, [x30]
+ ld1h { z0.h - z1.h }, pn8/z, [sp]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, #-16, mul vl]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, #14, mul vl]
+ ld1h { z12.h - z13.h }, pn13/z, [x11, #-10, mul vl]
+
+ ld1h { z0.h - z3.h }, pn8/z, [x0]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, #0, mul vl]
+ LD1H { Z0.H - Z3.H }, PN8/Z, [X0]
+ ld1h { z28.h - z31.h }, pn8/z, [x0]
+ ld1h { z0.h - z3.h }, pn15/z, [x0]
+ ld1h { z0.h - z3.h }, pn8/z, [x30]
+ ld1h { z0.h - z3.h }, pn8/z, [sp]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, #-32, mul vl]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, #28, mul vl]
+ ld1h { z8.h - z11.h }, pn11/z, [x17, #20, mul vl]
+
+ ld1h { z0.h, z8.h }, pn8/z, [x0]
+ ld1h { z0.h, z8.h }, pn8/z, [x0, #0, mul vl]
+ LD1H { Z0.H, Z8.H }, PN8/Z, [X0]
+ ld1h { z1.h, z9.h }, pn8/z, [x0]
+ ld1h { z2.h, z10.h }, pn8/z, [x0]
+ ld1h { z3.h, z11.h }, pn8/z, [x0]
+ ld1h { z4.h, z12.h }, pn8/z, [x0]
+ ld1h { z5.h, z13.h }, pn8/z, [x0]
+ ld1h { z6.h, z14.h }, pn8/z, [x0]
+ ld1h { z7.h, z15.h }, pn8/z, [x0]
+ ld1h { z16.h, z24.h }, pn8/z, [x0]
+ ld1h { z17.h, z25.h }, pn8/z, [x0]
+ ld1h { z18.h, z26.h }, pn8/z, [x0]
+ ld1h { z19.h, z27.h }, pn8/z, [x0]
+ ld1h { z20.h, z28.h }, pn8/z, [x0]
+ ld1h { z21.h, z29.h }, pn8/z, [x0]
+ ld1h { z22.h, z30.h }, pn8/z, [x0]
+ ld1h { z23.h, z31.h }, pn8/z, [x0]
+ ld1h { z0.h, z8.h }, pn15/z, [x0]
+ ld1h { z0.h, z8.h }, pn8/z, [x30]
+ ld1h { z0.h, z8.h }, pn8/z, [sp]
+ ld1h { z0.h, z8.h }, pn8/z, [x0, #-16, mul vl]
+ ld1h { z0.h, z8.h }, pn8/z, [x0, #14, mul vl]
+ ld1h { z3.h, z11.h }, pn10/z, [x22, #6, mul vl]
+
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, #0, mul vl]
+ LD1H { Z0.H, Z4.H, Z8.H, Z12.H }, PN8/Z, [X0]
+ ld1h { z1.h, z5.h, z9.h, z13.h }, pn8/z, [x0]
+ ld1h { z2.h, z6.h, z10.h, z14.h }, pn8/z, [x0]
+ ld1h { z3.h, z7.h, z11.h, z15.h }, pn8/z, [x0]
+ ld1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [x0]
+ ld1h { z17.h, z21.h, z25.h, z29.h }, pn8/z, [x0]
+ ld1h { z18.h, z22.h, z26.h, z30.h }, pn8/z, [x0]
+ ld1h { z19.h, z23.h, z27.h, z31.h }, pn8/z, [x0]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn15/z, [x0]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x30]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [sp]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, #-32, mul vl]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, #28, mul vl]
+ ld1h { z2.h, z6.h, z10.h, z14.h }, pn14/z, [x29, #8, mul vl]
+
+ ld1h { z0.h - z1.h }, pn8/z, [x0, x1, lsl 1]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, x1, lsl #1]
+ LD1H { Z0.H - Z1.H }, PN8/Z, [X0, X1, LSL #1]
+ ld1h { z30.h - z31.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn15/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/z, [x30, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/z, [sp, x1, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, x30, lsl #1]
+ ld1h { z0.h - z1.h }, pn8/z, [x0, xzr, lsl #1]
+ ld1h { z14.h - z15.h }, pn9/z, [x26, x3, lsl #1]
+
+ ld1h { z0.h - z3.h }, pn8/z, [x0, x1, lsl 1]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, x1, lsl #1]
+ LD1H { Z0.H - Z3.H }, PN8/Z, [X0, X1, LSL #1]
+ ld1h { z28.h - z31.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn15/z, [x0, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/z, [x30, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/z, [sp, x1, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, x30, lsl #1]
+ ld1h { z0.h - z3.h }, pn8/z, [x0, xzr, lsl #1]
+ ld1h { z8.h - z11.h }, pn11/z, [x27, x1, lsl #1]
+
+ ld1h { z0.h, z8.h }, pn8/z, [x0, x1, lsl 1]
+ ld1h { z0.h, z8.h }, pn8/z, [x0, x1, lsl #1]
+ LD1H { Z0.H, Z8.H }, PN8/Z, [X0, X1, LSL #1]
+ ld1h { z1.h, z9.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z2.h, z10.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z3.h, z11.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z4.h, z12.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z5.h, z13.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z6.h, z14.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z7.h, z15.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z16.h, z24.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z17.h, z25.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z18.h, z26.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z19.h, z27.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z20.h, z28.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z21.h, z29.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z22.h, z30.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z23.h, z31.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z8.h }, pn15/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z8.h }, pn8/z, [x30, x1, lsl #1]
+ ld1h { z0.h, z8.h }, pn8/z, [sp, x1, lsl #1]
+ ld1h { z0.h, z8.h }, pn8/z, [x0, x30, lsl #1]
+ ld1h { z0.h, z8.h }, pn8/z, [x0, xzr, lsl #1]
+ ld1h { z5.h, z13.h }, pn14/z, [x15, x24, lsl #1]
+
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1, lsl 1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1, lsl #1]
+ LD1H { Z0.H, Z4.H, Z8.H, Z12.H }, PN8/Z, [X0, X1, LSL #1]
+ ld1h { z1.h, z5.h, z9.h, z13.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z2.h, z6.h, z10.h, z14.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z3.h, z7.h, z11.h, z15.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z17.h, z21.h, z25.h, z29.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z18.h, z22.h, z26.h, z30.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z19.h, z23.h, z27.h, z31.h }, pn8/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn15/z, [x0, x1, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x30, x1, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [sp, x1, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x30, lsl #1]
+ ld1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, xzr, lsl #1]
+ ld1h { z17.h, z21.h, z25.h, z29.h }, pn11/z, [x4, x6, lsl #1]
+
+ ldnt1h { z0.h - z1.h }, pn8/z, [x0]
+ ldnt1h { z0.h - z1.h }, pn8/z, [x0, #0, mul vl]
+ LDNT1H { Z0.H - Z1.H }, PN8/Z, [X0]
+ ldnt1h { z30.h - z31.h }, pn8/z, [x0]
+ ldnt1h { z0.h - z1.h }, pn15/z, [x0]
+ ldnt1h { z0.h - z1.h }, pn8/z, [x30]
+ ldnt1h { z0.h - z1.h }, pn8/z, [sp]
+ ldnt1h { z0.h - z1.h }, pn8/z, [x0, #-16, mul vl]
+ ldnt1h { z0.h - z1.h }, pn8/z, [x0, #14, mul vl]
+ ldnt1h { z12.h - z13.h }, pn13/z, [x11, #-10, mul vl]
+
+ ldnt1h { z0.h - z3.h }, pn8/z, [x0]
+ ldnt1h { z0.h - z3.h }, pn8/z, [x0, #0, mul vl]
+ LDNT1H { Z0.H - Z3.H }, PN8/Z, [X0]
+ ldnt1h { z28.h - z31.h }, pn8/z, [x0]
+ ldnt1h { z0.h - z3.h }, pn15/z, [x0]
+ ldnt1h { z0.h - z3.h }, pn8/z, [x30]
+ ldnt1h { z0.h - z3.h }, pn8/z, [sp]
+ ldnt1h { z0.h - z3.h }, pn8/z, [x0, #-32, mul vl]
+ ldnt1h { z0.h - z3.h }, pn8/z, [x0, #28, mul vl]
+ ldnt1h { z8.h - z11.h }, pn11/z, [x17, #20, mul vl]
+
+ ldnt1h { z0.h, z8.h }, pn8/z, [x0]
+ ldnt1h { z0.h, z8.h }, pn8/z, [x0, #0, mul vl]
+ LDNT1H { Z0.H, Z8.H }, PN8/Z, [X0]
+ ldnt1h { z1.h, z9.h }, pn8/z, [x0]
+ ldnt1h { z2.h, z10.h }, pn8/z, [x0]
+ ldnt1h { z3.h, z11.h }, pn8/z, [x0]
+ ldnt1h { z4.h, z12.h }, pn8/z, [x0]
+ ldnt1h { z5.h, z13.h }, pn8/z, [x0]
+ ldnt1h { z6.h, z14.h }, pn8/z, [x0]
+ ldnt1h { z7.h, z15.h }, pn8/z, [x0]
+ ldnt1h { z16.h, z24.h }, pn8/z, [x0]
+ ldnt1h { z17.h, z25.h }, pn8/z, [x0]
+ ldnt1h { z18.h, z26.h }, pn8/z, [x0]
+ ldnt1h { z19.h, z27.h }, pn8/z, [x0]
+ ldnt1h { z20.h, z28.h }, pn8/z, [x0]
+ ldnt1h { z21.h, z29.h }, pn8/z, [x0]
+ ldnt1h { z22.h, z30.h }, pn8/z, [x0]
+ ldnt1h { z23.h, z31.h }, pn8/z, [x0]
+ ldnt1h { z0.h, z8.h }, pn15/z, [x0]
+ ldnt1h { z0.h, z8.h }, pn8/z, [x30]
+ ldnt1h { z0.h, z8.h }, pn8/z, [sp]
+ ldnt1h { z0.h, z8.h }, pn8/z, [x0, #-16, mul vl]
+ ldnt1h { z0.h, z8.h }, pn8/z, [x0, #14, mul vl]
+ ldnt1h { z3.h, z11.h }, pn10/z, [x22, #6, mul vl]
+
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, #0, mul vl]
+ LDNT1H { Z0.H, Z4.H, Z8.H, Z12.H }, PN8/Z, [X0]
+ ldnt1h { z1.h, z5.h, z9.h, z13.h }, pn8/z, [x0]
+ ldnt1h { z2.h, z6.h, z10.h, z14.h }, pn8/z, [x0]
+ ldnt1h { z3.h, z7.h, z11.h, z15.h }, pn8/z, [x0]
+ ldnt1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [x0]
+ ldnt1h { z17.h, z21.h, z25.h, z29.h }, pn8/z, [x0]
+ ldnt1h { z18.h, z22.h, z26.h, z30.h }, pn8/z, [x0]
+ ldnt1h { z19.h, z23.h, z27.h, z31.h }, pn8/z, [x0]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn15/z, [x0]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x30]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [sp]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, #-32, mul vl]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, #28, mul vl]
+ ldnt1h { z2.h, z6.h, z10.h, z14.h }, pn14/z, [x29, #8, mul vl]
+
+ ldnt1h { z0.h - z1.h }, pn8/z, [x0, x1, lsl 1]
+ ldnt1h { z0.h - z1.h }, pn8/z, [x0, x1, lsl #1]
+ LDNT1H { Z0.H - Z1.H }, PN8/Z, [X0, X1, LSL #1]
+ ldnt1h { z30.h - z31.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z0.h - z1.h }, pn15/z, [x0, x1, lsl #1]
+ ldnt1h { z0.h - z1.h }, pn8/z, [x30, x1, lsl #1]
+ ldnt1h { z0.h - z1.h }, pn8/z, [sp, x1, lsl #1]
+ ldnt1h { z0.h - z1.h }, pn8/z, [x0, x30, lsl #1]
+ ldnt1h { z0.h - z1.h }, pn8/z, [x0, xzr, lsl #1]
+ ldnt1h { z14.h - z15.h }, pn9/z, [x26, x3, lsl #1]
+
+ ldnt1h { z0.h - z3.h }, pn8/z, [x0, x1, lsl 1]
+ ldnt1h { z0.h - z3.h }, pn8/z, [x0, x1, lsl #1]
+ LDNT1H { Z0.H - Z3.H }, PN8/Z, [X0, X1, LSL #1]
+ ldnt1h { z28.h - z31.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z0.h - z3.h }, pn15/z, [x0, x1, lsl #1]
+ ldnt1h { z0.h - z3.h }, pn8/z, [x30, x1, lsl #1]
+ ldnt1h { z0.h - z3.h }, pn8/z, [sp, x1, lsl #1]
+ ldnt1h { z0.h - z3.h }, pn8/z, [x0, x30, lsl #1]
+ ldnt1h { z0.h - z3.h }, pn8/z, [x0, xzr, lsl #1]
+ ldnt1h { z8.h - z11.h }, pn11/z, [x27, x1, lsl #1]
+
+ ldnt1h { z0.h, z8.h }, pn8/z, [x0, x1, lsl 1]
+ ldnt1h { z0.h, z8.h }, pn8/z, [x0, x1, lsl #1]
+ LDNT1H { Z0.H, Z8.H }, PN8/Z, [X0, X1, LSL #1]
+ ldnt1h { z1.h, z9.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z2.h, z10.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z3.h, z11.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z4.h, z12.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z5.h, z13.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z6.h, z14.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z7.h, z15.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z16.h, z24.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z17.h, z25.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z18.h, z26.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z19.h, z27.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z20.h, z28.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z21.h, z29.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z22.h, z30.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z23.h, z31.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z0.h, z8.h }, pn15/z, [x0, x1, lsl #1]
+ ldnt1h { z0.h, z8.h }, pn8/z, [x30, x1, lsl #1]
+ ldnt1h { z0.h, z8.h }, pn8/z, [sp, x1, lsl #1]
+ ldnt1h { z0.h, z8.h }, pn8/z, [x0, x30, lsl #1]
+ ldnt1h { z0.h, z8.h }, pn8/z, [x0, xzr, lsl #1]
+ ldnt1h { z5.h, z13.h }, pn14/z, [x15, x24, lsl #1]
+
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1, lsl 1]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1, lsl #1]
+ LDNT1H { Z0.H, Z4.H, Z8.H, Z12.H }, PN8/Z, [X0, X1, LSL #1]
+ ldnt1h { z1.h, z5.h, z9.h, z13.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z2.h, z6.h, z10.h, z14.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z3.h, z7.h, z11.h, z15.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z17.h, z21.h, z25.h, z29.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z18.h, z22.h, z26.h, z30.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z19.h, z23.h, z27.h, z31.h }, pn8/z, [x0, x1, lsl #1]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn15/z, [x0, x1, lsl #1]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x30, x1, lsl #1]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [sp, x1, lsl #1]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x30, lsl #1]
+ ldnt1h { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, xzr, lsl #1]
+ ldnt1h { z17.h, z21.h, z25.h, z29.h }, pn11/z, [x4, x6, lsl #1]
+
+ st1h { z0.h - z1.h }, pn8, [x0]
+ st1h { z0.h - z1.h }, pn8, [x0, #0, mul vl]
+ ST1H { Z0.H - Z1.H }, PN8, [X0]
+ st1h { z30.h - z31.h }, pn8, [x0]
+ st1h { z0.h - z1.h }, pn15, [x0]
+ st1h { z0.h - z1.h }, pn8, [x30]
+ st1h { z0.h - z1.h }, pn8, [sp]
+ st1h { z0.h - z1.h }, pn8, [x0, #-16, mul vl]
+ st1h { z0.h - z1.h }, pn8, [x0, #14, mul vl]
+ st1h { z12.h - z13.h }, pn13, [x11, #-10, mul vl]
+
+ st1h { z0.h - z3.h }, pn8, [x0]
+ st1h { z0.h - z3.h }, pn8, [x0, #0, mul vl]
+ ST1H { Z0.H - Z3.H }, PN8, [X0]
+ st1h { z28.h - z31.h }, pn8, [x0]
+ st1h { z0.h - z3.h }, pn15, [x0]
+ st1h { z0.h - z3.h }, pn8, [x30]
+ st1h { z0.h - z3.h }, pn8, [sp]
+ st1h { z0.h - z3.h }, pn8, [x0, #-32, mul vl]
+ st1h { z0.h - z3.h }, pn8, [x0, #28, mul vl]
+ st1h { z8.h - z11.h }, pn11, [x17, #20, mul vl]
+
+ st1h { z0.h, z8.h }, pn8, [x0]
+ st1h { z0.h, z8.h }, pn8, [x0, #0, mul vl]
+ ST1H { Z0.H, Z8.H }, PN8, [X0]
+ st1h { z1.h, z9.h }, pn8, [x0]
+ st1h { z2.h, z10.h }, pn8, [x0]
+ st1h { z3.h, z11.h }, pn8, [x0]
+ st1h { z4.h, z12.h }, pn8, [x0]
+ st1h { z5.h, z13.h }, pn8, [x0]
+ st1h { z6.h, z14.h }, pn8, [x0]
+ st1h { z7.h, z15.h }, pn8, [x0]
+ st1h { z16.h, z24.h }, pn8, [x0]
+ st1h { z17.h, z25.h }, pn8, [x0]
+ st1h { z18.h, z26.h }, pn8, [x0]
+ st1h { z19.h, z27.h }, pn8, [x0]
+ st1h { z20.h, z28.h }, pn8, [x0]
+ st1h { z21.h, z29.h }, pn8, [x0]
+ st1h { z22.h, z30.h }, pn8, [x0]
+ st1h { z23.h, z31.h }, pn8, [x0]
+ st1h { z0.h, z8.h }, pn15, [x0]
+ st1h { z0.h, z8.h }, pn8, [x30]
+ st1h { z0.h, z8.h }, pn8, [sp]
+ st1h { z0.h, z8.h }, pn8, [x0, #-16, mul vl]
+ st1h { z0.h, z8.h }, pn8, [x0, #14, mul vl]
+ st1h { z3.h, z11.h }, pn10, [x22, #6, mul vl]
+
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, #0, mul vl]
+ ST1H { Z0.H, Z4.H, Z8.H, Z12.H }, PN8, [X0]
+ st1h { z1.h, z5.h, z9.h, z13.h }, pn8, [x0]
+ st1h { z2.h, z6.h, z10.h, z14.h }, pn8, [x0]
+ st1h { z3.h, z7.h, z11.h, z15.h }, pn8, [x0]
+ st1h { z16.h, z20.h, z24.h, z28.h }, pn8, [x0]
+ st1h { z17.h, z21.h, z25.h, z29.h }, pn8, [x0]
+ st1h { z18.h, z22.h, z26.h, z30.h }, pn8, [x0]
+ st1h { z19.h, z23.h, z27.h, z31.h }, pn8, [x0]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn15, [x0]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x30]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [sp]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, #-32, mul vl]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, #28, mul vl]
+ st1h { z2.h, z6.h, z10.h, z14.h }, pn14, [x29, #8, mul vl]
+
+ st1h { z0.h - z1.h }, pn8, [x0, x1, lsl 1]
+ st1h { z0.h - z1.h }, pn8, [x0, x1, lsl #1]
+ ST1H { Z0.H - Z1.H }, PN8, [X0, X1, LSL #1]
+ st1h { z30.h - z31.h }, pn8, [x0, x1, lsl #1]
+ st1h { z0.h - z1.h }, pn15, [x0, x1, lsl #1]
+ st1h { z0.h - z1.h }, pn8, [x30, x1, lsl #1]
+ st1h { z0.h - z1.h }, pn8, [sp, x1, lsl #1]
+ st1h { z0.h - z1.h }, pn8, [x0, x30, lsl #1]
+ st1h { z0.h - z1.h }, pn8, [x0, xzr, lsl #1]
+ st1h { z14.h - z15.h }, pn9, [x26, x3, lsl #1]
+
+ st1h { z0.h - z3.h }, pn8, [x0, x1, lsl 1]
+ st1h { z0.h - z3.h }, pn8, [x0, x1, lsl #1]
+ ST1H { Z0.H - Z3.H }, PN8, [X0, X1, LSL #1]
+ st1h { z28.h - z31.h }, pn8, [x0, x1, lsl #1]
+ st1h { z0.h - z3.h }, pn15, [x0, x1, lsl #1]
+ st1h { z0.h - z3.h }, pn8, [x30, x1, lsl #1]
+ st1h { z0.h - z3.h }, pn8, [sp, x1, lsl #1]
+ st1h { z0.h - z3.h }, pn8, [x0, x30, lsl #1]
+ st1h { z0.h - z3.h }, pn8, [x0, xzr, lsl #1]
+ st1h { z8.h - z11.h }, pn11, [x27, x1, lsl #1]
+
+ st1h { z0.h, z8.h }, pn8, [x0, x1, lsl 1]
+ st1h { z0.h, z8.h }, pn8, [x0, x1, lsl #1]
+ ST1H { Z0.H, Z8.H }, PN8, [X0, X1, LSL #1]
+ st1h { z1.h, z9.h }, pn8, [x0, x1, lsl #1]
+ st1h { z2.h, z10.h }, pn8, [x0, x1, lsl #1]
+ st1h { z3.h, z11.h }, pn8, [x0, x1, lsl #1]
+ st1h { z4.h, z12.h }, pn8, [x0, x1, lsl #1]
+ st1h { z5.h, z13.h }, pn8, [x0, x1, lsl #1]
+ st1h { z6.h, z14.h }, pn8, [x0, x1, lsl #1]
+ st1h { z7.h, z15.h }, pn8, [x0, x1, lsl #1]
+ st1h { z16.h, z24.h }, pn8, [x0, x1, lsl #1]
+ st1h { z17.h, z25.h }, pn8, [x0, x1, lsl #1]
+ st1h { z18.h, z26.h }, pn8, [x0, x1, lsl #1]
+ st1h { z19.h, z27.h }, pn8, [x0, x1, lsl #1]
+ st1h { z20.h, z28.h }, pn8, [x0, x1, lsl #1]
+ st1h { z21.h, z29.h }, pn8, [x0, x1, lsl #1]
+ st1h { z22.h, z30.h }, pn8, [x0, x1, lsl #1]
+ st1h { z23.h, z31.h }, pn8, [x0, x1, lsl #1]
+ st1h { z0.h, z8.h }, pn15, [x0, x1, lsl #1]
+ st1h { z0.h, z8.h }, pn8, [x30, x1, lsl #1]
+ st1h { z0.h, z8.h }, pn8, [sp, x1, lsl #1]
+ st1h { z0.h, z8.h }, pn8, [x0, x30, lsl #1]
+ st1h { z0.h, z8.h }, pn8, [x0, xzr, lsl #1]
+ st1h { z5.h, z13.h }, pn14, [x15, x24, lsl #1]
+
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, x1, lsl 1]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, x1, lsl #1]
+ ST1H { Z0.H, Z4.H, Z8.H, Z12.H }, PN8, [X0, X1, LSL #1]
+ st1h { z1.h, z5.h, z9.h, z13.h }, pn8, [x0, x1, lsl #1]
+ st1h { z2.h, z6.h, z10.h, z14.h }, pn8, [x0, x1, lsl #1]
+ st1h { z3.h, z7.h, z11.h, z15.h }, pn8, [x0, x1, lsl #1]
+ st1h { z16.h, z20.h, z24.h, z28.h }, pn8, [x0, x1, lsl #1]
+ st1h { z17.h, z21.h, z25.h, z29.h }, pn8, [x0, x1, lsl #1]
+ st1h { z18.h, z22.h, z26.h, z30.h }, pn8, [x0, x1, lsl #1]
+ st1h { z19.h, z23.h, z27.h, z31.h }, pn8, [x0, x1, lsl #1]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn15, [x0, x1, lsl #1]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x30, x1, lsl #1]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [sp, x1, lsl #1]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, x30, lsl #1]
+ st1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, xzr, lsl #1]
+ st1h { z17.h, z21.h, z25.h, z29.h }, pn11, [x4, x6, lsl #1]
+
+ stnt1h { z0.h - z1.h }, pn8, [x0]
+ stnt1h { z0.h - z1.h }, pn8, [x0, #0, mul vl]
+ STNT1H { Z0.H - Z1.H }, PN8, [X0]
+ stnt1h { z30.h - z31.h }, pn8, [x0]
+ stnt1h { z0.h - z1.h }, pn15, [x0]
+ stnt1h { z0.h - z1.h }, pn8, [x30]
+ stnt1h { z0.h - z1.h }, pn8, [sp]
+ stnt1h { z0.h - z1.h }, pn8, [x0, #-16, mul vl]
+ stnt1h { z0.h - z1.h }, pn8, [x0, #14, mul vl]
+ stnt1h { z12.h - z13.h }, pn13, [x11, #-10, mul vl]
+
+ stnt1h { z0.h - z3.h }, pn8, [x0]
+ stnt1h { z0.h - z3.h }, pn8, [x0, #0, mul vl]
+ STNT1H { Z0.H - Z3.H }, PN8, [X0]
+ stnt1h { z28.h - z31.h }, pn8, [x0]
+ stnt1h { z0.h - z3.h }, pn15, [x0]
+ stnt1h { z0.h - z3.h }, pn8, [x30]
+ stnt1h { z0.h - z3.h }, pn8, [sp]
+ stnt1h { z0.h - z3.h }, pn8, [x0, #-32, mul vl]
+ stnt1h { z0.h - z3.h }, pn8, [x0, #28, mul vl]
+ stnt1h { z8.h - z11.h }, pn11, [x17, #20, mul vl]
+
+ stnt1h { z0.h, z8.h }, pn8, [x0]
+ stnt1h { z0.h, z8.h }, pn8, [x0, #0, mul vl]
+ STNT1H { Z0.H, Z8.H }, PN8, [X0]
+ stnt1h { z1.h, z9.h }, pn8, [x0]
+ stnt1h { z2.h, z10.h }, pn8, [x0]
+ stnt1h { z3.h, z11.h }, pn8, [x0]
+ stnt1h { z4.h, z12.h }, pn8, [x0]
+ stnt1h { z5.h, z13.h }, pn8, [x0]
+ stnt1h { z6.h, z14.h }, pn8, [x0]
+ stnt1h { z7.h, z15.h }, pn8, [x0]
+ stnt1h { z16.h, z24.h }, pn8, [x0]
+ stnt1h { z17.h, z25.h }, pn8, [x0]
+ stnt1h { z18.h, z26.h }, pn8, [x0]
+ stnt1h { z19.h, z27.h }, pn8, [x0]
+ stnt1h { z20.h, z28.h }, pn8, [x0]
+ stnt1h { z21.h, z29.h }, pn8, [x0]
+ stnt1h { z22.h, z30.h }, pn8, [x0]
+ stnt1h { z23.h, z31.h }, pn8, [x0]
+ stnt1h { z0.h, z8.h }, pn15, [x0]
+ stnt1h { z0.h, z8.h }, pn8, [x30]
+ stnt1h { z0.h, z8.h }, pn8, [sp]
+ stnt1h { z0.h, z8.h }, pn8, [x0, #-16, mul vl]
+ stnt1h { z0.h, z8.h }, pn8, [x0, #14, mul vl]
+ stnt1h { z3.h, z11.h }, pn10, [x22, #6, mul vl]
+
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, #0, mul vl]
+ STNT1H { Z0.H, Z4.H, Z8.H, Z12.H }, PN8, [X0]
+ stnt1h { z1.h, z5.h, z9.h, z13.h }, pn8, [x0]
+ stnt1h { z2.h, z6.h, z10.h, z14.h }, pn8, [x0]
+ stnt1h { z3.h, z7.h, z11.h, z15.h }, pn8, [x0]
+ stnt1h { z16.h, z20.h, z24.h, z28.h }, pn8, [x0]
+ stnt1h { z17.h, z21.h, z25.h, z29.h }, pn8, [x0]
+ stnt1h { z18.h, z22.h, z26.h, z30.h }, pn8, [x0]
+ stnt1h { z19.h, z23.h, z27.h, z31.h }, pn8, [x0]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn15, [x0]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x30]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [sp]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, #-32, mul vl]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, #28, mul vl]
+ stnt1h { z2.h, z6.h, z10.h, z14.h }, pn14, [x29, #8, mul vl]
+
+ stnt1h { z0.h - z1.h }, pn8, [x0, x1, lsl 1]
+ stnt1h { z0.h - z1.h }, pn8, [x0, x1, lsl #1]
+ STNT1H { Z0.H - Z1.H }, PN8, [X0, X1, LSL #1]
+ stnt1h { z30.h - z31.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z0.h - z1.h }, pn15, [x0, x1, lsl #1]
+ stnt1h { z0.h - z1.h }, pn8, [x30, x1, lsl #1]
+ stnt1h { z0.h - z1.h }, pn8, [sp, x1, lsl #1]
+ stnt1h { z0.h - z1.h }, pn8, [x0, x30, lsl #1]
+ stnt1h { z0.h - z1.h }, pn8, [x0, xzr, lsl #1]
+ stnt1h { z14.h - z15.h }, pn9, [x26, x3, lsl #1]
+
+ stnt1h { z0.h - z3.h }, pn8, [x0, x1, lsl 1]
+ stnt1h { z0.h - z3.h }, pn8, [x0, x1, lsl #1]
+ STNT1H { Z0.H - Z3.H }, PN8, [X0, X1, LSL #1]
+ stnt1h { z28.h - z31.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z0.h - z3.h }, pn15, [x0, x1, lsl #1]
+ stnt1h { z0.h - z3.h }, pn8, [x30, x1, lsl #1]
+ stnt1h { z0.h - z3.h }, pn8, [sp, x1, lsl #1]
+ stnt1h { z0.h - z3.h }, pn8, [x0, x30, lsl #1]
+ stnt1h { z0.h - z3.h }, pn8, [x0, xzr, lsl #1]
+ stnt1h { z8.h - z11.h }, pn11, [x27, x1, lsl #1]
+
+ stnt1h { z0.h, z8.h }, pn8, [x0, x1, lsl 1]
+ stnt1h { z0.h, z8.h }, pn8, [x0, x1, lsl #1]
+ STNT1H { Z0.H, Z8.H }, PN8, [X0, X1, LSL #1]
+ stnt1h { z1.h, z9.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z2.h, z10.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z3.h, z11.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z4.h, z12.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z5.h, z13.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z6.h, z14.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z7.h, z15.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z16.h, z24.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z17.h, z25.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z18.h, z26.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z19.h, z27.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z20.h, z28.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z21.h, z29.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z22.h, z30.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z23.h, z31.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z0.h, z8.h }, pn15, [x0, x1, lsl #1]
+ stnt1h { z0.h, z8.h }, pn8, [x30, x1, lsl #1]
+ stnt1h { z0.h, z8.h }, pn8, [sp, x1, lsl #1]
+ stnt1h { z0.h, z8.h }, pn8, [x0, x30, lsl #1]
+ stnt1h { z0.h, z8.h }, pn8, [x0, xzr, lsl #1]
+ stnt1h { z5.h, z13.h }, pn14, [x15, x24, lsl #1]
+
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, x1, lsl 1]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, x1, lsl #1]
+ STNT1H { Z0.H, Z4.H, Z8.H, Z12.H }, PN8, [X0, X1, LSL #1]
+ stnt1h { z1.h, z5.h, z9.h, z13.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z2.h, z6.h, z10.h, z14.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z3.h, z7.h, z11.h, z15.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z16.h, z20.h, z24.h, z28.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z17.h, z21.h, z25.h, z29.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z18.h, z22.h, z26.h, z30.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z19.h, z23.h, z27.h, z31.h }, pn8, [x0, x1, lsl #1]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn15, [x0, x1, lsl #1]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x30, x1, lsl #1]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [sp, x1, lsl #1]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, x30, lsl #1]
+ stnt1h { z0.h, z4.h, z8.h, z12.h }, pn8, [x0, xzr, lsl #1]
+ stnt1h { z17.h, z21.h, z25.h, z29.h }, pn11, [x4, x6, lsl #1]
diff --git a/gas/testsuite/gas/aarch64/sme2-5-invalid.d b/gas/testsuite/gas/aarch64/sme2-5-invalid.d
new file mode 100644
index 00000000000..be993109fd3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-5-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-5-invalid.s
+#error_output: sme2-5-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-5-invalid.l b/gas/testsuite/gas/aarch64/sme2-5-invalid.l
new file mode 100644
index 00000000000..c2a6dbc71b1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-5-invalid.l
@@ -0,0 +1,75 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1w 0,pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1w {z0\.s-z1\.s},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1w {z0\.s-z2\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z1\.s-z2\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s-z1\.s},p8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8/m,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8\.s,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z1\.s},pn0/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z1\.s},pn7/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[w0,w1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[xzr,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[sp,sp,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,w1,sxtw#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,w1,uxtw#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z1\.s-z4\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z2\.s-z5\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z3\.s-z6\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s-z3\.s},p8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8/m,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8\.s,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z3\.s},pn0/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z3\.s},pn7/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[w0,w1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[xzr,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[sp,sp,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,w1,sxtw#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,w1,uxtw#2\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z2\.s},pn8/z,\[x0,x1,lsl#2\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z3\.s},pn8/z,\[x0,x1,lsl#2\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z4\.s},pn8/z,\[x0,x1,lsl#2\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z8\.s,z16\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z24\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z8\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1w {z0\.s, z8\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s,z8\.s},p8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[w0,w30,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[xzr,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[x0,sp,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z4\.s,z8\.s,z12\.s,z16\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z20\.s,z24\.s,z28\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},p8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[w0,w30,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[xzr,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,sp,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-5-invalid.s b/gas/testsuite/gas/aarch64/sme2-5-invalid.s
new file mode 100644
index 00000000000..c2fdb225a30
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-5-invalid.s
@@ -0,0 +1,62 @@
+ ld1w 0, pn8/z, [x0]
+ ld1w { z0.s - z1.s }, 0, [x0]
+ ld1w { z0.s - z1.s }, pn8/z, 0
+
+ ld1w { z0.s - z2.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z1.s - z2.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, p8/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/m, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8.s, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn0/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn7/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/z, [w0, w1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/z, [xzr, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/z, [sp, sp, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, x1]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, x1, lsl #1]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, x1, lsl #3]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, x1, lsl #4]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, w1, sxtw #2]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, w1, uxtw #2]
+
+ ld1w { z1.s - z4.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z2.s - z5.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z3.s - z6.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, p8/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/m, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8.s, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn0/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn7/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/z, [w0, w1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/z, [xzr, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/z, [sp, sp, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, x1]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, x1, lsl #1]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, x1, lsl #3]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, x1, lsl #4]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, w1, sxtw #2]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, w1, uxtw #2]
+
+ ld1w { z0.s, z2.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z3.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z4.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z8.s, z16.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z24.s, z0.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z8.s, z0.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.h, z8.h }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z8.s }, p8/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z8.s }, pn8/z, [w0, w30, lsl #2]
+ ld1w { z0.s, z8.s }, pn8/z, [xzr, xzr, lsl #2]
+ ld1w { z0.s, z8.s }, pn8/z, [x0, sp, lsl #2]
+ ld1w { z0.s, z8.s }, pn8/z, [x0, x1, lsl #1]
+
+ ld1w { z4.s, z8.s, z12.s, z16.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z20.s, z24.s, z28.s, z0.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, p8/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [w0, w30, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [xzr, xzr, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, sp, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, x1, lsl #1]
diff --git a/gas/testsuite/gas/aarch64/sme2-5-noarch.d b/gas/testsuite/gas/aarch64/sme2-5-noarch.d
new file mode 100644
index 00000000000..2b0de227f3e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-5-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-5.s
+#error_output: sme2-5-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-5-noarch.l b/gas/testsuite/gas/aarch64/sme2-5-noarch.l
new file mode 100644
index 00000000000..6eebd6403fe
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-5-noarch.l
@@ -0,0 +1,481 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z1\.S},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z30\.s-z31\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z12\.s-z13\.s},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z3\.S},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z28\.s-z31\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z8\.s-z11\.s},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z8\.S},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z9\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z10\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z4\.s,z12\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z6\.s,z14\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z7\.s,z15\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z24\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z25\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z26\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z27\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z20\.s,z28\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z21\.s,z29\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z22\.s,z30\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z23\.s,z31\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z1\.S},PN8/Z,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z30\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn15/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z14\.s-z15\.s},pn9/z,\[x26,x3,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z3\.S},PN8/Z,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z28\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn15/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z8\.s-z11\.s},pn11/z,\[x27,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z8\.S},PN8/Z,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z9\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z10\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z4\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z6\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z7\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z24\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z25\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z26\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z27\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z20\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z21\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z22\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z23\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn15/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn14/z,\[x15,x24,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11/z,\[x4,x6,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z1\.S},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z30\.s-z31\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z12\.s-z13\.s},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z3\.S},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z28\.s-z31\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z8\.s-z11\.s},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z8\.S},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z9\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z10\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z4\.s,z12\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z6\.s,z14\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z7\.s,z15\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z24\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z25\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z26\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z27\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z20\.s,z28\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z21\.s,z29\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z22\.s,z30\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z23\.s,z31\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z1\.S},PN8/Z,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z30\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn15/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z14\.s-z15\.s},pn9/z,\[x26,x3,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z3\.S},PN8/Z,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z28\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn15/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z8\.s-z11\.s},pn11/z,\[x27,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z8\.S},PN8/Z,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z9\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z10\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z4\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z6\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z7\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z24\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z25\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z26\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z27\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z20\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z21\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z22\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z23\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn15/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn14/z,\[x15,x24,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11/z,\[x4,x6,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z1\.S},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z30\.s-z31\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z12\.s-z13\.s},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z3\.S},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z28\.s-z31\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z8\.s-z11\.s},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z8\.S},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z9\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z10\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z4\.s,z12\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z6\.s,z14\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z7\.s,z15\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z24\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z25\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z26\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z27\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z20\.s,z28\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z21\.s,z29\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z22\.s,z30\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z23\.s,z31\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z1\.S},PN8,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z30\.s-z31\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn15,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z14\.s-z15\.s},pn9,\[x26,x3,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z3\.S},PN8,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z28\.s-z31\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn15,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z8\.s-z11\.s},pn11,\[x27,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z8\.S},PN8,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z9\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z10\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z4\.s,z12\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z6\.s,z14\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z7\.s,z15\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z24\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z25\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z26\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z27\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z20\.s,z28\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z21\.s,z29\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z22\.s,z30\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z23\.s,z31\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn15,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn14,\[x15,x24,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11,\[x4,x6,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z1\.S},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z30\.s-z31\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z12\.s-z13\.s},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z3\.S},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z28\.s-z31\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z8\.s-z11\.s},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z8\.S},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z9\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z10\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z4\.s,z12\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z6\.s,z14\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z7\.s,z15\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z24\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z25\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z26\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z27\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z20\.s,z28\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z21\.s,z29\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z22\.s,z30\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z23\.s,z31\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z1\.S},PN8,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z30\.s-z31\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn15,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z14\.s-z15\.s},pn9,\[x26,x3,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z3\.S},PN8,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z28\.s-z31\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn15,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z8\.s-z11\.s},pn11,\[x27,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z8\.S},PN8,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z9\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z10\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z4\.s,z12\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z6\.s,z14\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z7\.s,z15\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z24\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z25\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z26\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z27\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z20\.s,z28\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z21\.s,z29\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z22\.s,z30\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z23\.s,z31\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn15,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn14,\[x15,x24,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl 2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0,X1,LSL#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x30,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,xzr,lsl#2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11,\[x4,x6,lsl#2\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-5.d b/gas/testsuite/gas/aarch64/sme2-5.d
new file mode 100644
index 00000000000..274b40587bd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-5.d
@@ -0,0 +1,489 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: a0404000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0\]
+[^:]+: a0404000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0\]
+[^:]+: a0404000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0\]
+[^:]+: a040401e ld1w {z30\.s-z31\.s}, pn8/z, \[x0\]
+[^:]+: a0405c00 ld1w {z0\.s-z1\.s}, pn15/z, \[x0\]
+[^:]+: a04043c0 ld1w {z0\.s-z1\.s}, pn8/z, \[x30\]
+[^:]+: a04043e0 ld1w {z0\.s-z1\.s}, pn8/z, \[sp\]
+[^:]+: a0484000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0474000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b556c ld1w {z12\.s-z13\.s}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a040c000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0\]
+[^:]+: a040c000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0\]
+[^:]+: a040c000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0\]
+[^:]+: a040c01c ld1w {z28\.s-z31\.s}, pn8/z, \[x0\]
+[^:]+: a040dc00 ld1w {z0\.s-z3\.s}, pn15/z, \[x0\]
+[^:]+: a040c3c0 ld1w {z0\.s-z3\.s}, pn8/z, \[x30\]
+[^:]+: a040c3e0 ld1w {z0\.s-z3\.s}, pn8/z, \[sp\]
+[^:]+: a048c000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a047c000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a045ce28 ld1w {z8\.s-z11\.s}, pn11/z, \[x17, #20, mul vl\]
+[^:]+: a1404000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0\]
+[^:]+: a1404000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0\]
+[^:]+: a1404000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0\]
+[^:]+: a1404001 ld1w {z1\.s, z9\.s}, pn8/z, \[x0\]
+[^:]+: a1404002 ld1w {z2\.s, z10\.s}, pn8/z, \[x0\]
+[^:]+: a1404003 ld1w {z3\.s, z11\.s}, pn8/z, \[x0\]
+[^:]+: a1404004 ld1w {z4\.s, z12\.s}, pn8/z, \[x0\]
+[^:]+: a1404005 ld1w {z5\.s, z13\.s}, pn8/z, \[x0\]
+[^:]+: a1404006 ld1w {z6\.s, z14\.s}, pn8/z, \[x0\]
+[^:]+: a1404007 ld1w {z7\.s, z15\.s}, pn8/z, \[x0\]
+[^:]+: a1404010 ld1w {z16\.s, z24\.s}, pn8/z, \[x0\]
+[^:]+: a1404011 ld1w {z17\.s, z25\.s}, pn8/z, \[x0\]
+[^:]+: a1404012 ld1w {z18\.s, z26\.s}, pn8/z, \[x0\]
+[^:]+: a1404013 ld1w {z19\.s, z27\.s}, pn8/z, \[x0\]
+[^:]+: a1404014 ld1w {z20\.s, z28\.s}, pn8/z, \[x0\]
+[^:]+: a1404015 ld1w {z21\.s, z29\.s}, pn8/z, \[x0\]
+[^:]+: a1404016 ld1w {z22\.s, z30\.s}, pn8/z, \[x0\]
+[^:]+: a1404017 ld1w {z23\.s, z31\.s}, pn8/z, \[x0\]
+[^:]+: a1405c00 ld1w {z0\.s, z8\.s}, pn15/z, \[x0\]
+[^:]+: a14043c0 ld1w {z0\.s, z8\.s}, pn8/z, \[x30\]
+[^:]+: a14043e0 ld1w {z0\.s, z8\.s}, pn8/z, \[sp\]
+[^:]+: a1484000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a1474000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1434ac3 ld1w {z3\.s, z11\.s}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a140c000 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0\]
+[^:]+: a140c000 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0\]
+[^:]+: a140c000 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0\]
+[^:]+: a140c001 ld1w {z1\.s, z5\.s, z9\.s, z13\.s}, pn8/z, \[x0\]
+[^:]+: a140c002 ld1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn8/z, \[x0\]
+[^:]+: a140c003 ld1w {z3\.s, z7\.s, z11\.s, z15\.s}, pn8/z, \[x0\]
+[^:]+: a140c010 ld1w {z16\.s, z20\.s, z24\.s, z28\.s}, pn8/z, \[x0\]
+[^:]+: a140c011 ld1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn8/z, \[x0\]
+[^:]+: a140c012 ld1w {z18\.s, z22\.s, z26\.s, z30\.s}, pn8/z, \[x0\]
+[^:]+: a140c013 ld1w {z19\.s, z23\.s, z27\.s, z31\.s}, pn8/z, \[x0\]
+[^:]+: a140dc00 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn15/z, \[x0\]
+[^:]+: a140c3c0 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x30\]
+[^:]+: a140c3e0 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[sp\]
+[^:]+: a148c000 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a147c000 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a142dba2 ld1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn14/z, \[x29, #8, mul vl\]
+[^:]+: a0014000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a0014000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a0014000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a001401e ld1w {z30\.s-z31\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a0015c00 ld1w {z0\.s-z1\.s}, pn15/z, \[x0, x1, lsl #2\]
+[^:]+: a00143c0 ld1w {z0\.s-z1\.s}, pn8/z, \[x30, x1, lsl #2\]
+[^:]+: a00143e0 ld1w {z0\.s-z1\.s}, pn8/z, \[sp, x1, lsl #2\]
+[^:]+: a01e4000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x30, lsl #2\]
+[^:]+: a01f4000 ld1w {z0\.s-z1\.s}, pn8/z, \[x0, xzr, lsl #2\]
+[^:]+: a003474e ld1w {z14\.s-z15\.s}, pn9/z, \[x26, x3, lsl #2\]
+[^:]+: a001c000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a001c000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a001c000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a001c01c ld1w {z28\.s-z31\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a001dc00 ld1w {z0\.s-z3\.s}, pn15/z, \[x0, x1, lsl #2\]
+[^:]+: a001c3c0 ld1w {z0\.s-z3\.s}, pn8/z, \[x30, x1, lsl #2\]
+[^:]+: a001c3e0 ld1w {z0\.s-z3\.s}, pn8/z, \[sp, x1, lsl #2\]
+[^:]+: a01ec000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x30, lsl #2\]
+[^:]+: a01fc000 ld1w {z0\.s-z3\.s}, pn8/z, \[x0, xzr, lsl #2\]
+[^:]+: a001cf68 ld1w {z8\.s-z11\.s}, pn11/z, \[x27, x1, lsl #2\]
+[^:]+: a1014000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014001 ld1w {z1\.s, z9\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014002 ld1w {z2\.s, z10\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014003 ld1w {z3\.s, z11\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014004 ld1w {z4\.s, z12\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014005 ld1w {z5\.s, z13\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014006 ld1w {z6\.s, z14\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014007 ld1w {z7\.s, z15\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014010 ld1w {z16\.s, z24\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014011 ld1w {z17\.s, z25\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014012 ld1w {z18\.s, z26\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014013 ld1w {z19\.s, z27\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014014 ld1w {z20\.s, z28\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014015 ld1w {z21\.s, z29\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014016 ld1w {z22\.s, z30\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014017 ld1w {z23\.s, z31\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1015c00 ld1w {z0\.s, z8\.s}, pn15/z, \[x0, x1, lsl #2\]
+[^:]+: a10143c0 ld1w {z0\.s, z8\.s}, pn8/z, \[x30, x1, lsl #2\]
+[^:]+: a10143e0 ld1w {z0\.s, z8\.s}, pn8/z, \[sp, x1, lsl #2\]
+[^:]+: a11e4000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0, x30, lsl #2\]
+[^:]+: a11f4000 ld1w {z0\.s, z8\.s}, pn8/z, \[x0, xzr, lsl #2\]
+[^:]+: a11859e5 ld1w {z5\.s, z13\.s}, pn14/z, \[x15, x24, lsl #2\]
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+[^:]+: a101c002 ld1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c003 ld1w {z3\.s, z7\.s, z11\.s, z15\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c010 ld1w {z16\.s, z20\.s, z24\.s, z28\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c011 ld1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c012 ld1w {z18\.s, z22\.s, z26\.s, z30\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c013 ld1w {z19\.s, z23\.s, z27\.s, z31\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101dc00 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn15/z, \[x0, x1, lsl #2\]
+[^:]+: a101c3c0 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x30, x1, lsl #2\]
+[^:]+: a101c3e0 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[sp, x1, lsl #2\]
+[^:]+: a11ec000 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, x30, lsl #2\]
+[^:]+: a11fc000 ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, xzr, lsl #2\]
+[^:]+: a106cc91 ld1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn11/z, \[x4, x6, lsl #2\]
+[^:]+: a0404001 ldnt1w {z0\.s-z1\.s}, pn8/z, \[x0\]
+[^:]+: a0404001 ldnt1w {z0\.s-z1\.s}, pn8/z, \[x0\]
+[^:]+: a0404001 ldnt1w {z0\.s-z1\.s}, pn8/z, \[x0\]
+[^:]+: a040401f ldnt1w {z30\.s-z31\.s}, pn8/z, \[x0\]
+[^:]+: a0405c01 ldnt1w {z0\.s-z1\.s}, pn15/z, \[x0\]
+[^:]+: a04043c1 ldnt1w {z0\.s-z1\.s}, pn8/z, \[x30\]
+[^:]+: a04043e1 ldnt1w {z0\.s-z1\.s}, pn8/z, \[sp\]
+[^:]+: a0484001 ldnt1w {z0\.s-z1\.s}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0474001 ldnt1w {z0\.s-z1\.s}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b556d ldnt1w {z12\.s-z13\.s}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a040c001 ldnt1w {z0\.s-z3\.s}, pn8/z, \[x0\]
+[^:]+: a040c001 ldnt1w {z0\.s-z3\.s}, pn8/z, \[x0\]
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+[^:]+: a040dc01 ldnt1w {z0\.s-z3\.s}, pn15/z, \[x0\]
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+[^:]+: a040c3e1 ldnt1w {z0\.s-z3\.s}, pn8/z, \[sp\]
+[^:]+: a048c001 ldnt1w {z0\.s-z3\.s}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a047c001 ldnt1w {z0\.s-z3\.s}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a045ce29 ldnt1w {z8\.s-z11\.s}, pn11/z, \[x17, #20, mul vl\]
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+[^:]+: a1404008 ldnt1w {z0\.s, z8\.s}, pn8/z, \[x0\]
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+[^:]+: a140400b ldnt1w {z3\.s, z11\.s}, pn8/z, \[x0\]
+[^:]+: a140400c ldnt1w {z4\.s, z12\.s}, pn8/z, \[x0\]
+[^:]+: a140400d ldnt1w {z5\.s, z13\.s}, pn8/z, \[x0\]
+[^:]+: a140400e ldnt1w {z6\.s, z14\.s}, pn8/z, \[x0\]
+[^:]+: a140400f ldnt1w {z7\.s, z15\.s}, pn8/z, \[x0\]
+[^:]+: a1404018 ldnt1w {z16\.s, z24\.s}, pn8/z, \[x0\]
+[^:]+: a1404019 ldnt1w {z17\.s, z25\.s}, pn8/z, \[x0\]
+[^:]+: a140401a ldnt1w {z18\.s, z26\.s}, pn8/z, \[x0\]
+[^:]+: a140401b ldnt1w {z19\.s, z27\.s}, pn8/z, \[x0\]
+[^:]+: a140401c ldnt1w {z20\.s, z28\.s}, pn8/z, \[x0\]
+[^:]+: a140401d ldnt1w {z21\.s, z29\.s}, pn8/z, \[x0\]
+[^:]+: a140401e ldnt1w {z22\.s, z30\.s}, pn8/z, \[x0\]
+[^:]+: a140401f ldnt1w {z23\.s, z31\.s}, pn8/z, \[x0\]
+[^:]+: a1405c08 ldnt1w {z0\.s, z8\.s}, pn15/z, \[x0\]
+[^:]+: a14043c8 ldnt1w {z0\.s, z8\.s}, pn8/z, \[x30\]
+[^:]+: a14043e8 ldnt1w {z0\.s, z8\.s}, pn8/z, \[sp\]
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+[^:]+: a1474008 ldnt1w {z0\.s, z8\.s}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1434acb ldnt1w {z3\.s, z11\.s}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a140c008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0\]
+[^:]+: a140c008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0\]
+[^:]+: a140c008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0\]
+[^:]+: a140c009 ldnt1w {z1\.s, z5\.s, z9\.s, z13\.s}, pn8/z, \[x0\]
+[^:]+: a140c00a ldnt1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn8/z, \[x0\]
+[^:]+: a140c00b ldnt1w {z3\.s, z7\.s, z11\.s, z15\.s}, pn8/z, \[x0\]
+[^:]+: a140c018 ldnt1w {z16\.s, z20\.s, z24\.s, z28\.s}, pn8/z, \[x0\]
+[^:]+: a140c019 ldnt1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn8/z, \[x0\]
+[^:]+: a140c01a ldnt1w {z18\.s, z22\.s, z26\.s, z30\.s}, pn8/z, \[x0\]
+[^:]+: a140c01b ldnt1w {z19\.s, z23\.s, z27\.s, z31\.s}, pn8/z, \[x0\]
+[^:]+: a140dc08 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn15/z, \[x0\]
+[^:]+: a140c3c8 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x30\]
+[^:]+: a140c3e8 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[sp\]
+[^:]+: a148c008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a147c008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a142dbaa ldnt1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn14/z, \[x29, #8, mul vl\]
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+[^:]+: a0014001 ldnt1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\]
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+[^:]+: a001401f ldnt1w {z30\.s-z31\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a0015c01 ldnt1w {z0\.s-z1\.s}, pn15/z, \[x0, x1, lsl #2\]
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+[^:]+: a00143e1 ldnt1w {z0\.s-z1\.s}, pn8/z, \[sp, x1, lsl #2\]
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+[^:]+: a003474f ldnt1w {z14\.s-z15\.s}, pn9/z, \[x26, x3, lsl #2\]
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+[^:]+: a001c001 ldnt1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a001c001 ldnt1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a001c01d ldnt1w {z28\.s-z31\.s}, pn8/z, \[x0, x1, lsl #2\]
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+[^:]+: a001cf69 ldnt1w {z8\.s-z11\.s}, pn11/z, \[x27, x1, lsl #2\]
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+[^:]+: a1014008 ldnt1w {z0\.s, z8\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014009 ldnt1w {z1\.s, z9\.s}, pn8/z, \[x0, x1, lsl #2\]
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+[^:]+: a101400b ldnt1w {z3\.s, z11\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101400c ldnt1w {z4\.s, z12\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101400d ldnt1w {z5\.s, z13\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101400e ldnt1w {z6\.s, z14\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101400f ldnt1w {z7\.s, z15\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014018 ldnt1w {z16\.s, z24\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1014019 ldnt1w {z17\.s, z25\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101401a ldnt1w {z18\.s, z26\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101401b ldnt1w {z19\.s, z27\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101401c ldnt1w {z20\.s, z28\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101401d ldnt1w {z21\.s, z29\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101401e ldnt1w {z22\.s, z30\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101401f ldnt1w {z23\.s, z31\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a1015c08 ldnt1w {z0\.s, z8\.s}, pn15/z, \[x0, x1, lsl #2\]
+[^:]+: a10143c8 ldnt1w {z0\.s, z8\.s}, pn8/z, \[x30, x1, lsl #2\]
+[^:]+: a10143e8 ldnt1w {z0\.s, z8\.s}, pn8/z, \[sp, x1, lsl #2\]
+[^:]+: a11e4008 ldnt1w {z0\.s, z8\.s}, pn8/z, \[x0, x30, lsl #2\]
+[^:]+: a11f4008 ldnt1w {z0\.s, z8\.s}, pn8/z, \[x0, xzr, lsl #2\]
+[^:]+: a11859ed ldnt1w {z5\.s, z13\.s}, pn14/z, \[x15, x24, lsl #2\]
+[^:]+: a101c008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c009 ldnt1w {z1\.s, z5\.s, z9\.s, z13\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c00a ldnt1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c00b ldnt1w {z3\.s, z7\.s, z11\.s, z15\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c018 ldnt1w {z16\.s, z20\.s, z24\.s, z28\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c019 ldnt1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c01a ldnt1w {z18\.s, z22\.s, z26\.s, z30\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101c01b ldnt1w {z19\.s, z23\.s, z27\.s, z31\.s}, pn8/z, \[x0, x1, lsl #2\]
+[^:]+: a101dc08 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn15/z, \[x0, x1, lsl #2\]
+[^:]+: a101c3c8 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x30, x1, lsl #2\]
+[^:]+: a101c3e8 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[sp, x1, lsl #2\]
+[^:]+: a11ec008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, x30, lsl #2\]
+[^:]+: a11fc008 ldnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, xzr, lsl #2\]
+[^:]+: a106cc99 ldnt1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn11/z, \[x4, x6, lsl #2\]
+[^:]+: a0604000 st1w {z0\.s-z1\.s}, pn8, \[x0\]
+[^:]+: a0604000 st1w {z0\.s-z1\.s}, pn8, \[x0\]
+[^:]+: a0604000 st1w {z0\.s-z1\.s}, pn8, \[x0\]
+[^:]+: a060401e st1w {z30\.s-z31\.s}, pn8, \[x0\]
+[^:]+: a0605c00 st1w {z0\.s-z1\.s}, pn15, \[x0\]
+[^:]+: a06043c0 st1w {z0\.s-z1\.s}, pn8, \[x30\]
+[^:]+: a06043e0 st1w {z0\.s-z1\.s}, pn8, \[sp\]
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+[^:]+: a06b556c st1w {z12\.s-z13\.s}, pn13, \[x11, #-10, mul vl\]
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+[^:]+: a060c3e0 st1w {z0\.s-z3\.s}, pn8, \[sp\]
+[^:]+: a068c000 st1w {z0\.s-z3\.s}, pn8, \[x0, #-32, mul vl\]
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+[^:]+: a065ce28 st1w {z8\.s-z11\.s}, pn11, \[x17, #20, mul vl\]
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+[^:]+: a1605c00 st1w {z0\.s, z8\.s}, pn15, \[x0\]
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+[^:]+: a16043e0 st1w {z0\.s, z8\.s}, pn8, \[sp\]
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+[^:]+: a160c012 st1w {z18\.s, z22\.s, z26\.s, z30\.s}, pn8, \[x0\]
+[^:]+: a160c013 st1w {z19\.s, z23\.s, z27\.s, z31\.s}, pn8, \[x0\]
+[^:]+: a160dc00 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn15, \[x0\]
+[^:]+: a160c3c0 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x30\]
+[^:]+: a160c3e0 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[sp\]
+[^:]+: a168c000 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a167c000 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, #28, mul vl\]
+[^:]+: a162dba2 st1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn14, \[x29, #8, mul vl\]
+[^:]+: a0214000 st1w {z0\.s-z1\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a0214000 st1w {z0\.s-z1\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a0214000 st1w {z0\.s-z1\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021401e st1w {z30\.s-z31\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a0215c00 st1w {z0\.s-z1\.s}, pn15, \[x0, x1, lsl #2\]
+[^:]+: a02143c0 st1w {z0\.s-z1\.s}, pn8, \[x30, x1, lsl #2\]
+[^:]+: a02143e0 st1w {z0\.s-z1\.s}, pn8, \[sp, x1, lsl #2\]
+[^:]+: a03e4000 st1w {z0\.s-z1\.s}, pn8, \[x0, x30, lsl #2\]
+[^:]+: a03f4000 st1w {z0\.s-z1\.s}, pn8, \[x0, xzr, lsl #2\]
+[^:]+: a023474e st1w {z14\.s-z15\.s}, pn9, \[x26, x3, lsl #2\]
+[^:]+: a021c000 st1w {z0\.s-z3\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021c000 st1w {z0\.s-z3\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021c000 st1w {z0\.s-z3\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021c01c st1w {z28\.s-z31\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021dc00 st1w {z0\.s-z3\.s}, pn15, \[x0, x1, lsl #2\]
+[^:]+: a021c3c0 st1w {z0\.s-z3\.s}, pn8, \[x30, x1, lsl #2\]
+[^:]+: a021c3e0 st1w {z0\.s-z3\.s}, pn8, \[sp, x1, lsl #2\]
+[^:]+: a03ec000 st1w {z0\.s-z3\.s}, pn8, \[x0, x30, lsl #2\]
+[^:]+: a03fc000 st1w {z0\.s-z3\.s}, pn8, \[x0, xzr, lsl #2\]
+[^:]+: a021cf68 st1w {z8\.s-z11\.s}, pn11, \[x27, x1, lsl #2\]
+[^:]+: a1214000 st1w {z0\.s, z8\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214000 st1w {z0\.s, z8\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214000 st1w {z0\.s, z8\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214001 st1w {z1\.s, z9\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214002 st1w {z2\.s, z10\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214003 st1w {z3\.s, z11\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214004 st1w {z4\.s, z12\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214005 st1w {z5\.s, z13\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214006 st1w {z6\.s, z14\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214007 st1w {z7\.s, z15\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214010 st1w {z16\.s, z24\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214011 st1w {z17\.s, z25\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214012 st1w {z18\.s, z26\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214013 st1w {z19\.s, z27\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214014 st1w {z20\.s, z28\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214015 st1w {z21\.s, z29\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214016 st1w {z22\.s, z30\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214017 st1w {z23\.s, z31\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1215c00 st1w {z0\.s, z8\.s}, pn15, \[x0, x1, lsl #2\]
+[^:]+: a12143c0 st1w {z0\.s, z8\.s}, pn8, \[x30, x1, lsl #2\]
+[^:]+: a12143e0 st1w {z0\.s, z8\.s}, pn8, \[sp, x1, lsl #2\]
+[^:]+: a13e4000 st1w {z0\.s, z8\.s}, pn8, \[x0, x30, lsl #2\]
+[^:]+: a13f4000 st1w {z0\.s, z8\.s}, pn8, \[x0, xzr, lsl #2\]
+[^:]+: a13859e5 st1w {z5\.s, z13\.s}, pn14, \[x15, x24, lsl #2\]
+[^:]+: a121c000 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c000 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c000 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c001 st1w {z1\.s, z5\.s, z9\.s, z13\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c002 st1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c003 st1w {z3\.s, z7\.s, z11\.s, z15\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c010 st1w {z16\.s, z20\.s, z24\.s, z28\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c011 st1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c012 st1w {z18\.s, z22\.s, z26\.s, z30\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c013 st1w {z19\.s, z23\.s, z27\.s, z31\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121dc00 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn15, \[x0, x1, lsl #2\]
+[^:]+: a121c3c0 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x30, x1, lsl #2\]
+[^:]+: a121c3e0 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[sp, x1, lsl #2\]
+[^:]+: a13ec000 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, x30, lsl #2\]
+[^:]+: a13fc000 st1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, xzr, lsl #2\]
+[^:]+: a126cc91 st1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn11, \[x4, x6, lsl #2\]
+[^:]+: a0604001 stnt1w {z0\.s-z1\.s}, pn8, \[x0\]
+[^:]+: a0604001 stnt1w {z0\.s-z1\.s}, pn8, \[x0\]
+[^:]+: a0604001 stnt1w {z0\.s-z1\.s}, pn8, \[x0\]
+[^:]+: a060401f stnt1w {z30\.s-z31\.s}, pn8, \[x0\]
+[^:]+: a0605c01 stnt1w {z0\.s-z1\.s}, pn15, \[x0\]
+[^:]+: a06043c1 stnt1w {z0\.s-z1\.s}, pn8, \[x30\]
+[^:]+: a06043e1 stnt1w {z0\.s-z1\.s}, pn8, \[sp\]
+[^:]+: a0684001 stnt1w {z0\.s-z1\.s}, pn8, \[x0, #-16, mul vl\]
+[^:]+: a0674001 stnt1w {z0\.s-z1\.s}, pn8, \[x0, #14, mul vl\]
+[^:]+: a06b556d stnt1w {z12\.s-z13\.s}, pn13, \[x11, #-10, mul vl\]
+[^:]+: a060c001 stnt1w {z0\.s-z3\.s}, pn8, \[x0\]
+[^:]+: a060c001 stnt1w {z0\.s-z3\.s}, pn8, \[x0\]
+[^:]+: a060c001 stnt1w {z0\.s-z3\.s}, pn8, \[x0\]
+[^:]+: a060c01d stnt1w {z28\.s-z31\.s}, pn8, \[x0\]
+[^:]+: a060dc01 stnt1w {z0\.s-z3\.s}, pn15, \[x0\]
+[^:]+: a060c3c1 stnt1w {z0\.s-z3\.s}, pn8, \[x30\]
+[^:]+: a060c3e1 stnt1w {z0\.s-z3\.s}, pn8, \[sp\]
+[^:]+: a068c001 stnt1w {z0\.s-z3\.s}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a067c001 stnt1w {z0\.s-z3\.s}, pn8, \[x0, #28, mul vl\]
+[^:]+: a065ce29 stnt1w {z8\.s-z11\.s}, pn11, \[x17, #20, mul vl\]
+[^:]+: a1604008 stnt1w {z0\.s, z8\.s}, pn8, \[x0\]
+[^:]+: a1604008 stnt1w {z0\.s, z8\.s}, pn8, \[x0\]
+[^:]+: a1604008 stnt1w {z0\.s, z8\.s}, pn8, \[x0\]
+[^:]+: a1604009 stnt1w {z1\.s, z9\.s}, pn8, \[x0\]
+[^:]+: a160400a stnt1w {z2\.s, z10\.s}, pn8, \[x0\]
+[^:]+: a160400b stnt1w {z3\.s, z11\.s}, pn8, \[x0\]
+[^:]+: a160400c stnt1w {z4\.s, z12\.s}, pn8, \[x0\]
+[^:]+: a160400d stnt1w {z5\.s, z13\.s}, pn8, \[x0\]
+[^:]+: a160400e stnt1w {z6\.s, z14\.s}, pn8, \[x0\]
+[^:]+: a160400f stnt1w {z7\.s, z15\.s}, pn8, \[x0\]
+[^:]+: a1604018 stnt1w {z16\.s, z24\.s}, pn8, \[x0\]
+[^:]+: a1604019 stnt1w {z17\.s, z25\.s}, pn8, \[x0\]
+[^:]+: a160401a stnt1w {z18\.s, z26\.s}, pn8, \[x0\]
+[^:]+: a160401b stnt1w {z19\.s, z27\.s}, pn8, \[x0\]
+[^:]+: a160401c stnt1w {z20\.s, z28\.s}, pn8, \[x0\]
+[^:]+: a160401d stnt1w {z21\.s, z29\.s}, pn8, \[x0\]
+[^:]+: a160401e stnt1w {z22\.s, z30\.s}, pn8, \[x0\]
+[^:]+: a160401f stnt1w {z23\.s, z31\.s}, pn8, \[x0\]
+[^:]+: a1605c08 stnt1w {z0\.s, z8\.s}, pn15, \[x0\]
+[^:]+: a16043c8 stnt1w {z0\.s, z8\.s}, pn8, \[x30\]
+[^:]+: a16043e8 stnt1w {z0\.s, z8\.s}, pn8, \[sp\]
+[^:]+: a1684008 stnt1w {z0\.s, z8\.s}, pn8, \[x0, #-16, mul vl\]
+[^:]+: a1674008 stnt1w {z0\.s, z8\.s}, pn8, \[x0, #14, mul vl\]
+[^:]+: a1634acb stnt1w {z3\.s, z11\.s}, pn10, \[x22, #6, mul vl\]
+[^:]+: a160c008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0\]
+[^:]+: a160c008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0\]
+[^:]+: a160c008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0\]
+[^:]+: a160c009 stnt1w {z1\.s, z5\.s, z9\.s, z13\.s}, pn8, \[x0\]
+[^:]+: a160c00a stnt1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn8, \[x0\]
+[^:]+: a160c00b stnt1w {z3\.s, z7\.s, z11\.s, z15\.s}, pn8, \[x0\]
+[^:]+: a160c018 stnt1w {z16\.s, z20\.s, z24\.s, z28\.s}, pn8, \[x0\]
+[^:]+: a160c019 stnt1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn8, \[x0\]
+[^:]+: a160c01a stnt1w {z18\.s, z22\.s, z26\.s, z30\.s}, pn8, \[x0\]
+[^:]+: a160c01b stnt1w {z19\.s, z23\.s, z27\.s, z31\.s}, pn8, \[x0\]
+[^:]+: a160dc08 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn15, \[x0\]
+[^:]+: a160c3c8 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x30\]
+[^:]+: a160c3e8 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[sp\]
+[^:]+: a168c008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, #-32, mul vl\]
+[^:]+: a167c008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, #28, mul vl\]
+[^:]+: a162dbaa stnt1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn14, \[x29, #8, mul vl\]
+[^:]+: a0214001 stnt1w {z0\.s-z1\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a0214001 stnt1w {z0\.s-z1\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a0214001 stnt1w {z0\.s-z1\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021401f stnt1w {z30\.s-z31\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a0215c01 stnt1w {z0\.s-z1\.s}, pn15, \[x0, x1, lsl #2\]
+[^:]+: a02143c1 stnt1w {z0\.s-z1\.s}, pn8, \[x30, x1, lsl #2\]
+[^:]+: a02143e1 stnt1w {z0\.s-z1\.s}, pn8, \[sp, x1, lsl #2\]
+[^:]+: a03e4001 stnt1w {z0\.s-z1\.s}, pn8, \[x0, x30, lsl #2\]
+[^:]+: a03f4001 stnt1w {z0\.s-z1\.s}, pn8, \[x0, xzr, lsl #2\]
+[^:]+: a023474f stnt1w {z14\.s-z15\.s}, pn9, \[x26, x3, lsl #2\]
+[^:]+: a021c001 stnt1w {z0\.s-z3\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021c001 stnt1w {z0\.s-z3\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021c001 stnt1w {z0\.s-z3\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021c01d stnt1w {z28\.s-z31\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a021dc01 stnt1w {z0\.s-z3\.s}, pn15, \[x0, x1, lsl #2\]
+[^:]+: a021c3c1 stnt1w {z0\.s-z3\.s}, pn8, \[x30, x1, lsl #2\]
+[^:]+: a021c3e1 stnt1w {z0\.s-z3\.s}, pn8, \[sp, x1, lsl #2\]
+[^:]+: a03ec001 stnt1w {z0\.s-z3\.s}, pn8, \[x0, x30, lsl #2\]
+[^:]+: a03fc001 stnt1w {z0\.s-z3\.s}, pn8, \[x0, xzr, lsl #2\]
+[^:]+: a021cf69 stnt1w {z8\.s-z11\.s}, pn11, \[x27, x1, lsl #2\]
+[^:]+: a1214008 stnt1w {z0\.s, z8\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214008 stnt1w {z0\.s, z8\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214008 stnt1w {z0\.s, z8\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214009 stnt1w {z1\.s, z9\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121400a stnt1w {z2\.s, z10\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121400b stnt1w {z3\.s, z11\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121400c stnt1w {z4\.s, z12\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121400d stnt1w {z5\.s, z13\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121400e stnt1w {z6\.s, z14\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121400f stnt1w {z7\.s, z15\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214018 stnt1w {z16\.s, z24\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1214019 stnt1w {z17\.s, z25\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121401a stnt1w {z18\.s, z26\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121401b stnt1w {z19\.s, z27\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121401c stnt1w {z20\.s, z28\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121401d stnt1w {z21\.s, z29\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121401e stnt1w {z22\.s, z30\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121401f stnt1w {z23\.s, z31\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a1215c08 stnt1w {z0\.s, z8\.s}, pn15, \[x0, x1, lsl #2\]
+[^:]+: a12143c8 stnt1w {z0\.s, z8\.s}, pn8, \[x30, x1, lsl #2\]
+[^:]+: a12143e8 stnt1w {z0\.s, z8\.s}, pn8, \[sp, x1, lsl #2\]
+[^:]+: a13e4008 stnt1w {z0\.s, z8\.s}, pn8, \[x0, x30, lsl #2\]
+[^:]+: a13f4008 stnt1w {z0\.s, z8\.s}, pn8, \[x0, xzr, lsl #2\]
+[^:]+: a13859ed stnt1w {z5\.s, z13\.s}, pn14, \[x15, x24, lsl #2\]
+[^:]+: a121c008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c009 stnt1w {z1\.s, z5\.s, z9\.s, z13\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c00a stnt1w {z2\.s, z6\.s, z10\.s, z14\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c00b stnt1w {z3\.s, z7\.s, z11\.s, z15\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c018 stnt1w {z16\.s, z20\.s, z24\.s, z28\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c019 stnt1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c01a stnt1w {z18\.s, z22\.s, z26\.s, z30\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121c01b stnt1w {z19\.s, z23\.s, z27\.s, z31\.s}, pn8, \[x0, x1, lsl #2\]
+[^:]+: a121dc08 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn15, \[x0, x1, lsl #2\]
+[^:]+: a121c3c8 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x30, x1, lsl #2\]
+[^:]+: a121c3e8 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[sp, x1, lsl #2\]
+[^:]+: a13ec008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, x30, lsl #2\]
+[^:]+: a13fc008 stnt1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8, \[x0, xzr, lsl #2\]
+[^:]+: a126cc99 stnt1w {z17\.s, z21\.s, z25\.s, z29\.s}, pn11, \[x4, x6, lsl #2\]
diff --git a/gas/testsuite/gas/aarch64/sme2-5.s b/gas/testsuite/gas/aarch64/sme2-5.s
new file mode 100644
index 00000000000..93cd22ae83e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-5.s
@@ -0,0 +1,511 @@
+ ld1w { z0.s - z1.s }, pn8/z, [x0]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, #0, mul vl]
+ LD1W { Z0.S - Z1.S }, PN8/Z, [X0]
+ ld1w { z30.s - z31.s }, pn8/z, [x0]
+ ld1w { z0.s - z1.s }, pn15/z, [x0]
+ ld1w { z0.s - z1.s }, pn8/z, [x30]
+ ld1w { z0.s - z1.s }, pn8/z, [sp]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, #-16, mul vl]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, #14, mul vl]
+ ld1w { z12.s - z13.s }, pn13/z, [x11, #-10, mul vl]
+
+ ld1w { z0.s - z3.s }, pn8/z, [x0]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, #0, mul vl]
+ LD1W { Z0.S - Z3.S }, PN8/Z, [X0]
+ ld1w { z28.s - z31.s }, pn8/z, [x0]
+ ld1w { z0.s - z3.s }, pn15/z, [x0]
+ ld1w { z0.s - z3.s }, pn8/z, [x30]
+ ld1w { z0.s - z3.s }, pn8/z, [sp]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, #-32, mul vl]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, #28, mul vl]
+ ld1w { z8.s - z11.s }, pn11/z, [x17, #20, mul vl]
+
+ ld1w { z0.s, z8.s }, pn8/z, [x0]
+ ld1w { z0.s, z8.s }, pn8/z, [x0, #0, mul vl]
+ LD1W { Z0.S, Z8.S }, PN8/Z, [X0]
+ ld1w { z1.s, z9.s }, pn8/z, [x0]
+ ld1w { z2.s, z10.s }, pn8/z, [x0]
+ ld1w { z3.s, z11.s }, pn8/z, [x0]
+ ld1w { z4.s, z12.s }, pn8/z, [x0]
+ ld1w { z5.s, z13.s }, pn8/z, [x0]
+ ld1w { z6.s, z14.s }, pn8/z, [x0]
+ ld1w { z7.s, z15.s }, pn8/z, [x0]
+ ld1w { z16.s, z24.s }, pn8/z, [x0]
+ ld1w { z17.s, z25.s }, pn8/z, [x0]
+ ld1w { z18.s, z26.s }, pn8/z, [x0]
+ ld1w { z19.s, z27.s }, pn8/z, [x0]
+ ld1w { z20.s, z28.s }, pn8/z, [x0]
+ ld1w { z21.s, z29.s }, pn8/z, [x0]
+ ld1w { z22.s, z30.s }, pn8/z, [x0]
+ ld1w { z23.s, z31.s }, pn8/z, [x0]
+ ld1w { z0.s, z8.s }, pn15/z, [x0]
+ ld1w { z0.s, z8.s }, pn8/z, [x30]
+ ld1w { z0.s, z8.s }, pn8/z, [sp]
+ ld1w { z0.s, z8.s }, pn8/z, [x0, #-16, mul vl]
+ ld1w { z0.s, z8.s }, pn8/z, [x0, #14, mul vl]
+ ld1w { z3.s, z11.s }, pn10/z, [x22, #6, mul vl]
+
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, #0, mul vl]
+ LD1W { Z0.S, Z4.S, Z8.S, Z12.S }, PN8/Z, [X0]
+ ld1w { z1.s, z5.s, z9.s, z13.s }, pn8/z, [x0]
+ ld1w { z2.s, z6.s, z10.s, z14.s }, pn8/z, [x0]
+ ld1w { z3.s, z7.s, z11.s, z15.s }, pn8/z, [x0]
+ ld1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [x0]
+ ld1w { z17.s, z21.s, z25.s, z29.s }, pn8/z, [x0]
+ ld1w { z18.s, z22.s, z26.s, z30.s }, pn8/z, [x0]
+ ld1w { z19.s, z23.s, z27.s, z31.s }, pn8/z, [x0]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn15/z, [x0]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x30]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [sp]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, #-32, mul vl]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, #28, mul vl]
+ ld1w { z2.s, z6.s, z10.s, z14.s }, pn14/z, [x29, #8, mul vl]
+
+ ld1w { z0.s - z1.s }, pn8/z, [x0, x1, lsl 2]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, x1, lsl #2]
+ LD1W { Z0.S - Z1.S }, PN8/Z, [X0, X1, LSL #2]
+ ld1w { z30.s - z31.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn15/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/z, [x30, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/z, [sp, x1, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, x30, lsl #2]
+ ld1w { z0.s - z1.s }, pn8/z, [x0, xzr, lsl #2]
+ ld1w { z14.s - z15.s }, pn9/z, [x26, x3, lsl #2]
+
+ ld1w { z0.s - z3.s }, pn8/z, [x0, x1, lsl 2]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, x1, lsl #2]
+ LD1W { Z0.S - Z3.S }, PN8/Z, [X0, X1, LSL #2]
+ ld1w { z28.s - z31.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn15/z, [x0, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/z, [x30, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/z, [sp, x1, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, x30, lsl #2]
+ ld1w { z0.s - z3.s }, pn8/z, [x0, xzr, lsl #2]
+ ld1w { z8.s - z11.s }, pn11/z, [x27, x1, lsl #2]
+
+ ld1w { z0.s, z8.s }, pn8/z, [x0, x1, lsl 2]
+ ld1w { z0.s, z8.s }, pn8/z, [x0, x1, lsl #2]
+ LD1W { Z0.S, Z8.S }, PN8/Z, [X0, X1, LSL #2]
+ ld1w { z1.s, z9.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z2.s, z10.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z3.s, z11.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z4.s, z12.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z5.s, z13.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z6.s, z14.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z7.s, z15.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z16.s, z24.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z17.s, z25.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z18.s, z26.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z19.s, z27.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z20.s, z28.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z21.s, z29.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z22.s, z30.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z23.s, z31.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z8.s }, pn15/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z8.s }, pn8/z, [x30, x1, lsl #2]
+ ld1w { z0.s, z8.s }, pn8/z, [sp, x1, lsl #2]
+ ld1w { z0.s, z8.s }, pn8/z, [x0, x30, lsl #2]
+ ld1w { z0.s, z8.s }, pn8/z, [x0, xzr, lsl #2]
+ ld1w { z5.s, z13.s }, pn14/z, [x15, x24, lsl #2]
+
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, x1, lsl 2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, x1, lsl #2]
+ LD1W { Z0.S, Z4.S, Z8.S, Z12.S }, PN8/Z, [X0, X1, LSL #2]
+ ld1w { z1.s, z5.s, z9.s, z13.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z2.s, z6.s, z10.s, z14.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z3.s, z7.s, z11.s, z15.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z17.s, z21.s, z25.s, z29.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z18.s, z22.s, z26.s, z30.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z19.s, z23.s, z27.s, z31.s }, pn8/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn15/z, [x0, x1, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x30, x1, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [sp, x1, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, x30, lsl #2]
+ ld1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, xzr, lsl #2]
+ ld1w { z17.s, z21.s, z25.s, z29.s }, pn11/z, [x4, x6, lsl #2]
+
+ ldnt1w { z0.s - z1.s }, pn8/z, [x0]
+ ldnt1w { z0.s - z1.s }, pn8/z, [x0, #0, mul vl]
+ LDNT1W { Z0.S - Z1.S }, PN8/Z, [X0]
+ ldnt1w { z30.s - z31.s }, pn8/z, [x0]
+ ldnt1w { z0.s - z1.s }, pn15/z, [x0]
+ ldnt1w { z0.s - z1.s }, pn8/z, [x30]
+ ldnt1w { z0.s - z1.s }, pn8/z, [sp]
+ ldnt1w { z0.s - z1.s }, pn8/z, [x0, #-16, mul vl]
+ ldnt1w { z0.s - z1.s }, pn8/z, [x0, #14, mul vl]
+ ldnt1w { z12.s - z13.s }, pn13/z, [x11, #-10, mul vl]
+
+ ldnt1w { z0.s - z3.s }, pn8/z, [x0]
+ ldnt1w { z0.s - z3.s }, pn8/z, [x0, #0, mul vl]
+ LDNT1W { Z0.S - Z3.S }, PN8/Z, [X0]
+ ldnt1w { z28.s - z31.s }, pn8/z, [x0]
+ ldnt1w { z0.s - z3.s }, pn15/z, [x0]
+ ldnt1w { z0.s - z3.s }, pn8/z, [x30]
+ ldnt1w { z0.s - z3.s }, pn8/z, [sp]
+ ldnt1w { z0.s - z3.s }, pn8/z, [x0, #-32, mul vl]
+ ldnt1w { z0.s - z3.s }, pn8/z, [x0, #28, mul vl]
+ ldnt1w { z8.s - z11.s }, pn11/z, [x17, #20, mul vl]
+
+ ldnt1w { z0.s, z8.s }, pn8/z, [x0]
+ ldnt1w { z0.s, z8.s }, pn8/z, [x0, #0, mul vl]
+ LDNT1W { Z0.S, Z8.S }, PN8/Z, [X0]
+ ldnt1w { z1.s, z9.s }, pn8/z, [x0]
+ ldnt1w { z2.s, z10.s }, pn8/z, [x0]
+ ldnt1w { z3.s, z11.s }, pn8/z, [x0]
+ ldnt1w { z4.s, z12.s }, pn8/z, [x0]
+ ldnt1w { z5.s, z13.s }, pn8/z, [x0]
+ ldnt1w { z6.s, z14.s }, pn8/z, [x0]
+ ldnt1w { z7.s, z15.s }, pn8/z, [x0]
+ ldnt1w { z16.s, z24.s }, pn8/z, [x0]
+ ldnt1w { z17.s, z25.s }, pn8/z, [x0]
+ ldnt1w { z18.s, z26.s }, pn8/z, [x0]
+ ldnt1w { z19.s, z27.s }, pn8/z, [x0]
+ ldnt1w { z20.s, z28.s }, pn8/z, [x0]
+ ldnt1w { z21.s, z29.s }, pn8/z, [x0]
+ ldnt1w { z22.s, z30.s }, pn8/z, [x0]
+ ldnt1w { z23.s, z31.s }, pn8/z, [x0]
+ ldnt1w { z0.s, z8.s }, pn15/z, [x0]
+ ldnt1w { z0.s, z8.s }, pn8/z, [x30]
+ ldnt1w { z0.s, z8.s }, pn8/z, [sp]
+ ldnt1w { z0.s, z8.s }, pn8/z, [x0, #-16, mul vl]
+ ldnt1w { z0.s, z8.s }, pn8/z, [x0, #14, mul vl]
+ ldnt1w { z3.s, z11.s }, pn10/z, [x22, #6, mul vl]
+
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, #0, mul vl]
+ LDNT1W { Z0.S, Z4.S, Z8.S, Z12.S }, PN8/Z, [X0]
+ ldnt1w { z1.s, z5.s, z9.s, z13.s }, pn8/z, [x0]
+ ldnt1w { z2.s, z6.s, z10.s, z14.s }, pn8/z, [x0]
+ ldnt1w { z3.s, z7.s, z11.s, z15.s }, pn8/z, [x0]
+ ldnt1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [x0]
+ ldnt1w { z17.s, z21.s, z25.s, z29.s }, pn8/z, [x0]
+ ldnt1w { z18.s, z22.s, z26.s, z30.s }, pn8/z, [x0]
+ ldnt1w { z19.s, z23.s, z27.s, z31.s }, pn8/z, [x0]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn15/z, [x0]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x30]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [sp]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, #-32, mul vl]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, #28, mul vl]
+ ldnt1w { z2.s, z6.s, z10.s, z14.s }, pn14/z, [x29, #8, mul vl]
+
+ ldnt1w { z0.s - z1.s }, pn8/z, [x0, x1, lsl 2]
+ ldnt1w { z0.s - z1.s }, pn8/z, [x0, x1, lsl #2]
+ LDNT1W { Z0.S - Z1.S }, PN8/Z, [X0, X1, LSL #2]
+ ldnt1w { z30.s - z31.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z0.s - z1.s }, pn15/z, [x0, x1, lsl #2]
+ ldnt1w { z0.s - z1.s }, pn8/z, [x30, x1, lsl #2]
+ ldnt1w { z0.s - z1.s }, pn8/z, [sp, x1, lsl #2]
+ ldnt1w { z0.s - z1.s }, pn8/z, [x0, x30, lsl #2]
+ ldnt1w { z0.s - z1.s }, pn8/z, [x0, xzr, lsl #2]
+ ldnt1w { z14.s - z15.s }, pn9/z, [x26, x3, lsl #2]
+
+ ldnt1w { z0.s - z3.s }, pn8/z, [x0, x1, lsl 2]
+ ldnt1w { z0.s - z3.s }, pn8/z, [x0, x1, lsl #2]
+ LDNT1W { Z0.S - Z3.S }, PN8/Z, [X0, X1, LSL #2]
+ ldnt1w { z28.s - z31.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z0.s - z3.s }, pn15/z, [x0, x1, lsl #2]
+ ldnt1w { z0.s - z3.s }, pn8/z, [x30, x1, lsl #2]
+ ldnt1w { z0.s - z3.s }, pn8/z, [sp, x1, lsl #2]
+ ldnt1w { z0.s - z3.s }, pn8/z, [x0, x30, lsl #2]
+ ldnt1w { z0.s - z3.s }, pn8/z, [x0, xzr, lsl #2]
+ ldnt1w { z8.s - z11.s }, pn11/z, [x27, x1, lsl #2]
+
+ ldnt1w { z0.s, z8.s }, pn8/z, [x0, x1, lsl 2]
+ ldnt1w { z0.s, z8.s }, pn8/z, [x0, x1, lsl #2]
+ LDNT1W { Z0.S, Z8.S }, PN8/Z, [X0, X1, LSL #2]
+ ldnt1w { z1.s, z9.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z2.s, z10.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z3.s, z11.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z4.s, z12.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z5.s, z13.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z6.s, z14.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z7.s, z15.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z16.s, z24.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z17.s, z25.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z18.s, z26.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z19.s, z27.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z20.s, z28.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z21.s, z29.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z22.s, z30.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z23.s, z31.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z0.s, z8.s }, pn15/z, [x0, x1, lsl #2]
+ ldnt1w { z0.s, z8.s }, pn8/z, [x30, x1, lsl #2]
+ ldnt1w { z0.s, z8.s }, pn8/z, [sp, x1, lsl #2]
+ ldnt1w { z0.s, z8.s }, pn8/z, [x0, x30, lsl #2]
+ ldnt1w { z0.s, z8.s }, pn8/z, [x0, xzr, lsl #2]
+ ldnt1w { z5.s, z13.s }, pn14/z, [x15, x24, lsl #2]
+
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, x1, lsl 2]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, x1, lsl #2]
+ LDNT1W { Z0.S, Z4.S, Z8.S, Z12.S }, PN8/Z, [X0, X1, LSL #2]
+ ldnt1w { z1.s, z5.s, z9.s, z13.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z2.s, z6.s, z10.s, z14.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z3.s, z7.s, z11.s, z15.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z17.s, z21.s, z25.s, z29.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z18.s, z22.s, z26.s, z30.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z19.s, z23.s, z27.s, z31.s }, pn8/z, [x0, x1, lsl #2]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn15/z, [x0, x1, lsl #2]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x30, x1, lsl #2]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [sp, x1, lsl #2]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, x30, lsl #2]
+ ldnt1w { z0.s, z4.s, z8.s, z12.s }, pn8/z, [x0, xzr, lsl #2]
+ ldnt1w { z17.s, z21.s, z25.s, z29.s }, pn11/z, [x4, x6, lsl #2]
+
+ st1w { z0.s - z1.s }, pn8, [x0]
+ st1w { z0.s - z1.s }, pn8, [x0, #0, mul vl]
+ ST1W { Z0.S - Z1.S }, PN8, [X0]
+ st1w { z30.s - z31.s }, pn8, [x0]
+ st1w { z0.s - z1.s }, pn15, [x0]
+ st1w { z0.s - z1.s }, pn8, [x30]
+ st1w { z0.s - z1.s }, pn8, [sp]
+ st1w { z0.s - z1.s }, pn8, [x0, #-16, mul vl]
+ st1w { z0.s - z1.s }, pn8, [x0, #14, mul vl]
+ st1w { z12.s - z13.s }, pn13, [x11, #-10, mul vl]
+
+ st1w { z0.s - z3.s }, pn8, [x0]
+ st1w { z0.s - z3.s }, pn8, [x0, #0, mul vl]
+ ST1W { Z0.S - Z3.S }, PN8, [X0]
+ st1w { z28.s - z31.s }, pn8, [x0]
+ st1w { z0.s - z3.s }, pn15, [x0]
+ st1w { z0.s - z3.s }, pn8, [x30]
+ st1w { z0.s - z3.s }, pn8, [sp]
+ st1w { z0.s - z3.s }, pn8, [x0, #-32, mul vl]
+ st1w { z0.s - z3.s }, pn8, [x0, #28, mul vl]
+ st1w { z8.s - z11.s }, pn11, [x17, #20, mul vl]
+
+ st1w { z0.s, z8.s }, pn8, [x0]
+ st1w { z0.s, z8.s }, pn8, [x0, #0, mul vl]
+ ST1W { Z0.S, Z8.S }, PN8, [X0]
+ st1w { z1.s, z9.s }, pn8, [x0]
+ st1w { z2.s, z10.s }, pn8, [x0]
+ st1w { z3.s, z11.s }, pn8, [x0]
+ st1w { z4.s, z12.s }, pn8, [x0]
+ st1w { z5.s, z13.s }, pn8, [x0]
+ st1w { z6.s, z14.s }, pn8, [x0]
+ st1w { z7.s, z15.s }, pn8, [x0]
+ st1w { z16.s, z24.s }, pn8, [x0]
+ st1w { z17.s, z25.s }, pn8, [x0]
+ st1w { z18.s, z26.s }, pn8, [x0]
+ st1w { z19.s, z27.s }, pn8, [x0]
+ st1w { z20.s, z28.s }, pn8, [x0]
+ st1w { z21.s, z29.s }, pn8, [x0]
+ st1w { z22.s, z30.s }, pn8, [x0]
+ st1w { z23.s, z31.s }, pn8, [x0]
+ st1w { z0.s, z8.s }, pn15, [x0]
+ st1w { z0.s, z8.s }, pn8, [x30]
+ st1w { z0.s, z8.s }, pn8, [sp]
+ st1w { z0.s, z8.s }, pn8, [x0, #-16, mul vl]
+ st1w { z0.s, z8.s }, pn8, [x0, #14, mul vl]
+ st1w { z3.s, z11.s }, pn10, [x22, #6, mul vl]
+
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, #0, mul vl]
+ ST1W { Z0.S, Z4.S, Z8.S, Z12.S }, PN8, [X0]
+ st1w { z1.s, z5.s, z9.s, z13.s }, pn8, [x0]
+ st1w { z2.s, z6.s, z10.s, z14.s }, pn8, [x0]
+ st1w { z3.s, z7.s, z11.s, z15.s }, pn8, [x0]
+ st1w { z16.s, z20.s, z24.s, z28.s }, pn8, [x0]
+ st1w { z17.s, z21.s, z25.s, z29.s }, pn8, [x0]
+ st1w { z18.s, z22.s, z26.s, z30.s }, pn8, [x0]
+ st1w { z19.s, z23.s, z27.s, z31.s }, pn8, [x0]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn15, [x0]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x30]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [sp]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, #-32, mul vl]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, #28, mul vl]
+ st1w { z2.s, z6.s, z10.s, z14.s }, pn14, [x29, #8, mul vl]
+
+ st1w { z0.s - z1.s }, pn8, [x0, x1, lsl 2]
+ st1w { z0.s - z1.s }, pn8, [x0, x1, lsl #2]
+ ST1W { Z0.S - Z1.S }, PN8, [X0, X1, LSL #2]
+ st1w { z30.s - z31.s }, pn8, [x0, x1, lsl #2]
+ st1w { z0.s - z1.s }, pn15, [x0, x1, lsl #2]
+ st1w { z0.s - z1.s }, pn8, [x30, x1, lsl #2]
+ st1w { z0.s - z1.s }, pn8, [sp, x1, lsl #2]
+ st1w { z0.s - z1.s }, pn8, [x0, x30, lsl #2]
+ st1w { z0.s - z1.s }, pn8, [x0, xzr, lsl #2]
+ st1w { z14.s - z15.s }, pn9, [x26, x3, lsl #2]
+
+ st1w { z0.s - z3.s }, pn8, [x0, x1, lsl 2]
+ st1w { z0.s - z3.s }, pn8, [x0, x1, lsl #2]
+ ST1W { Z0.S - Z3.S }, PN8, [X0, X1, LSL #2]
+ st1w { z28.s - z31.s }, pn8, [x0, x1, lsl #2]
+ st1w { z0.s - z3.s }, pn15, [x0, x1, lsl #2]
+ st1w { z0.s - z3.s }, pn8, [x30, x1, lsl #2]
+ st1w { z0.s - z3.s }, pn8, [sp, x1, lsl #2]
+ st1w { z0.s - z3.s }, pn8, [x0, x30, lsl #2]
+ st1w { z0.s - z3.s }, pn8, [x0, xzr, lsl #2]
+ st1w { z8.s - z11.s }, pn11, [x27, x1, lsl #2]
+
+ st1w { z0.s, z8.s }, pn8, [x0, x1, lsl 2]
+ st1w { z0.s, z8.s }, pn8, [x0, x1, lsl #2]
+ ST1W { Z0.S, Z8.S }, PN8, [X0, X1, LSL #2]
+ st1w { z1.s, z9.s }, pn8, [x0, x1, lsl #2]
+ st1w { z2.s, z10.s }, pn8, [x0, x1, lsl #2]
+ st1w { z3.s, z11.s }, pn8, [x0, x1, lsl #2]
+ st1w { z4.s, z12.s }, pn8, [x0, x1, lsl #2]
+ st1w { z5.s, z13.s }, pn8, [x0, x1, lsl #2]
+ st1w { z6.s, z14.s }, pn8, [x0, x1, lsl #2]
+ st1w { z7.s, z15.s }, pn8, [x0, x1, lsl #2]
+ st1w { z16.s, z24.s }, pn8, [x0, x1, lsl #2]
+ st1w { z17.s, z25.s }, pn8, [x0, x1, lsl #2]
+ st1w { z18.s, z26.s }, pn8, [x0, x1, lsl #2]
+ st1w { z19.s, z27.s }, pn8, [x0, x1, lsl #2]
+ st1w { z20.s, z28.s }, pn8, [x0, x1, lsl #2]
+ st1w { z21.s, z29.s }, pn8, [x0, x1, lsl #2]
+ st1w { z22.s, z30.s }, pn8, [x0, x1, lsl #2]
+ st1w { z23.s, z31.s }, pn8, [x0, x1, lsl #2]
+ st1w { z0.s, z8.s }, pn15, [x0, x1, lsl #2]
+ st1w { z0.s, z8.s }, pn8, [x30, x1, lsl #2]
+ st1w { z0.s, z8.s }, pn8, [sp, x1, lsl #2]
+ st1w { z0.s, z8.s }, pn8, [x0, x30, lsl #2]
+ st1w { z0.s, z8.s }, pn8, [x0, xzr, lsl #2]
+ st1w { z5.s, z13.s }, pn14, [x15, x24, lsl #2]
+
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, x1, lsl 2]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, x1, lsl #2]
+ ST1W { Z0.S, Z4.S, Z8.S, Z12.S }, PN8, [X0, X1, LSL #2]
+ st1w { z1.s, z5.s, z9.s, z13.s }, pn8, [x0, x1, lsl #2]
+ st1w { z2.s, z6.s, z10.s, z14.s }, pn8, [x0, x1, lsl #2]
+ st1w { z3.s, z7.s, z11.s, z15.s }, pn8, [x0, x1, lsl #2]
+ st1w { z16.s, z20.s, z24.s, z28.s }, pn8, [x0, x1, lsl #2]
+ st1w { z17.s, z21.s, z25.s, z29.s }, pn8, [x0, x1, lsl #2]
+ st1w { z18.s, z22.s, z26.s, z30.s }, pn8, [x0, x1, lsl #2]
+ st1w { z19.s, z23.s, z27.s, z31.s }, pn8, [x0, x1, lsl #2]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn15, [x0, x1, lsl #2]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x30, x1, lsl #2]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [sp, x1, lsl #2]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, x30, lsl #2]
+ st1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, xzr, lsl #2]
+ st1w { z17.s, z21.s, z25.s, z29.s }, pn11, [x4, x6, lsl #2]
+
+ stnt1w { z0.s - z1.s }, pn8, [x0]
+ stnt1w { z0.s - z1.s }, pn8, [x0, #0, mul vl]
+ STNT1W { Z0.S - Z1.S }, PN8, [X0]
+ stnt1w { z30.s - z31.s }, pn8, [x0]
+ stnt1w { z0.s - z1.s }, pn15, [x0]
+ stnt1w { z0.s - z1.s }, pn8, [x30]
+ stnt1w { z0.s - z1.s }, pn8, [sp]
+ stnt1w { z0.s - z1.s }, pn8, [x0, #-16, mul vl]
+ stnt1w { z0.s - z1.s }, pn8, [x0, #14, mul vl]
+ stnt1w { z12.s - z13.s }, pn13, [x11, #-10, mul vl]
+
+ stnt1w { z0.s - z3.s }, pn8, [x0]
+ stnt1w { z0.s - z3.s }, pn8, [x0, #0, mul vl]
+ STNT1W { Z0.S - Z3.S }, PN8, [X0]
+ stnt1w { z28.s - z31.s }, pn8, [x0]
+ stnt1w { z0.s - z3.s }, pn15, [x0]
+ stnt1w { z0.s - z3.s }, pn8, [x30]
+ stnt1w { z0.s - z3.s }, pn8, [sp]
+ stnt1w { z0.s - z3.s }, pn8, [x0, #-32, mul vl]
+ stnt1w { z0.s - z3.s }, pn8, [x0, #28, mul vl]
+ stnt1w { z8.s - z11.s }, pn11, [x17, #20, mul vl]
+
+ stnt1w { z0.s, z8.s }, pn8, [x0]
+ stnt1w { z0.s, z8.s }, pn8, [x0, #0, mul vl]
+ STNT1W { Z0.S, Z8.S }, PN8, [X0]
+ stnt1w { z1.s, z9.s }, pn8, [x0]
+ stnt1w { z2.s, z10.s }, pn8, [x0]
+ stnt1w { z3.s, z11.s }, pn8, [x0]
+ stnt1w { z4.s, z12.s }, pn8, [x0]
+ stnt1w { z5.s, z13.s }, pn8, [x0]
+ stnt1w { z6.s, z14.s }, pn8, [x0]
+ stnt1w { z7.s, z15.s }, pn8, [x0]
+ stnt1w { z16.s, z24.s }, pn8, [x0]
+ stnt1w { z17.s, z25.s }, pn8, [x0]
+ stnt1w { z18.s, z26.s }, pn8, [x0]
+ stnt1w { z19.s, z27.s }, pn8, [x0]
+ stnt1w { z20.s, z28.s }, pn8, [x0]
+ stnt1w { z21.s, z29.s }, pn8, [x0]
+ stnt1w { z22.s, z30.s }, pn8, [x0]
+ stnt1w { z23.s, z31.s }, pn8, [x0]
+ stnt1w { z0.s, z8.s }, pn15, [x0]
+ stnt1w { z0.s, z8.s }, pn8, [x30]
+ stnt1w { z0.s, z8.s }, pn8, [sp]
+ stnt1w { z0.s, z8.s }, pn8, [x0, #-16, mul vl]
+ stnt1w { z0.s, z8.s }, pn8, [x0, #14, mul vl]
+ stnt1w { z3.s, z11.s }, pn10, [x22, #6, mul vl]
+
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, #0, mul vl]
+ STNT1W { Z0.S, Z4.S, Z8.S, Z12.S }, PN8, [X0]
+ stnt1w { z1.s, z5.s, z9.s, z13.s }, pn8, [x0]
+ stnt1w { z2.s, z6.s, z10.s, z14.s }, pn8, [x0]
+ stnt1w { z3.s, z7.s, z11.s, z15.s }, pn8, [x0]
+ stnt1w { z16.s, z20.s, z24.s, z28.s }, pn8, [x0]
+ stnt1w { z17.s, z21.s, z25.s, z29.s }, pn8, [x0]
+ stnt1w { z18.s, z22.s, z26.s, z30.s }, pn8, [x0]
+ stnt1w { z19.s, z23.s, z27.s, z31.s }, pn8, [x0]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn15, [x0]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x30]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [sp]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, #-32, mul vl]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, #28, mul vl]
+ stnt1w { z2.s, z6.s, z10.s, z14.s }, pn14, [x29, #8, mul vl]
+
+ stnt1w { z0.s - z1.s }, pn8, [x0, x1, lsl 2]
+ stnt1w { z0.s - z1.s }, pn8, [x0, x1, lsl #2]
+ STNT1W { Z0.S - Z1.S }, PN8, [X0, X1, LSL #2]
+ stnt1w { z30.s - z31.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z0.s - z1.s }, pn15, [x0, x1, lsl #2]
+ stnt1w { z0.s - z1.s }, pn8, [x30, x1, lsl #2]
+ stnt1w { z0.s - z1.s }, pn8, [sp, x1, lsl #2]
+ stnt1w { z0.s - z1.s }, pn8, [x0, x30, lsl #2]
+ stnt1w { z0.s - z1.s }, pn8, [x0, xzr, lsl #2]
+ stnt1w { z14.s - z15.s }, pn9, [x26, x3, lsl #2]
+
+ stnt1w { z0.s - z3.s }, pn8, [x0, x1, lsl 2]
+ stnt1w { z0.s - z3.s }, pn8, [x0, x1, lsl #2]
+ STNT1W { Z0.S - Z3.S }, PN8, [X0, X1, LSL #2]
+ stnt1w { z28.s - z31.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z0.s - z3.s }, pn15, [x0, x1, lsl #2]
+ stnt1w { z0.s - z3.s }, pn8, [x30, x1, lsl #2]
+ stnt1w { z0.s - z3.s }, pn8, [sp, x1, lsl #2]
+ stnt1w { z0.s - z3.s }, pn8, [x0, x30, lsl #2]
+ stnt1w { z0.s - z3.s }, pn8, [x0, xzr, lsl #2]
+ stnt1w { z8.s - z11.s }, pn11, [x27, x1, lsl #2]
+
+ stnt1w { z0.s, z8.s }, pn8, [x0, x1, lsl 2]
+ stnt1w { z0.s, z8.s }, pn8, [x0, x1, lsl #2]
+ STNT1W { Z0.S, Z8.S }, PN8, [X0, X1, LSL #2]
+ stnt1w { z1.s, z9.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z2.s, z10.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z3.s, z11.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z4.s, z12.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z5.s, z13.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z6.s, z14.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z7.s, z15.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z16.s, z24.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z17.s, z25.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z18.s, z26.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z19.s, z27.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z20.s, z28.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z21.s, z29.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z22.s, z30.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z23.s, z31.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z0.s, z8.s }, pn15, [x0, x1, lsl #2]
+ stnt1w { z0.s, z8.s }, pn8, [x30, x1, lsl #2]
+ stnt1w { z0.s, z8.s }, pn8, [sp, x1, lsl #2]
+ stnt1w { z0.s, z8.s }, pn8, [x0, x30, lsl #2]
+ stnt1w { z0.s, z8.s }, pn8, [x0, xzr, lsl #2]
+ stnt1w { z5.s, z13.s }, pn14, [x15, x24, lsl #2]
+
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, x1, lsl 2]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, x1, lsl #2]
+ STNT1W { Z0.S, Z4.S, Z8.S, Z12.S }, PN8, [X0, X1, LSL #2]
+ stnt1w { z1.s, z5.s, z9.s, z13.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z2.s, z6.s, z10.s, z14.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z3.s, z7.s, z11.s, z15.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z16.s, z20.s, z24.s, z28.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z17.s, z21.s, z25.s, z29.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z18.s, z22.s, z26.s, z30.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z19.s, z23.s, z27.s, z31.s }, pn8, [x0, x1, lsl #2]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn15, [x0, x1, lsl #2]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x30, x1, lsl #2]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [sp, x1, lsl #2]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, x30, lsl #2]
+ stnt1w { z0.s, z4.s, z8.s, z12.s }, pn8, [x0, xzr, lsl #2]
+ stnt1w { z17.s, z21.s, z25.s, z29.s }, pn11, [x4, x6, lsl #2]
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 4d2e054c7f8..d34cea5efca 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -489,6 +489,8 @@ enum aarch64_opnd
AARCH64_OPND_SME_Zdnx4, /* SVE vector register list from [4:2]*4. */
AARCH64_OPND_SME_Znx2, /* SVE vector register list from [9:6]*2. */
AARCH64_OPND_SME_Znx4, /* SVE vector register list from [9:7]*4. */
+ AARCH64_OPND_SME_Ztx2_STRIDED, /* SVE vector register list in [4:0]&23. */
+ AARCH64_OPND_SME_Ztx4_STRIDED, /* SVE vector register list in [4:0]&19. */
AARCH64_OPND_SME_ZAda_2b, /* SME <ZAda>.S, 2-bits. */
AARCH64_OPND_SME_ZAda_3b, /* SME <ZAda>.D, 3-bits. */
AARCH64_OPND_SME_ZA_HV_idx_src, /* SME source ZA tile vector. */
@@ -496,6 +498,7 @@ enum aarch64_opnd
AARCH64_OPND_SME_ZA_HV_idx_dest, /* SME destination ZA tile vector. */
AARCH64_OPND_SME_ZA_HV_idx_destxN, /* SME N dest ZA tile vectors. */
AARCH64_OPND_SME_Pm, /* SME scalable predicate register, bits [15:13]. */
+ AARCH64_OPND_SME_PNg3, /* Predicate-as-counter register, bits [12:10]. */
AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */
AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
AARCH64_OPND_SME_ZA_array_off3_0, /* SME ZA[<Wv>{, #<imm3>}]. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index daba55b4c62..6775d2264ea 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -667,9 +667,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 218:
- case 219:
- case 224:
+ case 220:
+ case 221:
+ case 226:
+ case 227:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -681,7 +682,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 234:
+ case 237:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -726,10 +727,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 225:
- case 233:
- case 238:
- case 239:
+ case 228:
+ case 236:
+ case 241:
+ case 242:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -894,26 +895,29 @@ aarch64_insert_operand (const aarch64_operand *self,
case 216:
case 217:
return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
- case 220:
+ case 218:
+ case 219:
+ return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
case 222:
- case 226:
+ case 224:
+ case 229:
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
- case 221:
case 223:
+ case 225:
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 227:
- case 228:
- case 229:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 230:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 231:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 232:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
+ case 233:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 234:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 235:
- case 236:
- case 237:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 238:
+ case 239:
+ case 240:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 516aa8ecb81..42cc6f75677 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -96,7 +96,8 @@ aarch64_ins_regno (const aarch64_operand *self, const aarch64_opnd_info *info,
const aarch64_inst *inst ATTRIBUTE_UNUSED,
aarch64_operand_error *errors ATTRIBUTE_UNUSED)
{
- insert_field (self->fields[0], code, info->reg.regno, 0);
+ int val = info->reg.regno - get_operand_specific_data (self);
+ insert_field (self->fields[0], code, val, 0);
return true;
}
@@ -1245,6 +1246,26 @@ aarch64_ins_sve_reglist (const aarch64_operand *self,
return true;
}
+/* Encode a strided register list. The first field holds the top bit
+ (0 or 16) and the second field holds the lower bits. The stride is
+ 16 divided by the list length. */
+bool
+aarch64_ins_sve_strided_reglist (const aarch64_operand *self,
+ const aarch64_opnd_info *info,
+ aarch64_insn *code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors
+ ATTRIBUTE_UNUSED)
+{
+ unsigned int num_regs = get_operand_specific_data (self);
+ unsigned int mask = 16 | (16 / num_regs - 1);
+ unsigned int val = info->reglist.first_regno;
+ assert ((val & mask) == val);
+ insert_field (self->fields[0], code, val >> 4, 0);
+ insert_field (self->fields[1], code, val & 15, 0);
+ return true;
+}
+
/* Encode <pattern>{, MUL #<amount>}. The fields array specifies which
fields to use for <pattern>. <amount> - 1 is encoded in the SVE_imm4
field. */
diff --git a/opcodes/aarch64-asm.h b/opcodes/aarch64-asm.h
index eb881707b65..f74cb718f3e 100644
--- a/opcodes/aarch64-asm.h
+++ b/opcodes/aarch64-asm.h
@@ -96,6 +96,7 @@ AARCH64_DECL_OPD_INSERTER (ins_sve_index);
AARCH64_DECL_OPD_INSERTER (ins_sve_limm_mov);
AARCH64_DECL_OPD_INSERTER (ins_sve_quad_index);
AARCH64_DECL_OPD_INSERTER (ins_sve_reglist);
+AARCH64_DECL_OPD_INSERTER (ins_sve_strided_reglist);
AARCH64_DECL_OPD_INSERTER (ins_sve_scale);
AARCH64_DECL_OPD_INSERTER (ins_sve_shlimm);
AARCH64_DECL_OPD_INSERTER (ins_sve_shrimm);
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 3e7ca5cc373..b367a77fc00 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -169,7 +169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx00xxxxxxxxxx
mov. */
- return 2426;
+ return 2490;
}
else
{
@@ -177,7 +177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2424;
+ return 2488;
}
}
else
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2427;
+ return 2491;
}
else
{
@@ -196,7 +196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2425;
+ return 2489;
}
}
}
@@ -221,7 +221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx00xxxxxxxxxx
mov. */
- return 2422;
+ return 2486;
}
else
{
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2420;
+ return 2484;
}
}
else
@@ -240,7 +240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2423;
+ return 2487;
}
else
{
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2421;
+ return 2485;
}
}
}
@@ -257,19 +257,195 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 4) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 30) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx000xxxxxxxxxxxx0
+ ld1b. */
+ return 2424;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx100xxxxxxxxxxxx0
+ ld1b. */
+ return 2425;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx010xxxxxxxxxxxx0
+ ld1w. */
+ return 2448;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx110xxxxxxxxxxxx0
+ ld1w. */
+ return 2449;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx001xxxxxxxxxxxx0
+ ld1h. */
+ return 2440;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx101xxxxxxxxxxxx0
+ ld1h. */
+ return 2441;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx011xxxxxxxxxxxx0
+ ld1d. */
+ return 2432;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx111xxxxxxxxxxxx0
+ ld1d. */
+ return 2433;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx000xxxxxxxxxxxx1
+ ldnt1b. */
+ return 2456;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx100xxxxxxxxxxxx1
+ ldnt1b. */
+ return 2457;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx010xxxxxxxxxxxx1
+ ldnt1w. */
+ return 2480;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx110xxxxxxxxxxxx1
+ ldnt1w. */
+ return 2481;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx001xxxxxxxxxxxx1
+ ldnt1h. */
+ return 2472;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx101xxxxxxxxxxxx1
+ ldnt1h. */
+ return 2473;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx011xxxxxxxxxxxx1
+ ldnt1d. */
+ return 2464;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000000xxxxx111xxxxxxxxxxxx1
+ ldnt1d. */
+ return 2465;
+ }
+ }
+ }
+ }
+ }
+ else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx100000000xxxxxxxxxxxxxxxx0xxxx
+ x1100000000xxxxxxxxxxxxxxxxxxxxx
ld1b. */
return 2393;
}
- else
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
{
if (((word >> 30) & 0x1) == 0)
{
@@ -288,18 +464,205 @@ aarch64_opcode_lookup_1 (uint32_t word)
return 2395;
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100000100xxxxxxxxxxxxxxxx1xxxx
+ smops. */
+ return 2374;
+ }
}
- else
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 30) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx000xxxxxxxxxxxx0
+ ld1b. */
+ return 2420;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx100xxxxxxxxxxxx0
+ ld1b. */
+ return 2421;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx010xxxxxxxxxxxx0
+ ld1w. */
+ return 2444;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx110xxxxxxxxxxxx0
+ ld1w. */
+ return 2445;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx001xxxxxxxxxxxx0
+ ld1h. */
+ return 2436;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx101xxxxxxxxxxxx0
+ ld1h. */
+ return 2437;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx011xxxxxxxxxxxx0
+ ld1d. */
+ return 2428;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx111xxxxxxxxxxxx0
+ ld1d. */
+ return 2429;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx000xxxxxxxxxxxx1
+ ldnt1b. */
+ return 2452;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx100xxxxxxxxxxxx1
+ ldnt1b. */
+ return 2453;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx010xxxxxxxxxxxx1
+ ldnt1w. */
+ return 2476;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx110xxxxxxxxxxxx1
+ ldnt1w. */
+ return 2477;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx001xxxxxxxxxxxx1
+ ldnt1h. */
+ return 2468;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx101xxxxxxxxxxxx1
+ ldnt1h. */
+ return 2469;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx011xxxxxxxxxxxx1
+ ldnt1d. */
+ return 2460;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000010xxxxx111xxxxxxxxxxxx1
+ ldnt1d. */
+ return 2461;
+ }
+ }
+ }
+ }
+ }
+ else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx100000010xxxxxxxxxxxxxxxx0xxxx
+ x1100000010xxxxxxxxxxxxxxxxxxxxx
ld1h. */
return 2394;
}
- else
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
{
if (((word >> 30) & 0x1) == 0)
{
@@ -318,44 +681,209 @@ aarch64_opcode_lookup_1 (uint32_t word)
return 2396;
}
}
- }
- }
- else
- {
- if (((word >> 22) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100000x00xxxxxxxxxxxxxxxx1xxxx
- smops. */
- return 2374;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100000x10xxxxxxxxxxxxxxxx1xxxx
- smops. */
- return 2375;
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100000110xxxxxxxxxxxxxxxx1xxxx
+ smops. */
+ return 2375;
+ }
}
}
}
}
else
{
- if (((word >> 4) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 30) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx000xxxxxxxxxxxx0
+ st1b. */
+ return 2504;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx100xxxxxxxxxxxx0
+ st1b. */
+ return 2505;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx010xxxxxxxxxxxx0
+ st1w. */
+ return 2528;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx110xxxxxxxxxxxx0
+ st1w. */
+ return 2529;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx001xxxxxxxxxxxx0
+ st1h. */
+ return 2520;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx101xxxxxxxxxxxx0
+ st1h. */
+ return 2521;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx011xxxxxxxxxxxx0
+ st1d. */
+ return 2512;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx111xxxxxxxxxxxx0
+ st1d. */
+ return 2513;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx000xxxxxxxxxxxx1
+ stnt1b. */
+ return 2536;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx100xxxxxxxxxxxx1
+ stnt1b. */
+ return 2537;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx010xxxxxxxxxxxx1
+ stnt1w. */
+ return 2560;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx110xxxxxxxxxxxx1
+ stnt1w. */
+ return 2561;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx001xxxxxxxxxxxx1
+ stnt1h. */
+ return 2552;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx101xxxxxxxxxxxx1
+ stnt1h. */
+ return 2553;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx011xxxxxxxxxxxx1
+ stnt1d. */
+ return 2544;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000001xxxxx111xxxxxxxxxxxx1
+ stnt1d. */
+ return 2545;
+ }
+ }
+ }
+ }
+ }
+ else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00000001xxxxxxxxxxxxxxxx0xxxx
+ x1x00000001xxxxxxxxxxxxxxxxxxxxx
st1b. */
return 2403;
}
- else
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
{
if (((word >> 30) & 0x1) == 0)
{
@@ -374,18 +902,205 @@ aarch64_opcode_lookup_1 (uint32_t word)
return 2405;
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00000101xxxxxxxxxxxxxxxx1xxxx
+ sumops. */
+ return 2378;
+ }
}
- else
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 30) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx000xxxxxxxxxxxx0
+ st1b. */
+ return 2500;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx100xxxxxxxxxxxx0
+ st1b. */
+ return 2501;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx010xxxxxxxxxxxx0
+ st1w. */
+ return 2524;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx110xxxxxxxxxxxx0
+ st1w. */
+ return 2525;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx001xxxxxxxxxxxx0
+ st1h. */
+ return 2516;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx101xxxxxxxxxxxx0
+ st1h. */
+ return 2517;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx011xxxxxxxxxxxx0
+ st1d. */
+ return 2508;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx111xxxxxxxxxxxx0
+ st1d. */
+ return 2509;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx000xxxxxxxxxxxx1
+ stnt1b. */
+ return 2532;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx100xxxxxxxxxxxx1
+ stnt1b. */
+ return 2533;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx010xxxxxxxxxxxx1
+ stnt1w. */
+ return 2556;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx110xxxxxxxxxxxx1
+ stnt1w. */
+ return 2557;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx001xxxxxxxxxxxx1
+ stnt1h. */
+ return 2548;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx101xxxxxxxxxxxx1
+ stnt1h. */
+ return 2549;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx011xxxxxxxxxxxx1
+ stnt1d. */
+ return 2540;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00000011xxxxx111xxxxxxxxxxxx1
+ stnt1d. */
+ return 2541;
+ }
+ }
+ }
+ }
+ }
+ else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00000011xxxxxxxxxxxxxxxx0xxxx
+ x1x00000011xxxxxxxxxxxxxxxxxxxxx
st1h. */
return 2404;
}
- else
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
{
if (((word >> 30) & 0x1) == 0)
{
@@ -404,25 +1119,14 @@ aarch64_opcode_lookup_1 (uint32_t word)
return 2406;
}
}
- }
- }
- else
- {
- if (((word >> 22) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00000x01xxxxxxxxxxxxxxxx1xxxx
- sumops. */
- return 2378;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00000x11xxxxxxxxxxxxxxxx1xxxx
- sumops. */
- return 2379;
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00000111xxxxxxxxxxxxxxxx1xxxx
+ sumops. */
+ return 2379;
+ }
}
}
}
@@ -451,21 +1155,197 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 28) & 0x1) == 0)
{
- if (((word >> 4) & 0x1) == 0)
+ if (((word >> 21) & 0x1) == 0)
{
- if (((word >> 21) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxxxxxxxxxxxxx0xxxx
- ldr. */
- return 2413;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx000xxxxxxxxx0xxx
+ ld1b. */
+ return 2426;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx010xxxxxxxxx0xxx
+ ld1w. */
+ return 2450;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx001xxxxxxxxx0xxx
+ ld1h. */
+ return 2442;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx011xxxxxxxxx0xxx
+ ld1d. */
+ return 2434;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx000xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2458;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx010xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2482;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx001xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2474;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx011xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2466;
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1x00001000xxxxx0xxxxxxxxxxxxxxx
+ ldr. */
+ return 2413;
+ }
}
else
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001000xxxxx100xxxxxxxxx0xxx
+ ld1b. */
+ return 2427;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001000xxxxx110xxxxxxxxx0xxx
+ ld1w. */
+ return 2451;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001000xxxxx101xxxxxxxxx0xxx
+ ld1h. */
+ return 2443;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001000xxxxx111xxxxxxxxx0xxx
+ ld1d. */
+ return 2435;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001000xxxxx100xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2459;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001000xxxxx110xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2483;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001000xxxxx101xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2475;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001000xxxxx111xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2467;
+ }
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
{
if (((word >> 29) & 0x1) == 0)
{
@@ -484,40 +1364,425 @@ aarch64_opcode_lookup_1 (uint32_t word)
return 2384;
}
}
+ else
+ {
+ if (((word >> 29) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001100xxxxxxxxxxxxxxxx1xxxx
+ bfmops. */
+ return 2364;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001100xxxxxxxxxxxxxxxx1xxxx
+ usmops. */
+ return 2386;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx000xxxxxxxxx0xxx
+ ld1b. */
+ return 2422;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx100xxxxxxxxx0xxx
+ ld1b. */
+ return 2423;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx010xxxxxxxxx0xxx
+ ld1w. */
+ return 2446;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx110xxxxxxxxx0xxx
+ ld1w. */
+ return 2447;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx001xxxxxxxxx0xxx
+ ld1h. */
+ return 2438;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx101xxxxxxxxx0xxx
+ ld1h. */
+ return 2439;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx011xxxxxxxxx0xxx
+ ld1d. */
+ return 2430;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx111xxxxxxxxx0xxx
+ ld1d. */
+ return 2431;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx000xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2454;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx100xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2455;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx010xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2478;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx110xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2479;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx001xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2470;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx101xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2471;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx011xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2462;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001010xxxxx111xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2463;
+ }
+ }
+ }
+ }
}
else
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001x10xxxxxxxxxxxxxxxx0xxxx
- usmopa. */
- return 2385;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001110xxxxxxxxxxxxxxxx0xxxx
+ usmopa. */
+ return 2385;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1x00001110xxxxxxxxxxxxxxxx0xxxx
+ ld1q. */
+ return 2397;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1x00001x10xxxxxxxxxxxxxxxx0xxxx
- ld1q. */
- return 2397;
+ xxx00001110xxxxxxxxxxxxxxxx1xxxx
+ usmops. */
+ return 2387;
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxxxxxxxxxxxxx0xxxx
- str. */
- return 2414;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001001xxxxx000xxxxxxxxx0xxx
+ st1b. */
+ return 2506;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001001xxxxx010xxxxxxxxx0xxx
+ st1w. */
+ return 2530;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001001xxxxx001xxxxxxxxx0xxx
+ st1h. */
+ return 2522;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001001xxxxx011xxxxxxxxx0xxx
+ st1d. */
+ return 2514;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001001xxxxx000xxxxxxxxx1xxx
+ stnt1b. */
+ return 2538;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001001xxxxx010xxxxxxxxx1xxx
+ stnt1w. */
+ return 2562;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001001xxxxx001xxxxxxxxx1xxx
+ stnt1h. */
+ return 2554;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001001xxxxx011xxxxxxxxx1xxx
+ stnt1d. */
+ return 2546;
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1x00001001xxxxx0xxxxxxxxxxxxxxx
+ str. */
+ return 2414;
+ }
}
else
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001001xxxxx100xxxxxxxxx0xxx
+ st1b. */
+ return 2507;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001001xxxxx110xxxxxxxxx0xxx
+ st1w. */
+ return 2531;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001001xxxxx101xxxxxxxxx0xxx
+ st1h. */
+ return 2523;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001001xxxxx111xxxxxxxxx0xxx
+ st1d. */
+ return 2515;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001001xxxxx100xxxxxxxxx1xxx
+ stnt1b. */
+ return 2539;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001001xxxxx110xxxxxxxxx1xxx
+ stnt1w. */
+ return 2563;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001001xxxxx101xxxxxxxxx1xxx
+ stnt1h. */
+ return 2555;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001001xxxxx111xxxxxxxxx1xxx
+ stnt1d. */
+ return 2547;
+ }
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
{
if (((word >> 29) & 0x1) == 0)
{
@@ -536,89 +1801,232 @@ aarch64_opcode_lookup_1 (uint32_t word)
return 2380;
}
}
- }
- else
- {
- if (((word >> 30) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001x11xxxxxxxxxxxxxxxx0xxxx
- umopa. */
- return 2381;
- }
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1x00001x11xxxxxxxxxxxxxxxx0xxxx
- st1q. */
- return 2407;
+ if (((word >> 29) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001101xxxxxxxxxxxxxxxx1xxxx
+ fmops. */
+ return 2370;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001101xxxxxxxxxxxxxxxx1xxxx
+ umops. */
+ return 2382;
+ }
}
}
}
- }
- else
- {
- if (((word >> 21) & 0x1) == 0)
+ else
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001x00xxxxxxxxxxxxxxxx1xxxx
- bfmops. */
- return 2364;
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx000xxxxxxxxx0xxx
+ st1b. */
+ return 2502;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx100xxxxxxxxx0xxx
+ st1b. */
+ return 2503;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx010xxxxxxxxx0xxx
+ st1w. */
+ return 2526;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx110xxxxxxxxx0xxx
+ st1w. */
+ return 2527;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx001xxxxxxxxx0xxx
+ st1h. */
+ return 2518;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx101xxxxxxxxx0xxx
+ st1h. */
+ return 2519;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx011xxxxxxxxx0xxx
+ st1d. */
+ return 2510;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx111xxxxxxxxx0xxx
+ st1d. */
+ return 2511;
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001x00xxxxxxxxxxxxxxxx1xxxx
- usmops. */
- return 2386;
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx000xxxxxxxxx1xxx
+ stnt1b. */
+ return 2534;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx100xxxxxxxxx1xxx
+ stnt1b. */
+ return 2535;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx010xxxxxxxxx1xxx
+ stnt1w. */
+ return 2558;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx110xxxxxxxxx1xxx
+ stnt1w. */
+ return 2559;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx001xxxxxxxxx1xxx
+ stnt1h. */
+ return 2550;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx101xxxxxxxxx1xxx
+ stnt1h. */
+ return 2551;
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx011xxxxxxxxx1xxx
+ stnt1d. */
+ return 2542;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001011xxxxx111xxxxxxxxx1xxx
+ stnt1d. */
+ return 2543;
+ }
+ }
+ }
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001x10xxxxxxxxxxxxxxxx1xxxx
- usmops. */
- return 2387;
- }
- }
- else
- {
- if (((word >> 22) & 0x1) == 0)
- {
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001x01xxxxxxxxxxxxxxxx1xxxx
- fmops. */
- return 2370;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001111xxxxxxxxxxxxxxxx0xxxx
+ umopa. */
+ return 2381;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1x00001111xxxxxxxxxxxxxxxx0xxxx
+ st1q. */
+ return 2407;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx100001x01xxxxxxxxxxxxxxxx1xxxx
+ xxx00001111xxxxxxxxxxxxxxxx1xxxx
umops. */
- return 2382;
+ return 2383;
}
}
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001x11xxxxxxxxxxxxxxxx1xxxx
- umops. */
- return 2383;
- }
}
}
}
@@ -2984,7 +4392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2476;
+ return 2604;
}
else
{
@@ -2992,7 +4400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2484;
+ return 2612;
}
}
else
@@ -3003,7 +4411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2480;
+ return 2608;
}
else
{
@@ -3011,7 +4419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2487;
+ return 2615;
}
}
}
@@ -3049,7 +4457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2536;
+ return 2664;
}
else
{
@@ -3057,7 +4465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2542;
+ return 2670;
}
}
else
@@ -3068,7 +4476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2539;
+ return 2667;
}
else
{
@@ -3076,7 +4484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2545;
+ return 2673;
}
}
}
@@ -3090,7 +4498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2560;
+ return 2688;
}
else
{
@@ -3098,7 +4506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2566;
+ return 2694;
}
}
else
@@ -3109,7 +4517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2563;
+ return 2691;
}
else
{
@@ -3117,7 +4525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2569;
+ return 2697;
}
}
}
@@ -3134,7 +4542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2548;
+ return 2676;
}
else
{
@@ -3142,7 +4550,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2554;
+ return 2682;
}
}
else
@@ -3153,7 +4561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2551;
+ return 2679;
}
else
{
@@ -3161,7 +4569,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2557;
+ return 2685;
}
}
}
@@ -3175,7 +4583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2572;
+ return 2700;
}
else
{
@@ -3183,7 +4591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2578;
+ return 2706;
}
}
else
@@ -3194,7 +4602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2575;
+ return 2703;
}
else
{
@@ -3202,7 +4610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2581;
+ return 2709;
}
}
}
@@ -3267,7 +4675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2477;
+ return 2605;
}
else
{
@@ -3275,7 +4683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2485;
+ return 2613;
}
}
else
@@ -3286,7 +4694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2481;
+ return 2609;
}
else
{
@@ -3294,7 +4702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2488;
+ return 2616;
}
}
}
@@ -3332,7 +4740,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2537;
+ return 2665;
}
else
{
@@ -3340,7 +4748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2543;
+ return 2671;
}
}
else
@@ -3351,7 +4759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2540;
+ return 2668;
}
else
{
@@ -3359,7 +4767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2546;
+ return 2674;
}
}
}
@@ -3373,7 +4781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2561;
+ return 2689;
}
else
{
@@ -3381,7 +4789,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2567;
+ return 2695;
}
}
else
@@ -3392,7 +4800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2564;
+ return 2692;
}
else
{
@@ -3400,7 +4808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2570;
+ return 2698;
}
}
}
@@ -3417,7 +4825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2549;
+ return 2677;
}
else
{
@@ -3425,7 +4833,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2555;
+ return 2683;
}
}
else
@@ -3436,7 +4844,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2552;
+ return 2680;
}
else
{
@@ -3444,7 +4852,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2558;
+ return 2686;
}
}
}
@@ -3458,7 +4866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2573;
+ return 2701;
}
else
{
@@ -3466,7 +4874,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2579;
+ return 2707;
}
}
else
@@ -3477,7 +4885,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2576;
+ return 2704;
}
else
{
@@ -3485,7 +4893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2582;
+ return 2710;
}
}
}
@@ -3553,7 +4961,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2479;
+ return 2607;
}
else
{
@@ -3561,7 +4969,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2486;
+ return 2614;
}
}
else
@@ -3570,7 +4978,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2483;
+ return 2611;
}
}
else
@@ -3581,7 +4989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2478;
+ return 2606;
}
else
{
@@ -3589,7 +4997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2482;
+ return 2610;
}
}
}
@@ -3651,7 +5059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2538;
+ return 2666;
}
else
{
@@ -3659,7 +5067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2632;
+ return 2760;
}
}
else
@@ -3670,7 +5078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2544;
+ return 2672;
}
else
{
@@ -3678,7 +5086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2634;
+ return 2762;
}
}
}
@@ -3692,7 +5100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2541;
+ return 2669;
}
else
{
@@ -3700,7 +5108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2633;
+ return 2761;
}
}
else
@@ -3709,7 +5117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2547;
+ return 2675;
}
}
}
@@ -3725,7 +5133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2562;
+ return 2690;
}
else
{
@@ -3733,7 +5141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2638;
+ return 2766;
}
}
else
@@ -3744,7 +5152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2568;
+ return 2696;
}
else
{
@@ -3752,7 +5160,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2640;
+ return 2768;
}
}
}
@@ -3766,7 +5174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2565;
+ return 2693;
}
else
{
@@ -3774,7 +5182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2639;
+ return 2767;
}
}
else
@@ -3783,7 +5191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2571;
+ return 2699;
}
}
}
@@ -3802,7 +5210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2550;
+ return 2678;
}
else
{
@@ -3810,7 +5218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2635;
+ return 2763;
}
}
else
@@ -3821,7 +5229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2556;
+ return 2684;
}
else
{
@@ -3829,7 +5237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2637;
+ return 2765;
}
}
}
@@ -3843,7 +5251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2553;
+ return 2681;
}
else
{
@@ -3851,7 +5259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2636;
+ return 2764;
}
}
else
@@ -3860,7 +5268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2559;
+ return 2687;
}
}
}
@@ -3876,7 +5284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2574;
+ return 2702;
}
else
{
@@ -3884,7 +5292,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2641;
+ return 2769;
}
}
else
@@ -3895,7 +5303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2580;
+ return 2708;
}
else
{
@@ -3903,7 +5311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2643;
+ return 2771;
}
}
}
@@ -3917,7 +5325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2577;
+ return 2705;
}
else
{
@@ -3925,7 +5333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2642;
+ return 2770;
}
}
else
@@ -3934,7 +5342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2583;
+ return 2711;
}
}
}
@@ -4307,7 +5715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2661;
+ return 2789;
}
else
{
@@ -4325,7 +5733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2664;
+ return 2792;
}
}
}
@@ -4405,7 +5813,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2474;
+ return 2602;
}
else
{
@@ -4413,7 +5821,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2475;
+ return 2603;
}
}
else
@@ -4520,7 +5928,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2666;
+ return 2794;
}
}
}
@@ -4536,7 +5944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2663;
+ return 2791;
}
else
{
@@ -4581,7 +5989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2473;
+ return 2601;
}
else
{
@@ -4675,7 +6083,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2665;
+ return 2793;
}
}
}
@@ -4805,7 +6213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2667;
+ return 2795;
}
}
}
@@ -4821,7 +6229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2662;
+ return 2790;
}
else
{
@@ -5663,7 +7071,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2493;
+ return 2621;
}
}
}
@@ -5737,7 +7145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2494;
+ return 2622;
}
}
}
@@ -8411,7 +9819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2492;
+ return 2620;
}
}
}
@@ -10115,7 +11523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2521;
+ return 2649;
}
}
else
@@ -10358,7 +11766,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2497;
+ return 2625;
}
else
{
@@ -10366,7 +11774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2498;
+ return 2626;
}
}
else
@@ -10598,7 +12006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2518;
+ return 2646;
}
else
{
@@ -10619,7 +12027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2525;
+ return 2653;
}
else
{
@@ -10627,7 +12035,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2524;
+ return 2652;
}
}
else
@@ -10682,7 +12090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2517;
+ return 2645;
}
else
{
@@ -10694,7 +12102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2523;
+ return 2651;
}
else
{
@@ -10702,7 +12110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2522;
+ return 2650;
}
}
else
@@ -10753,7 +12161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2501;
+ return 2629;
}
else
{
@@ -10761,7 +12169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2502;
+ return 2630;
}
}
else
@@ -11120,7 +12528,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2495;
+ return 2623;
}
else
{
@@ -11153,7 +12561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2519;
+ return 2647;
}
else
{
@@ -11183,7 +12591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2496;
+ return 2624;
}
else
{
@@ -11312,7 +12720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2505;
+ return 2633;
}
else
{
@@ -11322,7 +12730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2507;
+ return 2635;
}
else
{
@@ -11330,7 +12738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2509;
+ return 2637;
}
}
}
@@ -11342,7 +12750,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2506;
+ return 2634;
}
else
{
@@ -11352,7 +12760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2508;
+ return 2636;
}
else
{
@@ -11360,7 +12768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2510;
+ return 2638;
}
}
}
@@ -12419,7 +13827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2489;
+ return 2617;
}
else
{
@@ -12427,7 +13835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2491;
+ return 2619;
}
}
else
@@ -12436,7 +13844,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2490;
+ return 2618;
}
}
}
@@ -13932,7 +15340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2499;
+ return 2627;
}
else
{
@@ -13940,7 +15348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2500;
+ return 2628;
}
}
}
@@ -14314,7 +15722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2503;
+ return 2631;
}
else
{
@@ -14322,7 +15730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2504;
+ return 2632;
}
}
}
@@ -15767,7 +17175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2520;
+ return 2648;
}
}
else
@@ -17117,7 +18525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2656;
+ return 2784;
}
else
{
@@ -17697,7 +19105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2584;
+ return 2712;
}
else
{
@@ -17705,7 +19113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2586;
+ return 2714;
}
}
else
@@ -17716,7 +19124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2590;
+ return 2718;
}
else
{
@@ -17724,7 +19132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2592;
+ return 2720;
}
}
}
@@ -17738,7 +19146,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2587;
+ return 2715;
}
else
{
@@ -17746,7 +19154,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2589;
+ return 2717;
}
}
else
@@ -17757,7 +19165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2593;
+ return 2721;
}
else
{
@@ -17765,7 +19173,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2595;
+ return 2723;
}
}
}
@@ -17782,7 +19190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2608;
+ return 2736;
}
else
{
@@ -17790,7 +19198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2610;
+ return 2738;
}
}
else
@@ -17801,7 +19209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2614;
+ return 2742;
}
else
{
@@ -17809,7 +19217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2616;
+ return 2744;
}
}
}
@@ -17823,7 +19231,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2611;
+ return 2739;
}
else
{
@@ -17831,7 +19239,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2613;
+ return 2741;
}
}
else
@@ -17842,7 +19250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2617;
+ return 2745;
}
else
{
@@ -17850,7 +19258,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2619;
+ return 2747;
}
}
}
@@ -17870,7 +19278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2596;
+ return 2724;
}
else
{
@@ -17878,7 +19286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2598;
+ return 2726;
}
}
else
@@ -17889,7 +19297,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2602;
+ return 2730;
}
else
{
@@ -17897,7 +19305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2604;
+ return 2732;
}
}
}
@@ -17911,7 +19319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2599;
+ return 2727;
}
else
{
@@ -17919,7 +19327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2601;
+ return 2729;
}
}
else
@@ -17930,7 +19338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2605;
+ return 2733;
}
else
{
@@ -17938,7 +19346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2607;
+ return 2735;
}
}
}
@@ -17955,7 +19363,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2620;
+ return 2748;
}
else
{
@@ -17963,7 +19371,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2622;
+ return 2750;
}
}
else
@@ -17974,7 +19382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2626;
+ return 2754;
}
else
{
@@ -17982,7 +19390,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2628;
+ return 2756;
}
}
}
@@ -17996,7 +19404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2623;
+ return 2751;
}
else
{
@@ -18004,7 +19412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2625;
+ return 2753;
}
}
else
@@ -18015,7 +19423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2629;
+ return 2757;
}
else
{
@@ -18023,7 +19431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2631;
+ return 2759;
}
}
}
@@ -18057,7 +19465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2585;
+ return 2713;
}
else
{
@@ -18065,7 +19473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2644;
+ return 2772;
}
}
else
@@ -18076,7 +19484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2591;
+ return 2719;
}
else
{
@@ -18084,7 +19492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2646;
+ return 2774;
}
}
}
@@ -18098,7 +19506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2588;
+ return 2716;
}
else
{
@@ -18106,7 +19514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2645;
+ return 2773;
}
}
else
@@ -18115,7 +19523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2594;
+ return 2722;
}
}
}
@@ -18131,7 +19539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2609;
+ return 2737;
}
else
{
@@ -18139,7 +19547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2650;
+ return 2778;
}
}
else
@@ -18150,7 +19558,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2615;
+ return 2743;
}
else
{
@@ -18158,7 +19566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2652;
+ return 2780;
}
}
}
@@ -18172,7 +19580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2612;
+ return 2740;
}
else
{
@@ -18180,7 +19588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2651;
+ return 2779;
}
}
else
@@ -18189,7 +19597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2618;
+ return 2746;
}
}
}
@@ -18208,7 +19616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2597;
+ return 2725;
}
else
{
@@ -18216,7 +19624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2647;
+ return 2775;
}
}
else
@@ -18227,7 +19635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2603;
+ return 2731;
}
else
{
@@ -18235,7 +19643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2649;
+ return 2777;
}
}
}
@@ -18249,7 +19657,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2600;
+ return 2728;
}
else
{
@@ -18257,7 +19665,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2648;
+ return 2776;
}
}
else
@@ -18266,7 +19674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2606;
+ return 2734;
}
}
}
@@ -18282,7 +19690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2621;
+ return 2749;
}
else
{
@@ -18290,7 +19698,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2653;
+ return 2781;
}
}
else
@@ -18301,7 +19709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2627;
+ return 2755;
}
else
{
@@ -18309,7 +19717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2655;
+ return 2783;
}
}
}
@@ -18323,7 +19731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2624;
+ return 2752;
}
else
{
@@ -18331,7 +19739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2654;
+ return 2782;
}
}
else
@@ -18340,7 +19748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2630;
+ return 2758;
}
}
}
@@ -18507,7 +19915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2511;
+ return 2639;
}
}
}
@@ -18540,7 +19948,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2437;
+ return 2565;
}
}
else
@@ -18614,7 +20022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2513;
+ return 2641;
}
}
}
@@ -18647,7 +20055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2514;
+ return 2642;
}
}
else
@@ -18694,7 +20102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2444;
+ return 2572;
}
else
{
@@ -18702,7 +20110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2446;
+ return 2574;
}
}
else
@@ -18713,7 +20121,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2448;
+ return 2576;
}
else
{
@@ -18727,7 +20135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2449;
+ return 2577;
}
else
{
@@ -18735,7 +20143,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2442;
+ return 2570;
}
}
else
@@ -18744,7 +20152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2451;
+ return 2579;
}
}
else
@@ -18757,7 +20165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2450;
+ return 2578;
}
else
{
@@ -18765,7 +20173,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2455;
+ return 2583;
}
}
else
@@ -18774,7 +20182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2452;
+ return 2580;
}
}
}
@@ -18955,7 +20363,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2436;
+ return 2564;
}
}
else
@@ -18986,7 +20394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2512;
+ return 2640;
}
else
{
@@ -19005,7 +20413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2528;
+ return 2656;
}
else
{
@@ -19015,7 +20423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2526;
+ return 2654;
}
else
{
@@ -19025,7 +20433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2533;
+ return 2661;
}
else
{
@@ -19033,7 +20441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2532;
+ return 2660;
}
}
}
@@ -19617,7 +21025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2529;
+ return 2657;
}
else
{
@@ -19625,7 +21033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2530;
+ return 2658;
}
}
}
@@ -19943,7 +21351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2447;
+ return 2575;
}
}
else
@@ -20554,7 +21962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2440;
+ return 2568;
}
}
}
@@ -20606,7 +22014,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2453;
+ return 2581;
}
}
}
@@ -20849,7 +22257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2443;
+ return 2571;
}
}
else
@@ -20925,7 +22333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2456;
+ return 2584;
}
}
else
@@ -21751,7 +23159,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2441;
+ return 2569;
}
}
else
@@ -21783,7 +23191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2454;
+ return 2582;
}
}
else
@@ -22023,7 +23431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2445;
+ return 2573;
}
}
else
@@ -22055,7 +23463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2459;
+ return 2587;
}
else
{
@@ -22063,7 +23471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2463;
+ return 2591;
}
}
}
@@ -22085,7 +23493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2460;
+ return 2588;
}
else
{
@@ -22093,7 +23501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2464;
+ return 2592;
}
}
}
@@ -22132,7 +23540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2457;
+ return 2585;
}
else
{
@@ -22140,7 +23548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2461;
+ return 2589;
}
}
else
@@ -22162,7 +23570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2458;
+ return 2586;
}
else
{
@@ -22170,7 +23578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2462;
+ return 2590;
}
}
else
@@ -23978,7 +25386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2465;
+ return 2593;
}
else
{
@@ -23986,7 +25394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2469;
+ return 2597;
}
}
else
@@ -24008,7 +25416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2466;
+ return 2594;
}
else
{
@@ -24016,7 +25424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2470;
+ return 2598;
}
}
else
@@ -24522,7 +25930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2467;
+ return 2595;
}
else
{
@@ -24530,7 +25938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2471;
+ return 2599;
}
}
}
@@ -24552,7 +25960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2468;
+ return 2596;
}
else
{
@@ -24560,7 +25968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2472;
+ return 2600;
}
}
}
@@ -24616,7 +26024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2439;
+ return 2567;
}
else
{
@@ -24624,7 +26032,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2438;
+ return 2566;
}
}
}
@@ -24727,7 +26135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2516;
+ return 2644;
}
else
{
@@ -24735,7 +26143,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2515;
+ return 2643;
}
}
else
@@ -24746,7 +26154,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2527;
+ return 2655;
}
else
{
@@ -24756,7 +26164,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2535;
+ return 2663;
}
else
{
@@ -24764,7 +26172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2534;
+ return 2662;
}
}
}
@@ -25253,24 +26661,24 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
{
case 2389: value = 2391; break; /* mov --> mova. */
case 2391: return NULL; /* mova --> NULL. */
- case 2426: value = 2434; break; /* mov --> mova. */
- case 2434: return NULL; /* mova --> NULL. */
- case 2424: value = 2432; break; /* mov --> mova. */
- case 2432: return NULL; /* mova --> NULL. */
- case 2427: value = 2435; break; /* mov --> mova. */
- case 2435: return NULL; /* mova --> NULL. */
- case 2425: value = 2433; break; /* mov --> mova. */
- case 2433: return NULL; /* mova --> NULL. */
+ case 2490: value = 2498; break; /* mov --> mova. */
+ case 2498: return NULL; /* mova --> NULL. */
+ case 2488: value = 2496; break; /* mov --> mova. */
+ case 2496: return NULL; /* mova --> NULL. */
+ case 2491: value = 2499; break; /* mov --> mova. */
+ case 2499: return NULL; /* mova --> NULL. */
+ case 2489: value = 2497; break; /* mov --> mova. */
+ case 2497: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2422: value = 2430; break; /* mov --> mova. */
- case 2430: return NULL; /* mova --> NULL. */
- case 2420: value = 2428; break; /* mov --> mova. */
- case 2428: return NULL; /* mova --> NULL. */
- case 2423: value = 2431; break; /* mov --> mova. */
- case 2431: return NULL; /* mova --> NULL. */
- case 2421: value = 2429; break; /* mov --> mova. */
- case 2429: return NULL; /* mova --> NULL. */
+ case 2486: value = 2494; break; /* mov --> mova. */
+ case 2494: return NULL; /* mova --> NULL. */
+ case 2484: value = 2492; break; /* mov --> mova. */
+ case 2492: return NULL; /* mova --> NULL. */
+ case 2487: value = 2495; break; /* mov --> mova. */
+ case 2495: return NULL; /* mova --> NULL. */
+ case 2485: value = 2493; break; /* mov --> mova. */
+ case 2493: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -25292,11 +26700,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2657; break; /* addg --> smax. */
- case 2657: value = 2658; break; /* smax --> umax. */
- case 2658: value = 2659; break; /* umax --> smin. */
- case 2659: value = 2660; break; /* smin --> umin. */
- case 2660: return NULL; /* umin --> NULL. */
+ case 19: value = 2785; break; /* addg --> smax. */
+ case 2785: value = 2786; break; /* smax --> umax. */
+ case 2786: value = 2787; break; /* umax --> smin. */
+ case 2787: value = 2788; break; /* smin --> umin. */
+ case 2788: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -25454,8 +26862,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2531; break; /* fcvt --> bfcvt. */
- case 2531: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2659; break; /* fcvt --> bfcvt. */
+ case 2659: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -25962,9 +27370,10 @@ aarch64_extract_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 218:
- case 219:
- case 224:
+ case 220:
+ case 221:
+ case 226:
+ case 227:
return aarch64_ext_regno (self, info, code, inst, errors);
case 10:
return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -25980,7 +27389,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 234:
+ case 237:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -26026,10 +27435,10 @@ aarch64_extract_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 225:
- case 233:
- case 238:
- case 239:
+ case 228:
+ case 236:
+ case 241:
+ case 242:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -26196,26 +27605,29 @@ aarch64_extract_operand (const aarch64_operand *self,
case 216:
case 217:
return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
- case 220:
+ case 218:
+ case 219:
+ return aarch64_ext_sve_strided_reglist (self, info, code, inst, errors);
case 222:
- case 226:
+ case 224:
+ case 229:
return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
- case 221:
case 223:
+ case 225:
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 227:
- case 228:
- case 229:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 230:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 231:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 232:
- return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
+ case 233:
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 234:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 235:
- case 236:
- case 237:
+ return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 238:
+ case 239:
+ case 240:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 7b2cf3130c4..29b12d238e2 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -279,7 +279,8 @@ aarch64_ext_regno (const aarch64_operand *self, aarch64_opnd_info *info,
const aarch64_inst *inst ATTRIBUTE_UNUSED,
aarch64_operand_error *errors ATTRIBUTE_UNUSED)
{
- info->reg.regno = extract_field (self->fields[0], code, 0);
+ info->reg.regno = (extract_field (self->fields[0], code, 0)
+ + get_operand_specific_data (self));
return true;
}
@@ -2039,6 +2040,24 @@ aarch64_ext_sve_reglist (const aarch64_operand *self,
return true;
}
+/* Decode a strided register list. The first field holds the top bit
+ (0 or 16) and the second field holds the lower bits. The stride is
+ 16 divided by the list length. */
+bool
+aarch64_ext_sve_strided_reglist (const aarch64_operand *self,
+ aarch64_opnd_info *info, aarch64_insn code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors
+ ATTRIBUTE_UNUSED)
+{
+ unsigned int upper = extract_field (self->fields[0], code, 0);
+ unsigned int lower = extract_field (self->fields[1], code, 0);
+ info->reglist.first_regno = upper * 16 + lower;
+ info->reglist.num_regs = get_operand_specific_data (self);
+ info->reglist.stride = 16 / info->reglist.num_regs;
+ return true;
+}
+
/* Decode <pattern>{, MUL #<amount>}. The fields array specifies which
fields to use for <pattern>. <amount> - 1 is encoded in the SVE_imm4
field. */
diff --git a/opcodes/aarch64-dis.h b/opcodes/aarch64-dis.h
index 1d459858e0d..98b6b371803 100644
--- a/opcodes/aarch64-dis.h
+++ b/opcodes/aarch64-dis.h
@@ -120,6 +120,7 @@ AARCH64_DECL_OPD_EXTRACTOR (ext_sve_index);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_limm_mov);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_quad_index);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_reglist);
+AARCH64_DECL_OPD_EXTRACTOR (ext_sve_strided_reglist);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_scale);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_shlimm);
AARCH64_DECL_OPD_EXTRACTOR (ext_sve_shrimm);
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index f1103efd23f..1faa900b245 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -242,6 +242,8 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn4}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn2}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn4}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Ztx2_STRIDED", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZtT, FLD_SME_Zt3}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Ztx4_STRIDED", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZtT, FLD_SME_Zt2}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_ZAda_2b", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZAda_2b}, "an SME ZA tile ZA0-ZA3"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_ZAda_3b", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZAda_3b}, "an SME ZA tile ZA0-ZA7"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_src", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_5}, "an SME horizontal or vertical vector access register"},
@@ -249,6 +251,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_dest", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_destxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_V,FLD_SME_Rv,FLD_imm3_0}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_PRED_REG, "SME_Pm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Pm}, "an SVE predicate register"},
+ {AARCH64_OPND_CLASS_PRED_REG, "SME_PNg3", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pg3}, "an SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index b3308955cc8..66c9d65d16e 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -231,6 +231,9 @@ const aarch64_field fields[] =
{ 2, 3 }, /* SME_Zdn4: Z0-Z31, multiple of 4, bits [4:2]. */
{ 6, 4 }, /* SME_Zn2: Z0-Z31, multiple of 2, bits [9:6]. */
{ 7, 3 }, /* SME_Zn4: Z0-Z31, multiple of 4, bits [9:7]. */
+ { 4, 1 }, /* SME_ZtT: upper bit of Zt, bit [4]. */
+ { 0, 3 }, /* SME_Zt3: lower 3 bits of Zt, bits [2:0]. */
+ { 0, 2 }, /* SME_Zt2: lower 2 bits of Zt, bits [1:0]. */
{ 23, 1 }, /* SME_i1: immediate field, bit 23. */
{ 22, 2 }, /* SME_size_22: size<1>, size<0> class field, [23:22]. */
{ 22, 1 }, /* SME_tszh: immediate and qualifier field, bit 22. */
@@ -1748,6 +1751,22 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
}
break;
+ case AARCH64_OPND_SME_Ztx2_STRIDED:
+ case AARCH64_OPND_SME_Ztx4_STRIDED:
+ /* 2-register lists have a stride of 8 and 4-register lists
+ have a stride of 4. */
+ num = get_operand_specific_data (&aarch64_operands[type]);
+ if (!check_reglist (opnd, mismatch_detail, idx, num, 16 / num))
+ return 0;
+ num = 16 | (opnd->reglist.stride - 1);
+ if ((opnd->reglist.first_regno & ~num) != 0)
+ {
+ set_other_error (mismatch_detail, idx,
+ _("start register out of range"));
+ return 0;
+ }
+ break;
+
case AARCH64_OPND_SVE_ZnxN:
case AARCH64_OPND_SVE_ZtxN:
num = get_opcode_dependent_value (opcode);
@@ -1804,11 +1823,24 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
break;
case AARCH64_OPND_CLASS_PRED_REG:
- if (opnd->reg.regno >= 8
- && get_operand_fields_width (get_operand_from_code (type)) == 3)
+ switch (type)
{
- set_invalid_regno_error (mismatch_detail, idx, "p", 0, 7);
- return 0;
+ case AARCH64_OPND_SME_PNg3:
+ if (opnd->reg.regno < 8)
+ {
+ set_invalid_regno_error (mismatch_detail, idx, "pn", 8, 15);
+ return 0;
+ }
+ break;
+
+ default:
+ if (opnd->reg.regno >= 8
+ && get_operand_fields_width (get_operand_from_code (type)) == 3)
+ {
+ set_invalid_regno_error (mismatch_detail, idx, "p", 0, 7);
+ return 0;
+ }
+ break;
}
break;
@@ -3742,9 +3774,15 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_PNg4_10:
case AARCH64_OPND_SVE_PNn:
case AARCH64_OPND_SVE_PNt:
+ case AARCH64_OPND_SME_PNg3:
if (opnd->qualifier == AARCH64_OPND_QLF_NIL)
snprintf (buf, size, "%s",
style_reg (styler, "pn%d", opnd->reg.regno));
+ else if (opnd->qualifier == AARCH64_OPND_QLF_P_Z
+ || opnd->qualifier == AARCH64_OPND_QLF_P_M)
+ snprintf (buf, size, "%s",
+ style_reg (styler, "pn%d/%s", opnd->reg.regno,
+ aarch64_get_qualifier_name (opnd->qualifier)));
else
snprintf (buf, size, "%s",
style_reg (styler, "pn%d.%s", opnd->reg.regno,
@@ -3772,6 +3810,8 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SME_Zdnx4:
case AARCH64_OPND_SME_Znx2:
case AARCH64_OPND_SME_Znx4:
+ case AARCH64_OPND_SME_Ztx2_STRIDED:
+ case AARCH64_OPND_SME_Ztx4_STRIDED:
print_register_list (buf, size, opnd, "z", styler);
break;
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index c604af5124c..4b9a27b212d 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -59,6 +59,9 @@ enum aarch64_field_kind
FLD_SME_Zdn4,
FLD_SME_Zn2,
FLD_SME_Zn4,
+ FLD_SME_ZtT,
+ FLD_SME_Zt3,
+ FLD_SME_Zt2,
FLD_SME_i1,
FLD_SME_size_22,
FLD_SME_tszh,
@@ -227,10 +230,10 @@ verify_constraints (const struct aarch64_inst *, const aarch64_insn, bfd_vma,
value by 2 to get the value
of an immediate operand. */
#define OPD_F_MAYBE_SP 0x00000010 /* May potentially be SP. */
-#define OPD_F_OD_MASK 0x000000e0 /* Operand-dependent data. */
+#define OPD_F_OD_MASK 0x000001e0 /* Operand-dependent data. */
#define OPD_F_OD_LSB 5
-#define OPD_F_NO_ZR 0x00000100 /* ZR index not allowed. */
-#define OPD_F_SHIFT_BY_4 0x00000200 /* Need to left shift the field
+#define OPD_F_NO_ZR 0x00000200 /* ZR index not allowed. */
+#define OPD_F_SHIFT_BY_4 0x00000400 /* Need to left shift the field
value by 4 to get the value
of an immediate operand. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 93e124906d8..babf5613da9 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5286,6 +5286,70 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_PNd, SVE_PNg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
/* SME2 extensions to SME. */
+ SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ld1b", 0xa0408000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ld1b", 0xa1400000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ld1b", 0xa1408000, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ld1b", 0xa0000000, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ld1b", 0xa0008000, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ld1b", 0xa1000000, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ld1b", 0xa1008000, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ld1d", 0xa0406000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ld1d", 0xa040e000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ld1d", 0xa1406000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ld1d", 0xa140e000, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ld1d", 0xa0006000, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ld1d", 0xa000e000, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ld1d", 0xa1006000, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ld1d", 0xa100e000, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ld1h", 0xa0402000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ld1h", 0xa040a000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ld1h", 0xa1402000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ld1h", 0xa140a000, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ld1h", 0xa0002000, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ld1h", 0xa000a000, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ld1h", 0xa1002000, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ld1h", 0xa100a000, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ld1w", 0xa0404000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ld1w", 0xa040c000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ld1w", 0xa1404000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ld1w", 0xa140c000, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ld1w", 0xa0004000, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ld1w", 0xa000c000, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ld1w", 0xa1004000, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ld1w", 0xa100c000, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldnt1b", 0xa0400001, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ldnt1b", 0xa0408001, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ldnt1b", 0xa1400008, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ldnt1b", 0xa1408008, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ldnt1b", 0xa0000001, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ldnt1b", 0xa0008001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ldnt1b", 0xa1000008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ldnt1b", 0xa1008008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR), OP_SVE_BZU, 0, 0),
+ SME2_INSN ("ldnt1d", 0xa0406001, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ldnt1d", 0xa040e001, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ldnt1d", 0xa1406008, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ldnt1d", 0xa140e008, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ldnt1d", 0xa0006001, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ldnt1d", 0xa000e001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ldnt1d", 0xa1006008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ldnt1d", 0xa100e008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DZU, 0, 0),
+ SME2_INSN ("ldnt1h", 0xa0402001, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ldnt1h", 0xa040a001, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ldnt1h", 0xa1402008, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ldnt1h", 0xa140a008, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ldnt1h", 0xa0002001, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ldnt1h", 0xa000a001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ldnt1h", 0xa1002008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ldnt1h", 0xa100a008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HZU, 0, 0),
+ SME2_INSN ("ldnt1w", 0xa0404001, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldnt1w", 0xa040c001, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldnt1w", 0xa1404008, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldnt1w", 0xa140c008, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldnt1w", 0xa0004001, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldnt1w", 0xa000c001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldnt1w", 0xa1004008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldnt1w", 0xa100c008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
SME2_INSN ("mov", 0xc0060800, 0xffff9f01, sme2_mov, 0, OP2 (SME_Zdnx2, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (2), 0),
SME2_INSN ("mov", 0xc0060c00, 0xffff9f03, sme2_mov, 0, OP2 (SME_Zdnx4, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (4), 0),
SME2_INSN ("mov", 0xc0060000, 0xff3f1f01, sme_size_22, 0, OP2 (SME_Zdnx2, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (2), 0),
@@ -5302,6 +5366,70 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("mova", 0xc0040c00, 0xffff9c78, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VV_BHSD, F_OD (4), 0),
SME2_INSN ("mova", 0xc0040000, 0xff3f1c38, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx2), OP_SVE_VV_BHSDQ, F_OD (2), 0),
SME2_INSN ("mova", 0xc0040400, 0xff3f1c78, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx4), OP_SVE_VV_BHSDQ, F_OD (4), 0),
+ SME2_INSN ("st1b", 0xa0600000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("st1b", 0xa0608000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("st1b", 0xa1600000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("st1b", 0xa1608000, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("st1b", 0xa0200000, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("st1b", 0xa0208000, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("st1b", 0xa1200000, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("st1b", 0xa1208000, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("st1d", 0xa0606000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("st1d", 0xa060e000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("st1d", 0xa1606000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("st1d", 0xa160e000, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("st1d", 0xa0206000, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("st1d", 0xa020e000, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("st1d", 0xa1206000, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("st1d", 0xa120e000, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("st1h", 0xa0602000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("st1h", 0xa060a000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("st1h", 0xa1602000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("st1h", 0xa160a000, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("st1h", 0xa0202000, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("st1h", 0xa020a000, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("st1h", 0xa1202000, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("st1h", 0xa120a000, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("st1w", 0xa0604000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("st1w", 0xa060c000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("st1w", 0xa1604000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("st1w", 0xa160c000, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("st1w", 0xa0204000, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("st1w", 0xa020c000, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("st1w", 0xa1204000, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("st1w", 0xa120c000, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("stnt1b", 0xa0600001, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("stnt1b", 0xa0608001, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("stnt1b", 0xa1600008, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("stnt1b", 0xa1608008, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("stnt1b", 0xa0200001, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("stnt1b", 0xa0208001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("stnt1b", 0xa1200008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("stnt1b", 0xa1208008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR), OP_SVE_BUU, 0, 0),
+ SME2_INSN ("stnt1d", 0xa0606001, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("stnt1d", 0xa060e001, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("stnt1d", 0xa1606008, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("stnt1d", 0xa160e008, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("stnt1d", 0xa0206001, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("stnt1d", 0xa020e001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("stnt1d", 0xa1206008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("stnt1d", 0xa120e008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL3), OP_SVE_DUU, 0, 0),
+ SME2_INSN ("stnt1h", 0xa0602001, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("stnt1h", 0xa060a001, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("stnt1h", 0xa1602008, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("stnt1h", 0xa160a008, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("stnt1h", 0xa0202001, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("stnt1h", 0xa020a001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("stnt1h", 0xa1202008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("stnt1h", 0xa120a008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL1), OP_SVE_HUU, 0, 0),
+ SME2_INSN ("stnt1w", 0xa0604001, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("stnt1w", 0xa060c001, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("stnt1w", 0xa1604008, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("stnt1w", 0xa160c008, 0xfff0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("stnt1w", 0xa0204001, 0xffe0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("stnt1w", 0xa020c001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("stnt1w", 0xa1204008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("stnt1w", 0xa120c008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
/* SIMD Dot Product (optional in v8.2-A). */
DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
@@ -5950,6 +6078,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
F(FLD_SME_Zn2), "a list of SVE vector registers") \
Y(SVE_REGLIST, sve_aligned_reglist, "SME_Znx4", 4 << OPD_F_OD_LSB, \
F(FLD_SME_Zn4), "a list of SVE vector registers") \
+ Y(SVE_REGLIST, sve_strided_reglist, "SME_Ztx2_STRIDED", \
+ 2 << OPD_F_OD_LSB, F(FLD_SME_ZtT, FLD_SME_Zt3), \
+ "a list of SVE vector registers") \
+ Y(SVE_REGLIST, sve_strided_reglist, "SME_Ztx4_STRIDED", \
+ 4 << OPD_F_OD_LSB, F(FLD_SME_ZtT, FLD_SME_Zt2), \
+ "a list of SVE vector registers") \
Y(SVE_REG, regno, "SME_ZAda_2b", 0, F(FLD_SME_ZAda_2b), \
"an SME ZA tile ZA0-ZA3") \
Y(SVE_REG, regno, "SME_ZAda_3b", 0, F(FLD_SME_ZAda_3b), \
@@ -5968,6 +6102,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
"an SME horizontal or vertical vector access register") \
Y(PRED_REG, regno, "SME_Pm", 0, F(FLD_SME_Pm), \
"an SVE predicate register") \
+ Y(PRED_REG, regno, "SME_PNg3", 8 << OPD_F_OD_LSB, F(FLD_SVE_Pg3), \
+ "an SVE predicate-as-counter register") \
Y(SVE_REG, imm, "SME_list_of_64bit_tiles", 0, \
F(FLD_SME_zero_mask), "a list of 64-bit ZA element tiles") \
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 09/31] aarch64: Add the SME2 predicate-related instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (7 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 08/31] aarch64: Add the SME2 multivector LD1 and ST1 instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 10/31] aarch64: Add the SME2 ZT0 instructions Richard Sandiford
` (23 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
Implementation-wise, the main things to note here are:
- the WHILE* instructions have forms that return a pair of predicate
registers. This is the first time that we've had lists of predicate
registers, and they wrap around after register 15 rather than after
register 31.
- the predicate-as-counter WHILE* instructions have a fourth operand
that specifies the vector length. We can treat this as an enumeration,
except that immediate values aren't allowed.
- PEXT takes an unsuffixed predicate index of the form PN<n>[<imm>].
This is the first instance of a vector/predicate index having
no suffix.
---
gas/config/tc-aarch64.c | 85 +-
gas/testsuite/gas/aarch64/illegal-sve2.l | 16 +-
gas/testsuite/gas/aarch64/sme-9.d | 4 +-
gas/testsuite/gas/aarch64/sme2-6-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-6-invalid.l | 139 ++
gas/testsuite/gas/aarch64/sme2-6-invalid.s | 92 +
gas/testsuite/gas/aarch64/sme2-6-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-6-noarch.l | 145 ++
gas/testsuite/gas/aarch64/sme2-6.d | 153 ++
gas/testsuite/gas/aarch64/sme2-6.s | 164 ++
gas/testsuite/gas/aarch64/sme2-7-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-7-invalid.l | 20 +
gas/testsuite/gas/aarch64/sme2-7-invalid.s | 14 +
gas/testsuite/gas/aarch64/sme2-7-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-7-noarch.l | 321 +++
gas/testsuite/gas/aarch64/sme2-7.d | 329 +++
gas/testsuite/gas/aarch64/sme2-7.s | 351 ++++
.../gas/aarch64/sve2-sme2-1-invalid.l | 3 +
.../gas/aarch64/sve2-sme2-1-invalid.s | 4 +
.../gas/aarch64/sve2-sme2-2-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-2-invalid.l | 25 +
.../gas/aarch64/sve2-sme2-2-invalid.s | 12 +
.../gas/aarch64/sve2-sme2-2-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-2-noarch.l | 257 +++
gas/testsuite/gas/aarch64/sve2-sme2-2.d | 265 +++
gas/testsuite/gas/aarch64/sve2-sme2-2.s | 287 +++
include/opcode/aarch64.h | 11 +
opcodes/aarch64-asm-2.c | 51 +-
opcodes/aarch64-asm.c | 33 +-
opcodes/aarch64-asm.h | 1 +
opcodes/aarch64-dis-2.c | 1831 ++++++++++-------
opcodes/aarch64-dis.c | 33 +-
opcodes/aarch64-dis.h | 1 +
opcodes/aarch64-opc-2.c | 10 +
opcodes/aarch64-opc.c | 62 +-
opcodes/aarch64-opc.h | 9 +
opcodes/aarch64-tbl.h | 60 +
37 files changed, 3961 insertions(+), 845 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-6-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-6-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-6-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-6-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-6-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-6.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-6.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-7-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-7-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-7-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-7-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-7-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-7.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-7.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index a61ad5dab15..a433925e320 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -474,6 +474,8 @@ get_reg_expected_msg (unsigned int mask, unsigned int seen)
PN is expected, and vice versa, so the issue at this point is
"predicate-like" vs. "not predicate-like". */
return N_("expected an SVE predicate register at operand %d");
+ if (mask == reg_type_masks[REG_TYPE_PN])
+ return N_("expected an SVE predicate-as-counter register at operand %d");
if (mask == reg_type_masks[REG_TYPE_VZ])
return N_("expected a vector register at operand %d");
if (mask == reg_type_masks[REG_TYPE_ZP])
@@ -1277,7 +1279,7 @@ parse_typed_reg (char **ccp, aarch64_reg_type type,
if (!(flags & PTR_FULL_REG) && skip_past_char (&str, '['))
{
/* Reject Sn[index] syntax. */
- if (!is_typed_vecreg)
+ if (reg->type != REG_TYPE_PN && !is_typed_vecreg)
{
first_error (_("this type of register can't be indexed"));
return NULL;
@@ -1344,6 +1346,14 @@ eq_vector_type_el (struct vector_type_el e1, struct vector_type_el e2)
&& e1.index == e2.index);
}
+/* Return the register number mask for registers of type REG_TYPE. */
+
+static inline int
+reg_type_mask (aarch64_reg_type reg_type)
+{
+ return reg_type == REG_TYPE_P ? 15 : 31;
+}
+
/* This function parses a list of vector registers of type TYPE.
On success, it returns the parsed register list information in the
following encoded format:
@@ -1372,7 +1382,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type,
char *str = *ccp;
int nb_regs;
struct vector_type_el typeinfo, typeinfo_first;
- int val, val_range;
+ int val, val_range, mask;
int in_range;
int ret_val;
bool error = false;
@@ -1396,6 +1406,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type,
val = -1;
val_range = -1;
in_range = 0;
+ mask = reg_type_mask (type);
do
{
if (in_range)
@@ -1431,7 +1442,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type,
(_("invalid range in vector register list"));
error = true;
}
- val_range = (val_range + 1) & 0x1f;
+ val_range = (val_range + 1) & mask;
}
else
{
@@ -1452,7 +1463,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type,
nb_regs++;
if (val_range == val)
break;
- val_range = (val_range + 1) & 0x1f;
+ val_range = (val_range + 1) & mask;
}
in_range = 0;
ptr_flags |= PTR_GOOD_MATCH;
@@ -4316,8 +4327,10 @@ parse_adrp (char **str)
/* Parse a symbolic operand such as "pow2" at *STR. ARRAY is an array
of SIZE tokens in which index I gives the token for field value I,
- or is null if field value I is invalid. REG_TYPE says which register
- names should be treated as registers rather than as symbolic immediates.
+ or is null if field value I is invalid. If the symbolic operand
+ can also be given as a 0-based integer, REG_TYPE says which register
+ names should be treated as registers rather than as symbolic immediates
+ while parsing that integer. REG_TYPE is REG_TYPE_MAX otherwise.
Return true on success, moving *STR past the operand and storing the
field value in *VAL. */
@@ -4345,6 +4358,9 @@ parse_enum_string (char **str, int64_t *val, const char *const *array,
return true;
}
+ if (reg_type == REG_TYPE_MAX)
+ return false;
+
if (!parse_immediate_expression (&p, &exp, reg_type))
return false;
@@ -4971,6 +4987,12 @@ parse_sys_ins_reg (char **str, htab_t sys_ins_regs)
goto failure; \
} while (0)
+#define po_strict_enum_or_fail(array) do { \
+ if (!parse_enum_string (&str, &val, array, \
+ ARRAY_SIZE (array), REG_TYPE_MAX)) \
+ goto failure; \
+ } while (0)
+
#define po_misc_or_fail(expr) do { \
if (!expr) \
goto failure; \
@@ -6445,16 +6467,18 @@ ldst_lo12_determine_real_reloc_type (void)
return reloc_ldst_lo12[inst.reloc.type - BFD_RELOC_AARCH64_LDST_LO12][logsz];
}
-/* Check whether a register list REGINFO is valid. The registers must be
- numbered in increasing order (modulo 32). They must also have a
- consistent stride.
+/* Check whether a register list REGINFO is valid. The registers have type
+ REG_TYPE and must be numbered in increasing order (modulo the register
+ bank size). They must have a consistent stride.
Return true if the list is valid, describing it in LIST if so. */
static bool
-reg_list_valid_p (uint32_t reginfo, struct aarch64_reglist *list)
+reg_list_valid_p (uint32_t reginfo, struct aarch64_reglist *list,
+ aarch64_reg_type reg_type)
{
- uint32_t i, nb_regs, prev_regno, incr;
+ uint32_t i, nb_regs, prev_regno, incr, mask;
+ mask = reg_type_mask (reg_type);
nb_regs = 1 + (reginfo & 0x3);
reginfo >>= 2;
@@ -6469,7 +6493,7 @@ reg_list_valid_p (uint32_t reginfo, struct aarch64_reglist *list)
uint32_t curr_regno, curr_incr;
reginfo >>= 5;
curr_regno = reginfo & 0x1f;
- curr_incr = (curr_regno - prev_regno) & 0x1f;
+ curr_incr = (curr_regno - prev_regno) & mask;
if (curr_incr == 0)
return false;
else if (i == 1)
@@ -6638,7 +6662,9 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_PNg4_10:
case AARCH64_OPND_SVE_PNn:
case AARCH64_OPND_SVE_PNt:
+ case AARCH64_OPND_SME_PNd3:
case AARCH64_OPND_SME_PNg3:
+ case AARCH64_OPND_SME_PNn:
reg_type = REG_TYPE_PN;
goto vector_reg;
@@ -6723,6 +6749,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_ZtxN:
case AARCH64_OPND_SME_Zdnx2:
case AARCH64_OPND_SME_Zdnx4:
+ case AARCH64_OPND_SME_Zmx2:
+ case AARCH64_OPND_SME_Zmx4:
case AARCH64_OPND_SME_Znx2:
case AARCH64_OPND_SME_Znx4:
case AARCH64_OPND_SME_Ztx2_STRIDED:
@@ -6730,6 +6758,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
reg_type = REG_TYPE_Z;
goto vector_reg_list;
+ case AARCH64_OPND_SME_Pdx2:
+ case AARCH64_OPND_SME_PdxN:
+ reg_type = REG_TYPE_P;
+ goto vector_reg_list;
+
case AARCH64_OPND_LVn:
case AARCH64_OPND_LVt:
case AARCH64_OPND_LVt_AL:
@@ -6753,7 +6786,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
if (val == PARSE_FAIL)
goto failure;
- if (! reg_list_valid_p (val, &info->reglist))
+ if (! reg_list_valid_p (val, &info->reglist, reg_type))
{
set_fatal_syntax_error (_("invalid register list"));
goto failure;
@@ -6779,7 +6812,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
goto failure;
if (!(vectype.defined & NTA_HASTYPE))
{
- if (reg_type == REG_TYPE_Z)
+ if (reg_type == REG_TYPE_Z || reg_type == REG_TYPE_P)
set_fatal_syntax_error (_("missing type suffix"));
goto failure;
}
@@ -7707,6 +7740,24 @@ parse_operands (char *str, const aarch64_opcode *opcode)
goto failure;
break;
+ case AARCH64_OPND_SME_PNn3_INDEX1:
+ case AARCH64_OPND_SME_PNn3_INDEX2:
+ reg = aarch64_reg_parse (&str, REG_TYPE_PN, &vectype);
+ if (!reg)
+ goto failure;
+ if (!(vectype.defined & NTA_HASINDEX))
+ {
+ set_syntax_error (_("missing register index"));
+ goto failure;
+ }
+ info->reglane.regno = reg->number;
+ info->reglane.index = vectype.index;
+ if (vectype.type == NT_invtype)
+ info->qualifier = AARCH64_OPND_QLF_NIL;
+ else
+ info->qualifier = vectype_to_qualifier (&vectype);
+ break;
+
case AARCH64_OPND_BTI_TARGET:
val = parse_bti_operand (&str, &(info->hint_option));
if (val == PARSE_FAIL)
@@ -7753,6 +7804,12 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->qualifier = qualifier;
break;
+ case AARCH64_OPND_SME_VLxN_10:
+ case AARCH64_OPND_SME_VLxN_13:
+ po_strict_enum_or_fail (aarch64_sme_vlxn_array);
+ info->imm.value = val;
+ break;
+
case AARCH64_OPND_MOPS_ADDR_Rd:
case AARCH64_OPND_MOPS_ADDR_Rs:
po_char_or_fail ('[');
diff --git a/gas/testsuite/gas/aarch64/illegal-sve2.l b/gas/testsuite/gas/aarch64/illegal-sve2.l
index f07ef384f94..5f43b56df14 100644
--- a/gas/testsuite/gas/aarch64/illegal-sve2.l
+++ b/gas/testsuite/gas/aarch64/illegal-sve2.l
@@ -3139,7 +3139,7 @@
[^ :]+:[0-9]+: Info: other valid variant\(s\):
[^ :]+:[0-9]+: Info: usubwt z0\.s, z0\.s, z0\.h
[^ :]+:[0-9]+: Info: usubwt z0\.d, z0\.d, z0\.s
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilege p16\.b,x0,x0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilege p16\.b,x0,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege p0\.b,x32,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege p0\.b,x0,x32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilege p0/m,x0,x0'
@@ -3165,7 +3165,7 @@
[^ :]+:[0-9]+: Info: whilege p0\.h, x0, x0
[^ :]+:[0-9]+: Info: whilege p0\.s, x0, x0
[^ :]+:[0-9]+: Info: whilege p0\.d, x0, x0
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilege p16\.b,w0,w0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilege p16\.b,w0,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege p0\.b,w32,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege p0\.b,w0,w32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilege p0/m,w0,w0'
@@ -3177,7 +3177,7 @@
[^ :]+:[0-9]+: Info: whilege p0\.d, w0, w0
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege p0\.b,w31,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege p0\.b,w0,w31'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilegt p16\.b,x0,x0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilegt p16\.b,x0,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilegt p0\.b,x32,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilegt p0\.b,x0,x32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilegt p0/m,x0,x0'
@@ -3203,7 +3203,7 @@
[^ :]+:[0-9]+: Info: whilegt p0\.h, x0, x0
[^ :]+:[0-9]+: Info: whilegt p0\.s, x0, x0
[^ :]+:[0-9]+: Info: whilegt p0\.d, x0, x0
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilegt p16\.b,w0,w0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilegt p16\.b,w0,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilegt p0\.b,w32,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilegt p0\.b,w0,w32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilegt p0/m,w0,w0'
@@ -3215,7 +3215,7 @@
[^ :]+:[0-9]+: Info: whilegt p0\.d, w0, w0
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilegt p0\.b,w31,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilegt p0\.b,w0,w31'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilehi p16\.b,x0,x0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilehi p16\.b,x0,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehi p0\.b,x32,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehi p0\.b,x0,x32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilehi p0/m,x0,x0'
@@ -3241,7 +3241,7 @@
[^ :]+:[0-9]+: Info: whilehi p0\.h, x0, x0
[^ :]+:[0-9]+: Info: whilehi p0\.s, x0, x0
[^ :]+:[0-9]+: Info: whilehi p0\.d, x0, x0
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilehi p16\.b,w0,w0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilehi p16\.b,w0,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehi p0\.b,w32,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehi p0\.b,w0,w32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilehi p0/m,w0,w0'
@@ -3253,7 +3253,7 @@
[^ :]+:[0-9]+: Info: whilehi p0\.d, w0, w0
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehi p0\.b,w31,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehi p0\.b,w0,w31'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilehs p16\.b,x0,x0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilehs p16\.b,x0,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehs p0\.b,x32,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehs p0\.b,x0,x32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilehs p0/m,x0,x0'
@@ -3279,7 +3279,7 @@
[^ :]+:[0-9]+: Info: whilehs p0\.h, x0, x0
[^ :]+:[0-9]+: Info: whilehs p0\.s, x0, x0
[^ :]+:[0-9]+: Info: whilehs p0\.d, x0, x0
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilehs p16\.b,w0,w0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilehs p16\.b,w0,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehs p0\.b,w32,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehs p0\.b,w0,w32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilehs p0/m,w0,w0'
diff --git a/gas/testsuite/gas/aarch64/sme-9.d b/gas/testsuite/gas/aarch64/sme-9.d
index 9a6175c3906..69b27020d01 100644
--- a/gas/testsuite/gas/aarch64/sme-9.d
+++ b/gas/testsuite/gas/aarch64/sme-9.d
@@ -72,5 +72,5 @@ Disassembly of section \.text:
f8: 25277c61 psel p1, p15, p3.b\[w15, 0\]
fc: 252778a2 psel p2, p14, p5.b\[w15, 0\]
100: 25244200 \.inst 0x25244200 ; undefined
- 104: 25244010 \.inst 0x25244010 ; undefined
- 108: 25244210 \.inst 0x25244210 ; undefined
+ 104: 25244010 whilege pn8.b, x0, x4, vlx2
+ 108: 25244210 whilege pn8.b, x16, x4, vlx2
diff --git a/gas/testsuite/gas/aarch64/sme2-6-invalid.d b/gas/testsuite/gas/aarch64/sme2-6-invalid.d
new file mode 100644
index 00000000000..d3e9450a524
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-6-invalid.s
+#error_output: sme2-6-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-6-invalid.l b/gas/testsuite/gas/aarch64/sme2-6-invalid.l
new file mode 100644
index 00000000000..cac3ec4cfb7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-invalid.l
@@ -0,0 +1,139 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 1 -- `cntp 0,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `cntp x0,0,vlx2'
+[^ :]+:[0-9]+: Error: operand 3 must be VLx2 or VLx4 -- `cntp x0,pn0\.b,0'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 1 -- `cntp xsp,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 1 -- `cntp sp,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: operand mismatch -- `cntp w0,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.b, vlx2
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.h, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.s, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.d, vlx2
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 3 -- `cntp x0,p0\.b,vlx2'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `cntp x0,pn16\.b,vlx2'
+[^ :]+:[0-9]+: Error: operand 3 must be VLx2 or VLx4 -- `cntp x0,pn0\.b,#0'
+[^ :]+:[0-9]+: Error: operand 3 must be VLx2 or VLx4 -- `cntp x0,pn0\.b,vl'
+[^ :]+:[0-9]+: Error: operand 3 must be VLx2 or VLx4 -- `cntp x0,pn0\.b,vlx3'
+[^ :]+:[0-9]+: Error: operand mismatch -- `cntp x0,pn0,vlx2'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.b, vlx2
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.h, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.s, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.d, vlx2
+[^ :]+:[0-9]+: Error: operand mismatch -- `cntp x0,pn0\.q,vlx2'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.b, vlx2
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.h, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.s, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.d, vlx2
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `pext 0,pn8\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `pext p0\.b,0'
+[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 1 -- `pext pn8\.b,pn0\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `pext z0\.b,pn8\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `pext p8\.b,z8\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `pext p8\.b,x8'
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `pext p8\.b,p8\[0\]'
+[^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext p8\.b,pn8'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[4\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[1<<32\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `pext p8\.b,pn8\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pext p8\.b, pn8\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: pext p8\.h, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext p8\.s, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext p8\.d, pn8\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `pext p8\.q,pn8\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pext p8\.b, pn8\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: pext p8\.h, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext p8\.s, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext p8\.d, pn8\[0\]
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `pext {p0\.b-p2\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `pext {p0-p1},pn8\[0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext {p0\.b-p1\.b},pn7\[0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext {p0\.b-p1\.b},pn0\[0\]'
+[^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext {p0\.b-p1\.b},pn8'
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `pext {p0\.b-p1\.b},p0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `pext {p0\.b-p1\.b},pn8\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pext {p0\.b-p1\.b}, pn8\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: pext {p0\.h-p1\.h}, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext {p0\.s-p1\.s}, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext {p0\.d-p1\.d}, pn8\[0\]
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[1<<32\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `ptrue 0'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.b'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.b'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.h'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.h'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.s'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.s'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.d'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.d'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 1 -- `ptrue pn8\.b,all'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ptrue pn8\.q'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ptrue pn8\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: ptrue pn8\.h
+[^ :]+:[0-9]+: Info: ptrue pn8\.s
+[^ :]+:[0-9]+: Info: ptrue pn8\.d
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sel 0,pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `sel {z0\.b-z1\.b},0,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 3 -- `sel {z0\.b-z1\.b},pn8,0,{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z1\.b-z2\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `sel {z0\.b-z1\.b},p8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel {z0\.b-z1\.b},pn7,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.b-z1\.b},pn8/z,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Info: sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.b-z1\.b},pn8/m,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Info: sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel {z0\.b-z1\.b},pn0,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z11\.b-z12\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z17\.b-z18\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z1\.b-z4\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z10\.b-z13\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z15\.b-z18\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z1\.b-z4\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z22\.b-z25\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z27\.b-z30\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z5\.b-z8\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z14\.b-z17\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z19\.b-z22\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z1\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel {z0\.b-z2\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z2\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z2\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel {z0\.b-z2\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z2\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z0\.b-z2\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.q-z1\.q},pn8,{z0\.q-z1\.q},{z0\.q-z1\.q}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Info: sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-6-invalid.s b/gas/testsuite/gas/aarch64/sme2-6-invalid.s
new file mode 100644
index 00000000000..b94dcbab65f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-invalid.s
@@ -0,0 +1,92 @@
+ cntp 0, pn0.b, vlx2
+ cntp x0, 0, vlx2
+ cntp x0, pn0.b, 0
+
+ cntp xsp, pn0.b, vlx2
+ cntp sp, pn0.b, vlx2
+ cntp w0, pn0.b, vlx2
+ cntp x0, p0.b, vlx2
+ cntp x0, pn16.b, vlx2
+ cntp x0, pn0.b, #0
+ cntp x0, pn0.b, vl
+ cntp x0, pn0.b, vlx3
+
+ cntp x0, pn0, vlx2
+ cntp x0, pn0.q, vlx2
+
+ pext 0, pn8[0]
+ pext p0.b, 0
+
+ pext pn8.b, pn0[0]
+ pext z0.b, pn8[0]
+ pext p8.b, z8[0]
+ pext p8.b, x8
+ pext p8.b, p8[0]
+ pext p8.b, pn8
+ pext p8.b, pn8[-1]
+ pext p8.b, pn8[4]
+ pext p8.b, pn8[1 << 32]
+ pext p8.b, pn8.b[0]
+ pext p8.q, pn8[0]
+
+ pext { p0.b - p2.b }, pn8[0]
+ pext { p0 - p1 }, pn8[0]
+ pext { p0.b - p1.b }, pn7[0]
+ pext { p0.b - p1.b }, pn0[0]
+ pext { p0.b - p1.b }, pn8
+ pext { p0.b - p1.b }, p0[0]
+ pext { p0.b - p1.b }, pn8.b[0]
+ pext { p0.b - p1.b }, pn8[-1]
+ pext { p0.b - p1.b }, pn8[2]
+ pext { p0.b - p1.b }, pn8[1 << 32]
+
+ ptrue 0
+
+ ptrue pn0.b
+ ptrue pn7.b
+ ptrue pn0.h
+ ptrue pn7.h
+ ptrue pn0.s
+ ptrue pn7.s
+ ptrue pn0.d
+ ptrue pn7.d
+ ptrue pn8.b, all
+ ptrue pn8.q
+
+ sel 0, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, 0, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, 0, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, 0
+
+ sel { z1.b - z2.b }, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, p8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn7, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8/z, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8/m, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn0, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z11.b - z12.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, { z17.b - z18.b }
+
+ sel { z1.b - z4.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z10.b - z13.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z15.b - z18.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z1.b - z4.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z22.b - z25.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z27.b - z30.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z5.b - z8.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z14.b - z17.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z19.b - z22.b }
+
+ sel { z0.b - z1.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z1.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z0.b - z1.b }
+
+ sel { z0.b - z2.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z2.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z0.b - z2.b }
+
+ sel { z0.b - z2.b }, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z2.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, { z0.b - z2.b }
+
+ sel { z0.q - z1.q }, pn8, { z0.q - z1.q }, { z0.q - z1.q }
diff --git a/gas/testsuite/gas/aarch64/sme2-6-noarch.d b/gas/testsuite/gas/aarch64/sme2-6-noarch.d
new file mode 100644
index 00000000000..5a2f1a5a889
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-6.s
+#error_output: sme2-6-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-6-noarch.l b/gas/testsuite/gas/aarch64/sme2-6-noarch.l
new file mode 100644
index 00000000000..173e99a2b3e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-noarch.l
@@ -0,0 +1,145 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X0,PN0\.B,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x30,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp xzr,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn15\.b,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.b,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X11,PN13\.b,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.h,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X0,PN0\.H,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x30,pn0\.h,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp xzr,pn0\.h,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn15\.h,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.h,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X20,PN9\.h,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.s,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X0,PN0\.s,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x30,pn0\.s,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp xzr,pn0\.s,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn15\.s,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.s,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X15,PN8\.s,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.d,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X0,PN0\.d,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x30,pn0\.d,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp xzr,pn0\.d,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn15\.d,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.d,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X4,PN5\.d,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.b,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext P0\.B,PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p15\.b,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.b,pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.b,pn8\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p4\.b,pn11\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.h,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext P0\.H,PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p15\.h,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.h,pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.h,pn8\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p5\.h,pn14\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.s,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext P0\.S,PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p15\.s,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.s,pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.s,pn8\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p6\.s,pn10\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext P0\.D,PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p15\.d,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn8\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p7\.d,pn9\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b,p1\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.B-P1\.B},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.b-p15\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.b,p0\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.b-p0\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p7\.b-p8\.b},pn12\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h,p1\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.H-P1\.H},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.h-p15\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.h,p0\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.h-p0\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p2\.h-p3\.h},pn14\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s,p1\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.S-P1\.S},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.s-p15\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.s,p0\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.s-p0\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p5\.s-p6\.s},pn13\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d,p1\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.D-P1\.D},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.d-p15\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.d,p0\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.d-p0\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p12\.d-p13\.d},pn9\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn11\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn12\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.b-z31\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn15,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z2\.b-z3\.b},pn12,{z6\.b-z7\.b},{z10\.b-z11\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.h-z31\.h},pn8,{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn15,{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z12\.h-z13\.h},pn9,{z14\.h-z15\.h},{z16\.h-z17\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.s-z31\.s},pn8,{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn15,{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z18\.s-z19\.s},pn11,{z22\.s-z23\.s},{z24\.s-z25\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.d-z31\.d},pn8,{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn15,{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z8\.d-z9\.d},pn14,{z26\.d-z27\.d},{z28\.d-z29\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.b-z31\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z4\.b-z7\.b},pn10,{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.h-z31\.h},pn8,{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z8\.h-z11\.h},pn10,{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.s-z31\.s},pn8,{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z16\.s-z19\.s},pn10,{z20\.s-z23\.s},{z24\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.d-z31\.d},pn8,{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z20\.d-z23\.d},pn10,{z4\.d-z7\.d},{z8\.d-z11\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-6.d b/gas/testsuite/gas/aarch64/sme2-6.d
new file mode 100644
index 00000000000..488cb099f32
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6.d
@@ -0,0 +1,153 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 25208200 cntp x0, pn0\.b, vlx2
+[^:]+: 25208200 cntp x0, pn0\.b, vlx2
+[^:]+: 2520821e cntp x30, pn0\.b, vlx2
+[^:]+: 2520821f cntp xzr, pn0\.b, vlx2
+[^:]+: 252083e0 cntp x0, pn15\.b, vlx2
+[^:]+: 25208600 cntp x0, pn0\.b, vlx4
+[^:]+: 252087ab cntp x11, pn13\.b, vlx4
+[^:]+: 25608200 cntp x0, pn0\.h, vlx2
+[^:]+: 25608200 cntp x0, pn0\.h, vlx2
+[^:]+: 2560821e cntp x30, pn0\.h, vlx2
+[^:]+: 2560821f cntp xzr, pn0\.h, vlx2
+[^:]+: 256083e0 cntp x0, pn15\.h, vlx2
+[^:]+: 25608600 cntp x0, pn0\.h, vlx4
+[^:]+: 25608334 cntp x20, pn9\.h, vlx2
+[^:]+: 25a08200 cntp x0, pn0\.s, vlx2
+[^:]+: 25a08200 cntp x0, pn0\.s, vlx2
+[^:]+: 25a0821e cntp x30, pn0\.s, vlx2
+[^:]+: 25a0821f cntp xzr, pn0\.s, vlx2
+[^:]+: 25a083e0 cntp x0, pn15\.s, vlx2
+[^:]+: 25a08600 cntp x0, pn0\.s, vlx4
+[^:]+: 25a0870f cntp x15, pn8\.s, vlx4
+[^:]+: 25e08200 cntp x0, pn0\.d, vlx2
+[^:]+: 25e08200 cntp x0, pn0\.d, vlx2
+[^:]+: 25e0821e cntp x30, pn0\.d, vlx2
+[^:]+: 25e0821f cntp xzr, pn0\.d, vlx2
+[^:]+: 25e083e0 cntp x0, pn15\.d, vlx2
+[^:]+: 25e08600 cntp x0, pn0\.d, vlx4
+[^:]+: 25e082a4 cntp x4, pn5\.d, vlx2
+[^:]+: 25207010 pext p0\.b, pn8\[0\]
+[^:]+: 25207010 pext p0\.b, pn8\[0\]
+[^:]+: 2520701f pext p15\.b, pn8\[0\]
+[^:]+: 252070f0 pext p0\.b, pn15\[0\]
+[^:]+: 25207310 pext p0\.b, pn8\[3\]
+[^:]+: 25207274 pext p4\.b, pn11\[2\]
+[^:]+: 25607010 pext p0\.h, pn8\[0\]
+[^:]+: 25607010 pext p0\.h, pn8\[0\]
+[^:]+: 2560701f pext p15\.h, pn8\[0\]
+[^:]+: 256070f0 pext p0\.h, pn15\[0\]
+[^:]+: 25607310 pext p0\.h, pn8\[3\]
+[^:]+: 256071d5 pext p5\.h, pn14\[1\]
+[^:]+: 25a07010 pext p0\.s, pn8\[0\]
+[^:]+: 25a07010 pext p0\.s, pn8\[0\]
+[^:]+: 25a0701f pext p15\.s, pn8\[0\]
+[^:]+: 25a070f0 pext p0\.s, pn15\[0\]
+[^:]+: 25a07310 pext p0\.s, pn8\[3\]
+[^:]+: 25a07256 pext p6\.s, pn10\[2\]
+[^:]+: 25e07010 pext p0\.d, pn8\[0\]
+[^:]+: 25e07010 pext p0\.d, pn8\[0\]
+[^:]+: 25e0701f pext p15\.d, pn8\[0\]
+[^:]+: 25e070f0 pext p0\.d, pn15\[0\]
+[^:]+: 25e07310 pext p0\.d, pn8\[3\]
+[^:]+: 25e07137 pext p7\.d, pn9\[1\]
+[^:]+: 25207410 pext {p0\.b-p1\.b}, pn8\[0\]
+[^:]+: 25207410 pext {p0\.b-p1\.b}, pn8\[0\]
+[^:]+: 25207410 pext {p0\.b-p1\.b}, pn8\[0\]
+[^:]+: 2520741e pext {p14\.b-p15\.b}, pn8\[0\]
+[^:]+: 2520741f pext {p15\.b-p0\.b}, pn8\[0\]
+[^:]+: 2520741f pext {p15\.b-p0\.b}, pn8\[0\]
+[^:]+: 252074f0 pext {p0\.b-p1\.b}, pn15\[0\]
+[^:]+: 25207510 pext {p0\.b-p1\.b}, pn8\[1\]
+[^:]+: 25207497 pext {p7\.b-p8\.b}, pn12\[0\]
+[^:]+: 25607410 pext {p0\.h-p1\.h}, pn8\[0\]
+[^:]+: 25607410 pext {p0\.h-p1\.h}, pn8\[0\]
+[^:]+: 25607410 pext {p0\.h-p1\.h}, pn8\[0\]
+[^:]+: 2560741e pext {p14\.h-p15\.h}, pn8\[0\]
+[^:]+: 2560741f pext {p15\.h-p0\.h}, pn8\[0\]
+[^:]+: 2560741f pext {p15\.h-p0\.h}, pn8\[0\]
+[^:]+: 256074f0 pext {p0\.h-p1\.h}, pn15\[0\]
+[^:]+: 25607510 pext {p0\.h-p1\.h}, pn8\[1\]
+[^:]+: 256074d2 pext {p2\.h-p3\.h}, pn14\[0\]
+[^:]+: 25a07410 pext {p0\.s-p1\.s}, pn8\[0\]
+[^:]+: 25a07410 pext {p0\.s-p1\.s}, pn8\[0\]
+[^:]+: 25a07410 pext {p0\.s-p1\.s}, pn8\[0\]
+[^:]+: 25a0741e pext {p14\.s-p15\.s}, pn8\[0\]
+[^:]+: 25a0741f pext {p15\.s-p0\.s}, pn8\[0\]
+[^:]+: 25a0741f pext {p15\.s-p0\.s}, pn8\[0\]
+[^:]+: 25a074f0 pext {p0\.s-p1\.s}, pn15\[0\]
+[^:]+: 25a07510 pext {p0\.s-p1\.s}, pn8\[1\]
+[^:]+: 25a074b5 pext {p5\.s-p6\.s}, pn13\[0\]
+[^:]+: 25e07410 pext {p0\.d-p1\.d}, pn8\[0\]
+[^:]+: 25e07410 pext {p0\.d-p1\.d}, pn8\[0\]
+[^:]+: 25e07410 pext {p0\.d-p1\.d}, pn8\[0\]
+[^:]+: 25e0741e pext {p14\.d-p15\.d}, pn8\[0\]
+[^:]+: 25e0741f pext {p15\.d-p0\.d}, pn8\[0\]
+[^:]+: 25e0741f pext {p15\.d-p0\.d}, pn8\[0\]
+[^:]+: 25e074f0 pext {p0\.d-p1\.d}, pn15\[0\]
+[^:]+: 25e07510 pext {p0\.d-p1\.d}, pn8\[1\]
+[^:]+: 25e0743c pext {p12\.d-p13\.d}, pn9\[0\]
+[^:]+: 25207810 ptrue pn8\.b
+[^:]+: 25207813 ptrue pn11\.b
+[^:]+: 25207817 ptrue pn15\.b
+[^:]+: 25607810 ptrue pn8\.h
+[^:]+: 25607811 ptrue pn9\.h
+[^:]+: 25607817 ptrue pn15\.h
+[^:]+: 25a07810 ptrue pn8\.s
+[^:]+: 25a07816 ptrue pn14\.s
+[^:]+: 25a07817 ptrue pn15\.s
+[^:]+: 25e07810 ptrue pn8\.d
+[^:]+: 25e07814 ptrue pn12\.d
+[^:]+: 25e07817 ptrue pn15\.d
+[^:]+: c1208000 sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c120801e sel {z30\.b-z31\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1209c00 sel {z0\.b-z1\.b}, pn15, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c12083c0 sel {z0\.b-z1\.b}, pn8, {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c13e8000 sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c12a90c2 sel {z2\.b-z3\.b}, pn12, {z6\.b-z7\.b}, {z10\.b-z11\.b}
+[^:]+: c1608000 sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c160801e sel {z30\.h-z31\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1609c00 sel {z0\.h-z1\.h}, pn15, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c16083c0 sel {z0\.h-z1\.h}, pn8, {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c17e8000 sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c17085cc sel {z12\.h-z13\.h}, pn9, {z14\.h-z15\.h}, {z16\.h-z17\.h}
+[^:]+: c1a08000 sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a0801e sel {z30\.s-z31\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a09c00 sel {z0\.s-z1\.s}, pn15, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a083c0 sel {z0\.s-z1\.s}, pn8, {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1be8000 sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1b88ed2 sel {z18\.s-z19\.s}, pn11, {z22\.s-z23\.s}, {z24\.s-z25\.s}
+[^:]+: c1e08000 sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e0801e sel {z30\.d-z31\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e09c00 sel {z0\.d-z1\.d}, pn15, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e083c0 sel {z0\.d-z1\.d}, pn8, {z30\.d-z31\.d}, {z0\.d-z1\.d}
+[^:]+: c1fe8000 sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z30\.d-z31\.d}
+[^:]+: c1fc9b48 sel {z8\.d-z9\.d}, pn14, {z26\.d-z27\.d}, {z28\.d-z29\.d}
+[^:]+: c1218000 sel {z0\.b-z3\.b}, pn8, {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c121801c sel {z28\.b-z31\.b}, pn8, {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1218380 sel {z0\.b-z3\.b}, pn8, {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c13d8000 sel {z0\.b-z3\.b}, pn8, {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c12d8904 sel {z4\.b-z7\.b}, pn10, {z8\.b-z11\.b}, {z12\.b-z15\.b}
+[^:]+: c1618000 sel {z0\.h-z3\.h}, pn8, {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c161801c sel {z28\.h-z31\.h}, pn8, {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1618380 sel {z0\.h-z3\.h}, pn8, {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c17d8000 sel {z0\.h-z3\.h}, pn8, {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1758a08 sel {z8\.h-z11\.h}, pn10, {z16\.h-z19\.h}, {z20\.h-z23\.h}
+[^:]+: c1a18000 sel {z0\.s-z3\.s}, pn8, {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a1801c sel {z28\.s-z31\.s}, pn8, {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a18380 sel {z0\.s-z3\.s}, pn8, {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bd8000 sel {z0\.s-z3\.s}, pn8, {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b98a90 sel {z16\.s-z19\.s}, pn10, {z20\.s-z23\.s}, {z24\.s-z27\.s}
+[^:]+: c1e18000 sel {z0\.d-z3\.d}, pn8, {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e1801c sel {z28\.d-z31\.d}, pn8, {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e18380 sel {z0\.d-z3\.d}, pn8, {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1fd8000 sel {z0\.d-z3\.d}, pn8, {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1e98894 sel {z20\.d-z23\.d}, pn10, {z4\.d-z7\.d}, {z8\.d-z11\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-6.s b/gas/testsuite/gas/aarch64/sme2-6.s
new file mode 100644
index 00000000000..0cc00f1387b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6.s
@@ -0,0 +1,164 @@
+ cntp x0, pn0.b, vlx2
+ CNTP X0, PN0.B, VLx2
+ cntp x30, pn0.b, vlx2
+ cntp xzr, pn0.b, vlx2
+ cntp x0, pn15.b, vlx2
+ cntp x0, pn0.b, vlx4
+ CNTP X11, PN13.b, VLx4
+
+ cntp x0, pn0.h, vlx2
+ CNTP X0, PN0.H, VLx2
+ cntp x30, pn0.h, vlx2
+ cntp xzr, pn0.h, vlx2
+ cntp x0, pn15.h, vlx2
+ cntp x0, pn0.h, vlx4
+ CNTP X20, PN9.h, VLx2
+
+ cntp x0, pn0.s, vlx2
+ CNTP X0, PN0.s, VLx2
+ cntp x30, pn0.s, vlx2
+ cntp xzr, pn0.s, vlx2
+ cntp x0, pn15.s, vlx2
+ cntp x0, pn0.s, vlx4
+ CNTP X15, PN8.s, VLx4
+
+ cntp x0, pn0.d, vlx2
+ CNTP X0, PN0.d, VLx2
+ cntp x30, pn0.d, vlx2
+ cntp xzr, pn0.d, vlx2
+ cntp x0, pn15.d, vlx2
+ cntp x0, pn0.d, vlx4
+ CNTP X4, PN5.d, VLx2
+
+ pext p0.b, pn8[0]
+ PEXT P0.B, PN8[0]
+ pext p15.b, pn8[0]
+ pext p0.b, pn15[0]
+ pext p0.b, pn8[3]
+ pext p4.b, pn11[2]
+
+ pext p0.h, pn8[0]
+ PEXT P0.H, PN8[0]
+ pext p15.h, pn8[0]
+ pext p0.h, pn15[0]
+ pext p0.h, pn8[3]
+ pext p5.h, pn14[1]
+
+ pext p0.s, pn8[0]
+ PEXT P0.S, PN8[0]
+ pext p15.s, pn8[0]
+ pext p0.s, pn15[0]
+ pext p0.s, pn8[3]
+ pext p6.s, pn10[2]
+
+ pext p0.d, pn8[0]
+ PEXT P0.D, PN8[0]
+ pext p15.d, pn8[0]
+ pext p0.d, pn15[0]
+ pext p0.d, pn8[3]
+ pext p7.d, pn9[1]
+
+ pext { p0.b, p1.b }, pn8[0]
+ pext { p0.b - p1.b }, pn8[0]
+ PEXT { P0.B - P1.B }, PN8[0]
+ pext { p14.b - p15.b }, pn8[0]
+ pext { p15.b, p0.b }, pn8[0]
+ pext { p15.b - p0.b }, pn8[0]
+ pext { p0.b - p1.b }, pn15[0]
+ pext { p0.b - p1.b }, pn8[1]
+ pext { p7.b - p8.b }, pn12[0]
+
+ pext { p0.h, p1.h }, pn8[0]
+ pext { p0.h - p1.h }, pn8[0]
+ PEXT { P0.H - P1.H }, PN8[0]
+ pext { p14.h - p15.h }, pn8[0]
+ pext { p15.h, p0.h }, pn8[0]
+ pext { p15.h - p0.h }, pn8[0]
+ pext { p0.h - p1.h }, pn15[0]
+ pext { p0.h - p1.h }, pn8[1]
+ pext { p2.h - p3.h }, pn14[0]
+
+ pext { p0.s, p1.s }, pn8[0]
+ pext { p0.s - p1.s }, pn8[0]
+ PEXT { P0.S - P1.S }, PN8[0]
+ pext { p14.s - p15.s }, pn8[0]
+ pext { p15.s, p0.s }, pn8[0]
+ pext { p15.s - p0.s }, pn8[0]
+ pext { p0.s - p1.s }, pn15[0]
+ pext { p0.s - p1.s }, pn8[1]
+ pext { p5.s - p6.s }, pn13[0]
+
+ pext { p0.d, p1.d }, pn8[0]
+ pext { p0.d - p1.d }, pn8[0]
+ PEXT { P0.D - P1.D }, PN8[0]
+ pext { p14.d - p15.d }, pn8[0]
+ pext { p15.d, p0.d }, pn8[0]
+ pext { p15.d - p0.d }, pn8[0]
+ pext { p0.d - p1.d }, pn15[0]
+ pext { p0.d - p1.d }, pn8[1]
+ pext { p12.d - p13.d }, pn9[0]
+
+ ptrue pn8.b
+ ptrue pn11.b
+ ptrue pn15.b
+ ptrue pn8.h
+ ptrue pn9.h
+ ptrue pn15.h
+ ptrue pn8.s
+ ptrue pn14.s
+ ptrue pn15.s
+ ptrue pn8.d
+ ptrue pn12.d
+ ptrue pn15.d
+
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z30.b - z31.b }, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn15, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z30.b - z31.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, { z30.b - z31.b }
+ sel { z2.b - z3.b }, pn12, { z6.b - z7.b }, { z10.b - z11.b }
+
+ sel { z0.h - z1.h }, pn8, { z0.h - z1.h }, { z0.h - z1.h }
+ sel { z30.h - z31.h }, pn8, { z0.h - z1.h }, { z0.h - z1.h }
+ sel { z0.h - z1.h }, pn15, { z0.h - z1.h }, { z0.h - z1.h }
+ sel { z0.h - z1.h }, pn8, { z30.h - z31.h }, { z0.h - z1.h }
+ sel { z0.h - z1.h }, pn8, { z0.h - z1.h }, { z30.h - z31.h }
+ sel { z12.h - z13.h }, pn9, { z14.h - z15.h }, { z16.h - z17.h }
+
+ sel { z0.s - z1.s }, pn8, { z0.s - z1.s }, { z0.s - z1.s }
+ sel { z30.s - z31.s }, pn8, { z0.s - z1.s }, { z0.s - z1.s }
+ sel { z0.s - z1.s }, pn15, { z0.s - z1.s }, { z0.s - z1.s }
+ sel { z0.s - z1.s }, pn8, { z30.s - z31.s }, { z0.s - z1.s }
+ sel { z0.s - z1.s }, pn8, { z0.s - z1.s }, { z30.s - z31.s }
+ sel { z18.s - z19.s }, pn11, { z22.s - z23.s }, { z24.s - z25.s }
+
+ sel { z0.d - z1.d }, pn8, { z0.d - z1.d }, { z0.d - z1.d }
+ sel { z30.d - z31.d }, pn8, { z0.d - z1.d }, { z0.d - z1.d }
+ sel { z0.d - z1.d }, pn15, { z0.d - z1.d }, { z0.d - z1.d }
+ sel { z0.d - z1.d }, pn8, { z30.d - z31.d }, { z0.d - z1.d }
+ sel { z0.d - z1.d }, pn8, { z0.d - z1.d }, { z30.d - z31.d }
+ sel { z8.d - z9.d }, pn14, { z26.d - z27.d }, { z28.d - z29.d }
+
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z28.b - z31.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z28.b - z31.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z28.b - z31.b }
+ sel { z4.b - z7.b }, pn10, { z8.b - z11.b }, { z12.b - z15.b }
+
+ sel { z0.h - z3.h }, pn8, { z0.h - z3.h }, { z0.h - z3.h }
+ sel { z28.h - z31.h }, pn8, { z0.h - z3.h }, { z0.h - z3.h }
+ sel { z0.h - z3.h }, pn8, { z28.h - z31.h }, { z0.h - z3.h }
+ sel { z0.h - z3.h }, pn8, { z0.h - z3.h }, { z28.h - z31.h }
+ sel { z8.h - z11.h }, pn10, { z16.h - z19.h }, { z20.h - z23.h }
+
+ sel { z0.s - z3.s }, pn8, { z0.s - z3.s }, { z0.s - z3.s }
+ sel { z28.s - z31.s }, pn8, { z0.s - z3.s }, { z0.s - z3.s }
+ sel { z0.s - z3.s }, pn8, { z28.s - z31.s }, { z0.s - z3.s }
+ sel { z0.s - z3.s }, pn8, { z0.s - z3.s }, { z28.s - z31.s }
+ sel { z16.s - z19.s }, pn10, { z20.s - z23.s }, { z24.s - z27.s }
+
+ sel { z0.d - z3.d }, pn8, { z0.d - z3.d }, { z0.d - z3.d }
+ sel { z28.d - z31.d }, pn8, { z0.d - z3.d }, { z0.d - z3.d }
+ sel { z0.d - z3.d }, pn8, { z28.d - z31.d }, { z0.d - z3.d }
+ sel { z0.d - z3.d }, pn8, { z0.d - z3.d }, { z28.d - z31.d }
+ sel { z20.d - z23.d }, pn10, { z4.d - z7.d }, { z8.d - z11.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-7-invalid.d b/gas/testsuite/gas/aarch64/sme2-7-invalid.d
new file mode 100644
index 00000000000..889fd417d8e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-7-invalid.s
+#error_output: sme2-7-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-7-invalid.l b/gas/testsuite/gas/aarch64/sme2-7-invalid.l
new file mode 100644
index 00000000000..65b4cce932a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-invalid.l
@@ -0,0 +1,20 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilege 0,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege pn8\.b,0,x0,vlx2'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege pn8\.b,x0,0,vlx2'
+[^ :]+:[0-9]+: Error: operand 4 must be VLx2 or VLx4 -- `whilege pn8\.b,x0,x0,0'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `whilege pn0\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `whilege p8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilege z8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 4 -- `whilege pn8\.b,x0,x0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `whilege pn8\.b,w0,w0,vlx2'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: whilege pn8\.b, x0, x0, vlx2
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: whilege pn8\.h, x0, x0, vlx2
+[^ :]+:[0-9]+: Info: whilege pn8\.s, x0, x0, vlx2
+[^ :]+:[0-9]+: Info: whilege pn8\.d, x0, x0, vlx2
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege pn8\.b,sp,x0,vlx2'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege pn8\.b,x0,sp,vlx2'
+[^ :]+:[0-9]+: Error: operand 4 must be VLx2 or VLx4 -- `whilege pn8\.b,x0,x0,#0'
+[^ :]+:[0-9]+: Error: operand 4 must be VLx2 or VLx4 -- `whilege pn8\.b,x0,x0,1'
diff --git a/gas/testsuite/gas/aarch64/sme2-7-invalid.s b/gas/testsuite/gas/aarch64/sme2-7-invalid.s
new file mode 100644
index 00000000000..0840e7f9169
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-invalid.s
@@ -0,0 +1,14 @@
+ whilege 0, x0, x0, vlx2
+ whilege pn8.b, 0, x0, vlx2
+ whilege pn8.b, x0, 0, vlx2
+ whilege pn8.b, x0, x0, 0
+
+ whilege pn0.b, x0, x0, vlx2
+ whilege p8.b, x0, x0, vlx2
+ whilege z8.b, x0, x0, vlx2
+ whilege pn8.b, x0, x0
+ whilege pn8.b, w0, w0, vlx2
+ whilege pn8.b, sp, x0, vlx2
+ whilege pn8.b, x0, sp, vlx2
+ whilege pn8.b, x0, x0, #0
+ whilege pn8.b, x0, x0, 1
diff --git a/gas/testsuite/gas/aarch64/sme2-7-noarch.d b/gas/testsuite/gas/aarch64/sme2-7-noarch.d
new file mode 100644
index 00000000000..50ea07c98a7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-7.s
+#error_output: sme2-7-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-7-noarch.l b/gas/testsuite/gas/aarch64/sme2-7-noarch.l
new file mode 100644
index 00000000000..b6b3c75fda6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-noarch.l
@@ -0,0 +1,321 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn13\.d,x26,x9,vlx4'
diff --git a/gas/testsuite/gas/aarch64/sme2-7.d b/gas/testsuite/gas/aarch64/sme2-7.d
new file mode 100644
index 00000000000..8c6fdc5d508
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7.d
@@ -0,0 +1,329 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 25204010 whilege pn8\.b, x0, x0, vlx2
+[^:]+: 25206010 whilege pn8\.b, x0, x0, vlx4
+[^:]+: 25204010 whilege pn8\.b, x0, x0, vlx2
+[^:]+: 25206010 whilege pn8\.b, x0, x0, vlx4
+[^:]+: 25204017 whilege pn15\.b, x0, x0, vlx2
+[^:]+: 252043d0 whilege pn8\.b, x30, x0, vlx2
+[^:]+: 252043f0 whilege pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4010 whilege pn8\.b, x0, x30, vlx2
+[^:]+: 253f4010 whilege pn8\.b, x0, xzr, vlx2
+[^:]+: 25216293 whilege pn11\.b, x20, x1, vlx4
+[^:]+: 25604010 whilege pn8\.h, x0, x0, vlx2
+[^:]+: 25606010 whilege pn8\.h, x0, x0, vlx4
+[^:]+: 25604010 whilege pn8\.h, x0, x0, vlx2
+[^:]+: 25606010 whilege pn8\.h, x0, x0, vlx4
+[^:]+: 25604017 whilege pn15\.h, x0, x0, vlx2
+[^:]+: 256043d0 whilege pn8\.h, x30, x0, vlx2
+[^:]+: 256043f0 whilege pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4010 whilege pn8\.h, x0, x30, vlx2
+[^:]+: 257f4010 whilege pn8\.h, x0, xzr, vlx2
+[^:]+: 257961d6 whilege pn14\.h, x14, x25, vlx4
+[^:]+: 25a04010 whilege pn8\.s, x0, x0, vlx2
+[^:]+: 25a06010 whilege pn8\.s, x0, x0, vlx4
+[^:]+: 25a04010 whilege pn8\.s, x0, x0, vlx2
+[^:]+: 25a06010 whilege pn8\.s, x0, x0, vlx4
+[^:]+: 25a04017 whilege pn15\.s, x0, x0, vlx2
+[^:]+: 25a043d0 whilege pn8\.s, x30, x0, vlx2
+[^:]+: 25a043f0 whilege pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4010 whilege pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4010 whilege pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4091 whilege pn9\.s, x4, x27, vlx2
+[^:]+: 25e04010 whilege pn8\.d, x0, x0, vlx2
+[^:]+: 25e06010 whilege pn8\.d, x0, x0, vlx4
+[^:]+: 25e04010 whilege pn8\.d, x0, x0, vlx2
+[^:]+: 25e06010 whilege pn8\.d, x0, x0, vlx4
+[^:]+: 25e04017 whilege pn15\.d, x0, x0, vlx2
+[^:]+: 25e043d0 whilege pn8\.d, x30, x0, vlx2
+[^:]+: 25e043f0 whilege pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4010 whilege pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4010 whilege pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96355 whilege pn13\.d, x26, x9, vlx4
+[^:]+: 25204018 whilegt pn8\.b, x0, x0, vlx2
+[^:]+: 25206018 whilegt pn8\.b, x0, x0, vlx4
+[^:]+: 25204018 whilegt pn8\.b, x0, x0, vlx2
+[^:]+: 25206018 whilegt pn8\.b, x0, x0, vlx4
+[^:]+: 2520401f whilegt pn15\.b, x0, x0, vlx2
+[^:]+: 252043d8 whilegt pn8\.b, x30, x0, vlx2
+[^:]+: 252043f8 whilegt pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4018 whilegt pn8\.b, x0, x30, vlx2
+[^:]+: 253f4018 whilegt pn8\.b, x0, xzr, vlx2
+[^:]+: 2521629b whilegt pn11\.b, x20, x1, vlx4
+[^:]+: 25604018 whilegt pn8\.h, x0, x0, vlx2
+[^:]+: 25606018 whilegt pn8\.h, x0, x0, vlx4
+[^:]+: 25604018 whilegt pn8\.h, x0, x0, vlx2
+[^:]+: 25606018 whilegt pn8\.h, x0, x0, vlx4
+[^:]+: 2560401f whilegt pn15\.h, x0, x0, vlx2
+[^:]+: 256043d8 whilegt pn8\.h, x30, x0, vlx2
+[^:]+: 256043f8 whilegt pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4018 whilegt pn8\.h, x0, x30, vlx2
+[^:]+: 257f4018 whilegt pn8\.h, x0, xzr, vlx2
+[^:]+: 257961de whilegt pn14\.h, x14, x25, vlx4
+[^:]+: 25a04018 whilegt pn8\.s, x0, x0, vlx2
+[^:]+: 25a06018 whilegt pn8\.s, x0, x0, vlx4
+[^:]+: 25a04018 whilegt pn8\.s, x0, x0, vlx2
+[^:]+: 25a06018 whilegt pn8\.s, x0, x0, vlx4
+[^:]+: 25a0401f whilegt pn15\.s, x0, x0, vlx2
+[^:]+: 25a043d8 whilegt pn8\.s, x30, x0, vlx2
+[^:]+: 25a043f8 whilegt pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4018 whilegt pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4018 whilegt pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4099 whilegt pn9\.s, x4, x27, vlx2
+[^:]+: 25e04018 whilegt pn8\.d, x0, x0, vlx2
+[^:]+: 25e06018 whilegt pn8\.d, x0, x0, vlx4
+[^:]+: 25e04018 whilegt pn8\.d, x0, x0, vlx2
+[^:]+: 25e06018 whilegt pn8\.d, x0, x0, vlx4
+[^:]+: 25e0401f whilegt pn15\.d, x0, x0, vlx2
+[^:]+: 25e043d8 whilegt pn8\.d, x30, x0, vlx2
+[^:]+: 25e043f8 whilegt pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4018 whilegt pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4018 whilegt pn8\.d, x0, xzr, vlx2
+[^:]+: 25e9635d whilegt pn13\.d, x26, x9, vlx4
+[^:]+: 25204818 whilehi pn8\.b, x0, x0, vlx2
+[^:]+: 25206818 whilehi pn8\.b, x0, x0, vlx4
+[^:]+: 25204818 whilehi pn8\.b, x0, x0, vlx2
+[^:]+: 25206818 whilehi pn8\.b, x0, x0, vlx4
+[^:]+: 2520481f whilehi pn15\.b, x0, x0, vlx2
+[^:]+: 25204bd8 whilehi pn8\.b, x30, x0, vlx2
+[^:]+: 25204bf8 whilehi pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4818 whilehi pn8\.b, x0, x30, vlx2
+[^:]+: 253f4818 whilehi pn8\.b, x0, xzr, vlx2
+[^:]+: 25216a9b whilehi pn11\.b, x20, x1, vlx4
+[^:]+: 25604818 whilehi pn8\.h, x0, x0, vlx2
+[^:]+: 25606818 whilehi pn8\.h, x0, x0, vlx4
+[^:]+: 25604818 whilehi pn8\.h, x0, x0, vlx2
+[^:]+: 25606818 whilehi pn8\.h, x0, x0, vlx4
+[^:]+: 2560481f whilehi pn15\.h, x0, x0, vlx2
+[^:]+: 25604bd8 whilehi pn8\.h, x30, x0, vlx2
+[^:]+: 25604bf8 whilehi pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4818 whilehi pn8\.h, x0, x30, vlx2
+[^:]+: 257f4818 whilehi pn8\.h, x0, xzr, vlx2
+[^:]+: 257969de whilehi pn14\.h, x14, x25, vlx4
+[^:]+: 25a04818 whilehi pn8\.s, x0, x0, vlx2
+[^:]+: 25a06818 whilehi pn8\.s, x0, x0, vlx4
+[^:]+: 25a04818 whilehi pn8\.s, x0, x0, vlx2
+[^:]+: 25a06818 whilehi pn8\.s, x0, x0, vlx4
+[^:]+: 25a0481f whilehi pn15\.s, x0, x0, vlx2
+[^:]+: 25a04bd8 whilehi pn8\.s, x30, x0, vlx2
+[^:]+: 25a04bf8 whilehi pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4818 whilehi pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4818 whilehi pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4899 whilehi pn9\.s, x4, x27, vlx2
+[^:]+: 25e04818 whilehi pn8\.d, x0, x0, vlx2
+[^:]+: 25e06818 whilehi pn8\.d, x0, x0, vlx4
+[^:]+: 25e04818 whilehi pn8\.d, x0, x0, vlx2
+[^:]+: 25e06818 whilehi pn8\.d, x0, x0, vlx4
+[^:]+: 25e0481f whilehi pn15\.d, x0, x0, vlx2
+[^:]+: 25e04bd8 whilehi pn8\.d, x30, x0, vlx2
+[^:]+: 25e04bf8 whilehi pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4818 whilehi pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4818 whilehi pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96b5d whilehi pn13\.d, x26, x9, vlx4
+[^:]+: 25204810 whilehs pn8\.b, x0, x0, vlx2
+[^:]+: 25206810 whilehs pn8\.b, x0, x0, vlx4
+[^:]+: 25204810 whilehs pn8\.b, x0, x0, vlx2
+[^:]+: 25206810 whilehs pn8\.b, x0, x0, vlx4
+[^:]+: 25204817 whilehs pn15\.b, x0, x0, vlx2
+[^:]+: 25204bd0 whilehs pn8\.b, x30, x0, vlx2
+[^:]+: 25204bf0 whilehs pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4810 whilehs pn8\.b, x0, x30, vlx2
+[^:]+: 253f4810 whilehs pn8\.b, x0, xzr, vlx2
+[^:]+: 25216a93 whilehs pn11\.b, x20, x1, vlx4
+[^:]+: 25604810 whilehs pn8\.h, x0, x0, vlx2
+[^:]+: 25606810 whilehs pn8\.h, x0, x0, vlx4
+[^:]+: 25604810 whilehs pn8\.h, x0, x0, vlx2
+[^:]+: 25606810 whilehs pn8\.h, x0, x0, vlx4
+[^:]+: 25604817 whilehs pn15\.h, x0, x0, vlx2
+[^:]+: 25604bd0 whilehs pn8\.h, x30, x0, vlx2
+[^:]+: 25604bf0 whilehs pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4810 whilehs pn8\.h, x0, x30, vlx2
+[^:]+: 257f4810 whilehs pn8\.h, x0, xzr, vlx2
+[^:]+: 257969d6 whilehs pn14\.h, x14, x25, vlx4
+[^:]+: 25a04810 whilehs pn8\.s, x0, x0, vlx2
+[^:]+: 25a06810 whilehs pn8\.s, x0, x0, vlx4
+[^:]+: 25a04810 whilehs pn8\.s, x0, x0, vlx2
+[^:]+: 25a06810 whilehs pn8\.s, x0, x0, vlx4
+[^:]+: 25a04817 whilehs pn15\.s, x0, x0, vlx2
+[^:]+: 25a04bd0 whilehs pn8\.s, x30, x0, vlx2
+[^:]+: 25a04bf0 whilehs pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4810 whilehs pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4810 whilehs pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4891 whilehs pn9\.s, x4, x27, vlx2
+[^:]+: 25e04810 whilehs pn8\.d, x0, x0, vlx2
+[^:]+: 25e06810 whilehs pn8\.d, x0, x0, vlx4
+[^:]+: 25e04810 whilehs pn8\.d, x0, x0, vlx2
+[^:]+: 25e06810 whilehs pn8\.d, x0, x0, vlx4
+[^:]+: 25e04817 whilehs pn15\.d, x0, x0, vlx2
+[^:]+: 25e04bd0 whilehs pn8\.d, x30, x0, vlx2
+[^:]+: 25e04bf0 whilehs pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4810 whilehs pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4810 whilehs pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96b55 whilehs pn13\.d, x26, x9, vlx4
+[^:]+: 25204418 whilele pn8\.b, x0, x0, vlx2
+[^:]+: 25206418 whilele pn8\.b, x0, x0, vlx4
+[^:]+: 25204418 whilele pn8\.b, x0, x0, vlx2
+[^:]+: 25206418 whilele pn8\.b, x0, x0, vlx4
+[^:]+: 2520441f whilele pn15\.b, x0, x0, vlx2
+[^:]+: 252047d8 whilele pn8\.b, x30, x0, vlx2
+[^:]+: 252047f8 whilele pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4418 whilele pn8\.b, x0, x30, vlx2
+[^:]+: 253f4418 whilele pn8\.b, x0, xzr, vlx2
+[^:]+: 2521669b whilele pn11\.b, x20, x1, vlx4
+[^:]+: 25604418 whilele pn8\.h, x0, x0, vlx2
+[^:]+: 25606418 whilele pn8\.h, x0, x0, vlx4
+[^:]+: 25604418 whilele pn8\.h, x0, x0, vlx2
+[^:]+: 25606418 whilele pn8\.h, x0, x0, vlx4
+[^:]+: 2560441f whilele pn15\.h, x0, x0, vlx2
+[^:]+: 256047d8 whilele pn8\.h, x30, x0, vlx2
+[^:]+: 256047f8 whilele pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4418 whilele pn8\.h, x0, x30, vlx2
+[^:]+: 257f4418 whilele pn8\.h, x0, xzr, vlx2
+[^:]+: 257965de whilele pn14\.h, x14, x25, vlx4
+[^:]+: 25a04418 whilele pn8\.s, x0, x0, vlx2
+[^:]+: 25a06418 whilele pn8\.s, x0, x0, vlx4
+[^:]+: 25a04418 whilele pn8\.s, x0, x0, vlx2
+[^:]+: 25a06418 whilele pn8\.s, x0, x0, vlx4
+[^:]+: 25a0441f whilele pn15\.s, x0, x0, vlx2
+[^:]+: 25a047d8 whilele pn8\.s, x30, x0, vlx2
+[^:]+: 25a047f8 whilele pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4418 whilele pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4418 whilele pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4499 whilele pn9\.s, x4, x27, vlx2
+[^:]+: 25e04418 whilele pn8\.d, x0, x0, vlx2
+[^:]+: 25e06418 whilele pn8\.d, x0, x0, vlx4
+[^:]+: 25e04418 whilele pn8\.d, x0, x0, vlx2
+[^:]+: 25e06418 whilele pn8\.d, x0, x0, vlx4
+[^:]+: 25e0441f whilele pn15\.d, x0, x0, vlx2
+[^:]+: 25e047d8 whilele pn8\.d, x30, x0, vlx2
+[^:]+: 25e047f8 whilele pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4418 whilele pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4418 whilele pn8\.d, x0, xzr, vlx2
+[^:]+: 25e9675d whilele pn13\.d, x26, x9, vlx4
+[^:]+: 25204410 whilelt pn8\.b, x0, x0, vlx2
+[^:]+: 25206410 whilelt pn8\.b, x0, x0, vlx4
+[^:]+: 25204410 whilelt pn8\.b, x0, x0, vlx2
+[^:]+: 25206410 whilelt pn8\.b, x0, x0, vlx4
+[^:]+: 25204417 whilelt pn15\.b, x0, x0, vlx2
+[^:]+: 252047d0 whilelt pn8\.b, x30, x0, vlx2
+[^:]+: 252047f0 whilelt pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4410 whilelt pn8\.b, x0, x30, vlx2
+[^:]+: 253f4410 whilelt pn8\.b, x0, xzr, vlx2
+[^:]+: 25216693 whilelt pn11\.b, x20, x1, vlx4
+[^:]+: 25604410 whilelt pn8\.h, x0, x0, vlx2
+[^:]+: 25606410 whilelt pn8\.h, x0, x0, vlx4
+[^:]+: 25604410 whilelt pn8\.h, x0, x0, vlx2
+[^:]+: 25606410 whilelt pn8\.h, x0, x0, vlx4
+[^:]+: 25604417 whilelt pn15\.h, x0, x0, vlx2
+[^:]+: 256047d0 whilelt pn8\.h, x30, x0, vlx2
+[^:]+: 256047f0 whilelt pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4410 whilelt pn8\.h, x0, x30, vlx2
+[^:]+: 257f4410 whilelt pn8\.h, x0, xzr, vlx2
+[^:]+: 257965d6 whilelt pn14\.h, x14, x25, vlx4
+[^:]+: 25a04410 whilelt pn8\.s, x0, x0, vlx2
+[^:]+: 25a06410 whilelt pn8\.s, x0, x0, vlx4
+[^:]+: 25a04410 whilelt pn8\.s, x0, x0, vlx2
+[^:]+: 25a06410 whilelt pn8\.s, x0, x0, vlx4
+[^:]+: 25a04417 whilelt pn15\.s, x0, x0, vlx2
+[^:]+: 25a047d0 whilelt pn8\.s, x30, x0, vlx2
+[^:]+: 25a047f0 whilelt pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4410 whilelt pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4410 whilelt pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4491 whilelt pn9\.s, x4, x27, vlx2
+[^:]+: 25e04410 whilelt pn8\.d, x0, x0, vlx2
+[^:]+: 25e06410 whilelt pn8\.d, x0, x0, vlx4
+[^:]+: 25e04410 whilelt pn8\.d, x0, x0, vlx2
+[^:]+: 25e06410 whilelt pn8\.d, x0, x0, vlx4
+[^:]+: 25e04417 whilelt pn15\.d, x0, x0, vlx2
+[^:]+: 25e047d0 whilelt pn8\.d, x30, x0, vlx2
+[^:]+: 25e047f0 whilelt pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4410 whilelt pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4410 whilelt pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96755 whilelt pn13\.d, x26, x9, vlx4
+[^:]+: 25204c10 whilelo pn8\.b, x0, x0, vlx2
+[^:]+: 25206c10 whilelo pn8\.b, x0, x0, vlx4
+[^:]+: 25204c10 whilelo pn8\.b, x0, x0, vlx2
+[^:]+: 25206c10 whilelo pn8\.b, x0, x0, vlx4
+[^:]+: 25204c17 whilelo pn15\.b, x0, x0, vlx2
+[^:]+: 25204fd0 whilelo pn8\.b, x30, x0, vlx2
+[^:]+: 25204ff0 whilelo pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4c10 whilelo pn8\.b, x0, x30, vlx2
+[^:]+: 253f4c10 whilelo pn8\.b, x0, xzr, vlx2
+[^:]+: 25216e93 whilelo pn11\.b, x20, x1, vlx4
+[^:]+: 25604c10 whilelo pn8\.h, x0, x0, vlx2
+[^:]+: 25606c10 whilelo pn8\.h, x0, x0, vlx4
+[^:]+: 25604c10 whilelo pn8\.h, x0, x0, vlx2
+[^:]+: 25606c10 whilelo pn8\.h, x0, x0, vlx4
+[^:]+: 25604c17 whilelo pn15\.h, x0, x0, vlx2
+[^:]+: 25604fd0 whilelo pn8\.h, x30, x0, vlx2
+[^:]+: 25604ff0 whilelo pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4c10 whilelo pn8\.h, x0, x30, vlx2
+[^:]+: 257f4c10 whilelo pn8\.h, x0, xzr, vlx2
+[^:]+: 25796dd6 whilelo pn14\.h, x14, x25, vlx4
+[^:]+: 25a04c10 whilelo pn8\.s, x0, x0, vlx2
+[^:]+: 25a06c10 whilelo pn8\.s, x0, x0, vlx4
+[^:]+: 25a04c10 whilelo pn8\.s, x0, x0, vlx2
+[^:]+: 25a06c10 whilelo pn8\.s, x0, x0, vlx4
+[^:]+: 25a04c17 whilelo pn15\.s, x0, x0, vlx2
+[^:]+: 25a04fd0 whilelo pn8\.s, x30, x0, vlx2
+[^:]+: 25a04ff0 whilelo pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4c10 whilelo pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4c10 whilelo pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4c91 whilelo pn9\.s, x4, x27, vlx2
+[^:]+: 25e04c10 whilelo pn8\.d, x0, x0, vlx2
+[^:]+: 25e06c10 whilelo pn8\.d, x0, x0, vlx4
+[^:]+: 25e04c10 whilelo pn8\.d, x0, x0, vlx2
+[^:]+: 25e06c10 whilelo pn8\.d, x0, x0, vlx4
+[^:]+: 25e04c17 whilelo pn15\.d, x0, x0, vlx2
+[^:]+: 25e04fd0 whilelo pn8\.d, x30, x0, vlx2
+[^:]+: 25e04ff0 whilelo pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4c10 whilelo pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4c10 whilelo pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96f55 whilelo pn13\.d, x26, x9, vlx4
+[^:]+: 25204c18 whilels pn8\.b, x0, x0, vlx2
+[^:]+: 25206c18 whilels pn8\.b, x0, x0, vlx4
+[^:]+: 25204c18 whilels pn8\.b, x0, x0, vlx2
+[^:]+: 25206c18 whilels pn8\.b, x0, x0, vlx4
+[^:]+: 25204c1f whilels pn15\.b, x0, x0, vlx2
+[^:]+: 25204fd8 whilels pn8\.b, x30, x0, vlx2
+[^:]+: 25204ff8 whilels pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4c18 whilels pn8\.b, x0, x30, vlx2
+[^:]+: 253f4c18 whilels pn8\.b, x0, xzr, vlx2
+[^:]+: 25216e9b whilels pn11\.b, x20, x1, vlx4
+[^:]+: 25604c18 whilels pn8\.h, x0, x0, vlx2
+[^:]+: 25606c18 whilels pn8\.h, x0, x0, vlx4
+[^:]+: 25604c18 whilels pn8\.h, x0, x0, vlx2
+[^:]+: 25606c18 whilels pn8\.h, x0, x0, vlx4
+[^:]+: 25604c1f whilels pn15\.h, x0, x0, vlx2
+[^:]+: 25604fd8 whilels pn8\.h, x30, x0, vlx2
+[^:]+: 25604ff8 whilels pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4c18 whilels pn8\.h, x0, x30, vlx2
+[^:]+: 257f4c18 whilels pn8\.h, x0, xzr, vlx2
+[^:]+: 25796dde whilels pn14\.h, x14, x25, vlx4
+[^:]+: 25a04c18 whilels pn8\.s, x0, x0, vlx2
+[^:]+: 25a06c18 whilels pn8\.s, x0, x0, vlx4
+[^:]+: 25a04c18 whilels pn8\.s, x0, x0, vlx2
+[^:]+: 25a06c18 whilels pn8\.s, x0, x0, vlx4
+[^:]+: 25a04c1f whilels pn15\.s, x0, x0, vlx2
+[^:]+: 25a04fd8 whilels pn8\.s, x30, x0, vlx2
+[^:]+: 25a04ff8 whilels pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4c18 whilels pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4c18 whilels pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4c99 whilels pn9\.s, x4, x27, vlx2
+[^:]+: 25e04c18 whilels pn8\.d, x0, x0, vlx2
+[^:]+: 25e06c18 whilels pn8\.d, x0, x0, vlx4
+[^:]+: 25e04c18 whilels pn8\.d, x0, x0, vlx2
+[^:]+: 25e06c18 whilels pn8\.d, x0, x0, vlx4
+[^:]+: 25e04c1f whilels pn15\.d, x0, x0, vlx2
+[^:]+: 25e04fd8 whilels pn8\.d, x30, x0, vlx2
+[^:]+: 25e04ff8 whilels pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4c18 whilels pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4c18 whilels pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96f5d whilels pn13\.d, x26, x9, vlx4
diff --git a/gas/testsuite/gas/aarch64/sme2-7.s b/gas/testsuite/gas/aarch64/sme2-7.s
new file mode 100644
index 00000000000..e064a6a6bfa
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7.s
@@ -0,0 +1,351 @@
+ whilege pn8.b, x0, x0, vlx2
+ whilege pn8.b, x0, x0, vlx4
+ WHILEGE PN8.B, X0, X0, VLx2
+ WHILEGE PN8.B, X0, X0, VLx4
+ whilege pn15.b, x0, x0, vlx2
+ whilege pn8.b, x30, x0, vlx2
+ whilege pn8.b, xzr, x0, vlx2
+ whilege pn8.b, x0, x30, vlx2
+ whilege pn8.b, x0, xzr, vlx2
+ whilege pn11.b, x20, x1, vlx4
+
+ whilege pn8.h, x0, x0, vlx2
+ whilege pn8.h, x0, x0, vlx4
+ WHILEGE PN8.h, X0, X0, VLx2
+ WHILEGE PN8.h, X0, X0, VLx4
+ whilege pn15.h, x0, x0, vlx2
+ whilege pn8.h, x30, x0, vlx2
+ whilege pn8.h, xzr, x0, vlx2
+ whilege pn8.h, x0, x30, vlx2
+ whilege pn8.h, x0, xzr, vlx2
+ whilege pn14.h, x14, x25, vlx4
+
+ whilege pn8.s, x0, x0, vlx2
+ whilege pn8.s, x0, x0, vlx4
+ WHILEGE PN8.s, X0, X0, VLx2
+ WHILEGE PN8.s, X0, X0, VLx4
+ whilege pn15.s, x0, x0, vlx2
+ whilege pn8.s, x30, x0, vlx2
+ whilege pn8.s, xzr, x0, vlx2
+ whilege pn8.s, x0, x30, vlx2
+ whilege pn8.s, x0, xzr, vlx2
+ whilege pn9.s, x4, x27, vlx2
+
+ whilege pn8.d, x0, x0, vlx2
+ whilege pn8.d, x0, x0, vlx4
+ WHILEGE PN8.d, X0, X0, VLx2
+ WHILEGE PN8.d, X0, X0, VLx4
+ whilege pn15.d, x0, x0, vlx2
+ whilege pn8.d, x30, x0, vlx2
+ whilege pn8.d, xzr, x0, vlx2
+ whilege pn8.d, x0, x30, vlx2
+ whilege pn8.d, x0, xzr, vlx2
+ whilege pn13.d, x26, x9, vlx4
+
+ whilegt pn8.b, x0, x0, vlx2
+ whilegt pn8.b, x0, x0, vlx4
+ WHILEGT PN8.B, X0, X0, VLx2
+ WHILEGT PN8.B, X0, X0, VLx4
+ whilegt pn15.b, x0, x0, vlx2
+ whilegt pn8.b, x30, x0, vlx2
+ whilegt pn8.b, xzr, x0, vlx2
+ whilegt pn8.b, x0, x30, vlx2
+ whilegt pn8.b, x0, xzr, vlx2
+ whilegt pn11.b, x20, x1, vlx4
+
+ whilegt pn8.h, x0, x0, vlx2
+ whilegt pn8.h, x0, x0, vlx4
+ WHILEGT PN8.h, X0, X0, VLx2
+ WHILEGT PN8.h, X0, X0, VLx4
+ whilegt pn15.h, x0, x0, vlx2
+ whilegt pn8.h, x30, x0, vlx2
+ whilegt pn8.h, xzr, x0, vlx2
+ whilegt pn8.h, x0, x30, vlx2
+ whilegt pn8.h, x0, xzr, vlx2
+ whilegt pn14.h, x14, x25, vlx4
+
+ whilegt pn8.s, x0, x0, vlx2
+ whilegt pn8.s, x0, x0, vlx4
+ WHILEGT PN8.s, X0, X0, VLx2
+ WHILEGT PN8.s, X0, X0, VLx4
+ whilegt pn15.s, x0, x0, vlx2
+ whilegt pn8.s, x30, x0, vlx2
+ whilegt pn8.s, xzr, x0, vlx2
+ whilegt pn8.s, x0, x30, vlx2
+ whilegt pn8.s, x0, xzr, vlx2
+ whilegt pn9.s, x4, x27, vlx2
+
+ whilegt pn8.d, x0, x0, vlx2
+ whilegt pn8.d, x0, x0, vlx4
+ WHILEGT PN8.d, X0, X0, VLx2
+ WHILEGT PN8.d, X0, X0, VLx4
+ whilegt pn15.d, x0, x0, vlx2
+ whilegt pn8.d, x30, x0, vlx2
+ whilegt pn8.d, xzr, x0, vlx2
+ whilegt pn8.d, x0, x30, vlx2
+ whilegt pn8.d, x0, xzr, vlx2
+ whilegt pn13.d, x26, x9, vlx4
+
+ whilehi pn8.b, x0, x0, vlx2
+ whilehi pn8.b, x0, x0, vlx4
+ WHILEHI PN8.B, X0, X0, VLx2
+ WHILEHI PN8.B, X0, X0, VLx4
+ whilehi pn15.b, x0, x0, vlx2
+ whilehi pn8.b, x30, x0, vlx2
+ whilehi pn8.b, xzr, x0, vlx2
+ whilehi pn8.b, x0, x30, vlx2
+ whilehi pn8.b, x0, xzr, vlx2
+ whilehi pn11.b, x20, x1, vlx4
+
+ whilehi pn8.h, x0, x0, vlx2
+ whilehi pn8.h, x0, x0, vlx4
+ WHILEHI PN8.h, X0, X0, VLx2
+ WHILEHI PN8.h, X0, X0, VLx4
+ whilehi pn15.h, x0, x0, vlx2
+ whilehi pn8.h, x30, x0, vlx2
+ whilehi pn8.h, xzr, x0, vlx2
+ whilehi pn8.h, x0, x30, vlx2
+ whilehi pn8.h, x0, xzr, vlx2
+ whilehi pn14.h, x14, x25, vlx4
+
+ whilehi pn8.s, x0, x0, vlx2
+ whilehi pn8.s, x0, x0, vlx4
+ WHILEHI PN8.s, X0, X0, VLx2
+ WHILEHI PN8.s, X0, X0, VLx4
+ whilehi pn15.s, x0, x0, vlx2
+ whilehi pn8.s, x30, x0, vlx2
+ whilehi pn8.s, xzr, x0, vlx2
+ whilehi pn8.s, x0, x30, vlx2
+ whilehi pn8.s, x0, xzr, vlx2
+ whilehi pn9.s, x4, x27, vlx2
+
+ whilehi pn8.d, x0, x0, vlx2
+ whilehi pn8.d, x0, x0, vlx4
+ WHILEHI PN8.d, X0, X0, VLx2
+ WHILEHI PN8.d, X0, X0, VLx4
+ whilehi pn15.d, x0, x0, vlx2
+ whilehi pn8.d, x30, x0, vlx2
+ whilehi pn8.d, xzr, x0, vlx2
+ whilehi pn8.d, x0, x30, vlx2
+ whilehi pn8.d, x0, xzr, vlx2
+ whilehi pn13.d, x26, x9, vlx4
+
+ whilehs pn8.b, x0, x0, vlx2
+ whilehs pn8.b, x0, x0, vlx4
+ WHILEHS PN8.B, X0, X0, VLx2
+ WHILEHS PN8.B, X0, X0, VLx4
+ whilehs pn15.b, x0, x0, vlx2
+ whilehs pn8.b, x30, x0, vlx2
+ whilehs pn8.b, xzr, x0, vlx2
+ whilehs pn8.b, x0, x30, vlx2
+ whilehs pn8.b, x0, xzr, vlx2
+ whilehs pn11.b, x20, x1, vlx4
+
+ whilehs pn8.h, x0, x0, vlx2
+ whilehs pn8.h, x0, x0, vlx4
+ WHILEHS PN8.h, X0, X0, VLx2
+ WHILEHS PN8.h, X0, X0, VLx4
+ whilehs pn15.h, x0, x0, vlx2
+ whilehs pn8.h, x30, x0, vlx2
+ whilehs pn8.h, xzr, x0, vlx2
+ whilehs pn8.h, x0, x30, vlx2
+ whilehs pn8.h, x0, xzr, vlx2
+ whilehs pn14.h, x14, x25, vlx4
+
+ whilehs pn8.s, x0, x0, vlx2
+ whilehs pn8.s, x0, x0, vlx4
+ WHILEHS PN8.s, X0, X0, VLx2
+ WHILEHS PN8.s, X0, X0, VLx4
+ whilehs pn15.s, x0, x0, vlx2
+ whilehs pn8.s, x30, x0, vlx2
+ whilehs pn8.s, xzr, x0, vlx2
+ whilehs pn8.s, x0, x30, vlx2
+ whilehs pn8.s, x0, xzr, vlx2
+ whilehs pn9.s, x4, x27, vlx2
+
+ whilehs pn8.d, x0, x0, vlx2
+ whilehs pn8.d, x0, x0, vlx4
+ WHILEHS PN8.d, X0, X0, VLx2
+ WHILEHS PN8.d, X0, X0, VLx4
+ whilehs pn15.d, x0, x0, vlx2
+ whilehs pn8.d, x30, x0, vlx2
+ whilehs pn8.d, xzr, x0, vlx2
+ whilehs pn8.d, x0, x30, vlx2
+ whilehs pn8.d, x0, xzr, vlx2
+ whilehs pn13.d, x26, x9, vlx4
+
+ whilele pn8.b, x0, x0, vlx2
+ whilele pn8.b, x0, x0, vlx4
+ WHILELE PN8.B, X0, X0, VLx2
+ WHILELE PN8.B, X0, X0, VLx4
+ whilele pn15.b, x0, x0, vlx2
+ whilele pn8.b, x30, x0, vlx2
+ whilele pn8.b, xzr, x0, vlx2
+ whilele pn8.b, x0, x30, vlx2
+ whilele pn8.b, x0, xzr, vlx2
+ whilele pn11.b, x20, x1, vlx4
+
+ whilele pn8.h, x0, x0, vlx2
+ whilele pn8.h, x0, x0, vlx4
+ WHILELE PN8.h, X0, X0, VLx2
+ WHILELE PN8.h, X0, X0, VLx4
+ whilele pn15.h, x0, x0, vlx2
+ whilele pn8.h, x30, x0, vlx2
+ whilele pn8.h, xzr, x0, vlx2
+ whilele pn8.h, x0, x30, vlx2
+ whilele pn8.h, x0, xzr, vlx2
+ whilele pn14.h, x14, x25, vlx4
+
+ whilele pn8.s, x0, x0, vlx2
+ whilele pn8.s, x0, x0, vlx4
+ WHILELE PN8.s, X0, X0, VLx2
+ WHILELE PN8.s, X0, X0, VLx4
+ whilele pn15.s, x0, x0, vlx2
+ whilele pn8.s, x30, x0, vlx2
+ whilele pn8.s, xzr, x0, vlx2
+ whilele pn8.s, x0, x30, vlx2
+ whilele pn8.s, x0, xzr, vlx2
+ whilele pn9.s, x4, x27, vlx2
+
+ whilele pn8.d, x0, x0, vlx2
+ whilele pn8.d, x0, x0, vlx4
+ WHILELE PN8.d, X0, X0, VLx2
+ WHILELE PN8.d, X0, X0, VLx4
+ whilele pn15.d, x0, x0, vlx2
+ whilele pn8.d, x30, x0, vlx2
+ whilele pn8.d, xzr, x0, vlx2
+ whilele pn8.d, x0, x30, vlx2
+ whilele pn8.d, x0, xzr, vlx2
+ whilele pn13.d, x26, x9, vlx4
+
+ whilelt pn8.b, x0, x0, vlx2
+ whilelt pn8.b, x0, x0, vlx4
+ WHILELT PN8.B, X0, X0, VLx2
+ WHILELT PN8.B, X0, X0, VLx4
+ whilelt pn15.b, x0, x0, vlx2
+ whilelt pn8.b, x30, x0, vlx2
+ whilelt pn8.b, xzr, x0, vlx2
+ whilelt pn8.b, x0, x30, vlx2
+ whilelt pn8.b, x0, xzr, vlx2
+ whilelt pn11.b, x20, x1, vlx4
+
+ whilelt pn8.h, x0, x0, vlx2
+ whilelt pn8.h, x0, x0, vlx4
+ WHILELT PN8.h, X0, X0, VLx2
+ WHILELT PN8.h, X0, X0, VLx4
+ whilelt pn15.h, x0, x0, vlx2
+ whilelt pn8.h, x30, x0, vlx2
+ whilelt pn8.h, xzr, x0, vlx2
+ whilelt pn8.h, x0, x30, vlx2
+ whilelt pn8.h, x0, xzr, vlx2
+ whilelt pn14.h, x14, x25, vlx4
+
+ whilelt pn8.s, x0, x0, vlx2
+ whilelt pn8.s, x0, x0, vlx4
+ WHILELT PN8.s, X0, X0, VLx2
+ WHILELT PN8.s, X0, X0, VLx4
+ whilelt pn15.s, x0, x0, vlx2
+ whilelt pn8.s, x30, x0, vlx2
+ whilelt pn8.s, xzr, x0, vlx2
+ whilelt pn8.s, x0, x30, vlx2
+ whilelt pn8.s, x0, xzr, vlx2
+ whilelt pn9.s, x4, x27, vlx2
+
+ whilelt pn8.d, x0, x0, vlx2
+ whilelt pn8.d, x0, x0, vlx4
+ WHILELT PN8.d, X0, X0, VLx2
+ WHILELT PN8.d, X0, X0, VLx4
+ whilelt pn15.d, x0, x0, vlx2
+ whilelt pn8.d, x30, x0, vlx2
+ whilelt pn8.d, xzr, x0, vlx2
+ whilelt pn8.d, x0, x30, vlx2
+ whilelt pn8.d, x0, xzr, vlx2
+ whilelt pn13.d, x26, x9, vlx4
+
+ whilelo pn8.b, x0, x0, vlx2
+ whilelo pn8.b, x0, x0, vlx4
+ WHILELO PN8.B, X0, X0, VLx2
+ WHILELO PN8.B, X0, X0, VLx4
+ whilelo pn15.b, x0, x0, vlx2
+ whilelo pn8.b, x30, x0, vlx2
+ whilelo pn8.b, xzr, x0, vlx2
+ whilelo pn8.b, x0, x30, vlx2
+ whilelo pn8.b, x0, xzr, vlx2
+ whilelo pn11.b, x20, x1, vlx4
+
+ whilelo pn8.h, x0, x0, vlx2
+ whilelo pn8.h, x0, x0, vlx4
+ WHILELO PN8.h, X0, X0, VLx2
+ WHILELO PN8.h, X0, X0, VLx4
+ whilelo pn15.h, x0, x0, vlx2
+ whilelo pn8.h, x30, x0, vlx2
+ whilelo pn8.h, xzr, x0, vlx2
+ whilelo pn8.h, x0, x30, vlx2
+ whilelo pn8.h, x0, xzr, vlx2
+ whilelo pn14.h, x14, x25, vlx4
+
+ whilelo pn8.s, x0, x0, vlx2
+ whilelo pn8.s, x0, x0, vlx4
+ WHILELO PN8.s, X0, X0, VLx2
+ WHILELO PN8.s, X0, X0, VLx4
+ whilelo pn15.s, x0, x0, vlx2
+ whilelo pn8.s, x30, x0, vlx2
+ whilelo pn8.s, xzr, x0, vlx2
+ whilelo pn8.s, x0, x30, vlx2
+ whilelo pn8.s, x0, xzr, vlx2
+ whilelo pn9.s, x4, x27, vlx2
+
+ whilelo pn8.d, x0, x0, vlx2
+ whilelo pn8.d, x0, x0, vlx4
+ WHILELO PN8.d, X0, X0, VLx2
+ WHILELO PN8.d, X0, X0, VLx4
+ whilelo pn15.d, x0, x0, vlx2
+ whilelo pn8.d, x30, x0, vlx2
+ whilelo pn8.d, xzr, x0, vlx2
+ whilelo pn8.d, x0, x30, vlx2
+ whilelo pn8.d, x0, xzr, vlx2
+ whilelo pn13.d, x26, x9, vlx4
+
+ whilels pn8.b, x0, x0, vlx2
+ whilels pn8.b, x0, x0, vlx4
+ WHILELS PN8.B, X0, X0, VLx2
+ WHILELS PN8.B, X0, X0, VLx4
+ whilels pn15.b, x0, x0, vlx2
+ whilels pn8.b, x30, x0, vlx2
+ whilels pn8.b, xzr, x0, vlx2
+ whilels pn8.b, x0, x30, vlx2
+ whilels pn8.b, x0, xzr, vlx2
+ whilels pn11.b, x20, x1, vlx4
+
+ whilels pn8.h, x0, x0, vlx2
+ whilels pn8.h, x0, x0, vlx4
+ WHILELS PN8.h, X0, X0, VLx2
+ WHILELS PN8.h, X0, X0, VLx4
+ whilels pn15.h, x0, x0, vlx2
+ whilels pn8.h, x30, x0, vlx2
+ whilels pn8.h, xzr, x0, vlx2
+ whilels pn8.h, x0, x30, vlx2
+ whilels pn8.h, x0, xzr, vlx2
+ whilels pn14.h, x14, x25, vlx4
+
+ whilels pn8.s, x0, x0, vlx2
+ whilels pn8.s, x0, x0, vlx4
+ WHILELS PN8.s, X0, X0, VLx2
+ WHILELS PN8.s, X0, X0, VLx4
+ whilels pn15.s, x0, x0, vlx2
+ whilels pn8.s, x30, x0, vlx2
+ whilels pn8.s, xzr, x0, vlx2
+ whilels pn8.s, x0, x30, vlx2
+ whilels pn8.s, x0, xzr, vlx2
+ whilels pn9.s, x4, x27, vlx2
+
+ whilels pn8.d, x0, x0, vlx2
+ whilels pn8.d, x0, x0, vlx4
+ WHILELS PN8.d, X0, X0, VLx2
+ WHILELS PN8.d, X0, X0, VLx4
+ whilels pn15.d, x0, x0, vlx2
+ whilels pn8.d, x30, x0, vlx2
+ whilels pn8.d, xzr, x0, vlx2
+ whilels pn8.d, x0, x30, vlx2
+ whilels pn8.d, x0, xzr, vlx2
+ whilels pn13.d, x26, x9, vlx4
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l
index 70cfd59b4c1..99aa2860b23 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l
@@ -1,4 +1,7 @@
[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `psel 0,pn0,p0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `psel pn0,0,p0\.b\[w12,0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 3 -- `psel pn0,pn0,0'
[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `psel pn0,p0,p0\.b\[w12,0\]'
[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `psel pn,pn0,p0\.b\[w12,0\]'
[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 3 -- `psel p0,p0,pn0\.b\[w12,0\]'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s
index c0da1d78587..c131457464a 100644
--- a/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s
@@ -1,3 +1,7 @@
+ psel 0, pn0, p0.b[w12, 0]
+ psel pn0, 0, p0.b[w12, 0]
+ psel pn0, pn0, 0
+
psel pn0, p0, p0.b[w12, 0]
psel pn, pn0, p0.b[w12, 0]
psel p0, p0, pn0.b[w12, 0]
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.d
new file mode 100644
index 00000000000..79d4b38d6bb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sve2-sme2-2-invalid.s
+#error_output: sve2-sme2-2-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l
new file mode 100644
index 00000000000..161ea7a0c5b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l
@@ -0,0 +1,25 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b},x0,x0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege {p1\.b-p2\.b},x0,x0'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b-p2\.b},x0,x0'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b-p3\.b},x0,x0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege {p15\.b-p0\.b},x0,x0'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `whilege {p0\.b,p8\.b},x0,x0'
+[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 1 -- `whilege {pn0\.b-pn1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `whilege {p0-p1},x0,x0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `whilege {p0\.q-p1\.q},x0,x0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: whilege {p0\.b-p1\.b}, x0, x0
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: whilege {p0\.h-p1\.h}, x0, x0
+[^ :]+:[0-9]+: Info: whilege {p0\.s-p1\.s}, x0, x0
+[^ :]+:[0-9]+: Info: whilege {p0\.d-p1\.d}, x0, x0
+[^ :]+:[0-9]+: Error: operand mismatch -- `whilege {p0\.b-p1\.b},w0,w0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: whilege {p0\.b-p1\.b}, x0, x0
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: whilege {p0\.h-p1\.h}, x0, x0
+[^ :]+:[0-9]+: Info: whilege {p0\.s-p1\.s}, x0, x0
+[^ :]+:[0-9]+: Info: whilege {p0\.d-p1\.d}, x0, x0
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege {p0\.b-p1\.b},sp,x0'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege {p0\.b-p1\.b},x0,sp'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.s
new file mode 100644
index 00000000000..7f23473c7cc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.s
@@ -0,0 +1,12 @@
+ whilege { p0.b }, x0, x0
+ whilege { p1.b - p2.b }, x0, x0
+ whilege { p0.b - p2.b }, x0, x0
+ whilege { p0.b - p3.b }, x0, x0
+ whilege { p15.b - p0.b }, x0, x0
+ whilege { p0.b, p8.b }, x0, x0
+ whilege { pn0.b - pn1.b }, x0, x0
+ whilege { p0 - p1 }, x0, x0
+ whilege { p0.q - p1.q }, x0, x0
+ whilege { p0.b - p1.b }, w0, w0
+ whilege { p0.b - p1.b }, sp, x0
+ whilege { p0.b - p1.b }, x0, sp
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.d
new file mode 100644
index 00000000000..bbb1787bdaa
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sve2-sme2-2.s
+#error_output: sve2-sme2-2-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l
new file mode 100644
index 00000000000..3152dd8a809
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l
@@ -0,0 +1,257 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.B-P1\.B},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.b-p15\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.b-p5\.b},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.h-P1\.h},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.h-p15\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.h-p5\.h},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.s-P1\.s},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.s-p15\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.s-p5\.s},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.d-P1\.d},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.d-p15\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.d-p5\.d},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.B-P1\.B},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.b-p15\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.b-p5\.b},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.h-P1\.h},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.h-p15\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.h-p5\.h},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.s-P1\.s},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.s-p15\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.s-p5\.s},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.d-P1\.d},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.d-p15\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.d-p5\.d},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.B-P1\.B},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.b-p15\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.b-p5\.b},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.h-P1\.h},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.h-p15\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.h-p5\.h},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.s-P1\.s},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.s-p15\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.s-p5\.s},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.d-P1\.d},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.d-p15\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.d-p5\.d},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.B-P1\.B},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.b-p15\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.b-p5\.b},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.h-P1\.h},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.h-p15\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.h-p5\.h},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.s-P1\.s},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.s-p15\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.s-p5\.s},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.d-P1\.d},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.d-p15\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.d-p5\.d},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.B-P1\.B},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.b-p15\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.b-p5\.b},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.h-P1\.h},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.h-p15\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.h-p5\.h},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.s-P1\.s},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.s-p15\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.s-p5\.s},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.d-P1\.d},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.d-p15\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.d-p5\.d},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.B-P1\.B},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.b-p15\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.b-p5\.b},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.h-P1\.h},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.h-p15\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.h-p5\.h},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.s-P1\.s},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.s-p15\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.s-p5\.s},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.d-P1\.d},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.d-p15\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.d-p5\.d},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.B-P1\.B},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.b-p15\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.b-p5\.b},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.h-P1\.h},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.h-p15\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.h-p5\.h},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.s-P1\.s},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.s-p15\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.s-p5\.s},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.d-P1\.d},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.d-p15\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.d-p5\.d},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.B-P1\.B},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.b-p15\.b},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.b-p5\.b},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.h-P1\.h},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.h-p15\.h},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.h-p5\.h},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.s-P1\.s},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.s-p15\.s},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.s-p5\.s},x17,x19'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.d-P1\.d},X0,X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.d-p15\.d},x0,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x30,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},xzr,x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.d-p5\.d},x17,x19'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2.d b/gas/testsuite/gas/aarch64/sve2-sme2-2.d
new file mode 100644
index 00000000000..9e60d1fd9b0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2.d
@@ -0,0 +1,265 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
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diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2.s b/gas/testsuite/gas/aarch64/sve2-sme2-2.s
new file mode 100644
index 00000000000..b9175e80d7d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-2.s
@@ -0,0 +1,287 @@
+ whilege { p0.b - p1.b }, x0, x0
+ WHILEGE { P0.B - P1.B }, X0, X0
+ whilege { p14.b - p15.b }, x0, x0
+ whilege { p0.b - p1.b }, x30, x0
+ whilege { p0.b - p1.b }, xzr, x0
+ whilege { p0.b - p1.b }, x0, x30
+ whilege { p0.b - p1.b }, x0, xzr
+ whilege { p4.b - p5.b }, x17, x19
+
+ whilege { p0.h - p1.h }, x0, x0
+ WHILEGE { P0.h - P1.h }, X0, X0
+ whilege { p14.h - p15.h }, x0, x0
+ whilege { p0.h - p1.h }, x30, x0
+ whilege { p0.h - p1.h }, xzr, x0
+ whilege { p0.h - p1.h }, x0, x30
+ whilege { p0.h - p1.h }, x0, xzr
+ whilege { p4.h - p5.h }, x17, x19
+
+ whilege { p0.s - p1.s }, x0, x0
+ WHILEGE { P0.s - P1.s }, X0, X0
+ whilege { p14.s - p15.s }, x0, x0
+ whilege { p0.s - p1.s }, x30, x0
+ whilege { p0.s - p1.s }, xzr, x0
+ whilege { p0.s - p1.s }, x0, x30
+ whilege { p0.s - p1.s }, x0, xzr
+ whilege { p4.s - p5.s }, x17, x19
+
+ whilege { p0.d - p1.d }, x0, x0
+ WHILEGE { P0.d - P1.d }, X0, X0
+ whilege { p14.d - p15.d }, x0, x0
+ whilege { p0.d - p1.d }, x30, x0
+ whilege { p0.d - p1.d }, xzr, x0
+ whilege { p0.d - p1.d }, x0, x30
+ whilege { p0.d - p1.d }, x0, xzr
+ whilege { p4.d - p5.d }, x17, x19
+
+ whilegt { p0.b - p1.b }, x0, x0
+ WHILEGT { P0.B - P1.B }, X0, X0
+ whilegt { p14.b - p15.b }, x0, x0
+ whilegt { p0.b - p1.b }, x30, x0
+ whilegt { p0.b - p1.b }, xzr, x0
+ whilegt { p0.b - p1.b }, x0, x30
+ whilegt { p0.b - p1.b }, x0, xzr
+ whilegt { p4.b - p5.b }, x17, x19
+
+ whilegt { p0.h - p1.h }, x0, x0
+ WHILEGT { P0.h - P1.h }, X0, X0
+ whilegt { p14.h - p15.h }, x0, x0
+ whilegt { p0.h - p1.h }, x30, x0
+ whilegt { p0.h - p1.h }, xzr, x0
+ whilegt { p0.h - p1.h }, x0, x30
+ whilegt { p0.h - p1.h }, x0, xzr
+ whilegt { p4.h - p5.h }, x17, x19
+
+ whilegt { p0.s - p1.s }, x0, x0
+ WHILEGT { P0.s - P1.s }, X0, X0
+ whilegt { p14.s - p15.s }, x0, x0
+ whilegt { p0.s - p1.s }, x30, x0
+ whilegt { p0.s - p1.s }, xzr, x0
+ whilegt { p0.s - p1.s }, x0, x30
+ whilegt { p0.s - p1.s }, x0, xzr
+ whilegt { p4.s - p5.s }, x17, x19
+
+ whilegt { p0.d - p1.d }, x0, x0
+ WHILEGT { P0.d - P1.d }, X0, X0
+ whilegt { p14.d - p15.d }, x0, x0
+ whilegt { p0.d - p1.d }, x30, x0
+ whilegt { p0.d - p1.d }, xzr, x0
+ whilegt { p0.d - p1.d }, x0, x30
+ whilegt { p0.d - p1.d }, x0, xzr
+ whilegt { p4.d - p5.d }, x17, x19
+
+ whilehi { p0.b - p1.b }, x0, x0
+ WHILEHI { P0.B - P1.B }, X0, X0
+ whilehi { p14.b - p15.b }, x0, x0
+ whilehi { p0.b - p1.b }, x30, x0
+ whilehi { p0.b - p1.b }, xzr, x0
+ whilehi { p0.b - p1.b }, x0, x30
+ whilehi { p0.b - p1.b }, x0, xzr
+ whilehi { p4.b - p5.b }, x17, x19
+
+ whilehi { p0.h - p1.h }, x0, x0
+ WHILEHI { P0.h - P1.h }, X0, X0
+ whilehi { p14.h - p15.h }, x0, x0
+ whilehi { p0.h - p1.h }, x30, x0
+ whilehi { p0.h - p1.h }, xzr, x0
+ whilehi { p0.h - p1.h }, x0, x30
+ whilehi { p0.h - p1.h }, x0, xzr
+ whilehi { p4.h - p5.h }, x17, x19
+
+ whilehi { p0.s - p1.s }, x0, x0
+ WHILEHI { P0.s - P1.s }, X0, X0
+ whilehi { p14.s - p15.s }, x0, x0
+ whilehi { p0.s - p1.s }, x30, x0
+ whilehi { p0.s - p1.s }, xzr, x0
+ whilehi { p0.s - p1.s }, x0, x30
+ whilehi { p0.s - p1.s }, x0, xzr
+ whilehi { p4.s - p5.s }, x17, x19
+
+ whilehi { p0.d - p1.d }, x0, x0
+ WHILEHI { P0.d - P1.d }, X0, X0
+ whilehi { p14.d - p15.d }, x0, x0
+ whilehi { p0.d - p1.d }, x30, x0
+ whilehi { p0.d - p1.d }, xzr, x0
+ whilehi { p0.d - p1.d }, x0, x30
+ whilehi { p0.d - p1.d }, x0, xzr
+ whilehi { p4.d - p5.d }, x17, x19
+
+ whilehs { p0.b - p1.b }, x0, x0
+ WHILEHS { P0.B - P1.B }, X0, X0
+ whilehs { p14.b - p15.b }, x0, x0
+ whilehs { p0.b - p1.b }, x30, x0
+ whilehs { p0.b - p1.b }, xzr, x0
+ whilehs { p0.b - p1.b }, x0, x30
+ whilehs { p0.b - p1.b }, x0, xzr
+ whilehs { p4.b - p5.b }, x17, x19
+
+ whilehs { p0.h - p1.h }, x0, x0
+ WHILEHS { P0.h - P1.h }, X0, X0
+ whilehs { p14.h - p15.h }, x0, x0
+ whilehs { p0.h - p1.h }, x30, x0
+ whilehs { p0.h - p1.h }, xzr, x0
+ whilehs { p0.h - p1.h }, x0, x30
+ whilehs { p0.h - p1.h }, x0, xzr
+ whilehs { p4.h - p5.h }, x17, x19
+
+ whilehs { p0.s - p1.s }, x0, x0
+ WHILEHS { P0.s - P1.s }, X0, X0
+ whilehs { p14.s - p15.s }, x0, x0
+ whilehs { p0.s - p1.s }, x30, x0
+ whilehs { p0.s - p1.s }, xzr, x0
+ whilehs { p0.s - p1.s }, x0, x30
+ whilehs { p0.s - p1.s }, x0, xzr
+ whilehs { p4.s - p5.s }, x17, x19
+
+ whilehs { p0.d - p1.d }, x0, x0
+ WHILEHS { P0.d - P1.d }, X0, X0
+ whilehs { p14.d - p15.d }, x0, x0
+ whilehs { p0.d - p1.d }, x30, x0
+ whilehs { p0.d - p1.d }, xzr, x0
+ whilehs { p0.d - p1.d }, x0, x30
+ whilehs { p0.d - p1.d }, x0, xzr
+ whilehs { p4.d - p5.d }, x17, x19
+
+ whilele { p0.b - p1.b }, x0, x0
+ WHILELE { P0.B - P1.B }, X0, X0
+ whilele { p14.b - p15.b }, x0, x0
+ whilele { p0.b - p1.b }, x30, x0
+ whilele { p0.b - p1.b }, xzr, x0
+ whilele { p0.b - p1.b }, x0, x30
+ whilele { p0.b - p1.b }, x0, xzr
+ whilele { p4.b - p5.b }, x17, x19
+
+ whilele { p0.h - p1.h }, x0, x0
+ WHILELE { P0.h - P1.h }, X0, X0
+ whilele { p14.h - p15.h }, x0, x0
+ whilele { p0.h - p1.h }, x30, x0
+ whilele { p0.h - p1.h }, xzr, x0
+ whilele { p0.h - p1.h }, x0, x30
+ whilele { p0.h - p1.h }, x0, xzr
+ whilele { p4.h - p5.h }, x17, x19
+
+ whilele { p0.s - p1.s }, x0, x0
+ WHILELE { P0.s - P1.s }, X0, X0
+ whilele { p14.s - p15.s }, x0, x0
+ whilele { p0.s - p1.s }, x30, x0
+ whilele { p0.s - p1.s }, xzr, x0
+ whilele { p0.s - p1.s }, x0, x30
+ whilele { p0.s - p1.s }, x0, xzr
+ whilele { p4.s - p5.s }, x17, x19
+
+ whilele { p0.d - p1.d }, x0, x0
+ WHILELE { P0.d - P1.d }, X0, X0
+ whilele { p14.d - p15.d }, x0, x0
+ whilele { p0.d - p1.d }, x30, x0
+ whilele { p0.d - p1.d }, xzr, x0
+ whilele { p0.d - p1.d }, x0, x30
+ whilele { p0.d - p1.d }, x0, xzr
+ whilele { p4.d - p5.d }, x17, x19
+
+ whilelo { p0.b - p1.b }, x0, x0
+ WHILELO { P0.B - P1.B }, X0, X0
+ whilelo { p14.b - p15.b }, x0, x0
+ whilelo { p0.b - p1.b }, x30, x0
+ whilelo { p0.b - p1.b }, xzr, x0
+ whilelo { p0.b - p1.b }, x0, x30
+ whilelo { p0.b - p1.b }, x0, xzr
+ whilelo { p4.b - p5.b }, x17, x19
+
+ whilelo { p0.h - p1.h }, x0, x0
+ WHILELO { P0.h - P1.h }, X0, X0
+ whilelo { p14.h - p15.h }, x0, x0
+ whilelo { p0.h - p1.h }, x30, x0
+ whilelo { p0.h - p1.h }, xzr, x0
+ whilelo { p0.h - p1.h }, x0, x30
+ whilelo { p0.h - p1.h }, x0, xzr
+ whilelo { p4.h - p5.h }, x17, x19
+
+ whilelo { p0.s - p1.s }, x0, x0
+ WHILELO { P0.s - P1.s }, X0, X0
+ whilelo { p14.s - p15.s }, x0, x0
+ whilelo { p0.s - p1.s }, x30, x0
+ whilelo { p0.s - p1.s }, xzr, x0
+ whilelo { p0.s - p1.s }, x0, x30
+ whilelo { p0.s - p1.s }, x0, xzr
+ whilelo { p4.s - p5.s }, x17, x19
+
+ whilelo { p0.d - p1.d }, x0, x0
+ WHILELO { P0.d - P1.d }, X0, X0
+ whilelo { p14.d - p15.d }, x0, x0
+ whilelo { p0.d - p1.d }, x30, x0
+ whilelo { p0.d - p1.d }, xzr, x0
+ whilelo { p0.d - p1.d }, x0, x30
+ whilelo { p0.d - p1.d }, x0, xzr
+ whilelo { p4.d - p5.d }, x17, x19
+
+ whilels { p0.b - p1.b }, x0, x0
+ WHILELS { P0.B - P1.B }, X0, X0
+ whilels { p14.b - p15.b }, x0, x0
+ whilels { p0.b - p1.b }, x30, x0
+ whilels { p0.b - p1.b }, xzr, x0
+ whilels { p0.b - p1.b }, x0, x30
+ whilels { p0.b - p1.b }, x0, xzr
+ whilels { p4.b - p5.b }, x17, x19
+
+ whilels { p0.h - p1.h }, x0, x0
+ WHILELS { P0.h - P1.h }, X0, X0
+ whilels { p14.h - p15.h }, x0, x0
+ whilels { p0.h - p1.h }, x30, x0
+ whilels { p0.h - p1.h }, xzr, x0
+ whilels { p0.h - p1.h }, x0, x30
+ whilels { p0.h - p1.h }, x0, xzr
+ whilels { p4.h - p5.h }, x17, x19
+
+ whilels { p0.s - p1.s }, x0, x0
+ WHILELS { P0.s - P1.s }, X0, X0
+ whilels { p14.s - p15.s }, x0, x0
+ whilels { p0.s - p1.s }, x30, x0
+ whilels { p0.s - p1.s }, xzr, x0
+ whilels { p0.s - p1.s }, x0, x30
+ whilels { p0.s - p1.s }, x0, xzr
+ whilels { p4.s - p5.s }, x17, x19
+
+ whilels { p0.d - p1.d }, x0, x0
+ WHILELS { P0.d - P1.d }, X0, X0
+ whilels { p14.d - p15.d }, x0, x0
+ whilels { p0.d - p1.d }, x30, x0
+ whilels { p0.d - p1.d }, xzr, x0
+ whilels { p0.d - p1.d }, x0, x30
+ whilels { p0.d - p1.d }, x0, xzr
+ whilels { p4.d - p5.d }, x17, x19
+
+ whilelt { p0.b - p1.b }, x0, x0
+ WHILELT { P0.B - P1.B }, X0, X0
+ whilelt { p14.b - p15.b }, x0, x0
+ whilelt { p0.b - p1.b }, x30, x0
+ whilelt { p0.b - p1.b }, xzr, x0
+ whilelt { p0.b - p1.b }, x0, x30
+ whilelt { p0.b - p1.b }, x0, xzr
+ whilelt { p4.b - p5.b }, x17, x19
+
+ whilelt { p0.h - p1.h }, x0, x0
+ WHILELT { P0.h - P1.h }, X0, X0
+ whilelt { p14.h - p15.h }, x0, x0
+ whilelt { p0.h - p1.h }, x30, x0
+ whilelt { p0.h - p1.h }, xzr, x0
+ whilelt { p0.h - p1.h }, x0, x30
+ whilelt { p0.h - p1.h }, x0, xzr
+ whilelt { p4.h - p5.h }, x17, x19
+
+ whilelt { p0.s - p1.s }, x0, x0
+ WHILELT { P0.s - P1.s }, X0, X0
+ whilelt { p14.s - p15.s }, x0, x0
+ whilelt { p0.s - p1.s }, x30, x0
+ whilelt { p0.s - p1.s }, xzr, x0
+ whilelt { p0.s - p1.s }, x0, x30
+ whilelt { p0.s - p1.s }, x0, xzr
+ whilelt { p4.s - p5.s }, x17, x19
+
+ whilelt { p0.d - p1.d }, x0, x0
+ WHILELT { P0.d - P1.d }, X0, X0
+ whilelt { p14.d - p15.d }, x0, x0
+ whilelt { p0.d - p1.d }, x30, x0
+ whilelt { p0.d - p1.d }, xzr, x0
+ whilelt { p0.d - p1.d }, x0, x30
+ whilelt { p0.d - p1.d }, x0, xzr
+ whilelt { p4.d - p5.d }, x17, x19
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index d34cea5efca..ee0a3b65ab0 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -487,6 +487,8 @@ enum aarch64_opnd
AARCH64_OPND_SVE_ZtxN, /* SVE vector register list in Zt. */
AARCH64_OPND_SME_Zdnx2, /* SVE vector register list from [4:1]*2. */
AARCH64_OPND_SME_Zdnx4, /* SVE vector register list from [4:2]*4. */
+ AARCH64_OPND_SME_Zmx2, /* SVE vector register list from [20:17]*2. */
+ AARCH64_OPND_SME_Zmx4, /* SVE vector register list from [20:18]*4. */
AARCH64_OPND_SME_Znx2, /* SVE vector register list from [9:6]*2. */
AARCH64_OPND_SME_Znx4, /* SVE vector register list from [9:7]*4. */
AARCH64_OPND_SME_Ztx2_STRIDED, /* SVE vector register list in [4:0]&23. */
@@ -497,8 +499,14 @@ enum aarch64_opnd
AARCH64_OPND_SME_ZA_HV_idx_srcxN, /* SME N source ZA tile vectors. */
AARCH64_OPND_SME_ZA_HV_idx_dest, /* SME destination ZA tile vector. */
AARCH64_OPND_SME_ZA_HV_idx_destxN, /* SME N dest ZA tile vectors. */
+ AARCH64_OPND_SME_Pdx2, /* Predicate register list in [3:1]. */
+ AARCH64_OPND_SME_PdxN, /* Predicate register list in [3:0]. */
AARCH64_OPND_SME_Pm, /* SME scalable predicate register, bits [15:13]. */
+ AARCH64_OPND_SME_PNd3, /* Predicate-as-counter register, bits [3:0]. */
AARCH64_OPND_SME_PNg3, /* Predicate-as-counter register, bits [12:10]. */
+ AARCH64_OPND_SME_PNn, /* Predicate-as-counter register, bits [8:5]. */
+ AARCH64_OPND_SME_PNn3_INDEX1, /* Indexed pred-as-counter reg, bits [8:5]. */
+ AARCH64_OPND_SME_PNn3_INDEX2, /* Indexed pred-as-counter reg, bits [9:5]. */
AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */
AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
AARCH64_OPND_SME_ZA_array_off3_0, /* SME ZA[<Wv>{, #<imm3>}]. */
@@ -507,6 +515,8 @@ enum aarch64_opnd
AARCH64_OPND_SME_ADDR_RI_U4xVL, /* SME [<Xn|SP>{, #<imm>, MUL VL}]. */
AARCH64_OPND_SME_SM_ZA, /* SME {SM | ZA}. */
AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
+ AARCH64_OPND_SME_VLxN_10, /* VLx2 or VLx4, in bit 10. */
+ AARCH64_OPND_SME_VLxN_13, /* VLx2 or VLx4, in bit 13. */
AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */
AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */
AARCH64_OPND_MOPS_ADDR_Rd, /* [Rd]!, in bits [0, 4]. */
@@ -1559,6 +1569,7 @@ aarch64_verbose (const char *, ...) __attribute__ ((format (printf, 1, 2)));
extern const char *const aarch64_sve_pattern_array[32];
extern const char *const aarch64_sve_prfop_array[16];
+extern const char *const aarch64_sme_vlxn_array[2];
#ifdef __cplusplus
}
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 6775d2264ea..9302253db59 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -667,10 +667,12 @@ aarch64_insert_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 220:
- case 221:
- case 226:
- case 227:
+ case 222:
+ case 223:
+ case 230:
+ case 231:
+ case 232:
+ case 233:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -682,7 +684,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 237:
+ case 247:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -727,10 +729,12 @@ aarch64_insert_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 228:
case 236:
- case 241:
- case 242:
+ case 244:
+ case 245:
+ case 246:
+ case 251:
+ case 252:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -889,35 +893,42 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sve_index (self, info, code, inst, errors);
case 211:
case 213:
+ case 229:
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 214:
case 215:
case 216:
case 217:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 218:
case 219:
+ case 228:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
+ case 220:
+ case 221:
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
- case 222:
case 224:
- case 229:
+ case 226:
+ case 237:
return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
- case 223:
case 225:
+ case 227:
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 230:
- case 231:
- case 232:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
- case 233:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 234:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 235:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_simple_index (self, info, code, inst, errors);
case 238:
case 239:
case 240:
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
+ case 241:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 242:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 243:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 248:
+ case 249:
+ case 250:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 42cc6f75677..acfec3773dc 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -57,17 +57,17 @@ insert_fields (aarch64_insn *code, aarch64_insn value, aarch64_insn mask, ...)
va_end (va);
}
-/* Insert a raw field value VALUE into all fields in SELF->fields.
+/* Insert a raw field value VALUE into all fields in SELF->fields after START.
The least significant bit goes in the final field. */
static void
-insert_all_fields (const aarch64_operand *self, aarch64_insn *code,
- aarch64_insn value)
+insert_all_fields_after (const aarch64_operand *self, unsigned int start,
+ aarch64_insn *code, aarch64_insn value)
{
unsigned int i;
enum aarch64_field_kind kind;
- for (i = ARRAY_SIZE (self->fields); i-- > 0; )
+ for (i = ARRAY_SIZE (self->fields); i-- > start; )
if (self->fields[i] != FLD_NIL)
{
kind = self->fields[i];
@@ -76,6 +76,16 @@ insert_all_fields (const aarch64_operand *self, aarch64_insn *code,
}
}
+/* Insert a raw field value VALUE into all fields in SELF->fields.
+ The least significant bit goes in the final field. */
+
+static void
+insert_all_fields (const aarch64_operand *self, aarch64_insn *code,
+ aarch64_insn value)
+{
+ return insert_all_fields_after (self, 0, code, value);
+}
+
/* Operand inserters. */
/* Insert nothing. */
@@ -1595,6 +1605,21 @@ aarch64_ins_x0_to_x30 (const aarch64_operand *self,
return true;
}
+/* Insert an indexed register, with the first field being the register
+ number and the remaining fields being the index. */
+bool
+aarch64_ins_simple_index (const aarch64_operand *self,
+ const aarch64_opnd_info *info,
+ aarch64_insn *code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors ATTRIBUTE_UNUSED)
+{
+ int bias = get_operand_specific_data (self);
+ insert_field (self->fields[0], code, info->reglane.regno - bias, 0);
+ insert_all_fields_after (self, 1, code, info->reglane.index);
+ return true;
+}
+
/* Miscellaneous encoding functions. */
/* Encode size[0], i.e. bit 22, for
diff --git a/opcodes/aarch64-asm.h b/opcodes/aarch64-asm.h
index f74cb718f3e..4cc48dfdcb6 100644
--- a/opcodes/aarch64-asm.h
+++ b/opcodes/aarch64-asm.h
@@ -110,6 +110,7 @@ AARCH64_DECL_OPD_INSERTER (ins_sme_pred_reg_with_index);
AARCH64_DECL_OPD_INSERTER (ins_imm_rotate1);
AARCH64_DECL_OPD_INSERTER (ins_imm_rotate2);
AARCH64_DECL_OPD_INSERTER (ins_x0_to_x30);
+AARCH64_DECL_OPD_INSERTER (ins_simple_index);
#undef AARCH64_DECL_OPD_INSERTER
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index b367a77fc00..5210db3b008 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -169,7 +169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx00xxxxxxxxxx
mov. */
- return 2490;
+ return 2499;
}
else
{
@@ -177,7 +177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2488;
+ return 2497;
}
}
else
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2491;
+ return 2500;
}
else
{
@@ -196,7 +196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2489;
+ return 2498;
}
}
}
@@ -221,7 +221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx00xxxxxxxxxx
mov. */
- return 2486;
+ return 2495;
}
else
{
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2484;
+ return 2493;
}
}
else
@@ -240,7 +240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2487;
+ return 2496;
}
else
{
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2485;
+ return 2494;
}
}
}
@@ -275,7 +275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2424;
+ return 2433;
}
else
{
@@ -283,7 +283,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2425;
+ return 2434;
}
}
else
@@ -294,7 +294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2448;
+ return 2457;
}
else
{
@@ -302,7 +302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2449;
+ return 2458;
}
}
}
@@ -316,7 +316,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2440;
+ return 2449;
}
else
{
@@ -324,7 +324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2441;
+ return 2450;
}
}
else
@@ -335,7 +335,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2432;
+ return 2441;
}
else
{
@@ -343,7 +343,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2433;
+ return 2442;
}
}
}
@@ -360,7 +360,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2456;
+ return 2465;
}
else
{
@@ -368,7 +368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2457;
+ return 2466;
}
}
else
@@ -379,7 +379,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2480;
+ return 2489;
}
else
{
@@ -387,7 +387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2481;
+ return 2490;
}
}
}
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2472;
+ return 2481;
}
else
{
@@ -409,7 +409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2473;
+ return 2482;
}
}
else
@@ -420,7 +420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2464;
+ return 2473;
}
else
{
@@ -428,7 +428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2465;
+ return 2474;
}
}
}
@@ -492,7 +492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2420;
+ return 2429;
}
else
{
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2421;
+ return 2430;
}
}
else
@@ -511,7 +511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2444;
+ return 2453;
}
else
{
@@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2445;
+ return 2454;
}
}
}
@@ -533,7 +533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2436;
+ return 2445;
}
else
{
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2437;
+ return 2446;
}
}
else
@@ -552,7 +552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2428;
+ return 2437;
}
else
{
@@ -560,7 +560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2429;
+ return 2438;
}
}
}
@@ -577,7 +577,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2452;
+ return 2461;
}
else
{
@@ -585,7 +585,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2453;
+ return 2462;
}
}
else
@@ -596,7 +596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2476;
+ return 2485;
}
else
{
@@ -604,7 +604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2477;
+ return 2486;
}
}
}
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2468;
+ return 2477;
}
else
{
@@ -626,7 +626,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2469;
+ return 2478;
}
}
else
@@ -637,7 +637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2460;
+ return 2469;
}
else
{
@@ -645,7 +645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2461;
+ return 2470;
}
}
}
@@ -713,7 +713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2504;
+ return 2518;
}
else
{
@@ -721,7 +721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2505;
+ return 2519;
}
}
else
@@ -732,7 +732,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2528;
+ return 2542;
}
else
{
@@ -740,7 +740,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2529;
+ return 2543;
}
}
}
@@ -754,7 +754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2520;
+ return 2534;
}
else
{
@@ -762,7 +762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2521;
+ return 2535;
}
}
else
@@ -773,7 +773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2512;
+ return 2526;
}
else
{
@@ -781,7 +781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2513;
+ return 2527;
}
}
}
@@ -798,7 +798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2536;
+ return 2550;
}
else
{
@@ -806,7 +806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2537;
+ return 2551;
}
}
else
@@ -817,7 +817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2560;
+ return 2574;
}
else
{
@@ -825,7 +825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2561;
+ return 2575;
}
}
}
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2552;
+ return 2566;
}
else
{
@@ -847,7 +847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2553;
+ return 2567;
}
}
else
@@ -858,7 +858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2544;
+ return 2558;
}
else
{
@@ -866,7 +866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2545;
+ return 2559;
}
}
}
@@ -930,7 +930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2500;
+ return 2514;
}
else
{
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2501;
+ return 2515;
}
}
else
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2524;
+ return 2538;
}
else
{
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2525;
+ return 2539;
}
}
}
@@ -971,7 +971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2516;
+ return 2530;
}
else
{
@@ -979,7 +979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2517;
+ return 2531;
}
}
else
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2508;
+ return 2522;
}
else
{
@@ -998,7 +998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2509;
+ return 2523;
}
}
}
@@ -1015,7 +1015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2532;
+ return 2546;
}
else
{
@@ -1023,7 +1023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2533;
+ return 2547;
}
}
else
@@ -1034,7 +1034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2556;
+ return 2570;
}
else
{
@@ -1042,7 +1042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2557;
+ return 2571;
}
}
}
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2548;
+ return 2562;
}
else
{
@@ -1064,7 +1064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2549;
+ return 2563;
}
}
else
@@ -1075,7 +1075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2540;
+ return 2554;
}
else
{
@@ -1083,7 +1083,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2541;
+ return 2555;
}
}
}
@@ -1175,7 +1175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2426;
+ return 2435;
}
else
{
@@ -1183,7 +1183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2450;
+ return 2459;
}
}
else
@@ -1194,7 +1194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2442;
+ return 2451;
}
else
{
@@ -1202,7 +1202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2434;
+ return 2443;
}
}
}
@@ -1216,7 +1216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2458;
+ return 2467;
}
else
{
@@ -1224,7 +1224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2482;
+ return 2491;
}
}
else
@@ -1235,7 +1235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2474;
+ return 2483;
}
else
{
@@ -1243,7 +1243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2466;
+ return 2475;
}
}
}
@@ -1269,7 +1269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2427;
+ return 2436;
}
else
{
@@ -1277,7 +1277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2451;
+ return 2460;
}
}
else
@@ -1288,7 +1288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2443;
+ return 2452;
}
else
{
@@ -1296,7 +1296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2435;
+ return 2444;
}
}
}
@@ -1310,7 +1310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2459;
+ return 2468;
}
else
{
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2483;
+ return 2492;
}
}
else
@@ -1329,7 +1329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2475;
+ return 2484;
}
else
{
@@ -1337,7 +1337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2467;
+ return 2476;
}
}
}
@@ -1401,7 +1401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2422;
+ return 2431;
}
else
{
@@ -1409,7 +1409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2423;
+ return 2432;
}
}
else
@@ -1420,7 +1420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2446;
+ return 2455;
}
else
{
@@ -1428,7 +1428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2447;
+ return 2456;
}
}
}
@@ -1442,7 +1442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2438;
+ return 2447;
}
else
{
@@ -1450,7 +1450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2439;
+ return 2448;
}
}
else
@@ -1461,7 +1461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2430;
+ return 2439;
}
else
{
@@ -1469,7 +1469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2431;
+ return 2440;
}
}
}
@@ -1486,7 +1486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2454;
+ return 2463;
}
else
{
@@ -1494,7 +1494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2455;
+ return 2464;
}
}
else
@@ -1505,7 +1505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2478;
+ return 2487;
}
else
{
@@ -1513,7 +1513,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2479;
+ return 2488;
}
}
}
@@ -1527,7 +1527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2470;
+ return 2479;
}
else
{
@@ -1535,7 +1535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2471;
+ return 2480;
}
}
else
@@ -1546,7 +1546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2462;
+ return 2471;
}
else
{
@@ -1554,7 +1554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2463;
+ return 2472;
}
}
}
@@ -1594,13 +1594,150 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 30) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000001xx1xxxxxxxxxxxxxxxx0xxxx
+ fmopa. */
+ return 2367;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000001xx1xxxxxxxxxxxxxxxx1xxxx
+ fmops. */
+ return 2370;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx0xxxxxxxxxxxxxxxx
+ sel. */
+ return 2512;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx1xxxxxxxxxxxxxxxx
+ sel. */
+ return 2513;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx000xxxxxxxxx0xxx
+ st1b. */
+ return 2520;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx010xxxxxxxxx0xxx
+ st1w. */
+ return 2544;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx001xxxxxxxxx0xxx
+ st1h. */
+ return 2536;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx011xxxxxxxxx0xxx
+ st1d. */
+ return 2528;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx000xxxxxxxxx1xxx
+ stnt1b. */
+ return 2552;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx010xxxxxxxxx1xxx
+ stnt1w. */
+ return 2576;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx001xxxxxxxxx1xxx
+ stnt1h. */
+ return 2568;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx011xxxxxxxxx1xxx
+ stnt1d. */
+ return 2560;
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1100001001xxxxx0xxxxxxxxxxxxxxx
+ str. */
+ return 2414;
+ }
+ }
+ else
{
if (((word >> 3) & 0x1) == 0)
{
@@ -1610,17 +1747,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001001xxxxx000xxxxxxxxx0xxx
+ xx100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2506;
+ return 2521;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001001xxxxx010xxxxxxxxx0xxx
+ xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2530;
+ return 2545;
}
}
else
@@ -1629,17 +1766,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001001xxxxx001xxxxxxxxx0xxx
+ xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2522;
+ return 2537;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001001xxxxx011xxxxxxxxx0xxx
+ xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2514;
+ return 2529;
}
}
}
@@ -1651,17 +1788,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001001xxxxx000xxxxxxxxx1xxx
+ xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2538;
+ return 2553;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001001xxxxx010xxxxxxxxx1xxx
+ xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2562;
+ return 2577;
}
}
else
@@ -1670,129 +1807,25 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001001xxxxx001xxxxxxxxx1xxx
+ xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2554;
+ return 2569;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001001xxxxx011xxxxxxxxx1xxx
+ xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2546;
+ return 2561;
}
}
}
}
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1x00001001xxxxx0xxxxxxxxxxxxxxx
- str. */
- return 2414;
- }
}
else
{
- if (((word >> 3) & 0x1) == 0)
- {
- if (((word >> 13) & 0x1) == 0)
- {
- if (((word >> 14) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxx100xxxxxxxxx0xxx
- st1b. */
- return 2507;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxx110xxxxxxxxx0xxx
- st1w. */
- return 2531;
- }
- }
- else
- {
- if (((word >> 14) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxx101xxxxxxxxx0xxx
- st1h. */
- return 2523;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxx111xxxxxxxxx0xxx
- st1d. */
- return 2515;
- }
- }
- }
- else
- {
- if (((word >> 13) & 0x1) == 0)
- {
- if (((word >> 14) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxx100xxxxxxxxx1xxx
- stnt1b. */
- return 2539;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxx110xxxxxxxxx1xxx
- stnt1w. */
- return 2563;
- }
- }
- else
- {
- if (((word >> 14) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxx101xxxxxxxxx1xxx
- stnt1h. */
- return 2555;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001001xxxxx111xxxxxxxxx1xxx
- stnt1d. */
- return 2547;
- }
- }
- }
- }
- }
- else
- {
- if (((word >> 4) & 0x1) == 0)
- {
- if (((word >> 29) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001101xxxxxxxxxxxxxxxx0xxxx
- fmopa. */
- return 2367;
- }
- else
+ if (((word >> 4) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
@@ -1800,17 +1833,6 @@ aarch64_opcode_lookup_1 (uint32_t word)
umopa. */
return 2380;
}
- }
- else
- {
- if (((word >> 29) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001101xxxxxxxxxxxxxxxx1xxxx
- fmops. */
- return 2370;
- }
else
{
/* 33222222222211111111110000000000
@@ -1821,211 +1843,211 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
}
}
- }
- else
- {
- if (((word >> 23) & 0x1) == 0)
+ else
{
- if (((word >> 3) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx000xxxxxxxxx0xxx
- st1b. */
- return 2502;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx000xxxxxxxxx0xxx
+ st1b. */
+ return 2516;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx100xxxxxxxxx0xxx
+ st1b. */
+ return 2517;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx100xxxxxxxxx0xxx
- st1b. */
- return 2503;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx010xxxxxxxxx0xxx
+ st1w. */
+ return 2540;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx110xxxxxxxxx0xxx
+ st1w. */
+ return 2541;
+ }
}
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx010xxxxxxxxx0xxx
- st1w. */
- return 2526;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx001xxxxxxxxx0xxx
+ st1h. */
+ return 2532;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx101xxxxxxxxx0xxx
+ st1h. */
+ return 2533;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx110xxxxxxxxx0xxx
- st1w. */
- return 2527;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx011xxxxxxxxx0xxx
+ st1d. */
+ return 2524;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx111xxxxxxxxx0xxx
+ st1d. */
+ return 2525;
+ }
}
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx001xxxxxxxxx0xxx
- st1h. */
- return 2518;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx000xxxxxxxxx1xxx
+ stnt1b. */
+ return 2548;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx100xxxxxxxxx1xxx
+ stnt1b. */
+ return 2549;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx101xxxxxxxxx0xxx
- st1h. */
- return 2519;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx010xxxxxxxxx1xxx
+ stnt1w. */
+ return 2572;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx110xxxxxxxxx1xxx
+ stnt1w. */
+ return 2573;
+ }
}
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx011xxxxxxxxx0xxx
- st1d. */
- return 2510;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx001xxxxxxxxx1xxx
+ stnt1h. */
+ return 2564;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx101xxxxxxxxx1xxx
+ stnt1h. */
+ return 2565;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx111xxxxxxxxx0xxx
- st1d. */
- return 2511;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx011xxxxxxxxx1xxx
+ stnt1d. */
+ return 2556;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001011xxxxx111xxxxxxxxx1xxx
+ stnt1d. */
+ return 2557;
+ }
}
}
}
}
else
{
- if (((word >> 13) & 0x1) == 0)
- {
- if (((word >> 14) & 0x1) == 0)
- {
- if (((word >> 15) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx000xxxxxxxxx1xxx
- stnt1b. */
- return 2534;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx100xxxxxxxxx1xxx
- stnt1b. */
- return 2535;
- }
- }
- else
- {
- if (((word >> 15) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx010xxxxxxxxx1xxx
- stnt1w. */
- return 2558;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx110xxxxxxxxx1xxx
- stnt1w. */
- return 2559;
- }
- }
- }
- else
+ if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 30) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx001xxxxxxxxx1xxx
- stnt1h. */
- return 2550;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx101xxxxxxxxx1xxx
- stnt1h. */
- return 2551;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001111xxxxxxxxxxxxxxxx0xxxx
+ umopa. */
+ return 2381;
}
else
{
- if (((word >> 15) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx011xxxxxxxxx1xxx
- stnt1d. */
- return 2542;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001011xxxxx111xxxxxxxxx1xxx
- stnt1d. */
- return 2543;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1100001111xxxxxxxxxxxxxxxx0xxxx
+ st1q. */
+ return 2407;
}
}
- }
- }
- else
- {
- if (((word >> 4) & 0x1) == 0)
- {
- if (((word >> 30) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001111xxxxxxxxxxxxxxxx0xxxx
- umopa. */
- return 2381;
- }
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1x00001111xxxxxxxxxxxxxxxx0xxxx
- st1q. */
- return 2407;
+ xx100001111xxxxxxxxxxxxxxxx1xxxx
+ umops. */
+ return 2383;
}
}
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001111xxxxxxxxxxxxxxxx1xxxx
- umops. */
- return 2383;
- }
}
}
}
@@ -4392,7 +4414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2604;
+ return 2626;
}
else
{
@@ -4400,7 +4422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2612;
+ return 2634;
}
}
else
@@ -4411,7 +4433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2608;
+ return 2630;
}
else
{
@@ -4419,7 +4441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2615;
+ return 2637;
}
}
}
@@ -4457,7 +4479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2664;
+ return 2686;
}
else
{
@@ -4465,7 +4487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2670;
+ return 2692;
}
}
else
@@ -4476,7 +4498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2667;
+ return 2689;
}
else
{
@@ -4484,7 +4506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2673;
+ return 2695;
}
}
}
@@ -4498,7 +4520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2688;
+ return 2710;
}
else
{
@@ -4506,7 +4528,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2694;
+ return 2716;
}
}
else
@@ -4517,7 +4539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2691;
+ return 2713;
}
else
{
@@ -4525,7 +4547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2697;
+ return 2719;
}
}
}
@@ -4542,7 +4564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2676;
+ return 2698;
}
else
{
@@ -4550,7 +4572,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2682;
+ return 2704;
}
}
else
@@ -4561,7 +4583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2679;
+ return 2701;
}
else
{
@@ -4569,7 +4591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2685;
+ return 2707;
}
}
}
@@ -4583,7 +4605,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2700;
+ return 2722;
}
else
{
@@ -4591,7 +4613,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2706;
+ return 2728;
}
}
else
@@ -4602,7 +4624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2703;
+ return 2725;
}
else
{
@@ -4610,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2709;
+ return 2731;
}
}
}
@@ -4675,7 +4697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2605;
+ return 2627;
}
else
{
@@ -4683,7 +4705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2613;
+ return 2635;
}
}
else
@@ -4694,7 +4716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2609;
+ return 2631;
}
else
{
@@ -4702,7 +4724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2616;
+ return 2638;
}
}
}
@@ -4740,7 +4762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2665;
+ return 2687;
}
else
{
@@ -4748,7 +4770,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2671;
+ return 2693;
}
}
else
@@ -4759,7 +4781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2668;
+ return 2690;
}
else
{
@@ -4767,7 +4789,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2674;
+ return 2696;
}
}
}
@@ -4781,7 +4803,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2689;
+ return 2711;
}
else
{
@@ -4789,7 +4811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2695;
+ return 2717;
}
}
else
@@ -4800,7 +4822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2692;
+ return 2714;
}
else
{
@@ -4808,7 +4830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2698;
+ return 2720;
}
}
}
@@ -4825,7 +4847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2677;
+ return 2699;
}
else
{
@@ -4833,7 +4855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2683;
+ return 2705;
}
}
else
@@ -4844,7 +4866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2680;
+ return 2702;
}
else
{
@@ -4852,7 +4874,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2686;
+ return 2708;
}
}
}
@@ -4866,7 +4888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2701;
+ return 2723;
}
else
{
@@ -4874,7 +4896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2707;
+ return 2729;
}
}
else
@@ -4885,7 +4907,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2704;
+ return 2726;
}
else
{
@@ -4893,7 +4915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2710;
+ return 2732;
}
}
}
@@ -4961,7 +4983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2607;
+ return 2629;
}
else
{
@@ -4969,7 +4991,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2614;
+ return 2636;
}
}
else
@@ -4978,7 +5000,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2611;
+ return 2633;
}
}
else
@@ -4989,7 +5011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2606;
+ return 2628;
}
else
{
@@ -4997,7 +5019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2610;
+ return 2632;
}
}
}
@@ -5059,7 +5081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2666;
+ return 2688;
}
else
{
@@ -5067,7 +5089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2760;
+ return 2782;
}
}
else
@@ -5078,7 +5100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2672;
+ return 2694;
}
else
{
@@ -5086,7 +5108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2762;
+ return 2784;
}
}
}
@@ -5100,7 +5122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2669;
+ return 2691;
}
else
{
@@ -5108,7 +5130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2761;
+ return 2783;
}
}
else
@@ -5117,7 +5139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2675;
+ return 2697;
}
}
}
@@ -5133,7 +5155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2690;
+ return 2712;
}
else
{
@@ -5141,7 +5163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2766;
+ return 2788;
}
}
else
@@ -5152,7 +5174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2696;
+ return 2718;
}
else
{
@@ -5160,7 +5182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2768;
+ return 2790;
}
}
}
@@ -5174,7 +5196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2693;
+ return 2715;
}
else
{
@@ -5182,7 +5204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2767;
+ return 2789;
}
}
else
@@ -5191,7 +5213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2699;
+ return 2721;
}
}
}
@@ -5210,7 +5232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2678;
+ return 2700;
}
else
{
@@ -5218,7 +5240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2763;
+ return 2785;
}
}
else
@@ -5229,7 +5251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2684;
+ return 2706;
}
else
{
@@ -5237,7 +5259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2765;
+ return 2787;
}
}
}
@@ -5251,7 +5273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2681;
+ return 2703;
}
else
{
@@ -5259,7 +5281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2764;
+ return 2786;
}
}
else
@@ -5268,7 +5290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2687;
+ return 2709;
}
}
}
@@ -5284,7 +5306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2702;
+ return 2724;
}
else
{
@@ -5292,7 +5314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2769;
+ return 2791;
}
}
else
@@ -5303,7 +5325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2708;
+ return 2730;
}
else
{
@@ -5311,7 +5333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2771;
+ return 2793;
}
}
}
@@ -5325,7 +5347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2705;
+ return 2727;
}
else
{
@@ -5333,7 +5355,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2770;
+ return 2792;
}
}
else
@@ -5342,7 +5364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2711;
+ return 2733;
}
}
}
@@ -5715,7 +5737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2789;
+ return 2811;
}
else
{
@@ -5733,7 +5755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2792;
+ return 2814;
}
}
}
@@ -5813,7 +5835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2602;
+ return 2624;
}
else
{
@@ -5821,7 +5843,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2603;
+ return 2625;
}
}
else
@@ -5928,7 +5950,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2794;
+ return 2816;
}
}
}
@@ -5944,7 +5966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2791;
+ return 2813;
}
else
{
@@ -5989,7 +6011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2601;
+ return 2623;
}
else
{
@@ -6083,7 +6105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2793;
+ return 2815;
}
}
}
@@ -6213,7 +6235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2795;
+ return 2817;
}
}
}
@@ -6229,7 +6251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2790;
+ return 2812;
}
else
{
@@ -7071,7 +7093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2621;
+ return 2643;
}
}
}
@@ -7145,7 +7167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2622;
+ return 2644;
}
}
}
@@ -9819,7 +9841,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2620;
+ return 2642;
}
}
}
@@ -11523,7 +11545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2649;
+ return 2671;
}
}
else
@@ -11766,7 +11788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2625;
+ return 2647;
}
else
{
@@ -11774,7 +11796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2626;
+ return 2648;
}
}
else
@@ -12006,7 +12028,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2646;
+ return 2668;
}
else
{
@@ -12027,7 +12049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2653;
+ return 2675;
}
else
{
@@ -12035,7 +12057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2652;
+ return 2674;
}
}
else
@@ -12090,7 +12112,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2645;
+ return 2667;
}
else
{
@@ -12102,7 +12124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2651;
+ return 2673;
}
else
{
@@ -12110,7 +12132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2650;
+ return 2672;
}
}
else
@@ -12161,7 +12183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2629;
+ return 2651;
}
else
{
@@ -12169,7 +12191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2630;
+ return 2652;
}
}
else
@@ -12528,7 +12550,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2623;
+ return 2645;
}
else
{
@@ -12561,7 +12583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2647;
+ return 2669;
}
else
{
@@ -12591,7 +12613,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2624;
+ return 2646;
}
else
{
@@ -12720,7 +12742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2633;
+ return 2655;
}
else
{
@@ -12730,7 +12752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2635;
+ return 2657;
}
else
{
@@ -12738,7 +12760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2637;
+ return 2659;
}
}
}
@@ -12750,7 +12772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2634;
+ return 2656;
}
else
{
@@ -12760,7 +12782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2636;
+ return 2658;
}
else
{
@@ -12768,7 +12790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2638;
+ return 2660;
}
}
}
@@ -13827,7 +13849,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2617;
+ return 2639;
}
else
{
@@ -13835,7 +13857,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2619;
+ return 2641;
}
}
else
@@ -13844,7 +13866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2618;
+ return 2640;
}
}
}
@@ -15340,7 +15362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2627;
+ return 2649;
}
else
{
@@ -15348,7 +15370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2628;
+ return 2650;
}
}
}
@@ -15722,7 +15744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2631;
+ return 2653;
}
else
{
@@ -15730,7 +15752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2632;
+ return 2654;
}
}
}
@@ -16069,11 +16091,220 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 31) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx1xxxxx01xxxxxxxxxxxxxx
- psel. */
- return 2418;
+ if (((word >> 4) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01xxxxxxxxx0xxxx
+ psel. */
+ return 2418;
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x000xxxxx10xxx
+ whilege. */
+ return 2578;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x000xxxxx11xxx
+ whilegt. */
+ return 2579;
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx010100xxxxx1xxx0
+ whilege. */
+ return 2420;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx010100xxxxx1xxx1
+ whilegt. */
+ return 2421;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx011100xxxxx1xxxx
+ pext. */
+ return 2509;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x010xxxxx10xxx
+ whilehs. */
+ return 2581;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x010xxxxx11xxx
+ whilehi. */
+ return 2580;
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx010110xxxxx1xxx0
+ whilehs. */
+ return 2423;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx010110xxxxx1xxx1
+ whilehi. */
+ return 2422;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx011110xxxxx1xxxx
+ ptrue. */
+ return 2511;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x001xxxxx10xxx
+ whilelt. */
+ return 2585;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x001xxxxx11xxx
+ whilele. */
+ return 2582;
+ }
+ }
+ else
+ {
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx010101xxxxx1xxx0
+ whilelt. */
+ return 2427;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx010101xxxxx1xxx1
+ whilele. */
+ return 2424;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx011101xxxxx1xxxx
+ pext. */
+ return 2510;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 3) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x011xxxxx10xxx
+ whilelo. */
+ return 2583;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x011xxxxx11xxx
+ whilels. */
+ return 2584;
+ }
+ }
+ else
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x111xxxxx1xxx0
+ whilelo. */
+ return 2425;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx1xxxxx01x111xxxxx1xxx1
+ whilels. */
+ return 2426;
+ }
+ }
+ }
+ }
+ }
}
else
{
@@ -17175,7 +17406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2648;
+ return 2670;
}
}
else
@@ -17622,90 +17853,123 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 31) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
- if (((word >> 17) & 0x1) == 0)
+ if (((word >> 16) & 0x1) == 0)
{
- if (((word >> 18) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
- if (((word >> 19) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10000010xxxxxxxxxxxxxx
- cntp. */
- return 1365;
- }
- else
+ if (((word >> 18) & 0x1) == 0)
{
- if (((word >> 10) & 0x1) == 0)
+ if (((word >> 19) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10000010xxxx0xxxxxxxxx
+ cntp. */
+ return 1365;
+ }
+ else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10100010x000xxxxxxxxxx
- sqincp. */
- return 1874;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10100010x0000xxxxxxxxx
+ sqincp. */
+ return 1874;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10100010x1000xxxxxxxxx
+ wrffr. */
+ return 2048;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10100010x100xxxxxxxxxx
- wrffr. */
- return 2048;
+ 001001x1xx10100010xx100xxxxxxxxx
+ sqincp. */
+ return 1876;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10100010xx10xxxxxxxxxx
+ 001001x1xx10100010xxx10xxxxxxxxx
sqincp. */
- return 1876;
+ return 1875;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10x10010x00x0xxxxxxxxx
+ incp. */
+ return 1503;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10x10010x10x0xxxxxxxxx
+ setffr. */
+ return 1841;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10100010xxx1xxxxxxxxxx
- sqincp. */
- return 1875;
+ 001001x1xx10x10010xx1x0xxxxxxxxx
+ incp. */
+ return 1504;
}
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10x10010x00xxxxxxxxxxx
- incp. */
- return 1503;
+ 001001x1xx10xx1010xx000xxxxxxxxx
+ sqdecp. */
+ return 1860;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10x10010x10xxxxxxxxxxx
- setffr. */
- return 1841;
+ 001001x1xx10xx1010xx100xxxxxxxxx
+ sqdecp. */
+ return 1862;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10x10010xx1xxxxxxxxxxx
- incp. */
- return 1504;
+ 001001x1xx10xx1010xxx10xxxxxxxxx
+ sqdecp. */
+ return 1861;
}
}
}
@@ -17715,115 +17979,93 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10xx1010xx00xxxxxxxxxx
- sqdecp. */
- return 1860;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10xx1010xx10xxxxxxxxxx
- sqdecp. */
- return 1862;
- }
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10xx1010xxx1xxxxxxxxxx
- sqdecp. */
- return 1861;
- }
- }
- }
- else
- {
- if (((word >> 10) & 0x1) == 0)
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 17) & 0x1) == 0)
- {
- if (((word >> 18) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10x00110xx00xxxxxxxxxx
- uqincp. */
- return 2023;
+ if (((word >> 18) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10x00110xx000xxxxxxxxx
+ uqincp. */
+ return 2023;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10x10110xx000xxxxxxxxx
+ decp. */
+ return 1378;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10x10110xx00xxxxxxxxxx
- decp. */
- return 1378;
+ 001001x1xx10xx1110xx000xxxxxxxxx
+ uqdecp. */
+ return 2009;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10xx1110xx00xxxxxxxxxx
- uqdecp. */
- return 2009;
- }
- }
- else
- {
- if (((word >> 17) & 0x1) == 0)
- {
- if (((word >> 18) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10x00110xx10xxxxxxxxxx
- uqincp. */
- return 2024;
+ if (((word >> 18) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10x00110xx100xxxxxxxxx
+ uqincp. */
+ return 2024;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10x10110xx100xxxxxxxxx
+ decp. */
+ return 1379;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10x10110xx10xxxxxxxxxx
- decp. */
- return 1379;
+ 001001x1xx10xx1110xx100xxxxxxxxx
+ uqdecp. */
+ return 2010;
}
}
+ }
+ else
+ {
+ if (((word >> 17) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10xx0110xxx10xxxxxxxxx
+ uqincp. */
+ return 2025;
+ }
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 001001x1xx10xx1110xx10xxxxxxxxxx
+ 001001x1xx10xx1110xxx10xxxxxxxxx
uqdecp. */
- return 2010;
+ return 2011;
}
}
}
- else
- {
- if (((word >> 17) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10xx0110xxx1xxxxxxxxxx
- uqincp. */
- return 2025;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 001001x1xx10xx1110xxx1xxxxxxxxxx
- uqdecp. */
- return 2011;
- }
- }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 001001x1xx10xxxx10xxxx1xxxxxxxxx
+ cntp. */
+ return 2428;
}
}
else
@@ -18525,7 +18767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2784;
+ return 2806;
}
else
{
@@ -19105,7 +19347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2712;
+ return 2734;
}
else
{
@@ -19113,7 +19355,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2714;
+ return 2736;
}
}
else
@@ -19124,7 +19366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2718;
+ return 2740;
}
else
{
@@ -19132,7 +19374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2720;
+ return 2742;
}
}
}
@@ -19146,7 +19388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2715;
+ return 2737;
}
else
{
@@ -19154,7 +19396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2717;
+ return 2739;
}
}
else
@@ -19165,7 +19407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2721;
+ return 2743;
}
else
{
@@ -19173,7 +19415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2723;
+ return 2745;
}
}
}
@@ -19190,7 +19432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2736;
+ return 2758;
}
else
{
@@ -19198,7 +19440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2738;
+ return 2760;
}
}
else
@@ -19209,7 +19451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2742;
+ return 2764;
}
else
{
@@ -19217,7 +19459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2744;
+ return 2766;
}
}
}
@@ -19231,7 +19473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2739;
+ return 2761;
}
else
{
@@ -19239,7 +19481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2741;
+ return 2763;
}
}
else
@@ -19250,7 +19492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2745;
+ return 2767;
}
else
{
@@ -19258,7 +19500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2747;
+ return 2769;
}
}
}
@@ -19278,7 +19520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2724;
+ return 2746;
}
else
{
@@ -19286,7 +19528,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2726;
+ return 2748;
}
}
else
@@ -19297,7 +19539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2730;
+ return 2752;
}
else
{
@@ -19305,7 +19547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2732;
+ return 2754;
}
}
}
@@ -19319,7 +19561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2727;
+ return 2749;
}
else
{
@@ -19327,7 +19569,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2729;
+ return 2751;
}
}
else
@@ -19338,7 +19580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2733;
+ return 2755;
}
else
{
@@ -19346,7 +19588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2735;
+ return 2757;
}
}
}
@@ -19363,7 +19605,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2748;
+ return 2770;
}
else
{
@@ -19371,7 +19613,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2750;
+ return 2772;
}
}
else
@@ -19382,7 +19624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2754;
+ return 2776;
}
else
{
@@ -19390,7 +19632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2756;
+ return 2778;
}
}
}
@@ -19404,7 +19646,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2751;
+ return 2773;
}
else
{
@@ -19412,7 +19654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2753;
+ return 2775;
}
}
else
@@ -19423,7 +19665,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2757;
+ return 2779;
}
else
{
@@ -19431,7 +19673,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2759;
+ return 2781;
}
}
}
@@ -19465,7 +19707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2713;
+ return 2735;
}
else
{
@@ -19473,7 +19715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2772;
+ return 2794;
}
}
else
@@ -19484,7 +19726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2719;
+ return 2741;
}
else
{
@@ -19492,7 +19734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2774;
+ return 2796;
}
}
}
@@ -19506,7 +19748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2716;
+ return 2738;
}
else
{
@@ -19514,7 +19756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2773;
+ return 2795;
}
}
else
@@ -19523,7 +19765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2722;
+ return 2744;
}
}
}
@@ -19539,7 +19781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2737;
+ return 2759;
}
else
{
@@ -19547,7 +19789,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2778;
+ return 2800;
}
}
else
@@ -19558,7 +19800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2743;
+ return 2765;
}
else
{
@@ -19566,7 +19808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2780;
+ return 2802;
}
}
}
@@ -19580,7 +19822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2740;
+ return 2762;
}
else
{
@@ -19588,7 +19830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2779;
+ return 2801;
}
}
else
@@ -19597,7 +19839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2746;
+ return 2768;
}
}
}
@@ -19616,7 +19858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2725;
+ return 2747;
}
else
{
@@ -19624,7 +19866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2775;
+ return 2797;
}
}
else
@@ -19635,7 +19877,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2731;
+ return 2753;
}
else
{
@@ -19643,7 +19885,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2777;
+ return 2799;
}
}
}
@@ -19657,7 +19899,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2728;
+ return 2750;
}
else
{
@@ -19665,7 +19907,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2776;
+ return 2798;
}
}
else
@@ -19674,7 +19916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2734;
+ return 2756;
}
}
}
@@ -19690,7 +19932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2749;
+ return 2771;
}
else
{
@@ -19698,7 +19940,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2781;
+ return 2803;
}
}
else
@@ -19709,7 +19951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2755;
+ return 2777;
}
else
{
@@ -19717,7 +19959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2783;
+ return 2805;
}
}
}
@@ -19731,7 +19973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2752;
+ return 2774;
}
else
{
@@ -19739,7 +19981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2782;
+ return 2804;
}
}
else
@@ -19748,7 +19990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2758;
+ return 2780;
}
}
}
@@ -19915,7 +20157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2639;
+ return 2661;
}
}
}
@@ -19948,7 +20190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2565;
+ return 2587;
}
}
else
@@ -20022,7 +20264,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2641;
+ return 2663;
}
}
}
@@ -20055,7 +20297,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2642;
+ return 2664;
}
}
else
@@ -20102,7 +20344,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2572;
+ return 2594;
}
else
{
@@ -20110,7 +20352,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2574;
+ return 2596;
}
}
else
@@ -20121,7 +20363,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2576;
+ return 2598;
}
else
{
@@ -20135,7 +20377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2577;
+ return 2599;
}
else
{
@@ -20143,7 +20385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2570;
+ return 2592;
}
}
else
@@ -20152,7 +20394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2579;
+ return 2601;
}
}
else
@@ -20165,7 +20407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2578;
+ return 2600;
}
else
{
@@ -20173,7 +20415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2583;
+ return 2605;
}
}
else
@@ -20182,7 +20424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2580;
+ return 2602;
}
}
}
@@ -20363,7 +20605,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2564;
+ return 2586;
}
}
else
@@ -20394,7 +20636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2640;
+ return 2662;
}
else
{
@@ -20413,7 +20655,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2656;
+ return 2678;
}
else
{
@@ -20423,7 +20665,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2654;
+ return 2676;
}
else
{
@@ -20433,7 +20675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2661;
+ return 2683;
}
else
{
@@ -20441,7 +20683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2660;
+ return 2682;
}
}
}
@@ -21025,7 +21267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2657;
+ return 2679;
}
else
{
@@ -21033,7 +21275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2658;
+ return 2680;
}
}
}
@@ -21351,7 +21593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2575;
+ return 2597;
}
}
else
@@ -21962,7 +22204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2568;
+ return 2590;
}
}
}
@@ -22014,7 +22256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2581;
+ return 2603;
}
}
}
@@ -22257,7 +22499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2571;
+ return 2593;
}
}
else
@@ -22333,7 +22575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2584;
+ return 2606;
}
}
else
@@ -23159,7 +23401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2569;
+ return 2591;
}
}
else
@@ -23191,7 +23433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2582;
+ return 2604;
}
}
else
@@ -23431,7 +23673,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2573;
+ return 2595;
}
}
else
@@ -23463,7 +23705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2587;
+ return 2609;
}
else
{
@@ -23471,7 +23713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2591;
+ return 2613;
}
}
}
@@ -23493,7 +23735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2588;
+ return 2610;
}
else
{
@@ -23501,7 +23743,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2592;
+ return 2614;
}
}
}
@@ -23540,7 +23782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2585;
+ return 2607;
}
else
{
@@ -23548,7 +23790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2589;
+ return 2611;
}
}
else
@@ -23570,7 +23812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2586;
+ return 2608;
}
else
{
@@ -23578,7 +23820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2590;
+ return 2612;
}
}
else
@@ -25386,7 +25628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2593;
+ return 2615;
}
else
{
@@ -25394,7 +25636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2597;
+ return 2619;
}
}
else
@@ -25416,7 +25658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2594;
+ return 2616;
}
else
{
@@ -25424,7 +25666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2598;
+ return 2620;
}
}
else
@@ -25930,7 +26172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2595;
+ return 2617;
}
else
{
@@ -25938,7 +26180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2599;
+ return 2621;
}
}
}
@@ -25960,7 +26202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2596;
+ return 2618;
}
else
{
@@ -25968,7 +26210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2600;
+ return 2622;
}
}
}
@@ -26024,7 +26266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2567;
+ return 2589;
}
else
{
@@ -26032,7 +26274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2566;
+ return 2588;
}
}
}
@@ -26135,7 +26377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2644;
+ return 2666;
}
else
{
@@ -26143,7 +26385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2643;
+ return 2665;
}
}
else
@@ -26154,7 +26396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2655;
+ return 2677;
}
else
{
@@ -26164,7 +26406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2663;
+ return 2685;
}
else
{
@@ -26172,7 +26414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2662;
+ return 2684;
}
}
}
@@ -26661,24 +26903,24 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
{
case 2389: value = 2391; break; /* mov --> mova. */
case 2391: return NULL; /* mova --> NULL. */
- case 2490: value = 2498; break; /* mov --> mova. */
- case 2498: return NULL; /* mova --> NULL. */
- case 2488: value = 2496; break; /* mov --> mova. */
- case 2496: return NULL; /* mova --> NULL. */
- case 2491: value = 2499; break; /* mov --> mova. */
- case 2499: return NULL; /* mova --> NULL. */
- case 2489: value = 2497; break; /* mov --> mova. */
- case 2497: return NULL; /* mova --> NULL. */
+ case 2499: value = 2507; break; /* mov --> mova. */
+ case 2507: return NULL; /* mova --> NULL. */
+ case 2497: value = 2505; break; /* mov --> mova. */
+ case 2505: return NULL; /* mova --> NULL. */
+ case 2500: value = 2508; break; /* mov --> mova. */
+ case 2508: return NULL; /* mova --> NULL. */
+ case 2498: value = 2506; break; /* mov --> mova. */
+ case 2506: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2486: value = 2494; break; /* mov --> mova. */
- case 2494: return NULL; /* mova --> NULL. */
- case 2484: value = 2492; break; /* mov --> mova. */
- case 2492: return NULL; /* mova --> NULL. */
- case 2487: value = 2495; break; /* mov --> mova. */
- case 2495: return NULL; /* mova --> NULL. */
- case 2485: value = 2493; break; /* mov --> mova. */
- case 2493: return NULL; /* mova --> NULL. */
+ case 2495: value = 2503; break; /* mov --> mova. */
+ case 2503: return NULL; /* mova --> NULL. */
+ case 2493: value = 2501; break; /* mov --> mova. */
+ case 2501: return NULL; /* mova --> NULL. */
+ case 2496: value = 2504; break; /* mov --> mova. */
+ case 2504: return NULL; /* mova --> NULL. */
+ case 2494: value = 2502; break; /* mov --> mova. */
+ case 2502: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -26700,11 +26942,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2785; break; /* addg --> smax. */
- case 2785: value = 2786; break; /* smax --> umax. */
- case 2786: value = 2787; break; /* umax --> smin. */
- case 2787: value = 2788; break; /* smin --> umin. */
- case 2788: return NULL; /* umin --> NULL. */
+ case 19: value = 2807; break; /* addg --> smax. */
+ case 2807: value = 2808; break; /* smax --> umax. */
+ case 2808: value = 2809; break; /* umax --> smin. */
+ case 2809: value = 2810; break; /* smin --> umin. */
+ case 2810: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -26862,8 +27104,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2659; break; /* fcvt --> bfcvt. */
- case 2659: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2681; break; /* fcvt --> bfcvt. */
+ case 2681: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -27370,10 +27612,12 @@ aarch64_extract_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 220:
- case 221:
- case 226:
- case 227:
+ case 222:
+ case 223:
+ case 230:
+ case 231:
+ case 232:
+ case 233:
return aarch64_ext_regno (self, info, code, inst, errors);
case 10:
return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -27389,7 +27633,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 237:
+ case 247:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -27435,10 +27679,12 @@ aarch64_extract_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 228:
case 236:
- case 241:
- case 242:
+ case 244:
+ case 245:
+ case 246:
+ case 251:
+ case 252:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -27599,35 +27845,42 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sve_index (self, info, code, inst, errors);
case 211:
case 213:
+ case 229:
return aarch64_ext_sve_reglist (self, info, code, inst, errors);
case 214:
case 215:
case 216:
case 217:
- return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 218:
case 219:
+ case 228:
+ return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
+ case 220:
+ case 221:
return aarch64_ext_sve_strided_reglist (self, info, code, inst, errors);
- case 222:
case 224:
- case 229:
+ case 226:
+ case 237:
return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
- case 223:
case 225:
+ case 227:
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 230:
- case 231:
- case 232:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
- case 233:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 234:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 235:
- return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ext_simple_index (self, info, code, inst, errors);
case 238:
case 239:
case 240:
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
+ case 241:
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 242:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ case 243:
+ return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 248:
+ case 249:
+ case 250:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 29b12d238e2..a2f69186355 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -168,18 +168,20 @@ extract_fields (aarch64_insn code, aarch64_insn mask, ...)
return value;
}
-/* Extract the value of all fields in SELF->fields from instruction CODE.
- The least significant bit comes from the final field. */
+/* Extract the value of all fields in SELF->fields after START from
+ instruction CODE. The least significant bit comes from the final field. */
static aarch64_insn
-extract_all_fields (const aarch64_operand *self, aarch64_insn code)
+extract_all_fields_after (const aarch64_operand *self, unsigned int start,
+ aarch64_insn code)
{
aarch64_insn value;
unsigned int i;
enum aarch64_field_kind kind;
value = 0;
- for (i = 0; i < ARRAY_SIZE (self->fields) && self->fields[i] != FLD_NIL; ++i)
+ for (i = start;
+ i < ARRAY_SIZE (self->fields) && self->fields[i] != FLD_NIL; ++i)
{
kind = self->fields[i];
value <<= fields[kind].width;
@@ -188,6 +190,15 @@ extract_all_fields (const aarch64_operand *self, aarch64_insn code)
return value;
}
+/* Extract the value of all fields in SELF->fields from instruction CODE.
+ The least significant bit comes from the final field. */
+
+static aarch64_insn
+extract_all_fields (const aarch64_operand *self, aarch64_insn code)
+{
+ return extract_all_fields_after (self, 0, code);
+}
+
/* Sign-extend bit I of VALUE. */
static inline uint64_t
sign_extend (aarch64_insn value, unsigned i)
@@ -2126,6 +2137,20 @@ aarch64_ext_x0_to_x30 (const aarch64_operand *self, aarch64_opnd_info *info,
info->reg.regno = extract_field (self->fields[0], code, 0);
return info->reg.regno <= 30;
}
+
+/* Decode an indexed register, with the first field being the register
+ number and the remaining fields being the index. */
+bool
+aarch64_ext_simple_index (const aarch64_operand *self, aarch64_opnd_info *info,
+ const aarch64_insn code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors ATTRIBUTE_UNUSED)
+{
+ int bias = get_operand_specific_data (self);
+ info->reglane.regno = extract_field (self->fields[0], code, 0) + bias;
+ info->reglane.index = extract_all_fields_after (self, 1, code);
+ return true;
+}
\f
/* Bitfields that are commonly used to encode certain operands' information
may be partially used as part of the base opcode in some instructions.
diff --git a/opcodes/aarch64-dis.h b/opcodes/aarch64-dis.h
index 98b6b371803..6e6c00b1de2 100644
--- a/opcodes/aarch64-dis.h
+++ b/opcodes/aarch64-dis.h
@@ -134,6 +134,7 @@ AARCH64_DECL_OPD_EXTRACTOR (ext_sme_pred_reg_with_index);
AARCH64_DECL_OPD_EXTRACTOR (ext_imm_rotate1);
AARCH64_DECL_OPD_EXTRACTOR (ext_imm_rotate2);
AARCH64_DECL_OPD_EXTRACTOR (ext_x0_to_x30);
+AARCH64_DECL_OPD_EXTRACTOR (ext_simple_index);
#undef AARCH64_DECL_OPD_EXTRACTOR
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 1faa900b245..9f2b670c49a 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -240,6 +240,8 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REGLIST, "SVE_ZtxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn2}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn4}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zmx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm2}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zmx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm4}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn2}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn4}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Ztx2_STRIDED", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZtT, FLD_SME_Zt3}, "a list of SVE vector registers"},
@@ -250,8 +252,14 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_srcxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_V,FLD_SME_Rv,FLD_imm3_5}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_dest", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_destxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_V,FLD_SME_Rv,FLD_imm3_0}, "an SME horizontal or vertical vector access register"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Pdx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Pdx2}, "a list of SVE predicate registers"},
+ {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_PdxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pd}, "a list of SVE predicate registers"},
{AARCH64_OPND_CLASS_PRED_REG, "SME_Pm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Pm}, "an SVE predicate register"},
+ {AARCH64_OPND_CLASS_PRED_REG, "SME_PNd3", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_PNd3}, "an SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_PRED_REG, "SME_PNg3", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pg3}, "an SVE predicate-as-counter register"},
+ {AARCH64_OPND_CLASS_PRED_REG, "SME_PNn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Pn}, "an SVE predicate-as-counter register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_PNn3_INDEX1", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_PNn3, FLD_imm1_8}, "an indexed SVE predicate-as-counter register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_PNn3_INDEX2", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_PNn3, FLD_imm2_8}, "an indexed SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
@@ -260,6 +268,8 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
+ {AARCH64_OPND_CLASS_IMMEDIATE, "SME_VLxN_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_VL_10}, "VLx2 or VLx4"},
+ {AARCH64_OPND_CLASS_IMMEDIATE, "SME_VLxN_13", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_VL_13}, "VLx2 or VLx4"},
{AARCH64_OPND_CLASS_IMMEDIATE, "TME_UIMM16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm16_5}, "a 16-bit unsigned immediate for TME tcancel"},
{AARCH64_OPND_CLASS_SIMD_ELEMENT, "SM3_IMM2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SM3_imm2}, "an indexed SM3 vector immediate"},
{AARCH64_OPND_CLASS_INT_REG, "MOPS_ADDR_Rd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "a register destination address with writeback"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 66c9d65d16e..3b4397d0f06 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -99,6 +99,13 @@ const char *const aarch64_sve_prfop_array[16] = {
0
};
+/* Vector length multiples for a predicate-as-counter operand. Used in things
+ like AARCH64_OPND_SME_VLxN_10. */
+const char *const aarch64_sme_vlxn_array[2] = {
+ "vlx2",
+ "vlx4"
+};
+
/* Helper functions to determine which operand to be used to encode/decode
the size:Q fields for AdvSIMD instructions. */
@@ -220,15 +227,22 @@ const aarch64_field fields[] =
{ 10, 5 }, /* Rt2: in load/store pair instructions. */
{ 12, 1 }, /* S: in load/store reg offset instructions. */
{ 12, 2 }, /* SM3_imm2: Indexed element SM3 2 bits index immediate. */
+ { 1, 3 }, /* SME_Pdx2: predicate register, multiple of 2, [3:1]. */
{ 13, 3 }, /* SME_Pm: second source scalable predicate register P0-P7. */
+ { 0, 3 }, /* SME_PNd3: PN0-PN7, bits [2:0]. */
+ { 5, 3 }, /* SME_PNn3: PN0-PN7, bits [7:5]. */
{ 16, 1 }, /* SME_Q: Q class bit, bit 16. */
{ 16, 2 }, /* SME_Rm: index base register W12-W15 [17:16]. */
{ 13, 2 }, /* SME_Rv: vector select register W12-W15, bits [14:13]. */
{ 15, 1 }, /* SME_V: (horizontal / vertical tiles), bit 15. */
+ { 10, 1 }, /* SME_VL_10: VLx2 or VLx4, bit [10]. */
+ { 13, 1 }, /* SME_VL_13: VLx2 or VLx4, bit [13]. */
{ 0, 2 }, /* SME_ZAda_2b: tile ZA0-ZA3. */
{ 0, 3 }, /* SME_ZAda_3b: tile ZA0-ZA7. */
{ 1, 4 }, /* SME_Zdn2: Z0-Z31, multiple of 2, bits [4:1]. */
{ 2, 3 }, /* SME_Zdn4: Z0-Z31, multiple of 4, bits [4:2]. */
+ { 17, 4 }, /* SME_Zm2: Z0-Z31, multiple of 2, bits [20:17]. */
+ { 18, 3 }, /* SME_Zm4: Z0-Z31, multiple of 4, bits [20:18]. */
{ 6, 4 }, /* SME_Zn2: Z0-Z31, multiple of 2, bits [9:6]. */
{ 7, 3 }, /* SME_Zn4: Z0-Z31, multiple of 4, bits [9:7]. */
{ 4, 1 }, /* SME_ZtT: upper bit of Zt, bit [4]. */
@@ -303,6 +317,8 @@ const aarch64_field fields[] =
{ 0, 4 }, /* cond2: condition in truly conditional-executed inst. */
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
+ { 8, 1 }, /* imm1_8: general immediate in bits [8]. */
+ { 8, 2 }, /* imm2_8: general immediate in bits [9:8]. */
{ 0, 3 }, /* imm3_0: general immediate in bits [2:0]. */
{ 5, 3 }, /* imm3_5: general immediate in bits [7:5]. */
{ 10, 3 }, /* imm3_10: in add/sub extended reg instructions. */
@@ -1720,6 +1736,14 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
return 0;
break;
+ case AARCH64_OPND_SME_PNn3_INDEX1:
+ case AARCH64_OPND_SME_PNn3_INDEX2:
+ size = get_operand_field_width (get_operand_from_code (type), 1);
+ if (!check_reglane (opnd, mismatch_detail, idx, "pn", 8, 15,
+ 0, (1 << size) - 1))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_PnT_Wm_imm:
size = aarch64_get_qualifier_esize (opnd->qualifier);
max_value = 16 / size - 1;
@@ -1736,8 +1760,11 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
case AARCH64_OPND_CLASS_SVE_REGLIST:
switch (type)
{
+ case AARCH64_OPND_SME_Pdx2:
case AARCH64_OPND_SME_Zdnx2:
case AARCH64_OPND_SME_Zdnx4:
+ case AARCH64_OPND_SME_Zmx2:
+ case AARCH64_OPND_SME_Zmx4:
case AARCH64_OPND_SME_Znx2:
case AARCH64_OPND_SME_Znx4:
num = get_operand_specific_data (&aarch64_operands[type]);
@@ -1767,6 +1794,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
}
break;
+ case AARCH64_OPND_SME_PdxN:
case AARCH64_OPND_SVE_ZnxN:
case AARCH64_OPND_SVE_ZtxN:
num = get_opcode_dependent_value (opcode);
@@ -1825,6 +1853,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
case AARCH64_OPND_CLASS_PRED_REG:
switch (type)
{
+ case AARCH64_OPND_SME_PNd3:
case AARCH64_OPND_SME_PNg3:
if (opnd->reg.regno < 8)
{
@@ -3366,10 +3395,11 @@ static void
print_register_list (char *buf, size_t size, const aarch64_opnd_info *opnd,
const char *prefix, struct aarch64_styler *styler)
{
+ const int mask = (prefix[0] == 'p' ? 15 : 31);
const int num_regs = opnd->reglist.num_regs;
const int stride = opnd->reglist.stride;
const int first_reg = opnd->reglist.first_regno;
- const int last_reg = (first_reg + (num_regs - 1) * stride) & 0x1f;
+ const int last_reg = (first_reg + (num_regs - 1) * stride) & mask;
const char *qlf_name = aarch64_get_qualifier_name (opnd->qualifier);
char tb[16]; /* Temporary buffer. */
@@ -3394,9 +3424,9 @@ print_register_list (char *buf, size_t size, const aarch64_opnd_info *opnd,
else
{
const int reg0 = first_reg;
- const int reg1 = (first_reg + stride) & 0x1f;
- const int reg2 = (first_reg + stride * 2) & 0x1f;
- const int reg3 = (first_reg + stride * 3) & 0x1f;
+ const int reg1 = (first_reg + stride) & mask;
+ const int reg2 = (first_reg + stride * 2) & mask;
+ const int reg3 = (first_reg + stride * 3) & mask;
switch (num_regs)
{
@@ -3774,7 +3804,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_PNg4_10:
case AARCH64_OPND_SVE_PNn:
case AARCH64_OPND_SVE_PNt:
+ case AARCH64_OPND_SME_PNd3:
case AARCH64_OPND_SME_PNg3:
+ case AARCH64_OPND_SME_PNn:
if (opnd->qualifier == AARCH64_OPND_QLF_NIL)
snprintf (buf, size, "%s",
style_reg (styler, "pn%d", opnd->reg.regno));
@@ -3789,6 +3821,18 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
aarch64_get_qualifier_name (opnd->qualifier)));
break;
+ case AARCH64_OPND_SME_Pdx2:
+ case AARCH64_OPND_SME_PdxN:
+ print_register_list (buf, size, opnd, "p", styler);
+ break;
+
+ case AARCH64_OPND_SME_PNn3_INDEX1:
+ case AARCH64_OPND_SME_PNn3_INDEX2:
+ snprintf (buf, size, "%s[%s]",
+ style_reg (styler, "pn%d", opnd->reglane.regno),
+ style_imm (styler, "%" PRIi64, opnd->reglane.index));
+ break;
+
case AARCH64_OPND_SVE_Za_5:
case AARCH64_OPND_SVE_Za_16:
case AARCH64_OPND_SVE_Zd:
@@ -3808,6 +3852,8 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_ZtxN:
case AARCH64_OPND_SME_Zdnx2:
case AARCH64_OPND_SME_Zdnx4:
+ case AARCH64_OPND_SME_Zmx2:
+ case AARCH64_OPND_SME_Zmx4:
case AARCH64_OPND_SME_Znx2:
case AARCH64_OPND_SME_Znx4:
case AARCH64_OPND_SME_Ztx2_STRIDED:
@@ -3902,6 +3948,14 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm));
break;
+ case AARCH64_OPND_SME_VLxN_10:
+ case AARCH64_OPND_SME_VLxN_13:
+ enum_value = opnd->imm.value;
+ assert (enum_value < ARRAY_SIZE (aarch64_sme_vlxn_array));
+ snprintf (buf, size, "%s",
+ style_sub_mnem (styler, aarch64_sme_vlxn_array[enum_value]));
+ break;
+
case AARCH64_OPND_CRn:
case AARCH64_OPND_CRm:
snprintf (buf, size, "%s",
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 4b9a27b212d..e505786e60e 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -48,15 +48,22 @@ enum aarch64_field_kind
FLD_Rt2,
FLD_S,
FLD_SM3_imm2,
+ FLD_SME_Pdx2,
FLD_SME_Pm,
+ FLD_SME_PNd3,
+ FLD_SME_PNn3,
FLD_SME_Q,
FLD_SME_Rm,
FLD_SME_Rv,
FLD_SME_V,
+ FLD_SME_VL_10,
+ FLD_SME_VL_13,
FLD_SME_ZAda_2b,
FLD_SME_ZAda_3b,
FLD_SME_Zdn2,
FLD_SME_Zdn4,
+ FLD_SME_Zm2,
+ FLD_SME_Zm4,
FLD_SME_Zn2,
FLD_SME_Zn4,
FLD_SME_ZtT,
@@ -131,6 +138,8 @@ enum aarch64_field_kind
FLD_cond2,
FLD_defgh,
FLD_hw,
+ FLD_imm1_8,
+ FLD_imm2_8,
FLD_imm3_0,
FLD_imm3_5,
FLD_imm3_10,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index babf5613da9..cff35b127bd 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2138,6 +2138,13 @@
QLF3(S_S,X,X), \
QLF3(S_D,X,X), \
}
+#define OP_SVE_VXXU_BHSD \
+{ \
+ QLF4(S_B,X,X,NIL), \
+ QLF4(S_H,X,X,NIL), \
+ QLF4(S_S,X,X,NIL), \
+ QLF4(S_D,X,X,NIL), \
+}
#define OP_SVE_VZVD_BHS \
{ \
QLF4(S_B,P_Z,S_B,S_D), \
@@ -2185,6 +2192,13 @@
QLF3(S_S,P_Z,S_S), \
QLF3(S_D,P_Z,S_D), \
}
+#define OP_SVE_V_BHSD \
+{ \
+ QLF1(S_B), \
+ QLF1(S_H), \
+ QLF1(S_S), \
+ QLF1(S_D), \
+}
#define OP_SVE_V_HSD \
{ \
QLF1(S_H), \
@@ -5285,7 +5299,18 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_Pd, SVE_Pg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_PNd, SVE_PNg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
+ /* SME2 extensions to SVE2. */
+ SME2_INSN ("whilege", 0x25205010, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
+ SME2_INSN ("whilegt", 0x25205011, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
+ SME2_INSN ("whilehi", 0x25205811, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
+ SME2_INSN ("whilehs", 0x25205810, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
+ SME2_INSN ("whilele", 0x25205411, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
+ SME2_INSN ("whilelo", 0x25205c10, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
+ SME2_INSN ("whilels", 0x25205c11, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
+ SME2_INSN ("whilelt", 0x25205410, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
+
/* SME2 extensions to SME. */
+ SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
SME2_INSN ("ld1b", 0xa0408000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BZU, 0, 0),
SME2_INSN ("ld1b", 0xa1400000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
@@ -5366,6 +5391,11 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("mova", 0xc0040c00, 0xffff9c78, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VV_BHSD, F_OD (4), 0),
SME2_INSN ("mova", 0xc0040000, 0xff3f1c38, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx2), OP_SVE_VV_BHSDQ, F_OD (2), 0),
SME2_INSN ("mova", 0xc0040400, 0xff3f1c78, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx4), OP_SVE_VV_BHSDQ, F_OD (4), 0),
+ SME2_INSN ("pext", 0x25207010, 0xff3ffc10, sme_size_22, 0, OP2 (SVE_Pd, SME_PNn3_INDEX2), OP_SVE_VU_BHSD, 0, 0),
+ SME2_INSN ("pext", 0x25207410, 0xff3ffe10, sme_size_22, 0, OP2 (SME_PdxN, SME_PNn3_INDEX1), OP_SVE_VU_BHSD, F_OD (2), 0),
+ SME2_INSN ("ptrue", 0x25207810, 0xff3ffff8, sme_size_22, 0, OP1 (SME_PNd3), OP_SVE_V_BHSD, 0, 0),
+ SME2_INSN ("sel", 0xc1208000, 0xff21e021, sme_size_22, 0, OP4 (SME_Zdnx2, SME_PNg3, SME_Znx2, SME_Zmx2), OP_SVE_VUVV_BHSD, 0, 0),
+ SME2_INSN ("sel", 0xc1218000, 0xff23e063, sme_size_22, 0, OP4 (SME_Zdnx4, SME_PNg3, SME_Znx4, SME_Zmx4), OP_SVE_VUVV_BHSD, 0, 0),
SME2_INSN ("st1b", 0xa0600000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0),
SME2_INSN ("st1b", 0xa0608000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BUU, 0, 0),
SME2_INSN ("st1b", 0xa1600000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0),
@@ -5430,6 +5460,14 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("stnt1w", 0xa020c001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
SME2_INSN ("stnt1w", 0xa1204008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
SME2_INSN ("stnt1w", 0xa120c008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
+ SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
+ SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
+ SME2_INSN ("whilehs", 0x25204810, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
+ SME2_INSN ("whilele", 0x25204418, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
+ SME2_INSN ("whilelo", 0x25204c10, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
+ SME2_INSN ("whilels", 0x25204c18, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
+ SME2_INSN ("whilelt", 0x25204410, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
/* SIMD Dot Product (optional in v8.2-A). */
DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
@@ -6074,6 +6112,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
F(FLD_SME_Zdn2), "a list of SVE vector registers") \
Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zdnx4", 4 << OPD_F_OD_LSB, \
F(FLD_SME_Zdn4), "a list of SVE vector registers") \
+ Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zmx2", 2 << OPD_F_OD_LSB, \
+ F(FLD_SME_Zm2), "a list of SVE vector registers") \
+ Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zmx4", 4 << OPD_F_OD_LSB, \
+ F(FLD_SME_Zm4), "a list of SVE vector registers") \
Y(SVE_REGLIST, sve_aligned_reglist, "SME_Znx2", 2 << OPD_F_OD_LSB, \
F(FLD_SME_Zn2), "a list of SVE vector registers") \
Y(SVE_REGLIST, sve_aligned_reglist, "SME_Znx4", 4 << OPD_F_OD_LSB, \
@@ -6100,10 +6142,24 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(ZA_ACCESS, sme_za_hv_tiles_range, "SME_ZA_HV_idx_destxN", 0, \
F(FLD_SME_V,FLD_SME_Rv,FLD_imm3_0), \
"an SME horizontal or vertical vector access register") \
+ Y(SVE_REGLIST, sve_aligned_reglist, "SME_Pdx2", 2 << OPD_F_OD_LSB, \
+ F(FLD_SME_Pdx2), "a list of SVE predicate registers") \
+ Y(SVE_REGLIST, sve_reglist, "SME_PdxN", 0, F(FLD_SVE_Pd), \
+ "a list of SVE predicate registers") \
Y(PRED_REG, regno, "SME_Pm", 0, F(FLD_SME_Pm), \
"an SVE predicate register") \
+ Y(PRED_REG, regno, "SME_PNd3", 8 << OPD_F_OD_LSB, F(FLD_SME_PNd3), \
+ "an SVE predicate-as-counter register") \
Y(PRED_REG, regno, "SME_PNg3", 8 << OPD_F_OD_LSB, F(FLD_SVE_Pg3), \
"an SVE predicate-as-counter register") \
+ Y(PRED_REG, regno, "SME_PNn", 0, F(FLD_SVE_Pn), \
+ "an SVE predicate-as-counter register") \
+ Y(SVE_REG, simple_index, "SME_PNn3_INDEX1", 8 << OPD_F_OD_LSB, \
+ F(FLD_SME_PNn3, FLD_imm1_8), \
+ "an indexed SVE predicate-as-counter register") \
+ Y(SVE_REG, simple_index, "SME_PNn3_INDEX2", 8 << OPD_F_OD_LSB, \
+ F(FLD_SME_PNn3, FLD_imm2_8), \
+ "an indexed SVE predicate-as-counter register") \
Y(SVE_REG, imm, "SME_list_of_64bit_tiles", 0, \
F(FLD_SME_zero_mask), "a list of 64-bit ZA element tiles") \
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \
@@ -6122,6 +6178,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(SVE_REG, sme_pred_reg_with_index, "SME_PnT_Wm_imm", 0, \
F(FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl), \
"Source scalable predicate register with index ") \
+ Y(IMMEDIATE, imm, "SME_VLxN_10", 0, F(FLD_SME_VL_10), \
+ "VLx2 or VLx4") \
+ Y(IMMEDIATE, imm, "SME_VLxN_13", 0, F(FLD_SME_VL_13), \
+ "VLx2 or VLx4") \
Y(IMMEDIATE, imm, "TME_UIMM16", 0, F(FLD_imm16_5), \
"a 16-bit unsigned immediate for TME tcancel") \
Y(SIMD_ELEMENT, reglane, "SM3_IMM2", 0, F(FLD_SM3_imm2), \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 10/31] aarch64: Add the SME2 ZT0 instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (8 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 09/31] aarch64: Add the SME2 predicate-related instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 11/31] aarch64: Add the SME2 ADD and SUB instructions Richard Sandiford
` (22 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
SME2 adds lookup table instructions for quantisation. They use
a new lookup table register called ZT0.
LUTI2 takes an unsuffixed SVE vector index of the form Zn[<imm>],
which is the first time that this syntax has been used.
---
gas/config/tc-aarch64.c | 73 +-
gas/testsuite/gas/aarch64/sme-4-illegal.l | 6 +-
gas/testsuite/gas/aarch64/sme2-8-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-8-invalid.l | 208 +++++
gas/testsuite/gas/aarch64/sme2-8-invalid.s | 116 +++
gas/testsuite/gas/aarch64/sme2-8-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-8-noarch.l | 104 +++
gas/testsuite/gas/aarch64/sme2-8.d | 112 +++
gas/testsuite/gas/aarch64/sme2-8.s | 124 +++
gas/testsuite/gas/aarch64/sve-invalid.l | 8 +
gas/testsuite/gas/aarch64/sve-invalid.s | 1 +
include/opcode/aarch64.h | 11 +
opcodes/aarch64-asm-2.c | 25 +-
opcodes/aarch64-asm.c | 12 +
opcodes/aarch64-dis-2.c | 902 ++++++++++++---------
opcodes/aarch64-dis.c | 15 +
opcodes/aarch64-opc-2.c | 9 +
opcodes/aarch64-opc.c | 59 +-
opcodes/aarch64-opc.h | 19 +-
opcodes/aarch64-tbl.h | 42 +
20 files changed, 1443 insertions(+), 409 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-8-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-8-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-8-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-8-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-8-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-8.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-8.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index a433925e320..652fd4e6ff3 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -312,6 +312,7 @@ struct reloc_entry
BASIC_REG_TYPE(ZAT) /* za[0-15] (ZA tile) */ \
BASIC_REG_TYPE(ZATH) /* za[0-15]h (ZA tile horizontal slice) */ \
BASIC_REG_TYPE(ZATV) /* za[0-15]v (ZA tile vertical slice) */ \
+ BASIC_REG_TYPE(ZT0) /* zt0 */ \
/* Typecheck: any 64-bit int reg (inc SP exc XZR). */ \
MULTI_REG_TYPE(R64_SP, REG_TYPE(R_64) | REG_TYPE(SP_64)) \
/* Typecheck: same, plus SVE registers. */ \
@@ -483,11 +484,11 @@ get_reg_expected_msg (unsigned int mask, unsigned int seen)
if (mask == reg_type_masks[REG_TYPE_VZP])
return N_("expected a vector or predicate register at operand %d");
- /* ZA-related registers. */
+ /* SME-related registers. */
if (mask == reg_type_masks[REG_TYPE_ZA])
return N_("expected a ZA array vector at operand %d");
- if (mask == reg_type_masks[REG_TYPE_ZA_ZAT])
- return N_("expected 'za' or a ZA tile at operand %d");
+ if (mask == (reg_type_masks[REG_TYPE_ZA_ZAT] | reg_type_masks[REG_TYPE_ZT0]))
+ return N_("expected ZT0 or a ZA mask at operand %d");
if (mask == reg_type_masks[REG_TYPE_ZAT])
return N_("expected a ZA tile at operand %d");
if (mask == reg_type_masks[REG_TYPE_ZATHV])
@@ -1279,7 +1280,10 @@ parse_typed_reg (char **ccp, aarch64_reg_type type,
if (!(flags & PTR_FULL_REG) && skip_past_char (&str, '['))
{
/* Reject Sn[index] syntax. */
- if (reg->type != REG_TYPE_PN && !is_typed_vecreg)
+ if (reg->type != REG_TYPE_Z
+ && reg->type != REG_TYPE_PN
+ && reg->type != REG_TYPE_ZT0
+ && !is_typed_vecreg)
{
first_error (_("this type of register can't be indexed"));
return NULL;
@@ -6722,6 +6726,12 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_Zm4_11_INDEX:
case AARCH64_OPND_SVE_Zm4_INDEX:
case AARCH64_OPND_SVE_Zn_INDEX:
+ case AARCH64_OPND_SME_Zn_INDEX1_16:
+ case AARCH64_OPND_SME_Zn_INDEX2_15:
+ case AARCH64_OPND_SME_Zn_INDEX2_16:
+ case AARCH64_OPND_SME_Zn_INDEX3_14:
+ case AARCH64_OPND_SME_Zn_INDEX3_15:
+ case AARCH64_OPND_SME_Zn_INDEX4_14:
reg_type = REG_TYPE_Z;
goto vector_reg_index;
@@ -6735,14 +6745,23 @@ parse_operands (char *str, const aarch64_opcode *opcode)
reg = aarch64_reg_parse (&str, reg_type, &vectype);
if (!reg)
goto failure;
- if (vectype.type == NT_invtype || !(vectype.defined & NTA_HASINDEX))
+ if (!(vectype.defined & NTA_HASINDEX))
goto failure;
+ if (reg->type == REG_TYPE_Z && vectype.type == NT_invtype)
+ /* Unqualified Zn[index] is allowed in LUTI2 instructions. */
+ info->qualifier = AARCH64_OPND_QLF_NIL;
+ else
+ {
+ if (vectype.type == NT_invtype)
+ goto failure;
+ info->qualifier = vectype_to_qualifier (&vectype);
+ if (info->qualifier == AARCH64_OPND_QLF_NIL)
+ goto failure;
+ }
+
info->reglane.regno = reg->number;
info->reglane.index = vectype.index;
- info->qualifier = vectype_to_qualifier (&vectype);
- if (info->qualifier == AARCH64_OPND_QLF_NIL)
- goto failure;
break;
case AARCH64_OPND_SVE_ZnxN:
@@ -7740,6 +7759,39 @@ parse_operands (char *str, const aarch64_opcode *opcode)
goto failure;
break;
+ case AARCH64_OPND_SME_ZT0:
+ po_reg_or_fail (REG_TYPE_ZT0);
+ break;
+
+ case AARCH64_OPND_SME_ZT0_INDEX:
+ reg = aarch64_reg_parse (&str, REG_TYPE_ZT0, &vectype);
+ if (!reg || vectype.type != NT_invtype)
+ goto failure;
+ if (!(vectype.defined & NTA_HASINDEX))
+ {
+ set_syntax_error (_("missing register index"));
+ goto failure;
+ }
+ info->imm.value = vectype.index;
+ break;
+
+ case AARCH64_OPND_SME_ZT0_LIST:
+ if (*str != '{')
+ {
+ set_expected_reglist_error (REG_TYPE_ZT0, parse_reg (&str));
+ goto failure;
+ }
+ str++;
+ if (!parse_typed_reg (&str, REG_TYPE_ZT0, &vectype, PTR_IN_REGLIST))
+ goto failure;
+ if (*str != '}')
+ {
+ set_syntax_error (_("expected '}' after ZT0"));
+ goto failure;
+ }
+ str++;
+ break;
+
case AARCH64_OPND_SME_PNn3_INDEX1:
case AARCH64_OPND_SME_PNn3_INDEX2:
reg = aarch64_reg_parse (&str, REG_TYPE_PN, &vectype);
@@ -8462,7 +8514,10 @@ static const reg_entry reg_names[] = {
REGSET16S (za, h, ZATH), REGSET16S (ZA, H, ZATH),
/* SME ZA tile registers (vertical slice). */
- REGSET16S (za, v, ZATV), REGSET16S (ZA, V, ZATV)
+ REGSET16S (za, v, ZATV), REGSET16S (ZA, V, ZATV),
+
+ /* SME2 ZT0. */
+ REGDEF (zt0, 0, ZT0), REGDEF (ZT0, 0, ZT0)
};
#undef REGDEF
diff --git a/gas/testsuite/gas/aarch64/sme-4-illegal.l b/gas/testsuite/gas/aarch64/sme-4-illegal.l
index 86e315476dd..a9e98524067 100644
--- a/gas/testsuite/gas/aarch64/sme-4-illegal.l
+++ b/gas/testsuite/gas/aarch64/sme-4-illegal.l
@@ -22,11 +22,11 @@
[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {za,}'
[^:]*:[0-9]+: Error: unexpected character `}' in element size at operand 1 -- `zero {za.}'
[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za-}'
-[^:]*:[0-9]+: Error: expected 'za' or a ZA tile at operand 1 -- `zero {za_}'
+[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {za_}'
[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za#}'
-[^:]*:[0-9]+: Error: expected 'za' or a ZA tile at operand 1 -- `zero {zaX}'
+[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zaX}'
[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero {za0}'
-[^:]*:[0-9]+: Error: expected 'za' or a ZA tile at operand 1 -- `zero {zax}'
+[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zax}'
[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za{}'
[^:]*:[0-9]+: Error: unexpected characters following instruction at operand 1 -- `zero {za}}'
[^:]*:[0-9]+: Error: ZA tile masks do not operate at .Q granularity at operand 1 -- `zero {za0\.q}'
diff --git a/gas/testsuite/gas/aarch64/sme2-8-invalid.d b/gas/testsuite/gas/aarch64/sme2-8-invalid.d
new file mode 100644
index 00000000000..d9f587d6019
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-8-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-8-invalid.s
+#error_output: sme2-8-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-8-invalid.l b/gas/testsuite/gas/aarch64/sme2-8-invalid.l
new file mode 100644
index 00000000000..afea8bb6735
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-8-invalid.l
@@ -0,0 +1,208 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `zero 0'
+[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `zero zt0'
+[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {'
+[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {foo}'
+[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zt}'
+[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {x0}'
+[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {z0}'
+[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0'
+[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0\.b}'
+[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0,zt0}'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `movt 0,zt0\[0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `movt x0,0'
+[^ :]+:[0-9]+: Error: missing register index at operand 1 -- `movt zt0,x0'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 1 -- `movt za\[0\],x0'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 1 -- `movt za0\[0\],x0'
+[^ :]+:[0-9]+: Error: bad expression at operand 1 -- `movt zt0\[#0\],x0'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 56 at operand 1 -- `movt zt0\[-1\],x0'
+[^ :]+:[0-9]+: Error: byte index must be a multiple of 8 at operand 1 -- `movt zt0\[1\],x0'
+[^ :]+:[0-9]+: Error: byte index must be a multiple of 8 at operand 1 -- `movt zt0\[2\],x0'
+[^ :]+:[0-9]+: Error: byte index must be a multiple of 8 at operand 1 -- `movt zt0\[4\],x0'
+[^ :]+:[0-9]+: Error: byte index must be a multiple of 8 at operand 1 -- `movt zt0\[7\],x0'
+[^ :]+:[0-9]+: Error: byte index must be a multiple of 8 at operand 1 -- `movt zt0\[49\],x0'
+[^ :]+:[0-9]+: Error: byte index must be a multiple of 8 at operand 1 -- `movt zt0\[50\],x0'
+[^ :]+:[0-9]+: Error: byte index must be a multiple of 8 at operand 1 -- `movt zt0\[52\],x0'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 56 at operand 1 -- `movt zt0\[57\],x0'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 56 at operand 1 -- `movt zt0\[64\],x0'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 56 at operand 1 -- `movt zt0\[1<<32\],x0'
+[^ :]+:[0-9]+: Error: missing register index at operand 1 -- `movt zt0\.b\[0\],x0'
+[^ :]+:[0-9]+: Error: missing register index at operand 1 -- `movt zt0/z\[0\],x0'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `movt zt0\[0\],sp'
+[^ :]+:[0-9]+: Error: operand mismatch -- `movt zt0\[0\],w0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: movt zt0\[0\], x0
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `movt zt0\[0\],wsp'
+[^ :]+:[0-9]+: Error: operand mismatch -- `movt zt0\[0\],wzr'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: movt zt0\[0\], xzr
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `movt zt0\[0\],0'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `ldr 0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 2 -- `ldr zt0,0'
+[^ :]+:[0-9]+: Error: operand 2 must be an address with base register \(no offset\) -- `ldr zt0,\[x0,#0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `ldr Zt0,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `ldr zT0,\[x0\]'
+[^ :]+:[0-9]+: Error: '\]' expected at operand 2 -- `ldr zt0,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 2 -- `ldr zt0,\[w0\]'
+[^ :]+:[0-9]+: Error: missing offset in the pre-indexed address at operand 2 -- `ldr zt0,\[x0\]!'
+[^ :]+:[0-9]+: Error: invalid base register at operand 2 -- `ldr zt0,\[xzr\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 2 -- `ldr zt0,\[wsp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 2 -- `ldr zt0,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 2 -- `ldr zt0,\[x1,x2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `luti2 z0\.b,zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `luti2 z0\.b,zt0,z0\[16\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z0\.b,zt0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 z0\.b, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 z0\.h, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 z0\.s, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z0,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 z0\.b, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 z0\.h, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 z0\.s, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z0\.d,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 z0\.b, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 z0\.h, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 z0\.s, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z0\.q,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 z0\.b, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 z0\.h, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 z0\.s, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z0\.b,zt0,zt0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 0,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti2 z0\.b,0,z0\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z0\.b,zt0,0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z1\.b-z2\.b},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z1\.b},z0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z1\.b},za,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.h-z1\.h},zt0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 {z0\.s-z1\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z0\.h-z1\.h},zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z0\.h-z1\.h},zt0,z0\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.d-z1\.d},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 {z0\.s-z1\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.q-z1\.q},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 {z0\.s-z1\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z1\.s-z4\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z2\.s-z5\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z3\.s-z6\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.s-z3\.s},z0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z3\.b},za,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.b-z3\.b},zt0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 {z0\.b-z3\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 {z0\.s-z3\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 {z0\.b-z3\.b},zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 {z0\.b-z3\.b},zt0,z0\[4\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.d-z3\.d},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 {z0\.b-z3\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 {z0\.s-z3\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.q-z3\.q},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti2 {z0\.b-z3\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti2 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti2 {z0\.s-z3\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 0,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 z0\.b,0,z0\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z0\.b,zt0,0'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti4 z0\.h,zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti4 z0\.h,zt0,z0\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z0\.h,zt0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 z0\.h, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 z0\.b, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 z0\.s, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z0,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 z0\.b, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 z0\.h, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 z0\.s, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z0\.d,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 z0\.b, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 z0\.h, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 z0\.s, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z0\.q,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 z0\.b, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 z0\.h, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 z0\.s, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z0\.h,zt0,zt0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z1\.h-z2\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.h-z1\.h},z0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.h-z1\.h},za,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.h-z1\.h},zt0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 {z0\.s-z1\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z0\.h-z1\.h},zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z0\.h-z1\.h},zt0,z0\[4\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.d-z1\.d},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 {z0\.s-z1\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.q-z1\.q},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 {z0\.s-z1\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z1\.s-z4\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z2\.s-z5\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z3\.s-z6\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.s-z3\.s},z0,z0\[0\]'
+[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.s-z3\.s},za,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.s-z3\.s},zt0,z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 {z0\.s-z3\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 {z0\.b-z3\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 {z0\.s-z3\.s},zt0,z0\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 {z0\.s-z3\.s},zt0,z0\[2\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `luti4 {z0\.b-z3\.b},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.d-z3\.d},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 {z0\.b-z3\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 {z0\.s-z3\.s}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.q-z3\.q},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: luti4 {z0\.b-z3\.b}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: luti4 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^ :]+:[0-9]+: Info: luti4 {z0\.s-z3\.s}, zt0, z0\[0\]
diff --git a/gas/testsuite/gas/aarch64/sme2-8-invalid.s b/gas/testsuite/gas/aarch64/sme2-8-invalid.s
new file mode 100644
index 00000000000..a9712c7aa13
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-8-invalid.s
@@ -0,0 +1,116 @@
+ zero 0
+
+ zero zt0
+ zero {
+ zero { foo }
+ zero { zt }
+ zero { x0 }
+ zero { z0 }
+ zero { zt0
+ zero { zt0.b }
+ zero { zt0, zt0 }
+
+ movt 0, zt0[0]
+ movt x0, 0
+
+ movt zt0, x0
+ movt za[0], x0
+ movt za0[0], x0
+ movt zt0[#0], x0
+ movt zt0[-1], x0
+ movt zt0[1],x0
+ movt zt0[2],x0
+ movt zt0[4],x0
+ movt zt0[7],x0
+ movt zt0[49],x0
+ movt zt0[50],x0
+ movt zt0[52],x0
+ movt zt0[57],x0
+ movt zt0[64], x0
+ movt zt0[1<<32], x0
+ movt zt0.b[0], x0
+ movt zt0/z[0], x0
+ movt zt0[0], sp
+ movt zt0[0], w0
+ movt zt0[0], wsp
+ movt zt0[0], wzr
+ movt zt0[0], 0
+
+ ldr 0, [x0]
+ ldr zt0, 0
+
+ ldr zt0, [x0, #0]
+ ldr Zt0, [x0]
+ ldr zT0, [x0]
+ ldr zt0, [x0, #0, mul vl]
+ ldr zt0, [w0]
+ ldr zt0, [x0]!
+ ldr zt0, [xzr]
+ ldr zt0, [wsp]
+ ldr zt0, [x0, xzr]
+ ldr zt0, [x1, x2]
+
+ luti2 z0.b, zt0, z0[-1]
+ luti2 z0.b, zt0, z0[16]
+ luti2 z0.b, zt0, z0.b[0]
+ luti2 z0, zt0, z0[0]
+ luti2 z0.d, zt0, z0[0]
+ luti2 z0.q, zt0, z0[0]
+ luti2 z0.b, zt0, zt0
+
+ luti2 0, zt0, z0[0]
+ luti2 z0.b, 0, z0[0]
+ luti2 z0.b, zt0, 0
+
+ luti2 { z1.b - z2.b }, zt0, z0[0]
+ luti2 { z0.b - z1.b }, z0, z0[0]
+ luti2 { z0.b - z1.b }, za, z0[0]
+ luti2 { z0.h - z1.h }, zt0, z0.h[0]
+ luti2 { z0.h - z1.h }, zt0, z0[-1]
+ luti2 { z0.h - z1.h }, zt0, z0[8]
+ luti2 { z0.d - z1.d }, zt0, z0[0]
+ luti2 { z0.q - z1.q }, zt0, z0[0]
+
+ luti2 { z1.s - z4.s }, zt0, z0[0]
+ luti2 { z2.s - z5.s }, zt0, z0[0]
+ luti2 { z3.s - z6.s }, zt0, z0[0]
+ luti2 { z0.s - z3.s }, z0, z0[0]
+ luti2 { z0.b - z3.b }, za, z0[0]
+ luti2 { z0.b - z3.b }, zt0, z0.b[0]
+ luti2 { z0.b - z3.b }, zt0, z0[-1]
+ luti2 { z0.b - z3.b }, zt0, z0[4]
+ luti2 { z0.d - z3.d }, zt0, z0[0]
+ luti2 { z0.q - z3.q }, zt0, z0[0]
+
+ luti4 0, zt0, z0[0]
+ luti4 z0.b, 0, z0[0]
+ luti4 z0.b, zt0, 0
+
+ luti4 z0.h, zt0, z0[-1]
+ luti4 z0.h, zt0, z0[8]
+ luti4 z0.h, zt0, z0.h[0]
+ luti4 z0, zt0, z0[0]
+ luti4 z0.d, zt0, z0[0]
+ luti4 z0.q, zt0, z0[0]
+ luti4 z0.h, zt0, zt0
+
+ luti4 { z1.h - z2.h }, zt0, z0[0]
+ luti4 { z0.h - z1.h }, z0, z0[0]
+ luti4 { z0.h - z1.h }, za, z0[0]
+ luti4 { z0.h - z1.h }, zt0, z0.h[0]
+ luti4 { z0.h - z1.h }, zt0, z0[-1]
+ luti4 { z0.h - z1.h }, zt0, z0[4]
+ luti4 { z0.d - z1.d }, zt0, z0[0]
+ luti4 { z0.q - z1.q }, zt0, z0[0]
+
+ luti4 { z1.s - z4.s }, zt0, z0[0]
+ luti4 { z2.s - z5.s }, zt0, z0[0]
+ luti4 { z3.s - z6.s }, zt0, z0[0]
+ luti4 { z0.s - z3.s }, z0, z0[0]
+ luti4 { z0.s - z3.s }, za, z0[0]
+ luti4 { z0.s - z3.s }, zt0, z0.s[0]
+ luti4 { z0.s - z3.s }, zt0, z0[-1]
+ luti4 { z0.s - z3.s }, zt0, z0[2]
+ luti4 { z0.b - z3.b }, zt0, z0[0]
+ luti4 { z0.d - z3.d }, zt0, z0[0]
+ luti4 { z0.q - z3.q }, zt0, z0[0]
diff --git a/gas/testsuite/gas/aarch64/sme2-8-noarch.d b/gas/testsuite/gas/aarch64/sme2-8-noarch.d
new file mode 100644
index 00000000000..116e9d67b66
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-8-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-8.s
+#error_output: sme2-8-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-8-noarch.l b/gas/testsuite/gas/aarch64/sme2-8-noarch.l
new file mode 100644
index 00000000000..994b359532d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-8-noarch.l
@@ -0,0 +1,104 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `zero {zt0}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zero {ZT0}'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt x0,zt0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt X0,ZT0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt x30,zt0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt xzr,zt0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt x0,zt0\[56\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt x9,zt0\[24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt x15,zt0\[40\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt x22,zt0\[48\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt zt0\[0\],x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt ZT0\[0\],X0'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt zt0\[56\],x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt zt0\[0\],x30'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt zt0\[0\],xzr'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt zt0\[8\],x20'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt zt0\[16\],x25'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt zt0\[32\],x27'
+[^ :]+:[0-9]+: Error: selected processor does not support `movt zt0\[24\],x29'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr zt0,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr ZT0,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr zt0,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldr zt0,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str zt0,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str ZT0,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str zt0,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `str zt0,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.b,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 Z0\.B,ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z31\.b,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.b,zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.b,zt0,z0\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.h,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z31\.h,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.h,zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.h,zt0,z0\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.s,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z31\.s,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.s,zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.s,zt0,z0\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {Z0\.B-Z1\.B},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.b-z31\.b},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.h-z31\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.s-z31\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {Z0\.B-Z3\.B},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.b-z31\.b},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.h-z31\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.s-z31\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.b,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 Z0\.b,ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z31\.b,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.b,zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.b,zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.h,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 Z0\.H,ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z31\.h,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.h,zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.h,zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.s,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z31\.s,zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.s,zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.s,zt0,z0\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.b-Z1\.b},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.b-z31\.b},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.H-Z1\.H},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.h-z31\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.s-z31\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z0\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.H-Z3\.H},ZT0,Z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z28\.h-z31\.h},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z0\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z28\.s-z31\.s},zt0,z0\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z31\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z0\[1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-8.d b/gas/testsuite/gas/aarch64/sme2-8.d
new file mode 100644
index 00000000000..a129dff4d70
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-8.d
@@ -0,0 +1,112 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c0480001 zero {zt0}
+[^:]+: c0480001 zero {zt0}
+[^:]+: c04c03e0 movt x0, zt0\[0\]
+[^:]+: c04c03e0 movt x0, zt0\[0\]
+[^:]+: c04c03fe movt x30, zt0\[0\]
+[^:]+: c04c03ff movt xzr, zt0\[0\]
+[^:]+: c04c73e0 movt x0, zt0\[56\]
+[^:]+: c04c33e9 movt x9, zt0\[24\]
+[^:]+: c04c53ef movt x15, zt0\[40\]
+[^:]+: c04c63f6 movt x22, zt0\[48\]
+[^:]+: c04e03e0 movt zt0\[0\], x0
+[^:]+: c04e03e0 movt zt0\[0\], x0
+[^:]+: c04e73e0 movt zt0\[56\], x0
+[^:]+: c04e03fe movt zt0\[0\], x30
+[^:]+: c04e03ff movt zt0\[0\], xzr
+[^:]+: c04e13f4 movt zt0\[8\], x20
+[^:]+: c04e23f9 movt zt0\[16\], x25
+[^:]+: c04e43fb movt zt0\[32\], x27
+[^:]+: c04e33fd movt zt0\[24\], x29
+[^:]+: e11f8000 ldr zt0, \[x0\]
+[^:]+: e11f8000 ldr zt0, \[x0\]
+[^:]+: e11f83c0 ldr zt0, \[x30\]
+[^:]+: e11f83e0 ldr zt0, \[sp\]
+[^:]+: e13f8000 str zt0, \[x0\]
+[^:]+: e13f8000 str zt0, \[x0\]
+[^:]+: e13f83c0 str zt0, \[x30\]
+[^:]+: e13f83e0 str zt0, \[sp\]
+[^:]+: c0cc0000 luti2 z0\.b, zt0, z0\[0\]
+[^:]+: c0cc0000 luti2 z0\.b, zt0, z0\[0\]
+[^:]+: c0cc001f luti2 z31\.b, zt0, z0\[0\]
+[^:]+: c0cc03e0 luti2 z0\.b, zt0, z31\[0\]
+[^:]+: c0cfc000 luti2 z0\.b, zt0, z0\[15\]
+[^:]+: c0cc1000 luti2 z0\.h, zt0, z0\[0\]
+[^:]+: c0cc101f luti2 z31\.h, zt0, z0\[0\]
+[^:]+: c0cc13e0 luti2 z0\.h, zt0, z31\[0\]
+[^:]+: c0cfd000 luti2 z0\.h, zt0, z0\[15\]
+[^:]+: c0cc2000 luti2 z0\.s, zt0, z0\[0\]
+[^:]+: c0cc201f luti2 z31\.s, zt0, z0\[0\]
+[^:]+: c0cc23e0 luti2 z0\.s, zt0, z31\[0\]
+[^:]+: c0cfe000 luti2 z0\.s, zt0, z0\[15\]
+[^:]+: c08c4000 luti2 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^:]+: c08c4000 luti2 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^:]+: c08c401e luti2 {z30\.b-z31\.b}, zt0, z0\[0\]
+[^:]+: c08c43e0 luti2 {z0\.b-z1\.b}, zt0, z31\[0\]
+[^:]+: c08fc000 luti2 {z0\.b-z1\.b}, zt0, z0\[7\]
+[^:]+: c08c5000 luti2 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^:]+: c08c501e luti2 {z30\.h-z31\.h}, zt0, z0\[0\]
+[^:]+: c08c53e0 luti2 {z0\.h-z1\.h}, zt0, z31\[0\]
+[^:]+: c08fd000 luti2 {z0\.h-z1\.h}, zt0, z0\[7\]
+[^:]+: c08c6000 luti2 {z0\.s-z1\.s}, zt0, z0\[0\]
+[^:]+: c08c601e luti2 {z30\.s-z31\.s}, zt0, z0\[0\]
+[^:]+: c08c63e0 luti2 {z0\.s-z1\.s}, zt0, z31\[0\]
+[^:]+: c08fe000 luti2 {z0\.s-z1\.s}, zt0, z0\[7\]
+[^:]+: c08c8000 luti2 {z0\.b-z3\.b}, zt0, z0\[0\]
+[^:]+: c08c8000 luti2 {z0\.b-z3\.b}, zt0, z0\[0\]
+[^:]+: c08c801c luti2 {z28\.b-z31\.b}, zt0, z0\[0\]
+[^:]+: c08c83e0 luti2 {z0\.b-z3\.b}, zt0, z31\[0\]
+[^:]+: c08f8000 luti2 {z0\.b-z3\.b}, zt0, z0\[3\]
+[^:]+: c08c9000 luti2 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^:]+: c08c901c luti2 {z28\.h-z31\.h}, zt0, z0\[0\]
+[^:]+: c08c93e0 luti2 {z0\.h-z3\.h}, zt0, z31\[0\]
+[^:]+: c08f9000 luti2 {z0\.h-z3\.h}, zt0, z0\[3\]
+[^:]+: c08ca000 luti2 {z0\.s-z3\.s}, zt0, z0\[0\]
+[^:]+: c08ca01c luti2 {z28\.s-z31\.s}, zt0, z0\[0\]
+[^:]+: c08ca3e0 luti2 {z0\.s-z3\.s}, zt0, z31\[0\]
+[^:]+: c08fa000 luti2 {z0\.s-z3\.s}, zt0, z0\[3\]
+[^:]+: c0ca0000 luti4 z0\.b, zt0, z0\[0\]
+[^:]+: c0ca0000 luti4 z0\.b, zt0, z0\[0\]
+[^:]+: c0ca001f luti4 z31\.b, zt0, z0\[0\]
+[^:]+: c0ca03e0 luti4 z0\.b, zt0, z31\[0\]
+[^:]+: c0cbc000 luti4 z0\.b, zt0, z0\[7\]
+[^:]+: c0ca1000 luti4 z0\.h, zt0, z0\[0\]
+[^:]+: c0ca1000 luti4 z0\.h, zt0, z0\[0\]
+[^:]+: c0ca101f luti4 z31\.h, zt0, z0\[0\]
+[^:]+: c0ca13e0 luti4 z0\.h, zt0, z31\[0\]
+[^:]+: c0cbd000 luti4 z0\.h, zt0, z0\[7\]
+[^:]+: c0ca2000 luti4 z0\.s, zt0, z0\[0\]
+[^:]+: c0ca201f luti4 z31\.s, zt0, z0\[0\]
+[^:]+: c0ca23e0 luti4 z0\.s, zt0, z31\[0\]
+[^:]+: c0cbe000 luti4 z0\.s, zt0, z0\[7\]
+[^:]+: c08a4000 luti4 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^:]+: c08a4000 luti4 {z0\.b-z1\.b}, zt0, z0\[0\]
+[^:]+: c08a401e luti4 {z30\.b-z31\.b}, zt0, z0\[0\]
+[^:]+: c08a43e0 luti4 {z0\.b-z1\.b}, zt0, z31\[0\]
+[^:]+: c08bc000 luti4 {z0\.b-z1\.b}, zt0, z0\[3\]
+[^:]+: c08a5000 luti4 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^:]+: c08a5000 luti4 {z0\.h-z1\.h}, zt0, z0\[0\]
+[^:]+: c08a501e luti4 {z30\.h-z31\.h}, zt0, z0\[0\]
+[^:]+: c08a53e0 luti4 {z0\.h-z1\.h}, zt0, z31\[0\]
+[^:]+: c08bd000 luti4 {z0\.h-z1\.h}, zt0, z0\[3\]
+[^:]+: c08a6000 luti4 {z0\.s-z1\.s}, zt0, z0\[0\]
+[^:]+: c08a601e luti4 {z30\.s-z31\.s}, zt0, z0\[0\]
+[^:]+: c08a63e0 luti4 {z0\.s-z1\.s}, zt0, z31\[0\]
+[^:]+: c08be000 luti4 {z0\.s-z1\.s}, zt0, z0\[3\]
+[^:]+: c08a9000 luti4 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^:]+: c08a9000 luti4 {z0\.h-z3\.h}, zt0, z0\[0\]
+[^:]+: c08a901c luti4 {z28\.h-z31\.h}, zt0, z0\[0\]
+[^:]+: c08a93e0 luti4 {z0\.h-z3\.h}, zt0, z31\[0\]
+[^:]+: c08b9000 luti4 {z0\.h-z3\.h}, zt0, z0\[1\]
+[^:]+: c08aa000 luti4 {z0\.s-z3\.s}, zt0, z0\[0\]
+[^:]+: c08aa01c luti4 {z28\.s-z31\.s}, zt0, z0\[0\]
+[^:]+: c08aa3e0 luti4 {z0\.s-z3\.s}, zt0, z31\[0\]
+[^:]+: c08ba000 luti4 {z0\.s-z3\.s}, zt0, z0\[1\]
diff --git a/gas/testsuite/gas/aarch64/sme2-8.s b/gas/testsuite/gas/aarch64/sme2-8.s
new file mode 100644
index 00000000000..2bd5449c214
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-8.s
@@ -0,0 +1,124 @@
+ zero { zt0 }
+ ZERO { ZT0 }
+
+ movt x0, zt0[0]
+ MOVT X0, ZT0[0]
+ movt x30, zt0[0]
+ movt xzr, zt0[0]
+ movt x0, zt0[56]
+ movt x9, zt0[24]
+ movt x15, zt0[40]
+ movt x22, zt0[48]
+
+ movt zt0[0], x0
+ MOVT ZT0[0], X0
+ movt zt0[56], x0
+ movt zt0[0], x30
+ movt zt0[0], xzr
+ movt zt0[8], x20
+ movt zt0[16], x25
+ movt zt0[32], x27
+ movt zt0[24], x29
+
+ ldr zt0, [x0]
+ LDR ZT0, [X0]
+ ldr zt0, [x30]
+ ldr zt0, [sp]
+
+ str zt0, [x0]
+ STR ZT0, [X0]
+ str zt0, [x30]
+ str zt0, [sp]
+
+ luti2 z0.b, zt0, z0[0]
+ LUTI2 Z0.B, ZT0, Z0[0]
+ luti2 z31.b, zt0, z0[0]
+ luti2 z0.b, zt0, z31[0]
+ luti2 z0.b, zt0, z0[15]
+
+ luti2 z0.h, zt0, z0[0]
+ luti2 z31.h, zt0, z0[0]
+ luti2 z0.h, zt0, z31[0]
+ luti2 z0.h, zt0, z0[15]
+
+ luti2 z0.s, zt0, z0[0]
+ luti2 z31.s, zt0, z0[0]
+ luti2 z0.s, zt0, z31[0]
+ luti2 z0.s, zt0, z0[15]
+
+ luti2 { z0.b - z1.b }, zt0, z0[0]
+ LUTI2 { Z0.B - Z1.B }, ZT0, Z0[0]
+ luti2 { z30.b - z31.b }, zt0, z0[0]
+ luti2 { z0.b - z1.b }, zt0, z31[0]
+ luti2 { z0.b - z1.b }, zt0, z0[7]
+
+ luti2 { z0.h - z1.h }, zt0, z0[0]
+ luti2 { z30.h - z31.h }, zt0, z0[0]
+ luti2 { z0.h - z1.h }, zt0, z31[0]
+ luti2 { z0.h - z1.h }, zt0, z0[7]
+
+ luti2 { z0.s - z1.s }, zt0, z0[0]
+ luti2 { z30.s - z31.s }, zt0, z0[0]
+ luti2 { z0.s - z1.s }, zt0, z31[0]
+ luti2 { z0.s - z1.s }, zt0, z0[7]
+
+ luti2 { z0.b - z3.b }, zt0, z0[0]
+ LUTI2 { Z0.B - Z3.B }, ZT0, Z0[0]
+ luti2 { z28.b - z31.b }, zt0, z0[0]
+ luti2 { z0.b - z3.b }, zt0, z31[0]
+ luti2 { z0.b - z3.b }, zt0, z0[3]
+
+ luti2 { z0.h - z3.h }, zt0, z0[0]
+ luti2 { z28.h - z31.h }, zt0, z0[0]
+ luti2 { z0.h - z3.h }, zt0, z31[0]
+ luti2 { z0.h - z3.h }, zt0, z0[3]
+
+ luti2 { z0.s - z3.s }, zt0, z0[0]
+ luti2 { z28.s - z31.s }, zt0, z0[0]
+ luti2 { z0.s - z3.s }, zt0, z31[0]
+ luti2 { z0.s - z3.s }, zt0, z0[3]
+
+ luti4 z0.b, zt0, z0[0]
+ LUTI4 Z0.b, ZT0, Z0[0]
+ luti4 z31.b, zt0, z0[0]
+ luti4 z0.b, zt0, z31[0]
+ luti4 z0.b, zt0, z0[7]
+
+ luti4 z0.h, zt0, z0[0]
+ LUTI4 Z0.H, ZT0, Z0[0]
+ luti4 z31.h, zt0, z0[0]
+ luti4 z0.h, zt0, z31[0]
+ luti4 z0.h, zt0, z0[7]
+
+ luti4 z0.s, zt0, z0[0]
+ luti4 z31.s, zt0, z0[0]
+ luti4 z0.s, zt0, z31[0]
+ luti4 z0.s, zt0, z0[7]
+
+ luti4 { z0.b - z1.b }, zt0, z0[0]
+ LUTI4 { Z0.b - Z1.b }, ZT0, Z0[0]
+ luti4 { z30.b - z31.b }, zt0, z0[0]
+ luti4 { z0.b - z1.b }, zt0, z31[0]
+ luti4 { z0.b - z1.b }, zt0, z0[3]
+
+ luti4 { z0.h - z1.h }, zt0, z0[0]
+ LUTI4 { Z0.H - Z1.H }, ZT0, Z0[0]
+ luti4 { z30.h - z31.h }, zt0, z0[0]
+ luti4 { z0.h - z1.h }, zt0, z31[0]
+ luti4 { z0.h - z1.h }, zt0, z0[3]
+
+ luti4 { z0.s - z1.s }, zt0, z0[0]
+ luti4 { z30.s - z31.s }, zt0, z0[0]
+ luti4 { z0.s - z1.s }, zt0, z31[0]
+ luti4 { z0.s - z1.s }, zt0, z0[3]
+
+ luti4 { z0.h - z3.h }, zt0, z0[0]
+ LUTI4 { Z0.H - Z3.H }, ZT0, Z0[0]
+ luti4 { z28.h - z31.h }, zt0, z0[0]
+ luti4 { z0.h - z3.h }, zt0, z31[0]
+ luti4 { z0.h - z3.h }, zt0, z0[1]
+
+ luti4 { z0.s - z3.s }, zt0, z0[0]
+ luti4 { z28.s - z31.s }, zt0, z0[0]
+ luti4 { z0.s - z3.s }, zt0, z31[0]
+ luti4 { z0.s - z3.s }, zt0, z0[1]
diff --git a/gas/testsuite/gas/aarch64/sve-invalid.l b/gas/testsuite/gas/aarch64/sve-invalid.l
index 00352f88f52..a02fbfe28ef 100644
--- a/gas/testsuite/gas/aarch64/sve-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve-invalid.l
@@ -932,6 +932,14 @@
.*: Error: register element index out of range 0 to 63 at operand 2 -- `dup z0\.b,z1\.b\[-1\]'
.*: Error: register element index out of range 0 to 63 at operand 2 -- `dup z0\.b,z1\.b\[64\]'
.*: Error: constant expression required at operand 2 -- `dup z0\.b,z1\.b\[x0\]'
+.*: Error: operand mismatch -- `dup z0\.b,z1\[0\]'
+.*: Info: did you mean this\?
+.*: Info: dup z0\.b, z1\.b\[0\]
+.*: Info: other valid variant\(s\):
+.*: Info: dup z0\.h, z1\.h\[0\]
+.*: Info: dup z0\.s, z1\.s\[0\]
+.*: Info: dup z0\.d, z1\.d\[0\]
+.*: Info: dup z0\.q, z1\.q\[0\]
.*: Error: register element index out of range 0 to 31 at operand 2 -- `dup z0\.h,z1\.h\[-1\]'
.*: Error: register element index out of range 0 to 31 at operand 2 -- `dup z0\.h,z1\.h\[32\]'
.*: Error: constant expression required at operand 2 -- `dup z0\.h,z1\.h\[x0\]'
diff --git a/gas/testsuite/gas/aarch64/sve-invalid.s b/gas/testsuite/gas/aarch64/sve-invalid.s
index b56a08dc15c..c374396ebb3 100644
--- a/gas/testsuite/gas/aarch64/sve-invalid.s
+++ b/gas/testsuite/gas/aarch64/sve-invalid.s
@@ -1143,6 +1143,7 @@
dup z0.b, z1.b[63] // OK
dup z0.b, z1.b[64]
dup z0.b, z1.b[x0]
+ dup z0.b, z1[0]
dup z0.h, z1.h[-1]
dup z0.h, z1.h[0] // OK
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index ee0a3b65ab0..69e0f833170 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -515,8 +515,17 @@ enum aarch64_opnd
AARCH64_OPND_SME_ADDR_RI_U4xVL, /* SME [<Xn|SP>{, #<imm>, MUL VL}]. */
AARCH64_OPND_SME_SM_ZA, /* SME {SM | ZA}. */
AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
+ AARCH64_OPND_SME_Zn_INDEX1_16, /* Zn[index], bits [9:5] and [16:16]. */
+ AARCH64_OPND_SME_Zn_INDEX2_15, /* Zn[index], bits [9:5] and [16:15]. */
+ AARCH64_OPND_SME_Zn_INDEX2_16, /* Zn[index], bits [9:5] and [17:16]. */
+ AARCH64_OPND_SME_Zn_INDEX3_14, /* Zn[index], bits [9:5] and [16:14]. */
+ AARCH64_OPND_SME_Zn_INDEX3_15, /* Zn[index], bits [9:5] and [17:15]. */
+ AARCH64_OPND_SME_Zn_INDEX4_14, /* Zn[index], bits [9:5] and [17:14]. */
AARCH64_OPND_SME_VLxN_10, /* VLx2 or VLx4, in bit 10. */
AARCH64_OPND_SME_VLxN_13, /* VLx2 or VLx4, in bit 13. */
+ AARCH64_OPND_SME_ZT0, /* The fixed token zt0/ZT0 (not encoded). */
+ AARCH64_OPND_SME_ZT0_INDEX, /* ZT0[<imm>], bits [14:12]. */
+ AARCH64_OPND_SME_ZT0_LIST, /* { zt0/ZT0 } (not encoded). */
AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */
AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */
AARCH64_OPND_MOPS_ADDR_Rd, /* [Rd]!, in bits [0, 4]. */
@@ -690,6 +699,8 @@ enum aarch64_insn_class
sme_mov,
sme_ldr,
sme_psel,
+ sme_size_12_bhs,
+ sme_size_12_hs,
sme_size_22,
sme_str,
sme_start,
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 9302253db59..cdc9e465d13 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -684,7 +684,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 247:
+ case 256:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -730,11 +730,12 @@ aarch64_insert_operand (const aarch64_operand *self,
case 193:
case 194:
case 236:
- case 244:
- case 245:
- case 246:
+ case 250:
case 251:
- case 252:
+ case 253:
+ case 255:
+ case 260:
+ case 261:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -803,6 +804,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
+ case 252:
+ case 254:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
@@ -915,6 +918,12 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 234:
case 235:
+ case 244:
+ case 245:
+ case 246:
+ case 247:
+ case 248:
+ case 249:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 238:
case 239:
@@ -926,9 +935,9 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 243:
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 248:
- case 249:
- case 250:
+ case 257:
+ case 258:
+ case 259:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index acfec3773dc..bd03f4116cc 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -404,6 +404,8 @@ aarch64_ins_imm (const aarch64_operand *self, const aarch64_opnd_info *info,
imm = info->imm.value;
if (operand_need_shift_by_two (self))
imm >>= 2;
+ if (operand_need_shift_by_three (self))
+ imm >>= 3;
if (operand_need_shift_by_four (self))
imm >>= 4;
insert_all_fields (self, code, imm);
@@ -1946,11 +1948,21 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
/* The variant is encoded as part of the immediate. */
break;
+ case sme_size_12_bhs:
+ insert_field (FLD_SME_size_12, &inst->value,
+ aarch64_get_variant (inst), 0);
+ break;
+
case sme_size_22:
insert_field (FLD_SME_size_22, &inst->value,
aarch64_get_variant (inst), 0);
break;
+ case sme_size_12_hs:
+ insert_field (FLD_SME_size_12, &inst->value,
+ aarch64_get_variant (inst) + 1, 0);
+ break;
+
case sve_cpy:
insert_fields (&inst->value, aarch64_get_variant (inst),
0, 2, FLD_SVE_M_14, FLD_size);
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 5210db3b008..f69f30f8884 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -94,9 +94,9 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 17) & 0x1) == 0)
+ if (((word >> 18) & 0x1) == 0)
{
- if (((word >> 18) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
if (((word >> 19) & 0x1) == 0)
{
@@ -152,95 +152,194 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000xx0x100xxxxxxxxxxxxxxxxx
- zero. */
- return 2392;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x00x100xxxxxxxxxxxxxxxxx
+ zero. */
+ return 2392;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x10x100xxxxxxxxxxxxxxxxx
+ zero. */
+ return 2596;
+ }
}
}
else
{
- if (((word >> 10) & 0x1) == 0)
+ if (((word >> 19) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0x001xxxxxxxxxxxxxxxxx
+ mov. */
+ return 2388;
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000xx0xx10xxxxx00xxxxxxxxxx
- mov. */
- return 2499;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x00x101xx0xxxxxxxxxxxxxx
+ luti4. */
+ return 2499;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x00x101xx1xxxxxxxxxxxxxx
+ luti4. */
+ return 2498;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0xx10xxxxx10xxxxxxxxxx
- mov. */
+ x1000000x10x101xxxxxxxxxxxxxxxxx
+ luti4. */
return 2497;
}
}
+ }
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 19) & 0x1) == 0)
+ {
+ if (((word >> 17) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0x010xxxxx00xxxxxxxxxx
+ mov. */
+ return 2506;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0x011xxxxx00xxxxxxxxxx
+ mov. */
+ return 2502;
+ }
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x00x11xxx0xx00xxxxxxxxxx
+ luti2. */
+ return 2496;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x00x11xxx1xx00xxxxxxxxxx
+ luti2. */
+ return 2495;
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 17) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000010x110xxxxx00xxxxxxxxxx
+ movt. */
+ return 2517;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000010x111xxxxx00xxxxxxxxxx
+ movt. */
+ return 2516;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000110x11xxxxxx00xxxxxxxxxx
+ luti2. */
+ return 2494;
+ }
+ }
+ }
+ }
else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0xx10xxxxx01xxxxxxxxxx
+ x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2500;
+ return 2504;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0xx10xxxxx11xxxxxxxxxx
+ x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2498;
+ return 2500;
}
}
}
- }
- else
- {
- if (((word >> 18) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000xx0xx01xxxxxxxxxxxxxxxxx
- mov. */
- return 2388;
- }
else
{
- if (((word >> 10) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0xx11xxxxx00xxxxxxxxxx
+ x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2495;
+ return 2507;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0xx11xxxxx10xxxxxxxxxx
+ x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2493;
+ return 2503;
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000000xx0xx11xxxxx01xxxxxxxxxx
+ x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2496;
+ return 2505;
}
else
{
@@ -248,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2494;
+ return 2501;
}
}
}
@@ -713,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2518;
+ return 2527;
}
else
{
@@ -721,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2519;
+ return 2528;
}
}
else
@@ -732,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2542;
+ return 2551;
}
else
{
@@ -740,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2543;
+ return 2552;
}
}
}
@@ -754,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2534;
+ return 2543;
}
else
{
@@ -762,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2535;
+ return 2544;
}
}
else
@@ -773,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2526;
+ return 2535;
}
else
{
@@ -781,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2527;
+ return 2536;
}
}
}
@@ -798,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2550;
+ return 2559;
}
else
{
@@ -806,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2551;
+ return 2560;
}
}
else
@@ -817,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2574;
+ return 2583;
}
else
{
@@ -825,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2575;
+ return 2584;
}
}
}
@@ -839,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2566;
+ return 2575;
}
else
{
@@ -847,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2567;
+ return 2576;
}
}
else
@@ -858,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2558;
+ return 2567;
}
else
{
@@ -866,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2559;
+ return 2568;
}
}
}
@@ -930,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2514;
+ return 2523;
}
else
{
@@ -938,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2515;
+ return 2524;
}
}
else
@@ -949,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2538;
+ return 2547;
}
else
{
@@ -957,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2539;
+ return 2548;
}
}
}
@@ -971,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2530;
+ return 2539;
}
else
{
@@ -979,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2531;
+ return 2540;
}
}
else
@@ -990,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2522;
+ return 2531;
}
else
{
@@ -998,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2523;
+ return 2532;
}
}
}
@@ -1015,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2546;
+ return 2555;
}
else
{
@@ -1023,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2547;
+ return 2556;
}
}
else
@@ -1034,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2570;
+ return 2579;
}
else
{
@@ -1042,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2571;
+ return 2580;
}
}
}
@@ -1056,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2562;
+ return 2571;
}
else
{
@@ -1064,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2563;
+ return 2572;
}
}
else
@@ -1075,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2554;
+ return 2563;
}
else
{
@@ -1083,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2555;
+ return 2564;
}
}
}
@@ -1265,11 +1364,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 14) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx100xxxxxxxxx0xxx
- ld1b. */
- return 2436;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0x00001000xxxxx100xxxxxxxxx0xxx
+ ld1b. */
+ return 2436;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1x00001000xxxxx100xxxxxxxxx0xxx
+ ldr. */
+ return 2493;
+ }
}
else
{
@@ -1623,7 +1733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0xxxxxxxxxxxxxxxx
sel. */
- return 2512;
+ return 2521;
}
else
{
@@ -1631,7 +1741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1xxxxxxxxxxxxxxxx
sel. */
- return 2513;
+ return 2522;
}
}
}
@@ -1655,7 +1765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2520;
+ return 2529;
}
else
{
@@ -1663,7 +1773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2544;
+ return 2553;
}
}
else
@@ -1674,7 +1784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2536;
+ return 2545;
}
else
{
@@ -1682,7 +1792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2528;
+ return 2537;
}
}
}
@@ -1696,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2552;
+ return 2561;
}
else
{
@@ -1704,7 +1814,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2576;
+ return 2585;
}
}
else
@@ -1715,7 +1825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2568;
+ return 2577;
}
else
{
@@ -1723,7 +1833,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2560;
+ return 2569;
}
}
}
@@ -1745,11 +1855,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 14) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001001xxxxx100xxxxxxxxx0xxx
- st1b. */
- return 2521;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001001xxxxx100xxxxxxxxx0xxx
+ st1b. */
+ return 2530;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1100001001xxxxx100xxxxxxxxx0xxx
+ str. */
+ return 2587;
+ }
}
else
{
@@ -1757,7 +1878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2545;
+ return 2554;
}
}
else
@@ -1768,7 +1889,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2537;
+ return 2546;
}
else
{
@@ -1776,7 +1897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2529;
+ return 2538;
}
}
}
@@ -1790,7 +1911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2553;
+ return 2562;
}
else
{
@@ -1798,7 +1919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2577;
+ return 2586;
}
}
else
@@ -1809,7 +1930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2569;
+ return 2578;
}
else
{
@@ -1817,7 +1938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2561;
+ return 2570;
}
}
}
@@ -1859,7 +1980,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2516;
+ return 2525;
}
else
{
@@ -1867,7 +1988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2517;
+ return 2526;
}
}
else
@@ -1878,7 +1999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2540;
+ return 2549;
}
else
{
@@ -1886,7 +2007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2541;
+ return 2550;
}
}
}
@@ -1900,7 +2021,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2532;
+ return 2541;
}
else
{
@@ -1908,7 +2029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2533;
+ return 2542;
}
}
else
@@ -1919,7 +2040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2524;
+ return 2533;
}
else
{
@@ -1927,7 +2048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2525;
+ return 2534;
}
}
}
@@ -1944,7 +2065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2548;
+ return 2557;
}
else
{
@@ -1952,7 +2073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2549;
+ return 2558;
}
}
else
@@ -1963,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2572;
+ return 2581;
}
else
{
@@ -1971,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2573;
+ return 2582;
}
}
}
@@ -1985,7 +2106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2564;
+ return 2573;
}
else
{
@@ -1993,7 +2114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2565;
+ return 2574;
}
}
else
@@ -2004,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2556;
+ return 2565;
}
else
{
@@ -2012,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2557;
+ return 2566;
}
}
}
@@ -4414,7 +4535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2626;
+ return 2637;
}
else
{
@@ -4422,7 +4543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2634;
+ return 2645;
}
}
else
@@ -4433,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2630;
+ return 2641;
}
else
{
@@ -4441,7 +4562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2637;
+ return 2648;
}
}
}
@@ -4479,7 +4600,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2686;
+ return 2697;
}
else
{
@@ -4487,7 +4608,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2692;
+ return 2703;
}
}
else
@@ -4498,7 +4619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2689;
+ return 2700;
}
else
{
@@ -4506,7 +4627,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2695;
+ return 2706;
}
}
}
@@ -4520,7 +4641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2710;
+ return 2721;
}
else
{
@@ -4528,7 +4649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2716;
+ return 2727;
}
}
else
@@ -4539,7 +4660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2713;
+ return 2724;
}
else
{
@@ -4547,7 +4668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2719;
+ return 2730;
}
}
}
@@ -4564,7 +4685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2698;
+ return 2709;
}
else
{
@@ -4572,7 +4693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2704;
+ return 2715;
}
}
else
@@ -4583,7 +4704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2701;
+ return 2712;
}
else
{
@@ -4591,7 +4712,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2707;
+ return 2718;
}
}
}
@@ -4605,7 +4726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2722;
+ return 2733;
}
else
{
@@ -4613,7 +4734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2728;
+ return 2739;
}
}
else
@@ -4624,7 +4745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2725;
+ return 2736;
}
else
{
@@ -4632,7 +4753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2731;
+ return 2742;
}
}
}
@@ -4697,7 +4818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2627;
+ return 2638;
}
else
{
@@ -4705,7 +4826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2635;
+ return 2646;
}
}
else
@@ -4716,7 +4837,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2631;
+ return 2642;
}
else
{
@@ -4724,7 +4845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2638;
+ return 2649;
}
}
}
@@ -4762,7 +4883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2687;
+ return 2698;
}
else
{
@@ -4770,7 +4891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2693;
+ return 2704;
}
}
else
@@ -4781,7 +4902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2690;
+ return 2701;
}
else
{
@@ -4789,7 +4910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2696;
+ return 2707;
}
}
}
@@ -4803,7 +4924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2711;
+ return 2722;
}
else
{
@@ -4811,7 +4932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2717;
+ return 2728;
}
}
else
@@ -4822,7 +4943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2714;
+ return 2725;
}
else
{
@@ -4830,7 +4951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2720;
+ return 2731;
}
}
}
@@ -4847,7 +4968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2699;
+ return 2710;
}
else
{
@@ -4855,7 +4976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2705;
+ return 2716;
}
}
else
@@ -4866,7 +4987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2702;
+ return 2713;
}
else
{
@@ -4874,7 +4995,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2708;
+ return 2719;
}
}
}
@@ -4888,7 +5009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2723;
+ return 2734;
}
else
{
@@ -4896,7 +5017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2729;
+ return 2740;
}
}
else
@@ -4907,7 +5028,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2726;
+ return 2737;
}
else
{
@@ -4915,7 +5036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2732;
+ return 2743;
}
}
}
@@ -4983,7 +5104,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2629;
+ return 2640;
}
else
{
@@ -4991,7 +5112,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2636;
+ return 2647;
}
}
else
@@ -5000,7 +5121,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2633;
+ return 2644;
}
}
else
@@ -5011,7 +5132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2628;
+ return 2639;
}
else
{
@@ -5019,7 +5140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2632;
+ return 2643;
}
}
}
@@ -5081,7 +5202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2688;
+ return 2699;
}
else
{
@@ -5089,7 +5210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2782;
+ return 2793;
}
}
else
@@ -5100,7 +5221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2694;
+ return 2705;
}
else
{
@@ -5108,7 +5229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2784;
+ return 2795;
}
}
}
@@ -5122,7 +5243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2691;
+ return 2702;
}
else
{
@@ -5130,7 +5251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2783;
+ return 2794;
}
}
else
@@ -5139,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2697;
+ return 2708;
}
}
}
@@ -5155,7 +5276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2712;
+ return 2723;
}
else
{
@@ -5163,7 +5284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2788;
+ return 2799;
}
}
else
@@ -5174,7 +5295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2718;
+ return 2729;
}
else
{
@@ -5182,7 +5303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2790;
+ return 2801;
}
}
}
@@ -5196,7 +5317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2715;
+ return 2726;
}
else
{
@@ -5204,7 +5325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2789;
+ return 2800;
}
}
else
@@ -5213,7 +5334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2721;
+ return 2732;
}
}
}
@@ -5232,7 +5353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2700;
+ return 2711;
}
else
{
@@ -5240,7 +5361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2785;
+ return 2796;
}
}
else
@@ -5251,7 +5372,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2706;
+ return 2717;
}
else
{
@@ -5259,7 +5380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2787;
+ return 2798;
}
}
}
@@ -5273,7 +5394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2703;
+ return 2714;
}
else
{
@@ -5281,7 +5402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2786;
+ return 2797;
}
}
else
@@ -5290,7 +5411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2709;
+ return 2720;
}
}
}
@@ -5306,7 +5427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2724;
+ return 2735;
}
else
{
@@ -5314,7 +5435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2791;
+ return 2802;
}
}
else
@@ -5325,7 +5446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2730;
+ return 2741;
}
else
{
@@ -5333,7 +5454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2793;
+ return 2804;
}
}
}
@@ -5347,7 +5468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2727;
+ return 2738;
}
else
{
@@ -5355,7 +5476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2792;
+ return 2803;
}
}
else
@@ -5364,7 +5485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2733;
+ return 2744;
}
}
}
@@ -5737,7 +5858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2811;
+ return 2822;
}
else
{
@@ -5755,7 +5876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2814;
+ return 2825;
}
}
}
@@ -5835,7 +5956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2624;
+ return 2635;
}
else
{
@@ -5843,7 +5964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2625;
+ return 2636;
}
}
else
@@ -5950,7 +6071,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2816;
+ return 2827;
}
}
}
@@ -5966,7 +6087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2813;
+ return 2824;
}
else
{
@@ -6011,7 +6132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2623;
+ return 2634;
}
else
{
@@ -6105,7 +6226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2815;
+ return 2826;
}
}
}
@@ -6235,7 +6356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2817;
+ return 2828;
}
}
}
@@ -6251,7 +6372,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2812;
+ return 2823;
}
else
{
@@ -7093,7 +7214,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2643;
+ return 2654;
}
}
}
@@ -7167,7 +7288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2644;
+ return 2655;
}
}
}
@@ -9841,7 +9962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2642;
+ return 2653;
}
}
}
@@ -11545,7 +11666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2671;
+ return 2682;
}
}
else
@@ -11788,7 +11909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2647;
+ return 2658;
}
else
{
@@ -11796,7 +11917,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2648;
+ return 2659;
}
}
else
@@ -12028,7 +12149,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2668;
+ return 2679;
}
else
{
@@ -12049,7 +12170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2675;
+ return 2686;
}
else
{
@@ -12057,7 +12178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2674;
+ return 2685;
}
}
else
@@ -12112,7 +12233,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2667;
+ return 2678;
}
else
{
@@ -12124,7 +12245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2673;
+ return 2684;
}
else
{
@@ -12132,7 +12253,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2672;
+ return 2683;
}
}
else
@@ -12183,7 +12304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2651;
+ return 2662;
}
else
{
@@ -12191,7 +12312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2652;
+ return 2663;
}
}
else
@@ -12550,7 +12671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2645;
+ return 2656;
}
else
{
@@ -12583,7 +12704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2669;
+ return 2680;
}
else
{
@@ -12613,7 +12734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2646;
+ return 2657;
}
else
{
@@ -12742,7 +12863,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2655;
+ return 2666;
}
else
{
@@ -12752,7 +12873,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2657;
+ return 2668;
}
else
{
@@ -12760,7 +12881,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2659;
+ return 2670;
}
}
}
@@ -12772,7 +12893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2656;
+ return 2667;
}
else
{
@@ -12782,7 +12903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2658;
+ return 2669;
}
else
{
@@ -12790,7 +12911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2660;
+ return 2671;
}
}
}
@@ -13849,7 +13970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2639;
+ return 2650;
}
else
{
@@ -13857,7 +13978,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2641;
+ return 2652;
}
}
else
@@ -13866,7 +13987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2640;
+ return 2651;
}
}
}
@@ -15362,7 +15483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2649;
+ return 2660;
}
else
{
@@ -15370,7 +15491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2650;
+ return 2661;
}
}
}
@@ -15744,7 +15865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2653;
+ return 2664;
}
else
{
@@ -15752,7 +15873,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2654;
+ return 2665;
}
}
}
@@ -16113,7 +16234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2578;
+ return 2588;
}
else
{
@@ -16121,7 +16242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2579;
+ return 2589;
}
}
else
@@ -16151,7 +16272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2509;
+ return 2518;
}
}
}
@@ -16165,7 +16286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2581;
+ return 2591;
}
else
{
@@ -16173,7 +16294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2580;
+ return 2590;
}
}
else
@@ -16203,7 +16324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2511;
+ return 2520;
}
}
}
@@ -16220,7 +16341,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2585;
+ return 2595;
}
else
{
@@ -16228,7 +16349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2582;
+ return 2592;
}
}
else
@@ -16258,7 +16379,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2510;
+ return 2519;
}
}
}
@@ -16272,7 +16393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2583;
+ return 2593;
}
else
{
@@ -16280,7 +16401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2584;
+ return 2594;
}
}
else
@@ -17406,7 +17527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2670;
+ return 2681;
}
}
else
@@ -18767,7 +18888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2806;
+ return 2817;
}
else
{
@@ -19347,7 +19468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2734;
+ return 2745;
}
else
{
@@ -19355,7 +19476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2736;
+ return 2747;
}
}
else
@@ -19366,7 +19487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2740;
+ return 2751;
}
else
{
@@ -19374,7 +19495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2742;
+ return 2753;
}
}
}
@@ -19388,7 +19509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2737;
+ return 2748;
}
else
{
@@ -19396,7 +19517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2739;
+ return 2750;
}
}
else
@@ -19407,7 +19528,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2743;
+ return 2754;
}
else
{
@@ -19415,7 +19536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2745;
+ return 2756;
}
}
}
@@ -19432,7 +19553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2758;
+ return 2769;
}
else
{
@@ -19440,7 +19561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2760;
+ return 2771;
}
}
else
@@ -19451,7 +19572,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2764;
+ return 2775;
}
else
{
@@ -19459,7 +19580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2766;
+ return 2777;
}
}
}
@@ -19473,7 +19594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2761;
+ return 2772;
}
else
{
@@ -19481,7 +19602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2763;
+ return 2774;
}
}
else
@@ -19492,7 +19613,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2767;
+ return 2778;
}
else
{
@@ -19500,7 +19621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2769;
+ return 2780;
}
}
}
@@ -19520,7 +19641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2746;
+ return 2757;
}
else
{
@@ -19528,7 +19649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2748;
+ return 2759;
}
}
else
@@ -19539,7 +19660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2752;
+ return 2763;
}
else
{
@@ -19547,7 +19668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2754;
+ return 2765;
}
}
}
@@ -19561,7 +19682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2749;
+ return 2760;
}
else
{
@@ -19569,7 +19690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2751;
+ return 2762;
}
}
else
@@ -19580,7 +19701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2755;
+ return 2766;
}
else
{
@@ -19588,7 +19709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2757;
+ return 2768;
}
}
}
@@ -19605,7 +19726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2770;
+ return 2781;
}
else
{
@@ -19613,7 +19734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2772;
+ return 2783;
}
}
else
@@ -19624,7 +19745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2776;
+ return 2787;
}
else
{
@@ -19632,7 +19753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2778;
+ return 2789;
}
}
}
@@ -19646,7 +19767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2773;
+ return 2784;
}
else
{
@@ -19654,7 +19775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2775;
+ return 2786;
}
}
else
@@ -19665,7 +19786,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2779;
+ return 2790;
}
else
{
@@ -19673,7 +19794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2781;
+ return 2792;
}
}
}
@@ -19707,7 +19828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2735;
+ return 2746;
}
else
{
@@ -19715,7 +19836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2794;
+ return 2805;
}
}
else
@@ -19726,7 +19847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2741;
+ return 2752;
}
else
{
@@ -19734,7 +19855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2796;
+ return 2807;
}
}
}
@@ -19748,7 +19869,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2738;
+ return 2749;
}
else
{
@@ -19756,7 +19877,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2795;
+ return 2806;
}
}
else
@@ -19765,7 +19886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2744;
+ return 2755;
}
}
}
@@ -19781,7 +19902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2759;
+ return 2770;
}
else
{
@@ -19789,7 +19910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2800;
+ return 2811;
}
}
else
@@ -19800,7 +19921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2765;
+ return 2776;
}
else
{
@@ -19808,7 +19929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2802;
+ return 2813;
}
}
}
@@ -19822,7 +19943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2762;
+ return 2773;
}
else
{
@@ -19830,7 +19951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2801;
+ return 2812;
}
}
else
@@ -19839,7 +19960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2768;
+ return 2779;
}
}
}
@@ -19858,7 +19979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2747;
+ return 2758;
}
else
{
@@ -19866,7 +19987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2797;
+ return 2808;
}
}
else
@@ -19877,7 +19998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2753;
+ return 2764;
}
else
{
@@ -19885,7 +20006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2799;
+ return 2810;
}
}
}
@@ -19899,7 +20020,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2750;
+ return 2761;
}
else
{
@@ -19907,7 +20028,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2798;
+ return 2809;
}
}
else
@@ -19916,7 +20037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2756;
+ return 2767;
}
}
}
@@ -19932,7 +20053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2771;
+ return 2782;
}
else
{
@@ -19940,7 +20061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2803;
+ return 2814;
}
}
else
@@ -19951,7 +20072,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2777;
+ return 2788;
}
else
{
@@ -19959,7 +20080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2805;
+ return 2816;
}
}
}
@@ -19973,7 +20094,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2774;
+ return 2785;
}
else
{
@@ -19981,7 +20102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2804;
+ return 2815;
}
}
else
@@ -19990,7 +20111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2780;
+ return 2791;
}
}
}
@@ -20157,7 +20278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2661;
+ return 2672;
}
}
}
@@ -20190,7 +20311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2587;
+ return 2598;
}
}
else
@@ -20264,7 +20385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2663;
+ return 2674;
}
}
}
@@ -20297,7 +20418,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2664;
+ return 2675;
}
}
else
@@ -20344,7 +20465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2594;
+ return 2605;
}
else
{
@@ -20352,7 +20473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2596;
+ return 2607;
}
}
else
@@ -20363,7 +20484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2598;
+ return 2609;
}
else
{
@@ -20377,7 +20498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2599;
+ return 2610;
}
else
{
@@ -20385,7 +20506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2592;
+ return 2603;
}
}
else
@@ -20394,7 +20515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2601;
+ return 2612;
}
}
else
@@ -20407,7 +20528,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2600;
+ return 2611;
}
else
{
@@ -20415,7 +20536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2605;
+ return 2616;
}
}
else
@@ -20424,7 +20545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2602;
+ return 2613;
}
}
}
@@ -20605,7 +20726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2586;
+ return 2597;
}
}
else
@@ -20636,7 +20757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2662;
+ return 2673;
}
else
{
@@ -20655,7 +20776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2678;
+ return 2689;
}
else
{
@@ -20665,7 +20786,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2676;
+ return 2687;
}
else
{
@@ -20675,7 +20796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2683;
+ return 2694;
}
else
{
@@ -20683,7 +20804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2682;
+ return 2693;
}
}
}
@@ -21267,7 +21388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2679;
+ return 2690;
}
else
{
@@ -21275,7 +21396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2680;
+ return 2691;
}
}
}
@@ -21593,7 +21714,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2597;
+ return 2608;
}
}
else
@@ -22204,7 +22325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2590;
+ return 2601;
}
}
}
@@ -22256,7 +22377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2603;
+ return 2614;
}
}
}
@@ -22499,7 +22620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2593;
+ return 2604;
}
}
else
@@ -22575,7 +22696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2606;
+ return 2617;
}
}
else
@@ -23401,7 +23522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2591;
+ return 2602;
}
}
else
@@ -23433,7 +23554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2604;
+ return 2615;
}
}
else
@@ -23673,7 +23794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2595;
+ return 2606;
}
}
else
@@ -23705,7 +23826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2609;
+ return 2620;
}
else
{
@@ -23713,7 +23834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2613;
+ return 2624;
}
}
}
@@ -23735,7 +23856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2610;
+ return 2621;
}
else
{
@@ -23743,7 +23864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2614;
+ return 2625;
}
}
}
@@ -23782,7 +23903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2607;
+ return 2618;
}
else
{
@@ -23790,7 +23911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2611;
+ return 2622;
}
}
else
@@ -23812,7 +23933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2608;
+ return 2619;
}
else
{
@@ -23820,7 +23941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2612;
+ return 2623;
}
}
else
@@ -25628,7 +25749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2615;
+ return 2626;
}
else
{
@@ -25636,7 +25757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2619;
+ return 2630;
}
}
else
@@ -25658,7 +25779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2616;
+ return 2627;
}
else
{
@@ -25666,7 +25787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2620;
+ return 2631;
}
}
else
@@ -26172,7 +26293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2617;
+ return 2628;
}
else
{
@@ -26180,7 +26301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2621;
+ return 2632;
}
}
}
@@ -26202,7 +26323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2618;
+ return 2629;
}
else
{
@@ -26210,7 +26331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2622;
+ return 2633;
}
}
}
@@ -26266,7 +26387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2589;
+ return 2600;
}
else
{
@@ -26274,7 +26395,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2588;
+ return 2599;
}
}
}
@@ -26377,7 +26498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2666;
+ return 2677;
}
else
{
@@ -26385,7 +26506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2665;
+ return 2676;
}
}
else
@@ -26396,7 +26517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2677;
+ return 2688;
}
else
{
@@ -26406,7 +26527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2685;
+ return 2696;
}
else
{
@@ -26414,7 +26535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2684;
+ return 2695;
}
}
}
@@ -26903,24 +27024,24 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
{
case 2389: value = 2391; break; /* mov --> mova. */
case 2391: return NULL; /* mova --> NULL. */
- case 2499: value = 2507; break; /* mov --> mova. */
- case 2507: return NULL; /* mova --> NULL. */
- case 2497: value = 2505; break; /* mov --> mova. */
- case 2505: return NULL; /* mova --> NULL. */
- case 2500: value = 2508; break; /* mov --> mova. */
- case 2508: return NULL; /* mova --> NULL. */
- case 2498: value = 2506; break; /* mov --> mova. */
- case 2506: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2495: value = 2503; break; /* mov --> mova. */
- case 2503: return NULL; /* mova --> NULL. */
- case 2493: value = 2501; break; /* mov --> mova. */
- case 2501: return NULL; /* mova --> NULL. */
- case 2496: value = 2504; break; /* mov --> mova. */
- case 2504: return NULL; /* mova --> NULL. */
- case 2494: value = 2502; break; /* mov --> mova. */
- case 2502: return NULL; /* mova --> NULL. */
+ case 2506: value = 2514; break; /* mov --> mova. */
+ case 2514: return NULL; /* mova --> NULL. */
+ case 2502: value = 2510; break; /* mov --> mova. */
+ case 2510: return NULL; /* mova --> NULL. */
+ case 2504: value = 2512; break; /* mov --> mova. */
+ case 2512: return NULL; /* mova --> NULL. */
+ case 2500: value = 2508; break; /* mov --> mova. */
+ case 2508: return NULL; /* mova --> NULL. */
+ case 2507: value = 2515; break; /* mov --> mova. */
+ case 2515: return NULL; /* mova --> NULL. */
+ case 2503: value = 2511; break; /* mov --> mova. */
+ case 2511: return NULL; /* mova --> NULL. */
+ case 2505: value = 2513; break; /* mov --> mova. */
+ case 2513: return NULL; /* mova --> NULL. */
+ case 2501: value = 2509; break; /* mov --> mova. */
+ case 2509: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -26942,11 +27063,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2807; break; /* addg --> smax. */
- case 2807: value = 2808; break; /* smax --> umax. */
- case 2808: value = 2809; break; /* umax --> smin. */
- case 2809: value = 2810; break; /* smin --> umin. */
- case 2810: return NULL; /* umin --> NULL. */
+ case 19: value = 2818; break; /* addg --> smax. */
+ case 2818: value = 2819; break; /* smax --> umax. */
+ case 2819: value = 2820; break; /* umax --> smin. */
+ case 2820: value = 2821; break; /* smin --> umin. */
+ case 2821: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -27104,8 +27225,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2681; break; /* fcvt --> bfcvt. */
- case 2681: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2692; break; /* fcvt --> bfcvt. */
+ case 2692: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -27633,7 +27754,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 247:
+ case 256:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -27680,11 +27801,12 @@ aarch64_extract_operand (const aarch64_operand *self,
case 193:
case 194:
case 236:
- case 244:
- case 245:
- case 246:
+ case 250:
case 251:
- case 252:
+ case 253:
+ case 255:
+ case 260:
+ case 261:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -27755,6 +27877,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
+ case 252:
+ case 254:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
@@ -27867,6 +27991,12 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 234:
case 235:
+ case 244:
+ case 245:
+ case 246:
+ case 247:
+ case 248:
+ case 249:
return aarch64_ext_simple_index (self, info, code, inst, errors);
case 238:
case 239:
@@ -27878,9 +28008,9 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 243:
return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 248:
- case 249:
- case 250:
+ case 257:
+ case 258:
+ case 259:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index a2f69186355..0475adbc31d 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -702,6 +702,8 @@ aarch64_ext_imm (const aarch64_operand *self, aarch64_opnd_info *info,
if (operand_need_shift_by_two (self))
imm <<= 2;
+ else if (operand_need_shift_by_three (self))
+ imm <<= 3;
else if (operand_need_shift_by_four (self))
imm <<= 4;
@@ -3072,6 +3074,19 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
}
break;
+ case sme_size_12_bhs:
+ variant = extract_field (FLD_SME_size_12, inst->value, 0);
+ if (variant >= 3)
+ return false;
+ break;
+
+ case sme_size_12_hs:
+ variant = extract_field (FLD_SME_size_12, inst->value, 0);
+ if (variant != 1 && variant != 2)
+ return false;
+ variant -= 1;
+ break;
+
case sme_size_22:
variant = extract_field (FLD_SME_size_22, inst->value, 0);
break;
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 9f2b670c49a..21e06e6114f 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -268,8 +268,17 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX1_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm1_16}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_15", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_15}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_16}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX3_14", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm3_14}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX3_15", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm3_15}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX4_14", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm4_14}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_IMMEDIATE, "SME_VLxN_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_VL_10}, "VLx2 or VLx4"},
{AARCH64_OPND_CLASS_IMMEDIATE, "SME_VLxN_13", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_VL_13}, "VLx2 or VLx4"},
+ {AARCH64_OPND_CLASS_SYSTEM, "SME_ZT0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "ZT0"},
+ {AARCH64_OPND_CLASS_IMMEDIATE, "SME_ZT0_INDEX", OPD_F_SHIFT_BY_3 | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm3_12}, "a ZT0 index"},
+ {AARCH64_OPND_CLASS_SYSTEM, "SME_ZT0_LIST", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "{ ZT0 }"},
{AARCH64_OPND_CLASS_IMMEDIATE, "TME_UIMM16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm16_5}, "a 16-bit unsigned immediate for TME tcancel"},
{AARCH64_OPND_CLASS_SIMD_ELEMENT, "SM3_IMM2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SM3_imm2}, "an indexed SM3 vector immediate"},
{AARCH64_OPND_CLASS_INT_REG, "MOPS_ADDR_Rd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "a register destination address with writeback"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 3b4397d0f06..cd185b8af29 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -249,6 +249,7 @@ const aarch64_field fields[] =
{ 0, 3 }, /* SME_Zt3: lower 3 bits of Zt, bits [2:0]. */
{ 0, 2 }, /* SME_Zt2: lower 2 bits of Zt, bits [1:0]. */
{ 23, 1 }, /* SME_i1: immediate field, bit 23. */
+ { 12, 2 }, /* SME_size_12: bits [13:12]. */
{ 22, 2 }, /* SME_size_22: size<1>, size<0> class field, [23:22]. */
{ 22, 1 }, /* SME_tszh: immediate and qualifier field, bit 22. */
{ 18, 3 }, /* SME_tszl: immediate and qualifier field, bits [20:18]. */
@@ -318,14 +319,21 @@ const aarch64_field fields[] =
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
{ 8, 1 }, /* imm1_8: general immediate in bits [8]. */
+ { 16, 1 }, /* imm1_16: general immediate in bits [16]. */
{ 8, 2 }, /* imm2_8: general immediate in bits [9:8]. */
+ { 15, 2 }, /* imm2_15: 2-bit immediate, bits [16:15] */
+ { 16, 2 }, /* imm2_16: 2-bit immediate, bits [17:16] */
{ 0, 3 }, /* imm3_0: general immediate in bits [2:0]. */
{ 5, 3 }, /* imm3_5: general immediate in bits [7:5]. */
{ 10, 3 }, /* imm3_10: in add/sub extended reg instructions. */
+ { 12, 3 }, /* imm3_12: general immediate in bits [14:12]. */
+ { 14, 3 }, /* imm3_14: general immediate in bits [16:14]. */
+ { 15, 3 }, /* imm3_15: general immediate in bits [17:15]. */
{ 0, 4 }, /* imm4_0: in rmif instructions. */
{ 5, 4 }, /* imm4_5: in SME instructions. */
{ 10, 4 }, /* imm4_10: in adddg/subg instructions. */
{ 11, 4 }, /* imm4_11: in advsimd ext and advsimd ins instructions. */
+ { 14, 4 }, /* imm4_14: general immediate in bits [17:14]. */
{ 16, 5 }, /* imm5: in conditional compare (immediate) instructions. */
{ 10, 6 }, /* imm6_10: in add/sub reg shifted instructions. */
{ 15, 6 }, /* imm6_15: in rmif instructions. */
@@ -1744,6 +1752,18 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
return 0;
break;
+ case AARCH64_OPND_SME_Zn_INDEX1_16:
+ case AARCH64_OPND_SME_Zn_INDEX2_15:
+ case AARCH64_OPND_SME_Zn_INDEX2_16:
+ case AARCH64_OPND_SME_Zn_INDEX3_14:
+ case AARCH64_OPND_SME_Zn_INDEX3_15:
+ case AARCH64_OPND_SME_Zn_INDEX4_14:
+ size = get_operand_fields_width (get_operand_from_code (type)) - 5;
+ if (!check_reglane (opnd, mismatch_detail, idx, "z", 0, 31,
+ 0, (1 << size) - 1))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_PnT_Wm_imm:
size = aarch64_get_qualifier_esize (opnd->qualifier);
max_value = 16 / size - 1;
@@ -2862,6 +2882,20 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
}
break;
+ case AARCH64_OPND_SME_ZT0_INDEX:
+ if (!value_in_range_p (opnd->imm.value, 0, 56))
+ {
+ set_elem_idx_out_of_range_error (mismatch_detail, idx, 0, 56);
+ return 0;
+ }
+ if (opnd->imm.value % 8 != 0)
+ {
+ set_other_error (mismatch_detail, idx,
+ _("byte index must be a multiple of 8"));
+ return 0;
+ }
+ break;
+
default:
break;
}
@@ -3867,9 +3901,17 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_Zm4_11_INDEX:
case AARCH64_OPND_SVE_Zm4_INDEX:
case AARCH64_OPND_SVE_Zn_INDEX:
+ case AARCH64_OPND_SME_Zn_INDEX1_16:
+ case AARCH64_OPND_SME_Zn_INDEX2_15:
+ case AARCH64_OPND_SME_Zn_INDEX2_16:
+ case AARCH64_OPND_SME_Zn_INDEX3_14:
+ case AARCH64_OPND_SME_Zn_INDEX3_15:
+ case AARCH64_OPND_SME_Zn_INDEX4_14:
snprintf (buf, size, "%s[%s]",
- style_reg (styler, "z%d.%s", opnd->reglane.regno,
- aarch64_get_qualifier_name (opnd->qualifier)),
+ (opnd->qualifier == AARCH64_OPND_QLF_NIL
+ ? style_reg (styler, "z%d", opnd->reglane.regno)
+ : style_reg (styler, "z%d.%s", opnd->reglane.regno,
+ aarch64_get_qualifier_name (opnd->qualifier))),
style_imm (styler, "%" PRIi64, opnd->reglane.index));
break;
@@ -4450,6 +4492,19 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
snprintf (buf, size, "%s", style_sub_mnem (styler, "csync"));
break;
+ case AARCH64_OPND_SME_ZT0:
+ snprintf (buf, size, "%s", style_reg (styler, "zt0"));
+ break;
+
+ case AARCH64_OPND_SME_ZT0_INDEX:
+ snprintf (buf, size, "%s[%s]", style_reg (styler, "zt0"),
+ style_imm (styler, "%d", (int) opnd->imm.value));
+ break;
+
+ case AARCH64_OPND_SME_ZT0_LIST:
+ snprintf (buf, size, "{%s}", style_reg (styler, "zt0"));
+ break;
+
case AARCH64_OPND_BTI_TARGET:
if ((HINT_FLAG (opnd->hint_option->value) & HINT_OPD_F_NOPRINT) == 0)
snprintf (buf, size, "%s",
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index e505786e60e..8422be4c9db 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -70,6 +70,7 @@ enum aarch64_field_kind
FLD_SME_Zt3,
FLD_SME_Zt2,
FLD_SME_i1,
+ FLD_SME_size_12,
FLD_SME_size_22,
FLD_SME_tszh,
FLD_SME_tszl,
@@ -139,14 +140,21 @@ enum aarch64_field_kind
FLD_defgh,
FLD_hw,
FLD_imm1_8,
+ FLD_imm1_16,
FLD_imm2_8,
+ FLD_imm2_15,
+ FLD_imm2_16,
FLD_imm3_0,
FLD_imm3_5,
FLD_imm3_10,
+ FLD_imm3_12,
+ FLD_imm3_14,
+ FLD_imm3_15,
FLD_imm4_0,
FLD_imm4_5,
FLD_imm4_10,
FLD_imm4_11,
+ FLD_imm4_14,
FLD_imm5,
FLD_imm6_10,
FLD_imm6_15,
@@ -242,7 +250,10 @@ verify_constraints (const struct aarch64_inst *, const aarch64_insn, bfd_vma,
#define OPD_F_OD_MASK 0x000001e0 /* Operand-dependent data. */
#define OPD_F_OD_LSB 5
#define OPD_F_NO_ZR 0x00000200 /* ZR index not allowed. */
-#define OPD_F_SHIFT_BY_4 0x00000400 /* Need to left shift the field
+#define OPD_F_SHIFT_BY_3 0x00000400 /* Need to left shift the field
+ value by 3 to get the value
+ of an immediate operand. */
+#define OPD_F_SHIFT_BY_4 0x00000800 /* Need to left shift the field
value by 4 to get the value
of an immediate operand. */
@@ -329,6 +340,12 @@ operand_need_shift_by_two (const aarch64_operand *operand)
return (operand->flags & OPD_F_SHIFT_BY_2) != 0;
}
+static inline bool
+operand_need_shift_by_three (const aarch64_operand *operand)
+{
+ return (operand->flags & OPD_F_SHIFT_BY_3) != 0;
+}
+
static inline bool
operand_need_shift_by_four (const aarch64_operand *operand)
{
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index cff35b127bd..0f881681aab 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1755,6 +1755,10 @@
{ \
QLF3(NIL,NIL,S_S), \
}
+#define OP_SVE_UX \
+{ \
+ QLF2(NIL,X), \
+}
#define OP_SVE_VMR_BHSD \
{ \
QLF3(S_B,P_M,W), \
@@ -1905,6 +1909,12 @@
QLF3(S_S,NIL,W), \
QLF3(S_D,NIL,X), \
}
+#define OP_SVE_VUU_BHS \
+{ \
+ QLF3(S_B,NIL,NIL), \
+ QLF3(S_H,NIL,NIL), \
+ QLF3(S_S,NIL,NIL), \
+}
#define OP_SVE_VUU_BHSD \
{ \
QLF3(S_B,NIL,NIL), \
@@ -1919,6 +1929,11 @@
QLF4(S_S,NIL,S_S,S_S), \
QLF4(S_D,NIL,S_D,S_D), \
}
+#define OP_SVE_VUU_HS \
+{ \
+ QLF3(S_H,NIL,NIL), \
+ QLF3(S_S,NIL,NIL), \
+}
#define OP_SVE_VUVV_HSD \
{ \
QLF4(S_H,NIL,S_H,S_H), \
@@ -5375,6 +5390,13 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("ldnt1w", 0xa000c001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
SME2_INSN ("ldnt1w", 0xa1004008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
SME2_INSN ("ldnt1w", 0xa100c008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SZU, 0, 0),
+ SME2_INSN ("ldr", 0xe11f8000, 0xfffffc1f, sme_misc, 0, OP2 (SME_ZT0, SIMD_ADDR_SIMPLE), {}, 0, 0),
+ SME2_INSN ("luti2", 0xc0cc0000, 0xfffc0c00, sme_size_12_bhs, 0, OP3 (SVE_Zd, SME_ZT0, SME_Zn_INDEX4_14), OP_SVE_VUU_BHS, 0, 0),
+ SME2_INSN ("luti2", 0xc08c4000, 0xfffc4c01, sme_size_12_bhs, 0, OP3 (SME_Zdnx2, SME_ZT0, SME_Zn_INDEX3_15), OP_SVE_VUU_BHS, 0, 0),
+ SME2_INSN ("luti2", 0xc08c8000, 0xfffccc03, sme_size_12_bhs, 0, OP3 (SME_Zdnx4, SME_ZT0, SME_Zn_INDEX2_16), OP_SVE_VUU_BHS, 0, 0),
+ SME2_INSN ("luti4", 0xc0ca0000, 0xfffe0c00, sme_size_12_bhs, 0, OP3 (SVE_Zd, SME_ZT0, SME_Zn_INDEX3_14), OP_SVE_VUU_BHS, 0, 0),
+ SME2_INSN ("luti4", 0xc08a4000, 0xfffe4c01, sme_size_12_bhs, 0, OP3 (SME_Zdnx2, SME_ZT0, SME_Zn_INDEX2_15), OP_SVE_VUU_BHS, 0, 0),
+ SME2_INSN ("luti4", 0xc08a8000, 0xfffecc03, sme_size_12_hs, 0, OP3 (SME_Zdnx4, SME_ZT0, SME_Zn_INDEX1_16), OP_SVE_VUU_HS, 0, 0),
SME2_INSN ("mov", 0xc0060800, 0xffff9f01, sme2_mov, 0, OP2 (SME_Zdnx2, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (2), 0),
SME2_INSN ("mov", 0xc0060c00, 0xffff9f03, sme2_mov, 0, OP2 (SME_Zdnx4, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (4), 0),
SME2_INSN ("mov", 0xc0060000, 0xff3f1f01, sme_size_22, 0, OP2 (SME_Zdnx2, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (2), 0),
@@ -5391,6 +5413,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("mova", 0xc0040c00, 0xffff9c78, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VV_BHSD, F_OD (4), 0),
SME2_INSN ("mova", 0xc0040000, 0xff3f1c38, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx2), OP_SVE_VV_BHSDQ, F_OD (2), 0),
SME2_INSN ("mova", 0xc0040400, 0xff3f1c78, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx4), OP_SVE_VV_BHSDQ, F_OD (4), 0),
+ SME2_INSN ("movt", 0xc04e03e0, 0xffff8fe0, sme_misc, 0, OP2 (SME_ZT0_INDEX, Rt), OP_SVE_UX, 0, 0),
+ SME2_INSN ("movt", 0xc04c03e0, 0xffff8fe0, sme_misc, 0, OP2 (Rt, SME_ZT0_INDEX), OP_SVE_XU, 0, 0),
SME2_INSN ("pext", 0x25207010, 0xff3ffc10, sme_size_22, 0, OP2 (SVE_Pd, SME_PNn3_INDEX2), OP_SVE_VU_BHSD, 0, 0),
SME2_INSN ("pext", 0x25207410, 0xff3ffe10, sme_size_22, 0, OP2 (SME_PdxN, SME_PNn3_INDEX1), OP_SVE_VU_BHSD, F_OD (2), 0),
SME2_INSN ("ptrue", 0x25207810, 0xff3ffff8, sme_size_22, 0, OP1 (SME_PNd3), OP_SVE_V_BHSD, 0, 0),
@@ -5460,6 +5484,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("stnt1w", 0xa020c001, 0xffe0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
SME2_INSN ("stnt1w", 0xa1204008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
SME2_INSN ("stnt1w", 0xa120c008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
+ SME2_INSN ("str", 0xe13f8000, 0xfffffc1f, sme_misc, 0, OP2 (SME_ZT0, SIMD_ADDR_SIMPLE), {}, 0, 0),
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
@@ -5468,6 +5493,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("whilelo", 0x25204c10, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilels", 0x25204c18, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilelt", 0x25204410, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
+ SME2_INSN ("zero", 0xc0480001, 0xffffffff, sme_misc, 0, OP1 (SME_ZT0_LIST), {}, 0, 0),
/* SIMD Dot Product (optional in v8.2-A). */
DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
@@ -6178,10 +6204,26 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(SVE_REG, sme_pred_reg_with_index, "SME_PnT_Wm_imm", 0, \
F(FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl), \
"Source scalable predicate register with index ") \
+ Y(SVE_REG, simple_index, "SME_Zn_INDEX1_16", 0, \
+ F(FLD_SVE_Zn, FLD_imm1_16), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zn_INDEX2_15", 0, \
+ F(FLD_SVE_Zn, FLD_imm2_15), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zn_INDEX2_16", 0, \
+ F(FLD_SVE_Zn, FLD_imm2_16), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zn_INDEX3_14", 0, \
+ F(FLD_SVE_Zn, FLD_imm3_14), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zn_INDEX3_15", 0, \
+ F(FLD_SVE_Zn, FLD_imm3_15), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zn_INDEX4_14", 0, \
+ F(FLD_SVE_Zn, FLD_imm4_14), "an indexed SVE vector register") \
Y(IMMEDIATE, imm, "SME_VLxN_10", 0, F(FLD_SME_VL_10), \
"VLx2 or VLx4") \
Y(IMMEDIATE, imm, "SME_VLxN_13", 0, F(FLD_SME_VL_13), \
"VLx2 or VLx4") \
+ Y(SYSTEM, none, "SME_ZT0", 0, F (), "ZT0") \
+ Y(IMMEDIATE, imm, "SME_ZT0_INDEX", OPD_F_SHIFT_BY_3, \
+ F (FLD_imm3_12), "a ZT0 index") \
+ Y(SYSTEM, none, "SME_ZT0_LIST", 0, F (), "{ ZT0 }") \
Y(IMMEDIATE, imm, "TME_UIMM16", 0, F(FLD_imm16_5), \
"a 16-bit unsigned immediate for TME tcancel") \
Y(SIMD_ELEMENT, reglane, "SM3_IMM2", 0, F(FLD_SM3_imm2), \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 11/31] aarch64: Add the SME2 ADD and SUB instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (9 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 10/31] aarch64: Add the SME2 ZT0 instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 12/31] aarch64: Add the SME2 maximum/minimum instructions Richard Sandiford
` (21 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
Add support for the SME2 ADD. SUB, FADD and FSUB instructions.
SUB and FSUB have the same form as ADD and FADD, except that
ADD also has a 2-operand accumulating form.
The 64-bit ADD/SUB instructions require FEAT_SME_I16I64 and the
64-bit FADD/FSUB instructions require FEAT_SME_F64F64.
These are the first instructions to have tied register list
operands, as opposed to tied single registers.
The parse_operands change prevents unsuffixed Z registers (width==-1)
from being treated as though they had an Advanced SIMD-style suffix
(.4s etc.). It means that:
Error: expected element type rather than vector type at operand 2 -- `add za\.s\[w8,0\],{z0-z1}'
becomes:
Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{z0-z1}'
---
gas/config/tc-aarch64.c | 3 +-
gas/testsuite/gas/aarch64/sme2-9-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-9-invalid.l | 179 +++
gas/testsuite/gas/aarch64/sme2-9-invalid.s | 128 ++
gas/testsuite/gas/aarch64/sme2-9-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-9-noarch.l | 177 +++
gas/testsuite/gas/aarch64/sme2-9.d | 185 +++
gas/testsuite/gas/aarch64/sme2-9.s | 199 +++
.../gas/aarch64/sme2-f64f64-1-invalid.d | 3 +
.../gas/aarch64/sme2-f64f64-1-invalid.l | 27 +
.../gas/aarch64/sme2-f64f64-1-invalid.s | 20 +
.../gas/aarch64/sme2-f64f64-1-noarch.d | 3 +
.../gas/aarch64/sme2-f64f64-1-noarch.l | 33 +
gas/testsuite/gas/aarch64/sme2-f64f64-1.d | 41 +
gas/testsuite/gas/aarch64/sme2-f64f64-1.s | 35 +
.../gas/aarch64/sme2-i16i64-1-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-1-invalid.l | 111 ++
.../gas/aarch64/sme2-i16i64-1-invalid.s | 86 ++
.../gas/aarch64/sme2-i16i64-1-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-1-noarch.l | 57 +
gas/testsuite/gas/aarch64/sme2-i16i64-1.d | 65 +
gas/testsuite/gas/aarch64/sme2-i16i64-1.s | 61 +
include/opcode/aarch64.h | 3 +
opcodes/aarch64-asm-2.c | 51 +-
opcodes/aarch64-asm.c | 2 +
opcodes/aarch64-dis-2.c | 1089 ++++++++++-------
opcodes/aarch64-dis.c | 2 +
opcodes/aarch64-opc-2.c | 1 +
opcodes/aarch64-opc.c | 71 +-
opcodes/aarch64-opc.h | 1 +
opcodes/aarch64-tbl.h | 20 +
31 files changed, 2177 insertions(+), 488 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-9-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-9-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-9-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-9-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-9-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-9.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-9.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 652fd4e6ff3..5e023152c17 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6659,6 +6659,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_Zm_16:
case AARCH64_OPND_SVE_Zn:
case AARCH64_OPND_SVE_Zt:
+ case AARCH64_OPND_SME_Zm:
reg_type = REG_TYPE_Z;
goto vector_reg;
@@ -6811,7 +6812,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
goto failure;
}
- if (vectype.width != 0 && *str != ',')
+ if ((int) vectype.width > 0 && *str != ',')
{
set_fatal_syntax_error
(_("expected element type rather than vector type"));
diff --git a/gas/testsuite/gas/aarch64/sme2-9-invalid.d b/gas/testsuite/gas/aarch64/sme2-9-invalid.d
new file mode 100644
index 00000000000..78b3fa2875b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-9-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-9-invalid.s
+#error_output: sme2-9-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-9-invalid.l b/gas/testsuite/gas/aarch64/sme2-9-invalid.l
new file mode 100644
index 00000000000..e181f0b7378
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-9-invalid.l
@@ -0,0 +1,179 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `add za\.s\[w8,0\],0'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z1\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z4\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z2\.s-z5\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z3\.s-z6\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{z0-z1}'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `add za\.s\[w8,0\],0,z0\.s'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},0'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w0,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.s\[w31,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,1<<63\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z31\.s'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `add za\.s\[w8,0:0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `add za\.s\[w8,0:-1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:100\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s,z1\.s,z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.s\[w8,0\],{z0\.s,z1\.s,z5\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{z0-z1},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z2\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z15\.s-z16\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z31\.s,z0\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z4\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z2\.s-z5\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z3\.s-z6\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z15\.s-z18\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z29\.s,z30\.s,z31\.s,z0\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z4\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z0\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `add {z0\.b-z2\.b},{z0\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z2\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z1\.b-z2\.b},{z1\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z31\.b,z0\.b},{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z16\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z31\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z1\.b},{z0\.h-z1\.h},z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Info: add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Info: add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.q-z1\.q},{z0\.q-z1\.q},z0\.q'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Info: add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z0\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z2\.b-z5\.b},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z1\.b-z4\.b},{z1\.b-z4\.b},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z2\.b-z5\.b},{z2\.b-z5\.b},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z3\.b-z6\.b},{z3\.b-z6\.b},z0\.b'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z31\.b,z0\.b,z1\.b,z2\.b},{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z16\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z31\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z3\.b},{z0\.h-z3\.h},z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Info: add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
+[^ :]+:[0-9]+: Info: add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Info: add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
+[^ :]+:[0-9]+: Info: add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.q-z3\.q},{z0\.q-z3\.q},z0\.q'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Info: add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
+[^ :]+:[0-9]+: Info: add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.b\[w8,0\],{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fadd za\.s\[w8, 0\], {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fadd za\.d\[w8, 0\], {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.h\[w8,0\],{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fadd za\.s\[w8, 0\], {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fadd za\.d\[w8, 0\], {z0\.d-z1\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-9-invalid.s b/gas/testsuite/gas/aarch64/sme2-9-invalid.s
new file mode 100644
index 00000000000..d5bfc095e21
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-9-invalid.s
@@ -0,0 +1,128 @@
+ add 0, { z0.s - z1.s }
+ add za.s[w8, 0], 0
+
+ add za.s[w7, 0], { z0.s - z1.s }
+ add za.s[w12, 0], { z0.s - z1.s }
+ add za.s[w8, -1], { z0.s - z1.s }
+ add za.s[w8, 8], { z0.s - z1.s }
+ add za.s[w8, 0], { z0.s - z2.s }
+ add za.s[w8, 0], { z1.s - z2.s }
+
+ add za.s[w7, 0], { z0.s - z3.s }
+ add za.s[w12, 0], { z0.s - z3.s }
+ add za.s[w8, -1], { z0.s - z3.s }
+ add za.s[w8, 8], { z1.s - z3.s }
+ add za.s[w8, 0], { z1.s - z4.s }
+ add za.s[w8, 0], { z2.s - z5.s }
+ add za.s[w8, 0], { z3.s - z6.s }
+
+ add za.s[w8, 0, vgx4], { z0.s - z1.s }
+ add za.s[w8, 0, vgx2], { z0.s - z3.s }
+ add za[w8, 0], { z0.s - z1.s }
+ add za.s[w8, 0], { z0 - z1 }
+
+ add 0, { z0.s - z1.s }, z0.s
+ add za.s[w8, 0], 0, z0.s
+ add za.s[w8, 0], { z0.s - z1.s }, 0
+
+ add za.s[w0, 0], { z0.s - z1.s }, z0.s
+ add za.s[w31, 0], { z0.s - z1.s }, z0.s
+ add za.s[w8, 1<<63], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0], { z0.s - z1.s }, z31.s
+ add za.s[w8, 0:0], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0:-1], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0:1], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0:100], { z0.s - z1.s }, z0.s
+
+ add za.s[w7, 0], { z0.s - z1.s }, z0.s
+ add za.s[w12, 0], { z0.s - z1.s }, z0.s
+ add za.s[w8, -1], { z0.s - z1.s }, z0.s
+ add za.s[w8, 8], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0], { z0.s - z1.s }, z16.s
+
+ add za.s[w7, 0], { z0.s - z3.s }, z0.s
+ add za.s[w12, 0], { z0.s - z3.s }, z0.s
+ add za.s[w8, -1], { z0.s - z3.s }, z0.s
+ add za.s[w8, 8], { z0.s - z3.s }, z0.s
+ add za.s[w8, 0], { z0.s - z3.s }, z16.s
+
+ add za.s[w8, 0], { z0.s - z2.s }, z0.s
+ add za.s[w8, 0], { z0.s - z4.s }, z0.s
+ add za.s[w8, 0], { z0.s, z1.s, z2.s }, z0.s
+ add za.s[w8, 0], { z0.s, z1.s, z5.s }, z0.s
+
+ add za.s[w8, 0, vgx4], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0, vgx2], { z0.s - z3.s }, z0.s
+ add za[w8, 0], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0], { z0 - z1 }, z0.s
+ add za.s[w8, 0], { z0.s - z1.s }, z0
+ add za[w8, 0], { z0.s - z1.s }, z0
+
+ add za.s[w7, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ add za.s[w12, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ add za.s[w8, -1], { z0.s - z1.s }, { z0.s - z1.s }
+ add za.s[w8, 8], { z0.s - z1.s }, { z0.s - z1.s }
+ add za.s[w8, 0], { z1.s - z2.s }, { z0.s - z1.s }
+ add za.s[w8, 0], { z0.s - z1.s }, { z15.s - z16.s }
+ add za.s[w8, 0], { z0.s - z1.s }, { z31.s, z0.s }
+
+ add za.s[w7, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ add za.s[w12, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ add za.s[w8, -1], { z0.s - z3.s }, { z0.s - z3.s }
+ add za.s[w8, 8], { z0.s - z3.s }, { z0.s - z3.s }
+ add za.s[w8, 0], { z1.s - z4.s }, { z0.s - z3.s }
+ add za.s[w8, 0], { z2.s - z5.s }, { z0.s - z3.s }
+ add za.s[w8, 0], { z3.s - z6.s }, { z0.s - z3.s }
+ add za.s[w8, 0], { z0.s - z3.s }, { z15.s - z18.s }
+ add za.s[w8, 0], { z0.s - z3.s }, { z29.s, z30.s, z31.s, z0.s }
+
+ add za.s[w8, 0], { z0.s - z2.s }, { z0.s - z1.s }
+ add za.s[w8, 0], { z0.s - z3.s }, { z0.s - z1.s }
+ add za.s[w8, 0], { z0.s - z1.s }, { z0.s - z2.s }
+ add za.s[w8, 0], { z0.s - z1.s }, { z0.s - z3.s }
+ add za.s[w8, 0], { z0.s - z1.s }, { z0.s - z4.s }
+
+ add za.s[w8, 0, vgx4], { z0.s - z1.s }, { z0.s - z3.s }
+ add za.s[w8, 0, vgx4], { z0.s - z3.s }, { z0.s - z1.s }
+ add za.s[w8, 0, vgx2], { z0.s - z1.s }, { z0.s - z3.s }
+ add za.s[w8, 0, vgx2], { z0.s - z3.s }, { z0.s - z1.s }
+ add za[w8, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ add za[w8, 0], { z0.s - z3.s }, { z0.s - z3.s }
+
+ add { z0.b - z1.b }, { z0.b - z2.b }, z0.b
+ add { z0.b - z1.b }, { z0.b - z3.b }, z0.b
+ add { z0.b - z2.b }, { z0.b - z2.b }, z0.b
+ add { z0.b - z1.b }, { z2.b - z3.b }, z0.b
+ add { z1.b - z2.b }, { z1.b - z2.b }, z0.b
+ add { z31.b, z0.b }, { z31.b, z0.b }, z0.b
+ add { z0.b - z1.b }, { z0.b - z1.b }, z16.b
+ add { z0.b - z1.b }, { z0.b - z1.b }, z31.b
+ add { z0.b - z1.b }, { z0.h - z1.h }, z0.b
+ add { z0.b - z1.b }, { z0.b - z1.b }, z0.h
+ add { z0.q - z1.q }, { z0.q - z1.q }, z0.q
+
+ add { z0.b - z3.b }, { z0.b - z2.b }, z0.b
+ add { z0.b - z3.b }, { z0.b - z1.b }, z0.b
+ add { z0.b - z3.b }, { z2.b - z5.b }, z0.b
+ add { z1.b - z4.b }, { z1.b - z4.b }, z0.b
+ add { z2.b - z5.b }, { z2.b - z5.b }, z0.b
+ add { z3.b - z6.b }, { z3.b - z6.b }, z0.b
+ add { z31.b, z0.b, z1.b, z2.b }, { z31.b, z0.b, z1.b, z2.b }, z0.b
+ add { z0.b - z3.b }, { z0.b - z3.b }, z16.b
+ add { z0.b - z3.b }, { z0.b - z3.b }, z31.b
+ add { z0.b - z3.b }, { z0.h - z3.h }, z0.b
+ add { z0.b - z3.b }, { z0.b - z3.b }, z0.h
+ add { z0.q - z3.q }, { z0.q - z3.q }, z0.q
+
+ sub { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ sub { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ sub { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ sub { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+
+ sub { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ sub { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ sub { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ sub { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+
+ fadd za.b[w8, 0], { z0.b - z1.b }
+ fadd za.h[w8, 0], { z0.h - z1.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-9-noarch.d b/gas/testsuite/gas/aarch64/sme2-9-noarch.d
new file mode 100644
index 00000000000..076b3dabf58
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-9-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-9.s
+#error_output: sme2-9-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-9-noarch.l b/gas/testsuite/gas/aarch64/sme2-9-noarch.l
new file mode 100644
index 00000000000..1a2ad07a209
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-9-noarch.l
@@ -0,0 +1,177 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,3\],{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,1\],{z12\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z14\.b-z15\.b},{z14\.b-z15\.b},z5\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z20\.h-z21\.h},{z20\.h-z21\.h},z11\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z2\.s-z3\.s},{z2\.s-z3\.s},z9\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.d-z29\.d},{z28\.d-z29\.d},z1\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z24\.b-z27\.b},{z24\.b-z27\.b},z5\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z20\.h-z23\.h},{z20\.h-z23\.h},z11\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z4\.s-z7\.s},{z4\.s-z7\.s},z9\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add {z16\.d-z19\.d},{z16\.d-z19\.d},z3\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,3\],{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,1\],{z12\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w10,3\],{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,1\],{z12\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w10,3\],{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,1\],{z12\.s-z15\.s}'
diff --git a/gas/testsuite/gas/aarch64/sme2-9.d b/gas/testsuite/gas/aarch64/sme2-9.d
new file mode 100644
index 00000000000..ece09550d66
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-9.d
@@ -0,0 +1,185 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1a01c10 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c10 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c10 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c10 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a07c10 add za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c17 add za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01fd0 add za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}
+[^:]+: c1a05d53 add za\.s\[w10, 3, vgx2\], {z10\.s-z11\.s}
+[^:]+: c1a11c10 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c10 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c10 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c10 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a17c10 add za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c17 add za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11f90 add za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}
+[^:]+: c1a17d91 add za\.s\[w11, 1, vgx4\], {z12\.s-z15\.s}
+[^:]+: c1201810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1207810 add za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201817 add za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201bd0 add za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, z0\.s
+[^:]+: c1201bf0 add za\.s\[w8, 0, vgx2\], {z31\.s-z0\.s}, z0\.s
+[^:]+: c1201bf0 add za\.s\[w8, 0, vgx2\], {z31\.s-z0\.s}, z0\.s
+[^:]+: c12f1810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z15\.s
+[^:]+: c1263935 add za\.s\[w9, 5, vgx2\], {z9\.s-z10\.s}, z6\.s
+[^:]+: c1301810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1307810 add za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301817 add za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301b90 add za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, z0\.s
+[^:]+: c1301bf0 add za\.s\[w8, 0, vgx4\], {z31\.s-z2\.s}, z0\.s
+[^:]+: c1301bf0 add za\.s\[w8, 0, vgx4\], {z31\.s-z2\.s}, z0\.s
+[^:]+: c13f1810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z15\.s
+[^:]+: c13d7af2 add za\.s\[w11, 2, vgx4\], {z23\.s-z26\.s}, z13\.s
+[^:]+: c1a01810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a07810 add za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01817 add za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01bd0 add za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1be1810 add za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1b25ad1 add za\.s\[w10, 1, vgx2\], {z22\.s-z23\.s}, {z18\.s-z19\.s}
+[^:]+: c1a11810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a17810 add za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11817 add za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11b90 add za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bd1810 add za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b97a13 add za\.s\[w11, 3, vgx4\], {z16\.s-z19\.s}, {z24\.s-z27\.s}
+[^:]+: c120a300 add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b
+[^:]+: c120a31e add {z30\.b-z31\.b}, {z30\.b-z31\.b}, z0\.b
+[^:]+: c12fa300 add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z15\.b
+[^:]+: c125a30e add {z14\.b-z15\.b}, {z14\.b-z15\.b}, z5\.b
+[^:]+: c160a300 add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
+[^:]+: c160a31e add {z30\.h-z31\.h}, {z30\.h-z31\.h}, z0\.h
+[^:]+: c16fa300 add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z15\.h
+[^:]+: c16ba314 add {z20\.h-z21\.h}, {z20\.h-z21\.h}, z11\.h
+[^:]+: c1a0a300 add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
+[^:]+: c1a0a31e add {z30\.s-z31\.s}, {z30\.s-z31\.s}, z0\.s
+[^:]+: c1afa300 add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z15\.s
+[^:]+: c1a9a302 add {z2\.s-z3\.s}, {z2\.s-z3\.s}, z9\.s
+[^:]+: c1e0a300 add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
+[^:]+: c1e0a31e add {z30\.d-z31\.d}, {z30\.d-z31\.d}, z0\.d
+[^:]+: c1efa300 add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z15\.d
+[^:]+: c1e1a31c add {z28\.d-z29\.d}, {z28\.d-z29\.d}, z1\.d
+[^:]+: c120ab00 add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b
+[^:]+: c120ab1c add {z28\.b-z31\.b}, {z28\.b-z31\.b}, z0\.b
+[^:]+: c12fab00 add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z15\.b
+[^:]+: c125ab18 add {z24\.b-z27\.b}, {z24\.b-z27\.b}, z5\.b
+[^:]+: c160ab00 add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
+[^:]+: c160ab1c add {z28\.h-z31\.h}, {z28\.h-z31\.h}, z0\.h
+[^:]+: c16fab00 add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z15\.h
+[^:]+: c16bab14 add {z20\.h-z23\.h}, {z20\.h-z23\.h}, z11\.h
+[^:]+: c1a0ab00 add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
+[^:]+: c1a0ab1c add {z28\.s-z31\.s}, {z28\.s-z31\.s}, z0\.s
+[^:]+: c1afab00 add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z15\.s
+[^:]+: c1a9ab04 add {z4\.s-z7\.s}, {z4\.s-z7\.s}, z9\.s
+[^:]+: c1e0ab00 add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
+[^:]+: c1e0ab1c add {z28\.d-z31\.d}, {z28\.d-z31\.d}, z0\.d
+[^:]+: c1efab00 add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z15\.d
+[^:]+: c1e3ab10 add {z16\.d-z19\.d}, {z16\.d-z19\.d}, z3\.d
+[^:]+: c1a01c18 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c18 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c18 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c18 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a07c18 sub za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c1f sub za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01fd8 sub za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}
+[^:]+: c1a05d5b sub za\.s\[w10, 3, vgx2\], {z10\.s-z11\.s}
+[^:]+: c1a11c18 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c18 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c18 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c18 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a17c18 sub za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c1f sub za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11f98 sub za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}
+[^:]+: c1a17d99 sub za\.s\[w11, 1, vgx4\], {z12\.s-z15\.s}
+[^:]+: c1201818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1207818 sub za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c120181f sub za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201bd8 sub za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, z0\.s
+[^:]+: c1201bf8 sub za\.s\[w8, 0, vgx2\], {z31\.s-z0\.s}, z0\.s
+[^:]+: c1201bf8 sub za\.s\[w8, 0, vgx2\], {z31\.s-z0\.s}, z0\.s
+[^:]+: c12f1818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z15\.s
+[^:]+: c126393d sub za\.s\[w9, 5, vgx2\], {z9\.s-z10\.s}, z6\.s
+[^:]+: c1301818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1307818 sub za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c130181f sub za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301b98 sub za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, z0\.s
+[^:]+: c1301bf8 sub za\.s\[w8, 0, vgx4\], {z31\.s-z2\.s}, z0\.s
+[^:]+: c1301bf8 sub za\.s\[w8, 0, vgx4\], {z31\.s-z2\.s}, z0\.s
+[^:]+: c13f1818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z15\.s
+[^:]+: c13d7afa sub za\.s\[w11, 2, vgx4\], {z23\.s-z26\.s}, z13\.s
+[^:]+: c1a01818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a07818 sub za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a0181f sub za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01bd8 sub za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1be1818 sub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1b25ad9 sub za\.s\[w10, 1, vgx2\], {z22\.s-z23\.s}, {z18\.s-z19\.s}
+[^:]+: c1a11818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a17818 sub za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a1181f sub za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11b98 sub za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bd1818 sub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b97a1b sub za\.s\[w11, 3, vgx4\], {z16\.s-z19\.s}, {z24\.s-z27\.s}
+[^:]+: c1a01c00 fadd za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c00 fadd za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c00 fadd za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c00 fadd za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a07c00 fadd za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c07 fadd za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01fc0 fadd za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}
+[^:]+: c1a05d43 fadd za\.s\[w10, 3, vgx2\], {z10\.s-z11\.s}
+[^:]+: c1a11c00 fadd za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c00 fadd za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c00 fadd za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c00 fadd za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a17c00 fadd za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c07 fadd za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11f80 fadd za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}
+[^:]+: c1a17d81 fadd za\.s\[w11, 1, vgx4\], {z12\.s-z15\.s}
+[^:]+: c1a01c08 fsub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c08 fsub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c08 fsub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c08 fsub za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a07c08 fsub za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01c0f fsub za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}
+[^:]+: c1a01fc8 fsub za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}
+[^:]+: c1a05d4b fsub za\.s\[w10, 3, vgx2\], {z10\.s-z11\.s}
+[^:]+: c1a11c08 fsub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c08 fsub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c08 fsub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c08 fsub za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a17c08 fsub za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11c0f fsub za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}
+[^:]+: c1a11f88 fsub za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}
+[^:]+: c1a17d89 fsub za\.s\[w11, 1, vgx4\], {z12\.s-z15\.s}
diff --git a/gas/testsuite/gas/aarch64/sme2-9.s b/gas/testsuite/gas/aarch64/sme2-9.s
new file mode 100644
index 00000000000..838e75b684e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-9.s
@@ -0,0 +1,199 @@
+ add za.s[w8, 0], { z0.s - z1.s }
+ add za.s[w8, 0, vgx2], { z0.s - z1.s }
+ ADD ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }
+ ADD ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }
+ add za.s[w11, 0], { z0.s - z1.s }
+ add za.s[w8, 7], { z0.s - z1.s }
+ add za.s[w8, 0], { z30.s - z31.s }
+ add za.s[w10, 3], { z10.s - z11.s }
+
+ add za.s[w8, 0], { z0.s - z3.s }
+ add za.s[w8, 0, vgx4], { z0.s - z3.s }
+ ADD ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }
+ ADD ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }
+ add za.s[w11, 0], { z0.s - z3.s }
+ add za.s[w8, 7], { z0.s - z3.s }
+ add za.s[w8, 0], { z28.s - z31.s }
+ add za.s[w11, 1], { z12.s - z15.s }
+
+ add za.s[w8, 0], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0, vgx2], { z0.s - z1.s }, z0.s
+ ADD ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }, Z0.s
+ ADD ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }, Z0.S
+ add za.s[w11, 0], { z0.s - z1.s }, z0.s
+ add za.s[w8, 7], { z0.s - z1.s }, z0.s
+ add za.s[w8, 0], { z30.s - z31.s }, z0.s
+ add za.s[w8, 0], { z31.s, z0.s }, z0.s
+ add za.s[w8, 0], { z31.s - z0.s }, z0.s
+ add za.s[w8, 0], { z0.s - z1.s }, z15.s
+ add za.s[w9, 5], { z9.s - z10.s }, z6.s
+
+ add za.s[w8, 0], { z0.s - z3.s }, z0.s
+ add za.s[w8, 0, vgx4], { z0.s - z3.s }, z0.s
+ ADD ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }, Z0.s
+ ADD ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, Z0.S
+ add za.s[w11, 0], { z0.s - z3.s }, z0.s
+ add za.s[w8, 7], { z0.s - z3.s }, z0.s
+ add za.s[w8, 0], { z28.s - z31.s }, z0.s
+ add za.s[w8, 0], { z31.s, z0.s, z1.s, z2.s }, z0.s
+ add za.s[w8, 0], { z31.s - z2.s }, z0.s
+ add za.s[w8, 0], { z0.s - z3.s }, z15.s
+ add za.s[w11, 2], { z23.s - z26.s }, z13.s
+
+ add za.s[w8, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ add za.s[w8, 0, vgx2], { z0.s - z1.s }, { z0.s - z1.s }
+ ADD ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }, { Z0.s - Z1.s }
+ ADD ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }, { Z0.S - Z1.S }
+ add za.s[w11, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ add za.s[w8, 7], { z0.s - z1.s }, { z0.s - z1.s }
+ add za.s[w8, 0], { z30.s - z31.s }, { z0.s - z1.s }
+ add za.s[w8, 0], { z0.s - z1.s }, { z30.s - z31.s }
+ add za.s[w10, 1], { z22.s - z23.s }, { z18.s - z19.s }
+
+ add za.s[w8, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ add za.s[w8, 0, vgx4], { z0.s - z3.s }, { z0.s - z3.s }
+ ADD ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }, { Z0.s - Z3.s }
+ ADD ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, { Z0.S - Z3.S }
+ add za.s[w11, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ add za.s[w8, 7], { z0.s - z3.s }, { z0.s - z3.s }
+ add za.s[w8, 0], { z28.s - z31.s }, { z0.s - z3.s }
+ add za.s[w8, 0], { z0.s - z3.s }, { z28.s - z31.s }
+ add za.s[w11, 3], { z16.s - z19.s }, { z24.s - z27.s }
+
+ add { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ add { z30.b - z31.b }, { z30.b - z31.b }, z0.b
+ add { z0.b - z1.b }, { z0.b - z1.b }, z15.b
+ add { z14.b - z15.b }, { z14.b - z15.b }, z5.b
+
+ add { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ add { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ add { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ add { z20.h - z21.h }, { z20.h - z21.h }, z11.h
+
+ add { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ add { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ add { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ add { z2.s - z3.s }, { z2.s - z3.s }, z9.s
+
+ add { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ add { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ add { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ add { z28.d - z29.d }, { z28.d - z29.d }, z1.d
+
+ add { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ add { z28.b - z31.b }, { z28.b - z31.b }, z0.b
+ add { z0.b - z3.b }, { z0.b - z3.b }, z15.b
+ add { z24.b - z27.b }, { z24.b - z27.b }, z5.b
+
+ add { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ add { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ add { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ add { z20.h - z23.h }, { z20.h - z23.h }, z11.h
+
+ add { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ add { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ add { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ add { z4.s - z7.s }, { z4.s - z7.s }, z9.s
+
+ add { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ add { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ add { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ add { z16.d - z19.d }, { z16.d - z19.d }, z3.d
+
+ sub za.s[w8, 0], { z0.s - z1.s }
+ sub za.s[w8, 0, vgx2], { z0.s - z1.s }
+ SUB ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }
+ SUB ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }
+ sub za.s[w11, 0], { z0.s - z1.s }
+ sub za.s[w8, 7], { z0.s - z1.s }
+ sub za.s[w8, 0], { z30.s - z31.s }
+ sub za.s[w10, 3], { z10.s - z11.s }
+
+ sub za.s[w8, 0], { z0.s - z3.s }
+ sub za.s[w8, 0, vgx4], { z0.s - z3.s }
+ SUB ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }
+ SUB ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }
+ sub za.s[w11, 0], { z0.s - z3.s }
+ sub za.s[w8, 7], { z0.s - z3.s }
+ sub za.s[w8, 0], { z28.s - z31.s }
+ sub za.s[w11, 1], { z12.s - z15.s }
+
+ sub za.s[w8, 0], { z0.s - z1.s }, z0.s
+ sub za.s[w8, 0, vgx2], { z0.s - z1.s }, z0.s
+ SUB ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }, Z0.s
+ SUB ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }, Z0.S
+ sub za.s[w11, 0], { z0.s - z1.s }, z0.s
+ sub za.s[w8, 7], { z0.s - z1.s }, z0.s
+ sub za.s[w8, 0], { z30.s - z31.s }, z0.s
+ sub za.s[w8, 0], { z31.s, z0.s }, z0.s
+ sub za.s[w8, 0], { z31.s - z0.s }, z0.s
+ sub za.s[w8, 0], { z0.s - z1.s }, z15.s
+ sub za.s[w9, 5], { z9.s - z10.s }, z6.s
+
+ sub za.s[w8, 0], { z0.s - z3.s }, z0.s
+ sub za.s[w8, 0, vgx4], { z0.s - z3.s }, z0.s
+ SUB ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }, Z0.s
+ SUB ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, Z0.S
+ sub za.s[w11, 0], { z0.s - z3.s }, z0.s
+ sub za.s[w8, 7], { z0.s - z3.s }, z0.s
+ sub za.s[w8, 0], { z28.s - z31.s }, z0.s
+ sub za.s[w8, 0], { z31.s, z0.s, z1.s, z2.s }, z0.s
+ sub za.s[w8, 0], { z31.s - z2.s }, z0.s
+ sub za.s[w8, 0], { z0.s - z3.s }, z15.s
+ sub za.s[w11, 2], { z23.s - z26.s }, z13.s
+
+ sub za.s[w8, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ sub za.s[w8, 0, vgx2], { z0.s - z1.s }, { z0.s - z1.s }
+ SUB ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }, { Z0.s - Z1.s }
+ SUB ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }, { Z0.S - Z1.S }
+ sub za.s[w11, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ sub za.s[w8, 7], { z0.s - z1.s }, { z0.s - z1.s }
+ sub za.s[w8, 0], { z30.s - z31.s }, { z0.s - z1.s }
+ sub za.s[w8, 0], { z0.s - z1.s }, { z30.s - z31.s }
+ sub za.s[w10, 1], { z22.s - z23.s }, { z18.s - z19.s }
+
+ sub za.s[w8, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ sub za.s[w8, 0, vgx4], { z0.s - z3.s }, { z0.s - z3.s }
+ SUB ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }, { Z0.s - Z3.s }
+ SUB ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, { Z0.S - Z3.S }
+ sub za.s[w11, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ sub za.s[w8, 7], { z0.s - z3.s }, { z0.s - z3.s }
+ sub za.s[w8, 0], { z28.s - z31.s }, { z0.s - z3.s }
+ sub za.s[w8, 0], { z0.s - z3.s }, { z28.s - z31.s }
+ sub za.s[w11, 3], { z16.s - z19.s }, { z24.s - z27.s }
+
+ fadd za.s[w8, 0], { z0.s - z1.s }
+ fadd za.s[w8, 0, vgx2], { z0.s - z1.s }
+ FADD ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }
+ FADD ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }
+ fadd za.s[w11, 0], { z0.s - z1.s }
+ fadd za.s[w8, 7], { z0.s - z1.s }
+ fadd za.s[w8, 0], { z30.s - z31.s }
+ fadd za.s[w10, 3], { z10.s - z11.s }
+
+ fadd za.s[w8, 0], { z0.s - z3.s }
+ fadd za.s[w8, 0, vgx4], { z0.s - z3.s }
+ FADD ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }
+ FADD ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }
+ fadd za.s[w11, 0], { z0.s - z3.s }
+ fadd za.s[w8, 7], { z0.s - z3.s }
+ fadd za.s[w8, 0], { z28.s - z31.s }
+ fadd za.s[w11, 1], { z12.s - z15.s }
+
+ fsub za.s[w8, 0], { z0.s - z1.s }
+ fsub za.s[w8, 0, vgx2], { z0.s - z1.s }
+ FSUB ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }
+ FSUB ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }
+ fsub za.s[w11, 0], { z0.s - z1.s }
+ fsub za.s[w8, 7], { z0.s - z1.s }
+ fsub za.s[w8, 0], { z30.s - z31.s }
+ fsub za.s[w10, 3], { z10.s - z11.s }
+
+ fsub za.s[w8, 0], { z0.s - z3.s }
+ fsub za.s[w8, 0, vgx4], { z0.s - z3.s }
+ FSUB ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }
+ FSUB ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }
+ fsub za.s[w11, 0], { z0.s - z3.s }
+ fsub za.s[w8, 7], { z0.s - z3.s }
+ fsub za.s[w8, 0], { z28.s - z31.s }
+ fsub za.s[w11, 1], { z12.s - z15.s }
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.d b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.d
new file mode 100644
index 00000000000..f3a623dd9e8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-f64f64-1-invalid.s
+#error_output: sme2-f64f64-1-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l
new file mode 100644
index 00000000000..60ee8bd0f8e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l
@@ -0,0 +1,27 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fadd za\.d\[w8,0\],{z0\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z1\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{z1\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z1\.d-z4\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z2\.d-z5\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z3\.d-z6\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fadd za\.d\[w8,0,vgx4\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fadd za\.d\[w8,0,vgx2\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fadd za\.d\[w8, 0\], {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fadd za\.s\[w8, 0\], {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fadd za\.d\[w8,0\],{z0-z1}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.d\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fadd za\.s\[w8, 0\], {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fadd za\.d\[w8, 0\], {z0\.d-z1\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.s b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.s
new file mode 100644
index 00000000000..e045dcd984a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.s
@@ -0,0 +1,20 @@
+ fadd za.d[w7, 0], { z0.d - z1.d }
+ fadd za.d[w12, 0], { z0.d - z1.d }
+ fadd za.d[w8, -1], { z0.d - z1.d }
+ fadd za.d[w8, 8], { z0.d - z1.d }
+ fadd za.d[w8, 0], { z0.d - z2.d }
+ fadd za.d[w8, 0], { z1.d - z2.d }
+
+ fadd za.d[w7, 0], { z0.d - z3.d }
+ fadd za.d[w12, 0], { z0.d - z3.d }
+ fadd za.d[w8, -1], { z0.d - z3.d }
+ fadd za.d[w8, 8], { z1.d - z3.d }
+ fadd za.d[w8, 0], { z1.d - z4.d }
+ fadd za.d[w8, 0], { z2.d - z5.d }
+ fadd za.d[w8, 0], { z3.d - z6.d }
+
+ fadd za.d[w8, 0, vgx4], { z0.d - z1.d }
+ fadd za.d[w8, 0, vgx2], { z0.d - z3.d }
+ fadd za[w8, 0], { z0.d - z1.d }
+ fadd za.d[w8, 0], { z0 - z1 }
+ fadd za.d[w8, 0], { z0.s - z1.s }
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.d b/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.d
new file mode 100644
index 00000000000..fe14d018a2f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sme2-f64f64-1.s
+#error_output: sme2-f64f64-1-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l
new file mode 100644
index 00000000000..f3750f5b171
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l
@@ -0,0 +1,33 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w10,3\],{z10\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,1\],{z12\.d-z15\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w10,3\],{z10\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,1\],{z12\.d-z15\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1.d b/gas/testsuite/gas/aarch64/sme2-f64f64-1.d
new file mode 100644
index 00000000000..3f3d167a4e8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1.d
@@ -0,0 +1,41 @@
+#as: -march=armv8-a+sme2+sme-f64f64
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1e01c00 fadd za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c00 fadd za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c00 fadd za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c00 fadd za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e07c00 fadd za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c07 fadd za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01fc0 fadd za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}
+[^:]+: c1e05d43 fadd za\.d\[w10, 3, vgx2\], {z10\.d-z11\.d}
+[^:]+: c1e11c00 fadd za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c00 fadd za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c00 fadd za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c00 fadd za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e17c00 fadd za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c07 fadd za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11f80 fadd za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}
+[^:]+: c1e17d81 fadd za\.d\[w11, 1, vgx4\], {z12\.d-z15\.d}
+[^:]+: c1e01c08 fsub za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c08 fsub za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c08 fsub za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c08 fsub za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e07c08 fsub za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c0f fsub za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01fc8 fsub za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}
+[^:]+: c1e05d4b fsub za\.d\[w10, 3, vgx2\], {z10\.d-z11\.d}
+[^:]+: c1e11c08 fsub za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c08 fsub za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c08 fsub za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c08 fsub za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e17c08 fsub za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c0f fsub za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11f88 fsub za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}
+[^:]+: c1e17d89 fsub za\.d\[w11, 1, vgx4\], {z12\.d-z15\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1.s b/gas/testsuite/gas/aarch64/sme2-f64f64-1.s
new file mode 100644
index 00000000000..546f20dd44d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1.s
@@ -0,0 +1,35 @@
+ fadd za.d[w8, 0], { z0.d - z1.d }
+ fadd za.d[w8, 0, vgx2], { z0.d - z1.d }
+ FADD ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }
+ FADD ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }
+ fadd za.d[w11, 0], { z0.d - z1.d }
+ fadd za.d[w8, 7], { z0.d - z1.d }
+ fadd za.d[w8, 0], { z30.d - z31.d }
+ fadd za.d[w10, 3], { z10.d - z11.d }
+
+ fadd za.d[w8, 0], { z0.d - z3.d }
+ fadd za.d[w8, 0, vgx4], { z0.d - z3.d }
+ FADD ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }
+ FADD ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }
+ fadd za.d[w11, 0], { z0.d - z3.d }
+ fadd za.d[w8, 7], { z0.d - z3.d }
+ fadd za.d[w8, 0], { z28.d - z31.d }
+ fadd za.d[w11, 1], { z12.d - z15.d }
+
+ fsub za.d[w8, 0], { z0.d - z1.d }
+ fsub za.d[w8, 0, vgx2], { z0.d - z1.d }
+ FSUB ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }
+ FSUB ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }
+ fsub za.d[w11, 0], { z0.d - z1.d }
+ fsub za.d[w8, 7], { z0.d - z1.d }
+ fsub za.d[w8, 0], { z30.d - z31.d }
+ fsub za.d[w10, 3], { z10.d - z11.d }
+
+ fsub za.d[w8, 0], { z0.d - z3.d }
+ fsub za.d[w8, 0, vgx4], { z0.d - z3.d }
+ FSUB ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }
+ FSUB ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }
+ fsub za.d[w11, 0], { z0.d - z3.d }
+ fsub za.d[w8, 7], { z0.d - z3.d }
+ fsub za.d[w8, 0], { z28.d - z31.d }
+ fsub za.d[w11, 1], { z12.d - z15.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.d b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.d
new file mode 100644
index 00000000000..01172951481
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-i16i64-1-invalid.s
+#error_output: sme2-i16i64-1-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l
new file mode 100644
index 00000000000..d9d537a63d4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l
@@ -0,0 +1,111 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z1\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z4\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z2\.d-z5\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z3\.d-z6\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{z0-z1}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z31\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d,z1\.d,z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.d\[w8,0\],{z0\.d,z1\.d,z5\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{z0-z1},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{z0\.d-z1\.d},z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.s-z1\.s},z0\.d'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z1\.d-z2\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z15\.d-z16\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z31\.d,z0\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z4\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z2\.d-z5\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z3\.d-z6\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z15\.d-z18\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z29\.d,z30\.d,z31\.d,z0\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z4\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.s b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.s
new file mode 100644
index 00000000000..ef2e48d2477
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.s
@@ -0,0 +1,86 @@
+ add za.d[w7, 0], { z0.d - z1.d }
+ add za.d[w12, 0], { z0.d - z1.d }
+ add za.d[w8, -1], { z0.d - z1.d }
+ add za.d[w8, 8], { z0.d - z1.d }
+ add za.d[w8, 0], { z0.d - z2.d }
+ add za.d[w8, 0], { z1.d - z2.d }
+
+ add za.d[w7, 0], { z0.d - z3.d }
+ add za.d[w12, 0], { z0.d - z3.d }
+ add za.d[w8, -1], { z0.d - z3.d }
+ add za.d[w8, 8], { z1.d - z3.d }
+ add za.d[w8, 0], { z1.d - z4.d }
+ add za.d[w8, 0], { z2.d - z5.d }
+ add za.d[w8, 0], { z3.d - z6.d }
+
+ add za.d[w8, 0, vgx4], { z0.d - z1.d }
+ add za.d[w8, 0, vgx2], { z0.d - z3.d }
+ add za[w8, 0], { z0.d - z1.d }
+ add za.d[w8, 0], { z0 - z1 }
+ add za.d[w8, 0], { z0.s - z1.s }
+
+ add za.d[w0, 0], { z0.d - z1.d }, z0.d
+ add za.d[w31, 0], { z0.d - z1.d }, z0.d
+ add za.d[w8, 1<<63], { z0.d - z1.d }, z0.d
+ add za.d[w8, 0], { z0.d - z1.d }, z31.d
+
+ add za.d[w7, 0], { z0.d - z1.d }, z0.d
+ add za.d[w12, 0], { z0.d - z1.d }, z0.d
+ add za.d[w8, -1], { z0.d - z1.d }, z0.d
+ add za.d[w8, 8], { z0.d - z1.d }, z0.d
+ add za.d[w8, 0], { z0.d - z1.d }, z16.d
+
+ add za.d[w7, 0], { z0.d - z3.d }, z0.d
+ add za.d[w12, 0], { z0.d - z3.d }, z0.d
+ add za.d[w8, -1], { z0.d - z3.d }, z0.d
+ add za.d[w8, 8], { z0.d - z3.d }, z0.d
+ add za.d[w8, 0], { z0.d - z3.d }, z16.d
+
+ add za.d[w8, 0], { z0.d - z2.d }, z0.d
+ add za.d[w8, 0], { z0.d - z4.d }, z0.d
+ add za.d[w8, 0], { z0.d, z1.d, z2.d }, z0.d
+ add za.d[w8, 0], { z0.d, z1.d, z5.d }, z0.d
+
+ add za.d[w8, 0, vgx4], { z0.d - z1.d }, z0.d
+ add za.d[w8, 0, vgx2], { z0.d - z3.d }, z0.d
+ add za[w8, 0], { z0.d - z1.d }, z0.d
+ add za.d[w8, 0], { z0 - z1 }, z0.d
+ add za.d[w8, 0], { z0.d - z1.d }, z0
+ add za[w8, 0], { z0.d - z1.d }, z0
+ add za.s[w8, 0], { z0.d - z1.d }, z0.s
+ add za.d[w8, 0], { z0.s - z1.s }, z0.d
+
+ add za.d[w0, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w31, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w8, 1<<63], { z0.d - z1.d }, { z0.d - z1.d }
+
+ add za.d[w7, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w12, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w8, -1], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w8, 8], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w8, 8], { z1.d - z2.d }, { z0.d - z1.d }
+ add za.d[w8, 0], { z0.d - z1.d }, { z15.d - z16.d }
+ add za.d[w8, 0], { z0.d - z1.d }, { z31.d, z0.d }
+
+ add za.d[w7, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ add za.d[w12, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ add za.d[w8, -1], { z0.d - z3.d }, { z0.d - z3.d }
+ add za.d[w8, 8], { z0.d - z3.d }, { z0.d - z3.d }
+ add za.d[w8, 0], { z1.d - z4.d }, { z0.d - z3.d }
+ add za.d[w8, 0], { z2.d - z5.d }, { z0.d - z3.d }
+ add za.d[w8, 0], { z3.d - z6.d }, { z0.d - z3.d }
+ add za.d[w8, 0], { z0.d - z3.d }, { z15.d - z18.d }
+ add za.d[w8, 0], { z0.d - z3.d }, { z29.d, z30.d, z31.d, z0.d }
+
+ add za.d[w8, 0], { z0.d - z2.d }, { z0.d - z1.d }
+ add za.d[w8, 0], { z0.d - z3.d }, { z0.d - z1.d }
+ add za.d[w8, 0], { z0.d - z1.d }, { z0.d - z2.d }
+ add za.d[w8, 0], { z0.d - z1.d }, { z0.d - z3.d }
+ add za.d[w8, 0], { z0.d - z1.d }, { z0.d - z4.d }
+
+ add za.d[w8, 0, vgx4], { z0.d - z1.d }, { z0.d - z3.d }
+ add za.d[w8, 0, vgx4], { z0.d - z3.d }, { z0.d - z1.d }
+ add za.d[w8, 0, vgx2], { z0.d - z1.d }, { z0.d - z3.d }
+ add za.d[w8, 0, vgx2], { z0.d - z3.d }, { z0.d - z1.d }
+ add za[w8, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ add za[w8, 0], { z0.d - z3.d }, { z0.d - z3.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.d b/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.d
new file mode 100644
index 00000000000..fe924efd561
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sme2-i16i64-1.s
+#error_output: sme2-i16i64-1-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l
new file mode 100644
index 00000000000..bbdccc7ac63
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l
@@ -0,0 +1,57 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,3\],{z10\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,1\],{z12\.d-z15\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1.d b/gas/testsuite/gas/aarch64/sme2-i16i64-1.d
new file mode 100644
index 00000000000..8b95f5d3974
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1.d
@@ -0,0 +1,65 @@
+#as: -march=armv8-a+sme2+sme-i16i64
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1e01c10 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c10 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c10 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c10 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e07c10 add za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01c17 add za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}
+[^:]+: c1e01fd0 add za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}
+[^:]+: c1e05d53 add za\.d\[w10, 3, vgx2\], {z10\.d-z11\.d}
+[^:]+: c1e11c10 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c10 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c10 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c10 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e17c10 add za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11c17 add za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}
+[^:]+: c1e11f90 add za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}
+[^:]+: c1e17d91 add za\.d\[w11, 1, vgx4\], {z12\.d-z15\.d}
+[^:]+: c1601810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1607810 add za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601817 add za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601bd0 add za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}, z0\.d
+[^:]+: c1601bf0 add za\.d\[w8, 0, vgx2\], {z31\.d-z0\.d}, z0\.d
+[^:]+: c1601bf0 add za\.d\[w8, 0, vgx2\], {z31\.d-z0\.d}, z0\.d
+[^:]+: c16f1810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z15\.d
+[^:]+: c1663935 add za\.d\[w9, 5, vgx2\], {z9\.d-z10\.d}, z6\.d
+[^:]+: c1701810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1707810 add za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701817 add za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701b90 add za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}, z0\.d
+[^:]+: c1701bf0 add za\.d\[w8, 0, vgx4\], {z31\.d-z2\.d}, z0\.d
+[^:]+: c1701bf0 add za\.d\[w8, 0, vgx4\], {z31\.d-z2\.d}, z0\.d
+[^:]+: c17f1810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z15\.d
+[^:]+: c17d7af2 add za\.d\[w11, 2, vgx4\], {z23\.d-z26\.d}, z13\.d
+[^:]+: c1e01810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e07810 add za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01817 add za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01bd0 add za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}, {z0\.d-z1\.d}
+[^:]+: c1fe1810 add za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z30\.d-z31\.d}
+[^:]+: c1f25ad1 add za\.d\[w10, 1, vgx2\], {z22\.d-z23\.d}, {z18\.d-z19\.d}
+[^:]+: c1e11810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e17810 add za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11817 add za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11b90 add za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1fd1810 add za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1f97a13 add za\.d\[w11, 3, vgx4\], {z16\.d-z19\.d}, {z24\.d-z27\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1.s b/gas/testsuite/gas/aarch64/sme2-i16i64-1.s
new file mode 100644
index 00000000000..537669a1b93
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1.s
@@ -0,0 +1,61 @@
+ add za.d[w8, 0], { z0.d - z1.d }
+ add za.d[w8, 0, vgx2], { z0.d - z1.d }
+ ADD ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }
+ ADD ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }
+ add za.d[w11, 0], { z0.d - z1.d }
+ add za.d[w8, 7], { z0.d - z1.d }
+ add za.d[w8, 0], { z30.d - z31.d }
+ add za.d[w10, 3], { z10.d - z11.d }
+
+ add za.d[w8, 0], { z0.d - z3.d }
+ add za.d[w8, 0, vgx4], { z0.d - z3.d }
+ ADD ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }
+ ADD ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }
+ add za.d[w11, 0], { z0.d - z3.d }
+ add za.d[w8, 7], { z0.d - z3.d }
+ add za.d[w8, 0], { z28.d - z31.d }
+ add za.d[w11, 1], { z12.d - z15.d }
+
+ add za.d[w8, 0], { z0.d - z1.d }, z0.d
+ add za.d[w8, 0, vgx2], { z0.d - z1.d }, z0.d
+ ADD ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }, Z0.d
+ ADD ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }, Z0.D
+ add za.d[w11, 0], { z0.d - z1.d }, z0.d
+ add za.d[w8, 7], { z0.d - z1.d }, z0.d
+ add za.d[w8, 0], { z30.d - z31.d }, z0.d
+ add za.d[w8, 0], { z31.d, z0.d }, z0.d
+ add za.d[w8, 0], { z31.d - z0.d }, z0.d
+ add za.d[w8, 0], { z0.d - z1.d }, z15.d
+ add za.d[w9, 5], { z9.d - z10.d }, z6.d
+
+ add za.d[w8, 0], { z0.d - z3.d }, z0.d
+ add za.d[w8, 0, vgx4], { z0.d - z3.d }, z0.d
+ ADD ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }, Z0.d
+ ADD ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }, Z0.D
+ add za.d[w11, 0], { z0.d - z3.d }, z0.d
+ add za.d[w8, 7], { z0.d - z3.d }, z0.d
+ add za.d[w8, 0], { z28.d - z31.d }, z0.d
+ add za.d[w8, 0], { z31.d, z0.d, z1.d, z2.d }, z0.d
+ add za.d[w8, 0], { z31.d - z2.d }, z0.d
+ add za.d[w8, 0], { z0.d - z3.d }, z15.d
+ add za.d[w11, 2], { z23.d - z26.d }, z13.d
+
+ add za.d[w8, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w8, 0, vgx2], { z0.d - z1.d }, { z0.d - z1.d }
+ ADD ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }, { Z0.d - Z1.d }
+ ADD ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }, { Z0.D - Z1.D }
+ add za.d[w11, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w8, 7], { z0.d - z1.d }, { z0.d - z1.d }
+ add za.d[w8, 0], { z30.d - z31.d }, { z0.d - z1.d }
+ add za.d[w8, 0], { z0.d - z1.d }, { z30.d - z31.d }
+ add za.d[w10, 1], { z22.d - z23.d }, { z18.d - z19.d }
+
+ add za.d[w8, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ add za.d[w8, 0, vgx4], { z0.d - z3.d }, { z0.d - z3.d }
+ ADD ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }, { Z0.d - Z3.d }
+ ADD ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }, { Z0.D - Z3.D }
+ add za.d[w11, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ add za.d[w8, 7], { z0.d - z3.d }, { z0.d - z3.d }
+ add za.d[w8, 0], { z28.d - z31.d }, { z0.d - z3.d }
+ add za.d[w8, 0], { z0.d - z3.d }, { z28.d - z31.d }
+ add za.d[w11, 3], { z16.d - z19.d }, { z24.d - z27.d }
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 69e0f833170..3689fff81f1 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -487,6 +487,7 @@ enum aarch64_opnd
AARCH64_OPND_SVE_ZtxN, /* SVE vector register list in Zt. */
AARCH64_OPND_SME_Zdnx2, /* SVE vector register list from [4:1]*2. */
AARCH64_OPND_SME_Zdnx4, /* SVE vector register list from [4:2]*4. */
+ AARCH64_OPND_SME_Zm, /* SVE vector register list in 4-bit Zm. */
AARCH64_OPND_SME_Zmx2, /* SVE vector register list from [20:17]*2. */
AARCH64_OPND_SME_Zmx4, /* SVE vector register list from [20:18]*4. */
AARCH64_OPND_SME_Znx2, /* SVE vector register list from [9:6]*2. */
@@ -695,6 +696,8 @@ enum aarch64_insn_class
movewide,
pcreladdr,
ic_system,
+ sme_fp_sd,
+ sme_int_sd,
sme_misc,
sme_mov,
sme_ldr,
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index cdc9e465d13..5dba041483c 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -667,12 +667,13 @@ aarch64_insert_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 222:
+ case 216:
case 223:
- case 230:
+ case 224:
case 231:
case 232:
case 233:
+ case 234:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -684,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 256:
+ case 257:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -729,13 +730,13 @@ aarch64_insert_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 236:
- case 250:
+ case 237:
case 251:
- case 253:
- case 255:
- case 260:
+ case 252:
+ case 254:
+ case 256:
case 261:
+ case 262:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -804,8 +805,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 252:
- case 254:
+ case 253:
+ case 255:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
@@ -896,48 +897,48 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sve_index (self, info, code, inst, errors);
case 211:
case 213:
- case 229:
+ case 230:
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 214:
case 215:
- case 216:
case 217:
case 218:
case 219:
- case 228:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 220:
+ case 229:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 221:
+ case 222:
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
- case 224:
- case 226:
- case 237:
- return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 225:
case 227:
+ case 238:
+ return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 226:
+ case 228:
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 234:
case 235:
- case 244:
+ case 236:
case 245:
case 246:
case 247:
case 248:
case 249:
+ case 250:
return aarch64_ins_simple_index (self, info, code, inst, errors);
- case 238:
case 239:
case 240:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 241:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 242:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 243:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 244:
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 257:
case 258:
case 259:
+ case 260:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index bd03f4116cc..ae699ec2cd5 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -2008,6 +2008,8 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
insert_field (FLD_size, &inst->value, aarch64_get_variant (inst) % 3 + 1, 0);
break;
+ case sme_fp_sd:
+ case sme_int_sd:
case sve_size_bh:
case sve_size_sd:
insert_field (FLD_SVE_sz, &inst->value, aarch64_get_variant (inst), 0);
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index f69f30f8884..c38880201e1 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2596;
+ return 2614;
}
}
}
@@ -190,7 +190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2499;
+ return 2511;
}
else
{
@@ -198,7 +198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2498;
+ return 2510;
}
}
else
@@ -207,7 +207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2497;
+ return 2509;
}
}
}
@@ -226,7 +226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2506;
+ return 2518;
}
else
{
@@ -234,7 +234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2502;
+ return 2514;
}
}
else
@@ -247,7 +247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2496;
+ return 2508;
}
else
{
@@ -255,7 +255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2495;
+ return 2507;
}
}
else
@@ -268,7 +268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2517;
+ return 2529;
}
else
{
@@ -276,7 +276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2516;
+ return 2528;
}
}
else
@@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2494;
+ return 2506;
}
}
}
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2504;
+ return 2516;
}
else
{
@@ -306,7 +306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2500;
+ return 2512;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2507;
+ return 2519;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2503;
+ return 2515;
}
}
else
@@ -339,7 +339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2505;
+ return 2517;
}
else
{
@@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2501;
+ return 2513;
}
}
}
@@ -374,7 +374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2433;
+ return 2445;
}
else
{
@@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2434;
+ return 2446;
}
}
else
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2457;
+ return 2469;
}
else
{
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2458;
+ return 2470;
}
}
}
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2449;
+ return 2461;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2450;
+ return 2462;
}
}
else
@@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2441;
+ return 2453;
}
else
{
@@ -442,7 +442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2442;
+ return 2454;
}
}
}
@@ -459,7 +459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2465;
+ return 2477;
}
else
{
@@ -467,7 +467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2466;
+ return 2478;
}
}
else
@@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2489;
+ return 2501;
}
else
{
@@ -486,7 +486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2490;
+ return 2502;
}
}
}
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2481;
+ return 2493;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2482;
+ return 2494;
}
}
else
@@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2473;
+ return 2485;
}
else
{
@@ -527,7 +527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2474;
+ return 2486;
}
}
}
@@ -591,7 +591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2429;
+ return 2441;
}
else
{
@@ -599,7 +599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2430;
+ return 2442;
}
}
else
@@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2453;
+ return 2465;
}
else
{
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2454;
+ return 2466;
}
}
}
@@ -632,7 +632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2445;
+ return 2457;
}
else
{
@@ -640,7 +640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2446;
+ return 2458;
}
}
else
@@ -651,7 +651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2437;
+ return 2449;
}
else
{
@@ -659,7 +659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2438;
+ return 2450;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2461;
+ return 2473;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2462;
+ return 2474;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2485;
+ return 2497;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2486;
+ return 2498;
}
}
}
@@ -717,7 +717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2477;
+ return 2489;
}
else
{
@@ -725,7 +725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2478;
+ return 2490;
}
}
else
@@ -736,7 +736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2469;
+ return 2481;
}
else
{
@@ -744,7 +744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2470;
+ return 2482;
}
}
}
@@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2527;
+ return 2539;
}
else
{
@@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2528;
+ return 2540;
}
}
else
@@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2551;
+ return 2563;
}
else
{
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2552;
+ return 2564;
}
}
}
@@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2543;
+ return 2555;
}
else
{
@@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2544;
+ return 2556;
}
}
else
@@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2535;
+ return 2547;
}
else
{
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2536;
+ return 2548;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2559;
+ return 2571;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2560;
+ return 2572;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2583;
+ return 2595;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2584;
+ return 2596;
}
}
}
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2575;
+ return 2587;
}
else
{
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2576;
+ return 2588;
}
}
else
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2567;
+ return 2579;
}
else
{
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2568;
+ return 2580;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2523;
+ return 2535;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2524;
+ return 2536;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2547;
+ return 2559;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2548;
+ return 2560;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2539;
+ return 2551;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2540;
+ return 2552;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2531;
+ return 2543;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2532;
+ return 2544;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2555;
+ return 2567;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2556;
+ return 2568;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2579;
+ return 2591;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2580;
+ return 2592;
}
}
}
@@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2571;
+ return 2583;
}
else
{
@@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2572;
+ return 2584;
}
}
else
@@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2563;
+ return 2575;
}
else
{
@@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2564;
+ return 2576;
}
}
}
@@ -1274,7 +1274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2435;
+ return 2447;
}
else
{
@@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2459;
+ return 2471;
}
}
else
@@ -1293,7 +1293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2451;
+ return 2463;
}
else
{
@@ -1301,7 +1301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2443;
+ return 2455;
}
}
}
@@ -1315,7 +1315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2467;
+ return 2479;
}
else
{
@@ -1323,7 +1323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2491;
+ return 2503;
}
}
else
@@ -1334,7 +1334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2483;
+ return 2495;
}
else
{
@@ -1342,7 +1342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2475;
+ return 2487;
}
}
}
@@ -1370,7 +1370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2436;
+ return 2448;
}
else
{
@@ -1378,7 +1378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2493;
+ return 2505;
}
}
else
@@ -1387,7 +1387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2460;
+ return 2472;
}
}
else
@@ -1398,7 +1398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2452;
+ return 2464;
}
else
{
@@ -1406,7 +1406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2444;
+ return 2456;
}
}
}
@@ -1420,7 +1420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2468;
+ return 2480;
}
else
{
@@ -1428,7 +1428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2492;
+ return 2504;
}
}
else
@@ -1439,7 +1439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2484;
+ return 2496;
}
else
{
@@ -1447,7 +1447,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2476;
+ return 2488;
}
}
}
@@ -1511,7 +1511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2431;
+ return 2443;
}
else
{
@@ -1519,7 +1519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2432;
+ return 2444;
}
}
else
@@ -1530,7 +1530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2455;
+ return 2467;
}
else
{
@@ -1538,7 +1538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2456;
+ return 2468;
}
}
}
@@ -1552,7 +1552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2447;
+ return 2459;
}
else
{
@@ -1560,7 +1560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2448;
+ return 2460;
}
}
else
@@ -1571,7 +1571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2439;
+ return 2451;
}
else
{
@@ -1579,7 +1579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2440;
+ return 2452;
}
}
}
@@ -1596,7 +1596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2463;
+ return 2475;
}
else
{
@@ -1604,7 +1604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2464;
+ return 2476;
}
}
else
@@ -1615,7 +1615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2487;
+ return 2499;
}
else
{
@@ -1623,7 +1623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2488;
+ return 2500;
}
}
}
@@ -1637,7 +1637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2479;
+ return 2491;
}
else
{
@@ -1645,7 +1645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2480;
+ return 2492;
}
}
else
@@ -1656,7 +1656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2471;
+ return 2483;
}
else
{
@@ -1664,7 +1664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2472;
+ return 2484;
}
}
}
@@ -1727,21 +1727,219 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx0xxxxxxxxxxxxxxxx
- sel. */
- return 2521;
+ if (((word >> 3) & 0x1) == 0)
+ {
+ if (((word >> 4) & 0x1) == 0)
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xxxxxxxxxx00xxx
+ fadd. */
+ return 2437;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xxxxxxxxxx00xxx
+ fadd. */
+ return 2438;
+ }
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xxxx0xxxxx10xxx
+ add. */
+ return 2430;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xxxx0xxxxx10xxx
+ add. */
+ return 2431;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxxx0xxxxx10xxx
+ add. */
+ return 2432;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxxx0xxxxx10xxx
+ add. */
+ return 2433;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xxxx1xxxxx10xxx
+ add. */
+ return 2428;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xxxx1xxxxx10xxx
+ add. */
+ return 2429;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xxxxxxxxxx01xxx
+ fsub. */
+ return 2439;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xxxxxxxxxx01xxx
+ fsub. */
+ return 2440;
+ }
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xxxx0xxxxx11xxx
+ sub. */
+ return 2602;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xxxx0xxxxx11xxx
+ sub. */
+ return 2603;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxxx0xxxxx11xxx
+ sub. */
+ return 2604;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxxx0xxxxx11xxx
+ sub. */
+ return 2605;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xxxx1xxxxx11xxx
+ sub. */
+ return 2600;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xxxx1xxxxx11xxx
+ sub. */
+ return 2601;
+ }
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx1xxxxxxxxxxxxxxxx
- sel. */
- return 2522;
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx01x0xxxxxxxxxxxxx
+ sel. */
+ return 2533;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx11x0xxxxxxxxxxxxx
+ sel. */
+ return 2534;
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1x0xxxxxxxxxxx
+ add. */
+ return 2434;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1x1xxxxxxxxxxx
+ add. */
+ return 2435;
+ }
+ }
}
}
}
@@ -1765,7 +1963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2529;
+ return 2541;
}
else
{
@@ -1773,7 +1971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2553;
+ return 2565;
}
}
else
@@ -1784,7 +1982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2545;
+ return 2557;
}
else
{
@@ -1792,7 +1990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2537;
+ return 2549;
}
}
}
@@ -1806,7 +2004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2561;
+ return 2573;
}
else
{
@@ -1814,7 +2012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2585;
+ return 2597;
}
}
else
@@ -1825,7 +2023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2577;
+ return 2589;
}
else
{
@@ -1833,7 +2031,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2569;
+ return 2581;
}
}
}
@@ -1861,7 +2059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2530;
+ return 2542;
}
else
{
@@ -1869,7 +2067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2587;
+ return 2599;
}
}
else
@@ -1878,7 +2076,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2554;
+ return 2566;
}
}
else
@@ -1889,7 +2087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2546;
+ return 2558;
}
else
{
@@ -1897,7 +2095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2538;
+ return 2550;
}
}
}
@@ -1911,7 +2109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2562;
+ return 2574;
}
else
{
@@ -1919,7 +2117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2586;
+ return 2598;
}
}
else
@@ -1930,7 +2128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2578;
+ return 2590;
}
else
{
@@ -1938,7 +2136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2570;
+ return 2582;
}
}
}
@@ -1980,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2525;
+ return 2537;
}
else
{
@@ -1988,7 +2186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2526;
+ return 2538;
}
}
else
@@ -1999,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2549;
+ return 2561;
}
else
{
@@ -2007,7 +2205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2550;
+ return 2562;
}
}
}
@@ -2021,7 +2219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2541;
+ return 2553;
}
else
{
@@ -2029,7 +2227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2542;
+ return 2554;
}
}
else
@@ -2040,7 +2238,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2533;
+ return 2545;
}
else
{
@@ -2048,7 +2246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2534;
+ return 2546;
}
}
}
@@ -2065,7 +2263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2557;
+ return 2569;
}
else
{
@@ -2073,7 +2271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2558;
+ return 2570;
}
}
else
@@ -2084,7 +2282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2581;
+ return 2593;
}
else
{
@@ -2092,7 +2290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2582;
+ return 2594;
}
}
}
@@ -2106,7 +2304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2573;
+ return 2585;
}
else
{
@@ -2114,7 +2312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2574;
+ return 2586;
}
}
else
@@ -2125,7 +2323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2565;
+ return 2577;
}
else
{
@@ -2133,7 +2331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2566;
+ return 2578;
}
}
}
@@ -4535,7 +4733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2637;
+ return 2655;
}
else
{
@@ -4543,7 +4741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2645;
+ return 2663;
}
}
else
@@ -4554,7 +4752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2641;
+ return 2659;
}
else
{
@@ -4562,7 +4760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2648;
+ return 2666;
}
}
}
@@ -4600,7 +4798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2697;
+ return 2715;
}
else
{
@@ -4608,7 +4806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2703;
+ return 2721;
}
}
else
@@ -4619,7 +4817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2700;
+ return 2718;
}
else
{
@@ -4627,7 +4825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2706;
+ return 2724;
}
}
}
@@ -4641,7 +4839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2721;
+ return 2739;
}
else
{
@@ -4649,7 +4847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2727;
+ return 2745;
}
}
else
@@ -4660,7 +4858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2724;
+ return 2742;
}
else
{
@@ -4668,7 +4866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2730;
+ return 2748;
}
}
}
@@ -4685,7 +4883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2709;
+ return 2727;
}
else
{
@@ -4693,7 +4891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2715;
+ return 2733;
}
}
else
@@ -4704,7 +4902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2712;
+ return 2730;
}
else
{
@@ -4712,7 +4910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2718;
+ return 2736;
}
}
}
@@ -4726,7 +4924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2733;
+ return 2751;
}
else
{
@@ -4734,7 +4932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2739;
+ return 2757;
}
}
else
@@ -4745,7 +4943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2736;
+ return 2754;
}
else
{
@@ -4753,7 +4951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2742;
+ return 2760;
}
}
}
@@ -4818,7 +5016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2638;
+ return 2656;
}
else
{
@@ -4826,7 +5024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2646;
+ return 2664;
}
}
else
@@ -4837,7 +5035,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2642;
+ return 2660;
}
else
{
@@ -4845,7 +5043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2649;
+ return 2667;
}
}
}
@@ -4883,7 +5081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2698;
+ return 2716;
}
else
{
@@ -4891,7 +5089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2704;
+ return 2722;
}
}
else
@@ -4902,7 +5100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2701;
+ return 2719;
}
else
{
@@ -4910,7 +5108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2707;
+ return 2725;
}
}
}
@@ -4924,7 +5122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2722;
+ return 2740;
}
else
{
@@ -4932,7 +5130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2728;
+ return 2746;
}
}
else
@@ -4943,7 +5141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2725;
+ return 2743;
}
else
{
@@ -4951,7 +5149,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2731;
+ return 2749;
}
}
}
@@ -4968,7 +5166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2710;
+ return 2728;
}
else
{
@@ -4976,7 +5174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2716;
+ return 2734;
}
}
else
@@ -4987,7 +5185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2713;
+ return 2731;
}
else
{
@@ -4995,7 +5193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2719;
+ return 2737;
}
}
}
@@ -5009,7 +5207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2734;
+ return 2752;
}
else
{
@@ -5017,7 +5215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2740;
+ return 2758;
}
}
else
@@ -5028,7 +5226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2737;
+ return 2755;
}
else
{
@@ -5036,7 +5234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2743;
+ return 2761;
}
}
}
@@ -5104,7 +5302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2640;
+ return 2658;
}
else
{
@@ -5112,7 +5310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2647;
+ return 2665;
}
}
else
@@ -5121,7 +5319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2644;
+ return 2662;
}
}
else
@@ -5132,7 +5330,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2639;
+ return 2657;
}
else
{
@@ -5140,7 +5338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2643;
+ return 2661;
}
}
}
@@ -5202,7 +5400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2699;
+ return 2717;
}
else
{
@@ -5210,7 +5408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2793;
+ return 2811;
}
}
else
@@ -5221,7 +5419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2705;
+ return 2723;
}
else
{
@@ -5229,7 +5427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2795;
+ return 2813;
}
}
}
@@ -5243,7 +5441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2702;
+ return 2720;
}
else
{
@@ -5251,7 +5449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2794;
+ return 2812;
}
}
else
@@ -5260,7 +5458,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2708;
+ return 2726;
}
}
}
@@ -5276,7 +5474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2723;
+ return 2741;
}
else
{
@@ -5284,7 +5482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2799;
+ return 2817;
}
}
else
@@ -5295,7 +5493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2729;
+ return 2747;
}
else
{
@@ -5303,7 +5501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2801;
+ return 2819;
}
}
}
@@ -5317,7 +5515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2726;
+ return 2744;
}
else
{
@@ -5325,7 +5523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2800;
+ return 2818;
}
}
else
@@ -5334,7 +5532,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2732;
+ return 2750;
}
}
}
@@ -5353,7 +5551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2711;
+ return 2729;
}
else
{
@@ -5361,7 +5559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2796;
+ return 2814;
}
}
else
@@ -5372,7 +5570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2717;
+ return 2735;
}
else
{
@@ -5380,7 +5578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2798;
+ return 2816;
}
}
}
@@ -5394,7 +5592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2714;
+ return 2732;
}
else
{
@@ -5402,7 +5600,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2797;
+ return 2815;
}
}
else
@@ -5411,7 +5609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2720;
+ return 2738;
}
}
}
@@ -5427,7 +5625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2735;
+ return 2753;
}
else
{
@@ -5435,7 +5633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2802;
+ return 2820;
}
}
else
@@ -5446,7 +5644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2741;
+ return 2759;
}
else
{
@@ -5454,7 +5652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2804;
+ return 2822;
}
}
}
@@ -5468,7 +5666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2738;
+ return 2756;
}
else
{
@@ -5476,7 +5674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2803;
+ return 2821;
}
}
else
@@ -5485,7 +5683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2744;
+ return 2762;
}
}
}
@@ -5858,7 +6056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2822;
+ return 2840;
}
else
{
@@ -5876,7 +6074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2825;
+ return 2843;
}
}
}
@@ -5956,7 +6154,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2635;
+ return 2653;
}
else
{
@@ -5964,7 +6162,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2636;
+ return 2654;
}
}
else
@@ -6071,7 +6269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2827;
+ return 2845;
}
}
}
@@ -6087,7 +6285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2824;
+ return 2842;
}
else
{
@@ -6132,7 +6330,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2634;
+ return 2652;
}
else
{
@@ -6226,7 +6424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2826;
+ return 2844;
}
}
}
@@ -6356,7 +6554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2828;
+ return 2846;
}
}
}
@@ -6372,7 +6570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2823;
+ return 2841;
}
else
{
@@ -7214,7 +7412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2654;
+ return 2672;
}
}
}
@@ -7288,7 +7486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2655;
+ return 2673;
}
}
}
@@ -9962,7 +10160,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2653;
+ return 2671;
}
}
}
@@ -11666,7 +11864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2682;
+ return 2700;
}
}
else
@@ -11909,7 +12107,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2658;
+ return 2676;
}
else
{
@@ -11917,7 +12115,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2659;
+ return 2677;
}
}
else
@@ -12149,7 +12347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2679;
+ return 2697;
}
else
{
@@ -12170,7 +12368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2686;
+ return 2704;
}
else
{
@@ -12178,7 +12376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2685;
+ return 2703;
}
}
else
@@ -12233,7 +12431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2678;
+ return 2696;
}
else
{
@@ -12245,7 +12443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2684;
+ return 2702;
}
else
{
@@ -12253,7 +12451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2683;
+ return 2701;
}
}
else
@@ -12304,7 +12502,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2662;
+ return 2680;
}
else
{
@@ -12312,7 +12510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2663;
+ return 2681;
}
}
else
@@ -12671,7 +12869,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2656;
+ return 2674;
}
else
{
@@ -12704,7 +12902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2680;
+ return 2698;
}
else
{
@@ -12734,7 +12932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2657;
+ return 2675;
}
else
{
@@ -12863,7 +13061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2666;
+ return 2684;
}
else
{
@@ -12873,7 +13071,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2668;
+ return 2686;
}
else
{
@@ -12881,7 +13079,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2670;
+ return 2688;
}
}
}
@@ -12893,7 +13091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2667;
+ return 2685;
}
else
{
@@ -12903,7 +13101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2669;
+ return 2687;
}
else
{
@@ -12911,7 +13109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2671;
+ return 2689;
}
}
}
@@ -13970,7 +14168,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2650;
+ return 2668;
}
else
{
@@ -13978,7 +14176,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2652;
+ return 2670;
}
}
else
@@ -13987,7 +14185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2651;
+ return 2669;
}
}
}
@@ -15483,7 +15681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2660;
+ return 2678;
}
else
{
@@ -15491,7 +15689,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2661;
+ return 2679;
}
}
}
@@ -15865,7 +16063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2664;
+ return 2682;
}
else
{
@@ -15873,7 +16071,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2665;
+ return 2683;
}
}
}
@@ -16234,7 +16432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2588;
+ return 2606;
}
else
{
@@ -16242,7 +16440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2589;
+ return 2607;
}
}
else
@@ -16272,7 +16470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2518;
+ return 2530;
}
}
}
@@ -16286,7 +16484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2591;
+ return 2609;
}
else
{
@@ -16294,7 +16492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2590;
+ return 2608;
}
}
else
@@ -16324,7 +16522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2520;
+ return 2532;
}
}
}
@@ -16341,7 +16539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2595;
+ return 2613;
}
else
{
@@ -16349,7 +16547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2592;
+ return 2610;
}
}
else
@@ -16379,7 +16577,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2519;
+ return 2531;
}
}
}
@@ -16393,7 +16591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2593;
+ return 2611;
}
else
{
@@ -16401,7 +16599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2594;
+ return 2612;
}
}
else
@@ -17527,7 +17725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2681;
+ return 2699;
}
}
else
@@ -18186,7 +18384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2428;
+ return 2436;
}
}
else
@@ -18888,7 +19086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2817;
+ return 2835;
}
else
{
@@ -19468,7 +19666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2745;
+ return 2763;
}
else
{
@@ -19476,7 +19674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2747;
+ return 2765;
}
}
else
@@ -19487,7 +19685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2751;
+ return 2769;
}
else
{
@@ -19495,7 +19693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2753;
+ return 2771;
}
}
}
@@ -19509,7 +19707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2748;
+ return 2766;
}
else
{
@@ -19517,7 +19715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2750;
+ return 2768;
}
}
else
@@ -19528,7 +19726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2754;
+ return 2772;
}
else
{
@@ -19536,7 +19734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2756;
+ return 2774;
}
}
}
@@ -19553,7 +19751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2769;
+ return 2787;
}
else
{
@@ -19561,7 +19759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2771;
+ return 2789;
}
}
else
@@ -19572,7 +19770,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2775;
+ return 2793;
}
else
{
@@ -19580,7 +19778,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2777;
+ return 2795;
}
}
}
@@ -19594,7 +19792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2772;
+ return 2790;
}
else
{
@@ -19602,7 +19800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2774;
+ return 2792;
}
}
else
@@ -19613,7 +19811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2778;
+ return 2796;
}
else
{
@@ -19621,7 +19819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2780;
+ return 2798;
}
}
}
@@ -19641,7 +19839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2757;
+ return 2775;
}
else
{
@@ -19649,7 +19847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2759;
+ return 2777;
}
}
else
@@ -19660,7 +19858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2763;
+ return 2781;
}
else
{
@@ -19668,7 +19866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2765;
+ return 2783;
}
}
}
@@ -19682,7 +19880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2760;
+ return 2778;
}
else
{
@@ -19690,7 +19888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2762;
+ return 2780;
}
}
else
@@ -19701,7 +19899,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2766;
+ return 2784;
}
else
{
@@ -19709,7 +19907,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2768;
+ return 2786;
}
}
}
@@ -19726,7 +19924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2781;
+ return 2799;
}
else
{
@@ -19734,7 +19932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2783;
+ return 2801;
}
}
else
@@ -19745,7 +19943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2787;
+ return 2805;
}
else
{
@@ -19753,7 +19951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2789;
+ return 2807;
}
}
}
@@ -19767,7 +19965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2784;
+ return 2802;
}
else
{
@@ -19775,7 +19973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2786;
+ return 2804;
}
}
else
@@ -19786,7 +19984,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2790;
+ return 2808;
}
else
{
@@ -19794,7 +19992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2792;
+ return 2810;
}
}
}
@@ -19828,7 +20026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2746;
+ return 2764;
}
else
{
@@ -19836,7 +20034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2805;
+ return 2823;
}
}
else
@@ -19847,7 +20045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2752;
+ return 2770;
}
else
{
@@ -19855,7 +20053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2807;
+ return 2825;
}
}
}
@@ -19869,7 +20067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2749;
+ return 2767;
}
else
{
@@ -19877,7 +20075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2806;
+ return 2824;
}
}
else
@@ -19886,7 +20084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2755;
+ return 2773;
}
}
}
@@ -19902,7 +20100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2770;
+ return 2788;
}
else
{
@@ -19910,7 +20108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2811;
+ return 2829;
}
}
else
@@ -19921,7 +20119,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2776;
+ return 2794;
}
else
{
@@ -19929,7 +20127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2813;
+ return 2831;
}
}
}
@@ -19943,7 +20141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2773;
+ return 2791;
}
else
{
@@ -19951,7 +20149,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2812;
+ return 2830;
}
}
else
@@ -19960,7 +20158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2779;
+ return 2797;
}
}
}
@@ -19979,7 +20177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2758;
+ return 2776;
}
else
{
@@ -19987,7 +20185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2808;
+ return 2826;
}
}
else
@@ -19998,7 +20196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2764;
+ return 2782;
}
else
{
@@ -20006,7 +20204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2810;
+ return 2828;
}
}
}
@@ -20020,7 +20218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2761;
+ return 2779;
}
else
{
@@ -20028,7 +20226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2809;
+ return 2827;
}
}
else
@@ -20037,7 +20235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2767;
+ return 2785;
}
}
}
@@ -20053,7 +20251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2782;
+ return 2800;
}
else
{
@@ -20061,7 +20259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2814;
+ return 2832;
}
}
else
@@ -20072,7 +20270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2788;
+ return 2806;
}
else
{
@@ -20080,7 +20278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2816;
+ return 2834;
}
}
}
@@ -20094,7 +20292,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2785;
+ return 2803;
}
else
{
@@ -20102,7 +20300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2815;
+ return 2833;
}
}
else
@@ -20111,7 +20309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2791;
+ return 2809;
}
}
}
@@ -20278,7 +20476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2672;
+ return 2690;
}
}
}
@@ -20311,7 +20509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2598;
+ return 2616;
}
}
else
@@ -20385,7 +20583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2674;
+ return 2692;
}
}
}
@@ -20418,7 +20616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2675;
+ return 2693;
}
}
else
@@ -20465,7 +20663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2605;
+ return 2623;
}
else
{
@@ -20473,7 +20671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2607;
+ return 2625;
}
}
else
@@ -20484,7 +20682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2609;
+ return 2627;
}
else
{
@@ -20498,7 +20696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2610;
+ return 2628;
}
else
{
@@ -20506,7 +20704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2603;
+ return 2621;
}
}
else
@@ -20515,7 +20713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2612;
+ return 2630;
}
}
else
@@ -20528,7 +20726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2611;
+ return 2629;
}
else
{
@@ -20536,7 +20734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2616;
+ return 2634;
}
}
else
@@ -20545,7 +20743,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2613;
+ return 2631;
}
}
}
@@ -20726,7 +20924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2597;
+ return 2615;
}
}
else
@@ -20757,7 +20955,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2673;
+ return 2691;
}
else
{
@@ -20776,7 +20974,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2689;
+ return 2707;
}
else
{
@@ -20786,7 +20984,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2687;
+ return 2705;
}
else
{
@@ -20796,7 +20994,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2694;
+ return 2712;
}
else
{
@@ -20804,7 +21002,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2693;
+ return 2711;
}
}
}
@@ -21388,7 +21586,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2690;
+ return 2708;
}
else
{
@@ -21396,7 +21594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2691;
+ return 2709;
}
}
}
@@ -21714,7 +21912,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2608;
+ return 2626;
}
}
else
@@ -22325,7 +22523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2601;
+ return 2619;
}
}
}
@@ -22377,7 +22575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2614;
+ return 2632;
}
}
}
@@ -22620,7 +22818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2604;
+ return 2622;
}
}
else
@@ -22696,7 +22894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2617;
+ return 2635;
}
}
else
@@ -23522,7 +23720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2602;
+ return 2620;
}
}
else
@@ -23554,7 +23752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2615;
+ return 2633;
}
}
else
@@ -23794,7 +23992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2606;
+ return 2624;
}
}
else
@@ -23826,7 +24024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2620;
+ return 2638;
}
else
{
@@ -23834,7 +24032,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2624;
+ return 2642;
}
}
}
@@ -23856,7 +24054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2621;
+ return 2639;
}
else
{
@@ -23864,7 +24062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2625;
+ return 2643;
}
}
}
@@ -23903,7 +24101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2618;
+ return 2636;
}
else
{
@@ -23911,7 +24109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2622;
+ return 2640;
}
}
else
@@ -23933,7 +24131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2619;
+ return 2637;
}
else
{
@@ -23941,7 +24139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2623;
+ return 2641;
}
}
else
@@ -25749,7 +25947,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2626;
+ return 2644;
}
else
{
@@ -25757,7 +25955,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2630;
+ return 2648;
}
}
else
@@ -25779,7 +25977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2627;
+ return 2645;
}
else
{
@@ -25787,7 +25985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2631;
+ return 2649;
}
}
else
@@ -26293,7 +26491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2628;
+ return 2646;
}
else
{
@@ -26301,7 +26499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2632;
+ return 2650;
}
}
}
@@ -26323,7 +26521,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2629;
+ return 2647;
}
else
{
@@ -26331,7 +26529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2633;
+ return 2651;
}
}
}
@@ -26387,7 +26585,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2600;
+ return 2618;
}
else
{
@@ -26395,7 +26593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2599;
+ return 2617;
}
}
}
@@ -26498,7 +26696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2677;
+ return 2695;
}
else
{
@@ -26506,7 +26704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2676;
+ return 2694;
}
}
else
@@ -26517,7 +26715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2688;
+ return 2706;
}
else
{
@@ -26527,7 +26725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2696;
+ return 2714;
}
else
{
@@ -26535,7 +26733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2695;
+ return 2713;
}
}
}
@@ -27026,22 +27224,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2506: value = 2514; break; /* mov --> mova. */
- case 2514: return NULL; /* mova --> NULL. */
- case 2502: value = 2510; break; /* mov --> mova. */
- case 2510: return NULL; /* mova --> NULL. */
- case 2504: value = 2512; break; /* mov --> mova. */
- case 2512: return NULL; /* mova --> NULL. */
- case 2500: value = 2508; break; /* mov --> mova. */
- case 2508: return NULL; /* mova --> NULL. */
- case 2507: value = 2515; break; /* mov --> mova. */
- case 2515: return NULL; /* mova --> NULL. */
- case 2503: value = 2511; break; /* mov --> mova. */
- case 2511: return NULL; /* mova --> NULL. */
- case 2505: value = 2513; break; /* mov --> mova. */
- case 2513: return NULL; /* mova --> NULL. */
- case 2501: value = 2509; break; /* mov --> mova. */
- case 2509: return NULL; /* mova --> NULL. */
+ case 2518: value = 2526; break; /* mov --> mova. */
+ case 2526: return NULL; /* mova --> NULL. */
+ case 2514: value = 2522; break; /* mov --> mova. */
+ case 2522: return NULL; /* mova --> NULL. */
+ case 2516: value = 2524; break; /* mov --> mova. */
+ case 2524: return NULL; /* mova --> NULL. */
+ case 2512: value = 2520; break; /* mov --> mova. */
+ case 2520: return NULL; /* mova --> NULL. */
+ case 2519: value = 2527; break; /* mov --> mova. */
+ case 2527: return NULL; /* mova --> NULL. */
+ case 2515: value = 2523; break; /* mov --> mova. */
+ case 2523: return NULL; /* mova --> NULL. */
+ case 2517: value = 2525; break; /* mov --> mova. */
+ case 2525: return NULL; /* mova --> NULL. */
+ case 2513: value = 2521; break; /* mov --> mova. */
+ case 2521: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -27063,11 +27261,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2818; break; /* addg --> smax. */
- case 2818: value = 2819; break; /* smax --> umax. */
- case 2819: value = 2820; break; /* umax --> smin. */
- case 2820: value = 2821; break; /* smin --> umin. */
- case 2821: return NULL; /* umin --> NULL. */
+ case 19: value = 2836; break; /* addg --> smax. */
+ case 2836: value = 2837; break; /* smax --> umax. */
+ case 2837: value = 2838; break; /* umax --> smin. */
+ case 2838: value = 2839; break; /* smin --> umin. */
+ case 2839: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -27225,8 +27423,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2692; break; /* fcvt --> bfcvt. */
- case 2692: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2710; break; /* fcvt --> bfcvt. */
+ case 2710: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -27733,12 +27931,13 @@ aarch64_extract_operand (const aarch64_operand *self,
case 203:
case 209:
case 212:
- case 222:
+ case 216:
case 223:
- case 230:
+ case 224:
case 231:
case 232:
case 233:
+ case 234:
return aarch64_ext_regno (self, info, code, inst, errors);
case 10:
return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -27754,7 +27953,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 256:
+ case 257:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -27800,13 +27999,13 @@ aarch64_extract_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 236:
- case 250:
+ case 237:
case 251:
- case 253:
- case 255:
- case 260:
+ case 252:
+ case 254:
+ case 256:
case 261:
+ case 262:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -27877,8 +28076,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
- case 252:
- case 254:
+ case 253:
+ case 255:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
@@ -27969,48 +28168,48 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sve_index (self, info, code, inst, errors);
case 211:
case 213:
- case 229:
+ case 230:
return aarch64_ext_sve_reglist (self, info, code, inst, errors);
case 214:
case 215:
- case 216:
case 217:
case 218:
case 219:
- case 228:
- return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 220:
+ case 229:
+ return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 221:
+ case 222:
return aarch64_ext_sve_strided_reglist (self, info, code, inst, errors);
- case 224:
- case 226:
- case 237:
- return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
case 225:
case 227:
+ case 238:
+ return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 226:
+ case 228:
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 234:
case 235:
- case 244:
+ case 236:
case 245:
case 246:
case 247:
case 248:
case 249:
+ case 250:
return aarch64_ext_simple_index (self, info, code, inst, errors);
- case 238:
case 239:
case 240:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 241:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 242:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 243:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ case 244:
return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 257:
case 258:
case 259:
+ case 260:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 0475adbc31d..1148f2e952a 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -3169,6 +3169,8 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
variant = i - 1;
break;
+ case sme_fp_sd:
+ case sme_int_sd:
case sve_size_bh:
case sve_size_sd:
variant = extract_field (FLD_SVE_sz, inst->value, 0);
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 21e06e6114f..8658d07bf39 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -240,6 +240,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REGLIST, "SVE_ZtxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn2}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn4}, "a list of SVE vector registers"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm}, "an SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zmx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm2}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zmx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm4}, "a list of SVE vector registers"},
{AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn2}, "a list of SVE vector registers"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index cd185b8af29..d9cc0544e82 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -241,6 +241,7 @@ const aarch64_field fields[] =
{ 0, 3 }, /* SME_ZAda_3b: tile ZA0-ZA7. */
{ 1, 4 }, /* SME_Zdn2: Z0-Z31, multiple of 2, bits [4:1]. */
{ 2, 3 }, /* SME_Zdn4: Z0-Z31, multiple of 4, bits [4:2]. */
+ { 16, 4 }, /* SME_Zm: Z0-Z15, bits [19:16]. */
{ 17, 4 }, /* SME_Zm2: Z0-Z31, multiple of 2, bits [20:17]. */
{ 18, 3 }, /* SME_Zm4: Z0-Z31, multiple of 4, bits [20:18]. */
{ 6, 4 }, /* SME_Zn2: Z0-Z31, multiple of 2, bits [9:6]. */
@@ -1764,6 +1765,14 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
return 0;
break;
+ case AARCH64_OPND_SME_Zm:
+ if (opnd->reg.regno > 15)
+ {
+ set_invalid_regno_error (mismatch_detail, idx, "z", 0, 15);
+ return 0;
+ }
+ break;
+
case AARCH64_OPND_SME_PnT_Wm_imm:
size = aarch64_get_qualifier_esize (opnd->qualifier);
max_value = 16 / size - 1;
@@ -3101,23 +3110,38 @@ aarch64_match_operands_constraint (aarch64_inst *inst,
break;
default:
- /* Check for cases where a source register needs to be the same as the
- destination register. Do this before matching qualifiers since if
- an instruction has both invalid tying and invalid qualifiers,
- the error about qualifiers would suggest several alternative
- instructions that also have invalid tying. */
- if (inst->operands[0].reg.regno
- != inst->operands[i].reg.regno)
- {
- if (mismatch_detail)
- {
- mismatch_detail->kind = AARCH64_OPDE_UNTIED_OPERAND;
- mismatch_detail->index = i;
- mismatch_detail->error = NULL;
- }
- return 0;
- }
- break;
+ {
+ /* Check for cases where a source register needs to be the
+ same as the destination register. Do this before
+ matching qualifiers since if an instruction has both
+ invalid tying and invalid qualifiers, the error about
+ qualifiers would suggest several alternative instructions
+ that also have invalid tying. */
+ enum aarch64_operand_class op_class1
+ = aarch64_get_operand_class (inst->operands[0].type);
+ enum aarch64_operand_class op_class2
+ = aarch64_get_operand_class (inst->operands[i].type);
+ assert (op_class1 == op_class2);
+ if (op_class1 == AARCH64_OPND_CLASS_SVE_REGLIST
+ ? ((inst->operands[0].reglist.first_regno
+ != inst->operands[i].reglist.first_regno)
+ || (inst->operands[0].reglist.num_regs
+ != inst->operands[i].reglist.num_regs)
+ || (inst->operands[0].reglist.stride
+ != inst->operands[i].reglist.stride))
+ : (inst->operands[0].reg.regno
+ != inst->operands[i].reg.regno))
+ {
+ if (mismatch_detail)
+ {
+ mismatch_detail->kind = AARCH64_OPDE_UNTIED_OPERAND;
+ mismatch_detail->index = i;
+ mismatch_detail->error = NULL;
+ }
+ return 0;
+ }
+ break;
+ }
}
}
@@ -3874,6 +3898,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_Zm_16:
case AARCH64_OPND_SVE_Zn:
case AARCH64_OPND_SVE_Zt:
+ case AARCH64_OPND_SME_Zm:
if (opnd->qualifier == AARCH64_OPND_QLF_NIL)
snprintf (buf, size, "%s", style_reg (styler, "z%d", opnd->reg.regno));
else
@@ -6501,6 +6526,18 @@ aarch64_cpu_supports_inst_p (uint64_t cpu_variant, aarch64_inst *inst)
|| !AARCH64_CPU_HAS_ALL_FEATURES (cpu_variant, *inst->opcode->avariant))
return false;
+ if (inst->opcode->iclass == sme_fp_sd
+ && inst->operands[0].qualifier == AARCH64_OPND_QLF_S_D
+ && !AARCH64_CPU_HAS_ALL_FEATURES (cpu_variant,
+ AARCH64_FEATURE_SME_F64F64))
+ return false;
+
+ if (inst->opcode->iclass == sme_int_sd
+ && inst->operands[0].qualifier == AARCH64_OPND_QLF_S_D
+ && !AARCH64_CPU_HAS_ALL_FEATURES (cpu_variant,
+ AARCH64_FEATURE_SME_I16I64))
+ return false;
+
return true;
}
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 8422be4c9db..1284dd47d4d 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -62,6 +62,7 @@ enum aarch64_field_kind
FLD_SME_ZAda_3b,
FLD_SME_Zdn2,
FLD_SME_Zdn4,
+ FLD_SME_Zm,
FLD_SME_Zm2,
FLD_SME_Zm4,
FLD_SME_Zn2,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 0f881681aab..b97e375c1f0 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5325,7 +5325,19 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("whilelt", 0x25205410, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
/* SME2 extensions to SME. */
+ SME2_INSN ("add", 0xc1a01c10, 0xffbf9c38, sme_int_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("add", 0xc1a11c10, 0xffbf9c78, sme_int_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("add", 0xc1201810, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("add", 0xc1301810, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("add", 0xc1a01810, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("add", 0xc1a11810, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("add", 0xc120a300, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("add", 0xc120ab00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
+ SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fsub", 0xc1a01c08, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("fsub", 0xc1a11c08, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
SME2_INSN ("ld1b", 0xa0408000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BZU, 0, 0),
SME2_INSN ("ld1b", 0xa1400000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
@@ -5485,6 +5497,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("stnt1w", 0xa1204008, 0xffe0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
SME2_INSN ("stnt1w", 0xa120c008, 0xffe0e00c, sve_misc, 0, OP3 (SME_Ztx4_STRIDED, SME_PNg3, SVE_ADDR_RR_LSL2), OP_SVE_SUU, 0, 0),
SME2_INSN ("str", 0xe13f8000, 0xfffffc1f, sme_misc, 0, OP2 (SME_ZT0, SIMD_ADDR_SIMPLE), {}, 0, 0),
+ SME2_INSN ("sub", 0xc1a01c18, 0xffbf9c38, sme_int_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("sub", 0xc1a11c18, 0xffbf9c78, sme_int_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("sub", 0xc1201818, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("sub", 0xc1301818, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("sub", 0xc1a01818, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("sub", 0xc1a11818, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
@@ -6138,6 +6156,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
F(FLD_SME_Zdn2), "a list of SVE vector registers") \
Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zdnx4", 4 << OPD_F_OD_LSB, \
F(FLD_SME_Zdn4), "a list of SVE vector registers") \
+ Y(SVE_REG, regno, "SME_Zm", 0, F(FLD_SME_Zm), \
+ "an SVE vector register") \
Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zmx2", 2 << OPD_F_OD_LSB, \
F(FLD_SME_Zm2), "a list of SVE vector registers") \
Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zmx4", 4 << OPD_F_OD_LSB, \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 12/31] aarch64: Add the SME2 maximum/minimum instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (10 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 11/31] aarch64: Add the SME2 ADD and SUB instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 13/31] aarch64: Add the SME2 FMLA and FMLS instructions Richard Sandiford
` (20 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds the SME2 multi-register forms of F{MAX,MIN}{,NM}
and {S,U}{MAX,MIN}. SQDMULH, SRSHL and URSHL have the same form
as SMAX etc., so the patch adds them too.
---
gas/testsuite/gas/aarch64/illegal-sve2.l | 12 +-
gas/testsuite/gas/aarch64/sme2-10-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-10-invalid.l | 67 +
gas/testsuite/gas/aarch64/sme2-10-invalid.s | 50 +
gas/testsuite/gas/aarch64/sme2-10-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-10-noarch.l | 641 +++++++++
gas/testsuite/gas/aarch64/sme2-10.d | 649 +++++++++
gas/testsuite/gas/aarch64/sme2-10.s | 799 +++++++++++
include/opcode/aarch64.h | 1 +
opcodes/aarch64-asm.c | 5 +
opcodes/aarch64-dis-2.c | 1362 +++++++++++++------
opcodes/aarch64-dis.c | 7 +
opcodes/aarch64-tbl.h | 44 +
13 files changed, 3198 insertions(+), 445 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-10-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-10-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-10-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-10-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-10-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-10.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-10.s
diff --git a/gas/testsuite/gas/aarch64/illegal-sve2.l b/gas/testsuite/gas/aarch64/illegal-sve2.l
index 5f43b56df14..20b7a5e1d4d 100644
--- a/gas/testsuite/gas/aarch64/illegal-sve2.l
+++ b/gas/testsuite/gas/aarch64/illegal-sve2.l
@@ -1456,7 +1456,7 @@
[^ :]+:[0-9]+: Info: other valid variant\(s\):
[^ :]+:[0-9]+: Info: sqdmlslt z0\.s, z0\.h, z0\.h
[^ :]+:[0-9]+: Info: sqdmlslt z0\.d, z0\.s, z0\.s
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.h,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.h,z0\.h,z0\.h\[0\]'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.h,z32\.h,z0\.h\[0\]'
[^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `sqdmulh z0\.h,z0\.h,z8\.h\[0\]'
[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `sqdmulh z0\.h,z0\.h,z0\.h\[8\]'
@@ -1466,7 +1466,7 @@
[^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.h,z0\.h,z0\.s\[0\]'
[^ :]+:[0-9]+: Info: did you mean this\?
[^ :]+:[0-9]+: Info: sqdmulh z0\.h, z0\.h, z0\.h\[0\]
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.s,z0\.s,z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.s,z0\.s,z0\.s\[0\]'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.s,z32\.s,z0\.s\[0\]'
[^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `sqdmulh z0\.s,z0\.s,z8\.s\[0\]'
[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sqdmulh z0\.s,z0\.s,z0\.s\[4\]'
@@ -1476,7 +1476,7 @@
[^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.s,z0\.s,z0\.h\[0\]'
[^ :]+:[0-9]+: Info: did you mean this\?
[^ :]+:[0-9]+: Info: sqdmulh z0\.s, z0\.s, z0\.s\[0\]
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.d,z0\.d,z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.d,z0\.d,z0\.d\[0\]'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.d,z32\.d,z0\.d\[0\]'
[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sqdmulh z0\.d,z0\.d,z16\.d\[0\]'
[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sqdmulh z0\.d,z0\.d,z0\.d\[2\]'
@@ -1486,7 +1486,7 @@
[^ :]+:[0-9]+: Error: operand mismatch -- `sqdmulh z0\.d,z0\.d,z0\.h\[0\]'
[^ :]+:[0-9]+: Info: did you mean this\?
[^ :]+:[0-9]+: Info: sqdmulh z0\.d, z0\.d, z0\.d\[0\]
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqdmulh z32\.h,z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sqdmulh z32\.h,z0\.b,z0\.b'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sqdmulh z0\.h,z32\.b,z0\.b'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sqdmulh z0\.h,z0\.b,z32\.b'
[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 3 -- `sqdmulh z0\.s,z0\.h,z0\.x'
@@ -2046,7 +2046,7 @@
[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sri z0\.s,z0\.s,#0'
[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sri z0\.s,z0\.s,#33'
[^ :]+:[0-9]+: Error: immediate value out of range 1 to 64 at operand 3 -- `sri z0\.d,z0\.d,#0'
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `srshl z32\.b,p0/m,z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `srshl z32\.b,p0/m,z0\.b,z0\.b'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `srshl z0\.b,p0/m,z32\.b,z0\.b'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `srshl z0\.b,p0/m,z0\.b,z32\.b'
[^ :]+:[0-9]+: Error: operand 3 must be the same register as operand 1 -- `srshl z0\.b,p0/m,z1\.b,z0\.b'
@@ -2964,7 +2964,7 @@
[^ :]+:[0-9]+: Info: urhadd z0\.h, p0/m, z0\.h, z0\.h
[^ :]+:[0-9]+: Info: urhadd z0\.s, p0/m, z0\.s, z0\.s
[^ :]+:[0-9]+: Info: urhadd z0\.d, p0/m, z0\.d, z0\.d
-[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `urshl z32\.b,p0/m,z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `urshl z32\.b,p0/m,z0\.b,z0\.b'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `urshl z0\.b,p0/m,z32\.b,z0\.b'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `urshl z0\.b,p0/m,z0\.b,z32\.b'
[^ :]+:[0-9]+: Error: operand 3 must be the same register as operand 1 -- `urshl z0\.b,p0/m,z1\.b,z0\.b'
diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.d b/gas/testsuite/gas/aarch64/sme2-10-invalid.d
new file mode 100644
index 00000000000..7b8c63f4174
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-10-invalid.s
+#error_output: sme2-10-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.l b/gas/testsuite/gas/aarch64/sme2-10-invalid.l
new file mode 100644
index 00000000000..d0309ba217b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.l
@@ -0,0 +1,67 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fmax 0,{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmax {z0\.h-z1\.h},0,z0\.h'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h,z8\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z16\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z31\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
+[^ :]+:[0-9]+: Info: fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z2\.h-z5\.h},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h,z1\.h,z2\.h},{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z16\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z31\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z1\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Info: fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z4\.h-z7\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z1\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z2\.h-z5\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z3\.h-z6\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.s b/gas/testsuite/gas/aarch64/sme2-10-invalid.s
new file mode 100644
index 00000000000..04461bdc205
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.s
@@ -0,0 +1,50 @@
+ fmax 0, { z0.h - z1.h }, z0.h
+ fmax { z0.h - z1.h }, 0, z0.h
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, 0
+
+ fmax { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ fmax { z0.h - z1.h }, { z0.h - z2.h }, z0.h
+ fmax { z0.h - z1.h }, { z0.h - z3.h }, z0.h
+ fmax { z0.h - z1.h }, { z0.h, z8.h }, z0.h
+ fmax { z0.h - z2.h }, { z0.h - z2.h }, z0.h
+ fmax { z0.h - z1.h }, { z2.h - z3.h }, z0.h
+ fmax { z1.h - z2.h }, { z1.h - z2.h }, z0.h
+ fmax { z31.h, z0.h }, { z31.h, z0.h }, z0.h
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, z16.h
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, z31.h
+
+ fmax { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ fmax { z0.h - z3.h }, { z0.h - z2.h }, z0.h
+ fmax { z0.h - z3.h }, { z0.h - z1.h }, z0.h
+ fmax { z0.h - z3.h }, { z2.h - z5.h }, z0.h
+ fmax { z1.h - z4.h }, { z1.h - z4.h }, z0.h
+ fmax { z2.h - z5.h }, { z2.h - z5.h }, z0.h
+ fmax { z3.h - z6.h }, { z3.h - z6.h }, z0.h
+ fmax { z31.h, z0.h, z1.h, z2.h }, { z31.h, z0.h, z1.h, z2.h }, z0.h
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, z16.h
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, z31.h
+
+ fmax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b }
+ fmax { z0.h - z1.h }, { z0.h - z2.h }, { z0.h - z1.h }
+ fmax { z0.h - z1.h }, { z0.h - z3.h }, { z0.h - z1.h }
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z2.h }
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z3.h }
+ fmax { z0.h - z2.h }, { z0.h - z2.h }, { z0.h - z1.h }
+ fmax { z0.h - z1.h }, { z2.h - z3.h }, { z0.h - z1.h }
+ fmax { z1.h - z2.h }, { z1.h - z2.h }, { z0.h - z1.h }
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, { z1.h - z2.h }
+ fmax { z31.h, z0.h }, { z31.h, z0.h }, { z0.h - z1.h }
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, { z31.h, z0.h }
+
+ fmax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b }
+ fmax { z0.h - z3.h }, { z0.h - z1.h }, { z0.h - z3.h }
+ fmax { z0.h - z3.h }, { z0.h - z2.h }, { z0.h - z3.h }
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z1.h }
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z2.h }
+ fmax { z0.h - z3.h }, { z4.h - z7.h }, { z0.h - z3.h }
+ fmax { z1.h - z4.h }, { z1.h - z4.h }, { z0.h - z3.h }
+ fmax { z2.h - z5.h }, { z2.h - z5.h }, { z0.h - z3.h }
+ fmax { z3.h - z6.h }, { z3.h - z6.h }, { z0.h - z3.h }
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, { z1.h - z4.h }
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, { z2.h - z5.h }
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, { z3.h - z6.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-10-noarch.d b/gas/testsuite/gas/aarch64/sme2-10-noarch.d
new file mode 100644
index 00000000000..159adc6fc64
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-10-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-10.s
+#error_output: sme2-10-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-10-noarch.l b/gas/testsuite/gas/aarch64/sme2-10-noarch.l
new file mode 100644
index 00000000000..932076709e0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-10-noarch.l
@@ -0,0 +1,641 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-10.d b/gas/testsuite/gas/aarch64/sme2-10.d
new file mode 100644
index 00000000000..04535d78717
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-10.d
@@ -0,0 +1,649 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c160a100 fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h
+[^:]+: c160a11e fmax {z30\.h-z31\.h}, {z30\.h-z31\.h}, z0\.h
+[^:]+: c16fa100 fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z15\.h
+[^:]+: c166a106 fmax {z6\.h-z7\.h}, {z6\.h-z7\.h}, z6\.h
+[^:]+: c1a0a100 fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s
+[^:]+: c1a0a11e fmax {z30\.s-z31\.s}, {z30\.s-z31\.s}, z0\.s
+[^:]+: c1afa100 fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z15\.s
+[^:]+: c1a5a112 fmax {z18\.s-z19\.s}, {z18\.s-z19\.s}, z5\.s
+[^:]+: c1e0a100 fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d
+[^:]+: c1e0a11e fmax {z30\.d-z31\.d}, {z30\.d-z31\.d}, z0\.d
+[^:]+: c1efa100 fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, z15\.d
+[^:]+: c1e8a116 fmax {z22\.d-z23\.d}, {z22\.d-z23\.d}, z8\.d
+[^:]+: c160a900 fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h
+[^:]+: c160a91c fmax {z28\.h-z31\.h}, {z28\.h-z31\.h}, z0\.h
+[^:]+: c16fa900 fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, z15\.h
+[^:]+: c16ca90c fmax {z12\.h-z15\.h}, {z12\.h-z15\.h}, z12\.h
+[^:]+: c1a0a900 fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
+[^:]+: c1a0a91c fmax {z28\.s-z31\.s}, {z28\.s-z31\.s}, z0\.s
+[^:]+: c1afa900 fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, z15\.s
+[^:]+: c1a7a908 fmax {z8\.s-z11\.s}, {z8\.s-z11\.s}, z7\.s
+[^:]+: c1e0a900 fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
+[^:]+: c1e0a91c fmax {z28\.d-z31\.d}, {z28\.d-z31\.d}, z0\.d
+[^:]+: c1efa900 fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, z15\.d
+[^:]+: c1eda918 fmax {z24\.d-z27\.d}, {z24\.d-z27\.d}, z13\.d
+[^:]+: c160b100 fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c160b11e fmax {z30\.h-z31\.h}, {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c17eb100 fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c17ab112 fmax {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z26\.h-z27\.h}
+[^:]+: c1a0b100 fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a0b11e fmax {z30\.s-z31\.s}, {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1beb100 fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1aab104 fmax {z4\.s-z5\.s}, {z4\.s-z5\.s}, {z10\.s-z11\.s}
+[^:]+: c1e0b100 fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e0b11e fmax {z30\.d-z31\.d}, {z30\.d-z31\.d}, {z0\.d-z1\.d}
+[^:]+: c1feb100 fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z30\.d-z31\.d}
+[^:]+: c1e8b11c fmax {z28\.d-z29\.d}, {z28\.d-z29\.d}, {z8\.d-z9\.d}
+[^:]+: c160b900 fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c160b91c fmax {z28\.h-z31\.h}, {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c17cb900 fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c174b910 fmax {z16\.h-z19\.h}, {z16\.h-z19\.h}, {z20\.h-z23\.h}
+[^:]+: c1a0b900 fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a0b91c fmax {z28\.s-z31\.s}, {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bcb900 fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1a4b918 fmax {z24\.s-z27\.s}, {z24\.s-z27\.s}, {z4\.s-z7\.s}
+[^:]+: c1e0b900 fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e0b91c fmax {z28\.d-z31\.d}, {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1fcb900 fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1e8b90c fmax {z12\.d-z15\.d}, {z12\.d-z15\.d}, {z8\.d-z11\.d}
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+[^:]+: c16caa2d urshl {z12\.h-z15\.h}, {z12\.h-z15\.h}, z12\.h
+[^:]+: c1a0aa21 urshl {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s
+[^:]+: c1a0aa3d urshl {z28\.s-z31\.s}, {z28\.s-z31\.s}, z0\.s
+[^:]+: c1afaa21 urshl {z0\.s-z3\.s}, {z0\.s-z3\.s}, z15\.s
+[^:]+: c1a7aa29 urshl {z8\.s-z11\.s}, {z8\.s-z11\.s}, z7\.s
+[^:]+: c1e0aa21 urshl {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d
+[^:]+: c1e0aa3d urshl {z28\.d-z31\.d}, {z28\.d-z31\.d}, z0\.d
+[^:]+: c1efaa21 urshl {z0\.d-z3\.d}, {z0\.d-z3\.d}, z15\.d
+[^:]+: c1edaa39 urshl {z24\.d-z27\.d}, {z24\.d-z27\.d}, z13\.d
+[^:]+: c120b221 urshl {z0\.b-z1\.b}, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c120b23f urshl {z30\.b-z31\.b}, {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c13eb221 urshl {z0\.b-z1\.b}, {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c134b22f urshl {z14\.b-z15\.b}, {z14\.b-z15\.b}, {z20\.b-z21\.b}
+[^:]+: c160b221 urshl {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c160b23f urshl {z30\.h-z31\.h}, {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c17eb221 urshl {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c17ab233 urshl {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z26\.h-z27\.h}
+[^:]+: c1a0b221 urshl {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a0b23f urshl {z30\.s-z31\.s}, {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1beb221 urshl {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1aab225 urshl {z4\.s-z5\.s}, {z4\.s-z5\.s}, {z10\.s-z11\.s}
+[^:]+: c1e0b221 urshl {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e0b23f urshl {z30\.d-z31\.d}, {z30\.d-z31\.d}, {z0\.d-z1\.d}
+[^:]+: c1feb221 urshl {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z30\.d-z31\.d}
+[^:]+: c1e8b23d urshl {z28\.d-z29\.d}, {z28\.d-z29\.d}, {z8\.d-z9\.d}
+[^:]+: c120ba21 urshl {z0\.b-z3\.b}, {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c120ba3d urshl {z28\.b-z31\.b}, {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c13cba21 urshl {z0\.b-z3\.b}, {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c12cba29 urshl {z8\.b-z11\.b}, {z8\.b-z11\.b}, {z12\.b-z15\.b}
+[^:]+: c160ba21 urshl {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c160ba3d urshl {z28\.h-z31\.h}, {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c17cba21 urshl {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c174ba31 urshl {z16\.h-z19\.h}, {z16\.h-z19\.h}, {z20\.h-z23\.h}
+[^:]+: c1a0ba21 urshl {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a0ba3d urshl {z28\.s-z31\.s}, {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bcba21 urshl {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1a4ba39 urshl {z24\.s-z27\.s}, {z24\.s-z27\.s}, {z4\.s-z7\.s}
+[^:]+: c1e0ba21 urshl {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e0ba3d urshl {z28\.d-z31\.d}, {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1fcba21 urshl {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1e8ba2d urshl {z12\.d-z15\.d}, {z12\.d-z15\.d}, {z8\.d-z11\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-10.s b/gas/testsuite/gas/aarch64/sme2-10.s
new file mode 100644
index 00000000000..ca91a98f8ea
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-10.s
@@ -0,0 +1,799 @@
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ fmax { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ fmax { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ fmax { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ fmax { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ fmax { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ fmax { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ fmax { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ fmax { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ fmax { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ fmax { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ fmax { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ fmax { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ fmax { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ fmax { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ fmax { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ fmax { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ fmax { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ fmax { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ fmax { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ fmax { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ fmax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ fmax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ fmax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ fmax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ fmax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ fmax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ fmax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ fmax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ fmax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ fmax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ fmax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ fmax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ fmax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ fmax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ fmax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ fmax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ fmax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ fmax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ fmax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ fmax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ fmax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ fmax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ fmaxnm { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ fmaxnm { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ fmaxnm { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ fmaxnm { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ fmaxnm { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ fmaxnm { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ fmaxnm { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ fmaxnm { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ fmaxnm { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ fmaxnm { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ fmaxnm { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ fmaxnm { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ fmaxnm { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ fmaxnm { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ fmaxnm { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ fmaxnm { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ fmaxnm { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ fmaxnm { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ fmaxnm { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ fmaxnm { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ fmaxnm { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ fmaxnm { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ fmaxnm { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ fmaxnm { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ fmaxnm { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ fmaxnm { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ fmaxnm { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ fmaxnm { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ fmaxnm { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ fmaxnm { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ fmin { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ fmin { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ fmin { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ fmin { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ fmin { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ fmin { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ fmin { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ fmin { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ fmin { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ fmin { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ fmin { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ fmin { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ fmin { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ fmin { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ fmin { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ fmin { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ fmin { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ fmin { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ fmin { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ fmin { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ fmin { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ fmin { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ fmin { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ fmin { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ fmin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ fmin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ fmin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ fmin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ fmin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ fmin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ fmin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ fmin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ fmin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ fmin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ fmin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ fmin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ fmin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ fmin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ fmin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ fmin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ fmin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ fmin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ fmin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ fmin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ fmin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ fmin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ fmin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ fmin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ fminnm { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ fminnm { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ fminnm { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ fminnm { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ fminnm { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ fminnm { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ fminnm { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ fminnm { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ fminnm { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ fminnm { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ fminnm { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ fminnm { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ fminnm { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ fminnm { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ fminnm { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ fminnm { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ fminnm { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ fminnm { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ fminnm { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ fminnm { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ fminnm { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ fminnm { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ fminnm { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ fminnm { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ fminnm { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ fminnm { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ fminnm { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ fminnm { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ fminnm { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ fminnm { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ fminnm { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ fminnm { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ fminnm { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ fminnm { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ fminnm { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ fminnm { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ fminnm { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ fminnm { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ fminnm { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ fminnm { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ fminnm { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ fminnm { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ fminnm { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ fminnm { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ fminnm { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ fminnm { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ fminnm { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ fminnm { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ smax { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ smax { z30.b - z31.b }, { z30.b - z31.b }, z0.b
+ smax { z0.b - z1.b }, { z0.b - z1.b }, z15.b
+ smax { z2.b - z3.b }, { z2.b - z3.b }, z9.b
+
+ smax { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ smax { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ smax { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ smax { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ smax { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ smax { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ smax { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ smax { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ smax { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ smax { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ smax { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ smax { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ smax { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ smax { z28.b - z31.b }, { z28.b - z31.b }, z0.b
+ smax { z0.b - z3.b }, { z0.b - z3.b }, z15.b
+ smax { z4.b - z7.b }, { z4.b - z7.b }, z7.b
+
+ smax { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ smax { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ smax { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ smax { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ smax { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ smax { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ smax { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ smax { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ smax { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ smax { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ smax { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ smax { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ smax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b }
+ smax { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b }
+ smax { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b }
+ smax { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b }
+
+ smax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ smax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ smax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ smax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ smax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ smax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ smax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ smax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ smax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ smax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ smax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ smax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ smax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b }
+ smax { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b }
+ smax { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b }
+ smax { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b }
+
+ smax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ smax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ smax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ smax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ smax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ smax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ smax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ smax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ smax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ smax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ smax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ smax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ smin { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ smin { z30.b - z31.b }, { z30.b - z31.b }, z0.b
+ smin { z0.b - z1.b }, { z0.b - z1.b }, z15.b
+ smin { z2.b - z3.b }, { z2.b - z3.b }, z9.b
+
+ smin { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ smin { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ smin { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ smin { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ smin { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ smin { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ smin { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ smin { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ smin { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ smin { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ smin { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ smin { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ smin { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ smin { z28.b - z31.b }, { z28.b - z31.b }, z0.b
+ smin { z0.b - z3.b }, { z0.b - z3.b }, z15.b
+ smin { z4.b - z7.b }, { z4.b - z7.b }, z7.b
+
+ smin { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ smin { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ smin { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ smin { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ smin { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ smin { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ smin { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ smin { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ smin { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ smin { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ smin { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ smin { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ smin { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b }
+ smin { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b }
+ smin { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b }
+ smin { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b }
+
+ smin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ smin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ smin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ smin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ smin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ smin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ smin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ smin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ smin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ smin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ smin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ smin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ smin { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b }
+ smin { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b }
+ smin { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b }
+ smin { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b }
+
+ smin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ smin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ smin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ smin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ smin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ smin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ smin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ smin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ smin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ smin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ smin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ smin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ sqdmulh { z30.b - z31.b }, { z30.b - z31.b }, z0.b
+ sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, z15.b
+ sqdmulh { z2.b - z3.b }, { z2.b - z3.b }, z9.b
+
+ sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ sqdmulh { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ sqdmulh { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ sqdmulh { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ sqdmulh { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ sqdmulh { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ sqdmulh { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ sqdmulh { z28.b - z31.b }, { z28.b - z31.b }, z0.b
+ sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, z15.b
+ sqdmulh { z4.b - z7.b }, { z4.b - z7.b }, z7.b
+
+ sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ sqdmulh { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ sqdmulh { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ sqdmulh { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ sqdmulh { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ sqdmulh { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ sqdmulh { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b }
+ sqdmulh { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b }
+ sqdmulh { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b }
+ sqdmulh { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b }
+
+ sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ sqdmulh { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ sqdmulh { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ sqdmulh { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ sqdmulh { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ sqdmulh { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ sqdmulh { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ sqdmulh { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ sqdmulh { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ sqdmulh { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b }
+ sqdmulh { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b }
+ sqdmulh { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b }
+ sqdmulh { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b }
+
+ sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ sqdmulh { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ sqdmulh { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ sqdmulh { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ sqdmulh { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ sqdmulh { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ sqdmulh { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ sqdmulh { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ sqdmulh { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ sqdmulh { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ srshl { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ srshl { z30.b - z31.b }, { z30.b - z31.b }, z0.b
+ srshl { z0.b - z1.b }, { z0.b - z1.b }, z15.b
+ srshl { z2.b - z3.b }, { z2.b - z3.b }, z9.b
+
+ srshl { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ srshl { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ srshl { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ srshl { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ srshl { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ srshl { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ srshl { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ srshl { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ srshl { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ srshl { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ srshl { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ srshl { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ srshl { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ srshl { z28.b - z31.b }, { z28.b - z31.b }, z0.b
+ srshl { z0.b - z3.b }, { z0.b - z3.b }, z15.b
+ srshl { z4.b - z7.b }, { z4.b - z7.b }, z7.b
+
+ srshl { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ srshl { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ srshl { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ srshl { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ srshl { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ srshl { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ srshl { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ srshl { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ srshl { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ srshl { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ srshl { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ srshl { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ srshl { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b }
+ srshl { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b }
+ srshl { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b }
+ srshl { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b }
+
+ srshl { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ srshl { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ srshl { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ srshl { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ srshl { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ srshl { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ srshl { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ srshl { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ srshl { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ srshl { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ srshl { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ srshl { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ srshl { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b }
+ srshl { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b }
+ srshl { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b }
+ srshl { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b }
+
+ srshl { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ srshl { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ srshl { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ srshl { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ srshl { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ srshl { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ srshl { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ srshl { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ srshl { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ srshl { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ srshl { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ srshl { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ umax { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ umax { z30.b - z31.b }, { z30.b - z31.b }, z0.b
+ umax { z0.b - z1.b }, { z0.b - z1.b }, z15.b
+ umax { z2.b - z3.b }, { z2.b - z3.b }, z9.b
+
+ umax { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ umax { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ umax { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ umax { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ umax { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ umax { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ umax { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ umax { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ umax { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ umax { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ umax { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ umax { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ umax { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ umax { z28.b - z31.b }, { z28.b - z31.b }, z0.b
+ umax { z0.b - z3.b }, { z0.b - z3.b }, z15.b
+ umax { z4.b - z7.b }, { z4.b - z7.b }, z7.b
+
+ umax { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ umax { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ umax { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ umax { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ umax { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ umax { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ umax { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ umax { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ umax { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ umax { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ umax { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ umax { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ umax { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b }
+ umax { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b }
+ umax { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b }
+ umax { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b }
+
+ umax { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ umax { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ umax { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ umax { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ umax { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ umax { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ umax { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ umax { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ umax { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ umax { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ umax { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ umax { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ umax { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b }
+ umax { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b }
+ umax { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b }
+ umax { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b }
+
+ umax { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ umax { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ umax { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ umax { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ umax { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ umax { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ umax { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ umax { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ umax { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ umax { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ umax { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ umax { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ umin { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ umin { z30.b - z31.b }, { z30.b - z31.b }, z0.b
+ umin { z0.b - z1.b }, { z0.b - z1.b }, z15.b
+ umin { z2.b - z3.b }, { z2.b - z3.b }, z9.b
+
+ umin { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ umin { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ umin { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ umin { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ umin { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ umin { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ umin { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ umin { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ umin { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ umin { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ umin { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ umin { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ umin { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ umin { z28.b - z31.b }, { z28.b - z31.b }, z0.b
+ umin { z0.b - z3.b }, { z0.b - z3.b }, z15.b
+ umin { z4.b - z7.b }, { z4.b - z7.b }, z7.b
+
+ umin { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ umin { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ umin { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ umin { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ umin { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ umin { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ umin { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ umin { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ umin { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ umin { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ umin { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ umin { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ umin { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b }
+ umin { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b }
+ umin { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b }
+ umin { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b }
+
+ umin { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ umin { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ umin { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ umin { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ umin { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ umin { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ umin { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ umin { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ umin { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ umin { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ umin { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ umin { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ umin { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b }
+ umin { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b }
+ umin { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b }
+ umin { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b }
+
+ umin { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ umin { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ umin { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ umin { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ umin { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ umin { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ umin { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ umin { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ umin { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ umin { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ umin { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ umin { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
+
+ urshl { z0.b - z1.b }, { z0.b - z1.b }, z0.b
+ urshl { z30.b - z31.b }, { z30.b - z31.b }, z0.b
+ urshl { z0.b - z1.b }, { z0.b - z1.b }, z15.b
+ urshl { z2.b - z3.b }, { z2.b - z3.b }, z9.b
+
+ urshl { z0.h - z1.h }, { z0.h - z1.h }, z0.h
+ urshl { z30.h - z31.h }, { z30.h - z31.h }, z0.h
+ urshl { z0.h - z1.h }, { z0.h - z1.h }, z15.h
+ urshl { z6.h - z7.h }, { z6.h - z7.h }, z6.h
+
+ urshl { z0.s - z1.s }, { z0.s - z1.s }, z0.s
+ urshl { z30.s - z31.s }, { z30.s - z31.s }, z0.s
+ urshl { z0.s - z1.s }, { z0.s - z1.s }, z15.s
+ urshl { z18.s - z19.s }, { z18.s - z19.s }, z5.s
+
+ urshl { z0.d - z1.d }, { z0.d - z1.d }, z0.d
+ urshl { z30.d - z31.d }, { z30.d - z31.d }, z0.d
+ urshl { z0.d - z1.d }, { z0.d - z1.d }, z15.d
+ urshl { z22.d - z23.d }, { z22.d - z23.d }, z8.d
+
+ urshl { z0.b - z3.b }, { z0.b - z3.b }, z0.b
+ urshl { z28.b - z31.b }, { z28.b - z31.b }, z0.b
+ urshl { z0.b - z3.b }, { z0.b - z3.b }, z15.b
+ urshl { z4.b - z7.b }, { z4.b - z7.b }, z7.b
+
+ urshl { z0.h - z3.h }, { z0.h - z3.h }, z0.h
+ urshl { z28.h - z31.h }, { z28.h - z31.h }, z0.h
+ urshl { z0.h - z3.h }, { z0.h - z3.h }, z15.h
+ urshl { z12.h - z15.h }, { z12.h - z15.h }, z12.h
+
+ urshl { z0.s - z3.s }, { z0.s - z3.s }, z0.s
+ urshl { z28.s - z31.s }, { z28.s - z31.s }, z0.s
+ urshl { z0.s - z3.s }, { z0.s - z3.s }, z15.s
+ urshl { z8.s - z11.s }, { z8.s - z11.s }, z7.s
+
+ urshl { z0.d - z3.d }, { z0.d - z3.d }, z0.d
+ urshl { z28.d - z31.d }, { z28.d - z31.d }, z0.d
+ urshl { z0.d - z3.d }, { z0.d - z3.d }, z15.d
+ urshl { z24.d - z27.d }, { z24.d - z27.d }, z13.d
+
+ urshl { z0.b - z1.b }, { z0.b - z1.b }, { z0.b - z1.b }
+ urshl { z30.b - z31.b }, { z30.b - z31.b }, { z0.b - z1.b }
+ urshl { z0.b - z1.b }, { z0.b - z1.b }, { z30.b - z31.b }
+ urshl { z14.b - z15.b }, { z14.b - z15.b }, { z20.b - z21.b }
+
+ urshl { z0.h - z1.h }, { z0.h - z1.h }, { z0.h - z1.h }
+ urshl { z30.h - z31.h }, { z30.h - z31.h }, { z0.h - z1.h }
+ urshl { z0.h - z1.h }, { z0.h - z1.h }, { z30.h - z31.h }
+ urshl { z18.h - z19.h }, { z18.h - z19.h }, { z26.h - z27.h }
+
+ urshl { z0.s - z1.s }, { z0.s - z1.s }, { z0.s - z1.s }
+ urshl { z30.s - z31.s }, { z30.s - z31.s }, { z0.s - z1.s }
+ urshl { z0.s - z1.s }, { z0.s - z1.s }, { z30.s - z31.s }
+ urshl { z4.s - z5.s }, { z4.s - z5.s }, { z10.s - z11.s }
+
+ urshl { z0.d - z1.d }, { z0.d - z1.d }, { z0.d - z1.d }
+ urshl { z30.d - z31.d }, { z30.d - z31.d }, { z0.d - z1.d }
+ urshl { z0.d - z1.d }, { z0.d - z1.d }, { z30.d - z31.d }
+ urshl { z28.d - z29.d }, { z28.d - z29.d }, { z8.d - z9.d }
+
+ urshl { z0.b - z3.b }, { z0.b - z3.b }, { z0.b - z3.b }
+ urshl { z28.b - z31.b }, { z28.b - z31.b }, { z0.b - z3.b }
+ urshl { z0.b - z3.b }, { z0.b - z3.b }, { z28.b - z31.b }
+ urshl { z8.b - z11.b }, { z8.b - z11.b }, { z12.b - z15.b }
+
+ urshl { z0.h - z3.h }, { z0.h - z3.h }, { z0.h - z3.h }
+ urshl { z28.h - z31.h }, { z28.h - z31.h }, { z0.h - z3.h }
+ urshl { z0.h - z3.h }, { z0.h - z3.h }, { z28.h - z31.h }
+ urshl { z16.h - z19.h }, { z16.h - z19.h }, { z20.h - z23.h }
+
+ urshl { z0.s - z3.s }, { z0.s - z3.s }, { z0.s - z3.s }
+ urshl { z28.s - z31.s }, { z28.s - z31.s }, { z0.s - z3.s }
+ urshl { z0.s - z3.s }, { z0.s - z3.s }, { z28.s - z31.s }
+ urshl { z24.s - z27.s }, { z24.s - z27.s }, { z4.s - z7.s }
+
+ urshl { z0.d - z3.d }, { z0.d - z3.d }, { z0.d - z3.d }
+ urshl { z28.d - z31.d }, { z28.d - z31.d }, { z0.d - z3.d }
+ urshl { z0.d - z3.d }, { z0.d - z3.d }, { z28.d - z31.d }
+ urshl { z12.d - z15.d }, { z12.d - z15.d }, { z8.d - z11.d }
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 3689fff81f1..ff5367aedd7 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -705,6 +705,7 @@ enum aarch64_insn_class
sme_size_12_bhs,
sme_size_12_hs,
sme_size_22,
+ sme_size_22_hsd,
sme_str,
sme_start,
sme_stop,
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index ae699ec2cd5..f2b7d7d2d62 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1958,6 +1958,11 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
aarch64_get_variant (inst), 0);
break;
+ case sme_size_22_hsd:
+ insert_field (FLD_SME_size_22, &inst->value,
+ aarch64_get_variant (inst) + 1, 0);
+ break;
+
case sme_size_12_hs:
insert_field (FLD_SME_size_12, &inst->value,
aarch64_get_variant (inst) + 1, 0);
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index c38880201e1..36e30f752b7 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2614;
+ return 2658;
}
}
}
@@ -190,7 +190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2511;
+ return 2527;
}
else
{
@@ -198,7 +198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2510;
+ return 2526;
}
}
else
@@ -207,7 +207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2509;
+ return 2525;
}
}
}
@@ -226,7 +226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2518;
+ return 2534;
}
else
{
@@ -234,7 +234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2514;
+ return 2530;
}
}
else
@@ -247,7 +247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2508;
+ return 2524;
}
else
{
@@ -255,7 +255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2507;
+ return 2523;
}
}
else
@@ -268,7 +268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2529;
+ return 2545;
}
else
{
@@ -276,7 +276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2528;
+ return 2544;
}
}
else
@@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2506;
+ return 2522;
}
}
}
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2516;
+ return 2532;
}
else
{
@@ -306,7 +306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2512;
+ return 2528;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2519;
+ return 2535;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2515;
+ return 2531;
}
}
else
@@ -339,7 +339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2517;
+ return 2533;
}
else
{
@@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2513;
+ return 2529;
}
}
}
@@ -374,7 +374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2445;
+ return 2461;
}
else
{
@@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2446;
+ return 2462;
}
}
else
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2469;
+ return 2485;
}
else
{
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2470;
+ return 2486;
}
}
}
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2461;
+ return 2477;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2462;
+ return 2478;
}
}
else
@@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2453;
+ return 2469;
}
else
{
@@ -442,7 +442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2454;
+ return 2470;
}
}
}
@@ -459,7 +459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2477;
+ return 2493;
}
else
{
@@ -467,7 +467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2478;
+ return 2494;
}
}
else
@@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2501;
+ return 2517;
}
else
{
@@ -486,7 +486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2502;
+ return 2518;
}
}
}
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2493;
+ return 2509;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2494;
+ return 2510;
}
}
else
@@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2485;
+ return 2501;
}
else
{
@@ -527,7 +527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2486;
+ return 2502;
}
}
}
@@ -591,7 +591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2441;
+ return 2457;
}
else
{
@@ -599,7 +599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2442;
+ return 2458;
}
}
else
@@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2465;
+ return 2481;
}
else
{
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2466;
+ return 2482;
}
}
}
@@ -632,7 +632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2457;
+ return 2473;
}
else
{
@@ -640,7 +640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2458;
+ return 2474;
}
}
else
@@ -651,7 +651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2449;
+ return 2465;
}
else
{
@@ -659,7 +659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2450;
+ return 2466;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2473;
+ return 2489;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2474;
+ return 2490;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2497;
+ return 2513;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2498;
+ return 2514;
}
}
}
@@ -717,7 +717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2489;
+ return 2505;
}
else
{
@@ -725,7 +725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2490;
+ return 2506;
}
}
else
@@ -736,7 +736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2481;
+ return 2497;
}
else
{
@@ -744,7 +744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2482;
+ return 2498;
}
}
}
@@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2539;
+ return 2571;
}
else
{
@@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2540;
+ return 2572;
}
}
else
@@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2563;
+ return 2595;
}
else
{
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2564;
+ return 2596;
}
}
}
@@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2555;
+ return 2587;
}
else
{
@@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2556;
+ return 2588;
}
}
else
@@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2547;
+ return 2579;
}
else
{
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2548;
+ return 2580;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2571;
+ return 2603;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2572;
+ return 2604;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2595;
+ return 2627;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2596;
+ return 2628;
}
}
}
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2587;
+ return 2619;
}
else
{
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2588;
+ return 2620;
}
}
else
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2579;
+ return 2611;
}
else
{
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2580;
+ return 2612;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2535;
+ return 2567;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2536;
+ return 2568;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2559;
+ return 2591;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2560;
+ return 2592;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2551;
+ return 2583;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2552;
+ return 2584;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2543;
+ return 2575;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2544;
+ return 2576;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2567;
+ return 2599;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2568;
+ return 2600;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2591;
+ return 2623;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2592;
+ return 2624;
}
}
}
@@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2583;
+ return 2615;
}
else
{
@@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2584;
+ return 2616;
}
}
else
@@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2575;
+ return 2607;
}
else
{
@@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2576;
+ return 2608;
}
}
}
@@ -1274,7 +1274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2447;
+ return 2463;
}
else
{
@@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2471;
+ return 2487;
}
}
else
@@ -1293,7 +1293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2463;
+ return 2479;
}
else
{
@@ -1301,7 +1301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2455;
+ return 2471;
}
}
}
@@ -1315,7 +1315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2479;
+ return 2495;
}
else
{
@@ -1323,7 +1323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2503;
+ return 2519;
}
}
else
@@ -1334,7 +1334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2495;
+ return 2511;
}
else
{
@@ -1342,7 +1342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2487;
+ return 2503;
}
}
}
@@ -1370,7 +1370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2448;
+ return 2464;
}
else
{
@@ -1378,7 +1378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2505;
+ return 2521;
}
}
else
@@ -1387,7 +1387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2472;
+ return 2488;
}
}
else
@@ -1398,7 +1398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2464;
+ return 2480;
}
else
{
@@ -1406,7 +1406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2456;
+ return 2472;
}
}
}
@@ -1420,7 +1420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2480;
+ return 2496;
}
else
{
@@ -1428,7 +1428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2504;
+ return 2520;
}
}
else
@@ -1439,7 +1439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2496;
+ return 2512;
}
else
{
@@ -1447,7 +1447,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2488;
+ return 2504;
}
}
}
@@ -1511,7 +1511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2443;
+ return 2459;
}
else
{
@@ -1519,7 +1519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2444;
+ return 2460;
}
}
else
@@ -1530,7 +1530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2467;
+ return 2483;
}
else
{
@@ -1538,7 +1538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2468;
+ return 2484;
}
}
}
@@ -1552,7 +1552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2459;
+ return 2475;
}
else
{
@@ -1560,7 +1560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2460;
+ return 2476;
}
}
else
@@ -1571,7 +1571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2451;
+ return 2467;
}
else
{
@@ -1579,7 +1579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2452;
+ return 2468;
}
}
}
@@ -1596,7 +1596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2475;
+ return 2491;
}
else
{
@@ -1604,7 +1604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2476;
+ return 2492;
}
}
else
@@ -1615,7 +1615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2499;
+ return 2515;
}
else
{
@@ -1623,7 +1623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2500;
+ return 2516;
}
}
}
@@ -1637,7 +1637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2491;
+ return 2507;
}
else
{
@@ -1645,7 +1645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2492;
+ return 2508;
}
}
else
@@ -1656,7 +1656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2483;
+ return 2499;
}
else
{
@@ -1664,7 +1664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2484;
+ return 2500;
}
}
}
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xxxxxxxxxx01xxx
fsub. */
- return 2439;
+ return 2455;
}
else
{
@@ -1832,7 +1832,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xxxxxxxxxx01xxx
fsub. */
- return 2440;
+ return 2456;
}
}
else
@@ -1847,7 +1847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxxx0xxxxx11xxx
sub. */
- return 2602;
+ return 2634;
}
else
{
@@ -1855,7 +1855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxxx0xxxxx11xxx
sub. */
- return 2603;
+ return 2635;
}
}
else
@@ -1866,7 +1866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxxx0xxxxx11xxx
sub. */
- return 2604;
+ return 2636;
}
else
{
@@ -1874,7 +1874,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxxx0xxxxx11xxx
sub. */
- return 2605;
+ return 2637;
}
}
}
@@ -1886,7 +1886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xxxx1xxxxx11xxx
sub. */
- return 2600;
+ return 2632;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xxxx1xxxxx11xxx
sub. */
- return 2601;
+ return 2633;
}
}
}
@@ -1902,42 +1902,526 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 0) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx01x0xxxxxxxxxxxxx
- sel. */
- return 2533;
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx01x0xxxxxxx0xxxx0
+ sel. */
+ return 2549;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx11x0xxxxxxx0xxxx0
+ sel. */
+ return 2550;
+ }
+ }
+ else
+ {
+ if (((word >> 8) & 0x1) == 0)
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1000x0xx0xxxx0
+ smax. */
+ return 2551;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1100x0xx0xxxx0
+ smax. */
+ return 2553;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1010x0xx0xxxx0
+ smax. */
+ return 2552;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1110x0xx0xxxx0
+ smax. */
+ return 2554;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1001x0xx0xxxx0
+ sqdmulh. */
+ return 2559;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1101x0xx0xxxx0
+ sqdmulh. */
+ return 2561;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1011x0xx0xxxx0
+ sqdmulh. */
+ return 2560;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1111x0xx0xxxx0
+ sqdmulh. */
+ return 2562;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 9) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x100x01xx0xxxx0
+ fmax. */
+ return 2439;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110x01xx0xxxx0
+ fmax. */
+ return 2441;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x101x01xx0xxxx0
+ fmax. */
+ return 2440;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x111x01xx0xxxx0
+ fmax. */
+ return 2442;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1x0x11xx0xxxx0
+ add. */
+ return 2434;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1x1x11xx0xxxx0
+ add. */
+ return 2435;
+ }
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx11x0xxxxxxxxxxxxx
- sel. */
- return 2534;
+ if (((word >> 8) & 0x1) == 0)
+ {
+ if (((word >> 9) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00x00xx1xxxx0
+ smin. */
+ return 2555;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10x00xx1xxxx0
+ smin. */
+ return 2557;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01x00xx1xxxx0
+ smin. */
+ return 2556;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11x00xx1xxxx0
+ smin. */
+ return 2558;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00x10xx1xxxx0
+ srshl. */
+ return 2563;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10x10xx1xxxx0
+ srshl. */
+ return 2565;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01x10xx1xxxx0
+ srshl. */
+ return 2564;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11x10xx1xxxx0
+ srshl. */
+ return 2566;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00xx1xx1xxxx0
+ fmaxnm. */
+ return 2443;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10xx1xx1xxxx0
+ fmaxnm. */
+ return 2445;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01xx1xx1xxxx0
+ fmaxnm. */
+ return 2444;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11xx1xx1xxxx0
+ fmaxnm. */
+ return 2446;
+ }
+ }
+ }
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1x0xxxxxxxxxxx
- add. */
- return 2434;
+ if (((word >> 8) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00xx0xx0xxxx1
+ umax. */
+ return 2638;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10xx0xx0xxxx1
+ umax. */
+ return 2640;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01xx0xx0xxxx1
+ umax. */
+ return 2639;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11xx0xx0xxxx1
+ umax. */
+ return 2641;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00xx1xx0xxxx1
+ fmin. */
+ return 2447;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10xx1xx0xxxx1
+ fmin. */
+ return 2449;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01xx1xx0xxxx1
+ fmin. */
+ return 2448;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11xx1xx0xxxx1
+ fmin. */
+ return 2450;
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1x1xxxxxxxxxxx
- add. */
- return 2435;
+ if (((word >> 8) & 0x1) == 0)
+ {
+ if (((word >> 9) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00x00xx1xxxx1
+ umin. */
+ return 2642;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10x00xx1xxxx1
+ umin. */
+ return 2644;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01x00xx1xxxx1
+ umin. */
+ return 2643;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11x00xx1xxxx1
+ umin. */
+ return 2645;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00x10xx1xxxx1
+ urshl. */
+ return 2646;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10x10xx1xxxx1
+ urshl. */
+ return 2648;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01x10xx1xxxx1
+ urshl. */
+ return 2647;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11x10xx1xxxx1
+ urshl. */
+ return 2649;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00xx1xx1xxxx1
+ fminnm. */
+ return 2451;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10xx1xx1xxxx1
+ fminnm. */
+ return 2453;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01xx1xx1xxxx1
+ fminnm. */
+ return 2452;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11xx1xx1xxxx1
+ fminnm. */
+ return 2454;
+ }
+ }
+ }
}
}
}
@@ -1963,7 +2447,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2541;
+ return 2573;
}
else
{
@@ -1971,7 +2455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2565;
+ return 2597;
}
}
else
@@ -1982,7 +2466,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2557;
+ return 2589;
}
else
{
@@ -1990,7 +2474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2549;
+ return 2581;
}
}
}
@@ -2004,7 +2488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2573;
+ return 2605;
}
else
{
@@ -2012,7 +2496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2597;
+ return 2629;
}
}
else
@@ -2023,7 +2507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2589;
+ return 2621;
}
else
{
@@ -2031,7 +2515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2581;
+ return 2613;
}
}
}
@@ -2059,7 +2543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2542;
+ return 2574;
}
else
{
@@ -2067,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2599;
+ return 2631;
}
}
else
@@ -2076,7 +2560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2566;
+ return 2598;
}
}
else
@@ -2087,7 +2571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2558;
+ return 2590;
}
else
{
@@ -2095,7 +2579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2550;
+ return 2582;
}
}
}
@@ -2109,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2574;
+ return 2606;
}
else
{
@@ -2117,7 +2601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2598;
+ return 2630;
}
}
else
@@ -2128,7 +2612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2590;
+ return 2622;
}
else
{
@@ -2136,7 +2620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2582;
+ return 2614;
}
}
}
@@ -2178,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2537;
+ return 2569;
}
else
{
@@ -2186,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2538;
+ return 2570;
}
}
else
@@ -2197,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2561;
+ return 2593;
}
else
{
@@ -2205,7 +2689,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2562;
+ return 2594;
}
}
}
@@ -2219,7 +2703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2553;
+ return 2585;
}
else
{
@@ -2227,7 +2711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2554;
+ return 2586;
}
}
else
@@ -2238,7 +2722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2545;
+ return 2577;
}
else
{
@@ -2246,7 +2730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2546;
+ return 2578;
}
}
}
@@ -2263,7 +2747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2569;
+ return 2601;
}
else
{
@@ -2271,7 +2755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2570;
+ return 2602;
}
}
else
@@ -2282,7 +2766,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2593;
+ return 2625;
}
else
{
@@ -2290,7 +2774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2594;
+ return 2626;
}
}
}
@@ -2304,7 +2788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2585;
+ return 2617;
}
else
{
@@ -2312,7 +2796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2586;
+ return 2618;
}
}
else
@@ -2323,7 +2807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2577;
+ return 2609;
}
else
{
@@ -2331,7 +2815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2578;
+ return 2610;
}
}
}
@@ -4733,7 +5217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2655;
+ return 2699;
}
else
{
@@ -4741,7 +5225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2663;
+ return 2707;
}
}
else
@@ -4752,7 +5236,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2659;
+ return 2703;
}
else
{
@@ -4760,7 +5244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2666;
+ return 2710;
}
}
}
@@ -4798,7 +5282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2715;
+ return 2759;
}
else
{
@@ -4806,7 +5290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2721;
+ return 2765;
}
}
else
@@ -4817,7 +5301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2718;
+ return 2762;
}
else
{
@@ -4825,7 +5309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2724;
+ return 2768;
}
}
}
@@ -4839,7 +5323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2739;
+ return 2783;
}
else
{
@@ -4847,7 +5331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2745;
+ return 2789;
}
}
else
@@ -4858,7 +5342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2742;
+ return 2786;
}
else
{
@@ -4866,7 +5350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2748;
+ return 2792;
}
}
}
@@ -4883,7 +5367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2727;
+ return 2771;
}
else
{
@@ -4891,7 +5375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2733;
+ return 2777;
}
}
else
@@ -4902,7 +5386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2730;
+ return 2774;
}
else
{
@@ -4910,7 +5394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2736;
+ return 2780;
}
}
}
@@ -4924,7 +5408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2751;
+ return 2795;
}
else
{
@@ -4932,7 +5416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2757;
+ return 2801;
}
}
else
@@ -4943,7 +5427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2754;
+ return 2798;
}
else
{
@@ -4951,7 +5435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2760;
+ return 2804;
}
}
}
@@ -5016,7 +5500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2656;
+ return 2700;
}
else
{
@@ -5024,7 +5508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2664;
+ return 2708;
}
}
else
@@ -5035,7 +5519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2660;
+ return 2704;
}
else
{
@@ -5043,7 +5527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2667;
+ return 2711;
}
}
}
@@ -5081,7 +5565,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2716;
+ return 2760;
}
else
{
@@ -5089,7 +5573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2722;
+ return 2766;
}
}
else
@@ -5100,7 +5584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2719;
+ return 2763;
}
else
{
@@ -5108,7 +5592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2725;
+ return 2769;
}
}
}
@@ -5122,7 +5606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2740;
+ return 2784;
}
else
{
@@ -5130,7 +5614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2746;
+ return 2790;
}
}
else
@@ -5141,7 +5625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2743;
+ return 2787;
}
else
{
@@ -5149,7 +5633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2749;
+ return 2793;
}
}
}
@@ -5166,7 +5650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2728;
+ return 2772;
}
else
{
@@ -5174,7 +5658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2734;
+ return 2778;
}
}
else
@@ -5185,7 +5669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2731;
+ return 2775;
}
else
{
@@ -5193,7 +5677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2737;
+ return 2781;
}
}
}
@@ -5207,7 +5691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2752;
+ return 2796;
}
else
{
@@ -5215,7 +5699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2758;
+ return 2802;
}
}
else
@@ -5226,7 +5710,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2755;
+ return 2799;
}
else
{
@@ -5234,7 +5718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2761;
+ return 2805;
}
}
}
@@ -5302,7 +5786,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2658;
+ return 2702;
}
else
{
@@ -5310,7 +5794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2665;
+ return 2709;
}
}
else
@@ -5319,7 +5803,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2662;
+ return 2706;
}
}
else
@@ -5330,7 +5814,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2657;
+ return 2701;
}
else
{
@@ -5338,7 +5822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2661;
+ return 2705;
}
}
}
@@ -5400,7 +5884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2717;
+ return 2761;
}
else
{
@@ -5408,7 +5892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2811;
+ return 2855;
}
}
else
@@ -5419,7 +5903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2723;
+ return 2767;
}
else
{
@@ -5427,7 +5911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2813;
+ return 2857;
}
}
}
@@ -5441,7 +5925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2720;
+ return 2764;
}
else
{
@@ -5449,7 +5933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2812;
+ return 2856;
}
}
else
@@ -5458,7 +5942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2726;
+ return 2770;
}
}
}
@@ -5474,7 +5958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2741;
+ return 2785;
}
else
{
@@ -5482,7 +5966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2817;
+ return 2861;
}
}
else
@@ -5493,7 +5977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2747;
+ return 2791;
}
else
{
@@ -5501,7 +5985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2819;
+ return 2863;
}
}
}
@@ -5515,7 +5999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2744;
+ return 2788;
}
else
{
@@ -5523,7 +6007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2818;
+ return 2862;
}
}
else
@@ -5532,7 +6016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2750;
+ return 2794;
}
}
}
@@ -5551,7 +6035,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2729;
+ return 2773;
}
else
{
@@ -5559,7 +6043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2814;
+ return 2858;
}
}
else
@@ -5570,7 +6054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2735;
+ return 2779;
}
else
{
@@ -5578,7 +6062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2816;
+ return 2860;
}
}
}
@@ -5592,7 +6076,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2732;
+ return 2776;
}
else
{
@@ -5600,7 +6084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2815;
+ return 2859;
}
}
else
@@ -5609,7 +6093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2738;
+ return 2782;
}
}
}
@@ -5625,7 +6109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2753;
+ return 2797;
}
else
{
@@ -5633,7 +6117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2820;
+ return 2864;
}
}
else
@@ -5644,7 +6128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2759;
+ return 2803;
}
else
{
@@ -5652,7 +6136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2822;
+ return 2866;
}
}
}
@@ -5666,7 +6150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2756;
+ return 2800;
}
else
{
@@ -5674,7 +6158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2821;
+ return 2865;
}
}
else
@@ -5683,7 +6167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2762;
+ return 2806;
}
}
}
@@ -6056,7 +6540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2840;
+ return 2884;
}
else
{
@@ -6074,7 +6558,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2843;
+ return 2887;
}
}
}
@@ -6154,7 +6638,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2653;
+ return 2697;
}
else
{
@@ -6162,7 +6646,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2654;
+ return 2698;
}
}
else
@@ -6269,7 +6753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2845;
+ return 2889;
}
}
}
@@ -6285,7 +6769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2842;
+ return 2886;
}
else
{
@@ -6330,7 +6814,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2652;
+ return 2696;
}
else
{
@@ -6424,7 +6908,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2844;
+ return 2888;
}
}
}
@@ -6554,7 +7038,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2846;
+ return 2890;
}
}
}
@@ -6570,7 +7054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2841;
+ return 2885;
}
else
{
@@ -7412,7 +7896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2672;
+ return 2716;
}
}
}
@@ -7486,7 +7970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2673;
+ return 2717;
}
}
}
@@ -10160,7 +10644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2671;
+ return 2715;
}
}
}
@@ -11864,7 +12348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2700;
+ return 2744;
}
}
else
@@ -12107,7 +12591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2676;
+ return 2720;
}
else
{
@@ -12115,7 +12599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2677;
+ return 2721;
}
}
else
@@ -12347,7 +12831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2697;
+ return 2741;
}
else
{
@@ -12368,7 +12852,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2704;
+ return 2748;
}
else
{
@@ -12376,7 +12860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2703;
+ return 2747;
}
}
else
@@ -12431,7 +12915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2696;
+ return 2740;
}
else
{
@@ -12443,7 +12927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2702;
+ return 2746;
}
else
{
@@ -12451,7 +12935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2701;
+ return 2745;
}
}
else
@@ -12502,7 +12986,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2680;
+ return 2724;
}
else
{
@@ -12510,7 +12994,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2681;
+ return 2725;
}
}
else
@@ -12869,7 +13353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2674;
+ return 2718;
}
else
{
@@ -12902,7 +13386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2698;
+ return 2742;
}
else
{
@@ -12932,7 +13416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2675;
+ return 2719;
}
else
{
@@ -13061,7 +13545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2684;
+ return 2728;
}
else
{
@@ -13071,7 +13555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2686;
+ return 2730;
}
else
{
@@ -13079,7 +13563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2688;
+ return 2732;
}
}
}
@@ -13091,7 +13575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2685;
+ return 2729;
}
else
{
@@ -13101,7 +13585,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2687;
+ return 2731;
}
else
{
@@ -13109,7 +13593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2689;
+ return 2733;
}
}
}
@@ -14168,7 +14652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2668;
+ return 2712;
}
else
{
@@ -14176,7 +14660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2670;
+ return 2714;
}
}
else
@@ -14185,7 +14669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2669;
+ return 2713;
}
}
}
@@ -15681,7 +16165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2678;
+ return 2722;
}
else
{
@@ -15689,7 +16173,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2679;
+ return 2723;
}
}
}
@@ -16063,7 +16547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2682;
+ return 2726;
}
else
{
@@ -16071,7 +16555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2683;
+ return 2727;
}
}
}
@@ -16432,7 +16916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2606;
+ return 2650;
}
else
{
@@ -16440,7 +16924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2607;
+ return 2651;
}
}
else
@@ -16470,7 +16954,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2530;
+ return 2546;
}
}
}
@@ -16484,7 +16968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2609;
+ return 2653;
}
else
{
@@ -16492,7 +16976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2608;
+ return 2652;
}
}
else
@@ -16522,7 +17006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2532;
+ return 2548;
}
}
}
@@ -16539,7 +17023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2613;
+ return 2657;
}
else
{
@@ -16547,7 +17031,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2610;
+ return 2654;
}
}
else
@@ -16577,7 +17061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2531;
+ return 2547;
}
}
}
@@ -16591,7 +17075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2611;
+ return 2655;
}
else
{
@@ -16599,7 +17083,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2612;
+ return 2656;
}
}
else
@@ -17725,7 +18209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2699;
+ return 2743;
}
}
else
@@ -19086,7 +19570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2835;
+ return 2879;
}
else
{
@@ -19666,7 +20150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2763;
+ return 2807;
}
else
{
@@ -19674,7 +20158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2765;
+ return 2809;
}
}
else
@@ -19685,7 +20169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2769;
+ return 2813;
}
else
{
@@ -19693,7 +20177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2771;
+ return 2815;
}
}
}
@@ -19707,7 +20191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2766;
+ return 2810;
}
else
{
@@ -19715,7 +20199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2768;
+ return 2812;
}
}
else
@@ -19726,7 +20210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2772;
+ return 2816;
}
else
{
@@ -19734,7 +20218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2774;
+ return 2818;
}
}
}
@@ -19751,7 +20235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2787;
+ return 2831;
}
else
{
@@ -19759,7 +20243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2789;
+ return 2833;
}
}
else
@@ -19770,7 +20254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2793;
+ return 2837;
}
else
{
@@ -19778,7 +20262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2795;
+ return 2839;
}
}
}
@@ -19792,7 +20276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2790;
+ return 2834;
}
else
{
@@ -19800,7 +20284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2792;
+ return 2836;
}
}
else
@@ -19811,7 +20295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2796;
+ return 2840;
}
else
{
@@ -19819,7 +20303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2798;
+ return 2842;
}
}
}
@@ -19839,7 +20323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2775;
+ return 2819;
}
else
{
@@ -19847,7 +20331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2777;
+ return 2821;
}
}
else
@@ -19858,7 +20342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2781;
+ return 2825;
}
else
{
@@ -19866,7 +20350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2783;
+ return 2827;
}
}
}
@@ -19880,7 +20364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2778;
+ return 2822;
}
else
{
@@ -19888,7 +20372,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2780;
+ return 2824;
}
}
else
@@ -19899,7 +20383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2784;
+ return 2828;
}
else
{
@@ -19907,7 +20391,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2786;
+ return 2830;
}
}
}
@@ -19924,7 +20408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2799;
+ return 2843;
}
else
{
@@ -19932,7 +20416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2801;
+ return 2845;
}
}
else
@@ -19943,7 +20427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2805;
+ return 2849;
}
else
{
@@ -19951,7 +20435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2807;
+ return 2851;
}
}
}
@@ -19965,7 +20449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2802;
+ return 2846;
}
else
{
@@ -19973,7 +20457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2804;
+ return 2848;
}
}
else
@@ -19984,7 +20468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2808;
+ return 2852;
}
else
{
@@ -19992,7 +20476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2810;
+ return 2854;
}
}
}
@@ -20026,7 +20510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2764;
+ return 2808;
}
else
{
@@ -20034,7 +20518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2823;
+ return 2867;
}
}
else
@@ -20045,7 +20529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2770;
+ return 2814;
}
else
{
@@ -20053,7 +20537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2825;
+ return 2869;
}
}
}
@@ -20067,7 +20551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2767;
+ return 2811;
}
else
{
@@ -20075,7 +20559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2824;
+ return 2868;
}
}
else
@@ -20084,7 +20568,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2773;
+ return 2817;
}
}
}
@@ -20100,7 +20584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2788;
+ return 2832;
}
else
{
@@ -20108,7 +20592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2829;
+ return 2873;
}
}
else
@@ -20119,7 +20603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2794;
+ return 2838;
}
else
{
@@ -20127,7 +20611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2831;
+ return 2875;
}
}
}
@@ -20141,7 +20625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2791;
+ return 2835;
}
else
{
@@ -20149,7 +20633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2830;
+ return 2874;
}
}
else
@@ -20158,7 +20642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2797;
+ return 2841;
}
}
}
@@ -20177,7 +20661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2776;
+ return 2820;
}
else
{
@@ -20185,7 +20669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2826;
+ return 2870;
}
}
else
@@ -20196,7 +20680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2782;
+ return 2826;
}
else
{
@@ -20204,7 +20688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2828;
+ return 2872;
}
}
}
@@ -20218,7 +20702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2779;
+ return 2823;
}
else
{
@@ -20226,7 +20710,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2827;
+ return 2871;
}
}
else
@@ -20235,7 +20719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2785;
+ return 2829;
}
}
}
@@ -20251,7 +20735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2800;
+ return 2844;
}
else
{
@@ -20259,7 +20743,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2832;
+ return 2876;
}
}
else
@@ -20270,7 +20754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2806;
+ return 2850;
}
else
{
@@ -20278,7 +20762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2834;
+ return 2878;
}
}
}
@@ -20292,7 +20776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2803;
+ return 2847;
}
else
{
@@ -20300,7 +20784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2833;
+ return 2877;
}
}
else
@@ -20309,7 +20793,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2809;
+ return 2853;
}
}
}
@@ -20476,7 +20960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2690;
+ return 2734;
}
}
}
@@ -20509,7 +20993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2616;
+ return 2660;
}
}
else
@@ -20583,7 +21067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2692;
+ return 2736;
}
}
}
@@ -20616,7 +21100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2693;
+ return 2737;
}
}
else
@@ -20663,7 +21147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2623;
+ return 2667;
}
else
{
@@ -20671,7 +21155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2625;
+ return 2669;
}
}
else
@@ -20682,7 +21166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2627;
+ return 2671;
}
else
{
@@ -20696,7 +21180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2628;
+ return 2672;
}
else
{
@@ -20704,7 +21188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2621;
+ return 2665;
}
}
else
@@ -20713,7 +21197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2630;
+ return 2674;
}
}
else
@@ -20726,7 +21210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2629;
+ return 2673;
}
else
{
@@ -20734,7 +21218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2634;
+ return 2678;
}
}
else
@@ -20743,7 +21227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2631;
+ return 2675;
}
}
}
@@ -20924,7 +21408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2615;
+ return 2659;
}
}
else
@@ -20955,7 +21439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2691;
+ return 2735;
}
else
{
@@ -20974,7 +21458,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2707;
+ return 2751;
}
else
{
@@ -20984,7 +21468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2705;
+ return 2749;
}
else
{
@@ -20994,7 +21478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2712;
+ return 2756;
}
else
{
@@ -21002,7 +21486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2711;
+ return 2755;
}
}
}
@@ -21586,7 +22070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2708;
+ return 2752;
}
else
{
@@ -21594,7 +22078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2709;
+ return 2753;
}
}
}
@@ -21912,7 +22396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2626;
+ return 2670;
}
}
else
@@ -22523,7 +23007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2619;
+ return 2663;
}
}
}
@@ -22575,7 +23059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2632;
+ return 2676;
}
}
}
@@ -22818,7 +23302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2622;
+ return 2666;
}
}
else
@@ -22894,7 +23378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2635;
+ return 2679;
}
}
else
@@ -23720,7 +24204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2620;
+ return 2664;
}
}
else
@@ -23752,7 +24236,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2633;
+ return 2677;
}
}
else
@@ -23992,7 +24476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2624;
+ return 2668;
}
}
else
@@ -24024,7 +24508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2638;
+ return 2682;
}
else
{
@@ -24032,7 +24516,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2642;
+ return 2686;
}
}
}
@@ -24054,7 +24538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2639;
+ return 2683;
}
else
{
@@ -24062,7 +24546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2643;
+ return 2687;
}
}
}
@@ -24101,7 +24585,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2636;
+ return 2680;
}
else
{
@@ -24109,7 +24593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2640;
+ return 2684;
}
}
else
@@ -24131,7 +24615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2637;
+ return 2681;
}
else
{
@@ -24139,7 +24623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2641;
+ return 2685;
}
}
else
@@ -25947,7 +26431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2644;
+ return 2688;
}
else
{
@@ -25955,7 +26439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2648;
+ return 2692;
}
}
else
@@ -25977,7 +26461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2645;
+ return 2689;
}
else
{
@@ -25985,7 +26469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2649;
+ return 2693;
}
}
else
@@ -26491,7 +26975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2646;
+ return 2690;
}
else
{
@@ -26499,7 +26983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2650;
+ return 2694;
}
}
}
@@ -26521,7 +27005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2647;
+ return 2691;
}
else
{
@@ -26529,7 +27013,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2651;
+ return 2695;
}
}
}
@@ -26585,7 +27069,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2618;
+ return 2662;
}
else
{
@@ -26593,7 +27077,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2617;
+ return 2661;
}
}
}
@@ -26696,7 +27180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2695;
+ return 2739;
}
else
{
@@ -26704,7 +27188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2694;
+ return 2738;
}
}
else
@@ -26715,7 +27199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2706;
+ return 2750;
}
else
{
@@ -26725,7 +27209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2714;
+ return 2758;
}
else
{
@@ -26733,7 +27217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2713;
+ return 2757;
}
}
}
@@ -27224,22 +27708,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2518: value = 2526; break; /* mov --> mova. */
- case 2526: return NULL; /* mova --> NULL. */
- case 2514: value = 2522; break; /* mov --> mova. */
- case 2522: return NULL; /* mova --> NULL. */
- case 2516: value = 2524; break; /* mov --> mova. */
- case 2524: return NULL; /* mova --> NULL. */
- case 2512: value = 2520; break; /* mov --> mova. */
- case 2520: return NULL; /* mova --> NULL. */
- case 2519: value = 2527; break; /* mov --> mova. */
- case 2527: return NULL; /* mova --> NULL. */
- case 2515: value = 2523; break; /* mov --> mova. */
- case 2523: return NULL; /* mova --> NULL. */
- case 2517: value = 2525; break; /* mov --> mova. */
- case 2525: return NULL; /* mova --> NULL. */
- case 2513: value = 2521; break; /* mov --> mova. */
- case 2521: return NULL; /* mova --> NULL. */
+ case 2534: value = 2542; break; /* mov --> mova. */
+ case 2542: return NULL; /* mova --> NULL. */
+ case 2530: value = 2538; break; /* mov --> mova. */
+ case 2538: return NULL; /* mova --> NULL. */
+ case 2532: value = 2540; break; /* mov --> mova. */
+ case 2540: return NULL; /* mova --> NULL. */
+ case 2528: value = 2536; break; /* mov --> mova. */
+ case 2536: return NULL; /* mova --> NULL. */
+ case 2535: value = 2543; break; /* mov --> mova. */
+ case 2543: return NULL; /* mova --> NULL. */
+ case 2531: value = 2539; break; /* mov --> mova. */
+ case 2539: return NULL; /* mova --> NULL. */
+ case 2533: value = 2541; break; /* mov --> mova. */
+ case 2541: return NULL; /* mova --> NULL. */
+ case 2529: value = 2537; break; /* mov --> mova. */
+ case 2537: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -27261,11 +27745,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2836; break; /* addg --> smax. */
- case 2836: value = 2837; break; /* smax --> umax. */
- case 2837: value = 2838; break; /* umax --> smin. */
- case 2838: value = 2839; break; /* smin --> umin. */
- case 2839: return NULL; /* umin --> NULL. */
+ case 19: value = 2880; break; /* addg --> smax. */
+ case 2880: value = 2881; break; /* smax --> umax. */
+ case 2881: value = 2882; break; /* umax --> smin. */
+ case 2882: value = 2883; break; /* smin --> umin. */
+ case 2883: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -27423,8 +27907,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2710; break; /* fcvt --> bfcvt. */
- case 2710: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2754; break; /* fcvt --> bfcvt. */
+ case 2754: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 1148f2e952a..bfeab066f0a 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -3091,6 +3091,13 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
variant = extract_field (FLD_SME_size_22, inst->value, 0);
break;
+ case sme_size_22_hsd:
+ variant = extract_field (FLD_SME_size_22, inst->value, 0);
+ if (variant < 1)
+ return false;
+ variant -= 1;
+ break;
+
case sve_cpy:
variant = extract_fields (inst->value, 0, 2, FLD_size, FLD_SVE_M_14);
break;
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index b97e375c1f0..9bcec954d53 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5336,6 +5336,22 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fmax", 0xc120a100, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmax", 0xc120a900, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmax", 0xc120b100, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmax", 0xc120b900, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmaxnm", 0xc120a120, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmaxnm", 0xc120a920, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmaxnm", 0xc120b120, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmaxnm", 0xc120b920, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmin", 0xc120a101, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmin", 0xc120a901, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmin", 0xc120b101, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmin", 0xc120b901, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fminnm", 0xc120a121, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fminnm", 0xc120a921, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fminnm", 0xc120b121, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fminnm", 0xc120b921, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1),
SME2_INSN ("fsub", 0xc1a01c08, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fsub", 0xc1a11c08, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
@@ -5432,6 +5448,22 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("ptrue", 0x25207810, 0xff3ffff8, sme_size_22, 0, OP1 (SME_PNd3), OP_SVE_V_BHSD, 0, 0),
SME2_INSN ("sel", 0xc1208000, 0xff21e021, sme_size_22, 0, OP4 (SME_Zdnx2, SME_PNg3, SME_Znx2, SME_Zmx2), OP_SVE_VUVV_BHSD, 0, 0),
SME2_INSN ("sel", 0xc1218000, 0xff23e063, sme_size_22, 0, OP4 (SME_Zdnx4, SME_PNg3, SME_Znx4, SME_Zmx4), OP_SVE_VUVV_BHSD, 0, 0),
+ SME2_INSN ("smax", 0xc120a000, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smax", 0xc120a800, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smax", 0xc120b000, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smax", 0xc120b800, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smin", 0xc120a020, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smin", 0xc120a820, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smin", 0xc120b020, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smin", 0xc120b820, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("sqdmulh", 0xc120a400, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("sqdmulh", 0xc120bc00, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("srshl", 0xc120a220, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("srshl", 0xc120aa20, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("srshl", 0xc120b220, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("srshl", 0xc120ba20, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("st1b", 0xa0600000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0),
SME2_INSN ("st1b", 0xa0608000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BUU, 0, 0),
SME2_INSN ("st1b", 0xa1600000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BUU, 0, 0),
@@ -5503,6 +5535,18 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("sub", 0xc1301818, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("sub", 0xc1a01818, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("sub", 0xc1a11818, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("umax", 0xc120a001, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umax", 0xc120a801, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umax", 0xc120b001, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umax", 0xc120b801, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umin", 0xc120a021, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umin", 0xc120a821, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umin", 0xc120b021, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umin", 0xc120b821, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("urshl", 0xc120ba21, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 13/31] aarch64: Add the SME2 FMLA and FMLS instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (11 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 12/31] aarch64: Add the SME2 maximum/minimum instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 14/31] aarch64: Add the SME2 MLAL and MLSL instructions Richard Sandiford
` (19 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
---
gas/config/tc-aarch64.c | 2 +
gas/testsuite/gas/aarch64/sme2-11-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-11-invalid.l | 101 ++
gas/testsuite/gas/aarch64/sme2-11-invalid.s | 91 ++
gas/testsuite/gas/aarch64/sme2-11-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-11-noarch.l | 117 ++
gas/testsuite/gas/aarch64/sme2-11.d | 125 ++
gas/testsuite/gas/aarch64/sme2-11.s | 127 ++
.../gas/aarch64/sme2-f64f64-2-invalid.d | 3 +
.../gas/aarch64/sme2-f64f64-2-invalid.l | 98 ++
.../gas/aarch64/sme2-f64f64-2-invalid.s | 87 ++
.../gas/aarch64/sme2-f64f64-2-noarch.d | 3 +
.../gas/aarch64/sme2-f64f64-2-noarch.l | 117 ++
gas/testsuite/gas/aarch64/sme2-f64f64-2.d | 125 ++
gas/testsuite/gas/aarch64/sme2-f64f64-2.s | 127 ++
include/opcode/aarch64.h | 2 +
opcodes/aarch64-asm-2.c | 18 +-
opcodes/aarch64-dis-2.c | 1220 ++++++++++-------
opcodes/aarch64-opc-2.c | 2 +
opcodes/aarch64-opc.c | 12 +
opcodes/aarch64-opc.h | 2 +
opcodes/aarch64-tbl.h | 28 +
22 files changed, 1884 insertions(+), 529 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-11-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-11-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-11-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-11-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-11-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-11.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-11.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 5e023152c17..47ad7048372 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6727,6 +6727,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_Zm4_11_INDEX:
case AARCH64_OPND_SVE_Zm4_INDEX:
case AARCH64_OPND_SVE_Zn_INDEX:
+ case AARCH64_OPND_SME_Zm_INDEX1:
+ case AARCH64_OPND_SME_Zm_INDEX2:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
diff --git a/gas/testsuite/gas/aarch64/sme2-11-invalid.d b/gas/testsuite/gas/aarch64/sme2-11-invalid.d
new file mode 100644
index 00000000000..1bc250965dd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-11-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-11-invalid.s
+#error_output: sme2-11-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-11-invalid.l b/gas/testsuite/gas/aarch64/sme2-11-invalid.l
new file mode 100644
index 00000000000..8044d265750
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-11-invalid.l
@@ -0,0 +1,101 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `fmla 0,{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmla za\.s\[w8,0\],0,z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},0'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z2\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[4\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z4\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z2\.s-z5\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z3\.s-z6\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[4\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w0,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.s\[w31,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,1<<63\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z31\.s'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.s\[w8,0:0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.s\[w8,0:-1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:100\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s,z1\.s,z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s,z1\.s,z5\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.s\[w8,0\],{z0-z1},z0\.s'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z2\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z15\.s-z16\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z31\.s,z0\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z4\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z2\.s-z5\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z3\.s-z6\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z15\.s-z18\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z29\.s,z30\.s,z31\.s,z0\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z4\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-11-invalid.s b/gas/testsuite/gas/aarch64/sme2-11-invalid.s
new file mode 100644
index 00000000000..70ab0c42e36
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-11-invalid.s
@@ -0,0 +1,91 @@
+ fmla 0, { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w8, 0], 0, z0.s[0]
+ fmla za.s[w8, 0], { z0.s - z1.s }, 0
+
+ fmla za.s[w7, 0], { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w12, 0], { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w8, -1], { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w8, 8], { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w8, 0, vgx4], { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w8, 0], { z0.s - z2.s }, z0.s[0]
+ fmla za.s[w8, 0], { z1.s - z2.s }, z0.s[0]
+ fmla za.s[w8, 0], { z0.s - z1.s }, z16.s[0]
+ fmla za.s[w8, 0], { z0.s - z1.s }, z0.s[-1]
+ fmla za.s[w8, 0], { z0.s - z1.s }, z0.s[4]
+
+ fmla za.s[w7, 0], { z0.s - z3.s }, z0.s[0]
+ fmla za.s[w12, 0], { z0.s - z3.s }, z0.s[0]
+ fmla za.s[w8, -1], { z0.s - z3.s }, z0.s[0]
+ fmla za.s[w8, 8], { z0.s - z3.s }, z0.s[0]
+ fmla za.s[w8, 0, vgx2], { z0.s - z3.s }, z0.s[0]
+ fmla za.s[w8, 0], { z0.s - z4.s }, z0.s[0]
+ fmla za.s[w8, 0], { z1.s - z4.s }, z0.s[0]
+ fmla za.s[w8, 0], { z2.s - z5.s }, z0.s[0]
+ fmla za.s[w8, 0], { z3.s - z6.s }, z0.s[0]
+ fmla za.s[w8, 0], { z0.s - z3.s }, z16.s[0]
+ fmla za.s[w8, 0], { z0.s - z3.s }, z0.s[-1]
+ fmla za.s[w8, 0], { z0.s - z3.s }, z0.s[4]
+
+ fmla za.s[w0, 0], { z0.s - z1.s }, z0.s
+ fmla za.s[w31, 0], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 1<<63], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0], { z0.s - z1.s }, z31.s
+ fmla za.s[w8, 0:0], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0:-1], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0:1], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0:100], { z0.s - z1.s }, z0.s
+
+ fmla za.s[w7, 0], { z0.s - z1.s }, z0.s
+ fmla za.s[w12, 0], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, -1], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 8], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0], { z0.s - z1.s }, z16.s
+
+ fmla za.s[w7, 0], { z0.s - z3.s }, z0.s
+ fmla za.s[w12, 0], { z0.s - z3.s }, z0.s
+ fmla za.s[w8, -1], { z0.s - z3.s }, z0.s
+ fmla za.s[w8, 8], { z0.s - z3.s }, z0.s
+ fmla za.s[w8, 0], { z0.s - z3.s }, z16.s
+
+ fmla za.s[w8, 0], { z0.s - z2.s }, z0.s
+ fmla za.s[w8, 0], { z0.s - z4.s }, z0.s
+ fmla za.s[w8, 0], { z0.s, z1.s, z2.s }, z0.s
+ fmla za.s[w8, 0], { z0.s, z1.s, z5.s }, z0.s
+
+ fmla za.s[w8, 0, vgx4], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0, vgx2], { z0.s - z3.s }, z0.s
+ fmla za[w8, 0], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0], { z0 - z1 }, z0.s
+ fmla za.s[w8, 0], { z0.s - z1.s }, z0
+ fmla za[w8, 0], { z0.s - z1.s }, z0
+
+ fmla za.s[w7, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ fmla za.s[w12, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ fmla za.s[w8, -1], { z0.s - z1.s }, { z0.s - z1.s }
+ fmla za.s[w8, 8], { z0.s - z1.s }, { z0.s - z1.s }
+ fmla za.s[w8, 0], { z1.s - z2.s }, { z0.s - z1.s }
+ fmla za.s[w8, 0], { z0.s - z1.s }, { z15.s - z16.s }
+ fmla za.s[w8, 0], { z0.s - z1.s }, { z31.s, z0.s }
+
+ fmla za.s[w7, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ fmla za.s[w12, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ fmla za.s[w8, -1], { z0.s - z3.s }, { z0.s - z3.s }
+ fmla za.s[w8, 8], { z0.s - z3.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0], { z1.s - z4.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0], { z2.s - z5.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0], { z3.s - z6.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0], { z0.s - z3.s }, { z15.s - z18.s }
+ fmla za.s[w8, 0], { z0.s - z3.s }, { z29.s, z30.s, z31.s, z0.s }
+
+ fmla za.s[w8, 0], { z0.s - z2.s }, { z0.s - z1.s }
+ fmla za.s[w8, 0], { z0.s - z3.s }, { z0.s - z1.s }
+ fmla za.s[w8, 0], { z0.s - z1.s }, { z0.s - z2.s }
+ fmla za.s[w8, 0], { z0.s - z1.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0], { z0.s - z1.s }, { z0.s - z4.s }
+
+ fmla za.s[w8, 0, vgx4], { z0.s - z1.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0, vgx4], { z0.s - z3.s }, { z0.s - z1.s }
+ fmla za.s[w8, 0, vgx2], { z0.s - z1.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0, vgx2], { z0.s - z3.s }, { z0.s - z1.s }
+ fmla za[w8, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ fmla za[w8, 0], { z0.s - z3.s }, { z0.s - z3.s }
diff --git a/gas/testsuite/gas/aarch64/sme2-11-noarch.d b/gas/testsuite/gas/aarch64/sme2-11-noarch.d
new file mode 100644
index 00000000000..7dcb6a04885
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-11-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-11.s
+#error_output: sme2-11-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-11-noarch.l b/gas/testsuite/gas/aarch64/sme2-11-noarch.l
new file mode 100644
index 00000000000..05c3139f3b7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-11-noarch.l
@@ -0,0 +1,117 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGx2\],{Z0\.S-Z1\.S},Z0\.S\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,6\],{z12\.s-z13\.s},z1\.s\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,4\],{z4\.s-z7\.s},z9\.s\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGx2\],{Z0\.S-Z1\.S},Z0\.S\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,6\],{z12\.s-z13\.s},z1\.s\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,4\],{z4\.s-z7\.s},z9\.s\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}'
diff --git a/gas/testsuite/gas/aarch64/sme2-11.d b/gas/testsuite/gas/aarch64/sme2-11.d
new file mode 100644
index 00000000000..7f077e3a614
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-11.d
@@ -0,0 +1,125 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1500000 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c1500000 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c1500000 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c1506000 fmla za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c1500007 fmla za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c15003c0 fmla za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, z0\.s\[0\]
+[^:]+: c15f0000 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z15\.s\[0\]
+[^:]+: c1500c00 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[3\]
+[^:]+: c1512986 fmla za\.s\[w9, 6, vgx2\], {z12\.s-z13\.s}, z1\.s\[2\]
+[^:]+: c1508000 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c1508000 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c1508000 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c150e000 fmla za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c1508007 fmla za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c1508380 fmla za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, z0\.s\[0\]
+[^:]+: c15f8000 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z15\.s\[0\]
+[^:]+: c1508c00 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[3\]
+[^:]+: c159c484 fmla za\.s\[w10, 4, vgx4\], {z4\.s-z7\.s}, z9\.s\[1\]
+[^:]+: c1201800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1207800 fmla za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201807 fmla za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201bc0 fmla za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, z0\.s
+[^:]+: c1201be0 fmla za\.s\[w8, 0, vgx2\], {z31\.s-z0\.s}, z0\.s
+[^:]+: c1201be0 fmla za\.s\[w8, 0, vgx2\], {z31\.s-z0\.s}, z0\.s
+[^:]+: c12f1800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z15\.s
+[^:]+: c1263925 fmla za\.s\[w9, 5, vgx2\], {z9\.s-z10\.s}, z6\.s
+[^:]+: c1301800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1307800 fmla za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301807 fmla za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301b80 fmla za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, z0\.s
+[^:]+: c1301be0 fmla za\.s\[w8, 0, vgx4\], {z31\.s-z2\.s}, z0\.s
+[^:]+: c1301be0 fmla za\.s\[w8, 0, vgx4\], {z31\.s-z2\.s}, z0\.s
+[^:]+: c13f1800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z15\.s
+[^:]+: c13d7ae2 fmla za\.s\[w11, 2, vgx4\], {z23\.s-z26\.s}, z13\.s
+[^:]+: c1a01800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a07800 fmla za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01807 fmla za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01bc0 fmla za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1be1800 fmla za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1b25ac1 fmla za\.s\[w10, 1, vgx2\], {z22\.s-z23\.s}, {z18\.s-z19\.s}
+[^:]+: c1a11800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a17800 fmla za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11807 fmla za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11b80 fmla za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bd1800 fmla za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b97a03 fmla za\.s\[w11, 3, vgx4\], {z16\.s-z19\.s}, {z24\.s-z27\.s}
+[^:]+: c1500010 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c1500010 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c1500010 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c1506010 fmls za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c1500017 fmls za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, z0\.s\[0\]
+[^:]+: c15003d0 fmls za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, z0\.s\[0\]
+[^:]+: c15f0010 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z15\.s\[0\]
+[^:]+: c1500c10 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s\[3\]
+[^:]+: c1512996 fmls za\.s\[w9, 6, vgx2\], {z12\.s-z13\.s}, z1\.s\[2\]
+[^:]+: c1508010 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c1508010 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c1508010 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c150e010 fmls za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c1508017 fmls za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, z0\.s\[0\]
+[^:]+: c1508390 fmls za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, z0\.s\[0\]
+[^:]+: c15f8010 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z15\.s\[0\]
+[^:]+: c1508c10 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s\[3\]
+[^:]+: c159c494 fmls za\.s\[w10, 4, vgx4\], {z4\.s-z7\.s}, z9\.s\[1\]
+[^:]+: c1201808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1207808 fmls za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c120180f fmls za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, z0\.s
+[^:]+: c1201bc8 fmls za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, z0\.s
+[^:]+: c1201be8 fmls za\.s\[w8, 0, vgx2\], {z31\.s-z0\.s}, z0\.s
+[^:]+: c1201be8 fmls za\.s\[w8, 0, vgx2\], {z31\.s-z0\.s}, z0\.s
+[^:]+: c12f1808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, z15\.s
+[^:]+: c126392d fmls za\.s\[w9, 5, vgx2\], {z9\.s-z10\.s}, z6\.s
+[^:]+: c1301808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1307808 fmls za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c130180f fmls za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, z0\.s
+[^:]+: c1301b88 fmls za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, z0\.s
+[^:]+: c1301be8 fmls za\.s\[w8, 0, vgx4\], {z31\.s-z2\.s}, z0\.s
+[^:]+: c1301be8 fmls za\.s\[w8, 0, vgx4\], {z31\.s-z2\.s}, z0\.s
+[^:]+: c13f1808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, z15\.s
+[^:]+: c13d7aea fmls za\.s\[w11, 2, vgx4\], {z23\.s-z26\.s}, z13\.s
+[^:]+: c1a01808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a07808 fmls za\.s\[w11, 0, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a0180f fmls za\.s\[w8, 7, vgx2\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a01bc8 fmls za\.s\[w8, 0, vgx2\], {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1be1808 fmls za\.s\[w8, 0, vgx2\], {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1b25ac9 fmls za\.s\[w10, 1, vgx2\], {z22\.s-z23\.s}, {z18\.s-z19\.s}
+[^:]+: c1a11808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a17808 fmls za\.s\[w11, 0, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a1180f fmls za\.s\[w8, 7, vgx4\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a11b88 fmls za\.s\[w8, 0, vgx4\], {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bd1808 fmls za\.s\[w8, 0, vgx4\], {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b97a0b fmls za\.s\[w11, 3, vgx4\], {z16\.s-z19\.s}, {z24\.s-z27\.s}
diff --git a/gas/testsuite/gas/aarch64/sme2-11.s b/gas/testsuite/gas/aarch64/sme2-11.s
new file mode 100644
index 00000000000..fbefe0dca5f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-11.s
@@ -0,0 +1,127 @@
+ fmla za.s[w8, 0], { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w8, 0, vgx2], { z0.s - z1.s }, z0.s[0]
+ FMLA ZA.S[W8, 0, VGx2], { Z0.S - Z1.S }, Z0.S[0]
+ fmla za.s[w11, 0], { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w8, 7], { z0.s - z1.s }, z0.s[0]
+ fmla za.s[w8, 0], { z30.s - z31.s }, z0.s[0]
+ fmla za.s[w8, 0], { z0.s - z1.s }, z15.s[0]
+ fmla za.s[w8, 0], { z0.s - z1.s }, z0.s[3]
+ fmla za.s[w9, 6], { z12.s - z13.s }, z1.s[2]
+
+ fmla za.s[w8, 0], { z0.s - z3.s }, z0.s[0]
+ fmla za.s[w8, 0, vgx4], { z0.s - z3.s }, z0.s[0]
+ FMLA ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, Z0.S[0]
+ fmla za.s[w11, 0], { z0.s - z3.s }, z0.s[0]
+ fmla za.s[w8, 7], { z0.s - z3.s }, z0.s[0]
+ fmla za.s[w8, 0], { z28.s - z31.s }, z0.s[0]
+ fmla za.s[w8, 0], { z0.s - z3.s }, z15.s[0]
+ fmla za.s[w8, 0], { z0.s - z3.s }, z0.s[3]
+ fmla za.s[w10, 4], { z4.s - z7.s }, z9.s[1]
+
+ fmla za.s[w8, 0], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0, vgx2], { z0.s - z1.s }, z0.s
+ FMLA ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }, Z0.s
+ FMLA ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }, Z0.S
+ fmla za.s[w11, 0], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 7], { z0.s - z1.s }, z0.s
+ fmla za.s[w8, 0], { z30.s - z31.s }, z0.s
+ fmla za.s[w8, 0], { z31.s, z0.s }, z0.s
+ fmla za.s[w8, 0], { z31.s - z0.s }, z0.s
+ fmla za.s[w8, 0], { z0.s - z1.s }, z15.s
+ fmla za.s[w9, 5], { z9.s - z10.s }, z6.s
+
+ fmla za.s[w8, 0], { z0.s - z3.s }, z0.s
+ fmla za.s[w8, 0, vgx4], { z0.s - z3.s }, z0.s
+ FMLA ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }, Z0.s
+ FMLA ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, Z0.S
+ fmla za.s[w11, 0], { z0.s - z3.s }, z0.s
+ fmla za.s[w8, 7], { z0.s - z3.s }, z0.s
+ fmla za.s[w8, 0], { z28.s - z31.s }, z0.s
+ fmla za.s[w8, 0], { z31.s, z0.s, z1.s, z2.s }, z0.s
+ fmla za.s[w8, 0], { z31.s - z2.s }, z0.s
+ fmla za.s[w8, 0], { z0.s - z3.s }, z15.s
+ fmla za.s[w11, 2], { z23.s - z26.s }, z13.s
+
+ fmla za.s[w8, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ fmla za.s[w8, 0, vgx2], { z0.s - z1.s }, { z0.s - z1.s }
+ FMLA ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }, { Z0.s - Z1.s }
+ FMLA ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }, { Z0.S - Z1.S }
+ fmla za.s[w11, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ fmla za.s[w8, 7], { z0.s - z1.s }, { z0.s - z1.s }
+ fmla za.s[w8, 0], { z30.s - z31.s }, { z0.s - z1.s }
+ fmla za.s[w8, 0], { z0.s - z1.s }, { z30.s - z31.s }
+ fmla za.s[w10, 1], { z22.s - z23.s }, { z18.s - z19.s }
+
+ fmla za.s[w8, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0, vgx4], { z0.s - z3.s }, { z0.s - z3.s }
+ FMLA ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }, { Z0.s - Z3.s }
+ FMLA ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, { Z0.S - Z3.S }
+ fmla za.s[w11, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ fmla za.s[w8, 7], { z0.s - z3.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0], { z28.s - z31.s }, { z0.s - z3.s }
+ fmla za.s[w8, 0], { z0.s - z3.s }, { z28.s - z31.s }
+ fmla za.s[w11, 3], { z16.s - z19.s }, { z24.s - z27.s }
+
+ fmls za.s[w8, 0], { z0.s - z1.s }, z0.s[0]
+ fmls za.s[w8, 0, vgx2], { z0.s - z1.s }, z0.s[0]
+ FMLS ZA.S[W8, 0, VGx2], { Z0.S - Z1.S }, Z0.S[0]
+ fmls za.s[w11, 0], { z0.s - z1.s }, z0.s[0]
+ fmls za.s[w8, 7], { z0.s - z1.s }, z0.s[0]
+ fmls za.s[w8, 0], { z30.s - z31.s }, z0.s[0]
+ fmls za.s[w8, 0], { z0.s - z1.s }, z15.s[0]
+ fmls za.s[w8, 0], { z0.s - z1.s }, z0.s[3]
+ fmls za.s[w9, 6], { z12.s - z13.s }, z1.s[2]
+
+ fmls za.s[w8, 0], { z0.s - z3.s }, z0.s[0]
+ fmls za.s[w8, 0, vgx4], { z0.s - z3.s }, z0.s[0]
+ FMLS ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, Z0.S[0]
+ fmls za.s[w11, 0], { z0.s - z3.s }, z0.s[0]
+ fmls za.s[w8, 7], { z0.s - z3.s }, z0.s[0]
+ fmls za.s[w8, 0], { z28.s - z31.s }, z0.s[0]
+ fmls za.s[w8, 0], { z0.s - z3.s }, z15.s[0]
+ fmls za.s[w8, 0], { z0.s - z3.s }, z0.s[3]
+ fmls za.s[w10, 4], { z4.s - z7.s }, z9.s[1]
+
+ fmls za.s[w8, 0], { z0.s - z1.s }, z0.s
+ fmls za.s[w8, 0, vgx2], { z0.s - z1.s }, z0.s
+ FMLS ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }, Z0.s
+ FMLS ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }, Z0.S
+ fmls za.s[w11, 0], { z0.s - z1.s }, z0.s
+ fmls za.s[w8, 7], { z0.s - z1.s }, z0.s
+ fmls za.s[w8, 0], { z30.s - z31.s }, z0.s
+ fmls za.s[w8, 0], { z31.s, z0.s }, z0.s
+ fmls za.s[w8, 0], { z31.s - z0.s }, z0.s
+ fmls za.s[w8, 0], { z0.s - z1.s }, z15.s
+ fmls za.s[w9, 5], { z9.s - z10.s }, z6.s
+
+ fmls za.s[w8, 0], { z0.s - z3.s }, z0.s
+ fmls za.s[w8, 0, vgx4], { z0.s - z3.s }, z0.s
+ FMLS ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }, Z0.s
+ FMLS ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, Z0.S
+ fmls za.s[w11, 0], { z0.s - z3.s }, z0.s
+ fmls za.s[w8, 7], { z0.s - z3.s }, z0.s
+ fmls za.s[w8, 0], { z28.s - z31.s }, z0.s
+ fmls za.s[w8, 0], { z31.s, z0.s, z1.s, z2.s }, z0.s
+ fmls za.s[w8, 0], { z31.s - z2.s }, z0.s
+ fmls za.s[w8, 0], { z0.s - z3.s }, z15.s
+ fmls za.s[w11, 2], { z23.s - z26.s }, z13.s
+
+ fmls za.s[w8, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ fmls za.s[w8, 0, vgx2], { z0.s - z1.s }, { z0.s - z1.s }
+ FMLS ZA.s[W8, 0, VGx2], { Z0.s - Z1.s }, { Z0.s - Z1.s }
+ FMLS ZA.S[W8, 0, VGX2], { Z0.S - Z1.S }, { Z0.S - Z1.S }
+ fmls za.s[w11, 0], { z0.s - z1.s }, { z0.s - z1.s }
+ fmls za.s[w8, 7], { z0.s - z1.s }, { z0.s - z1.s }
+ fmls za.s[w8, 0], { z30.s - z31.s }, { z0.s - z1.s }
+ fmls za.s[w8, 0], { z0.s - z1.s }, { z30.s - z31.s }
+ fmls za.s[w10, 1], { z22.s - z23.s }, { z18.s - z19.s }
+
+ fmls za.s[w8, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ fmls za.s[w8, 0, vgx4], { z0.s - z3.s }, { z0.s - z3.s }
+ FMLS ZA.s[W8, 0, VGx4], { Z0.s - Z3.s }, { Z0.s - Z3.s }
+ FMLS ZA.S[W8, 0, VGX4], { Z0.S - Z3.S }, { Z0.S - Z3.S }
+ fmls za.s[w11, 0], { z0.s - z3.s }, { z0.s - z3.s }
+ fmls za.s[w8, 7], { z0.s - z3.s }, { z0.s - z3.s }
+ fmls za.s[w8, 0], { z28.s - z31.s }, { z0.s - z3.s }
+ fmls za.s[w8, 0], { z0.s - z3.s }, { z28.s - z31.s }
+ fmls za.s[w11, 3], { z16.s - z19.s }, { z24.s - z27.s }
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.d b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.d
new file mode 100644
index 00000000000..e2e4a7a7607
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-f64f64-2-invalid.s
+#error_output: sme2-f64f64-2-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l
new file mode 100644
index 00000000000..97b0db12d6c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l
@@ -0,0 +1,98 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z2\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[2\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z4\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z2\.d-z5\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z3\.d-z6\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[2\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w0,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.d\[w31,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,1<<63\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z31\.d'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.d\[w8,0:0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.d\[w8,0:-1\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:1\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:100\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d,z1\.d,z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d,z1\.d,z5\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.d\[w8,0\],{z0-z1},z0\.d'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z2\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z15\.d-z16\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z31\.d,z0\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z4\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z2\.d-z5\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z3\.d-z6\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z15\.d-z18\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z29\.d,z30\.d,z31\.d,z0\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z4\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z3\.s}, {z0\.s-z3\.s}
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.s b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.s
new file mode 100644
index 00000000000..9839bfe8011
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.s
@@ -0,0 +1,87 @@
+ fmla za.d[w7, 0], { z0.d - z1.d }, z0.d[0]
+ fmla za.d[w12, 0], { z0.d - z1.d }, z0.d[0]
+ fmla za.d[w8, -1], { z0.d - z1.d }, z0.d[0]
+ fmla za.d[w8, 8], { z0.d - z1.d }, z0.d[0]
+ fmla za.d[w8, 0, vgx4], { z0.d - z1.d }, z0.d[0]
+ fmla za.d[w8, 0], { z0.d - z2.d }, z0.d[0]
+ fmla za.d[w8, 0], { z1.d - z2.d }, z0.d[0]
+ fmla za.d[w8, 0], { z0.d - z1.d }, z16.d[0]
+ fmla za.d[w8, 0], { z0.d - z1.d }, z0.d[-1]
+ fmla za.d[w8, 0], { z0.d - z1.d }, z0.d[2]
+
+ fmla za.d[w7, 0], { z0.d - z3.d }, z0.d[0]
+ fmla za.d[w12, 0], { z0.d - z3.d }, z0.d[0]
+ fmla za.d[w8, -1], { z0.d - z3.d }, z0.d[0]
+ fmla za.d[w8, 8], { z0.d - z3.d }, z0.d[0]
+ fmla za.d[w8, 0, vgx2], { z0.d - z3.d }, z0.d[0]
+ fmla za.d[w8, 0], { z0.d - z4.d }, z0.d[0]
+ fmla za.d[w8, 0], { z1.d - z4.d }, z0.d[0]
+ fmla za.d[w8, 0], { z2.d - z5.d }, z0.d[0]
+ fmla za.d[w8, 0], { z3.d - z6.d }, z0.d[0]
+ fmla za.d[w8, 0], { z0.d - z3.d }, z16.d[0]
+ fmla za.d[w8, 0], { z0.d - z3.d }, z0.d[-1]
+ fmla za.d[w8, 0], { z0.d - z3.d }, z0.d[2]
+
+ fmla za.d[w0, 0], { z0.d - z1.d }, z0.d
+ fmla za.d[w31, 0], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 1<<63], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0], { z0.d - z1.d }, z31.d
+ fmla za.d[w8, 0:0], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0:-1], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0:1], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0:100], { z0.d - z1.d }, z0.d
+
+ fmla za.d[w7, 0], { z0.d - z1.d }, z0.d
+ fmla za.d[w12, 0], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, -1], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 8], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0], { z0.d - z1.d }, z16.d
+
+ fmla za.d[w7, 0], { z0.d - z3.d }, z0.d
+ fmla za.d[w12, 0], { z0.d - z3.d }, z0.d
+ fmla za.d[w8, -1], { z0.d - z3.d }, z0.d
+ fmla za.d[w8, 8], { z0.d - z3.d }, z0.d
+ fmla za.d[w8, 0], { z0.d - z3.d }, z16.d
+
+ fmla za.d[w8, 0], { z0.d - z2.d }, z0.d
+ fmla za.d[w8, 0], { z0.d - z4.d }, z0.d
+ fmla za.d[w8, 0], { z0.d, z1.d, z2.d }, z0.d
+ fmla za.d[w8, 0], { z0.d, z1.d, z5.d }, z0.d
+
+ fmla za.d[w8, 0, vgx4], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0, vgx2], { z0.d - z3.d }, z0.d
+ fmla za[w8, 0], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0], { z0 - z1 }, z0.d
+ fmla za.d[w8, 0], { z0.d - z1.d }, z0
+ fmla za[w8, 0], { z0.d - z1.d }, z0
+
+ fmla za.d[w7, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ fmla za.d[w12, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ fmla za.d[w8, -1], { z0.d - z1.d }, { z0.d - z1.d }
+ fmla za.d[w8, 8], { z0.d - z1.d }, { z0.d - z1.d }
+ fmla za.d[w8, 0], { z1.d - z2.d }, { z0.d - z1.d }
+ fmla za.d[w8, 0], { z0.d - z1.d }, { z15.d - z16.d }
+ fmla za.d[w8, 0], { z0.d - z1.d }, { z31.d, z0.d }
+
+ fmla za.d[w7, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ fmla za.d[w12, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ fmla za.d[w8, -1], { z0.d - z3.d }, { z0.d - z3.d }
+ fmla za.d[w8, 8], { z0.d - z3.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0], { z1.d - z4.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0], { z2.d - z5.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0], { z3.d - z6.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0], { z0.d - z3.d }, { z15.d - z18.d }
+ fmla za.d[w8, 0], { z0.d - z3.d }, { z29.d, z30.d, z31.d, z0.d }
+
+ fmla za.d[w8, 0], { z0.d - z2.d }, { z0.d - z1.d }
+ fmla za.d[w8, 0], { z0.d - z3.d }, { z0.d - z1.d }
+ fmla za.d[w8, 0], { z0.d - z1.d }, { z0.d - z2.d }
+ fmla za.d[w8, 0], { z0.d - z1.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0], { z0.d - z1.d }, { z0.d - z4.d }
+
+ fmla za.d[w8, 0, vgx4], { z0.d - z1.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0, vgx4], { z0.d - z3.d }, { z0.d - z1.d }
+ fmla za.d[w8, 0, vgx2], { z0.d - z1.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0, vgx2], { z0.d - z3.d }, { z0.d - z1.d }
+ fmla za[w8, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ fmla za[w8, 0], { z0.d - z3.d }, { z0.d - z3.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.d b/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.d
new file mode 100644
index 00000000000..23c66a9aaee
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sme2-f64f64-2.s
+#error_output: sme2-f64f64-2-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l
new file mode 100644
index 00000000000..5ab290d4080
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l
@@ -0,0 +1,117 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,2\],{z6\.d-z7\.d},z5\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,3\],{z8\.d-z11\.d},z14\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,2\],{z6\.d-z7\.d},z5\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,3\],{z8\.d-z11\.d},z14\.d\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2.d b/gas/testsuite/gas/aarch64/sme2-f64f64-2.d
new file mode 100644
index 00000000000..dbc8d65d2c9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2.d
@@ -0,0 +1,125 @@
+#as: -march=armv8-a+sme2+sme-f64f64
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1d00000 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d00000 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d00000 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d06000 fmla za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d00007 fmla za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d003c0 fmla za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}, z0\.d\[0\]
+[^:]+: c1df0000 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z15\.d\[0\]
+[^:]+: c1d00400 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[1\]
+[^:]+: c1d544c2 fmla za\.d\[w10, 2, vgx2\], {z6\.d-z7\.d}, z5\.d\[1\]
+[^:]+: c1d08000 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d08000 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d08000 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d0e000 fmla za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d08007 fmla za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d08380 fmla za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}, z0\.d\[0\]
+[^:]+: c1df8000 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z15\.d\[0\]
+[^:]+: c1d08400 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[1\]
+[^:]+: c1dea503 fmla za\.d\[w9, 3, vgx4\], {z8\.d-z11\.d}, z14\.d\[1\]
+[^:]+: c1601800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1607800 fmla za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601807 fmla za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601bc0 fmla za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}, z0\.d
+[^:]+: c1601be0 fmla za\.d\[w8, 0, vgx2\], {z31\.d-z0\.d}, z0\.d
+[^:]+: c1601be0 fmla za\.d\[w8, 0, vgx2\], {z31\.d-z0\.d}, z0\.d
+[^:]+: c16f1800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z15\.d
+[^:]+: c1663925 fmla za\.d\[w9, 5, vgx2\], {z9\.d-z10\.d}, z6\.d
+[^:]+: c1701800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1707800 fmla za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701807 fmla za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701b80 fmla za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}, z0\.d
+[^:]+: c1701be0 fmla za\.d\[w8, 0, vgx4\], {z31\.d-z2\.d}, z0\.d
+[^:]+: c1701be0 fmla za\.d\[w8, 0, vgx4\], {z31\.d-z2\.d}, z0\.d
+[^:]+: c17f1800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z15\.d
+[^:]+: c17d7ae2 fmla za\.d\[w11, 2, vgx4\], {z23\.d-z26\.d}, z13\.d
+[^:]+: c1e01800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e07800 fmla za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01807 fmla za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01bc0 fmla za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}, {z0\.d-z1\.d}
+[^:]+: c1fe1800 fmla za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z30\.d-z31\.d}
+[^:]+: c1f25ac1 fmla za\.d\[w10, 1, vgx2\], {z22\.d-z23\.d}, {z18\.d-z19\.d}
+[^:]+: c1e11800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e17800 fmla za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11807 fmla za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11b80 fmla za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1fd1800 fmla za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1f97a03 fmla za\.d\[w11, 3, vgx4\], {z16\.d-z19\.d}, {z24\.d-z27\.d}
+[^:]+: c1d00010 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d00010 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d00010 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d06010 fmls za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d00017 fmls za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}, z0\.d\[0\]
+[^:]+: c1d003d0 fmls za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}, z0\.d\[0\]
+[^:]+: c1df0010 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z15\.d\[0\]
+[^:]+: c1d00410 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d\[1\]
+[^:]+: c1d544d2 fmls za\.d\[w10, 2, vgx2\], {z6\.d-z7\.d}, z5\.d\[1\]
+[^:]+: c1d08010 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d08010 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d08010 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d0e010 fmls za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d08017 fmls za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}, z0\.d\[0\]
+[^:]+: c1d08390 fmls za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}, z0\.d\[0\]
+[^:]+: c1df8010 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z15\.d\[0\]
+[^:]+: c1d08410 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d\[1\]
+[^:]+: c1dea513 fmls za\.d\[w9, 3, vgx4\], {z8\.d-z11\.d}, z14\.d\[1\]
+[^:]+: c1601808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1607808 fmls za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c160180f fmls za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}, z0\.d
+[^:]+: c1601bc8 fmls za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}, z0\.d
+[^:]+: c1601be8 fmls za\.d\[w8, 0, vgx2\], {z31\.d-z0\.d}, z0\.d
+[^:]+: c1601be8 fmls za\.d\[w8, 0, vgx2\], {z31\.d-z0\.d}, z0\.d
+[^:]+: c16f1808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, z15\.d
+[^:]+: c166392d fmls za\.d\[w9, 5, vgx2\], {z9\.d-z10\.d}, z6\.d
+[^:]+: c1701808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1707808 fmls za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c170180f fmls za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}, z0\.d
+[^:]+: c1701b88 fmls za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}, z0\.d
+[^:]+: c1701be8 fmls za\.d\[w8, 0, vgx4\], {z31\.d-z2\.d}, z0\.d
+[^:]+: c1701be8 fmls za\.d\[w8, 0, vgx4\], {z31\.d-z2\.d}, z0\.d
+[^:]+: c17f1808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, z15\.d
+[^:]+: c17d7aea fmls za\.d\[w11, 2, vgx4\], {z23\.d-z26\.d}, z13\.d
+[^:]+: c1e01808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e07808 fmls za\.d\[w11, 0, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e0180f fmls za\.d\[w8, 7, vgx2\], {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e01bc8 fmls za\.d\[w8, 0, vgx2\], {z30\.d-z31\.d}, {z0\.d-z1\.d}
+[^:]+: c1fe1808 fmls za\.d\[w8, 0, vgx2\], {z0\.d-z1\.d}, {z30\.d-z31\.d}
+[^:]+: c1f25ac9 fmls za\.d\[w10, 1, vgx2\], {z22\.d-z23\.d}, {z18\.d-z19\.d}
+[^:]+: c1e11808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e17808 fmls za\.d\[w11, 0, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e1180f fmls za\.d\[w8, 7, vgx4\], {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e11b88 fmls za\.d\[w8, 0, vgx4\], {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1fd1808 fmls za\.d\[w8, 0, vgx4\], {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1f97a0b fmls za\.d\[w11, 3, vgx4\], {z16\.d-z19\.d}, {z24\.d-z27\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2.s b/gas/testsuite/gas/aarch64/sme2-f64f64-2.s
new file mode 100644
index 00000000000..005db427db7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2.s
@@ -0,0 +1,127 @@
+ fmla za.d[w8, 0], { z0.d - z1.d }, z0.d[0]
+ fmla za.d[w8, 0, vgx2], { z0.d - z1.d }, z0.d[0]
+ FMLA ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }, Z0.d[0]
+ fmla za.d[w11, 0], { z0.d - z1.d }, z0.d[0]
+ fmla za.d[w8, 7], { z0.d - z1.d }, z0.d[0]
+ fmla za.d[w8, 0], { z30.d - z31.d }, z0.d[0]
+ fmla za.d[w8, 0], { z0.d - z1.d }, z15.d[0]
+ fmla za.d[w8, 0], { z0.d - z1.d }, z0.d[1]
+ fmla za.d[w10, 2], { z6.d - z7.d }, z5.d[1]
+
+ fmla za.d[w8, 0], { z0.d - z3.d }, z0.d[0]
+ fmla za.d[w8, 0, vgx4], { z0.d - z3.d }, z0.d[0]
+ FMLA ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }, Z0.D[0]
+ fmla za.d[w11, 0], { z0.d - z3.d }, z0.d[0]
+ fmla za.d[w8, 7], { z0.d - z3.d }, z0.d[0]
+ fmla za.d[w8, 0], { z28.d - z31.d }, z0.d[0]
+ fmla za.d[w8, 0], { z0.d - z3.d }, z15.d[0]
+ fmla za.d[w8, 0], { z0.d - z3.d }, z0.d[1]
+ fmla za.d[w9, 3], { z8.d - z11.d }, z14.d[1]
+
+ fmla za.d[w8, 0], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0, vgx2], { z0.d - z1.d }, z0.d
+ FMLA ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }, Z0.d
+ FMLA ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }, Z0.D
+ fmla za.d[w11, 0], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 7], { z0.d - z1.d }, z0.d
+ fmla za.d[w8, 0], { z30.d - z31.d }, z0.d
+ fmla za.d[w8, 0], { z31.d, z0.d }, z0.d
+ fmla za.d[w8, 0], { z31.d - z0.d }, z0.d
+ fmla za.d[w8, 0], { z0.d - z1.d }, z15.d
+ fmla za.d[w9, 5], { z9.d - z10.d }, z6.d
+
+ fmla za.d[w8, 0], { z0.d - z3.d }, z0.d
+ fmla za.d[w8, 0, vgx4], { z0.d - z3.d }, z0.d
+ FMLA ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }, Z0.d
+ FMLA ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }, Z0.D
+ fmla za.d[w11, 0], { z0.d - z3.d }, z0.d
+ fmla za.d[w8, 7], { z0.d - z3.d }, z0.d
+ fmla za.d[w8, 0], { z28.d - z31.d }, z0.d
+ fmla za.d[w8, 0], { z31.d, z0.d, z1.d, z2.d }, z0.d
+ fmla za.d[w8, 0], { z31.d - z2.d }, z0.d
+ fmla za.d[w8, 0], { z0.d - z3.d }, z15.d
+ fmla za.d[w11, 2], { z23.d - z26.d }, z13.d
+
+ fmla za.d[w8, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ fmla za.d[w8, 0, vgx2], { z0.d - z1.d }, { z0.d - z1.d }
+ FMLA ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }, { Z0.d - Z1.d }
+ FMLA ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }, { Z0.D - Z1.D }
+ fmla za.d[w11, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ fmla za.d[w8, 7], { z0.d - z1.d }, { z0.d - z1.d }
+ fmla za.d[w8, 0], { z30.d - z31.d }, { z0.d - z1.d }
+ fmla za.d[w8, 0], { z0.d - z1.d }, { z30.d - z31.d }
+ fmla za.d[w10, 1], { z22.d - z23.d }, { z18.d - z19.d }
+
+ fmla za.d[w8, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0, vgx4], { z0.d - z3.d }, { z0.d - z3.d }
+ FMLA ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }, { Z0.d - Z3.d }
+ FMLA ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }, { Z0.D - Z3.D }
+ fmla za.d[w11, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ fmla za.d[w8, 7], { z0.d - z3.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0], { z28.d - z31.d }, { z0.d - z3.d }
+ fmla za.d[w8, 0], { z0.d - z3.d }, { z28.d - z31.d }
+ fmla za.d[w11, 3], { z16.d - z19.d }, { z24.d - z27.d }
+
+ fmls za.d[w8, 0], { z0.d - z1.d }, z0.d[0]
+ fmls za.d[w8, 0, vgx2], { z0.d - z1.d }, z0.d[0]
+ FMLS ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }, Z0.d[0]
+ fmls za.d[w11, 0], { z0.d - z1.d }, z0.d[0]
+ fmls za.d[w8, 7], { z0.d - z1.d }, z0.d[0]
+ fmls za.d[w8, 0], { z30.d - z31.d }, z0.d[0]
+ fmls za.d[w8, 0], { z0.d - z1.d }, z15.d[0]
+ fmls za.d[w8, 0], { z0.d - z1.d }, z0.d[1]
+ fmls za.d[w10, 2], { z6.d - z7.d }, z5.d[1]
+
+ fmls za.d[w8, 0], { z0.d - z3.d }, z0.d[0]
+ fmls za.d[w8, 0, vgx4], { z0.d - z3.d }, z0.d[0]
+ FMLS ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }, Z0.D[0]
+ fmls za.d[w11, 0], { z0.d - z3.d }, z0.d[0]
+ fmls za.d[w8, 7], { z0.d - z3.d }, z0.d[0]
+ fmls za.d[w8, 0], { z28.d - z31.d }, z0.d[0]
+ fmls za.d[w8, 0], { z0.d - z3.d }, z15.d[0]
+ fmls za.d[w8, 0], { z0.d - z3.d }, z0.d[1]
+ fmls za.d[w9, 3], { z8.d - z11.d }, z14.d[1]
+
+ fmls za.d[w8, 0], { z0.d - z1.d }, z0.d
+ fmls za.d[w8, 0, vgx2], { z0.d - z1.d }, z0.d
+ FMLS ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }, Z0.d
+ FMLS ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }, Z0.D
+ fmls za.d[w11, 0], { z0.d - z1.d }, z0.d
+ fmls za.d[w8, 7], { z0.d - z1.d }, z0.d
+ fmls za.d[w8, 0], { z30.d - z31.d }, z0.d
+ fmls za.d[w8, 0], { z31.d, z0.d }, z0.d
+ fmls za.d[w8, 0], { z31.d - z0.d }, z0.d
+ fmls za.d[w8, 0], { z0.d - z1.d }, z15.d
+ fmls za.d[w9, 5], { z9.d - z10.d }, z6.d
+
+ fmls za.d[w8, 0], { z0.d - z3.d }, z0.d
+ fmls za.d[w8, 0, vgx4], { z0.d - z3.d }, z0.d
+ FMLS ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }, Z0.d
+ FMLS ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }, Z0.D
+ fmls za.d[w11, 0], { z0.d - z3.d }, z0.d
+ fmls za.d[w8, 7], { z0.d - z3.d }, z0.d
+ fmls za.d[w8, 0], { z28.d - z31.d }, z0.d
+ fmls za.d[w8, 0], { z31.d, z0.d, z1.d, z2.d }, z0.d
+ fmls za.d[w8, 0], { z31.d - z2.d }, z0.d
+ fmls za.d[w8, 0], { z0.d - z3.d }, z15.d
+ fmls za.d[w11, 2], { z23.d - z26.d }, z13.d
+
+ fmls za.d[w8, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ fmls za.d[w8, 0, vgx2], { z0.d - z1.d }, { z0.d - z1.d }
+ FMLS ZA.d[W8, 0, VGx2], { Z0.d - Z1.d }, { Z0.d - Z1.d }
+ FMLS ZA.D[W8, 0, VGX2], { Z0.D - Z1.D }, { Z0.D - Z1.D }
+ fmls za.d[w11, 0], { z0.d - z1.d }, { z0.d - z1.d }
+ fmls za.d[w8, 7], { z0.d - z1.d }, { z0.d - z1.d }
+ fmls za.d[w8, 0], { z30.d - z31.d }, { z0.d - z1.d }
+ fmls za.d[w8, 0], { z0.d - z1.d }, { z30.d - z31.d }
+ fmls za.d[w10, 1], { z22.d - z23.d }, { z18.d - z19.d }
+
+ fmls za.d[w8, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ fmls za.d[w8, 0, vgx4], { z0.d - z3.d }, { z0.d - z3.d }
+ FMLS ZA.d[W8, 0, VGx4], { Z0.d - Z3.d }, { Z0.d - Z3.d }
+ FMLS ZA.D[W8, 0, VGX4], { Z0.D - Z3.D }, { Z0.D - Z3.D }
+ fmls za.d[w11, 0], { z0.d - z3.d }, { z0.d - z3.d }
+ fmls za.d[w8, 7], { z0.d - z3.d }, { z0.d - z3.d }
+ fmls za.d[w8, 0], { z28.d - z31.d }, { z0.d - z3.d }
+ fmls za.d[w8, 0], { z0.d - z3.d }, { z28.d - z31.d }
+ fmls za.d[w11, 3], { z16.d - z19.d }, { z24.d - z27.d }
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index ff5367aedd7..8c7646a0ce3 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -516,6 +516,8 @@ enum aarch64_opnd
AARCH64_OPND_SME_ADDR_RI_U4xVL, /* SME [<Xn|SP>{, #<imm>, MUL VL}]. */
AARCH64_OPND_SME_SM_ZA, /* SME {SM | ZA}. */
AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
+ AARCH64_OPND_SME_Zm_INDEX1, /* Zn.T[index], bits [19:16,10]. */
+ AARCH64_OPND_SME_Zm_INDEX2, /* Zn.T[index], bits [19:16,11:10]. */
AARCH64_OPND_SME_Zn_INDEX1_16, /* Zn[index], bits [9:5] and [16:16]. */
AARCH64_OPND_SME_Zn_INDEX2_15, /* Zn[index], bits [9:5] and [16:15]. */
AARCH64_OPND_SME_Zn_INDEX2_16, /* Zn[index], bits [9:5] and [17:16]. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 5dba041483c..b4ce19d8194 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -685,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 257:
+ case 259:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -731,12 +731,12 @@ aarch64_insert_operand (const aarch64_operand *self,
case 193:
case 194:
case 237:
- case 251:
- case 252:
+ case 253:
case 254:
case 256:
- case 261:
- case 262:
+ case 258:
+ case 263:
+ case 264:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -805,8 +805,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 253:
case 255:
+ case 257:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
@@ -925,6 +925,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 248:
case 249:
case 250:
+ case 251:
+ case 252:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 239:
case 240:
@@ -936,9 +938,9 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 244:
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 258:
- case 259:
case 260:
+ case 261:
+ case 262:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 36e30f752b7..bfe2bc25e9d 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2658;
+ return 2670;
}
}
}
@@ -190,7 +190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2527;
+ return 2539;
}
else
{
@@ -198,7 +198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2526;
+ return 2538;
}
}
else
@@ -207,7 +207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2525;
+ return 2537;
}
}
}
@@ -226,7 +226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2534;
+ return 2546;
}
else
{
@@ -234,7 +234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2530;
+ return 2542;
}
}
else
@@ -247,7 +247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2524;
+ return 2536;
}
else
{
@@ -255,7 +255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2523;
+ return 2535;
}
}
else
@@ -268,7 +268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2545;
+ return 2557;
}
else
{
@@ -276,7 +276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2544;
+ return 2556;
}
}
else
@@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2522;
+ return 2534;
}
}
}
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2532;
+ return 2544;
}
else
{
@@ -306,7 +306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2528;
+ return 2540;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2535;
+ return 2547;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2531;
+ return 2543;
}
}
else
@@ -339,7 +339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2533;
+ return 2545;
}
else
{
@@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2529;
+ return 2541;
}
}
}
@@ -374,7 +374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2461;
+ return 2473;
}
else
{
@@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2462;
+ return 2474;
}
}
else
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2485;
+ return 2497;
}
else
{
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2486;
+ return 2498;
}
}
}
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2477;
+ return 2489;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2478;
+ return 2490;
}
}
else
@@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2469;
+ return 2481;
}
else
{
@@ -442,7 +442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2470;
+ return 2482;
}
}
}
@@ -459,7 +459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2493;
+ return 2505;
}
else
{
@@ -467,7 +467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2494;
+ return 2506;
}
}
else
@@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2517;
+ return 2529;
}
else
{
@@ -486,7 +486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2518;
+ return 2530;
}
}
}
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2509;
+ return 2521;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2510;
+ return 2522;
}
}
else
@@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2501;
+ return 2513;
}
else
{
@@ -527,7 +527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2502;
+ return 2514;
}
}
}
@@ -591,7 +591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2457;
+ return 2469;
}
else
{
@@ -599,7 +599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2458;
+ return 2470;
}
}
else
@@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2481;
+ return 2493;
}
else
{
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2482;
+ return 2494;
}
}
}
@@ -632,7 +632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2473;
+ return 2485;
}
else
{
@@ -640,7 +640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2474;
+ return 2486;
}
}
else
@@ -651,7 +651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2465;
+ return 2477;
}
else
{
@@ -659,7 +659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2466;
+ return 2478;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2489;
+ return 2501;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2490;
+ return 2502;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2513;
+ return 2525;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2514;
+ return 2526;
}
}
}
@@ -717,7 +717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2505;
+ return 2517;
}
else
{
@@ -725,7 +725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2506;
+ return 2518;
}
}
else
@@ -736,7 +736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2497;
+ return 2509;
}
else
{
@@ -744,7 +744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2498;
+ return 2510;
}
}
}
@@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2571;
+ return 2583;
}
else
{
@@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2572;
+ return 2584;
}
}
else
@@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2595;
+ return 2607;
}
else
{
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2596;
+ return 2608;
}
}
}
@@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2587;
+ return 2599;
}
else
{
@@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2588;
+ return 2600;
}
}
else
@@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2579;
+ return 2591;
}
else
{
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2580;
+ return 2592;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2603;
+ return 2615;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2604;
+ return 2616;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2627;
+ return 2639;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2628;
+ return 2640;
}
}
}
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2619;
+ return 2631;
}
else
{
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2620;
+ return 2632;
}
}
else
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2611;
+ return 2623;
}
else
{
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2612;
+ return 2624;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2567;
+ return 2579;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2568;
+ return 2580;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2591;
+ return 2603;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2592;
+ return 2604;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2583;
+ return 2595;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2584;
+ return 2596;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2575;
+ return 2587;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2576;
+ return 2588;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2599;
+ return 2611;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2600;
+ return 2612;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2623;
+ return 2635;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2624;
+ return 2636;
}
}
}
@@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2615;
+ return 2627;
}
else
{
@@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2616;
+ return 2628;
}
}
else
@@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2607;
+ return 2619;
}
else
{
@@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2608;
+ return 2620;
}
}
}
@@ -1274,7 +1274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2463;
+ return 2475;
}
else
{
@@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2487;
+ return 2499;
}
}
else
@@ -1293,7 +1293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2479;
+ return 2491;
}
else
{
@@ -1301,7 +1301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2471;
+ return 2483;
}
}
}
@@ -1315,7 +1315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2495;
+ return 2507;
}
else
{
@@ -1323,7 +1323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2519;
+ return 2531;
}
}
else
@@ -1334,7 +1334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2511;
+ return 2523;
}
else
{
@@ -1342,7 +1342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2503;
+ return 2515;
}
}
}
@@ -1370,7 +1370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2464;
+ return 2476;
}
else
{
@@ -1378,7 +1378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2521;
+ return 2533;
}
}
else
@@ -1387,7 +1387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2488;
+ return 2500;
}
}
else
@@ -1398,7 +1398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2480;
+ return 2492;
}
else
{
@@ -1406,7 +1406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2472;
+ return 2484;
}
}
}
@@ -1420,7 +1420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2496;
+ return 2508;
}
else
{
@@ -1428,7 +1428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2520;
+ return 2532;
}
}
else
@@ -1439,7 +1439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2512;
+ return 2524;
}
else
{
@@ -1447,7 +1447,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2504;
+ return 2516;
}
}
}
@@ -1501,85 +1501,129 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx000xxxxxxxxx0xxx
- ld1b. */
- return 2459;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx000xxxxxxxxx0xxx
+ ld1b. */
+ return 2471;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx010xxxxxxxxx0xxx
+ ld1w. */
+ return 2495;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx100xxxxxxxxx0xxx
- ld1b. */
- return 2460;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx001xxxxxxxxx0xxx
+ ld1h. */
+ return 2487;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx011xxxxxxxxx0xxx
+ ld1d. */
+ return 2479;
+ }
}
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00001010xxxxx010xxxxxxxxx0xxx
- ld1w. */
- return 2483;
+ xxx000010101xxxx0xxxxxxxxxx00xxx
+ fmla. */
+ return 2455;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00001010xxxxx110xxxxxxxxx0xxx
- ld1w. */
- return 2484;
+ xxx000010101xxxx0xxxxxxxxxx10xxx
+ fmls. */
+ return 2461;
}
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx001xxxxxxxxx0xxx
- ld1h. */
- return 2475;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx100xxxxxxxxx0xxx
+ ld1b. */
+ return 2472;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx110xxxxxxxxx0xxx
+ ld1w. */
+ return 2496;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx101xxxxxxxxx0xxx
- ld1h. */
- return 2476;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx101xxxxxxxxx0xxx
+ ld1h. */
+ return 2488;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx111xxxxxxxxx0xxx
+ ld1d. */
+ return 2480;
+ }
}
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00001010xxxxx011xxxxxxxxx0xxx
- ld1d. */
- return 2467;
+ xxx000010101xxxx1xxxxxxxxxx00xxx
+ fmla. */
+ return 2456;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00001010xxxxx111xxxxxxxxx0xxx
- ld1d. */
- return 2468;
+ xxx000010101xxxx1xxxxxxxxxx10xxx
+ fmls. */
+ return 2462;
}
}
}
@@ -1596,7 +1640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2491;
+ return 2503;
}
else
{
@@ -1604,7 +1648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2492;
+ return 2504;
}
}
else
@@ -1615,7 +1659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2515;
+ return 2527;
}
else
{
@@ -1623,7 +1667,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2516;
+ return 2528;
}
}
}
@@ -1637,7 +1681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2507;
+ return 2519;
}
else
{
@@ -1645,7 +1689,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2508;
+ return 2520;
}
}
else
@@ -1656,7 +1700,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2499;
+ return 2511;
}
else
{
@@ -1664,7 +1708,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2500;
+ return 2512;
}
}
}
@@ -1674,30 +1718,74 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 29) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001110xxxxxxxxxxxxxxxx0xxxx
- usmopa. */
- return 2385;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx0xxxxxxxxxx0xxxx
+ fmla. */
+ return 2671;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx1xxxxxxxxxx0xxxx
+ fmla. */
+ return 2672;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1x00001110xxxxxxxxxxxxxxxx0xxxx
- ld1q. */
- return 2397;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001110xxxxxxxxxxxxxxxx0xxxx
+ usmopa. */
+ return 2385;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1100001110xxxxxxxxxxxxxxxx0xxxx
+ ld1q. */
+ return 2397;
+ }
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001110xxxxxxxxxxxxxxxx1xxxx
- usmops. */
- return 2387;
+ if (((word >> 29) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx0xxxxxxxxxx1xxxx
+ fmls. */
+ return 2673;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx1xxxxxxxxxx1xxxx
+ fmls. */
+ return 2674;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001110xxxxxxxxxxxxxxxx1xxxx
+ usmops. */
+ return 2387;
+ }
}
}
}
@@ -1733,21 +1821,65 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 10) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxxxxxxxx00xxx
- fadd. */
- return 2437;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xxxx0xxxxx00xxx
+ fmla. */
+ return 2457;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xxxx0xxxxx00xxx
+ fmla. */
+ return 2458;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxxx0xxxxx00xxx
+ fmla. */
+ return 2459;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxxx0xxxxx00xxx
+ fmla. */
+ return 2460;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxxxxxxxx00xxx
- fadd. */
- return 2438;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xxxx1xxxxx00xxx
+ fadd. */
+ return 2437;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xxxx1xxxxx00xxx
+ fadd. */
+ return 2438;
+ }
}
}
else
@@ -1818,21 +1950,65 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 10) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxxxxxxxx01xxx
- fsub. */
- return 2455;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xxxx0xxxxx01xxx
+ fmls. */
+ return 2463;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xxxx0xxxxx01xxx
+ fmls. */
+ return 2464;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxxx0xxxxx01xxx
+ fmls. */
+ return 2465;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxxx0xxxxx01xxx
+ fmls. */
+ return 2466;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxxxxxxxx01xxx
- fsub. */
- return 2456;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xxxx1xxxxx01xxx
+ fsub. */
+ return 2467;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xxxx1xxxxx01xxx
+ fsub. */
+ return 2468;
+ }
}
}
else
@@ -1847,7 +2023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxxx0xxxxx11xxx
sub. */
- return 2634;
+ return 2646;
}
else
{
@@ -1855,7 +2031,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxxx0xxxxx11xxx
sub. */
- return 2635;
+ return 2647;
}
}
else
@@ -1866,7 +2042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxxx0xxxxx11xxx
sub. */
- return 2636;
+ return 2648;
}
else
{
@@ -1874,7 +2050,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxxx0xxxxx11xxx
sub. */
- return 2637;
+ return 2649;
}
}
}
@@ -1886,7 +2062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xxxx1xxxxx11xxx
sub. */
- return 2632;
+ return 2644;
}
else
{
@@ -1894,7 +2070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xxxx1xxxxx11xxx
sub. */
- return 2633;
+ return 2645;
}
}
}
@@ -1914,7 +2090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx01x0xxxxxxx0xxxx0
sel. */
- return 2549;
+ return 2561;
}
else
{
@@ -1922,7 +2098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx11x0xxxxxxx0xxxx0
sel. */
- return 2550;
+ return 2562;
}
}
else
@@ -1939,7 +2115,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1000x0xx0xxxx0
smax. */
- return 2551;
+ return 2563;
}
else
{
@@ -1947,7 +2123,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2553;
+ return 2565;
}
}
else
@@ -1958,7 +2134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2552;
+ return 2564;
}
else
{
@@ -1966,7 +2142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2554;
+ return 2566;
}
}
}
@@ -1980,7 +2156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2559;
+ return 2571;
}
else
{
@@ -1988,7 +2164,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2561;
+ return 2573;
}
}
else
@@ -1999,7 +2175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2560;
+ return 2572;
}
else
{
@@ -2007,7 +2183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2562;
+ return 2574;
}
}
}
@@ -2091,7 +2267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx0
smin. */
- return 2555;
+ return 2567;
}
else
{
@@ -2099,7 +2275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx0
smin. */
- return 2557;
+ return 2569;
}
}
else
@@ -2110,7 +2286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx0
smin. */
- return 2556;
+ return 2568;
}
else
{
@@ -2118,7 +2294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx0
smin. */
- return 2558;
+ return 2570;
}
}
}
@@ -2132,7 +2308,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2563;
+ return 2575;
}
else
{
@@ -2140,7 +2316,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2565;
+ return 2577;
}
}
else
@@ -2151,7 +2327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2564;
+ return 2576;
}
else
{
@@ -2159,7 +2335,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2566;
+ return 2578;
}
}
}
@@ -2221,7 +2397,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2638;
+ return 2650;
}
else
{
@@ -2229,7 +2405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2640;
+ return 2652;
}
}
else
@@ -2240,7 +2416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2639;
+ return 2651;
}
else
{
@@ -2248,7 +2424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2641;
+ return 2653;
}
}
}
@@ -2308,7 +2484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2642;
+ return 2654;
}
else
{
@@ -2316,7 +2492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2644;
+ return 2656;
}
}
else
@@ -2327,7 +2503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2643;
+ return 2655;
}
else
{
@@ -2335,7 +2511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2645;
+ return 2657;
}
}
}
@@ -2349,7 +2525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2646;
+ return 2658;
}
else
{
@@ -2357,7 +2533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2648;
+ return 2660;
}
}
else
@@ -2368,7 +2544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2647;
+ return 2659;
}
else
{
@@ -2376,7 +2552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2649;
+ return 2661;
}
}
}
@@ -2447,7 +2623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2573;
+ return 2585;
}
else
{
@@ -2455,7 +2631,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2597;
+ return 2609;
}
}
else
@@ -2466,7 +2642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2589;
+ return 2601;
}
else
{
@@ -2474,7 +2650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2581;
+ return 2593;
}
}
}
@@ -2488,7 +2664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2605;
+ return 2617;
}
else
{
@@ -2496,7 +2672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2629;
+ return 2641;
}
}
else
@@ -2507,7 +2683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2621;
+ return 2633;
}
else
{
@@ -2515,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2613;
+ return 2625;
}
}
}
@@ -2543,7 +2719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2574;
+ return 2586;
}
else
{
@@ -2551,7 +2727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2631;
+ return 2643;
}
}
else
@@ -2560,7 +2736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2598;
+ return 2610;
}
}
else
@@ -2571,7 +2747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2590;
+ return 2602;
}
else
{
@@ -2579,7 +2755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2582;
+ return 2594;
}
}
}
@@ -2593,7 +2769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2606;
+ return 2618;
}
else
{
@@ -2601,7 +2777,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2630;
+ return 2642;
}
}
else
@@ -2612,7 +2788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2622;
+ return 2634;
}
else
{
@@ -2620,7 +2796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2614;
+ return 2626;
}
}
}
@@ -2662,7 +2838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2569;
+ return 2581;
}
else
{
@@ -2670,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2570;
+ return 2582;
}
}
else
@@ -2681,7 +2857,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2593;
+ return 2605;
}
else
{
@@ -2689,7 +2865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2594;
+ return 2606;
}
}
}
@@ -2703,7 +2879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2585;
+ return 2597;
}
else
{
@@ -2711,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2586;
+ return 2598;
}
}
else
@@ -2722,7 +2898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2577;
+ return 2589;
}
else
{
@@ -2730,7 +2906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2578;
+ return 2590;
}
}
}
@@ -2747,7 +2923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2601;
+ return 2613;
}
else
{
@@ -2755,7 +2931,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2602;
+ return 2614;
}
}
else
@@ -2766,7 +2942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2625;
+ return 2637;
}
else
{
@@ -2774,7 +2950,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2626;
+ return 2638;
}
}
}
@@ -2788,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2617;
+ return 2629;
}
else
{
@@ -2796,7 +2972,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2618;
+ return 2630;
}
}
else
@@ -2807,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2609;
+ return 2621;
}
else
{
@@ -2815,7 +2991,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2610;
+ return 2622;
}
}
}
@@ -5217,7 +5393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2699;
+ return 2715;
}
else
{
@@ -5225,7 +5401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2707;
+ return 2723;
}
}
else
@@ -5236,7 +5412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2703;
+ return 2719;
}
else
{
@@ -5244,7 +5420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2710;
+ return 2726;
}
}
}
@@ -5282,7 +5458,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2759;
+ return 2775;
}
else
{
@@ -5290,7 +5466,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2765;
+ return 2781;
}
}
else
@@ -5301,7 +5477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2762;
+ return 2778;
}
else
{
@@ -5309,7 +5485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2768;
+ return 2784;
}
}
}
@@ -5323,7 +5499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2783;
+ return 2799;
}
else
{
@@ -5331,7 +5507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2789;
+ return 2805;
}
}
else
@@ -5342,7 +5518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2786;
+ return 2802;
}
else
{
@@ -5350,7 +5526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2792;
+ return 2808;
}
}
}
@@ -5367,7 +5543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2771;
+ return 2787;
}
else
{
@@ -5375,7 +5551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2777;
+ return 2793;
}
}
else
@@ -5386,7 +5562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2774;
+ return 2790;
}
else
{
@@ -5394,7 +5570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2780;
+ return 2796;
}
}
}
@@ -5408,7 +5584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2795;
+ return 2811;
}
else
{
@@ -5416,7 +5592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2801;
+ return 2817;
}
}
else
@@ -5427,7 +5603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2798;
+ return 2814;
}
else
{
@@ -5435,7 +5611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2804;
+ return 2820;
}
}
}
@@ -5500,7 +5676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2700;
+ return 2716;
}
else
{
@@ -5508,7 +5684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2708;
+ return 2724;
}
}
else
@@ -5519,7 +5695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2704;
+ return 2720;
}
else
{
@@ -5527,7 +5703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2711;
+ return 2727;
}
}
}
@@ -5565,7 +5741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2760;
+ return 2776;
}
else
{
@@ -5573,7 +5749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2766;
+ return 2782;
}
}
else
@@ -5584,7 +5760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2763;
+ return 2779;
}
else
{
@@ -5592,7 +5768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2769;
+ return 2785;
}
}
}
@@ -5606,7 +5782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2784;
+ return 2800;
}
else
{
@@ -5614,7 +5790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2790;
+ return 2806;
}
}
else
@@ -5625,7 +5801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2787;
+ return 2803;
}
else
{
@@ -5633,7 +5809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2793;
+ return 2809;
}
}
}
@@ -5650,7 +5826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2772;
+ return 2788;
}
else
{
@@ -5658,7 +5834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2778;
+ return 2794;
}
}
else
@@ -5669,7 +5845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2775;
+ return 2791;
}
else
{
@@ -5677,7 +5853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2781;
+ return 2797;
}
}
}
@@ -5691,7 +5867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2796;
+ return 2812;
}
else
{
@@ -5699,7 +5875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2802;
+ return 2818;
}
}
else
@@ -5710,7 +5886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2799;
+ return 2815;
}
else
{
@@ -5718,7 +5894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2805;
+ return 2821;
}
}
}
@@ -5786,7 +5962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2702;
+ return 2718;
}
else
{
@@ -5794,7 +5970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2709;
+ return 2725;
}
}
else
@@ -5803,7 +5979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2706;
+ return 2722;
}
}
else
@@ -5814,7 +5990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2701;
+ return 2717;
}
else
{
@@ -5822,7 +5998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2705;
+ return 2721;
}
}
}
@@ -5884,7 +6060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2761;
+ return 2777;
}
else
{
@@ -5892,7 +6068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2855;
+ return 2871;
}
}
else
@@ -5903,7 +6079,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2767;
+ return 2783;
}
else
{
@@ -5911,7 +6087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2857;
+ return 2873;
}
}
}
@@ -5925,7 +6101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2764;
+ return 2780;
}
else
{
@@ -5933,7 +6109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2856;
+ return 2872;
}
}
else
@@ -5942,7 +6118,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2770;
+ return 2786;
}
}
}
@@ -5958,7 +6134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2785;
+ return 2801;
}
else
{
@@ -5966,7 +6142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2861;
+ return 2877;
}
}
else
@@ -5977,7 +6153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2791;
+ return 2807;
}
else
{
@@ -5985,7 +6161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2863;
+ return 2879;
}
}
}
@@ -5999,7 +6175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2788;
+ return 2804;
}
else
{
@@ -6007,7 +6183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2862;
+ return 2878;
}
}
else
@@ -6016,7 +6192,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2794;
+ return 2810;
}
}
}
@@ -6035,7 +6211,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2773;
+ return 2789;
}
else
{
@@ -6043,7 +6219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2858;
+ return 2874;
}
}
else
@@ -6054,7 +6230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2779;
+ return 2795;
}
else
{
@@ -6062,7 +6238,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2860;
+ return 2876;
}
}
}
@@ -6076,7 +6252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2776;
+ return 2792;
}
else
{
@@ -6084,7 +6260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2859;
+ return 2875;
}
}
else
@@ -6093,7 +6269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2782;
+ return 2798;
}
}
}
@@ -6109,7 +6285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2797;
+ return 2813;
}
else
{
@@ -6117,7 +6293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2864;
+ return 2880;
}
}
else
@@ -6128,7 +6304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2803;
+ return 2819;
}
else
{
@@ -6136,7 +6312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2866;
+ return 2882;
}
}
}
@@ -6150,7 +6326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2800;
+ return 2816;
}
else
{
@@ -6158,7 +6334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2865;
+ return 2881;
}
}
else
@@ -6167,7 +6343,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2806;
+ return 2822;
}
}
}
@@ -6540,7 +6716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2884;
+ return 2900;
}
else
{
@@ -6558,7 +6734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2887;
+ return 2903;
}
}
}
@@ -6638,7 +6814,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2697;
+ return 2713;
}
else
{
@@ -6646,7 +6822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2698;
+ return 2714;
}
}
else
@@ -6753,7 +6929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2889;
+ return 2905;
}
}
}
@@ -6769,7 +6945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2886;
+ return 2902;
}
else
{
@@ -6814,7 +6990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2696;
+ return 2712;
}
else
{
@@ -6908,7 +7084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2888;
+ return 2904;
}
}
}
@@ -7038,7 +7214,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2890;
+ return 2906;
}
}
}
@@ -7054,7 +7230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2885;
+ return 2901;
}
else
{
@@ -7896,7 +8072,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2716;
+ return 2732;
}
}
}
@@ -7970,7 +8146,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2717;
+ return 2733;
}
}
}
@@ -10644,7 +10820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2715;
+ return 2731;
}
}
}
@@ -12348,7 +12524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2744;
+ return 2760;
}
}
else
@@ -12591,7 +12767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2720;
+ return 2736;
}
else
{
@@ -12599,7 +12775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2721;
+ return 2737;
}
}
else
@@ -12831,7 +13007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2741;
+ return 2757;
}
else
{
@@ -12852,7 +13028,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2748;
+ return 2764;
}
else
{
@@ -12860,7 +13036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2747;
+ return 2763;
}
}
else
@@ -12915,7 +13091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2740;
+ return 2756;
}
else
{
@@ -12927,7 +13103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2746;
+ return 2762;
}
else
{
@@ -12935,7 +13111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2745;
+ return 2761;
}
}
else
@@ -12986,7 +13162,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2724;
+ return 2740;
}
else
{
@@ -12994,7 +13170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2725;
+ return 2741;
}
}
else
@@ -13353,7 +13529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2718;
+ return 2734;
}
else
{
@@ -13386,7 +13562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2742;
+ return 2758;
}
else
{
@@ -13416,7 +13592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2719;
+ return 2735;
}
else
{
@@ -13545,7 +13721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2728;
+ return 2744;
}
else
{
@@ -13555,7 +13731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2730;
+ return 2746;
}
else
{
@@ -13563,7 +13739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2732;
+ return 2748;
}
}
}
@@ -13575,7 +13751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2729;
+ return 2745;
}
else
{
@@ -13585,7 +13761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2731;
+ return 2747;
}
else
{
@@ -13593,7 +13769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2733;
+ return 2749;
}
}
}
@@ -14652,7 +14828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2712;
+ return 2728;
}
else
{
@@ -14660,7 +14836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2714;
+ return 2730;
}
}
else
@@ -14669,7 +14845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2713;
+ return 2729;
}
}
}
@@ -16165,7 +16341,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2722;
+ return 2738;
}
else
{
@@ -16173,7 +16349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2723;
+ return 2739;
}
}
}
@@ -16547,7 +16723,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2726;
+ return 2742;
}
else
{
@@ -16555,7 +16731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2727;
+ return 2743;
}
}
}
@@ -16916,7 +17092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2650;
+ return 2662;
}
else
{
@@ -16924,7 +17100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2651;
+ return 2663;
}
}
else
@@ -16954,7 +17130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2546;
+ return 2558;
}
}
}
@@ -16968,7 +17144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2653;
+ return 2665;
}
else
{
@@ -16976,7 +17152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2652;
+ return 2664;
}
}
else
@@ -17006,7 +17182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2548;
+ return 2560;
}
}
}
@@ -17023,7 +17199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2657;
+ return 2669;
}
else
{
@@ -17031,7 +17207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2654;
+ return 2666;
}
}
else
@@ -17061,7 +17237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2547;
+ return 2559;
}
}
}
@@ -17075,7 +17251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2655;
+ return 2667;
}
else
{
@@ -17083,7 +17259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2656;
+ return 2668;
}
}
else
@@ -18209,7 +18385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2743;
+ return 2759;
}
}
else
@@ -19570,7 +19746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2879;
+ return 2895;
}
else
{
@@ -20150,7 +20326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2807;
+ return 2823;
}
else
{
@@ -20158,7 +20334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2809;
+ return 2825;
}
}
else
@@ -20169,7 +20345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2813;
+ return 2829;
}
else
{
@@ -20177,7 +20353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2815;
+ return 2831;
}
}
}
@@ -20191,7 +20367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2810;
+ return 2826;
}
else
{
@@ -20199,7 +20375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2812;
+ return 2828;
}
}
else
@@ -20210,7 +20386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2816;
+ return 2832;
}
else
{
@@ -20218,7 +20394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2818;
+ return 2834;
}
}
}
@@ -20235,7 +20411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2831;
+ return 2847;
}
else
{
@@ -20243,7 +20419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2833;
+ return 2849;
}
}
else
@@ -20254,7 +20430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2837;
+ return 2853;
}
else
{
@@ -20262,7 +20438,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2839;
+ return 2855;
}
}
}
@@ -20276,7 +20452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2834;
+ return 2850;
}
else
{
@@ -20284,7 +20460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2836;
+ return 2852;
}
}
else
@@ -20295,7 +20471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2840;
+ return 2856;
}
else
{
@@ -20303,7 +20479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2842;
+ return 2858;
}
}
}
@@ -20323,7 +20499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2819;
+ return 2835;
}
else
{
@@ -20331,7 +20507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2821;
+ return 2837;
}
}
else
@@ -20342,7 +20518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2825;
+ return 2841;
}
else
{
@@ -20350,7 +20526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2827;
+ return 2843;
}
}
}
@@ -20364,7 +20540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2822;
+ return 2838;
}
else
{
@@ -20372,7 +20548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2824;
+ return 2840;
}
}
else
@@ -20383,7 +20559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2828;
+ return 2844;
}
else
{
@@ -20391,7 +20567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2830;
+ return 2846;
}
}
}
@@ -20408,7 +20584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2843;
+ return 2859;
}
else
{
@@ -20416,7 +20592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2845;
+ return 2861;
}
}
else
@@ -20427,7 +20603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2849;
+ return 2865;
}
else
{
@@ -20435,7 +20611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2851;
+ return 2867;
}
}
}
@@ -20449,7 +20625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2846;
+ return 2862;
}
else
{
@@ -20457,7 +20633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2848;
+ return 2864;
}
}
else
@@ -20468,7 +20644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2852;
+ return 2868;
}
else
{
@@ -20476,7 +20652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2854;
+ return 2870;
}
}
}
@@ -20510,7 +20686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2808;
+ return 2824;
}
else
{
@@ -20518,7 +20694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2867;
+ return 2883;
}
}
else
@@ -20529,7 +20705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2814;
+ return 2830;
}
else
{
@@ -20537,7 +20713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2869;
+ return 2885;
}
}
}
@@ -20551,7 +20727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2811;
+ return 2827;
}
else
{
@@ -20559,7 +20735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2868;
+ return 2884;
}
}
else
@@ -20568,7 +20744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2817;
+ return 2833;
}
}
}
@@ -20584,7 +20760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2832;
+ return 2848;
}
else
{
@@ -20592,7 +20768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2873;
+ return 2889;
}
}
else
@@ -20603,7 +20779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2838;
+ return 2854;
}
else
{
@@ -20611,7 +20787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2875;
+ return 2891;
}
}
}
@@ -20625,7 +20801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2835;
+ return 2851;
}
else
{
@@ -20633,7 +20809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2874;
+ return 2890;
}
}
else
@@ -20642,7 +20818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2841;
+ return 2857;
}
}
}
@@ -20661,7 +20837,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2820;
+ return 2836;
}
else
{
@@ -20669,7 +20845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2870;
+ return 2886;
}
}
else
@@ -20680,7 +20856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2826;
+ return 2842;
}
else
{
@@ -20688,7 +20864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2872;
+ return 2888;
}
}
}
@@ -20702,7 +20878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2823;
+ return 2839;
}
else
{
@@ -20710,7 +20886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2871;
+ return 2887;
}
}
else
@@ -20719,7 +20895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2829;
+ return 2845;
}
}
}
@@ -20735,7 +20911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2844;
+ return 2860;
}
else
{
@@ -20743,7 +20919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2876;
+ return 2892;
}
}
else
@@ -20754,7 +20930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2850;
+ return 2866;
}
else
{
@@ -20762,7 +20938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2878;
+ return 2894;
}
}
}
@@ -20776,7 +20952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2847;
+ return 2863;
}
else
{
@@ -20784,7 +20960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2877;
+ return 2893;
}
}
else
@@ -20793,7 +20969,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2853;
+ return 2869;
}
}
}
@@ -20960,7 +21136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2734;
+ return 2750;
}
}
}
@@ -20993,7 +21169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2660;
+ return 2676;
}
}
else
@@ -21067,7 +21243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2736;
+ return 2752;
}
}
}
@@ -21100,7 +21276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2737;
+ return 2753;
}
}
else
@@ -21147,7 +21323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2667;
+ return 2683;
}
else
{
@@ -21155,7 +21331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2669;
+ return 2685;
}
}
else
@@ -21166,7 +21342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2671;
+ return 2687;
}
else
{
@@ -21180,7 +21356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2672;
+ return 2688;
}
else
{
@@ -21188,7 +21364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2665;
+ return 2681;
}
}
else
@@ -21197,7 +21373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2674;
+ return 2690;
}
}
else
@@ -21210,7 +21386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2673;
+ return 2689;
}
else
{
@@ -21218,7 +21394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2678;
+ return 2694;
}
}
else
@@ -21227,7 +21403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2675;
+ return 2691;
}
}
}
@@ -21408,7 +21584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2659;
+ return 2675;
}
}
else
@@ -21439,7 +21615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2735;
+ return 2751;
}
else
{
@@ -21458,7 +21634,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2751;
+ return 2767;
}
else
{
@@ -21468,7 +21644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2749;
+ return 2765;
}
else
{
@@ -21478,7 +21654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2756;
+ return 2772;
}
else
{
@@ -21486,7 +21662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2755;
+ return 2771;
}
}
}
@@ -22070,7 +22246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2752;
+ return 2768;
}
else
{
@@ -22078,7 +22254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2753;
+ return 2769;
}
}
}
@@ -22396,7 +22572,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2670;
+ return 2686;
}
}
else
@@ -23007,7 +23183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2663;
+ return 2679;
}
}
}
@@ -23059,7 +23235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2676;
+ return 2692;
}
}
}
@@ -23302,7 +23478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2666;
+ return 2682;
}
}
else
@@ -23378,7 +23554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2679;
+ return 2695;
}
}
else
@@ -24204,7 +24380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2664;
+ return 2680;
}
}
else
@@ -24236,7 +24412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2677;
+ return 2693;
}
}
else
@@ -24476,7 +24652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2668;
+ return 2684;
}
}
else
@@ -24508,7 +24684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2682;
+ return 2698;
}
else
{
@@ -24516,7 +24692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2686;
+ return 2702;
}
}
}
@@ -24538,7 +24714,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2683;
+ return 2699;
}
else
{
@@ -24546,7 +24722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2687;
+ return 2703;
}
}
}
@@ -24585,7 +24761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2680;
+ return 2696;
}
else
{
@@ -24593,7 +24769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2684;
+ return 2700;
}
}
else
@@ -24615,7 +24791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2681;
+ return 2697;
}
else
{
@@ -24623,7 +24799,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2685;
+ return 2701;
}
}
else
@@ -26431,7 +26607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2688;
+ return 2704;
}
else
{
@@ -26439,7 +26615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2692;
+ return 2708;
}
}
else
@@ -26461,7 +26637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2689;
+ return 2705;
}
else
{
@@ -26469,7 +26645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2693;
+ return 2709;
}
}
else
@@ -26975,7 +27151,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2690;
+ return 2706;
}
else
{
@@ -26983,7 +27159,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2694;
+ return 2710;
}
}
}
@@ -27005,7 +27181,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2691;
+ return 2707;
}
else
{
@@ -27013,7 +27189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2695;
+ return 2711;
}
}
}
@@ -27069,7 +27245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2662;
+ return 2678;
}
else
{
@@ -27077,7 +27253,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2661;
+ return 2677;
}
}
}
@@ -27180,7 +27356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2739;
+ return 2755;
}
else
{
@@ -27188,7 +27364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2738;
+ return 2754;
}
}
else
@@ -27199,7 +27375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2750;
+ return 2766;
}
else
{
@@ -27209,7 +27385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2758;
+ return 2774;
}
else
{
@@ -27217,7 +27393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2757;
+ return 2773;
}
}
}
@@ -27708,22 +27884,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2534: value = 2542; break; /* mov --> mova. */
- case 2542: return NULL; /* mova --> NULL. */
- case 2530: value = 2538; break; /* mov --> mova. */
- case 2538: return NULL; /* mova --> NULL. */
- case 2532: value = 2540; break; /* mov --> mova. */
- case 2540: return NULL; /* mova --> NULL. */
- case 2528: value = 2536; break; /* mov --> mova. */
- case 2536: return NULL; /* mova --> NULL. */
- case 2535: value = 2543; break; /* mov --> mova. */
- case 2543: return NULL; /* mova --> NULL. */
- case 2531: value = 2539; break; /* mov --> mova. */
- case 2539: return NULL; /* mova --> NULL. */
- case 2533: value = 2541; break; /* mov --> mova. */
- case 2541: return NULL; /* mova --> NULL. */
- case 2529: value = 2537; break; /* mov --> mova. */
- case 2537: return NULL; /* mova --> NULL. */
+ case 2546: value = 2554; break; /* mov --> mova. */
+ case 2554: return NULL; /* mova --> NULL. */
+ case 2542: value = 2550; break; /* mov --> mova. */
+ case 2550: return NULL; /* mova --> NULL. */
+ case 2544: value = 2552; break; /* mov --> mova. */
+ case 2552: return NULL; /* mova --> NULL. */
+ case 2540: value = 2548; break; /* mov --> mova. */
+ case 2548: return NULL; /* mova --> NULL. */
+ case 2547: value = 2555; break; /* mov --> mova. */
+ case 2555: return NULL; /* mova --> NULL. */
+ case 2543: value = 2551; break; /* mov --> mova. */
+ case 2551: return NULL; /* mova --> NULL. */
+ case 2545: value = 2553; break; /* mov --> mova. */
+ case 2553: return NULL; /* mova --> NULL. */
+ case 2541: value = 2549; break; /* mov --> mova. */
+ case 2549: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -27745,11 +27921,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2880; break; /* addg --> smax. */
- case 2880: value = 2881; break; /* smax --> umax. */
- case 2881: value = 2882; break; /* umax --> smin. */
- case 2882: value = 2883; break; /* smin --> umin. */
- case 2883: return NULL; /* umin --> NULL. */
+ case 19: value = 2896; break; /* addg --> smax. */
+ case 2896: value = 2897; break; /* smax --> umax. */
+ case 2897: value = 2898; break; /* umax --> smin. */
+ case 2898: value = 2899; break; /* smin --> umin. */
+ case 2899: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -27907,8 +28083,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2754; break; /* fcvt --> bfcvt. */
- case 2754: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2770; break; /* fcvt --> bfcvt. */
+ case 2770: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -28437,7 +28613,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 257:
+ case 259:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -28484,12 +28660,12 @@ aarch64_extract_operand (const aarch64_operand *self,
case 193:
case 194:
case 237:
- case 251:
- case 252:
+ case 253:
case 254:
case 256:
- case 261:
- case 262:
+ case 258:
+ case 263:
+ case 264:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -28560,8 +28736,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
- case 253:
case 255:
+ case 257:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
@@ -28680,6 +28856,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 248:
case 249:
case 250:
+ case 251:
+ case 252:
return aarch64_ext_simple_index (self, info, code, inst, errors);
case 239:
case 240:
@@ -28691,9 +28869,9 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 244:
return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 258:
- case 259:
case 260:
+ case 261:
+ case 262:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 8658d07bf39..51415ceb033 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -269,6 +269,8 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX1_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm1_16}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_15", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_15}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_16}, "an indexed SVE vector register"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index d9cc0544e82..cd37f8ac910 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -320,8 +320,10 @@ const aarch64_field fields[] =
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
{ 8, 1 }, /* imm1_8: general immediate in bits [8]. */
+ { 10, 1 }, /* imm1_10: general immediate in bits [10]. */
{ 16, 1 }, /* imm1_16: general immediate in bits [16]. */
{ 8, 2 }, /* imm2_8: general immediate in bits [9:8]. */
+ { 10, 2 }, /* imm2_10: 2-bit immediate, bits [11:10] */
{ 15, 2 }, /* imm2_15: 2-bit immediate, bits [16:15] */
{ 16, 2 }, /* imm2_16: 2-bit immediate, bits [17:16] */
{ 0, 3 }, /* imm3_0: general immediate in bits [2:0]. */
@@ -1765,6 +1767,14 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
return 0;
break;
+ case AARCH64_OPND_SME_Zm_INDEX1:
+ case AARCH64_OPND_SME_Zm_INDEX2:
+ size = get_operand_fields_width (get_operand_from_code (type)) - 4;
+ if (!check_reglane (opnd, mismatch_detail, idx, "z", 0, 15,
+ 0, (1 << size) - 1))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_Zm:
if (opnd->reg.regno > 15)
{
@@ -3926,6 +3936,8 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_Zm4_11_INDEX:
case AARCH64_OPND_SVE_Zm4_INDEX:
case AARCH64_OPND_SVE_Zn_INDEX:
+ case AARCH64_OPND_SME_Zm_INDEX1:
+ case AARCH64_OPND_SME_Zm_INDEX2:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 1284dd47d4d..b0084257a94 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -141,8 +141,10 @@ enum aarch64_field_kind
FLD_defgh,
FLD_hw,
FLD_imm1_8,
+ FLD_imm1_10,
FLD_imm1_16,
FLD_imm2_8,
+ FLD_imm2_10,
FLD_imm2_15,
FLD_imm2_16,
FLD_imm3_0,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 9bcec954d53..434b76c010c 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2509,6 +2509,8 @@ static const aarch64_feature_set aarch64_feature_sme_i16i64 =
static const aarch64_feature_set aarch64_feature_sme2 =
AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME
| AARCH64_FEATURE_SME2, 0);
+static const aarch64_feature_set aarch64_feature_sme2_f64f64 =
+ AARCH64_FEATURE (AARCH64_FEATURE_SME2 | AARCH64_FEATURE_SME_F64F64, 0);
static const aarch64_feature_set aarch64_feature_v8_6 =
AARCH64_FEATURE (AARCH64_FEATURE_V8_6, 0);
static const aarch64_feature_set aarch64_feature_v8_7 =
@@ -2578,6 +2580,7 @@ static const aarch64_feature_set aarch64_feature_cssc =
#define SME_F64F64 &aarch64_feature_sme_f64f64
#define SME_I16I64 &aarch64_feature_sme_i16i64
#define SME2 &aarch64_feature_sme2
+#define SME2_F64F64 &aarch64_feature_sme2_f64f64
#define ARMV8_6 &aarch64_feature_v8_6
#define ARMV8_6_SVE &aarch64_feature_v8_6
#define BFLOAT16_SVE &aarch64_feature_bfloat16_sve
@@ -2692,6 +2695,9 @@ static const aarch64_feature_set aarch64_feature_cssc =
#define SME2_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SME2, OPS, QUALS, \
F_STRICT | FLAGS, 0, TIED, NULL }
+#define SME2_F64F64_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
+ { NAME, OPCODE, MASK, CLASS, OP, SME2_F64F64, OPS, QUALS, \
+ F_STRICT | FLAGS, 0, TIED, NULL }
#define SVE2BITPERM_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SVE2_BITPERM, OPS, QUALS, \
FLAGS | F_STRICT, 0, TIED, NULL }
@@ -5352,6 +5358,18 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("fminnm", 0xc120a921, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
SME2_INSN ("fminnm", 0xc120b121, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1),
SME2_INSN ("fminnm", 0xc120b921, 0xff23ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_HSD, 0, 1),
+ SME2_INSN ("fmla", 0xc1500000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SSS, F_OD (2), 0),
+ SME2_INSN ("fmla", 0xc1508000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SSS, F_OD (4), 0),
+ SME2_INSN ("fmla", 0xc1201800, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("fmla", 0xc1301800, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fmla", 0xc1a01800, 0xffa19c38, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("fmla", 0xc1a11800, 0xffa39c78, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fmls", 0xc1500010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SSS, F_OD (2), 0),
+ SME2_INSN ("fmls", 0xc1508010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SSS, F_OD (4), 0),
+ SME2_INSN ("fmls", 0xc1201808, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("fmls", 0xc1301808, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fmls", 0xc1a01808, 0xffa19c38, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
+ SME2_INSN ("fmls", 0xc1a11808, 0xffa39c78, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fsub", 0xc1a01c08, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fsub", 0xc1a11c08, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
@@ -5557,6 +5575,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("whilelt", 0x25204410, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("zero", 0xc0480001, 0xffffffff, sme_misc, 0, OP1 (SME_ZT0_LIST), {}, 0, 0),
+ /* SME2 F64F64 instructions. */
+ SME2_F64F64_INSN ("fmla", 0xc1d00000, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (2), 0),
+ SME2_F64F64_INSN ("fmla", 0xc1d08000, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (4), 0),
+ SME2_F64F64_INSN ("fmls", 0xc1d00010, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (2), 0),
+ SME2_F64F64_INSN ("fmls", 0xc1d08010, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (4), 0),
+
/* SIMD Dot Product (optional in v8.2-A). */
DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
DOT_INSN ("sdot", 0xe009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
@@ -6268,6 +6292,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(SVE_REG, sme_pred_reg_with_index, "SME_PnT_Wm_imm", 0, \
F(FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl), \
"Source scalable predicate register with index ") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX1", 0, \
+ F(FLD_SME_Zm, FLD_imm1_10), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX2", 0, \
+ F(FLD_SME_Zm, FLD_imm2_10), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX1_16", 0, \
F(FLD_SVE_Zn, FLD_imm1_16), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX2_15", 0, \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 14/31] aarch64: Add the SME2 MLAL and MLSL instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (12 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 13/31] aarch64: Add the SME2 FMLA and FMLS instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 15/31] aarch64: Add the SME2 MLALL and MLSLL instructions Richard Sandiford
` (18 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
The {BF,F,S,U}MLAL and {BF,F,S,U}MLSL instructions share the same
encoding. They are the first instance of a ZA (as opposed to ZA tile)
operand having a range of offsets. As with ZA tiles, the expected
range size is encoded in the operand-specific data field.
---
gas/config/tc-aarch64.c | 4 +
gas/testsuite/gas/aarch64/sme2-12-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-12-invalid.l | 155 ++
gas/testsuite/gas/aarch64/sme2-12-invalid.s | 136 ++
gas/testsuite/gas/aarch64/sme2-12-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-12-noarch.l | 571 ++++++
gas/testsuite/gas/aarch64/sme2-12.d | 579 ++++++
gas/testsuite/gas/aarch64/sme2-12.s | 633 ++++++
include/opcode/aarch64.h | 4 +
opcodes/aarch64-asm-2.c | 36 +-
opcodes/aarch64-asm.c | 4 +-
opcodes/aarch64-dis-2.c | 2000 +++++++++++++------
opcodes/aarch64-dis.c | 8 +-
opcodes/aarch64-opc-2.c | 4 +
opcodes/aarch64-opc.c | 21 +
opcodes/aarch64-opc.h | 3 +
opcodes/aarch64-tbl.h | 74 +
17 files changed, 3573 insertions(+), 665 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-12-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-12-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-12-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-12-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-12-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-12.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-12.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 47ad7048372..2aa38381f47 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6729,6 +6729,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_Zn_INDEX:
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_2:
+ case AARCH64_OPND_SME_Zm_INDEX3_10:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
@@ -7850,8 +7852,10 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->imm.value = val;
break;
+ case AARCH64_OPND_SME_ZA_array_off2x2:
case AARCH64_OPND_SME_ZA_array_off3_0:
case AARCH64_OPND_SME_ZA_array_off3_5:
+ case AARCH64_OPND_SME_ZA_array_off3x2:
case AARCH64_OPND_SME_ZA_array_off4:
if (!parse_dual_indexed_reg (&str, REG_TYPE_ZA,
&info->indexed_za, &qualifier, 0))
diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.d b/gas/testsuite/gas/aarch64/sme2-12-invalid.d
new file mode 100644
index 00000000000..2ce41523b0f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-12-invalid.s
+#error_output: sme2-12-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.l b/gas/testsuite/gas/aarch64/sme2-12-invalid.l
new file mode 100644
index 00000000000..a387bb73806
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.l
@@ -0,0 +1,155 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfmlal 0,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `bfmlal za\.s\[w8,0:1\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,0'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.s b/gas/testsuite/gas/aarch64/sme2-12-invalid.s
new file mode 100644
index 00000000000..1d158ed6912
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.s
@@ -0,0 +1,136 @@
+ bfmlal 0, z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:1], 0, z0.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, 0
+
+ bfmlal za.s[w7, 0:1], z0.h, z0.h[0]
+ bfmlal za.s[w12, 0:1], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:0], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:2], z0.h, z0.h[0]
+ bfmlal za.s[w8, 1:2], z0.h, z0.h[0]
+ bfmlal za.s[w8, 1:0], z0.h, z0.h[0]
+ bfmlal za.s[w8, -2:-1], z0.h, z0.h[0]
+ bfmlal za.s[w8, 16:17], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx2], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, z16.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, z0.h[-1]
+ bfmlal za.s[w8, 0:1], z0.h, z0.h[8]
+ bfmlal za.s[w8, 0:1], z0.s, z0.s[0]
+ bfmlal za.h[w8, 0:1], z0.h, z0.h[0]
+
+ bfmlal za.s[w7, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w12, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:0], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:2], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 1:2], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 1:0], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 8:9], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 16:17], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z1.h - z2.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z1.h, z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z16.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[-1]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[8]
+ bfmlal za.s[w8, 0:1], { z0.s - z1.s }, z0.s[0]
+ bfmlal za.h[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+
+ bfmlal za.s[w7, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w12, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:0], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:2], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 1:2], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 1:0], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 8:9], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 16:17], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z1.h - z4.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z1.h, z3.h, z5.h, z7.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z16.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[-1]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[8]
+ bfmlal za.s[w8, 0:1], { z0.s - z3.s }, z0.s[0]
+ bfmlal za.h[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+
+ bfmlal za.s[w7, 0:1], z0.h, z0.h
+ bfmlal za.s[w12, 0:1], z0.h, z0.h
+ bfmlal za.s[w8, 0], z0.h, z0.h
+ bfmlal za.s[w8, 0:0], z0.h, z0.h
+ bfmlal za.s[w8, 0:2], z0.h, z0.h
+ bfmlal za.s[w8, 1:2], z0.h, z0.h
+ bfmlal za.s[w8, 1:0], z0.h, z0.h
+ bfmlal za.s[w8, -2:-1], z0.h, z0.h
+ bfmlal za.s[w8, 16:17], z0.h, z0.h
+ bfmlal za.s[w8, 0:1, vgx2], z0.h, z0.h
+ bfmlal za.s[w8, 0:1], z0.h, z16.h
+ bfmlal za.s[w8, 0:1], z0.s, z0.s
+ bfmlal za.h[w8, 0:1], z0.h, z0.h
+
+ bfmlal za.s[w7, 0:1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w12, 0:1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:0], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:2], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 1:2], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 1:0], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 8:9], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 16:17], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z1.h, z3.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z16.h
+ bfmlal za.s[w8, 0:1], { z0.s - z1.s }, z0.s
+ bfmlal za.h[w8, 0:1], { z0.h - z1.h }, z0.h
+
+ bfmlal za.s[w7, 0:1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w12, 0:1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:0], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:2], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 1:2], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 1:0], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 8:9], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 16:17], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z1.h, z3.h, z5.h, z7.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z16.h
+ bfmlal za.s[w8, 0:1], { z0.s - z3.s }, z0.s
+ bfmlal za.h[w8, 0:1], { z0.h - z3.h }, z0.h
+
+ bfmlal za.s[w7, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w12, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, -2:-1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 1:2], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 8:9], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z1.h - z2.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z15.h - z16.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z31.h, z0.h }
+
+ bfmlal za.s[w7, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w12, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, -2:-1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 1:2], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 8:9], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z1.h - z4.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z2.h - z5.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z3.h - z6.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z15.h - z18.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z29.h, z30.h, z31.h, z0.h }
+
+ bfmlal za.s[w8, 0:1], { z0.h - z2.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z2.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z4.h }
+
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z1.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z3.h }, { z0.h - z1.h }
+ bfmlal za[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-12-noarch.d b/gas/testsuite/gas/aarch64/sme2-12-noarch.d
new file mode 100644
index 00000000000..ecaeede5221
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-12.s
+#error_output: sme2-12-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-12-noarch.l b/gas/testsuite/gas/aarch64/sme2-12-noarch.l
new file mode 100644
index 00000000000..7544d1e2164
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12-noarch.l
@@ -0,0 +1,571 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z1\.h-z4\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h,z30\.h,z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-12.d b/gas/testsuite/gas/aarch64/sme2-12.d
new file mode 100644
index 00000000000..958a1bd3f58
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12.d
@@ -0,0 +1,579 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801010 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1807010 bfmlal za\.s\[w11, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801017 bfmlal za\.s\[w8, 14:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18013f0 bfmlal za\.s\[w8, 0:1\], z31\.h, z0\.h\[0\]
+[^:]+: c18f1010 bfmlal za\.s\[w8, 0:1\], z0\.h, z15\.h\[0\]
+[^:]+: c1809c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[7\]
+[^:]+: c1893ab5 bfmlal za\.s\[w9, 10:11\], z21\.h, z9\.h\[2\]
+[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1907010 bfmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1901013 bfmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c19013d0 bfmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f1010 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1901c14 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1993656 bfmlal za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z9\.h\[3\]
+[^:]+: c1909010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190f010 bfmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909013 bfmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1909390 bfmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f9010 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1909c14 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ebb16 bfmlal za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h\[5\]
+[^:]+: c1200c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h
+[^:]+: c1206c10 bfmlal za\.s\[w11, 0:1\], z0\.h, z0\.h
+[^:]+: c1200c17 bfmlal za\.s\[w8, 14:15\], z0\.h, z0\.h
+[^:]+: c1200ff0 bfmlal za\.s\[w8, 0:1\], z31\.h, z0\.h
+[^:]+: c12f0c10 bfmlal za\.s\[w8, 0:1\], z0\.h, z15\.h
+[^:]+: c1274f31 bfmlal za\.s\[w10, 2:3\], z25\.h, z7\.h
+[^:]+: c1200810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1206810 bfmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200813 bfmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1200830 bfmlal za\.s\[w8, 0:1, vgx2\], {z1\.h-z2\.h}, z0\.h
+[^:]+: c1200bd0 bfmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c1200bf0 bfmlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c1200bf0 bfmlal za\.s\[w8, 0:1, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12f0810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12d2a52 bfmlal za\.s\[w9, 4:5, vgx2\], {z18\.h-z19\.h}, z13\.h
+[^:]+: c1300810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1306810 bfmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1300813 bfmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1306830 bfmlal za\.s\[w11, 0:1, vgx4\], {z1\.h-z4\.h}, z0\.h
+[^:]+: c1300b90 bfmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c1300bb0 bfmlal za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1300bb0 bfmlal za\.s\[w8, 0:1, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c1300bd0 bfmlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1300bd0 bfmlal za\.s\[w8, 0:1, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c1300bf0 bfmlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c1300bf0 bfmlal za\.s\[w8, 0:1, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13f0810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c13e2b12 bfmlal za\.s\[w9, 4:5, vgx4\], {z24\.h-z27\.h}, z14\.h
+[^:]+: c1a00810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a06810 bfmlal za\.s\[w11, 0:1, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00813 bfmlal za\.s\[w8, 6:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a00bd0 bfmlal za\.s\[w8, 0:1, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be0810 bfmlal za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b24ad1 bfmlal za\.s\[w10, 2:3, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a10810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a16810 bfmlal za\.s\[w11, 0:1, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10813 bfmlal za\.s\[w8, 6:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a10b90 bfmlal za\.s\[w8, 0:1, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd0810 bfmlal za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b96a12 bfmlal za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1801018 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801018 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
+[^:]+: c1801018 bfmlsl za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\]
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+[^:]+: c1600818 umlsl za\.s\[w8, 0:1, vgx2\], {z0\.h-z1\.h}, z0\.h
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+[^:]+: c1fd0818 umlsl za\.s\[w8, 0:1, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96a1a umlsl za\.s\[w11, 4:5, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
diff --git a/gas/testsuite/gas/aarch64/sme2-12.s b/gas/testsuite/gas/aarch64/sme2-12.s
new file mode 100644
index 00000000000..5210e40fe15
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-12.s
@@ -0,0 +1,633 @@
+ bfmlal za.s[w8, 0:1], z0.h, z0.h[0]
+ BFMLAL ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+ BFMLAL ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+ bfmlal za.s[w11, 0:1], z0.h, z0.h[0]
+ bfmlal za.s[w8, 14:15], z0.h, z0.h[0]
+ bfmlal za.s[w8, 0:1], z31.h, z0.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, z15.h[0]
+ bfmlal za.s[w8, 0:1], z0.h, z0.h[7]
+ bfmlal za.s[w9, 10:11], z21.h, z9.h[2]
+
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ bfmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ bfmlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ bfmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ bfmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ bfmlal za.s[w8, 0:1], z0.h, z0.h
+ BFMLAL ZA.s[W8, 0:1], Z0.h, Z0.h
+ BFMLAL ZA.S[W8, 0:1], Z0.H, Z0.H
+ bfmlal za.s[w11, 0:1], z0.h, z0.h
+ bfmlal za.s[w8, 14:15], z0.h, z0.h
+ bfmlal za.s[w8, 0:1], z31.h, z0.h
+ bfmlal za.s[w8, 0:1], z0.h, z15.h
+ bfmlal za.s[w10, 2:3], z25.h, z7.h
+
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+ BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+ bfmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z1.h - z2.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ bfmlal za.s[w9, 4:5], { z18.h - z19.h }, z13.h
+
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+ BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+ bfmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ bfmlal za.s[w11, 0:1], { z1.h - z4.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z29.h, z30.h, z31.h, z0.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ bfmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h
+
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ BFMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ BFMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ bfmlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ bfmlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ BFMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ BFMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ bfmlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ bfmlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ bfmlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ bfmlsl za.s[w8, 0:1], z0.h, z0.h[0]
+ BFMLSL ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+ BFMLSL ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+ bfmlsl za.s[w11, 0:1], z0.h, z0.h[0]
+ bfmlsl za.s[w8, 14:15], z0.h, z0.h[0]
+ bfmlsl za.s[w8, 0:1], z31.h, z0.h[0]
+ bfmlsl za.s[w8, 0:1], z0.h, z15.h[0]
+ bfmlsl za.s[w8, 0:1], z0.h, z0.h[7]
+ bfmlsl za.s[w9, 10:11], z21.h, z9.h[2]
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ bfmlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ bfmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ bfmlsl za.s[w8, 0:1], z0.h, z0.h
+ BFMLSL ZA.s[W8, 0:1], Z0.h, Z0.h
+ BFMLSL ZA.S[W8, 0:1], Z0.H, Z0.H
+ bfmlsl za.s[w11, 0:1], z0.h, z0.h
+ bfmlsl za.s[w8, 14:15], z0.h, z0.h
+ bfmlsl za.s[w8, 0:1], z31.h, z0.h
+ bfmlsl za.s[w8, 0:1], z0.h, z15.h
+ bfmlsl za.s[w10, 2:3], z25.h, z7.h
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+ BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+ bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ bfmlsl za.s[w9, 4:5], { z18.h - z19.h }, z13.h
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+ BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+ bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ bfmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ BFMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ BFMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ bfmlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ bfmlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ bfmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ bfmlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ BFMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ BFMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ bfmlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ bfmlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ bfmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ bfmlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ fmlal za.s[w8, 0:1], z0.h, z0.h[0]
+ FMLAL ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+ FMLAL ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+ fmlal za.s[w11, 0:1], z0.h, z0.h[0]
+ fmlal za.s[w8, 14:15], z0.h, z0.h[0]
+ fmlal za.s[w8, 0:1], z31.h, z0.h[0]
+ fmlal za.s[w8, 0:1], z0.h, z15.h[0]
+ fmlal za.s[w8, 0:1], z0.h, z0.h[7]
+ fmlal za.s[w9, 10:11], z21.h, z9.h[2]
+
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ fmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ fmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ fmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ fmlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ fmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ fmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ fmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ fmlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ fmlal za.s[w8, 0:1], z0.h, z0.h
+ FMLAL ZA.s[W8, 0:1], Z0.h, Z0.h
+ FMLAL ZA.S[W8, 0:1], Z0.H, Z0.H
+ fmlal za.s[w11, 0:1], z0.h, z0.h
+ fmlal za.s[w8, 14:15], z0.h, z0.h
+ fmlal za.s[w8, 0:1], z31.h, z0.h
+ fmlal za.s[w8, 0:1], z0.h, z15.h
+ fmlal za.s[w10, 2:3], z25.h, z7.h
+
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+ FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+ fmlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ fmlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ fmlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ fmlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ fmlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ fmlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+ FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+ fmlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ fmlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ fmlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ fmlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ fmlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ fmlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ fmlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ fmlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ FMLAL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ FMLAL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ fmlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ fmlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ fmlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ FMLAL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ FMLAL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ fmlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ fmlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ fmlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ fmlsl za.s[w8, 0:1], z0.h, z0.h[0]
+ FMLSL ZA.s[W8, 0:1], Z0.h, Z0.h[0]
+ FMLSL ZA.S[W8, 0:1], Z0.H, Z0.H[0]
+ fmlsl za.s[w11, 0:1], z0.h, z0.h[0]
+ fmlsl za.s[w8, 14:15], z0.h, z0.h[0]
+ fmlsl za.s[w8, 0:1], z31.h, z0.h[0]
+ fmlsl za.s[w8, 0:1], z0.h, z15.h[0]
+ fmlsl za.s[w8, 0:1], z0.h, z0.h[7]
+ fmlsl za.s[w9, 10:11], z21.h, z9.h[2]
+
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ fmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ fmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ fmlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ fmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ fmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ fmlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ fmlsl za.s[w8, 0:1], z0.h, z0.h
+ FMLSL ZA.s[W8, 0:1], Z0.h, Z0.h
+ FMLSL ZA.S[W8, 0:1], Z0.H, Z0.H
+ fmlsl za.s[w11, 0:1], z0.h, z0.h
+ fmlsl za.s[w8, 14:15], z0.h, z0.h
+ fmlsl za.s[w8, 0:1], z31.h, z0.h
+ fmlsl za.s[w8, 0:1], z0.h, z15.h
+ fmlsl za.s[w10, 2:3], z25.h, z7.h
+
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, Z0.h
+ FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, Z0.H
+ fmlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ fmlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ fmlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, Z0.h
+ FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, Z0.H
+ fmlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ fmlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ fmlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ FMLSL ZA.s[W8, 0:1, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ FMLSL ZA.S[W8, 0:1, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ fmlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ fmlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ fmlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ fmlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ FMLSL ZA.s[W8, 0:1, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ FMLSL ZA.S[W8, 0:1, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ fmlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ fmlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ fmlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ fmlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ smlal za.s[w8, 0:1], z0.h, z0.h[0]
+ smlal za.s[w11, 0:1], z0.h, z0.h[0]
+ smlal za.s[w8, 14:15], z0.h, z0.h[0]
+ smlal za.s[w8, 0:1], z31.h, z0.h[0]
+ smlal za.s[w8, 0:1], z0.h, z15.h[0]
+ smlal za.s[w8, 0:1], z0.h, z0.h[7]
+ smlal za.s[w9, 10:11], z21.h, z9.h[2]
+
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ smlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ smlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ smlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ smlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ smlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ smlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ smlal za.s[w8, 0:1], z0.h, z0.h
+ smlal za.s[w11, 0:1], z0.h, z0.h
+ smlal za.s[w8, 14:15], z0.h, z0.h
+ smlal za.s[w8, 0:1], z31.h, z0.h
+ smlal za.s[w8, 0:1], z0.h, z15.h
+ smlal za.s[w10, 2:3], z25.h, z7.h
+
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ smlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ smlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ smlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ smlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ smlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ smlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ smlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ smlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ smlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ smlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ smlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ smlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ smlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ smlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ smlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ smlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ smlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ smlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ smlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ smlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ smlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ smlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ smlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ smlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ smlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ smlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ smlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ smlsl za.s[w8, 0:1], z0.h, z0.h[0]
+ smlsl za.s[w11, 0:1], z0.h, z0.h[0]
+ smlsl za.s[w8, 14:15], z0.h, z0.h[0]
+ smlsl za.s[w8, 0:1], z31.h, z0.h[0]
+ smlsl za.s[w8, 0:1], z0.h, z15.h[0]
+ smlsl za.s[w8, 0:1], z0.h, z0.h[7]
+ smlsl za.s[w9, 10:11], z21.h, z9.h[2]
+
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ smlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ smlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ smlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ smlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ smlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ smlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ smlsl za.s[w8, 0:1], z0.h, z0.h
+ smlsl za.s[w11, 0:1], z0.h, z0.h
+ smlsl za.s[w8, 14:15], z0.h, z0.h
+ smlsl za.s[w8, 0:1], z31.h, z0.h
+ smlsl za.s[w8, 0:1], z0.h, z15.h
+ smlsl za.s[w10, 2:3], z25.h, z7.h
+
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ smlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ smlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ smlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ smlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ smlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ smlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ smlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ smlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ smlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ smlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ smlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ smlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ smlsl za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ smlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ smlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ smlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ smlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ smlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ smlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ umlal za.s[w8, 0:1], z0.h, z0.h[0]
+ umlal za.s[w11, 0:1], z0.h, z0.h[0]
+ umlal za.s[w8, 14:15], z0.h, z0.h[0]
+ umlal za.s[w8, 0:1], z31.h, z0.h[0]
+ umlal za.s[w8, 0:1], z0.h, z15.h[0]
+ umlal za.s[w8, 0:1], z0.h, z0.h[7]
+ umlal za.s[w9, 10:11], z21.h, z9.h[2]
+
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ umlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ umlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ umlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ umlal za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ umlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ umlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ umlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ umlal za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ umlal za.s[w8, 0:1], z0.h, z0.h
+ umlal za.s[w11, 0:1], z0.h, z0.h
+ umlal za.s[w8, 14:15], z0.h, z0.h
+ umlal za.s[w8, 0:1], z31.h, z0.h
+ umlal za.s[w8, 0:1], z0.h, z15.h
+ umlal za.s[w10, 2:3], z25.h, z7.h
+
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ umlal za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ umlal za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ umlal za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ umlal za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ umlal za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ umlal za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ umlal za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ umlal za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ umlal za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ umlal za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ umlal za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ umlal za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ umlal za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ umlal za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ umlal za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ umlal za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ umlal za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ umlal za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ umlal za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ umlal za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ umlal za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ umlal za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ umlal za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ umlal za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ umlal za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ umlal za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ umlal za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
+
+ umlsl za.s[w8, 0:1], z0.h, z0.h[0]
+ umlsl za.s[w11, 0:1], z0.h, z0.h[0]
+ umlsl za.s[w8, 14:15], z0.h, z0.h[0]
+ umlsl za.s[w8, 0:1], z31.h, z0.h[0]
+ umlsl za.s[w8, 0:1], z0.h, z15.h[0]
+ umlsl za.s[w8, 0:1], z0.h, z0.h[7]
+ umlsl za.s[w9, 10:11], z21.h, z9.h[2]
+
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h[0]
+ umlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h[0]
+ umlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h[0]
+ umlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h[0]
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h[0]
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h[7]
+ umlsl za.s[w9, 4:5], { z18.h - z19.h }, z9.h[3]
+
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h[0]
+ umlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h[0]
+ umlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h[0]
+ umlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h[0]
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h[0]
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h[7]
+ umlsl za.s[w9, 4:5], { z24.h - z27.h }, z14.h[5]
+
+ umlsl za.s[w8, 0:1], z0.h, z0.h
+ umlsl za.s[w11, 0:1], z0.h, z0.h
+ umlsl za.s[w8, 14:15], z0.h, z0.h
+ umlsl za.s[w8, 0:1], z31.h, z0.h
+ umlsl za.s[w8, 0:1], z0.h, z15.h
+ umlsl za.s[w10, 2:3], z25.h, z7.h
+
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z0.h
+ umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, z0.h
+ umlsl za.s[w11, 0:1], { z0.h - z1.h }, z0.h
+ umlsl za.s[w8, 6:7], { z0.h - z1.h }, z0.h
+ umlsl za.s[w8, 0:1], { z30.h - z31.h }, z0.h
+ umlsl za.s[w8, 0:1], { z31.h, z0.h }, z0.h
+ umlsl za.s[w8, 0:1], { z31.h - z0.h }, z0.h
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, z15.h
+ umlsl za.s[w9, 4:5], { z19.h - z20.h }, z13.h
+
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z0.h
+ umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, z0.h
+ umlsl za.s[w11, 0:1], { z0.h - z3.h }, z0.h
+ umlsl za.s[w8, 6:7], { z0.h - z3.h }, z0.h
+ umlsl za.s[w8, 0:1], { z28.h - z31.h }, z0.h
+ umlsl za.s[w8, 0:1], { z29.h - z0.h }, z0.h
+ umlsl za.s[w8, 0:1], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ umlsl za.s[w8, 0:1], { z30.h - z1.h }, z0.h
+ umlsl za.s[w8, 0:1], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ umlsl za.s[w8, 0:1], { z31.h - z2.h }, z0.h
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, z15.h
+ umlsl za.s[w9, 4:5], { z25.h - z28.h }, z14.h
+
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsl za.s[w8, 0:1, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsl za.s[w11, 0:1], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsl za.s[w8, 6:7], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsl za.s[w8, 0:1], { z30.h - z31.h }, { z0.h - z1.h }
+ umlsl za.s[w8, 0:1], { z0.h - z1.h }, { z30.h - z31.h }
+ umlsl za.s[w10, 2:3], { z22.h - z23.h }, { z18.h - z19.h }
+
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsl za.s[w8, 0:1, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsl za.s[w11, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsl za.s[w8, 6:7], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsl za.s[w8, 0:1], { z28.h - z31.h }, { z0.h - z3.h }
+ umlsl za.s[w8, 0:1], { z0.h - z3.h }, { z28.h - z31.h }
+ umlsl za.s[w11, 4:5], { z16.h - z19.h }, { z24.h - z27.h }
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 8c7646a0ce3..3b58bfaf146 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -510,14 +510,18 @@ enum aarch64_opnd
AARCH64_OPND_SME_PNn3_INDEX2, /* Indexed pred-as-counter reg, bits [9:5]. */
AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */
AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
+ AARCH64_OPND_SME_ZA_array_off2x2, /* SME ZA[<Wv>, #<imm2>*2:<imm2>*2+1]. */
AARCH64_OPND_SME_ZA_array_off3_0, /* SME ZA[<Wv>{, #<imm3>}]. */
AARCH64_OPND_SME_ZA_array_off3_5, /* SME ZA[<Wv>{, #<imm3>}]. */
+ AARCH64_OPND_SME_ZA_array_off3x2, /* SME ZA[<Wv>, #<imm3>*2:<imm3>*2+1]. */
AARCH64_OPND_SME_ZA_array_off4, /* SME ZA[<Wv>{, #<imm>}]. */
AARCH64_OPND_SME_ADDR_RI_U4xVL, /* SME [<Xn|SP>{, #<imm>, MUL VL}]. */
AARCH64_OPND_SME_SM_ZA, /* SME {SM | ZA}. */
AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
AARCH64_OPND_SME_Zm_INDEX1, /* Zn.T[index], bits [19:16,10]. */
AARCH64_OPND_SME_Zm_INDEX2, /* Zn.T[index], bits [19:16,11:10]. */
+ AARCH64_OPND_SME_Zm_INDEX3_2, /* Zn.T[index], bits [19:16,11:10,2]. */
+ AARCH64_OPND_SME_Zm_INDEX3_10, /* Zn.T[index], bits [19:16,15,11:10]. */
AARCH64_OPND_SME_Zn_INDEX1_16, /* Zn[index], bits [9:5] and [16:16]. */
AARCH64_OPND_SME_Zn_INDEX2_15, /* Zn[index], bits [9:5] and [16:15]. */
AARCH64_OPND_SME_Zn_INDEX2_16, /* Zn[index], bits [9:5] and [17:16]. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index b4ce19d8194..badf3dc4c2a 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -685,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 259:
+ case 263:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -731,12 +731,12 @@ aarch64_insert_operand (const aarch64_operand *self,
case 193:
case 194:
case 237:
- case 253:
- case 254:
- case 256:
+ case 257:
case 258:
- case 263:
- case 264:
+ case 260:
+ case 262:
+ case 267:
+ case 268:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -805,8 +805,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 255:
- case 257:
+ case 259:
+ case 261:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
@@ -919,28 +919,32 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 245:
- case 246:
case 247:
case 248:
case 249:
case 250:
case 251:
case 252:
+ case 253:
+ case 254:
+ case 255:
+ case 256:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 239:
case 240:
case 241:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 242:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 243:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 244:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 245:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 246:
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 260:
- case 261:
- case 262:
+ case 264:
+ case 265:
+ case 266:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index f2b7d7d2d62..b1d2d589a13 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1487,8 +1487,10 @@ aarch64_ins_sme_za_array (const aarch64_operand *self,
{
int regno = info->indexed_za.index.regno & 3;
int imm = info->indexed_za.index.imm;
+ int countm1 = info->indexed_za.index.countm1;
+ assert (imm % (countm1 + 1) == 0);
insert_field (self->fields[0], code, regno, 0);
- insert_field (self->fields[1], code, imm, 0);
+ insert_field (self->fields[1], code, imm / (countm1 + 1), 0);
return true;
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index bfe2bc25e9d..a7578ca0bbc 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2670;
+ return 2734;
}
}
}
@@ -190,7 +190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2539;
+ return 2571;
}
else
{
@@ -198,7 +198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2538;
+ return 2570;
}
}
else
@@ -207,7 +207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2537;
+ return 2569;
}
}
}
@@ -226,7 +226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2546;
+ return 2578;
}
else
{
@@ -234,7 +234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2542;
+ return 2574;
}
}
else
@@ -247,7 +247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2536;
+ return 2568;
}
else
{
@@ -255,7 +255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2535;
+ return 2567;
}
}
else
@@ -268,7 +268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2557;
+ return 2589;
}
else
{
@@ -276,7 +276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2556;
+ return 2588;
}
}
else
@@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2534;
+ return 2566;
}
}
}
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2544;
+ return 2576;
}
else
{
@@ -306,7 +306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2540;
+ return 2572;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2547;
+ return 2579;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2543;
+ return 2575;
}
}
else
@@ -339,7 +339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2545;
+ return 2577;
}
else
{
@@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2541;
+ return 2573;
}
}
}
@@ -374,7 +374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2473;
+ return 2505;
}
else
{
@@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2474;
+ return 2506;
}
}
else
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2497;
+ return 2529;
}
else
{
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2498;
+ return 2530;
}
}
}
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2489;
+ return 2521;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2490;
+ return 2522;
}
}
else
@@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2481;
+ return 2513;
}
else
{
@@ -442,7 +442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2482;
+ return 2514;
}
}
}
@@ -459,7 +459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2505;
+ return 2537;
}
else
{
@@ -467,7 +467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2506;
+ return 2538;
}
}
else
@@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2529;
+ return 2561;
}
else
{
@@ -486,7 +486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2530;
+ return 2562;
}
}
}
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2521;
+ return 2553;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2522;
+ return 2554;
}
}
else
@@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2513;
+ return 2545;
}
else
{
@@ -527,7 +527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2514;
+ return 2546;
}
}
}
@@ -591,7 +591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2469;
+ return 2501;
}
else
{
@@ -599,7 +599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2470;
+ return 2502;
}
}
else
@@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2493;
+ return 2525;
}
else
{
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2494;
+ return 2526;
}
}
}
@@ -632,7 +632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2485;
+ return 2517;
}
else
{
@@ -640,7 +640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2486;
+ return 2518;
}
}
else
@@ -651,7 +651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2477;
+ return 2509;
}
else
{
@@ -659,7 +659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2478;
+ return 2510;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2501;
+ return 2533;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2502;
+ return 2534;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2525;
+ return 2557;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2526;
+ return 2558;
}
}
}
@@ -717,7 +717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2517;
+ return 2549;
}
else
{
@@ -725,7 +725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2518;
+ return 2550;
}
}
else
@@ -736,7 +736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2509;
+ return 2541;
}
else
{
@@ -744,7 +744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2510;
+ return 2542;
}
}
}
@@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2583;
+ return 2631;
}
else
{
@@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2584;
+ return 2632;
}
}
else
@@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2607;
+ return 2655;
}
else
{
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2608;
+ return 2656;
}
}
}
@@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2599;
+ return 2647;
}
else
{
@@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2600;
+ return 2648;
}
}
else
@@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2591;
+ return 2639;
}
else
{
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2592;
+ return 2640;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2615;
+ return 2663;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2616;
+ return 2664;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2639;
+ return 2687;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2640;
+ return 2688;
}
}
}
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2631;
+ return 2679;
}
else
{
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2632;
+ return 2680;
}
}
else
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2623;
+ return 2671;
}
else
{
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2624;
+ return 2672;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2579;
+ return 2627;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2580;
+ return 2628;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2603;
+ return 2651;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2604;
+ return 2652;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2595;
+ return 2643;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2596;
+ return 2644;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2587;
+ return 2635;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2588;
+ return 2636;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2611;
+ return 2659;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2612;
+ return 2660;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2635;
+ return 2683;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2636;
+ return 2684;
}
}
}
@@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2627;
+ return 2675;
}
else
{
@@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2628;
+ return 2676;
}
}
else
@@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2619;
+ return 2667;
}
else
{
@@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2620;
+ return 2668;
}
}
}
@@ -1274,7 +1274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2475;
+ return 2507;
}
else
{
@@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2499;
+ return 2531;
}
}
else
@@ -1293,7 +1293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2491;
+ return 2523;
}
else
{
@@ -1301,7 +1301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2483;
+ return 2515;
}
}
}
@@ -1315,7 +1315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2507;
+ return 2539;
}
else
{
@@ -1323,7 +1323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2531;
+ return 2563;
}
}
else
@@ -1334,7 +1334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2523;
+ return 2555;
}
else
{
@@ -1342,7 +1342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2515;
+ return 2547;
}
}
}
@@ -1370,7 +1370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2476;
+ return 2508;
}
else
{
@@ -1378,7 +1378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x00001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2533;
+ return 2565;
}
}
else
@@ -1387,7 +1387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2500;
+ return 2532;
}
}
else
@@ -1398,7 +1398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2492;
+ return 2524;
}
else
{
@@ -1406,7 +1406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2484;
+ return 2516;
}
}
}
@@ -1420,7 +1420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2508;
+ return 2540;
}
else
{
@@ -1428,7 +1428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2532;
+ return 2564;
}
}
else
@@ -1439,7 +1439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2524;
+ return 2556;
}
else
{
@@ -1447,7 +1447,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2516;
+ return 2548;
}
}
}
@@ -1455,42 +1455,174 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 4) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001100xxxxxxxxxxxxxxxx0xxxx
- bfmopa. */
- return 2363;
+ if (((word >> 29) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000001100xxxxxxxxxxxxxxxx00xxx
+ bfmopa. */
+ return 2363;
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxxxxxxxxxx00xxx
+ fmlal. */
+ return 2477;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xxxxxxxxxx00xxx
+ fmlal. */
+ return 2478;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xxxxxxxxxx00xxx
+ fmlal. */
+ return 2479;
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001100xxxxxxxxxxxxxxxx00xxx
+ usmopa. */
+ return 2384;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001100xxxxxxxxxxxxxxxx0xxxx
- usmopa. */
- return 2384;
+ if (((word >> 29) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000001100xxxxxxxxxxxxxxxx10xxx
+ bfmops. */
+ return 2364;
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxxxxxxxxxx10xxx
+ bfmlal. */
+ return 2436;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xxxxxxxxxx10xxx
+ bfmlal. */
+ return 2437;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xxxxxxxxxx10xxx
+ bfmlal. */
+ return 2438;
+ }
+ }
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001100xxxxxxxxxxxxxxxx10xxx
+ usmops. */
+ return 2386;
+ }
}
}
else
{
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001100xxxxxxxxxxxxxxxx1xxxx
- bfmops. */
- return 2364;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011000xxxxxxxxxxxxxxx01xxx
+ fmlsl. */
+ return 2491;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xxxxxxxxxx01xxx
+ fmlsl. */
+ return 2492;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xxxxxxxxxx01xxx
+ fmlsl. */
+ return 2493;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001100xxxxxxxxxxxxxxxx1xxxx
- usmops. */
- return 2386;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011000xxxxxxxxxxxxxxx11xxx
+ bfmlsl. */
+ return 2444;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xxxxxxxxxx11xxx
+ bfmlsl. */
+ return 2445;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xxxxxxxxxx11xxx
+ bfmlsl. */
+ return 2446;
+ }
+ }
}
}
}
@@ -1513,7 +1645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2471;
+ return 2503;
}
else
{
@@ -1521,7 +1653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2495;
+ return 2527;
}
}
else
@@ -1532,7 +1664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2487;
+ return 2519;
}
else
{
@@ -1540,7 +1672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2479;
+ return 2511;
}
}
}
@@ -1552,7 +1684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxxx00xxx
fmla. */
- return 2455;
+ return 2471;
}
else
{
@@ -1560,7 +1692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxxx10xxx
fmls. */
- return 2461;
+ return 2485;
}
}
}
@@ -1576,7 +1708,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2472;
+ return 2504;
}
else
{
@@ -1584,7 +1716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2496;
+ return 2528;
}
}
else
@@ -1595,7 +1727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2488;
+ return 2520;
}
else
{
@@ -1603,7 +1735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2480;
+ return 2512;
}
}
}
@@ -1615,7 +1747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxxx00xxx
fmla. */
- return 2456;
+ return 2472;
}
else
{
@@ -1623,7 +1755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxxx10xxx
fmls. */
- return 2462;
+ return 2486;
}
}
}
@@ -1640,7 +1772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2503;
+ return 2535;
}
else
{
@@ -1648,7 +1780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2504;
+ return 2536;
}
}
else
@@ -1659,7 +1791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2527;
+ return 2559;
}
else
{
@@ -1667,7 +1799,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2528;
+ return 2560;
}
}
}
@@ -1681,7 +1813,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2519;
+ return 2551;
}
else
{
@@ -1689,7 +1821,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2520;
+ return 2552;
}
}
else
@@ -1700,7 +1832,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2511;
+ return 2543;
}
else
{
@@ -1708,7 +1840,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001010xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2512;
+ return 2544;
}
}
}
@@ -1720,21 +1852,87 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001110xxxxx0xxxxxxxxxx0xxxx
- fmla. */
- return 2671;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx0xx0xxxxxxx00xxx
+ fmla. */
+ return 2735;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx1xx0xxxxxxx00xxx
+ fmla. */
+ return 2736;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011100xxxxxxx1xxxxxxx00xxx
+ smlal. */
+ return 2603;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx0xx1xxxxxxx00xxx
+ smlal. */
+ return 2604;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx1xx1xxxxxxx00xxx
+ smlal. */
+ return 2605;
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001110xxxxx1xxxxxxxxxx0xxxx
- fmla. */
- return 2672;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011100xxxxxxxxxxxxxxx01xxx
+ smlsl. */
+ return 2611;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx0xxxxxxxxxx01xxx
+ smlsl. */
+ return 2612;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx1xxxxxxxxxx01xxx
+ smlsl. */
+ return 2613;
+ }
+ }
}
}
else
@@ -1759,32 +1957,98 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 29) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 29) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001110xxxxx0xxxxxxxxxx1xxxx
- fmls. */
- return 2673;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx0xx0xxxxxxx10xxx
+ fmls. */
+ return 2737;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx1xx0xxxxxxx10xxx
+ fmls. */
+ return 2738;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011100xxxxxxx1xxxxxxx10xxx
+ umlal. */
+ return 2706;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx0xx1xxxxxxx10xxx
+ umlal. */
+ return 2707;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx1xx1xxxxxxx10xxx
+ umlal. */
+ return 2708;
+ }
+ }
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx000001110xxxxx1xxxxxxxxxx1xxxx
- fmls. */
- return 2674;
+ xx100001110xxxxxxxxxxxxxxxx10xxx
+ usmops. */
+ return 2387;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100001110xxxxxxxxxxxxxxxx1xxxx
- usmops. */
- return 2387;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011100xxxxxxxxxxxxxxx11xxx
+ umlsl. */
+ return 2714;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011101xxxx0xxxxxxxxxx11xxx
+ umlsl. */
+ return 2715;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011101xxxx1xxxxxxxxxx11xxx
+ umlsl. */
+ return 2716;
+ }
+ }
}
}
}
@@ -1823,23 +2087,152 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx0x0xxxxx00xxx
+ fmlal. */
+ return 2481;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx0x0xxxxx00xxx
+ fmlal. */
+ return 2482;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx0x0xxxxx00xxx
+ fmlal. */
+ return 2483;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx0x0xxxxx00xxx
+ fmlal. */
+ return 2484;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx0x0xxxxx00xxx
+ smlal. */
+ return 2607;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx0x0xxxxx00xxx
+ smlal. */
+ return 2608;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx0x0xxxxx00xxx
+ smlal. */
+ return 2609;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx0x0xxxxx00xxx
+ smlal. */
+ return 2610;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx1x0xxxxx00xxx
+ fmla. */
+ return 2473;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx1x0xxxxx00xxx
+ fmla. */
+ return 2474;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx1x0xxxxx00xxx
+ fmla. */
+ return 2475;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx1x0xxxxx00xxx
+ fmla. */
+ return 2476;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxxx0xxxxx00xxx
- fmla. */
- return 2457;
+ x1000001x01xxxxx0xx0x1xxxxx00xxx
+ fmlal. */
+ return 2480;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxxx0xxxxx00xxx
- fmla. */
- return 2458;
+ x1000001x11xxxxx0xx0x1xxxxx00xxx
+ smlal. */
+ return 2606;
}
}
else
@@ -1848,61 +2241,171 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxxx0xxxxx00xxx
- fmla. */
- return 2459;
+ x1000001xx1xxxx00xx1x1xxxxx00xxx
+ fadd. */
+ return 2453;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxxx0xxxxx00xxx
- fmla. */
- return 2460;
+ x1000001xx1xxxx10xx1x1xxxxx00xxx
+ fadd. */
+ return 2454;
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxx1xxxxx00xxx
- fadd. */
- return 2437;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx0x0xxxxx10xxx
+ bfmlal. */
+ return 2440;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx0x0xxxxx10xxx
+ bfmlal. */
+ return 2441;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx0x0xxxxx10xxx
+ bfmlal. */
+ return 2442;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx0x0xxxxx10xxx
+ bfmlal. */
+ return 2443;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx0x0xxxxx10xxx
+ umlal. */
+ return 2710;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx0x0xxxxx10xxx
+ umlal. */
+ return 2711;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx0x0xxxxx10xxx
+ umlal. */
+ return 2712;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx0x0xxxxx10xxx
+ umlal. */
+ return 2713;
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxx1xxxxx00xxx
- fadd. */
- return 2438;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx1x0xxxxx10xxx
+ add. */
+ return 2430;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx1x0xxxxx10xxx
+ add. */
+ return 2431;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx1x0xxxxx10xxx
+ add. */
+ return 2432;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx1x0xxxxx10xxx
+ add. */
+ return 2433;
+ }
+ }
}
}
- }
- else
- {
- if (((word >> 10) & 0x1) == 0)
+ else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxxx0xxxxx10xxx
- add. */
- return 2430;
+ x1000001x01xxxxx0xx0x1xxxxx10xxx
+ bfmlal. */
+ return 2439;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxxx0xxxxx10xxx
- add. */
- return 2431;
+ x1000001x11xxxxx0xx0x1xxxxx10xxx
+ umlal. */
+ return 2709;
}
}
else
@@ -1911,39 +2414,20 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxxx0xxxxx10xxx
+ x1000001xx1xxxx00xx1x1xxxxx10xxx
add. */
- return 2432;
+ return 2428;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxxx0xxxxx10xxx
+ x1000001xx1xxxx10xx1x1xxxxx10xxx
add. */
- return 2433;
+ return 2429;
}
}
}
- else
- {
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxx1xxxxx10xxx
- add. */
- return 2428;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxx1xxxxx10xxx
- add. */
- return 2429;
- }
- }
}
}
else
@@ -1952,23 +2436,152 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx0x0xxxxx01xxx
+ fmlsl. */
+ return 2495;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx0x0xxxxx01xxx
+ fmlsl. */
+ return 2496;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx0x0xxxxx01xxx
+ fmlsl. */
+ return 2497;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx0x0xxxxx01xxx
+ fmlsl. */
+ return 2498;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx0x0xxxxx01xxx
+ smlsl. */
+ return 2615;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx0x0xxxxx01xxx
+ smlsl. */
+ return 2616;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx0x0xxxxx01xxx
+ smlsl. */
+ return 2617;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx0x0xxxxx01xxx
+ smlsl. */
+ return 2618;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx1x0xxxxx01xxx
+ fmls. */
+ return 2487;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx1x0xxxxx01xxx
+ fmls. */
+ return 2488;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx1x0xxxxx01xxx
+ fmls. */
+ return 2489;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx1x0xxxxx01xxx
+ fmls. */
+ return 2490;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxxx0xxxxx01xxx
- fmls. */
- return 2463;
+ x1000001x01xxxxx0xx0x1xxxxx01xxx
+ fmlsl. */
+ return 2494;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxxx0xxxxx01xxx
- fmls. */
- return 2464;
+ x1000001x11xxxxx0xx0x1xxxxx01xxx
+ smlsl. */
+ return 2614;
}
}
else
@@ -1977,61 +2590,171 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxxx0xxxxx01xxx
- fmls. */
- return 2465;
+ x1000001xx1xxxx00xx1x1xxxxx01xxx
+ fsub. */
+ return 2499;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxxx0xxxxx01xxx
- fmls. */
- return 2466;
+ x1000001xx1xxxx10xx1x1xxxxx01xxx
+ fsub. */
+ return 2500;
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxx1xxxxx01xxx
- fsub. */
- return 2467;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx0x0xxxxx11xxx
+ bfmlsl. */
+ return 2448;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx0x0xxxxx11xxx
+ bfmlsl. */
+ return 2449;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx0x0xxxxx11xxx
+ bfmlsl. */
+ return 2450;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx0x0xxxxx11xxx
+ bfmlsl. */
+ return 2451;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx0x0xxxxx11xxx
+ umlsl. */
+ return 2718;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx0x0xxxxx11xxx
+ umlsl. */
+ return 2719;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx0x0xxxxx11xxx
+ umlsl. */
+ return 2720;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx0x0xxxxx11xxx
+ umlsl. */
+ return 2721;
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxx1xxxxx01xxx
- fsub. */
- return 2468;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx1x0xxxxx11xxx
+ sub. */
+ return 2694;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx1x0xxxxx11xxx
+ sub. */
+ return 2695;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx1x0xxxxx11xxx
+ sub. */
+ return 2696;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx1x0xxxxx11xxx
+ sub. */
+ return 2697;
+ }
+ }
}
}
- }
- else
- {
- if (((word >> 10) & 0x1) == 0)
+ else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxxx0xxxxx11xxx
- sub. */
- return 2646;
+ x1000001x01xxxxx0xx0x1xxxxx11xxx
+ bfmlsl. */
+ return 2447;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxxx0xxxxx11xxx
- sub. */
- return 2647;
+ x1000001x11xxxxx0xx0x1xxxxx11xxx
+ umlsl. */
+ return 2717;
}
}
else
@@ -2040,39 +2763,20 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxxx0xxxxx11xxx
+ x1000001xx1xxxx00xx1x1xxxxx11xxx
sub. */
- return 2648;
+ return 2692;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxxx0xxxxx11xxx
+ x1000001xx1xxxx10xx1x1xxxxx11xxx
sub. */
- return 2649;
+ return 2693;
}
}
}
- else
- {
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xxxx1xxxxx11xxx
- sub. */
- return 2644;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xxxx1xxxxx11xxx
- sub. */
- return 2645;
- }
- }
}
}
}
@@ -2090,7 +2794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx01x0xxxxxxx0xxxx0
sel. */
- return 2561;
+ return 2593;
}
else
{
@@ -2098,7 +2802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx11x0xxxxxxx0xxxx0
sel. */
- return 2562;
+ return 2594;
}
}
else
@@ -2115,7 +2819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1000x0xx0xxxx0
smax. */
- return 2563;
+ return 2595;
}
else
{
@@ -2123,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2565;
+ return 2597;
}
}
else
@@ -2134,7 +2838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2564;
+ return 2596;
}
else
{
@@ -2142,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2566;
+ return 2598;
}
}
}
@@ -2156,7 +2860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2571;
+ return 2619;
}
else
{
@@ -2164,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2573;
+ return 2621;
}
}
else
@@ -2175,7 +2879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2572;
+ return 2620;
}
else
{
@@ -2183,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2574;
+ return 2622;
}
}
}
@@ -2200,7 +2904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x100x01xx0xxxx0
fmax. */
- return 2439;
+ return 2455;
}
else
{
@@ -2208,7 +2912,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x01xx0xxxx0
fmax. */
- return 2441;
+ return 2457;
}
}
else
@@ -2219,7 +2923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x01xx0xxxx0
fmax. */
- return 2440;
+ return 2456;
}
else
{
@@ -2227,7 +2931,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x01xx0xxxx0
fmax. */
- return 2442;
+ return 2458;
}
}
}
@@ -2267,7 +2971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx0
smin. */
- return 2567;
+ return 2599;
}
else
{
@@ -2275,7 +2979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx0
smin. */
- return 2569;
+ return 2601;
}
}
else
@@ -2286,7 +2990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx0
smin. */
- return 2568;
+ return 2600;
}
else
{
@@ -2294,7 +2998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx0
smin. */
- return 2570;
+ return 2602;
}
}
}
@@ -2308,7 +3012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2575;
+ return 2623;
}
else
{
@@ -2316,7 +3020,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2577;
+ return 2625;
}
}
else
@@ -2327,7 +3031,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2576;
+ return 2624;
}
else
{
@@ -2335,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2578;
+ return 2626;
}
}
}
@@ -2350,7 +3054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx0
fmaxnm. */
- return 2443;
+ return 2459;
}
else
{
@@ -2358,7 +3062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx0
fmaxnm. */
- return 2445;
+ return 2461;
}
}
else
@@ -2369,7 +3073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx0
fmaxnm. */
- return 2444;
+ return 2460;
}
else
{
@@ -2377,7 +3081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx0
fmaxnm. */
- return 2446;
+ return 2462;
}
}
}
@@ -2397,7 +3101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2650;
+ return 2698;
}
else
{
@@ -2405,7 +3109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2652;
+ return 2700;
}
}
else
@@ -2416,7 +3120,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2651;
+ return 2699;
}
else
{
@@ -2424,7 +3128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2653;
+ return 2701;
}
}
}
@@ -2438,7 +3142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx0xxxx1
fmin. */
- return 2447;
+ return 2463;
}
else
{
@@ -2446,7 +3150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx0xxxx1
fmin. */
- return 2449;
+ return 2465;
}
}
else
@@ -2457,7 +3161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx0xxxx1
fmin. */
- return 2448;
+ return 2464;
}
else
{
@@ -2465,7 +3169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx0xxxx1
fmin. */
- return 2450;
+ return 2466;
}
}
}
@@ -2484,7 +3188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2654;
+ return 2702;
}
else
{
@@ -2492,7 +3196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2656;
+ return 2704;
}
}
else
@@ -2503,7 +3207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2655;
+ return 2703;
}
else
{
@@ -2511,7 +3215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2657;
+ return 2705;
}
}
}
@@ -2525,7 +3229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2658;
+ return 2722;
}
else
{
@@ -2533,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2660;
+ return 2724;
}
}
else
@@ -2544,7 +3248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2659;
+ return 2723;
}
else
{
@@ -2552,7 +3256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2661;
+ return 2725;
}
}
}
@@ -2567,7 +3271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx1
fminnm. */
- return 2451;
+ return 2467;
}
else
{
@@ -2575,7 +3279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx1
fminnm. */
- return 2453;
+ return 2469;
}
}
else
@@ -2586,7 +3290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx1
fminnm. */
- return 2452;
+ return 2468;
}
else
{
@@ -2594,7 +3298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx1
fminnm. */
- return 2454;
+ return 2470;
}
}
}
@@ -2623,7 +3327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2585;
+ return 2633;
}
else
{
@@ -2631,7 +3335,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2609;
+ return 2657;
}
}
else
@@ -2642,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2601;
+ return 2649;
}
else
{
@@ -2650,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2593;
+ return 2641;
}
}
}
@@ -2664,7 +3368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2617;
+ return 2665;
}
else
{
@@ -2672,7 +3376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2641;
+ return 2689;
}
}
else
@@ -2683,7 +3387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2633;
+ return 2681;
}
else
{
@@ -2691,7 +3395,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2625;
+ return 2673;
}
}
}
@@ -2719,7 +3423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2586;
+ return 2634;
}
else
{
@@ -2727,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2643;
+ return 2691;
}
}
else
@@ -2736,7 +3440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2610;
+ return 2658;
}
}
else
@@ -2747,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2602;
+ return 2650;
}
else
{
@@ -2755,7 +3459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2594;
+ return 2642;
}
}
}
@@ -2769,7 +3473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2618;
+ return 2666;
}
else
{
@@ -2777,7 +3481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2642;
+ return 2690;
}
}
else
@@ -2788,7 +3492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2634;
+ return 2682;
}
else
{
@@ -2796,7 +3500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2626;
+ return 2674;
}
}
}
@@ -2838,7 +3542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2581;
+ return 2629;
}
else
{
@@ -2846,7 +3550,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2582;
+ return 2630;
}
}
else
@@ -2857,7 +3561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2605;
+ return 2653;
}
else
{
@@ -2865,7 +3569,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2606;
+ return 2654;
}
}
}
@@ -2879,7 +3583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2597;
+ return 2645;
}
else
{
@@ -2887,7 +3591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2598;
+ return 2646;
}
}
else
@@ -2898,7 +3602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2589;
+ return 2637;
}
else
{
@@ -2906,7 +3610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2590;
+ return 2638;
}
}
}
@@ -2923,7 +3627,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2613;
+ return 2661;
}
else
{
@@ -2931,7 +3635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2614;
+ return 2662;
}
}
else
@@ -2942,7 +3646,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2637;
+ return 2685;
}
else
{
@@ -2950,7 +3654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2638;
+ return 2686;
}
}
}
@@ -2964,7 +3668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2629;
+ return 2677;
}
else
{
@@ -2972,7 +3676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2630;
+ return 2678;
}
}
else
@@ -2983,7 +3687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2621;
+ return 2669;
}
else
{
@@ -2991,7 +3695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2622;
+ return 2670;
}
}
}
@@ -5393,7 +6097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2715;
+ return 2779;
}
else
{
@@ -5401,7 +6105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2723;
+ return 2787;
}
}
else
@@ -5412,7 +6116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2719;
+ return 2783;
}
else
{
@@ -5420,7 +6124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2726;
+ return 2790;
}
}
}
@@ -5458,7 +6162,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2775;
+ return 2839;
}
else
{
@@ -5466,7 +6170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2781;
+ return 2845;
}
}
else
@@ -5477,7 +6181,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2778;
+ return 2842;
}
else
{
@@ -5485,7 +6189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2784;
+ return 2848;
}
}
}
@@ -5499,7 +6203,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2799;
+ return 2863;
}
else
{
@@ -5507,7 +6211,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2805;
+ return 2869;
}
}
else
@@ -5518,7 +6222,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2802;
+ return 2866;
}
else
{
@@ -5526,7 +6230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2808;
+ return 2872;
}
}
}
@@ -5543,7 +6247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2787;
+ return 2851;
}
else
{
@@ -5551,7 +6255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2793;
+ return 2857;
}
}
else
@@ -5562,7 +6266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2790;
+ return 2854;
}
else
{
@@ -5570,7 +6274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2796;
+ return 2860;
}
}
}
@@ -5584,7 +6288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2811;
+ return 2875;
}
else
{
@@ -5592,7 +6296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2817;
+ return 2881;
}
}
else
@@ -5603,7 +6307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2814;
+ return 2878;
}
else
{
@@ -5611,7 +6315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2820;
+ return 2884;
}
}
}
@@ -5676,7 +6380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2716;
+ return 2780;
}
else
{
@@ -5684,7 +6388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2724;
+ return 2788;
}
}
else
@@ -5695,7 +6399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2720;
+ return 2784;
}
else
{
@@ -5703,7 +6407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2727;
+ return 2791;
}
}
}
@@ -5741,7 +6445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2776;
+ return 2840;
}
else
{
@@ -5749,7 +6453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2782;
+ return 2846;
}
}
else
@@ -5760,7 +6464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2779;
+ return 2843;
}
else
{
@@ -5768,7 +6472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2785;
+ return 2849;
}
}
}
@@ -5782,7 +6486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2800;
+ return 2864;
}
else
{
@@ -5790,7 +6494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2806;
+ return 2870;
}
}
else
@@ -5801,7 +6505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2803;
+ return 2867;
}
else
{
@@ -5809,7 +6513,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2809;
+ return 2873;
}
}
}
@@ -5826,7 +6530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2788;
+ return 2852;
}
else
{
@@ -5834,7 +6538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2794;
+ return 2858;
}
}
else
@@ -5845,7 +6549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2791;
+ return 2855;
}
else
{
@@ -5853,7 +6557,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2797;
+ return 2861;
}
}
}
@@ -5867,7 +6571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2812;
+ return 2876;
}
else
{
@@ -5875,7 +6579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2818;
+ return 2882;
}
}
else
@@ -5886,7 +6590,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2815;
+ return 2879;
}
else
{
@@ -5894,7 +6598,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2821;
+ return 2885;
}
}
}
@@ -5962,7 +6666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2718;
+ return 2782;
}
else
{
@@ -5970,7 +6674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2725;
+ return 2789;
}
}
else
@@ -5979,7 +6683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2722;
+ return 2786;
}
}
else
@@ -5990,7 +6694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2717;
+ return 2781;
}
else
{
@@ -5998,7 +6702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2721;
+ return 2785;
}
}
}
@@ -6060,7 +6764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2777;
+ return 2841;
}
else
{
@@ -6068,7 +6772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2871;
+ return 2935;
}
}
else
@@ -6079,7 +6783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2783;
+ return 2847;
}
else
{
@@ -6087,7 +6791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2873;
+ return 2937;
}
}
}
@@ -6101,7 +6805,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2780;
+ return 2844;
}
else
{
@@ -6109,7 +6813,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2872;
+ return 2936;
}
}
else
@@ -6118,7 +6822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2786;
+ return 2850;
}
}
}
@@ -6134,7 +6838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2801;
+ return 2865;
}
else
{
@@ -6142,7 +6846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2877;
+ return 2941;
}
}
else
@@ -6153,7 +6857,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2807;
+ return 2871;
}
else
{
@@ -6161,7 +6865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2879;
+ return 2943;
}
}
}
@@ -6175,7 +6879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2804;
+ return 2868;
}
else
{
@@ -6183,7 +6887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2878;
+ return 2942;
}
}
else
@@ -6192,7 +6896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2810;
+ return 2874;
}
}
}
@@ -6211,7 +6915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2789;
+ return 2853;
}
else
{
@@ -6219,7 +6923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2874;
+ return 2938;
}
}
else
@@ -6230,7 +6934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2795;
+ return 2859;
}
else
{
@@ -6238,7 +6942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2876;
+ return 2940;
}
}
}
@@ -6252,7 +6956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2792;
+ return 2856;
}
else
{
@@ -6260,7 +6964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2875;
+ return 2939;
}
}
else
@@ -6269,7 +6973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2798;
+ return 2862;
}
}
}
@@ -6285,7 +6989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2813;
+ return 2877;
}
else
{
@@ -6293,7 +6997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2880;
+ return 2944;
}
}
else
@@ -6304,7 +7008,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2819;
+ return 2883;
}
else
{
@@ -6312,7 +7016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2882;
+ return 2946;
}
}
}
@@ -6326,7 +7030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2816;
+ return 2880;
}
else
{
@@ -6334,7 +7038,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2881;
+ return 2945;
}
}
else
@@ -6343,7 +7047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2822;
+ return 2886;
}
}
}
@@ -6716,7 +7420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2900;
+ return 2964;
}
else
{
@@ -6734,7 +7438,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2903;
+ return 2967;
}
}
}
@@ -6814,7 +7518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2713;
+ return 2777;
}
else
{
@@ -6822,7 +7526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2714;
+ return 2778;
}
}
else
@@ -6929,7 +7633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2905;
+ return 2969;
}
}
}
@@ -6945,7 +7649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2902;
+ return 2966;
}
else
{
@@ -6990,7 +7694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2712;
+ return 2776;
}
else
{
@@ -7084,7 +7788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2904;
+ return 2968;
}
}
}
@@ -7214,7 +7918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2906;
+ return 2970;
}
}
}
@@ -7230,7 +7934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2901;
+ return 2965;
}
else
{
@@ -8072,7 +8776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2732;
+ return 2796;
}
}
}
@@ -8146,7 +8850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2733;
+ return 2797;
}
}
}
@@ -10820,7 +11524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2731;
+ return 2795;
}
}
}
@@ -12524,7 +13228,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2760;
+ return 2824;
}
}
else
@@ -12767,7 +13471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2736;
+ return 2800;
}
else
{
@@ -12775,7 +13479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2737;
+ return 2801;
}
}
else
@@ -13007,7 +13711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2757;
+ return 2821;
}
else
{
@@ -13028,7 +13732,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2764;
+ return 2828;
}
else
{
@@ -13036,7 +13740,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2763;
+ return 2827;
}
}
else
@@ -13091,7 +13795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2756;
+ return 2820;
}
else
{
@@ -13103,7 +13807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2762;
+ return 2826;
}
else
{
@@ -13111,7 +13815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2761;
+ return 2825;
}
}
else
@@ -13162,7 +13866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2740;
+ return 2804;
}
else
{
@@ -13170,7 +13874,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2741;
+ return 2805;
}
}
else
@@ -13529,7 +14233,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2734;
+ return 2798;
}
else
{
@@ -13562,7 +14266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2758;
+ return 2822;
}
else
{
@@ -13592,7 +14296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2735;
+ return 2799;
}
else
{
@@ -13721,7 +14425,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2744;
+ return 2808;
}
else
{
@@ -13731,7 +14435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2746;
+ return 2810;
}
else
{
@@ -13739,7 +14443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2748;
+ return 2812;
}
}
}
@@ -13751,7 +14455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2745;
+ return 2809;
}
else
{
@@ -13761,7 +14465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2747;
+ return 2811;
}
else
{
@@ -13769,7 +14473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2749;
+ return 2813;
}
}
}
@@ -14828,7 +15532,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2728;
+ return 2792;
}
else
{
@@ -14836,7 +15540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2730;
+ return 2794;
}
}
else
@@ -14845,7 +15549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2729;
+ return 2793;
}
}
}
@@ -16341,7 +17045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2738;
+ return 2802;
}
else
{
@@ -16349,7 +17053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2739;
+ return 2803;
}
}
}
@@ -16723,7 +17427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2742;
+ return 2806;
}
else
{
@@ -16731,7 +17435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2743;
+ return 2807;
}
}
}
@@ -17092,7 +17796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2662;
+ return 2726;
}
else
{
@@ -17100,7 +17804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2663;
+ return 2727;
}
}
else
@@ -17130,7 +17834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2558;
+ return 2590;
}
}
}
@@ -17144,7 +17848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2665;
+ return 2729;
}
else
{
@@ -17152,7 +17856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2664;
+ return 2728;
}
}
else
@@ -17182,7 +17886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2560;
+ return 2592;
}
}
}
@@ -17199,7 +17903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2669;
+ return 2733;
}
else
{
@@ -17207,7 +17911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2666;
+ return 2730;
}
}
else
@@ -17237,7 +17941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2559;
+ return 2591;
}
}
}
@@ -17251,7 +17955,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2667;
+ return 2731;
}
else
{
@@ -17259,7 +17963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2668;
+ return 2732;
}
}
else
@@ -18385,7 +19089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2759;
+ return 2823;
}
}
else
@@ -19044,7 +19748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2436;
+ return 2452;
}
}
else
@@ -19746,7 +20450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2895;
+ return 2959;
}
else
{
@@ -20326,7 +21030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2823;
+ return 2887;
}
else
{
@@ -20334,7 +21038,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2825;
+ return 2889;
}
}
else
@@ -20345,7 +21049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2829;
+ return 2893;
}
else
{
@@ -20353,7 +21057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2831;
+ return 2895;
}
}
}
@@ -20367,7 +21071,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2826;
+ return 2890;
}
else
{
@@ -20375,7 +21079,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2828;
+ return 2892;
}
}
else
@@ -20386,7 +21090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2832;
+ return 2896;
}
else
{
@@ -20394,7 +21098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2834;
+ return 2898;
}
}
}
@@ -20411,7 +21115,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2847;
+ return 2911;
}
else
{
@@ -20419,7 +21123,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2849;
+ return 2913;
}
}
else
@@ -20430,7 +21134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2853;
+ return 2917;
}
else
{
@@ -20438,7 +21142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2855;
+ return 2919;
}
}
}
@@ -20452,7 +21156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2850;
+ return 2914;
}
else
{
@@ -20460,7 +21164,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2852;
+ return 2916;
}
}
else
@@ -20471,7 +21175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2856;
+ return 2920;
}
else
{
@@ -20479,7 +21183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2858;
+ return 2922;
}
}
}
@@ -20499,7 +21203,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2835;
+ return 2899;
}
else
{
@@ -20507,7 +21211,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2837;
+ return 2901;
}
}
else
@@ -20518,7 +21222,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2841;
+ return 2905;
}
else
{
@@ -20526,7 +21230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2843;
+ return 2907;
}
}
}
@@ -20540,7 +21244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2838;
+ return 2902;
}
else
{
@@ -20548,7 +21252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2840;
+ return 2904;
}
}
else
@@ -20559,7 +21263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2844;
+ return 2908;
}
else
{
@@ -20567,7 +21271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2846;
+ return 2910;
}
}
}
@@ -20584,7 +21288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2859;
+ return 2923;
}
else
{
@@ -20592,7 +21296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2861;
+ return 2925;
}
}
else
@@ -20603,7 +21307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2865;
+ return 2929;
}
else
{
@@ -20611,7 +21315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2867;
+ return 2931;
}
}
}
@@ -20625,7 +21329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2862;
+ return 2926;
}
else
{
@@ -20633,7 +21337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2864;
+ return 2928;
}
}
else
@@ -20644,7 +21348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2868;
+ return 2932;
}
else
{
@@ -20652,7 +21356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2870;
+ return 2934;
}
}
}
@@ -20686,7 +21390,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2824;
+ return 2888;
}
else
{
@@ -20694,7 +21398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2883;
+ return 2947;
}
}
else
@@ -20705,7 +21409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2830;
+ return 2894;
}
else
{
@@ -20713,7 +21417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2885;
+ return 2949;
}
}
}
@@ -20727,7 +21431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2827;
+ return 2891;
}
else
{
@@ -20735,7 +21439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2884;
+ return 2948;
}
}
else
@@ -20744,7 +21448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2833;
+ return 2897;
}
}
}
@@ -20760,7 +21464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2848;
+ return 2912;
}
else
{
@@ -20768,7 +21472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2889;
+ return 2953;
}
}
else
@@ -20779,7 +21483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2854;
+ return 2918;
}
else
{
@@ -20787,7 +21491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2891;
+ return 2955;
}
}
}
@@ -20801,7 +21505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2851;
+ return 2915;
}
else
{
@@ -20809,7 +21513,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2890;
+ return 2954;
}
}
else
@@ -20818,7 +21522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2857;
+ return 2921;
}
}
}
@@ -20837,7 +21541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2836;
+ return 2900;
}
else
{
@@ -20845,7 +21549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2886;
+ return 2950;
}
}
else
@@ -20856,7 +21560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2842;
+ return 2906;
}
else
{
@@ -20864,7 +21568,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2888;
+ return 2952;
}
}
}
@@ -20878,7 +21582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2839;
+ return 2903;
}
else
{
@@ -20886,7 +21590,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2887;
+ return 2951;
}
}
else
@@ -20895,7 +21599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2845;
+ return 2909;
}
}
}
@@ -20911,7 +21615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2860;
+ return 2924;
}
else
{
@@ -20919,7 +21623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2892;
+ return 2956;
}
}
else
@@ -20930,7 +21634,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2866;
+ return 2930;
}
else
{
@@ -20938,7 +21642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2894;
+ return 2958;
}
}
}
@@ -20952,7 +21656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2863;
+ return 2927;
}
else
{
@@ -20960,7 +21664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2893;
+ return 2957;
}
}
else
@@ -20969,7 +21673,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2869;
+ return 2933;
}
}
}
@@ -21136,7 +21840,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2750;
+ return 2814;
}
}
}
@@ -21169,7 +21873,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2676;
+ return 2740;
}
}
else
@@ -21243,7 +21947,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2752;
+ return 2816;
}
}
}
@@ -21276,7 +21980,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2753;
+ return 2817;
}
}
else
@@ -21323,7 +22027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2683;
+ return 2747;
}
else
{
@@ -21331,7 +22035,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2685;
+ return 2749;
}
}
else
@@ -21342,7 +22046,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2687;
+ return 2751;
}
else
{
@@ -21356,7 +22060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2688;
+ return 2752;
}
else
{
@@ -21364,7 +22068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2681;
+ return 2745;
}
}
else
@@ -21373,7 +22077,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2690;
+ return 2754;
}
}
else
@@ -21386,7 +22090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2689;
+ return 2753;
}
else
{
@@ -21394,7 +22098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2694;
+ return 2758;
}
}
else
@@ -21403,7 +22107,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2691;
+ return 2755;
}
}
}
@@ -21584,7 +22288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2675;
+ return 2739;
}
}
else
@@ -21615,7 +22319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2751;
+ return 2815;
}
else
{
@@ -21634,7 +22338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2767;
+ return 2831;
}
else
{
@@ -21644,7 +22348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2765;
+ return 2829;
}
else
{
@@ -21654,7 +22358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2772;
+ return 2836;
}
else
{
@@ -21662,7 +22366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2771;
+ return 2835;
}
}
}
@@ -22246,7 +22950,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2768;
+ return 2832;
}
else
{
@@ -22254,7 +22958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2769;
+ return 2833;
}
}
}
@@ -22572,7 +23276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2686;
+ return 2750;
}
}
else
@@ -23183,7 +23887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2679;
+ return 2743;
}
}
}
@@ -23235,7 +23939,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2692;
+ return 2756;
}
}
}
@@ -23478,7 +24182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2682;
+ return 2746;
}
}
else
@@ -23554,7 +24258,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2695;
+ return 2759;
}
}
else
@@ -24380,7 +25084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2680;
+ return 2744;
}
}
else
@@ -24412,7 +25116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2693;
+ return 2757;
}
}
else
@@ -24652,7 +25356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2684;
+ return 2748;
}
}
else
@@ -24684,7 +25388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2698;
+ return 2762;
}
else
{
@@ -24692,7 +25396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2702;
+ return 2766;
}
}
}
@@ -24714,7 +25418,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2699;
+ return 2763;
}
else
{
@@ -24722,7 +25426,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2703;
+ return 2767;
}
}
}
@@ -24761,7 +25465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2696;
+ return 2760;
}
else
{
@@ -24769,7 +25473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2700;
+ return 2764;
}
}
else
@@ -24791,7 +25495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2697;
+ return 2761;
}
else
{
@@ -24799,7 +25503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2701;
+ return 2765;
}
}
else
@@ -26607,7 +27311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2704;
+ return 2768;
}
else
{
@@ -26615,7 +27319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2708;
+ return 2772;
}
}
else
@@ -26637,7 +27341,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2705;
+ return 2769;
}
else
{
@@ -26645,7 +27349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2709;
+ return 2773;
}
}
else
@@ -27151,7 +27855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2706;
+ return 2770;
}
else
{
@@ -27159,7 +27863,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2710;
+ return 2774;
}
}
}
@@ -27181,7 +27885,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2707;
+ return 2771;
}
else
{
@@ -27189,7 +27893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2711;
+ return 2775;
}
}
}
@@ -27245,7 +27949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2678;
+ return 2742;
}
else
{
@@ -27253,7 +27957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2677;
+ return 2741;
}
}
}
@@ -27356,7 +28060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2755;
+ return 2819;
}
else
{
@@ -27364,7 +28068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2754;
+ return 2818;
}
}
else
@@ -27375,7 +28079,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2766;
+ return 2830;
}
else
{
@@ -27385,7 +28089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2774;
+ return 2838;
}
else
{
@@ -27393,7 +28097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2773;
+ return 2837;
}
}
}
@@ -27884,22 +28588,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2546: value = 2554; break; /* mov --> mova. */
- case 2554: return NULL; /* mova --> NULL. */
- case 2542: value = 2550; break; /* mov --> mova. */
- case 2550: return NULL; /* mova --> NULL. */
- case 2544: value = 2552; break; /* mov --> mova. */
- case 2552: return NULL; /* mova --> NULL. */
- case 2540: value = 2548; break; /* mov --> mova. */
- case 2548: return NULL; /* mova --> NULL. */
- case 2547: value = 2555; break; /* mov --> mova. */
- case 2555: return NULL; /* mova --> NULL. */
- case 2543: value = 2551; break; /* mov --> mova. */
- case 2551: return NULL; /* mova --> NULL. */
- case 2545: value = 2553; break; /* mov --> mova. */
- case 2553: return NULL; /* mova --> NULL. */
- case 2541: value = 2549; break; /* mov --> mova. */
- case 2549: return NULL; /* mova --> NULL. */
+ case 2578: value = 2586; break; /* mov --> mova. */
+ case 2586: return NULL; /* mova --> NULL. */
+ case 2574: value = 2582; break; /* mov --> mova. */
+ case 2582: return NULL; /* mova --> NULL. */
+ case 2576: value = 2584; break; /* mov --> mova. */
+ case 2584: return NULL; /* mova --> NULL. */
+ case 2572: value = 2580; break; /* mov --> mova. */
+ case 2580: return NULL; /* mova --> NULL. */
+ case 2579: value = 2587; break; /* mov --> mova. */
+ case 2587: return NULL; /* mova --> NULL. */
+ case 2575: value = 2583; break; /* mov --> mova. */
+ case 2583: return NULL; /* mova --> NULL. */
+ case 2577: value = 2585; break; /* mov --> mova. */
+ case 2585: return NULL; /* mova --> NULL. */
+ case 2573: value = 2581; break; /* mov --> mova. */
+ case 2581: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -27921,11 +28625,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2896; break; /* addg --> smax. */
- case 2896: value = 2897; break; /* smax --> umax. */
- case 2897: value = 2898; break; /* umax --> smin. */
- case 2898: value = 2899; break; /* smin --> umin. */
- case 2899: return NULL; /* umin --> NULL. */
+ case 19: value = 2960; break; /* addg --> smax. */
+ case 2960: value = 2961; break; /* smax --> umax. */
+ case 2961: value = 2962; break; /* umax --> smin. */
+ case 2962: value = 2963; break; /* smin --> umin. */
+ case 2963: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -28083,8 +28787,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2770; break; /* fcvt --> bfcvt. */
- case 2770: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2834; break; /* fcvt --> bfcvt. */
+ case 2834: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -28613,7 +29317,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 259:
+ case 263:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -28660,12 +29364,12 @@ aarch64_extract_operand (const aarch64_operand *self,
case 193:
case 194:
case 237:
- case 253:
- case 254:
- case 256:
+ case 257:
case 258:
- case 263:
- case 264:
+ case 260:
+ case 262:
+ case 267:
+ case 268:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -28736,8 +29440,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
- case 255:
- case 257:
+ case 259:
+ case 261:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
@@ -28850,28 +29554,32 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 245:
- case 246:
case 247:
case 248:
case 249:
case 250:
case 251:
case 252:
+ case 253:
+ case 254:
+ case 255:
+ case 256:
return aarch64_ext_simple_index (self, info, code, inst, errors);
case 239:
case 240:
case 241:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 242:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 243:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 244:
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 245:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ case 246:
return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 260:
- case 261:
- case 262:
+ case 264:
+ case 265:
+ case 266:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index bfeab066f0a..7271231eb3f 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -1905,7 +1905,7 @@ aarch64_ext_sme_za_list (const aarch64_operand *self,
bool
aarch64_ext_sme_za_array (const aarch64_operand *self,
aarch64_opnd_info *info, aarch64_insn code,
- const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ const aarch64_inst *inst,
aarch64_operand_error *errors ATTRIBUTE_UNUSED)
{
int regno = extract_field (self->fields[0], code, 0);
@@ -1914,8 +1914,12 @@ aarch64_ext_sme_za_array (const aarch64_operand *self,
else
regno += 8;
int imm = extract_field (self->fields[1], code, 0);
+ int num_offsets = get_operand_specific_data (self);
+ if (num_offsets == 0)
+ num_offsets = 1;
info->indexed_za.index.regno = regno;
- info->indexed_za.index.imm = imm;
+ info->indexed_za.index.imm = imm * num_offsets;
+ info->indexed_za.index.countm1 = num_offsets - 1;
info->indexed_za.group_size = get_opcode_dependent_value (inst->opcode);
return true;
}
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 51415ceb033..cb209c55a89 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -263,14 +263,18 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REG, "SME_PNn3_INDEX2", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_PNn3, FLD_imm2_8}, "an indexed SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off2x2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm2_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_5", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_5}, "ZA array"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3x2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm4_0}, "ZA array"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10, FLD_imm1_2}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_15, FLD_imm2_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX1_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm1_16}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_15", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_15}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_16}, "an indexed SVE vector register"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index cd37f8ac910..9555df186a4 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -319,9 +319,12 @@ const aarch64_field fields[] =
{ 0, 4 }, /* cond2: condition in truly conditional-executed inst. */
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
+ { 2, 1 }, /* imm1_2: general immediate in bits [2]. */
{ 8, 1 }, /* imm1_8: general immediate in bits [8]. */
{ 10, 1 }, /* imm1_10: general immediate in bits [10]. */
+ { 15, 1 }, /* imm1_15: general immediate in bits [15]. */
{ 16, 1 }, /* imm1_16: general immediate in bits [16]. */
+ { 0, 2 }, /* imm2_0: general immediate in bits [1:0]. */
{ 8, 2 }, /* imm2_8: general immediate in bits [9:8]. */
{ 10, 2 }, /* imm2_10: 2-bit immediate, bits [11:10] */
{ 15, 2 }, /* imm2_15: 2-bit immediate, bits [16:15] */
@@ -1769,6 +1772,8 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_2:
+ case AARCH64_OPND_SME_Zm_INDEX3_10:
size = get_operand_fields_width (get_operand_from_code (type)) - 4;
if (!check_reglane (opnd, mismatch_detail, idx, "z", 0, 15,
0, (1 << size) - 1))
@@ -1872,6 +1877,18 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
return 0;
break;
+ case AARCH64_OPND_SME_ZA_array_off2x2:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 3, 2,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
+ case AARCH64_OPND_SME_ZA_array_off3x2:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 7, 2,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_ZA_HV_idx_srcxN:
case AARCH64_OPND_SME_ZA_HV_idx_destxN:
size = aarch64_get_qualifier_esize (opnd->qualifier);
@@ -3938,6 +3955,8 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_Zn_INDEX:
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_2:
+ case AARCH64_OPND_SME_Zm_INDEX3_10:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
@@ -3990,8 +4009,10 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
print_sme_za_list (buf, size, opnd->reg.regno, styler);
break;
+ case AARCH64_OPND_SME_ZA_array_off2x2:
case AARCH64_OPND_SME_ZA_array_off3_0:
case AARCH64_OPND_SME_ZA_array_off3_5:
+ case AARCH64_OPND_SME_ZA_array_off3x2:
case AARCH64_OPND_SME_ZA_array_off4:
snprintf (buf, size, "%s[%s, %s%s%s%s%s]",
style_reg (styler, "za%s%s",
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index b0084257a94..b925af5ac37 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -140,9 +140,12 @@ enum aarch64_field_kind
FLD_cond2,
FLD_defgh,
FLD_hw,
+ FLD_imm1_2,
FLD_imm1_8,
FLD_imm1_10,
+ FLD_imm1_15,
FLD_imm1_16,
+ FLD_imm2_0,
FLD_imm2_8,
FLD_imm2_10,
FLD_imm2_15,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 434b76c010c..552345d35f6 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5339,6 +5339,22 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("add", 0xc1a11810, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("add", 0xc120a300, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("add", 0xc120ab00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("bfmlal", 0xc1801010, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("bfmlal", 0xc1901010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlal", 0xc1909010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlal", 0xc1200c10, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("bfmlal", 0xc1200810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlal", 0xc1300810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlal", 0xc1a00810, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlal", 0xc1a10810, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlsl", 0xc1801018, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("bfmlsl", 0xc1901018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlsl", 0xc1909018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlsl", 0xc1200c18, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("bfmlsl", 0xc1200818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlsl", 0xc1300818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfmlsl", 0xc1a00818, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfmlsl", 0xc1a10818, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
@@ -5364,12 +5380,28 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("fmla", 0xc1301800, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fmla", 0xc1a01800, 0xffa19c38, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fmla", 0xc1a11800, 0xffa39c78, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fmlal", 0xc1801000, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("fmlal", 0xc1901000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlal", 0xc1909000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fmlal", 0xc1200c00, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("fmlal", 0xc1200800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlal", 0xc1300800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fmlal", 0xc1a00800, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlal", 0xc1a10800, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fmls", 0xc1500010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SSS, F_OD (2), 0),
SME2_INSN ("fmls", 0xc1508010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SSS, F_OD (4), 0),
SME2_INSN ("fmls", 0xc1201808, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fmls", 0xc1301808, 0xffb09c18, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fmls", 0xc1a01808, 0xffa19c38, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fmls", 0xc1a11808, 0xffa39c78, sme_fp_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fmlsl", 0xc1801008, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("fmlsl", 0xc1901008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlsl", 0xc1909008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fmlsl", 0xc1200c08, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("fmlsl", 0xc1200808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlsl", 0xc1300808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fmlsl", 0xc1a00808, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fmlsl", 0xc1a10808, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fsub", 0xc1a01c08, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fsub", 0xc1a11c08, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
@@ -5474,6 +5506,22 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("smin", 0xc120a820, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("smin", 0xc120b020, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("smin", 0xc120b820, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("smlal", 0xc1c01000, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("smlal", 0xc1d01000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlal", 0xc1d09000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlal", 0xc1600c00, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("smlal", 0xc1600800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlal", 0xc1700800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlal", 0xc1e00800, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlal", 0xc1e10800, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlsl", 0xc1c01008, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("smlsl", 0xc1d01008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlsl", 0xc1d09008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlsl", 0xc1600c08, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("smlsl", 0xc1600808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlsl", 0xc1700808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlsl", 0xc1e00808, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("smlsl", 0xc1e10808, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("sqdmulh", 0xc120a400, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -5561,6 +5609,22 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("umin", 0xc120a821, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umin", 0xc120b021, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umin", 0xc120b821, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("umlal", 0xc1c01010, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("umlal", 0xc1d01010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlal", 0xc1d09010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlal", 0xc1600c10, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("umlal", 0xc1600810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlal", 0xc1700810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlal", 0xc1e00810, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlal", 0xc1e10810, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlsl", 0xc1c01018, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("umlsl", 0xc1d01018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlsl", 0xc1d09018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlsl", 0xc1600c18, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm), OP_SVE_SHH, 0, 0),
+ SME2_INSN ("umlsl", 0xc1600818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlsl", 0xc1700818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlsl", 0xc1e00818, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("umlsl", 0xc1e10818, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -6279,10 +6343,14 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \
F(FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \
"an SME horizontal or vertical vector access register") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off2x2", \
+ 2 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm2_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_0", 0, \
F(FLD_SME_Rv,FLD_imm3_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_5", 0, \
F(FLD_SME_Rv,FLD_imm3_5), "ZA array") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3x2", \
+ 2 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm3_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off4", 0, \
F(FLD_SME_Rv,FLD_imm4_0), "ZA array") \
Y(ADDRESS, sme_addr_ri_u4xvl, "SME_ADDR_RI_U4xVL", 0 << OPD_F_OD_LSB, \
@@ -6296,6 +6364,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
F(FLD_SME_Zm, FLD_imm1_10), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX2", 0, \
F(FLD_SME_Zm, FLD_imm2_10), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX3_2", 0, \
+ F(FLD_SME_Zm, FLD_imm2_10, FLD_imm1_2), \
+ "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX3_10", 0, \
+ F(FLD_SME_Zm, FLD_imm1_15, FLD_imm2_10), \
+ "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX1_16", 0, \
F(FLD_SVE_Zn, FLD_imm1_16), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX2_15", 0, \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 15/31] aarch64: Add the SME2 MLALL and MLSLL instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (13 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 14/31] aarch64: Add the SME2 MLAL and MLSL instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 16/31] aarch64: Add the SME2 dot-product instructions Richard Sandiford
` (17 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
SMLALL, SMLSLL, UMLALL and UMLSLL have the same format.
USMLALL and SUMLALL allow the same operand types as those
instructions, except that SUMLALL does not have the multi-vector
x multi-vector forms (which would be redundant with USMLALL).
---
gas/config/tc-aarch64.c | 5 +
gas/testsuite/gas/aarch64/sme2-13-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-13-invalid.l | 80 +
gas/testsuite/gas/aarch64/sme2-13-invalid.s | 83 +
gas/testsuite/gas/aarch64/sme2-13-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-13-noarch.l | 253 ++
gas/testsuite/gas/aarch64/sme2-13.d | 261 ++
gas/testsuite/gas/aarch64/sme2-13.s | 283 ++
gas/testsuite/gas/aarch64/sme2-14-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-14-invalid.l | 7 +
gas/testsuite/gas/aarch64/sme2-14-invalid.s | 7 +
gas/testsuite/gas/aarch64/sme2-14-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-14-noarch.l | 107 +
gas/testsuite/gas/aarch64/sme2-14.d | 115 +
gas/testsuite/gas/aarch64/sme2-14.s | 118 +
.../gas/aarch64/sme2-i16i64-2-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-2-invalid.l | 95 +
.../gas/aarch64/sme2-i16i64-2-invalid.s | 88 +
.../gas/aarch64/sme2-i16i64-2-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-2-noarch.l | 253 ++
gas/testsuite/gas/aarch64/sme2-i16i64-2.d | 261 ++
gas/testsuite/gas/aarch64/sme2-i16i64-2.s | 283 ++
include/opcode/aarch64.h | 5 +
opcodes/aarch64-asm-2.c | 35 +-
opcodes/aarch64-dis-2.c | 2304 +++++++++++------
opcodes/aarch64-opc-2.c | 5 +
opcodes/aarch64-opc.c | 22 +
opcodes/aarch64-opc.h | 2 +
opcodes/aarch64-tbl.h | 82 +
29 files changed, 3921 insertions(+), 851 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-13-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-13-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-13-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-13-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-13-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-13.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-13.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-14-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-14-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-14-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-14-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-14-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-14.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-14.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 2aa38381f47..2c8d5916182 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6729,8 +6729,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_Zn_INDEX:
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_1:
case AARCH64_OPND_SME_Zm_INDEX3_2:
case AARCH64_OPND_SME_Zm_INDEX3_10:
+ case AARCH64_OPND_SME_Zm_INDEX4_1:
+ case AARCH64_OPND_SME_Zm_INDEX4_10:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
@@ -7852,7 +7855,9 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->imm.value = val;
break;
+ case AARCH64_OPND_SME_ZA_array_off1x4:
case AARCH64_OPND_SME_ZA_array_off2x2:
+ case AARCH64_OPND_SME_ZA_array_off2x4:
case AARCH64_OPND_SME_ZA_array_off3_0:
case AARCH64_OPND_SME_ZA_array_off3_5:
case AARCH64_OPND_SME_ZA_array_off3x2:
diff --git a/gas/testsuite/gas/aarch64/sme2-13-invalid.d b/gas/testsuite/gas/aarch64/sme2-13-invalid.d
new file mode 100644
index 00000000000..8980695902d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-13-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-13-invalid.s
+#error_output: sme2-13-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-13-invalid.l b/gas/testsuite/gas/aarch64/sme2-13-invalid.l
new file mode 100644
index 00000000000..88a74ac3d5f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-13-invalid.l
@@ -0,0 +1,80 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `smlall 0,z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `smlall za\.s\[w8,0:3\],0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,0'
+[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0h\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0,vgx4\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx2\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx4\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[16\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.s,z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[16\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[16\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx2\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx4\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.s\[w8,0:3\],{z0\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z1\.b-z2\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z1\.b-z4\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z2\.b-z5\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z3\.b-z6\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-13-invalid.s b/gas/testsuite/gas/aarch64/sme2-13-invalid.s
new file mode 100644
index 00000000000..5e17714583e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-13-invalid.s
@@ -0,0 +1,83 @@
+ smlall 0, z0.b, z0.b[0]
+ smlall za.s[w8, 0:3], 0, z0.b[0]
+ smlall za.s[w8, 0:3], z0.b, 0
+
+ smlall za0.s[w8, 0:3], z0.b, z0.b[0]
+ smlall za0h.s[w8, 0:3], z0.b, z0.b[0]
+ smlall za.s[w7, 0:3], z0.b, z0.b[0]
+ smlall za.s[w12, 0:3], z0.b, z0.b[0]
+ smlall za.s[w8, 0], z0.b, z0.b[0]
+ smlall za.s[w8, 0:1], z0.b, z0.b[0]
+ smlall za.s[w8, 0:2], z0.b, z0.b[0]
+ smlall za.s[w8, 0, vgx4], z0.b, z0.b[0]
+ smlall za.s[w8, 0:3, vgx2], z0.b, z0.b[0]
+ smlall za.s[w8, 0:3, vgx4], z0.b, z0.b[0]
+ smlall za.s[w8, 1:4], z0.b, z0.b[0]
+ smlall za.s[w8, 2:5], z0.b, z0.b[0]
+ smlall za.s[w8, 3:6], z0.b, z0.b[0]
+ smlall za.s[w8, 16:19], z0.b, z0.b[0]
+ smlall za.s[w8, 0:3], z0.b, z16.b[0]
+ smlall za.s[w8, 0:3], z0.b, z0.b[-1]
+ smlall za.s[w8, 0:3], z0.b, z0.b[16]
+ smlall za.s[w8, 0:3], z0.h, z0.h[0]
+ smlall za.s[w8, 0:3], z0.s, z0.s[0]
+
+ smlall za.s[w7, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w12, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:1], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:2], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 1:4], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 2:5], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 3:6], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 8:11], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z1.b - z2.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z16.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[-1]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[16]
+
+ smlall za.s[w7, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w12, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:1], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:2], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 1:4], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 2:5], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 3:6], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 8:11], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z1.b - z4.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z2.b - z5.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z3.b - z6.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z16.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[-1]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[16]
+
+ smlall za.s[w8, 0:3, vgx2], z0.b, z0.b
+ smlall za.s[w8, 0:3, vgx4], z0.b, z0.b
+ smlall za.s[w8, 16:19], z0.b, z0.b
+ smlall za.s[w8, 0:3], z0.b, z16.b
+
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 8:11], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z2.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z16.b
+
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 8:11], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z16.b
+
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 8:11], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3], { z1.b - z2.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, { z1.b - z2.b }
+
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 8:11], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z1.b - z4.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z2.b - z5.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z3.b - z6.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z1.b - z4.b }
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z2.b - z5.b }
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z3.b - z6.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-13-noarch.d b/gas/testsuite/gas/aarch64/sme2-13-noarch.d
new file mode 100644
index 00000000000..6df837fb6bb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-13-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-13.s
+#error_output: sme2-13-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-13-noarch.l b/gas/testsuite/gas/aarch64/sme2-13-noarch.l
new file mode 100644
index 00000000000..3d55aaa986a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-13-noarch.l
@@ -0,0 +1,253 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-13.d b/gas/testsuite/gas/aarch64/sme2-13.d
new file mode 100644
index 00000000000..b8f00d1f008
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-13.d
@@ -0,0 +1,261 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1000000 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006000 smlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1000003 smlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003e0 smlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0000 smlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c00 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6a2 smlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c06 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e41 smlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c06 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec704 smlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200400 smlall za\.s\[w8, 0:3\], z0\.b, z0\.b
+[^:]+: c1206400 smlall za\.s\[w11, 0:3\], z0\.b, z0\.b
+[^:]+: c1200403 smlall za\.s\[w8, 12:15\], z0\.b, z0\.b
+[^:]+: c12007e0 smlall za\.s\[w8, 0:3\], z31\.b, z0\.b
+[^:]+: c12f0400 smlall za\.s\[w8, 0:3\], z0\.b, z15\.b
+[^:]+: c1274721 smlall za\.s\[w10, 4:7\], z25\.b, z7\.b
+[^:]+: c1200000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003e0 smlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003e0 smlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2261 smlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003a0 smlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003c0 smlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003c0 smlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003e0 smlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2320 smlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1a00000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a06000 smlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00001 smlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a003c0 smlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be0000 smlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b242c1 smlall za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a10000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a16000 smlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10001 smlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10380 smlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd0000 smlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b96200 smlall za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
+[^:]+: c1000008 smlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006008 smlsll za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c100000b smlsll za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003e8 smlsll za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0008 smlsll za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c08 smlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6aa smlsll za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106008 smlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100009 smlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003c8 smlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c0e smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e49 smlsll za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e008 smlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108009 smlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108388 smlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c0e smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec70c smlsll za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200408 smlsll za\.s\[w8, 0:3\], z0\.b, z0\.b
+[^:]+: c1206408 smlsll za\.s\[w11, 0:3\], z0\.b, z0\.b
+[^:]+: c120040b smlsll za\.s\[w8, 12:15\], z0\.b, z0\.b
+[^:]+: c12007e8 smlsll za\.s\[w8, 0:3\], z31\.b, z0\.b
+[^:]+: c12f0408 smlsll za\.s\[w8, 0:3\], z0\.b, z15\.b
+[^:]+: c1274729 smlsll za\.s\[w10, 4:7\], z25\.b, z7\.b
+[^:]+: c1200008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206008 smlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200009 smlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003c8 smlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003e8 smlsll za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003e8 smlsll za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2269 smlsll za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306008 smlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300009 smlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300388 smlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003a8 smlsll za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003c8 smlsll za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003c8 smlsll za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003e8 smlsll za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2328 smlsll za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1a00008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a06008 smlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00009 smlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a003c8 smlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be0008 smlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b242c9 smlsll za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a10008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a16008 smlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10009 smlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10388 smlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd0008 smlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b96208 smlsll za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
+[^:]+: c1000010 umlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006010 umlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1000013 umlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003f0 umlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0010 umlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c10 umlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6b2 umlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106010 umlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100011 umlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003d0 umlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c16 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e51 umlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e010 umlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108011 umlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108390 umlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c16 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec714 umlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200410 umlall za\.s\[w8, 0:3\], z0\.b, z0\.b
+[^:]+: c1206410 umlall za\.s\[w11, 0:3\], z0\.b, z0\.b
+[^:]+: c1200413 umlall za\.s\[w8, 12:15\], z0\.b, z0\.b
+[^:]+: c12007f0 umlall za\.s\[w8, 0:3\], z31\.b, z0\.b
+[^:]+: c12f0410 umlall za\.s\[w8, 0:3\], z0\.b, z15\.b
+[^:]+: c1274731 umlall za\.s\[w10, 4:7\], z25\.b, z7\.b
+[^:]+: c1200010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206010 umlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200011 umlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003d0 umlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003f0 umlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003f0 umlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2271 umlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306010 umlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300011 umlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300390 umlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003b0 umlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003d0 umlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003d0 umlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003f0 umlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2330 umlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1a00010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a06010 umlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00011 umlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a003d0 umlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be0010 umlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b242d1 umlall za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a10010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a16010 umlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10011 umlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10390 umlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd0010 umlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b96210 umlall za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
+[^:]+: c1000018 umlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006018 umlsll za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c100001b umlsll za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003f8 umlsll za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0018 umlsll za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c18 umlsll za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6ba umlsll za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106018 umlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100019 umlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003d8 umlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c1e umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e59 umlsll za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e018 umlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108019 umlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108398 umlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c1e umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec71c umlsll za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200418 umlsll za\.s\[w8, 0:3\], z0\.b, z0\.b
+[^:]+: c1206418 umlsll za\.s\[w11, 0:3\], z0\.b, z0\.b
+[^:]+: c120041b umlsll za\.s\[w8, 12:15\], z0\.b, z0\.b
+[^:]+: c12007f8 umlsll za\.s\[w8, 0:3\], z31\.b, z0\.b
+[^:]+: c12f0418 umlsll za\.s\[w8, 0:3\], z0\.b, z15\.b
+[^:]+: c1274739 umlsll za\.s\[w10, 4:7\], z25\.b, z7\.b
+[^:]+: c1200018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206018 umlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200019 umlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003d8 umlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003f8 umlsll za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003f8 umlsll za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2279 umlsll za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306018 umlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300019 umlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300398 umlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003b8 umlsll za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003d8 umlsll za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003d8 umlsll za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003f8 umlsll za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2338 umlsll za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1a00018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a06018 umlsll za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00019 umlsll za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a003d8 umlsll za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be0018 umlsll za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b242d9 umlsll za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a10018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a16018 umlsll za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10019 umlsll za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10398 umlsll za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd0018 umlsll za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b96218 umlsll za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
diff --git a/gas/testsuite/gas/aarch64/sme2-13.s b/gas/testsuite/gas/aarch64/sme2-13.s
new file mode 100644
index 00000000000..3881461ac3e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-13.s
@@ -0,0 +1,283 @@
+ smlall za.s[w8, 0:3], z0.b, z0.b[0]
+ smlall za.s[w11, 0:3], z0.b, z0.b[0]
+ smlall za.s[w8, 12:15], z0.b, z0.b[0]
+ smlall za.s[w8, 0:3], z31.b, z0.b[0]
+ smlall za.s[w8, 0:3], z0.b, z15.b[0]
+ smlall za.s[w8, 0:3], z0.b, z0.b[15]
+ smlall za.s[w9, 8:11], z21.b, z9.b[9]
+
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ smlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ smlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ smlall za.s[w8, 0:3], z0.b, z0.b
+ smlall za.s[w11, 0:3], z0.b, z0.b
+ smlall za.s[w8, 12:15], z0.b, z0.b
+ smlall za.s[w8, 0:3], z31.b, z0.b
+ smlall za.s[w8, 0:3], z0.b, z15.b
+ smlall za.s[w10, 4:7], z25.b, z7.b
+
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ smlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ smlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ smlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ smlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ smlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ smlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ smlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ smlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ smlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ smlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ smlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ smlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ smlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ smlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ smlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ smlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
+
+ smlsll za.s[w8, 0:3], z0.b, z0.b[0]
+ smlsll za.s[w11, 0:3], z0.b, z0.b[0]
+ smlsll za.s[w8, 12:15], z0.b, z0.b[0]
+ smlsll za.s[w8, 0:3], z31.b, z0.b[0]
+ smlsll za.s[w8, 0:3], z0.b, z15.b[0]
+ smlsll za.s[w8, 0:3], z0.b, z0.b[15]
+ smlsll za.s[w9, 8:11], z21.b, z9.b[9]
+
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ smlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ smlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ smlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ smlsll za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ smlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ smlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ smlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ smlsll za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ smlsll za.s[w8, 0:3], z0.b, z0.b
+ smlsll za.s[w11, 0:3], z0.b, z0.b
+ smlsll za.s[w8, 12:15], z0.b, z0.b
+ smlsll za.s[w8, 0:3], z31.b, z0.b
+ smlsll za.s[w8, 0:3], z0.b, z15.b
+ smlsll za.s[w10, 4:7], z25.b, z7.b
+
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ smlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ smlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ smlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ smlsll za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ smlsll za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ smlsll za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ smlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ smlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ smlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ smlsll za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ smlsll za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ smlsll za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ smlsll za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ smlsll za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ smlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ smlsll za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ smlsll za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ smlsll za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ smlsll za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ smlsll za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ smlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ smlsll za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ smlsll za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ smlsll za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ smlsll za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ smlsll za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
+
+ umlall za.s[w8, 0:3], z0.b, z0.b[0]
+ umlall za.s[w11, 0:3], z0.b, z0.b[0]
+ umlall za.s[w8, 12:15], z0.b, z0.b[0]
+ umlall za.s[w8, 0:3], z31.b, z0.b[0]
+ umlall za.s[w8, 0:3], z0.b, z15.b[0]
+ umlall za.s[w8, 0:3], z0.b, z0.b[15]
+ umlall za.s[w9, 8:11], z21.b, z9.b[9]
+
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ umlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ umlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ umlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ umlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ umlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ umlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ umlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ umlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ umlall za.s[w8, 0:3], z0.b, z0.b
+ umlall za.s[w11, 0:3], z0.b, z0.b
+ umlall za.s[w8, 12:15], z0.b, z0.b
+ umlall za.s[w8, 0:3], z31.b, z0.b
+ umlall za.s[w8, 0:3], z0.b, z15.b
+ umlall za.s[w10, 4:7], z25.b, z7.b
+
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ umlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ umlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ umlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ umlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ umlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ umlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ umlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ umlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ umlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ umlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ umlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ umlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ umlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ umlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ umlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ umlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ umlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ umlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ umlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ umlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ umlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ umlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ umlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ umlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ umlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ umlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
+
+ umlsll za.s[w8, 0:3], z0.b, z0.b[0]
+ umlsll za.s[w11, 0:3], z0.b, z0.b[0]
+ umlsll za.s[w8, 12:15], z0.b, z0.b[0]
+ umlsll za.s[w8, 0:3], z31.b, z0.b[0]
+ umlsll za.s[w8, 0:3], z0.b, z15.b[0]
+ umlsll za.s[w8, 0:3], z0.b, z0.b[15]
+ umlsll za.s[w9, 8:11], z21.b, z9.b[9]
+
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ umlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ umlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ umlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ umlsll za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ umlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ umlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ umlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ umlsll za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ umlsll za.s[w8, 0:3], z0.b, z0.b
+ umlsll za.s[w11, 0:3], z0.b, z0.b
+ umlsll za.s[w8, 12:15], z0.b, z0.b
+ umlsll za.s[w8, 0:3], z31.b, z0.b
+ umlsll za.s[w8, 0:3], z0.b, z15.b
+ umlsll za.s[w10, 4:7], z25.b, z7.b
+
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ umlsll za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ umlsll za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ umlsll za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ umlsll za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ umlsll za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ umlsll za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ umlsll za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ umlsll za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ umlsll za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ umlsll za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ umlsll za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ umlsll za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ umlsll za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ umlsll za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ umlsll za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ umlsll za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ umlsll za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ umlsll za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ umlsll za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ umlsll za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ umlsll za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ umlsll za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ umlsll za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ umlsll za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ umlsll za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ umlsll za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-14-invalid.d b/gas/testsuite/gas/aarch64/sme2-14-invalid.d
new file mode 100644
index 00000000000..980bd4e2d28
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-14-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-14-invalid.s
+#error_output: sme2-14-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-14-invalid.l b/gas/testsuite/gas/aarch64/sme2-14-invalid.l
new file mode 100644
index 00000000000..c398f6bfed5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-14-invalid.l
@@ -0,0 +1,7 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `sumlall 0,z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sumlall za\.s\[w8,0:3\],0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],z0\.b,0'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-14-invalid.s b/gas/testsuite/gas/aarch64/sme2-14-invalid.s
new file mode 100644
index 00000000000..8004abbe0f5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-14-invalid.s
@@ -0,0 +1,7 @@
+ sumlall 0, z0.b, z0.b[0]
+ sumlall za.s[w8, 0:3], 0, z0.b[0]
+ sumlall za.s[w8, 0:3], z0.b, 0
+
+ sumlall za.s[w8, 0:3], z0.b, z0.b
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-14-noarch.d b/gas/testsuite/gas/aarch64/sme2-14-noarch.d
new file mode 100644
index 00000000000..514960702b0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-14-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-14.s
+#error_output: sme2-14-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-14-noarch.l b/gas/testsuite/gas/aarch64/sme2-14-noarch.l
new file mode 100644
index 00000000000..76f5e43c298
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-14-noarch.l
@@ -0,0 +1,107 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z31\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],z25\.b,z7\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-14.d b/gas/testsuite/gas/aarch64/sme2-14.d
new file mode 100644
index 00000000000..e603f095cc4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-14.d
@@ -0,0 +1,115 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1000014 sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006014 sumlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1000017 sumlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003f4 sumlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0014 sumlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c14 sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6b6 sumlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106030 sumlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100031 sumlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003f0 sumlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0030 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c36 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e71 sumlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e030 sumlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108031 sumlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c11083b0 sumlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8030 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c36 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec734 sumlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206014 sumlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200015 sumlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003d4 sumlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003f4 sumlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003f4 sumlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0014 sumlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2275 sumlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306014 sumlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300015 sumlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300394 sumlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003b4 sumlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003d4 sumlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003d4 sumlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003f4 sumlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0014 sumlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2334 sumlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1000004 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1006004 usmlall za\.s\[w11, 0:3\], z0\.b, z0\.b\[0\]
+[^:]+: c1000007 usmlall za\.s\[w8, 12:15\], z0\.b, z0\.b\[0\]
+[^:]+: c10003e4 usmlall za\.s\[w8, 0:3\], z31\.b, z0\.b\[0\]
+[^:]+: c10f0004 usmlall za\.s\[w8, 0:3\], z0\.b, z15\.b\[0\]
+[^:]+: c1009c04 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[15\]
+[^:]+: c109a6a6 usmlall za\.s\[w9, 8:11\], z21\.b, z9\.b\[9\]
+[^:]+: c1100020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1106020 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1100021 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c11003e0 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f0020 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1100c26 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b\[15\]
+[^:]+: c1192e61 usmlall za\.s\[w9, 4:7, vgx2\], {z18\.b-z19\.b}, z9\.b\[12\]
+[^:]+: c1108020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c110e020 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1108021 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c11083a0 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c11f8020 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1108c26 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b\[15\]
+[^:]+: c11ec724 usmlall za\.s\[w10, 0:3, vgx4\], {z24\.b-z27\.b}, z14\.b\[6\]
+[^:]+: c1200404 usmlall za\.s\[w8, 0:3\], z0\.b, z0\.b
+[^:]+: c1206404 usmlall za\.s\[w11, 0:3\], z0\.b, z0\.b
+[^:]+: c1200407 usmlall za\.s\[w8, 12:15\], z0\.b, z0\.b
+[^:]+: c12007e4 usmlall za\.s\[w8, 0:3\], z31\.b, z0\.b
+[^:]+: c12f0404 usmlall za\.s\[w8, 0:3\], z0\.b, z15\.b
+[^:]+: c1274725 usmlall za\.s\[w10, 4:7\], z25\.b, z7\.b
+[^:]+: c1200004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1206004 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1200005 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12003c4 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12003e4 usmlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12003e4 usmlall za\.s\[w8, 0:3, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f0004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12d2265 usmlall za\.s\[w9, 4:7, vgx2\], {z19\.b-z20\.b}, z13\.b
+[^:]+: c1300004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1306004 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300005 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1300384 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13003a4 usmlall za\.s\[w8, 0:3, vgx4\], {z29\.b-z0\.b}, z0\.b
+[^:]+: c13003c4 usmlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003c4 usmlall za\.s\[w8, 0:3, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13003e4 usmlall za\.s\[w8, 0:3, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f0004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c13e2324 usmlall za\.s\[w9, 0:3, vgx4\], {z25\.b-z28\.b}, z14\.b
+[^:]+: c1a00004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a06004 usmlall za\.s\[w11, 0:3, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a00005 usmlall za\.s\[w8, 4:7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a003c4 usmlall za\.s\[w8, 0:3, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be0004 usmlall za\.s\[w8, 0:3, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b242c5 usmlall za\.s\[w10, 4:7, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a10004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a16004 usmlall za\.s\[w11, 0:3, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10005 usmlall za\.s\[w8, 4:7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a10384 usmlall za\.s\[w8, 0:3, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd0004 usmlall za\.s\[w8, 0:3, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b96204 usmlall za\.s\[w11, 0:3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
diff --git a/gas/testsuite/gas/aarch64/sme2-14.s b/gas/testsuite/gas/aarch64/sme2-14.s
new file mode 100644
index 00000000000..d1fa794f35b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-14.s
@@ -0,0 +1,118 @@
+ sumlall za.s[w8, 0:3], z0.b, z0.b[0]
+ sumlall za.s[w11, 0:3], z0.b, z0.b[0]
+ sumlall za.s[w8, 12:15], z0.b, z0.b[0]
+ sumlall za.s[w8, 0:3], z31.b, z0.b[0]
+ sumlall za.s[w8, 0:3], z0.b, z15.b[0]
+ sumlall za.s[w8, 0:3], z0.b, z0.b[15]
+ sumlall za.s[w9, 8:11], z21.b, z9.b[9]
+
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ sumlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ sumlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ sumlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ sumlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ sumlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ sumlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ sumlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ sumlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ sumlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ sumlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ sumlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ sumlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ sumlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ sumlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ sumlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ sumlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ sumlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ sumlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ sumlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ sumlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ sumlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ sumlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ sumlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ sumlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ sumlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ sumlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ sumlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ sumlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ usmlall za.s[w8, 0:3], z0.b, z0.b[0]
+ usmlall za.s[w11, 0:3], z0.b, z0.b[0]
+ usmlall za.s[w8, 12:15], z0.b, z0.b[0]
+ usmlall za.s[w8, 0:3], z31.b, z0.b[0]
+ usmlall za.s[w8, 0:3], z0.b, z15.b[0]
+ usmlall za.s[w8, 0:3], z0.b, z0.b[15]
+ usmlall za.s[w9, 8:11], z21.b, z9.b[9]
+
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[0]
+ usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b[0]
+ usmlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b[0]
+ usmlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b[0]
+ usmlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b[0]
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b[0]
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b[15]
+ usmlall za.s[w9, 4:7], { z18.b - z19.b }, z9.b[12]
+
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[0]
+ usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b[0]
+ usmlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b[0]
+ usmlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b[0]
+ usmlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b[0]
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b[0]
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b[15]
+ usmlall za.s[w10, 0:3], { z24.b - z27.b }, z14.b[6]
+
+ usmlall za.s[w8, 0:3], z0.b, z0.b
+ usmlall za.s[w11, 0:3], z0.b, z0.b
+ usmlall za.s[w8, 12:15], z0.b, z0.b
+ usmlall za.s[w8, 0:3], z31.b, z0.b
+ usmlall za.s[w8, 0:3], z0.b, z15.b
+ usmlall za.s[w10, 4:7], z25.b, z7.b
+
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z0.b
+ usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, z0.b
+ usmlall za.s[w11, 0:3], { z0.b - z1.b }, z0.b
+ usmlall za.s[w8, 4:7], { z0.b - z1.b }, z0.b
+ usmlall za.s[w8, 0:3], { z30.b - z31.b }, z0.b
+ usmlall za.s[w8, 0:3], { z31.b, z0.b }, z0.b
+ usmlall za.s[w8, 0:3], { z31.b - z0.b }, z0.b
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, z15.b
+ usmlall za.s[w9, 4:7], { z19.b - z20.b }, z13.b
+
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z0.b
+ usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, z0.b
+ usmlall za.s[w11, 0:3], { z0.b - z3.b }, z0.b
+ usmlall za.s[w8, 4:7], { z0.b - z3.b }, z0.b
+ usmlall za.s[w8, 0:3], { z28.b - z31.b }, z0.b
+ usmlall za.s[w8, 0:3], { z29.b - z0.b }, z0.b
+ usmlall za.s[w8, 0:3], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ usmlall za.s[w8, 0:3], { z30.b - z1.b }, z0.b
+ usmlall za.s[w8, 0:3], { z31.b - z2.b }, z0.b
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, z15.b
+ usmlall za.s[w9, 0:3], { z25.b - z28.b }, z14.b
+
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ usmlall za.s[w8, 0:3, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ usmlall za.s[w11, 0:3], { z0.b - z1.b }, { z0.b - z1.b }
+ usmlall za.s[w8, 4:7], { z0.b - z1.b }, { z0.b - z1.b }
+ usmlall za.s[w8, 0:3], { z30.b - z31.b }, { z0.b - z1.b }
+ usmlall za.s[w8, 0:3], { z0.b - z1.b }, { z30.b - z31.b }
+ usmlall za.s[w10, 4:7], { z22.b - z23.b }, { z18.b - z19.b }
+
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ usmlall za.s[w8, 0:3, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ usmlall za.s[w11, 0:3], { z0.b - z3.b }, { z0.b - z3.b }
+ usmlall za.s[w8, 4:7], { z0.b - z3.b }, { z0.b - z3.b }
+ usmlall za.s[w8, 0:3], { z28.b - z31.b }, { z0.b - z3.b }
+ usmlall za.s[w8, 0:3], { z0.b - z3.b }, { z28.b - z31.b }
+ usmlall za.s[w11, 0:3], { z16.b - z19.b }, { z24.b - z27.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.d b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.d
new file mode 100644
index 00000000000..955fd3b724f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-i16i64-2-invalid.s
+#error_output: sme2-i16i64-2-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l
new file mode 100644
index 00000000000..280f685382b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l
@@ -0,0 +1,95 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected 'za' rather than a ZA tile at operand 1 -- `smlall za0h\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0,vgx4\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx2\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx4\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.b,z0\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.d,z0\.d\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx2\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx4\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.d\[w8,0:3\],{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z1\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z1\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z2\.h-z5\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z3\.h-z6\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.s b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.s
new file mode 100644
index 00000000000..142ff5e25f2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.s
@@ -0,0 +1,88 @@
+ smlall za0.d[w8, 0:3], z0.h, z0.h[0]
+ smlall za0h.d[w8, 0:3], z0.h, z0.h[0]
+ smlall za.d[w7, 0:3], z0.h, z0.h[0]
+ smlall za.d[w12, 0:3], z0.h, z0.h[0]
+ smlall za.d[w8, 0], z0.h, z0.h[0]
+ smlall za.d[w8, 0:1], z0.h, z0.h[0]
+ smlall za.d[w8, 0:2], z0.h, z0.h[0]
+ smlall za.d[w8, 0, vgx4], z0.h, z0.h[0]
+ smlall za.d[w8, 0:3, vgx2], z0.h, z0.h[0]
+ smlall za.d[w8, 0:3, vgx4], z0.h, z0.h[0]
+ smlall za.d[w8, 1:4], z0.h, z0.h[0]
+ smlall za.d[w8, 2:5], z0.h, z0.h[0]
+ smlall za.d[w8, 3:6], z0.h, z0.h[0]
+ smlall za.d[w8, 16:19], z0.h, z0.h[0]
+ smlall za.d[w8, 0:3], z0.h, z16.h[0]
+ smlall za.d[w8, 0:3], z0.h, z0.h[-1]
+ smlall za.d[w8, 0:3], z0.h, z0.h[8]
+ smlall za.d[w8, 0:3], z0.b, z0.b[0]
+ smlall za.d[w8, 0:3], z0.d, z0.d[0]
+
+ smlall za.d[w7, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w12, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:2], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 1:4], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 2:5], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 3:6], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 8:11], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z1.h - z2.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z16.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[-1]
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[8]
+
+ smlall za.d[w7, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w12, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:1], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:2], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 1:4], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 2:5], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 3:6], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 8:11], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z1.h - z4.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z2.h - z5.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z3.h - z6.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z16.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[-1]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[8]
+
+ smlall za.d[w8, 0:3, vgx2], z0.h, z0.h
+ smlall za.d[w8, 0:3, vgx4], z0.h, z0.h
+ smlall za.d[w8, 16:19], z0.h, z0.h
+ smlall za.d[w8, 0:3], z0.h, z16.h
+
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 8:11], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z2.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z16.h
+
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 8:11], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z16.h
+
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 8:11], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3], { z1.h - z2.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, { z1.h - z2.h }
+
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 8:11], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z1.h - z4.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z2.h - z5.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z3.h - z6.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z1.h - z4.h }
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z2.h - z5.h }
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z3.h - z6.h }
+
+ sumlall za.d[w8, 0:3], z0.h, z0.h[0]
+ sumlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ sumlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ sumlall za.d[w8, 0:3], z0.h, z0.h
+ sumlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ sumlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ sumlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ sumlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.d b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.d
new file mode 100644
index 00000000000..4f541e30520
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sme2-i16i64-2.s
+#error_output: sme2-i16i64-2-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l
new file mode 100644
index 00000000000..c78057fa447
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l
@@ -0,0 +1,253 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,12:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[5\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],z25\.h,z7\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2.d b/gas/testsuite/gas/aarch64/sme2-i16i64-2.d
new file mode 100644
index 00000000000..1f0a3f0d426
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2.d
@@ -0,0 +1,261 @@
+#as: -march=armv8-a+sme2+sme-i16i64
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1800000 smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c1806000 smlall za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c1800003 smlall za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18003e0 smlall za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\]
+[^:]+: c18f0000 smlall za\.d\[w8, 0:3\], z0\.h, z15\.h\[0\]
+[^:]+: c1808c00 smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[7\]
+[^:]+: c1892ea2 smlall za\.d\[w9, 8:11\], z21\.h, z9\.h\[3\]
+[^:]+: c1900000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1900000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1906000 smlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1900001 smlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c19003c0 smlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f0000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1900406 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1992245 smlall za\.d\[w9, 4:7, vgx2\], {z18\.h-z19\.h}, z9\.h\[2\]
+[^:]+: c1908000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190e000 smlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908001 smlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908380 smlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f8000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1908406 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ec704 smlall za\.d\[w10, 0:3, vgx4\], {z24\.h-z27\.h}, z14\.h\[6\]
+[^:]+: c1600400 smlall za\.d\[w8, 0:3\], z0\.h, z0\.h
+[^:]+: c1606400 smlall za\.d\[w11, 0:3\], z0\.h, z0\.h
+[^:]+: c1600403 smlall za\.d\[w8, 12:15\], z0\.h, z0\.h
+[^:]+: c16007e0 smlall za\.d\[w8, 0:3\], z31\.h, z0\.h
+[^:]+: c16f0400 smlall za\.d\[w8, 0:3\], z0\.h, z15\.h
+[^:]+: c1674721 smlall za\.d\[w10, 4:7\], z25\.h, z7\.h
+[^:]+: c1600000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1606000 smlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600001 smlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c16003c0 smlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c16003e0 smlall za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16003e0 smlall za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f0000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16d2261 smlall za\.d\[w9, 4:7, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1700000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1706000 smlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700001 smlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700380 smlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c17003a0 smlall za\.d\[w8, 0:3, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c17003c0 smlall za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17003c0 smlall za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17003e0 smlall za\.d\[w8, 0:3, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f0000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c17e2320 smlall za\.d\[w9, 0:3, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1e00000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e06000 smlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00001 smlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e003c0 smlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe0000 smlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f242c1 smlall za\.d\[w10, 4:7, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e10000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e16000 smlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10001 smlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10380 smlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd0000 smlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96200 smlall za\.d\[w11, 0:3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1800008 smlsll za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c1806008 smlsll za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c180000b smlsll za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18003e8 smlsll za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\]
+[^:]+: c18f0008 smlsll za\.d\[w8, 0:3\], z0\.h, z15\.h\[0\]
+[^:]+: c1808c08 smlsll za\.d\[w8, 0:3\], z0\.h, z0\.h\[7\]
+[^:]+: c1892eaa smlsll za\.d\[w9, 8:11\], z21\.h, z9\.h\[3\]
+[^:]+: c1900008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1900008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1906008 smlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1900009 smlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c19003c8 smlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f0008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c190040e smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c199224d smlsll za\.d\[w9, 4:7, vgx2\], {z18\.h-z19\.h}, z9\.h\[2\]
+[^:]+: c1908008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190e008 smlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908009 smlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908388 smlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f8008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c190840e smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ec70c smlsll za\.d\[w10, 0:3, vgx4\], {z24\.h-z27\.h}, z14\.h\[6\]
+[^:]+: c1600408 smlsll za\.d\[w8, 0:3\], z0\.h, z0\.h
+[^:]+: c1606408 smlsll za\.d\[w11, 0:3\], z0\.h, z0\.h
+[^:]+: c160040b smlsll za\.d\[w8, 12:15\], z0\.h, z0\.h
+[^:]+: c16007e8 smlsll za\.d\[w8, 0:3\], z31\.h, z0\.h
+[^:]+: c16f0408 smlsll za\.d\[w8, 0:3\], z0\.h, z15\.h
+[^:]+: c1674729 smlsll za\.d\[w10, 4:7\], z25\.h, z7\.h
+[^:]+: c1600008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1606008 smlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600009 smlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c16003c8 smlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c16003e8 smlsll za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16003e8 smlsll za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f0008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16d2269 smlsll za\.d\[w9, 4:7, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1700008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1706008 smlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700009 smlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700388 smlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c17003a8 smlsll za\.d\[w8, 0:3, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c17003c8 smlsll za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17003c8 smlsll za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17003e8 smlsll za\.d\[w8, 0:3, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f0008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c17e2328 smlsll za\.d\[w9, 0:3, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1e00008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e06008 smlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00009 smlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e003c8 smlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe0008 smlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f242c9 smlsll za\.d\[w10, 4:7, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e10008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e16008 smlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10009 smlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10388 smlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd0008 smlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96208 smlsll za\.d\[w11, 0:3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1800010 umlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c1806010 umlall za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c1800013 umlall za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18003f0 umlall za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\]
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+[^:]+: c1892eb2 umlall za\.d\[w9, 8:11\], z21\.h, z9\.h\[3\]
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+[^:]+: c1900010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1906010 umlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
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+[^:]+: c19003d0 umlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f0010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1900416 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c1992653 umlall za\.d\[w9, 4:7, vgx2\], {z18\.h-z19\.h}, z9\.h\[5\]
+[^:]+: c1908010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190e010 umlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908011 umlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908390 umlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f8010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1908416 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ec312 umlall za\.d\[w10, 0:3, vgx4\], {z24\.h-z27\.h}, z14\.h\[1\]
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+[^:]+: c1606410 umlall za\.d\[w11, 0:3\], z0\.h, z0\.h
+[^:]+: c1600413 umlall za\.d\[w8, 12:15\], z0\.h, z0\.h
+[^:]+: c16007f0 umlall za\.d\[w8, 0:3\], z31\.h, z0\.h
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+[^:]+: c1674731 umlall za\.d\[w10, 4:7\], z25\.h, z7\.h
+[^:]+: c1600010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1606010 umlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600011 umlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c16003d0 umlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c16003f0 umlall za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16003f0 umlall za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f0010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16d2271 umlall za\.d\[w9, 4:7, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1700010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1706010 umlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700011 umlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700390 umlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c17003b0 umlall za\.d\[w8, 0:3, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c17003d0 umlall za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17003d0 umlall za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17003f0 umlall za\.d\[w8, 0:3, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f0010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c17e2330 umlall za\.d\[w9, 0:3, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1e00010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e06010 umlall za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00011 umlall za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e003d0 umlall za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe0010 umlall za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f242d1 umlall za\.d\[w10, 4:7, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e10010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e16010 umlall za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10011 umlall za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10390 umlall za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd0010 umlall za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96210 umlall za\.d\[w11, 0:3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1800018 umlsll za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c1806018 umlsll za\.d\[w11, 0:3\], z0\.h, z0\.h\[0\]
+[^:]+: c180001b umlsll za\.d\[w8, 12:15\], z0\.h, z0\.h\[0\]
+[^:]+: c18003f8 umlsll za\.d\[w8, 0:3\], z31\.h, z0\.h\[0\]
+[^:]+: c18f0018 umlsll za\.d\[w8, 0:3\], z0\.h, z15\.h\[0\]
+[^:]+: c1808c18 umlsll za\.d\[w8, 0:3\], z0\.h, z0\.h\[7\]
+[^:]+: c1892eba umlsll za\.d\[w9, 8:11\], z21\.h, z9\.h\[3\]
+[^:]+: c1900018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1900018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1906018 umlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1900019 umlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c19003d8 umlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f0018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c190041e umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h\[7\]
+[^:]+: c199225d umlsll za\.d\[w9, 4:7, vgx2\], {z18\.h-z19\.h}, z9\.h\[2\]
+[^:]+: c1908018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c190e018 umlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908019 umlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1908398 umlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c19f8018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c190841e umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h\[7\]
+[^:]+: c19ec71c umlsll za\.d\[w10, 0:3, vgx4\], {z24\.h-z27\.h}, z14\.h\[6\]
+[^:]+: c1600418 umlsll za\.d\[w8, 0:3\], z0\.h, z0\.h
+[^:]+: c1606418 umlsll za\.d\[w11, 0:3\], z0\.h, z0\.h
+[^:]+: c160041b umlsll za\.d\[w8, 12:15\], z0\.h, z0\.h
+[^:]+: c16007f8 umlsll za\.d\[w8, 0:3\], z31\.h, z0\.h
+[^:]+: c16f0418 umlsll za\.d\[w8, 0:3\], z0\.h, z15\.h
+[^:]+: c1674739 umlsll za\.d\[w10, 4:7\], z25\.h, z7\.h
+[^:]+: c1600018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1606018 umlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1600019 umlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c16003d8 umlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c16003f8 umlsll za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16003f8 umlsll za\.d\[w8, 0:3, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f0018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16d2279 umlsll za\.d\[w9, 4:7, vgx2\], {z19\.h-z20\.h}, z13\.h
+[^:]+: c1700018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1706018 umlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700019 umlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1700398 umlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c17003b8 umlsll za\.d\[w8, 0:3, vgx4\], {z29\.h-z0\.h}, z0\.h
+[^:]+: c17003d8 umlsll za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17003d8 umlsll za\.d\[w8, 0:3, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17003f8 umlsll za\.d\[w8, 0:3, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f0018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c17e2338 umlsll za\.d\[w9, 0:3, vgx4\], {z25\.h-z28\.h}, z14\.h
+[^:]+: c1e00018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e06018 umlsll za\.d\[w11, 0:3, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e00019 umlsll za\.d\[w8, 4:7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e003d8 umlsll za\.d\[w8, 0:3, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe0018 umlsll za\.d\[w8, 0:3, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f242d9 umlsll za\.d\[w10, 4:7, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e10018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e16018 umlsll za\.d\[w11, 0:3, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10019 umlsll za\.d\[w8, 4:7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e10398 umlsll za\.d\[w8, 0:3, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd0018 umlsll za\.d\[w8, 0:3, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f96218 umlsll za\.d\[w11, 0:3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2.s b/gas/testsuite/gas/aarch64/sme2-i16i64-2.s
new file mode 100644
index 00000000000..8fc7015cc70
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2.s
@@ -0,0 +1,283 @@
+ smlall za.d[w8, 0:3], z0.h, z0.h[0]
+ smlall za.d[w11, 0:3], z0.h, z0.h[0]
+ smlall za.d[w8, 12:15], z0.h, z0.h[0]
+ smlall za.d[w8, 0:3], z31.h, z0.h[0]
+ smlall za.d[w8, 0:3], z0.h, z15.h[0]
+ smlall za.d[w8, 0:3], z0.h, z0.h[7]
+ smlall za.d[w9, 8:11], z21.h, z9.h[3]
+
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7]
+ smlall za.d[w9, 4:7], { z18.h - z19.h }, z9.h[2]
+
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0]
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7]
+ smlall za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6]
+
+ smlall za.d[w8, 0:3], z0.h, z0.h
+ smlall za.d[w11, 0:3], z0.h, z0.h
+ smlall za.d[w8, 12:15], z0.h, z0.h
+ smlall za.d[w8, 0:3], z31.h, z0.h
+ smlall za.d[w8, 0:3], z0.h, z15.h
+ smlall za.d[w10, 4:7], z25.h, z7.h
+
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h
+ smlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h
+ smlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h
+ smlall za.d[w8, 0:3], { z31.h, z0.h }, z0.h
+ smlall za.d[w8, 0:3], { z31.h - z0.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h
+ smlall za.d[w9, 4:7], { z19.h - z20.h }, z13.h
+
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h
+ smlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h
+ smlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h
+ smlall za.d[w8, 0:3], { z29.h - z0.h }, z0.h
+ smlall za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ smlall za.d[w8, 0:3], { z30.h - z1.h }, z0.h
+ smlall za.d[w8, 0:3], { z31.h - z2.h }, z0.h
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h
+ smlall za.d[w9, 0:3], { z25.h - z28.h }, z14.h
+
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h }
+ smlall za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h }
+ smlall za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h }
+
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h }
+ smlall za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h }
+ smlall za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ smlsll za.d[w8, 0:3], z0.h, z0.h[0]
+ smlsll za.d[w11, 0:3], z0.h, z0.h[0]
+ smlsll za.d[w8, 12:15], z0.h, z0.h[0]
+ smlsll za.d[w8, 0:3], z31.h, z0.h[0]
+ smlsll za.d[w8, 0:3], z0.h, z15.h[0]
+ smlsll za.d[w8, 0:3], z0.h, z0.h[7]
+ smlsll za.d[w9, 8:11], z21.h, z9.h[3]
+
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0]
+ smlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0]
+ smlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0]
+ smlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0]
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0]
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7]
+ smlsll za.d[w9, 4:7], { z18.h - z19.h }, z9.h[2]
+
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0]
+ smlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0]
+ smlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0]
+ smlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0]
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0]
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7]
+ smlsll za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6]
+
+ smlsll za.d[w8, 0:3], z0.h, z0.h
+ smlsll za.d[w11, 0:3], z0.h, z0.h
+ smlsll za.d[w8, 12:15], z0.h, z0.h
+ smlsll za.d[w8, 0:3], z31.h, z0.h
+ smlsll za.d[w8, 0:3], z0.h, z15.h
+ smlsll za.d[w10, 4:7], z25.h, z7.h
+
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h
+ smlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h
+ smlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h
+ smlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h
+ smlsll za.d[w8, 0:3], { z31.h, z0.h }, z0.h
+ smlsll za.d[w8, 0:3], { z31.h - z0.h }, z0.h
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h
+ smlsll za.d[w9, 4:7], { z19.h - z20.h }, z13.h
+
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h
+ smlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h
+ smlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h
+ smlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h
+ smlsll za.d[w8, 0:3], { z29.h - z0.h }, z0.h
+ smlsll za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ smlsll za.d[w8, 0:3], { z30.h - z1.h }, z0.h
+ smlsll za.d[w8, 0:3], { z31.h - z2.h }, z0.h
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h
+ smlsll za.d[w9, 0:3], { z25.h - z28.h }, z14.h
+
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsll za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsll za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h }
+ smlsll za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h }
+ smlsll za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h }
+ smlsll za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h }
+
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsll za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsll za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h }
+ smlsll za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h }
+ smlsll za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h }
+ smlsll za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ umlall za.d[w8, 0:3], z0.h, z0.h[0]
+ umlall za.d[w11, 0:3], z0.h, z0.h[0]
+ umlall za.d[w8, 12:15], z0.h, z0.h[0]
+ umlall za.d[w8, 0:3], z31.h, z0.h[0]
+ umlall za.d[w8, 0:3], z0.h, z15.h[0]
+ umlall za.d[w8, 0:3], z0.h, z0.h[7]
+ umlall za.d[w9, 8:11], z21.h, z9.h[3]
+
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0]
+ umlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0]
+ umlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0]
+ umlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0]
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0]
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7]
+ umlall za.d[w9, 4:7], { z18.h - z19.h }, z9.h[5]
+
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0]
+ umlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0]
+ umlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0]
+ umlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0]
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0]
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7]
+ umlall za.d[w10, 0:3], { z24.h - z27.h }, z14.h[1]
+
+ umlall za.d[w8, 0:3], z0.h, z0.h
+ umlall za.d[w11, 0:3], z0.h, z0.h
+ umlall za.d[w8, 12:15], z0.h, z0.h
+ umlall za.d[w8, 0:3], z31.h, z0.h
+ umlall za.d[w8, 0:3], z0.h, z15.h
+ umlall za.d[w10, 4:7], z25.h, z7.h
+
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h
+ umlall za.d[w11, 0:3], { z0.h - z1.h }, z0.h
+ umlall za.d[w8, 4:7], { z0.h - z1.h }, z0.h
+ umlall za.d[w8, 0:3], { z30.h - z31.h }, z0.h
+ umlall za.d[w8, 0:3], { z31.h, z0.h }, z0.h
+ umlall za.d[w8, 0:3], { z31.h - z0.h }, z0.h
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, z15.h
+ umlall za.d[w9, 4:7], { z19.h - z20.h }, z13.h
+
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h
+ umlall za.d[w11, 0:3], { z0.h - z3.h }, z0.h
+ umlall za.d[w8, 4:7], { z0.h - z3.h }, z0.h
+ umlall za.d[w8, 0:3], { z28.h - z31.h }, z0.h
+ umlall za.d[w8, 0:3], { z29.h - z0.h }, z0.h
+ umlall za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ umlall za.d[w8, 0:3], { z30.h - z1.h }, z0.h
+ umlall za.d[w8, 0:3], { z31.h - z2.h }, z0.h
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, z15.h
+ umlall za.d[w9, 0:3], { z25.h - z28.h }, z14.h
+
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ umlall za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ umlall za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ umlall za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h }
+ umlall za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h }
+ umlall za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h }
+ umlall za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h }
+
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ umlall za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ umlall za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ umlall za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h }
+ umlall za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h }
+ umlall za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h }
+ umlall za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ umlsll za.d[w8, 0:3], z0.h, z0.h[0]
+ umlsll za.d[w11, 0:3], z0.h, z0.h[0]
+ umlsll za.d[w8, 12:15], z0.h, z0.h[0]
+ umlsll za.d[w8, 0:3], z31.h, z0.h[0]
+ umlsll za.d[w8, 0:3], z0.h, z15.h[0]
+ umlsll za.d[w8, 0:3], z0.h, z0.h[7]
+ umlsll za.d[w9, 8:11], z21.h, z9.h[3]
+
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[0]
+ umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h[0]
+ umlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h[0]
+ umlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h[0]
+ umlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h[0]
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h[0]
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h[7]
+ umlsll za.d[w9, 4:7], { z18.h - z19.h }, z9.h[2]
+
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[0]
+ umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h[0]
+ umlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h[0]
+ umlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h[0]
+ umlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h[0]
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h[0]
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h[7]
+ umlsll za.d[w10, 0:3], { z24.h - z27.h }, z14.h[6]
+
+ umlsll za.d[w8, 0:3], z0.h, z0.h
+ umlsll za.d[w11, 0:3], z0.h, z0.h
+ umlsll za.d[w8, 12:15], z0.h, z0.h
+ umlsll za.d[w8, 0:3], z31.h, z0.h
+ umlsll za.d[w8, 0:3], z0.h, z15.h
+ umlsll za.d[w10, 4:7], z25.h, z7.h
+
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z0.h
+ umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, z0.h
+ umlsll za.d[w11, 0:3], { z0.h - z1.h }, z0.h
+ umlsll za.d[w8, 4:7], { z0.h - z1.h }, z0.h
+ umlsll za.d[w8, 0:3], { z30.h - z31.h }, z0.h
+ umlsll za.d[w8, 0:3], { z31.h, z0.h }, z0.h
+ umlsll za.d[w8, 0:3], { z31.h - z0.h }, z0.h
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, z15.h
+ umlsll za.d[w9, 4:7], { z19.h - z20.h }, z13.h
+
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z0.h
+ umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, z0.h
+ umlsll za.d[w11, 0:3], { z0.h - z3.h }, z0.h
+ umlsll za.d[w8, 4:7], { z0.h - z3.h }, z0.h
+ umlsll za.d[w8, 0:3], { z28.h - z31.h }, z0.h
+ umlsll za.d[w8, 0:3], { z29.h - z0.h }, z0.h
+ umlsll za.d[w8, 0:3], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ umlsll za.d[w8, 0:3], { z30.h - z1.h }, z0.h
+ umlsll za.d[w8, 0:3], { z31.h - z2.h }, z0.h
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, z15.h
+ umlsll za.d[w9, 0:3], { z25.h - z28.h }, z14.h
+
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsll za.d[w8, 0:3, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsll za.d[w11, 0:3], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsll za.d[w8, 4:7], { z0.h - z1.h }, { z0.h - z1.h }
+ umlsll za.d[w8, 0:3], { z30.h - z31.h }, { z0.h - z1.h }
+ umlsll za.d[w8, 0:3], { z0.h - z1.h }, { z30.h - z31.h }
+ umlsll za.d[w10, 4:7], { z22.h - z23.h }, { z18.h - z19.h }
+
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsll za.d[w8, 0:3, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsll za.d[w11, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsll za.d[w8, 4:7], { z0.h - z3.h }, { z0.h - z3.h }
+ umlsll za.d[w8, 0:3], { z28.h - z31.h }, { z0.h - z3.h }
+ umlsll za.d[w8, 0:3], { z0.h - z3.h }, { z28.h - z31.h }
+ umlsll za.d[w11, 0:3], { z16.h - z19.h }, { z24.h - z27.h }
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 3b58bfaf146..f18f383a711 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -510,7 +510,9 @@ enum aarch64_opnd
AARCH64_OPND_SME_PNn3_INDEX2, /* Indexed pred-as-counter reg, bits [9:5]. */
AARCH64_OPND_SME_list_of_64bit_tiles, /* SME list of ZA tiles. */
AARCH64_OPND_SME_ZA_HV_idx_ldstr, /* SME destination ZA tile vector. */
+ AARCH64_OPND_SME_ZA_array_off1x4, /* SME ZA[<Wv>, #<imm1>*4:<imm1>*4+3]. */
AARCH64_OPND_SME_ZA_array_off2x2, /* SME ZA[<Wv>, #<imm2>*2:<imm2>*2+1]. */
+ AARCH64_OPND_SME_ZA_array_off2x4, /* SME ZA[<Wv>, #<imm2>*4:<imm2>*4+3]. */
AARCH64_OPND_SME_ZA_array_off3_0, /* SME ZA[<Wv>{, #<imm3>}]. */
AARCH64_OPND_SME_ZA_array_off3_5, /* SME ZA[<Wv>{, #<imm3>}]. */
AARCH64_OPND_SME_ZA_array_off3x2, /* SME ZA[<Wv>, #<imm3>*2:<imm3>*2+1]. */
@@ -520,8 +522,11 @@ enum aarch64_opnd
AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
AARCH64_OPND_SME_Zm_INDEX1, /* Zn.T[index], bits [19:16,10]. */
AARCH64_OPND_SME_Zm_INDEX2, /* Zn.T[index], bits [19:16,11:10]. */
+ AARCH64_OPND_SME_Zm_INDEX3_1, /* Zn.T[index], bits [19:16,10,2:1]. */
AARCH64_OPND_SME_Zm_INDEX3_2, /* Zn.T[index], bits [19:16,11:10,2]. */
AARCH64_OPND_SME_Zm_INDEX3_10, /* Zn.T[index], bits [19:16,15,11:10]. */
+ AARCH64_OPND_SME_Zm_INDEX4_1, /* Zn.T[index], bits [19:16,11:10,2:1]. */
+ AARCH64_OPND_SME_Zm_INDEX4_10, /* Zn.T[index], bits [19:16,15,12:10]. */
AARCH64_OPND_SME_Zn_INDEX1_16, /* Zn[index], bits [9:5] and [16:16]. */
AARCH64_OPND_SME_Zn_INDEX2_15, /* Zn[index], bits [9:5] and [16:15]. */
AARCH64_OPND_SME_Zn_INDEX2_16, /* Zn[index], bits [9:5] and [17:16]. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index badf3dc4c2a..3d439d4e688 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -685,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 263:
+ case 268:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -731,12 +731,12 @@ aarch64_insert_operand (const aarch64_operand *self,
case 193:
case 194:
case 237:
- case 257:
- case 258:
- case 260:
case 262:
+ case 263:
+ case 265:
case 267:
- case 268:
+ case 272:
+ case 273:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -805,8 +805,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 259:
- case 261:
+ case 264:
+ case 266:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
@@ -919,8 +919,6 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 247:
- case 248:
case 249:
case 250:
case 251:
@@ -929,22 +927,29 @@ aarch64_insert_operand (const aarch64_operand *self,
case 254:
case 255:
case 256:
+ case 257:
+ case 258:
+ case 259:
+ case 260:
+ case 261:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 239:
case 240:
case 241:
case 242:
case 243:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 244:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 245:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 246:
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 247:
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ case 248:
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 264:
- case 265:
- case 266:
+ case 269:
+ case 270:
+ case 271:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index a7578ca0bbc..72da86865eb 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2734;
+ return 2779;
}
}
}
@@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2631;
+ return 2647;
}
else
{
@@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2632;
+ return 2648;
}
}
else
@@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2655;
+ return 2671;
}
else
{
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2656;
+ return 2672;
}
}
}
@@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2647;
+ return 2663;
}
else
{
@@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2648;
+ return 2664;
}
}
else
@@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2639;
+ return 2655;
}
else
{
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2640;
+ return 2656;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2663;
+ return 2679;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2664;
+ return 2680;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2687;
+ return 2703;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2688;
+ return 2704;
}
}
}
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2679;
+ return 2695;
}
else
{
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2680;
+ return 2696;
}
}
else
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2671;
+ return 2687;
}
else
{
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2672;
+ return 2688;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2627;
+ return 2643;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2628;
+ return 2644;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2651;
+ return 2667;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2652;
+ return 2668;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2643;
+ return 2659;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2644;
+ return 2660;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2635;
+ return 2651;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2636;
+ return 2652;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2659;
+ return 2675;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2660;
+ return 2676;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2683;
+ return 2699;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2684;
+ return 2700;
}
}
}
@@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2675;
+ return 2691;
}
else
{
@@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2676;
+ return 2692;
}
}
else
@@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2667;
+ return 2683;
}
else
{
@@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2668;
+ return 2684;
}
}
}
@@ -1260,194 +1260,392 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 3) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx000xxxxxxxxx0xxx
- ld1b. */
- return 2507;
+ xx0000010000xxxxxxxxxxxxxxx000xx
+ smlall. */
+ return 2611;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx010xxxxxxxxx0xxx
- ld1w. */
- return 2531;
+ xx0000010000xxxxxxxxxxxxxxx001xx
+ usmlall. */
+ return 2763;
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001000xxxxx001xxxxxxxxx0xxx
- ld1h. */
- return 2523;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxx000xxx
+ smlall. */
+ return 2612;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxx000xxx
+ smlall. */
+ return 2613;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001000xxxxx011xxxxxxxxx0xxx
- ld1d. */
- return 2515;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxx100xxx
+ usmlall. */
+ return 2764;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxx100xxx
+ usmlall. */
+ return 2765;
+ }
}
}
}
else
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx000xxxxxxxxx1xxx
- ldnt1b. */
- return 2539;
+ xx0000010000xxxxxxxxxxxxxxx100xx
+ umlall. */
+ return 2735;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx010xxxxxxxxx1xxx
- ldnt1w. */
- return 2563;
+ xx0000010000xxxxxxxxxxxxxxx101xx
+ sumlall. */
+ return 2714;
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001000xxxxx001xxxxxxxxx1xxx
- ldnt1h. */
- return 2555;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxx010xxx
+ umlall. */
+ return 2736;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxx010xxx
+ umlall. */
+ return 2737;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0x00001000xxxxx011xxxxxxxxx1xxx
- ldnt1d. */
- return 2547;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxx110xxx
+ sumlall. */
+ return 2715;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxx110xxx
+ sumlall. */
+ return 2716;
+ }
}
}
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1x00001000xxxxx0xxxxxxxxxxxxxxx
- ldr. */
- return 2413;
- }
- }
- else
- {
- if (((word >> 3) & 0x1) == 0)
- {
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010000xxxxxxxxxxxxxxx01xxx
+ smlsll. */
+ return 2627;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x0x00001000xxxxx100xxxxxxxxx0xxx
- ld1b. */
- return 2508;
+ xx0000010001xxxx0xxxxxxxxxx01xxx
+ smlsll. */
+ return 2628;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1x00001000xxxxx100xxxxxxxxx0xxx
- ldr. */
- return 2565;
+ xx0000010001xxxx1xxxxxxxxxx01xxx
+ smlsll. */
+ return 2629;
}
}
- else
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00001000xxxxx110xxxxxxxxx0xxx
- ld1w. */
- return 2532;
+ xx0000010000xxxxxxxxxxxxxxx11xxx
+ umlsll. */
+ return 2751;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx0xxxxxxxxxx11xxx
+ umlsll. */
+ return 2752;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000010001xxxx1xxxxxxxxxx11xxx
+ umlsll. */
+ return 2753;
+ }
}
}
- else
+ }
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx101xxxxxxxxx0xxx
- ld1h. */
- return 2524;
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx000xxxxxxxxx0xxx
+ ld1b. */
+ return 2507;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx010xxxxxxxxx0xxx
+ ld1w. */
+ return 2531;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx001xxxxxxxxx0xxx
+ ld1h. */
+ return 2523;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx011xxxxxxxxx0xxx
+ ld1d. */
+ return 2515;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx111xxxxxxxxx0xxx
- ld1d. */
- return 2516;
+ if (((word >> 13) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx000xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2539;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx010xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2563;
+ }
+ }
+ else
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx001xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2555;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx011xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2547;
+ }
+ }
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1100001000xxxxx0xxxxxxxxxxxxxxx
+ ldr. */
+ return 2413;
+ }
}
else
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx100xxxxxxxxx1xxx
- ldnt1b. */
- return 2540;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100001000xxxxx100xxxxxxxxx0xxx
+ ld1b. */
+ return 2508;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1100001000xxxxx100xxxxxxxxx0xxx
+ ldr. */
+ return 2565;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx110xxxxxxxxx0xxx
+ ld1w. */
+ return 2532;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx110xxxxxxxxx1xxx
- ldnt1w. */
- return 2564;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx101xxxxxxxxx0xxx
+ ld1h. */
+ return 2524;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx111xxxxxxxxx0xxx
+ ld1d. */
+ return 2516;
+ }
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx101xxxxxxxxx1xxx
- ldnt1h. */
- return 2556;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx100xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2540;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx110xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2564;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001000xxxxx111xxxxxxxxx1xxx
- ldnt1d. */
- return 2548;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx101xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2556;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001000xxxxx111xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2548;
+ }
}
}
}
@@ -1471,31 +1669,64 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011000xxxxxxxxxxxxxxx00xxx
- fmlal. */
- return 2477;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxx0xxxxxxx00xxx
+ smlall. */
+ return 2780;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xx0xxxxxxx00xxx
+ smlall. */
+ return 2781;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xx0xxxxxxx00xxx
+ smlall. */
+ return 2782;
+ }
+ }
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011001xxxx0xxxxxxxxxx00xxx
+ x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2478;
+ return 2477;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011001xxxx1xxxxxxxxxx00xxx
- fmlal. */
- return 2479;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xx1xxxxxxx00xxx
+ fmlal. */
+ return 2478;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xx1xxxxxxx00xxx
+ fmlal. */
+ return 2479;
+ }
}
}
}
@@ -1523,31 +1754,64 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011000xxxxxxxxxxxxxxx10xxx
- bfmlal. */
- return 2436;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011000xxxxxxx0xxxxxxx10xxx
+ umlall. */
+ return 2786;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xx0xxxxxxx10xxx
+ umlall. */
+ return 2787;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xx0xxxxxxx10xxx
+ umlall. */
+ return 2788;
+ }
+ }
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011001xxxx0xxxxxxxxxx10xxx
+ x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2437;
+ return 2436;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011001xxxx1xxxxxxxxxx10xxx
- bfmlal. */
- return 2438;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx0xx1xxxxxxx10xxx
+ bfmlal. */
+ return 2437;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011001xxxx1xx1xxxxxxx10xxx
+ bfmlal. */
+ return 2438;
+ }
}
}
}
@@ -1566,61 +1830,127 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011000xxxxxxxxxxxxxxx01xxx
- fmlsl. */
- return 2491;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011000xxxxxxx0xxxxxxx01xxx
+ smlsll. */
+ return 2783;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xx0xxxxxxx01xxx
+ smlsll. */
+ return 2784;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xx0xxxxxxx01xxx
+ smlsll. */
+ return 2785;
+ }
+ }
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011001xxxx0xxxxxxxxxx01xxx
+ xxx000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2492;
+ return 2491;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011001xxxx1xxxxxxxxxx01xxx
- fmlsl. */
- return 2493;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xx1xxxxxxx01xxx
+ fmlsl. */
+ return 2492;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xx1xxxxxxx01xxx
+ fmlsl. */
+ return 2493;
+ }
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011000xxxxxxxxxxxxxxx11xxx
- bfmlsl. */
- return 2444;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011000xxxxxxx0xxxxxxx11xxx
+ umlsll. */
+ return 2789;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xx0xxxxxxx11xxx
+ umlsll. */
+ return 2790;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xx0xxxxxxx11xxx
+ umlsll. */
+ return 2791;
+ }
+ }
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011001xxxx0xxxxxxxxxx11xxx
+ xxx000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2445;
+ return 2444;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011001xxxx1xxxxxxxxxx11xxx
- bfmlsl. */
- return 2446;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx0xx1xxxxxxx11xxx
+ bfmlsl. */
+ return 2445;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011001xxxx1xx1xxxxxxx11xxx
+ bfmlsl. */
+ return 2446;
+ }
}
}
}
@@ -1862,7 +2192,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2735;
+ return 2792;
}
else
{
@@ -1870,7 +2200,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2736;
+ return 2793;
}
}
else
@@ -1912,7 +2242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxxxxxxxxxx01xxx
smlsl. */
- return 2611;
+ return 2619;
}
else
{
@@ -1922,7 +2252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xxxxxxxxxx01xxx
smlsl. */
- return 2612;
+ return 2620;
}
else
{
@@ -1930,7 +2260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xxxxxxxxxx01xxx
smlsl. */
- return 2613;
+ return 2621;
}
}
}
@@ -1969,7 +2299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2737;
+ return 2794;
}
else
{
@@ -1977,7 +2307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2738;
+ return 2795;
}
}
else
@@ -1988,7 +2318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2706;
+ return 2727;
}
else
{
@@ -1998,7 +2328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2707;
+ return 2728;
}
else
{
@@ -2006,7 +2336,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2708;
+ return 2729;
}
}
}
@@ -2028,7 +2358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxxxxxxxxxx11xxx
umlsl. */
- return 2714;
+ return 2743;
}
else
{
@@ -2038,7 +2368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xxxxxxxxxx11xxx
umlsl. */
- return 2715;
+ return 2744;
}
else
{
@@ -2046,7 +2376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xxxxxxxxxx11xxx
umlsl. */
- return 2716;
+ return 2745;
}
}
}
@@ -2087,9 +2417,9 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
if (((word >> 23) & 0x1) == 0)
{
@@ -2097,17 +2427,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010010xxxx0xx0x0xxxxx00xxx
- fmlal. */
- return 2481;
+ x10000010x10xxxx0xxx00xxxxx000xx
+ smlall. */
+ return 2615;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010011xxxx0xx0x0xxxxx00xxx
- fmlal. */
- return 2482;
+ x10000010x11xxxx0xxx00xxxxx000xx
+ smlall. */
+ return 2616;
}
}
else
@@ -2116,17 +2446,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001101xxxx00xx0x0xxxxx00xxx
- fmlal. */
- return 2483;
+ x10000011x1xxxx00xxx00xxxxx000xx
+ smlall. */
+ return 2617;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001101xxxx10xx0x0xxxxx00xxx
- fmlal. */
- return 2484;
+ x10000011x1xxxx10xxx00xxxxx000xx
+ smlall. */
+ return 2618;
}
}
}
@@ -2138,17 +2468,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010110xxxx0xx0x0xxxxx00xxx
- smlal. */
- return 2607;
+ x10000010x10xxxx0xxx00xxxxx001xx
+ usmlall. */
+ return 2767;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010111xxxx0xx0x0xxxxx00xxx
- smlal. */
- return 2608;
+ x10000010x11xxxx0xxx00xxxxx001xx
+ usmlall. */
+ return 2768;
}
}
else
@@ -2157,101 +2487,211 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx00xx0x0xxxxx00xxx
- smlal. */
- return 2609;
+ x10000011x1xxxx00xxx00xxxxx001xx
+ usmlall. */
+ return 2769;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx10xx0x0xxxxx00xxx
- smlal. */
- return 2610;
+ x10000011x1xxxx10xxx00xxxxx001xx
+ usmlall. */
+ return 2770;
}
}
}
}
else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x10xxxx0xx1x0xxxxx00xxx
- fmla. */
- return 2473;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx010xxxxx00xxx
+ fmlal. */
+ return 2481;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx010xxxxx00xxx
+ fmlal. */
+ return 2482;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx010xxxxx00xxx
+ fmlal. */
+ return 2483;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx010xxxxx00xxx
+ fmlal. */
+ return 2484;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x11xxxx0xx1x0xxxxx00xxx
- fmla. */
- return 2474;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx010xxxxx00xxx
+ smlal. */
+ return 2607;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx010xxxxx00xxx
+ smlal. */
+ return 2608;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx010xxxxx00xxx
+ smlal. */
+ return 2609;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx010xxxxx00xxx
+ smlal. */
+ return 2610;
+ }
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx00xx1x0xxxxx00xxx
- fmla. */
- return 2475;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx110xxxxx00xxx
+ fmla. */
+ return 2473;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx110xxxxx00xxx
+ fmla. */
+ return 2474;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx10xx1x0xxxxx00xxx
- fmla. */
- return 2476;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx110xxxxx00xxx
+ fmla. */
+ return 2475;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx110xxxxx00xxx
+ fmla. */
+ return 2476;
+ }
}
}
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001x01xxxxx0xx0x1xxxxx00xxx
- fmlal. */
- return 2480;
+ x1000001xx1xxxxx0xxx01xxxxx000xx
+ smlall. */
+ return 2614;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001x11xxxxx0xx0x1xxxxx00xxx
- smlal. */
- return 2606;
+ x1000001xx1xxxxx0xxx01xxxxx001xx
+ usmlall. */
+ return 2766;
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xx1x1xxxxx00xxx
- fadd. */
- return 2453;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x01xxxxx0xx011xxxxx00xxx
+ fmlal. */
+ return 2480;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x11xxxxx0xx011xxxxx00xxx
+ smlal. */
+ return 2606;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xx1x1xxxxx00xxx
- fadd. */
- return 2454;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx00xx111xxxxx00xxx
+ fadd. */
+ return 2453;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx10xx111xxxxx00xxx
+ fadd. */
+ return 2454;
+ }
}
}
}
@@ -2260,9 +2700,9 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
if (((word >> 23) & 0x1) == 0)
{
@@ -2270,17 +2710,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010010xxxx0xx0x0xxxxx10xxx
- bfmlal. */
- return 2440;
+ x10000010x10xxxx0xxx00xxxxx100xx
+ umlall. */
+ return 2739;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010011xxxx0xx0x0xxxxx10xxx
- bfmlal. */
- return 2441;
+ x10000010x11xxxx0xxx00xxxxx100xx
+ umlall. */
+ return 2740;
}
}
else
@@ -2289,17 +2729,124 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001101xxxx00xx0x0xxxxx10xxx
- bfmlal. */
- return 2442;
+ x10000011x1xxxx00xxx00xxxxx100xx
+ umlall. */
+ return 2741;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001101xxxx10xx0x0xxxxx10xxx
- bfmlal. */
- return 2443;
+ x10000011x1xxxx10xxx00xxxxx100xx
+ umlall. */
+ return 2742;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xxxx0xxx00xxxxx101xx
+ sumlall. */
+ return 2717;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xxxx0xxx00xxxxx101xx
+ sumlall. */
+ return 2718;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx010xxxxx10xxx
+ bfmlal. */
+ return 2440;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx010xxxxx10xxx
+ bfmlal. */
+ return 2441;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx010xxxxx10xxx
+ bfmlal. */
+ return 2442;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx010xxxxx10xxx
+ bfmlal. */
+ return 2443;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx010xxxxx10xxx
+ umlal. */
+ return 2731;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx010xxxxx10xxx
+ umlal. */
+ return 2732;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx010xxxxx10xxx
+ umlal. */
+ return 2733;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx010xxxxx10xxx
+ umlal. */
+ return 2734;
+ }
}
}
}
@@ -2311,17 +2858,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010110xxxx0xx0x0xxxxx10xxx
- umlal. */
- return 2710;
+ x10000010x10xxxx0xx110xxxxx10xxx
+ add. */
+ return 2430;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010111xxxx0xx0x0xxxxx10xxx
- umlal. */
- return 2711;
+ x10000010x11xxxx0xx110xxxxx10xxx
+ add. */
+ return 2431;
}
}
else
@@ -2330,40 +2877,51 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx00xx0x0xxxxx10xxx
- umlal. */
- return 2712;
+ x10000011x1xxxx00xx110xxxxx10xxx
+ add. */
+ return 2432;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx10xx0x0xxxxx10xxx
- umlal. */
- return 2713;
+ x10000011x1xxxx10xx110xxxxx10xxx
+ add. */
+ return 2433;
}
}
}
}
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xxx01xxxxx10xxx
+ umlall. */
+ return 2738;
+ }
else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xx1x0xxxxx10xxx
- add. */
- return 2430;
+ x1000001x01xxxxx0xx011xxxxx10xxx
+ bfmlal. */
+ return 2439;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xx1x0xxxxx10xxx
- add. */
- return 2431;
+ x1000001x11xxxxx0xx011xxxxx10xxx
+ umlal. */
+ return 2730;
}
}
else
@@ -2372,110 +2930,154 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xx1x0xxxxx10xxx
+ x1000001xx1xxxx00xx111xxxxx10xxx
add. */
- return 2432;
+ return 2428;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xx1x0xxxxx10xxx
+ x1000001xx1xxxx10xx111xxxxx10xxx
add. */
- return 2433;
+ return 2429;
}
}
}
}
- else
+ }
+ }
+ else
+ {
+ if (((word >> 4) & 0x1) == 0)
+ {
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x01xxxxx0xx0x1xxxxx10xxx
- bfmlal. */
- return 2439;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xxx00xxxxx01xxx
+ smlsll. */
+ return 2631;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xxx00xxxxx01xxx
+ smlsll. */
+ return 2632;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x11xxxxx0xx0x1xxxxx10xxx
- umlal. */
- return 2709;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxx00xxxxx01xxx
+ smlsll. */
+ return 2633;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxx00xxxxx01xxx
+ smlsll. */
+ return 2634;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xx1x1xxxxx10xxx
- add. */
- return 2428;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xx1x1xxxxx10xxx
- add. */
- return 2429;
- }
- }
- }
- }
- }
- else
- {
- if (((word >> 4) & 0x1) == 0)
- {
- if (((word >> 10) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010010xxxx0xx0x0xxxxx01xxx
- fmlsl. */
- return 2495;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx010xxxxx01xxx
+ fmlsl. */
+ return 2495;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx010xxxxx01xxx
+ fmlsl. */
+ return 2496;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010011xxxx0xx0x0xxxxx01xxx
- fmlsl. */
- return 2496;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx010xxxxx01xxx
+ fmlsl. */
+ return 2497;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx010xxxxx01xxx
+ fmlsl. */
+ return 2498;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx00xx0x0xxxxx01xxx
- fmlsl. */
- return 2497;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx010xxxxx01xxx
+ smlsl. */
+ return 2623;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx010xxxxx01xxx
+ smlsl. */
+ return 2624;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx10xx0x0xxxxx01xxx
- fmlsl. */
- return 2498;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx010xxxxx01xxx
+ smlsl. */
+ return 2625;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx010xxxxx01xxx
+ smlsl. */
+ return 2626;
+ }
}
}
}
@@ -2487,17 +3089,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010110xxxx0xx0x0xxxxx01xxx
- smlsl. */
- return 2615;
+ x10000010x10xxxx0xx110xxxxx01xxx
+ fmls. */
+ return 2487;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010111xxxx0xx0x0xxxxx01xxx
- smlsl. */
- return 2616;
+ x10000010x11xxxx0xx110xxxxx01xxx
+ fmls. */
+ return 2488;
}
}
else
@@ -2506,40 +3108,51 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx00xx0x0xxxxx01xxx
- smlsl. */
- return 2617;
+ x10000011x1xxxx00xx110xxxxx01xxx
+ fmls. */
+ return 2489;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx10xx0x0xxxxx01xxx
- smlsl. */
- return 2618;
+ x10000011x1xxxx10xx110xxxxx01xxx
+ fmls. */
+ return 2490;
}
}
}
}
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xxx01xxxxx01xxx
+ smlsll. */
+ return 2630;
+ }
else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xx1x0xxxxx01xxx
- fmls. */
- return 2487;
+ x1000001x01xxxxx0xx011xxxxx01xxx
+ fmlsl. */
+ return 2494;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xx1x0xxxxx01xxx
- fmls. */
- return 2488;
+ x1000001x11xxxxx0xx011xxxxx01xxx
+ smlsl. */
+ return 2622;
}
}
else
@@ -2548,107 +3161,151 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xx1x0xxxxx01xxx
- fmls. */
- return 2489;
+ x1000001xx1xxxx00xx111xxxxx01xxx
+ fsub. */
+ return 2499;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xx1x0xxxxx01xxx
- fmls. */
- return 2490;
+ x1000001xx1xxxx10xx111xxxxx01xxx
+ fsub. */
+ return 2500;
}
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x01xxxxx0xx0x1xxxxx01xxx
- fmlsl. */
- return 2494;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xxx00xxxxx11xxx
+ umlsll. */
+ return 2755;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xxx00xxxxx11xxx
+ umlsll. */
+ return 2756;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x11xxxxx0xx0x1xxxxx01xxx
- smlsl. */
- return 2614;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xxx00xxxxx11xxx
+ umlsll. */
+ return 2757;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xxx00xxxxx11xxx
+ umlsll. */
+ return 2758;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xx1x1xxxxx01xxx
- fsub. */
- return 2499;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xx1x1xxxxx01xxx
- fsub. */
- return 2500;
- }
- }
- }
- }
- else
- {
- if (((word >> 10) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010010xxxx0xx0x0xxxxx11xxx
- bfmlsl. */
- return 2448;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx010xxxxx11xxx
+ bfmlsl. */
+ return 2448;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx010xxxxx11xxx
+ bfmlsl. */
+ return 2449;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010011xxxx0xx0x0xxxxx11xxx
- bfmlsl. */
- return 2449;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx010xxxxx11xxx
+ bfmlsl. */
+ return 2450;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx010xxxxx11xxx
+ bfmlsl. */
+ return 2451;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx00xx0x0xxxxx11xxx
- bfmlsl. */
- return 2450;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx010xxxxx11xxx
+ umlsl. */
+ return 2747;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx010xxxxx11xxx
+ umlsl. */
+ return 2748;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001101xxxx10xx0x0xxxxx11xxx
- bfmlsl. */
- return 2451;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx010xxxxx11xxx
+ umlsl. */
+ return 2749;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx010xxxxx11xxx
+ umlsl. */
+ return 2750;
+ }
}
}
}
@@ -2660,17 +3317,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010110xxxx0xx0x0xxxxx11xxx
- umlsl. */
- return 2718;
+ x10000010x10xxxx0xx110xxxxx11xxx
+ sub. */
+ return 2710;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010111xxxx0xx0x0xxxxx11xxx
- umlsl. */
- return 2719;
+ x10000010x11xxxx0xx110xxxxx11xxx
+ sub. */
+ return 2711;
}
}
else
@@ -2679,40 +3336,51 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx00xx0x0xxxxx11xxx
- umlsl. */
- return 2720;
+ x10000011x1xxxx00xx110xxxxx11xxx
+ sub. */
+ return 2712;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001111xxxx10xx0x0xxxxx11xxx
- umlsl. */
- return 2721;
+ x10000011x1xxxx10xx110xxxxx11xxx
+ sub. */
+ return 2713;
}
}
}
}
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xxx01xxxxx11xxx
+ umlsll. */
+ return 2754;
+ }
else
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xx1x0xxxxx11xxx
- sub. */
- return 2694;
+ x1000001x01xxxxx0xx011xxxxx11xxx
+ bfmlsl. */
+ return 2447;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xx1x0xxxxx11xxx
- sub. */
- return 2695;
+ x1000001x11xxxxx0xx011xxxxx11xxx
+ umlsl. */
+ return 2746;
}
}
else
@@ -2721,62 +3389,21 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xx1x0xxxxx11xxx
+ x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2696;
+ return 2708;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xx1x0xxxxx11xxx
+ x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2697;
+ return 2709;
}
}
}
}
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- if (((word >> 22) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x01xxxxx0xx0x1xxxxx11xxx
- bfmlsl. */
- return 2447;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x11xxxxx0xx0x1xxxxx11xxx
- umlsl. */
- return 2717;
- }
- }
- else
- {
- if (((word >> 16) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx00xx1x1xxxxx11xxx
- sub. */
- return 2692;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx10xx1x1xxxxx11xxx
- sub. */
- return 2693;
- }
- }
- }
}
}
}
@@ -2860,7 +3487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2619;
+ return 2635;
}
else
{
@@ -2868,7 +3495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2621;
+ return 2637;
}
}
else
@@ -2879,7 +3506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2620;
+ return 2636;
}
else
{
@@ -2887,7 +3514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2622;
+ return 2638;
}
}
}
@@ -3012,7 +3639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2623;
+ return 2639;
}
else
{
@@ -3020,7 +3647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2625;
+ return 2641;
}
}
else
@@ -3031,7 +3658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2624;
+ return 2640;
}
else
{
@@ -3039,7 +3666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2626;
+ return 2642;
}
}
}
@@ -3101,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2698;
+ return 2719;
}
else
{
@@ -3109,7 +3736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2700;
+ return 2721;
}
}
else
@@ -3120,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2699;
+ return 2720;
}
else
{
@@ -3128,7 +3755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2701;
+ return 2722;
}
}
}
@@ -3188,7 +3815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2702;
+ return 2723;
}
else
{
@@ -3196,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2704;
+ return 2725;
}
}
else
@@ -3207,7 +3834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2703;
+ return 2724;
}
else
{
@@ -3215,7 +3842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2705;
+ return 2726;
}
}
}
@@ -3229,7 +3856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2722;
+ return 2759;
}
else
{
@@ -3237,7 +3864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2724;
+ return 2761;
}
}
else
@@ -3248,7 +3875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2723;
+ return 2760;
}
else
{
@@ -3256,7 +3883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2725;
+ return 2762;
}
}
}
@@ -3327,7 +3954,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2633;
+ return 2649;
}
else
{
@@ -3335,7 +3962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2657;
+ return 2673;
}
}
else
@@ -3346,7 +3973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2649;
+ return 2665;
}
else
{
@@ -3354,7 +3981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2641;
+ return 2657;
}
}
}
@@ -3368,7 +3995,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2665;
+ return 2681;
}
else
{
@@ -3376,7 +4003,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2689;
+ return 2705;
}
}
else
@@ -3387,7 +4014,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2681;
+ return 2697;
}
else
{
@@ -3395,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2673;
+ return 2689;
}
}
}
@@ -3423,7 +4050,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2634;
+ return 2650;
}
else
{
@@ -3431,7 +4058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2691;
+ return 2707;
}
}
else
@@ -3440,7 +4067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2658;
+ return 2674;
}
}
else
@@ -3451,7 +4078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2650;
+ return 2666;
}
else
{
@@ -3459,7 +4086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2642;
+ return 2658;
}
}
}
@@ -3473,7 +4100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2666;
+ return 2682;
}
else
{
@@ -3481,7 +4108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2690;
+ return 2706;
}
}
else
@@ -3492,7 +4119,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2682;
+ return 2698;
}
else
{
@@ -3500,7 +4127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2674;
+ return 2690;
}
}
}
@@ -3542,7 +4169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2629;
+ return 2645;
}
else
{
@@ -3550,7 +4177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2630;
+ return 2646;
}
}
else
@@ -3561,7 +4188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2653;
+ return 2669;
}
else
{
@@ -3569,7 +4196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2654;
+ return 2670;
}
}
}
@@ -3583,7 +4210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2645;
+ return 2661;
}
else
{
@@ -3591,7 +4218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2646;
+ return 2662;
}
}
else
@@ -3602,7 +4229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2637;
+ return 2653;
}
else
{
@@ -3610,7 +4237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2638;
+ return 2654;
}
}
}
@@ -3627,7 +4254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2661;
+ return 2677;
}
else
{
@@ -3635,7 +4262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2662;
+ return 2678;
}
}
else
@@ -3646,7 +4273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2685;
+ return 2701;
}
else
{
@@ -3654,7 +4281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2686;
+ return 2702;
}
}
}
@@ -3668,7 +4295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2677;
+ return 2693;
}
else
{
@@ -3676,7 +4303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2678;
+ return 2694;
}
}
else
@@ -3687,7 +4314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2669;
+ return 2685;
}
else
{
@@ -3695,7 +4322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2670;
+ return 2686;
}
}
}
@@ -6097,7 +6724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2779;
+ return 2836;
}
else
{
@@ -6105,7 +6732,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2787;
+ return 2844;
}
}
else
@@ -6116,7 +6743,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2783;
+ return 2840;
}
else
{
@@ -6124,7 +6751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2790;
+ return 2847;
}
}
}
@@ -6162,7 +6789,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2839;
+ return 2896;
}
else
{
@@ -6170,7 +6797,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2845;
+ return 2902;
}
}
else
@@ -6181,7 +6808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2842;
+ return 2899;
}
else
{
@@ -6189,7 +6816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2848;
+ return 2905;
}
}
}
@@ -6203,7 +6830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2863;
+ return 2920;
}
else
{
@@ -6211,7 +6838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2869;
+ return 2926;
}
}
else
@@ -6222,7 +6849,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2866;
+ return 2923;
}
else
{
@@ -6230,7 +6857,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2872;
+ return 2929;
}
}
}
@@ -6247,7 +6874,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2851;
+ return 2908;
}
else
{
@@ -6255,7 +6882,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2857;
+ return 2914;
}
}
else
@@ -6266,7 +6893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2854;
+ return 2911;
}
else
{
@@ -6274,7 +6901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2860;
+ return 2917;
}
}
}
@@ -6288,7 +6915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2875;
+ return 2932;
}
else
{
@@ -6296,7 +6923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2881;
+ return 2938;
}
}
else
@@ -6307,7 +6934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2878;
+ return 2935;
}
else
{
@@ -6315,7 +6942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2884;
+ return 2941;
}
}
}
@@ -6380,7 +7007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2780;
+ return 2837;
}
else
{
@@ -6388,7 +7015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2788;
+ return 2845;
}
}
else
@@ -6399,7 +7026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2784;
+ return 2841;
}
else
{
@@ -6407,7 +7034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2791;
+ return 2848;
}
}
}
@@ -6445,7 +7072,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2840;
+ return 2897;
}
else
{
@@ -6453,7 +7080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2846;
+ return 2903;
}
}
else
@@ -6464,7 +7091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2843;
+ return 2900;
}
else
{
@@ -6472,7 +7099,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2849;
+ return 2906;
}
}
}
@@ -6486,7 +7113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2864;
+ return 2921;
}
else
{
@@ -6494,7 +7121,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2870;
+ return 2927;
}
}
else
@@ -6505,7 +7132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2867;
+ return 2924;
}
else
{
@@ -6513,7 +7140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2873;
+ return 2930;
}
}
}
@@ -6530,7 +7157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2852;
+ return 2909;
}
else
{
@@ -6538,7 +7165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2858;
+ return 2915;
}
}
else
@@ -6549,7 +7176,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2855;
+ return 2912;
}
else
{
@@ -6557,7 +7184,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2861;
+ return 2918;
}
}
}
@@ -6571,7 +7198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2876;
+ return 2933;
}
else
{
@@ -6579,7 +7206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2882;
+ return 2939;
}
}
else
@@ -6590,7 +7217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2879;
+ return 2936;
}
else
{
@@ -6598,7 +7225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2885;
+ return 2942;
}
}
}
@@ -6666,7 +7293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2782;
+ return 2839;
}
else
{
@@ -6674,7 +7301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2789;
+ return 2846;
}
}
else
@@ -6683,7 +7310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2786;
+ return 2843;
}
}
else
@@ -6694,7 +7321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2781;
+ return 2838;
}
else
{
@@ -6702,7 +7329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2785;
+ return 2842;
}
}
}
@@ -6764,7 +7391,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2841;
+ return 2898;
}
else
{
@@ -6772,7 +7399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2935;
+ return 2992;
}
}
else
@@ -6783,7 +7410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2847;
+ return 2904;
}
else
{
@@ -6791,7 +7418,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2937;
+ return 2994;
}
}
}
@@ -6805,7 +7432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2844;
+ return 2901;
}
else
{
@@ -6813,7 +7440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2936;
+ return 2993;
}
}
else
@@ -6822,7 +7449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2850;
+ return 2907;
}
}
}
@@ -6838,7 +7465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2865;
+ return 2922;
}
else
{
@@ -6846,7 +7473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2941;
+ return 2998;
}
}
else
@@ -6857,7 +7484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2871;
+ return 2928;
}
else
{
@@ -6865,7 +7492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 2943;
+ return 3000;
}
}
}
@@ -6879,7 +7506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2868;
+ return 2925;
}
else
{
@@ -6887,7 +7514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2942;
+ return 2999;
}
}
else
@@ -6896,7 +7523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2874;
+ return 2931;
}
}
}
@@ -6915,7 +7542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2853;
+ return 2910;
}
else
{
@@ -6923,7 +7550,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2938;
+ return 2995;
}
}
else
@@ -6934,7 +7561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2859;
+ return 2916;
}
else
{
@@ -6942,7 +7569,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2940;
+ return 2997;
}
}
}
@@ -6956,7 +7583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2856;
+ return 2913;
}
else
{
@@ -6964,7 +7591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2939;
+ return 2996;
}
}
else
@@ -6973,7 +7600,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2862;
+ return 2919;
}
}
}
@@ -6989,7 +7616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2877;
+ return 2934;
}
else
{
@@ -6997,7 +7624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 2944;
+ return 3001;
}
}
else
@@ -7008,7 +7635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2883;
+ return 2940;
}
else
{
@@ -7016,7 +7643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 2946;
+ return 3003;
}
}
}
@@ -7030,7 +7657,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2880;
+ return 2937;
}
else
{
@@ -7038,7 +7665,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 2945;
+ return 3002;
}
}
else
@@ -7047,7 +7674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2886;
+ return 2943;
}
}
}
@@ -7420,7 +8047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 2964;
+ return 3021;
}
else
{
@@ -7438,7 +8065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 2967;
+ return 3024;
}
}
}
@@ -7518,7 +8145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2777;
+ return 2834;
}
else
{
@@ -7526,7 +8153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2778;
+ return 2835;
}
}
else
@@ -7633,7 +8260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 2969;
+ return 3026;
}
}
}
@@ -7649,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 2966;
+ return 3023;
}
else
{
@@ -7694,7 +8321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2776;
+ return 2833;
}
else
{
@@ -7788,7 +8415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 2968;
+ return 3025;
}
}
}
@@ -7918,7 +8545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 2970;
+ return 3027;
}
}
}
@@ -7934,7 +8561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 2965;
+ return 3022;
}
else
{
@@ -8776,7 +9403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2796;
+ return 2853;
}
}
}
@@ -8850,7 +9477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2797;
+ return 2854;
}
}
}
@@ -11524,7 +12151,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2795;
+ return 2852;
}
}
}
@@ -13228,7 +13855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2824;
+ return 2881;
}
}
else
@@ -13471,7 +14098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2800;
+ return 2857;
}
else
{
@@ -13479,7 +14106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2801;
+ return 2858;
}
}
else
@@ -13711,7 +14338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2821;
+ return 2878;
}
else
{
@@ -13732,7 +14359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2828;
+ return 2885;
}
else
{
@@ -13740,7 +14367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2827;
+ return 2884;
}
}
else
@@ -13795,7 +14422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2820;
+ return 2877;
}
else
{
@@ -13807,7 +14434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2826;
+ return 2883;
}
else
{
@@ -13815,7 +14442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2825;
+ return 2882;
}
}
else
@@ -13866,7 +14493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2804;
+ return 2861;
}
else
{
@@ -13874,7 +14501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2805;
+ return 2862;
}
}
else
@@ -14233,7 +14860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2798;
+ return 2855;
}
else
{
@@ -14266,7 +14893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2822;
+ return 2879;
}
else
{
@@ -14296,7 +14923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2799;
+ return 2856;
}
else
{
@@ -14425,7 +15052,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2808;
+ return 2865;
}
else
{
@@ -14435,7 +15062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2810;
+ return 2867;
}
else
{
@@ -14443,7 +15070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2812;
+ return 2869;
}
}
}
@@ -14455,7 +15082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2809;
+ return 2866;
}
else
{
@@ -14465,7 +15092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2811;
+ return 2868;
}
else
{
@@ -14473,7 +15100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2813;
+ return 2870;
}
}
}
@@ -15532,7 +16159,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2792;
+ return 2849;
}
else
{
@@ -15540,7 +16167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2794;
+ return 2851;
}
}
else
@@ -15549,7 +16176,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2793;
+ return 2850;
}
}
}
@@ -17045,7 +17672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2802;
+ return 2859;
}
else
{
@@ -17053,7 +17680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2803;
+ return 2860;
}
}
}
@@ -17427,7 +18054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2806;
+ return 2863;
}
else
{
@@ -17435,7 +18062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2807;
+ return 2864;
}
}
}
@@ -17796,7 +18423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2726;
+ return 2771;
}
else
{
@@ -17804,7 +18431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2727;
+ return 2772;
}
}
else
@@ -17848,7 +18475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2729;
+ return 2774;
}
else
{
@@ -17856,7 +18483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2728;
+ return 2773;
}
}
else
@@ -17903,7 +18530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2733;
+ return 2778;
}
else
{
@@ -17911,7 +18538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2730;
+ return 2775;
}
}
else
@@ -17955,7 +18582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2731;
+ return 2776;
}
else
{
@@ -17963,7 +18590,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2732;
+ return 2777;
}
}
else
@@ -19089,7 +19716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2823;
+ return 2880;
}
}
else
@@ -20450,7 +21077,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 2959;
+ return 3016;
}
else
{
@@ -21030,7 +21657,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2887;
+ return 2944;
}
else
{
@@ -21038,7 +21665,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2889;
+ return 2946;
}
}
else
@@ -21049,7 +21676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2893;
+ return 2950;
}
else
{
@@ -21057,7 +21684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2895;
+ return 2952;
}
}
}
@@ -21071,7 +21698,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2890;
+ return 2947;
}
else
{
@@ -21079,7 +21706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2892;
+ return 2949;
}
}
else
@@ -21090,7 +21717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2896;
+ return 2953;
}
else
{
@@ -21098,7 +21725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2898;
+ return 2955;
}
}
}
@@ -21115,7 +21742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2911;
+ return 2968;
}
else
{
@@ -21123,7 +21750,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2913;
+ return 2970;
}
}
else
@@ -21134,7 +21761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2917;
+ return 2974;
}
else
{
@@ -21142,7 +21769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2919;
+ return 2976;
}
}
}
@@ -21156,7 +21783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2914;
+ return 2971;
}
else
{
@@ -21164,7 +21791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2916;
+ return 2973;
}
}
else
@@ -21175,7 +21802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2920;
+ return 2977;
}
else
{
@@ -21183,7 +21810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2922;
+ return 2979;
}
}
}
@@ -21203,7 +21830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2899;
+ return 2956;
}
else
{
@@ -21211,7 +21838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2901;
+ return 2958;
}
}
else
@@ -21222,7 +21849,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2905;
+ return 2962;
}
else
{
@@ -21230,7 +21857,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2907;
+ return 2964;
}
}
}
@@ -21244,7 +21871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2902;
+ return 2959;
}
else
{
@@ -21252,7 +21879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2904;
+ return 2961;
}
}
else
@@ -21263,7 +21890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2908;
+ return 2965;
}
else
{
@@ -21271,7 +21898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2910;
+ return 2967;
}
}
}
@@ -21288,7 +21915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2923;
+ return 2980;
}
else
{
@@ -21296,7 +21923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2925;
+ return 2982;
}
}
else
@@ -21307,7 +21934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2929;
+ return 2986;
}
else
{
@@ -21315,7 +21942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2931;
+ return 2988;
}
}
}
@@ -21329,7 +21956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2926;
+ return 2983;
}
else
{
@@ -21337,7 +21964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2928;
+ return 2985;
}
}
else
@@ -21348,7 +21975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2932;
+ return 2989;
}
else
{
@@ -21356,7 +21983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2934;
+ return 2991;
}
}
}
@@ -21390,7 +22017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2888;
+ return 2945;
}
else
{
@@ -21398,7 +22025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 2947;
+ return 3004;
}
}
else
@@ -21409,7 +22036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2894;
+ return 2951;
}
else
{
@@ -21417,7 +22044,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 2949;
+ return 3006;
}
}
}
@@ -21431,7 +22058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2891;
+ return 2948;
}
else
{
@@ -21439,7 +22066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 2948;
+ return 3005;
}
}
else
@@ -21448,7 +22075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2897;
+ return 2954;
}
}
}
@@ -21464,7 +22091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2912;
+ return 2969;
}
else
{
@@ -21472,7 +22099,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 2953;
+ return 3010;
}
}
else
@@ -21483,7 +22110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2918;
+ return 2975;
}
else
{
@@ -21491,7 +22118,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 2955;
+ return 3012;
}
}
}
@@ -21505,7 +22132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2915;
+ return 2972;
}
else
{
@@ -21513,7 +22140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 2954;
+ return 3011;
}
}
else
@@ -21522,7 +22149,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2921;
+ return 2978;
}
}
}
@@ -21541,7 +22168,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2900;
+ return 2957;
}
else
{
@@ -21549,7 +22176,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 2950;
+ return 3007;
}
}
else
@@ -21560,7 +22187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2906;
+ return 2963;
}
else
{
@@ -21568,7 +22195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 2952;
+ return 3009;
}
}
}
@@ -21582,7 +22209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2903;
+ return 2960;
}
else
{
@@ -21590,7 +22217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 2951;
+ return 3008;
}
}
else
@@ -21599,7 +22226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2909;
+ return 2966;
}
}
}
@@ -21615,7 +22242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2924;
+ return 2981;
}
else
{
@@ -21623,7 +22250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 2956;
+ return 3013;
}
}
else
@@ -21634,7 +22261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2930;
+ return 2987;
}
else
{
@@ -21642,7 +22269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 2958;
+ return 3015;
}
}
}
@@ -21656,7 +22283,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2927;
+ return 2984;
}
else
{
@@ -21664,7 +22291,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 2957;
+ return 3014;
}
}
else
@@ -21673,7 +22300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2933;
+ return 2990;
}
}
}
@@ -21840,7 +22467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2814;
+ return 2871;
}
}
}
@@ -21873,7 +22500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2740;
+ return 2797;
}
}
else
@@ -21947,7 +22574,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2816;
+ return 2873;
}
}
}
@@ -21980,7 +22607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2817;
+ return 2874;
}
}
else
@@ -22027,7 +22654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2747;
+ return 2804;
}
else
{
@@ -22035,7 +22662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2749;
+ return 2806;
}
}
else
@@ -22046,7 +22673,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2751;
+ return 2808;
}
else
{
@@ -22060,7 +22687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2752;
+ return 2809;
}
else
{
@@ -22068,7 +22695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2745;
+ return 2802;
}
}
else
@@ -22077,7 +22704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2754;
+ return 2811;
}
}
else
@@ -22090,7 +22717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2753;
+ return 2810;
}
else
{
@@ -22098,7 +22725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2758;
+ return 2815;
}
}
else
@@ -22107,7 +22734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2755;
+ return 2812;
}
}
}
@@ -22288,7 +22915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2739;
+ return 2796;
}
}
else
@@ -22319,7 +22946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2815;
+ return 2872;
}
else
{
@@ -22338,7 +22965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2831;
+ return 2888;
}
else
{
@@ -22348,7 +22975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2829;
+ return 2886;
}
else
{
@@ -22358,7 +22985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2836;
+ return 2893;
}
else
{
@@ -22366,7 +22993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2835;
+ return 2892;
}
}
}
@@ -22950,7 +23577,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2832;
+ return 2889;
}
else
{
@@ -22958,7 +23585,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2833;
+ return 2890;
}
}
}
@@ -23276,7 +23903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2750;
+ return 2807;
}
}
else
@@ -23887,7 +24514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2743;
+ return 2800;
}
}
}
@@ -23939,7 +24566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2756;
+ return 2813;
}
}
}
@@ -24182,7 +24809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2746;
+ return 2803;
}
}
else
@@ -24258,7 +24885,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2759;
+ return 2816;
}
}
else
@@ -25084,7 +25711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2744;
+ return 2801;
}
}
else
@@ -25116,7 +25743,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2757;
+ return 2814;
}
}
else
@@ -25356,7 +25983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2748;
+ return 2805;
}
}
else
@@ -25388,7 +26015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2762;
+ return 2819;
}
else
{
@@ -25396,7 +26023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2766;
+ return 2823;
}
}
}
@@ -25418,7 +26045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2763;
+ return 2820;
}
else
{
@@ -25426,7 +26053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2767;
+ return 2824;
}
}
}
@@ -25465,7 +26092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2760;
+ return 2817;
}
else
{
@@ -25473,7 +26100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2764;
+ return 2821;
}
}
else
@@ -25495,7 +26122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2761;
+ return 2818;
}
else
{
@@ -25503,7 +26130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2765;
+ return 2822;
}
}
else
@@ -27311,7 +27938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2768;
+ return 2825;
}
else
{
@@ -27319,7 +27946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2772;
+ return 2829;
}
}
else
@@ -27341,7 +27968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2769;
+ return 2826;
}
else
{
@@ -27349,7 +27976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2773;
+ return 2830;
}
}
else
@@ -27855,7 +28482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2770;
+ return 2827;
}
else
{
@@ -27863,7 +28490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2774;
+ return 2831;
}
}
}
@@ -27885,7 +28512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2771;
+ return 2828;
}
else
{
@@ -27893,7 +28520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2775;
+ return 2832;
}
}
}
@@ -27949,7 +28576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2742;
+ return 2799;
}
else
{
@@ -27957,7 +28584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2741;
+ return 2798;
}
}
}
@@ -28060,7 +28687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2819;
+ return 2876;
}
else
{
@@ -28068,7 +28695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2818;
+ return 2875;
}
}
else
@@ -28079,7 +28706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2830;
+ return 2887;
}
else
{
@@ -28089,7 +28716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2838;
+ return 2895;
}
else
{
@@ -28097,7 +28724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2837;
+ return 2894;
}
}
}
@@ -28625,11 +29252,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 2960; break; /* addg --> smax. */
- case 2960: value = 2961; break; /* smax --> umax. */
- case 2961: value = 2962; break; /* umax --> smin. */
- case 2962: value = 2963; break; /* smin --> umin. */
- case 2963: return NULL; /* umin --> NULL. */
+ case 19: value = 3017; break; /* addg --> smax. */
+ case 3017: value = 3018; break; /* smax --> umax. */
+ case 3018: value = 3019; break; /* umax --> smin. */
+ case 3019: value = 3020; break; /* smin --> umin. */
+ case 3020: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -28787,8 +29414,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2834; break; /* fcvt --> bfcvt. */
- case 2834: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2891; break; /* fcvt --> bfcvt. */
+ case 2891: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -29317,7 +29944,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 263:
+ case 268:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -29364,12 +29991,12 @@ aarch64_extract_operand (const aarch64_operand *self,
case 193:
case 194:
case 237:
- case 257:
- case 258:
- case 260:
case 262:
+ case 263:
+ case 265:
case 267:
- case 268:
+ case 272:
+ case 273:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -29440,8 +30067,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
- case 259:
- case 261:
+ case 264:
+ case 266:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
@@ -29554,8 +30181,6 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 247:
- case 248:
case 249:
case 250:
case 251:
@@ -29564,22 +30189,29 @@ aarch64_extract_operand (const aarch64_operand *self,
case 254:
case 255:
case 256:
+ case 257:
+ case 258:
+ case 259:
+ case 260:
+ case 261:
return aarch64_ext_simple_index (self, info, code, inst, errors);
case 239:
case 240:
case 241:
case 242:
case 243:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 244:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 245:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 246:
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ case 247:
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ case 248:
return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 264:
- case 265:
- case 266:
+ case 269:
+ case 270:
+ case 271:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index cb209c55a89..a2ef94536ff 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -263,7 +263,9 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REG, "SME_PNn3_INDEX2", 8 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_PNn3, FLD_imm2_8}, "an indexed SVE predicate-as-counter register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off1x4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm1_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off2x2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm2_0}, "ZA array"},
+ {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off2x4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm2_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_5", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_5}, "ZA array"},
{AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3x2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"},
@@ -273,8 +275,11 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10, FLD_imm2_1}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10, FLD_imm1_2}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_15, FLD_imm2_10}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX4_1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10, FLD_imm2_1}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX4_10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_15, FLD_imm3_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX1_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm1_16}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_15", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_15}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zn_INDEX2_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn, FLD_imm2_16}, "an indexed SVE vector register"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 9555df186a4..ac54bf7811a 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -319,12 +319,14 @@ const aarch64_field fields[] =
{ 0, 4 }, /* cond2: condition in truly conditional-executed inst. */
{ 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */
{ 21, 2 }, /* hw: in move wide constant instructions. */
+ { 0, 1 }, /* imm1_0: general immediate in bits [0]. */
{ 2, 1 }, /* imm1_2: general immediate in bits [2]. */
{ 8, 1 }, /* imm1_8: general immediate in bits [8]. */
{ 10, 1 }, /* imm1_10: general immediate in bits [10]. */
{ 15, 1 }, /* imm1_15: general immediate in bits [15]. */
{ 16, 1 }, /* imm1_16: general immediate in bits [16]. */
{ 0, 2 }, /* imm2_0: general immediate in bits [1:0]. */
+ { 1, 2 }, /* imm2_1: general immediate in bits [2:1]. */
{ 8, 2 }, /* imm2_8: general immediate in bits [9:8]. */
{ 10, 2 }, /* imm2_10: 2-bit immediate, bits [11:10] */
{ 15, 2 }, /* imm2_15: 2-bit immediate, bits [16:15] */
@@ -1772,8 +1774,11 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_1:
case AARCH64_OPND_SME_Zm_INDEX3_2:
case AARCH64_OPND_SME_Zm_INDEX3_10:
+ case AARCH64_OPND_SME_Zm_INDEX4_1:
+ case AARCH64_OPND_SME_Zm_INDEX4_10:
size = get_operand_fields_width (get_operand_from_code (type)) - 4;
if (!check_reglane (opnd, mismatch_detail, idx, "z", 0, 15,
0, (1 << size) - 1))
@@ -1877,12 +1882,24 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
return 0;
break;
+ case AARCH64_OPND_SME_ZA_array_off1x4:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 1, 4,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_ZA_array_off2x2:
if (!check_za_access (opnd, mismatch_detail, idx, 8, 3, 2,
get_opcode_dependent_value (opcode)))
return 0;
break;
+ case AARCH64_OPND_SME_ZA_array_off2x4:
+ if (!check_za_access (opnd, mismatch_detail, idx, 8, 3, 4,
+ get_opcode_dependent_value (opcode)))
+ return 0;
+ break;
+
case AARCH64_OPND_SME_ZA_array_off3x2:
if (!check_za_access (opnd, mismatch_detail, idx, 8, 7, 2,
get_opcode_dependent_value (opcode)))
@@ -3955,8 +3972,11 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_Zn_INDEX:
case AARCH64_OPND_SME_Zm_INDEX1:
case AARCH64_OPND_SME_Zm_INDEX2:
+ case AARCH64_OPND_SME_Zm_INDEX3_1:
case AARCH64_OPND_SME_Zm_INDEX3_2:
case AARCH64_OPND_SME_Zm_INDEX3_10:
+ case AARCH64_OPND_SME_Zm_INDEX4_1:
+ case AARCH64_OPND_SME_Zm_INDEX4_10:
case AARCH64_OPND_SME_Zn_INDEX1_16:
case AARCH64_OPND_SME_Zn_INDEX2_15:
case AARCH64_OPND_SME_Zn_INDEX2_16:
@@ -4009,7 +4029,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
print_sme_za_list (buf, size, opnd->reg.regno, styler);
break;
+ case AARCH64_OPND_SME_ZA_array_off1x4:
case AARCH64_OPND_SME_ZA_array_off2x2:
+ case AARCH64_OPND_SME_ZA_array_off2x4:
case AARCH64_OPND_SME_ZA_array_off3_0:
case AARCH64_OPND_SME_ZA_array_off3_5:
case AARCH64_OPND_SME_ZA_array_off3x2:
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index b925af5ac37..f8051c9b2da 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -140,12 +140,14 @@ enum aarch64_field_kind
FLD_cond2,
FLD_defgh,
FLD_hw,
+ FLD_imm1_0,
FLD_imm1_2,
FLD_imm1_8,
FLD_imm1_10,
FLD_imm1_15,
FLD_imm1_16,
FLD_imm2_0,
+ FLD_imm2_1,
FLD_imm2_8,
FLD_imm2_10,
FLD_imm2_15,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 552345d35f6..75d36640da4 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1535,6 +1535,10 @@
{ \
QLF3(S_D,S_D,S_D), \
}
+#define OP_SVE_DHH \
+{ \
+ QLF3(S_D,S_H,S_H), \
+}
#define OP_SVE_DMMD \
{ \
QLF4(S_D,P_M,P_M,S_D), \
@@ -2509,6 +2513,8 @@ static const aarch64_feature_set aarch64_feature_sme_i16i64 =
static const aarch64_feature_set aarch64_feature_sme2 =
AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME
| AARCH64_FEATURE_SME2, 0);
+static const aarch64_feature_set aarch64_feature_sme2_i16i64 =
+ AARCH64_FEATURE (AARCH64_FEATURE_SME2 | AARCH64_FEATURE_SME_I16I64, 0);
static const aarch64_feature_set aarch64_feature_sme2_f64f64 =
AARCH64_FEATURE (AARCH64_FEATURE_SME2 | AARCH64_FEATURE_SME_F64F64, 0);
static const aarch64_feature_set aarch64_feature_v8_6 =
@@ -2580,6 +2586,7 @@ static const aarch64_feature_set aarch64_feature_cssc =
#define SME_F64F64 &aarch64_feature_sme_f64f64
#define SME_I16I64 &aarch64_feature_sme_i16i64
#define SME2 &aarch64_feature_sme2
+#define SME2_I16I64 &aarch64_feature_sme2_i16i64
#define SME2_F64F64 &aarch64_feature_sme2_f64f64
#define ARMV8_6 &aarch64_feature_v8_6
#define ARMV8_6_SVE &aarch64_feature_v8_6
@@ -2695,6 +2702,9 @@ static const aarch64_feature_set aarch64_feature_cssc =
#define SME2_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SME2, OPS, QUALS, \
F_STRICT | FLAGS, 0, TIED, NULL }
+#define SME2_I16I64_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
+ { NAME, OPCODE, MASK, CLASS, OP, SME2_I16I64, OPS, QUALS, \
+ F_STRICT | FLAGS, 0, TIED, NULL }
#define SME2_F64F64_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SME2_F64F64, OPS, QUALS, \
F_STRICT | FLAGS, 0, TIED, NULL }
@@ -5514,6 +5524,14 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("smlal", 0xc1700800, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("smlal", 0xc1e00800, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("smlal", 0xc1e10800, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlall", 0xc1000000, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("smlall", 0xc1100000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("smlall", 0xc1108000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("smlall", 0xc1200400, 0xffb09c1c, sme_int_sd, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("smlall", 0xc1200000, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("smlall", 0xc1300000, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("smlall", 0xc1a00000, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("smlall", 0xc1a10000, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("smlsl", 0xc1c01008, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
SME2_INSN ("smlsl", 0xc1d01008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("smlsl", 0xc1d09008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
@@ -5522,6 +5540,14 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("smlsl", 0xc1700808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("smlsl", 0xc1e00808, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("smlsl", 0xc1e10808, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("smlsll", 0xc1000008, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("smlsll", 0xc1100008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("smlsll", 0xc1108008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("smlsll", 0xc1200408, 0xffb09c1c, sme_int_sd, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("smlsll", 0xc1200008, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("smlsll", 0xc1300008, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("smlsll", 0xc1a00008, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("smlsll", 0xc1a10008, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("sqdmulh", 0xc120a400, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -5601,6 +5627,11 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("sub", 0xc1301818, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("sub", 0xc1a01818, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("sub", 0xc1a11818, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("sumlall", 0xc1000014, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("sumlall", 0xc1100030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sumlall", 0xc1108030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("sumlall", 0xc1200014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sumlall", 0xc1300014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("umax", 0xc120a001, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umax", 0xc120a801, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umax", 0xc120b001, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -5617,6 +5648,14 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("umlal", 0xc1700810, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("umlal", 0xc1e00810, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("umlal", 0xc1e10810, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlall", 0xc1000010, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("umlall", 0xc1100010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("umlall", 0xc1108010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("umlall", 0xc1200410, 0xffb09c1c, sme_int_sd, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("umlall", 0xc1200010, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("umlall", 0xc1300010, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("umlall", 0xc1a00010, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("umlall", 0xc1a10010, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("umlsl", 0xc1c01018, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
SME2_INSN ("umlsl", 0xc1d01018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("umlsl", 0xc1d09018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
@@ -5625,10 +5664,26 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("umlsl", 0xc1700818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("umlsl", 0xc1e00818, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("umlsl", 0xc1e10818, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("umlsll", 0xc1000018, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("umlsll", 0xc1100018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("umlsll", 0xc1108018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("umlsll", 0xc1200418, 0xffb09c1c, sme_int_sd, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("umlsll", 0xc1200018, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("umlsll", 0xc1300018, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("umlsll", 0xc1a00018, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("umlsll", 0xc1a10018, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120ba21, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("usmlall", 0xc1000004, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
+ SME2_INSN ("usmlall", 0xc1100020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usmlall", 0xc1108020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("usmlall", 0xc1200404, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm), OP_SVE_VVV_SD_BH, 0, 0),
+ SME2_INSN ("usmlall", 0xc1200004, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("usmlall", 0xc1300004, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("usmlall", 0xc1a00004, 0xffe19c3e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usmlall", 0xc1a10004, 0xffe39c7e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
@@ -5639,6 +5694,20 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("whilelt", 0x25204410, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("zero", 0xc0480001, 0xffffffff, sme_misc, 0, OP1 (SME_ZT0_LIST), {}, 0, 0),
+ /* SME2 I16I64 instructions. */
+ SME2_I16I64_INSN ("smlall", 0xc1800000, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
+ SME2_I16I64_INSN ("smlall", 0xc1900000, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("smlall", 0xc1908000, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("smlsll", 0xc1800008, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
+ SME2_I16I64_INSN ("smlsll", 0xc1900008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("smlsll", 0xc1908008, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("umlall", 0xc1800010, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
+ SME2_I16I64_INSN ("umlall", 0xc1900010, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("umlall", 0xc1908010, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("umlsll", 0xc1800018, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
+ SME2_I16I64_INSN ("umlsll", 0xc1900018, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("umlsll", 0xc1908018, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+
/* SME2 F64F64 instructions. */
SME2_F64F64_INSN ("fmla", 0xc1d00000, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (2), 0),
SME2_F64F64_INSN ("fmla", 0xc1d08000, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (4), 0),
@@ -6343,8 +6412,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \
F(FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \
"an SME horizontal or vertical vector access register") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off1x4", \
+ 4 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm1_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off2x2", \
2 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm2_0), "ZA array") \
+ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off2x4", \
+ 4 << OPD_F_OD_LSB, F(FLD_SME_Rv,FLD_imm2_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_0", 0, \
F(FLD_SME_Rv,FLD_imm3_0), "ZA array") \
Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_5", 0, \
@@ -6364,12 +6437,21 @@ const struct aarch64_opcode aarch64_opcode_table[] =
F(FLD_SME_Zm, FLD_imm1_10), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX2", 0, \
F(FLD_SME_Zm, FLD_imm2_10), "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX3_1", 0, \
+ F(FLD_SME_Zm, FLD_imm1_10, FLD_imm2_1), \
+ "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX3_2", 0, \
F(FLD_SME_Zm, FLD_imm2_10, FLD_imm1_2), \
"an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX3_10", 0, \
F(FLD_SME_Zm, FLD_imm1_15, FLD_imm2_10), \
"an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX4_1", 0, \
+ F(FLD_SME_Zm, FLD_imm2_10, FLD_imm2_1), \
+ "an indexed SVE vector register") \
+ Y(SVE_REG, simple_index, "SME_Zm_INDEX4_10", 0, \
+ F(FLD_SME_Zm, FLD_imm1_15, FLD_imm3_10), \
+ "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX1_16", 0, \
F(FLD_SVE_Zn, FLD_imm1_16), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zn_INDEX2_15", 0, \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 16/31] aarch64: Add the SME2 dot-product instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (14 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 15/31] aarch64: Add the SME2 MLALL and MLSLL instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 17/31] aarch64: Add the SME2 vertical " Richard Sandiford
` (16 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
BFDOT, FDOT and USDOT share the same instruction format.
SDOT and UDOT share a different format. SUDOT does not
have the multi vector x multi vector forms, since they
would be redundant with USDOT.
---
gas/testsuite/gas/aarch64/sme2-15-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-15-invalid.l | 97 +
gas/testsuite/gas/aarch64/sme2-15-invalid.s | 87 +
gas/testsuite/gas/aarch64/sme2-15-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-15-noarch.l | 187 ++
gas/testsuite/gas/aarch64/sme2-15.d | 195 ++
gas/testsuite/gas/aarch64/sme2-15.s | 203 ++
gas/testsuite/gas/aarch64/sme2-16-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-16-invalid.l | 97 +
gas/testsuite/gas/aarch64/sme2-16-invalid.s | 87 +
gas/testsuite/gas/aarch64/sme2-16-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-16-noarch.l | 249 ++
gas/testsuite/gas/aarch64/sme2-16.d | 257 +++
gas/testsuite/gas/aarch64/sme2-16.s | 271 +++
gas/testsuite/gas/aarch64/sme2-17-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-17-invalid.l | 20 +
gas/testsuite/gas/aarch64/sme2-17-invalid.s | 12 +
gas/testsuite/gas/aarch64/sme2-17-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-17-noarch.l | 45 +
gas/testsuite/gas/aarch64/sme2-17.d | 53 +
gas/testsuite/gas/aarch64/sme2-17.s | 47 +
.../gas/aarch64/sme2-i16i64-3-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-3-invalid.l | 19 +
.../gas/aarch64/sme2-i16i64-3-invalid.s | 12 +
.../gas/aarch64/sme2-i16i64-3-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-3-noarch.l | 125 +
gas/testsuite/gas/aarch64/sme2-i16i64-3.d | 133 ++
gas/testsuite/gas/aarch64/sme2-i16i64-3.s | 135 ++
opcodes/aarch64-dis-2.c | 2056 +++++++++++------
opcodes/aarch64-tbl.h | 50 +
30 files changed, 3708 insertions(+), 753 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-15-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-15.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-15.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-16-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-16.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-16.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-17-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-17.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-17.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3.s
diff --git a/gas/testsuite/gas/aarch64/sme2-15-invalid.d b/gas/testsuite/gas/aarch64/sme2-15-invalid.d
new file mode 100644
index 00000000000..9a101349326
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-15-invalid.s
+#error_output: sme2-15-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-15-invalid.l b/gas/testsuite/gas/aarch64/sme2-15-invalid.l
new file mode 100644
index 00000000000..54fd066712c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-invalid.l
@@ -0,0 +1,97 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `bfdot za\.s\[w8,0\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `bfdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{z0-z1},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z4\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h,z1\.h,z5\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{z0-z1},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfdot za\.s\[w8,0:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfdot za\.s\[w8,1:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,1:foo\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:bar\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-15-invalid.s b/gas/testsuite/gas/aarch64/sme2-15-invalid.s
new file mode 100644
index 00000000000..1deb7ca25a1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-invalid.s
@@ -0,0 +1,87 @@
+ bfdot 0, { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0], 0, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, 0
+
+ bfdot za.h[w8, 0], z0.h, z0.h
+ bfdot za.h[w8, 0], { z0.h - z1.h }, z0.h
+
+ bfdot za.s[w7, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w12, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, -1], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 8], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z2.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z1.h - z2.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h[-1]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h[4]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z16.h[0]
+
+ bfdot za.s[w7, 0], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w12, 0], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, -1], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 8], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z1.h - z4.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z2.h - z5.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z3.h - z6.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h[-1]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h[4]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z16.h[0]
+
+ bfdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0, vgx2], { z0.h - z3.h }, z0.h[0]
+ bfdot za[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0 - z1 }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0[0]
+ bfdot za.h[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.h[w8, 0], { z0.s - z1.s }, z0.s[0]
+
+ bfdot za.s[w8, 0], { z0.h - z2.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h - z4.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h, z1.h, z2.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h, z1.h, z5.h }, z0.h
+
+ bfdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 0, vgx2], { z0.h - z3.h }, z0.h
+ bfdot za[w8, 0], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 0], { z0 - z1 }, z0.h
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0
+ bfdot za[w8, 0], { z0.h - z1.h }, z0
+
+ bfdot za.s[w7, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w12, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, -1], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 8], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z1.h - z2.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z15.h - z16.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z31.h, z0.h }
+
+ bfdot za.s[w7, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w12, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, -1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 8], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z1.h - z4.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z2.h - z5.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z3.h - z6.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z15.h - z18.h }
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z29.h, z30.h, z31.h, z0.h }
+
+ bfdot za.s[w8, 0], { z0.h - z2.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z2.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z4.h }
+
+ bfdot za.s[w8, 0, vgx4], { z0.h - z1.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0, vgx2], { z0.h - z3.h }, { z0.h - z1.h }
+ bfdot za[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+
+ bfdot za.s[w8, 0:0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0:2], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 1:0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, foo:1], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 1:foo], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, foo:bar], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-15-noarch.d b/gas/testsuite/gas/aarch64/sme2-15-noarch.d
new file mode 100644
index 00000000000..93ef8842b4c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-15.s
+#error_output: sme2-15-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-15-noarch.l b/gas/testsuite/gas/aarch64/sme2-15-noarch.l
new file mode 100644
index 00000000000..70bfb962091
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15-noarch.l
@@ -0,0 +1,187 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-15.d b/gas/testsuite/gas/aarch64/sme2-15.d
new file mode 100644
index 00000000000..9f60f9ded69
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15.d
@@ -0,0 +1,195 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1501018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1507018 bfdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c150101f bfdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15013d8 bfdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f1018 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1501c18 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d55da bfdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1509018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150f018 bfdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150901f bfdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509398 bfdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f9018 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1509c18 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[3\]
+[^:]+: c15ab899 bfdot za\.s\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[2\]
+[^:]+: c1201010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1207010 bfdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201017 bfdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c12013d0 bfdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c12013f0 bfdot za\.s\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12013f0 bfdot za\.s\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12f1010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12932b3 bfdot za\.s\[w9, 3, vgx2\], {z21\.h-z22\.h}, z9\.h
+[^:]+: c1301010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1307010 bfdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301017 bfdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301390 bfdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c13013d0 bfdot za\.s\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c13013d0 bfdot za\.s\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c13013f0 bfdot za\.s\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13013f0 bfdot za\.s\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13f1010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c1335235 bfdot za\.s\[w10, 5, vgx4\], {z17\.h-z20\.h}, z3\.h
+[^:]+: c1a01010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a07010 bfdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01017 bfdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a013d0 bfdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be1010 bfdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b252d1 bfdot za\.s\[w10, 1, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a11010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a17010 bfdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11017 bfdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11390 bfdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd1010 bfdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b97213 bfdot za\.s\[w11, 3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1501008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1507008 fdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c150100f fdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15013c8 fdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f1008 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1501c08 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d55ca fdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1509008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150f008 fdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150900f fdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509388 fdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f9008 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1509c08 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[3\]
+[^:]+: c15ab889 fdot za\.s\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[2\]
+[^:]+: c1201000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1207000 fdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1201007 fdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c12013c0 fdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c12013e0 fdot za\.s\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12013e0 fdot za\.s\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c12f1000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c12932a3 fdot za\.s\[w9, 3, vgx2\], {z21\.h-z22\.h}, z9\.h
+[^:]+: c1301000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1307000 fdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301007 fdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1301380 fdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c13013c0 fdot za\.s\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c13013c0 fdot za\.s\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c13013e0 fdot za\.s\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13013e0 fdot za\.s\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c13f1000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c1335225 fdot za\.s\[w10, 5, vgx4\], {z17\.h-z20\.h}, z3\.h
+[^:]+: c1a01000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a07000 fdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a01007 fdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1a013c0 fdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1be1000 fdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1b252c1 fdot za\.s\[w10, 1, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1a11000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a17000 fdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11007 fdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1a11380 fdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1bd1000 fdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1b97203 fdot za\.s\[w11, 3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1501028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1507028 usdot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c150102f usdot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c15013e8 usdot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f1028 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1501c28 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[3\]
+[^:]+: c15d55ea usdot za\.s\[w10, 2, vgx2\], {z14\.b-z15\.b}, z13\.b\[1\]
+[^:]+: c1509028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150f028 usdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150902f usdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15093a8 usdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f9028 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1509c28 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15ab8a9 usdot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+: c1201408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1207408 usdot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c120140f usdot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12017c8 usdot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12017e8 usdot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12017e8 usdot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f1408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12936ab usdot za\.s\[w9, 3, vgx2\], {z21\.b-z22\.b}, z9\.b
+[^:]+: c1301408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1307408 usdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c130140f usdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301788 usdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13017c8 usdot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017c8 usdot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017e8 usdot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13017e8 usdot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f1408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c133562d usdot za\.s\[w10, 5, vgx4\], {z17\.b-z20\.b}, z3\.b
+[^:]+: c1a01408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a07408 usdot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a0140f usdot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a017c8 usdot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be1408 usdot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b256c9 usdot za\.s\[w10, 1, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a11408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a17408 usdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a1140f usdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11788 usdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd1408 usdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b9760b usdot za\.s\[w11, 3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
diff --git a/gas/testsuite/gas/aarch64/sme2-15.s b/gas/testsuite/gas/aarch64/sme2-15.s
new file mode 100644
index 00000000000..aa13cddffb8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-15.s
@@ -0,0 +1,203 @@
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ BFDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ BFDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ bfdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ bfdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ BFDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ BFDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ bfdot za.s[w11, 0], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 7], { z0.h - z3.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z28.h - z31.h }, z0.h[0]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z15.h[0]
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h[3]
+ bfdot za.s[w9, 1], { z4.h - z7.h }, z10.h[2]
+
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ BFDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ BFDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ bfdot za.s[w11, 0], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 7], { z0.h - z1.h }, z0.h
+ bfdot za.s[w8, 0], { z30.h - z31.h }, z0.h
+ bfdot za.s[w8, 0], { z31.h, z0.h }, z0.h
+ bfdot za.s[w8, 0], { z31.h - z0.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h - z1.h }, z15.h
+ bfdot za.s[w9, 3], { z21.h - z22.h }, z9.h
+
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ bfdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ BFDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ BFDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ bfdot za.s[w11, 0], { z0.h - z3.h }, z0.h
+ bfdot za.s[w8, 7], { z0.h - z3.h }, z0.h
+ bfdot za.s[w8, 0], { z28.h - z31.h }, z0.h
+ bfdot za.s[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ bfdot za.s[w8, 0], { z30.h - z1.h }, z0.h
+ bfdot za.s[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ bfdot za.s[w8, 0], { z31.h - z2.h }, z0.h
+ bfdot za.s[w8, 0], { z0.h - z3.h }, z15.h
+ bfdot za.s[w10, 5], { z17.h - z20.h }, z3.h
+
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ BFDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ BFDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ bfdot za.s[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ bfdot za.s[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ bfdot za.s[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ BFDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ BFDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ bfdot za.s[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ bfdot za.s[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ bfdot za.s[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ fdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ fdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ FDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ FDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ fdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ fdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ fdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ fdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ fdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ fdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ fdot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ fdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ FDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ FDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ fdot za.s[w11, 0], { z0.h - z3.h }, z0.h[0]
+ fdot za.s[w8, 7], { z0.h - z3.h }, z0.h[0]
+ fdot za.s[w8, 0], { z28.h - z31.h }, z0.h[0]
+ fdot za.s[w8, 0], { z0.h - z3.h }, z15.h[0]
+ fdot za.s[w8, 0], { z0.h - z3.h }, z0.h[3]
+ fdot za.s[w9, 1], { z4.h - z7.h }, z10.h[2]
+
+ fdot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ fdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ FDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ FDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ fdot za.s[w11, 0], { z0.h - z1.h }, z0.h
+ fdot za.s[w8, 7], { z0.h - z1.h }, z0.h
+ fdot za.s[w8, 0], { z30.h - z31.h }, z0.h
+ fdot za.s[w8, 0], { z31.h, z0.h }, z0.h
+ fdot za.s[w8, 0], { z31.h - z0.h }, z0.h
+ fdot za.s[w8, 0], { z0.h - z1.h }, z15.h
+ fdot za.s[w9, 3], { z21.h - z22.h }, z9.h
+
+ fdot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ fdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ FDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ FDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ fdot za.s[w11, 0], { z0.h - z3.h }, z0.h
+ fdot za.s[w8, 7], { z0.h - z3.h }, z0.h
+ fdot za.s[w8, 0], { z28.h - z31.h }, z0.h
+ fdot za.s[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ fdot za.s[w8, 0], { z30.h - z1.h }, z0.h
+ fdot za.s[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ fdot za.s[w8, 0], { z31.h - z2.h }, z0.h
+ fdot za.s[w8, 0], { z0.h - z3.h }, z15.h
+ fdot za.s[w10, 5], { z17.h - z20.h }, z3.h
+
+ fdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ fdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ FDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ FDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ fdot za.s[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ fdot za.s[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ fdot za.s[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ fdot za.s[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ fdot za.s[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ fdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ fdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ FDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ FDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ fdot za.s[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ fdot za.s[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ fdot za.s[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ fdot za.s[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ fdot za.s[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ usdot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ usdot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b[0]
+ USDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b[0]
+ USDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B[0]
+ usdot za.s[w11, 0], { z0.b - z1.b }, z0.b[0]
+ usdot za.s[w8, 7], { z0.b - z1.b }, z0.b[0]
+ usdot za.s[w8, 0], { z30.b - z31.b }, z0.b[0]
+ usdot za.s[w8, 0], { z0.b - z1.b }, z15.b[0]
+ usdot za.s[w8, 0], { z0.b - z1.b }, z0.b[3]
+ usdot za.s[w10, 2], { z14.b - z15.b }, z13.b[1]
+
+ usdot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ usdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ USDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ USDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ usdot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ usdot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ usdot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ usdot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ usdot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ usdot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ usdot za.s[w8, 0], { z0.b - z1.b }, z0.b
+ usdot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b
+ USDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b
+ USDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B
+ usdot za.s[w11, 0], { z0.b - z1.b }, z0.b
+ usdot za.s[w8, 7], { z0.b - z1.b }, z0.b
+ usdot za.s[w8, 0], { z30.b - z31.b }, z0.b
+ usdot za.s[w8, 0], { z31.b, z0.b }, z0.b
+ usdot za.s[w8, 0], { z31.b - z0.b }, z0.b
+ usdot za.s[w8, 0], { z0.b - z1.b }, z15.b
+ usdot za.s[w9, 3], { z21.b - z22.b }, z9.b
+
+ usdot za.s[w8, 0], { z0.b - z3.b }, z0.b
+ usdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b
+ USDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b
+ USDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B
+ usdot za.s[w11, 0], { z0.b - z3.b }, z0.b
+ usdot za.s[w8, 7], { z0.b - z3.b }, z0.b
+ usdot za.s[w8, 0], { z28.b - z31.b }, z0.b
+ usdot za.s[w8, 0], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ usdot za.s[w8, 0], { z30.b - z1.b }, z0.b
+ usdot za.s[w8, 0], { z31.b, z0.b, z1.b, z2.b }, z0.b
+ usdot za.s[w8, 0], { z31.b - z2.b }, z0.b
+ usdot za.s[w8, 0], { z0.b - z3.b }, z15.b
+ usdot za.s[w10, 5], { z17.b - z20.b }, z3.b
+
+ usdot za.s[w8, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ usdot za.s[w8, 0, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ USDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, { Z0.b - Z1.b }
+ USDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, { Z0.B - Z1.B }
+ usdot za.s[w11, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ usdot za.s[w8, 7], { z0.b - z1.b }, { z0.b - z1.b }
+ usdot za.s[w8, 0], { z30.b - z31.b }, { z0.b - z1.b }
+ usdot za.s[w8, 0], { z0.b - z1.b }, { z30.b - z31.b }
+ usdot za.s[w10, 1], { z22.b - z23.b }, { z18.b - z19.b }
+
+ usdot za.s[w8, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ usdot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ USDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, { Z0.b - Z3.b }
+ USDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, { Z0.B - Z3.B }
+ usdot za.s[w11, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ usdot za.s[w8, 7], { z0.b - z3.b }, { z0.b - z3.b }
+ usdot za.s[w8, 0], { z28.b - z31.b }, { z0.b - z3.b }
+ usdot za.s[w8, 0], { z0.b - z3.b }, { z28.b - z31.b }
+ usdot za.s[w11, 3], { z16.b - z19.b }, { z24.b - z27.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-16-invalid.d b/gas/testsuite/gas/aarch64/sme2-16-invalid.d
new file mode 100644
index 00000000000..76f36982780
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-16-invalid.s
+#error_output: sme2-16-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-16-invalid.l b/gas/testsuite/gas/aarch64/sme2-16-invalid.l
new file mode 100644
index 00000000000..44e0f1a69fb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-invalid.l
@@ -0,0 +1,97 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sdot za\.s\[w8,0\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `sdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{z0-z1},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z4\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h,z1\.h,z5\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{z0-z1},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z15\.h-z16\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z4\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z2\.h-z5\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z3\.h-z6\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z15\.h-z18\.h}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z2\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z4\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `sdot za\.s\[w8,0:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `sdot za\.s\[w8,1:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,1:foo\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:bar\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-16-invalid.s b/gas/testsuite/gas/aarch64/sme2-16-invalid.s
new file mode 100644
index 00000000000..52e7209a8a8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-invalid.s
@@ -0,0 +1,87 @@
+ sdot 0, { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0], 0, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, 0
+
+ sdot za.h[w8, 0], z0.h, z0.h
+ sdot za.h[w8, 0], { z0.h - z1.h }, z0.h
+
+ sdot za.s[w7, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w12, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, -1], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 8], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z2.h }, z0.h[0]
+ sdot za.s[w8, 0], { z1.h - z2.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h[-1]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h[4]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z16.h[0]
+
+ sdot za.s[w7, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w12, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, -1], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 8], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 0], { z1.h - z4.h }, z0.h[0]
+ sdot za.s[w8, 0], { z2.h - z5.h }, z0.h[0]
+ sdot za.s[w8, 0], { z3.h - z6.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h[-1]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h[4]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z16.h[0]
+
+ sdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0, vgx2], { z0.h - z3.h }, z0.h[0]
+ sdot za[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0 - z1 }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0[0]
+ sdot za.h[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.h[w8, 0], { z0.s - z1.s }, z0.s[0]
+
+ sdot za.s[w8, 0], { z0.h - z2.h }, z0.h
+ sdot za.s[w8, 0], { z0.h - z4.h }, z0.h
+ sdot za.s[w8, 0], { z0.h, z1.h, z2.h }, z0.h
+ sdot za.s[w8, 0], { z0.h, z1.h, z5.h }, z0.h
+
+ sdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 0, vgx2], { z0.h - z3.h }, z0.h
+ sdot za[w8, 0], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 0], { z0 - z1 }, z0.h
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0
+ sdot za[w8, 0], { z0.h - z1.h }, z0
+
+ sdot za.s[w7, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w12, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, -1], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 8], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z1.h - z2.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z15.h - z16.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z31.h, z0.h }
+
+ sdot za.s[w7, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w12, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, -1], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 8], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z1.h - z4.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z2.h - z5.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z3.h - z6.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z15.h - z18.h }
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z29.h, z30.h, z31.h, z0.h }
+
+ sdot za.s[w8, 0], { z0.h - z2.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z2.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z4.h }
+
+ sdot za.s[w8, 0, vgx4], { z0.h - z1.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0, vgx2], { z0.h - z3.h }, { z0.h - z1.h }
+ sdot za[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+
+ sdot za.s[w8, 0:0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0:1], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0:2], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0:3], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 1:0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, foo:1], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 1:foo], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, foo:bar], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-16-noarch.d b/gas/testsuite/gas/aarch64/sme2-16-noarch.d
new file mode 100644
index 00000000000..af9a97ebbee
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-16.s
+#error_output: sme2-16-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-16-noarch.l b/gas/testsuite/gas/aarch64/sme2-16-noarch.l
new file mode 100644
index 00000000000..bebc1cca2bc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16-noarch.l
@@ -0,0 +1,249 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-16.d b/gas/testsuite/gas/aarch64/sme2-16.d
new file mode 100644
index 00000000000..4bf9270fe2b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16.d
@@ -0,0 +1,257 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1501000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1507000 sdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1501007 sdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15013c0 sdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f1000 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1501c00 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d55c2 sdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1509000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c150f000 sdot za\.s\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509007 sdot za\.s\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1509380 sdot za\.s\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f9000 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1509c00 sdot za\.s\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[3\]
+[^:]+: c15ab881 sdot za\.s\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[2\]
+[^:]+: c1601408 sdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
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+[^:]+: c150f030 udot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509037 udot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15093b0 udot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f9030 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1509c30 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15ab8b1 udot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+: c1201410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1207410 udot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201417 udot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12017d0 udot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12017f0 udot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12017f0 udot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f1410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12936b3 udot za\.s\[w9, 3, vgx2\], {z21\.b-z22\.b}, z9\.b
+[^:]+: c1301410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1307410 udot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301417 udot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301790 udot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13017d0 udot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017d0 udot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017f0 udot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13017f0 udot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f1410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c1335635 udot za\.s\[w10, 5, vgx4\], {z17\.b-z20\.b}, z3\.b
+[^:]+: c1a01410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a07410 udot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a01417 udot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1a017d0 udot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c1be1410 udot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c1b256d1 udot za\.s\[w10, 1, vgx2\], {z22\.b-z23\.b}, {z18\.b-z19\.b}
+[^:]+: c1a11410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a17410 udot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11417 udot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1a11790 udot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c1bd1410 udot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c1b97613 udot za\.s\[w11, 3, vgx4\], {z16\.b-z19\.b}, {z24\.b-z27\.b}
diff --git a/gas/testsuite/gas/aarch64/sme2-16.s b/gas/testsuite/gas/aarch64/sme2-16.s
new file mode 100644
index 00000000000..b47e1d308f3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-16.s
@@ -0,0 +1,271 @@
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ SDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ SDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ sdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ sdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ sdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ SDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ SDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ sdot za.s[w11, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 7], { z0.h - z3.h }, z0.h[0]
+ sdot za.s[w8, 0], { z28.h - z31.h }, z0.h[0]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z15.h[0]
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h[3]
+ sdot za.s[w9, 1], { z4.h - z7.h }, z10.h[2]
+
+ sdot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ SDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ SDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ sdot za.s[w11, 0], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 7], { z0.h - z1.h }, z0.h
+ sdot za.s[w8, 0], { z30.h - z31.h }, z0.h
+ sdot za.s[w8, 0], { z31.h, z0.h }, z0.h
+ sdot za.s[w8, 0], { z31.h - z0.h }, z0.h
+ sdot za.s[w8, 0], { z0.h - z1.h }, z15.h
+ sdot za.s[w9, 3], { z21.h - z22.h }, z9.h
+
+ sdot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ SDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ SDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ sdot za.s[w11, 0], { z0.h - z3.h }, z0.h
+ sdot za.s[w8, 7], { z0.h - z3.h }, z0.h
+ sdot za.s[w8, 0], { z28.h - z31.h }, z0.h
+ sdot za.s[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ sdot za.s[w8, 0], { z30.h - z1.h }, z0.h
+ sdot za.s[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ sdot za.s[w8, 0], { z31.h - z2.h }, z0.h
+ sdot za.s[w8, 0], { z0.h - z3.h }, z15.h
+ sdot za.s[w10, 5], { z17.h - z20.h }, z3.h
+
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ SDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ SDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ sdot za.s[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ sdot za.s[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ sdot za.s[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ SDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ SDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ sdot za.s[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ sdot za.s[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ sdot za.s[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ sdot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ sdot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b[0]
+ SDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b[0]
+ SDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B[0]
+ sdot za.s[w11, 0], { z0.b - z1.b }, z0.b[0]
+ sdot za.s[w8, 7], { z0.b - z1.b }, z0.b[0]
+ sdot za.s[w8, 0], { z30.b - z31.b }, z0.b[0]
+ sdot za.s[w8, 0], { z0.b - z1.b }, z15.b[0]
+ sdot za.s[w8, 0], { z0.b - z1.b }, z0.b[3]
+ sdot za.s[w10, 2], { z14.b - z15.b }, z13.b[1]
+
+ sdot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ SDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ SDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ sdot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ sdot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ sdot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ sdot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ sdot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ sdot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ sdot za.s[w8, 0], { z0.b - z1.b }, z0.b
+ sdot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b
+ SDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b
+ SDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B
+ sdot za.s[w11, 0], { z0.b - z1.b }, z0.b
+ sdot za.s[w8, 7], { z0.b - z1.b }, z0.b
+ sdot za.s[w8, 0], { z30.b - z31.b }, z0.b
+ sdot za.s[w8, 0], { z31.b, z0.b }, z0.b
+ sdot za.s[w8, 0], { z31.b - z0.b }, z0.b
+ sdot za.s[w8, 0], { z0.b - z1.b }, z15.b
+ sdot za.s[w9, 3], { z21.b - z22.b }, z9.b
+
+ sdot za.s[w8, 0], { z0.b - z3.b }, z0.b
+ sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b
+ SDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b
+ SDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B
+ sdot za.s[w11, 0], { z0.b - z3.b }, z0.b
+ sdot za.s[w8, 7], { z0.b - z3.b }, z0.b
+ sdot za.s[w8, 0], { z28.b - z31.b }, z0.b
+ sdot za.s[w8, 0], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ sdot za.s[w8, 0], { z30.b - z1.b }, z0.b
+ sdot za.s[w8, 0], { z31.b, z0.b, z1.b, z2.b }, z0.b
+ sdot za.s[w8, 0], { z31.b - z2.b }, z0.b
+ sdot za.s[w8, 0], { z0.b - z3.b }, z15.b
+ sdot za.s[w10, 5], { z17.b - z20.b }, z3.b
+
+ sdot za.s[w8, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ sdot za.s[w8, 0, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ SDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, { Z0.b - Z1.b }
+ SDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, { Z0.B - Z1.B }
+ sdot za.s[w11, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ sdot za.s[w8, 7], { z0.b - z1.b }, { z0.b - z1.b }
+ sdot za.s[w8, 0], { z30.b - z31.b }, { z0.b - z1.b }
+ sdot za.s[w8, 0], { z0.b - z1.b }, { z30.b - z31.b }
+ sdot za.s[w10, 1], { z22.b - z23.b }, { z18.b - z19.b }
+
+ sdot za.s[w8, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ sdot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ SDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, { Z0.b - Z3.b }
+ SDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, { Z0.B - Z3.B }
+ sdot za.s[w11, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ sdot za.s[w8, 7], { z0.b - z3.b }, { z0.b - z3.b }
+ sdot za.s[w8, 0], { z28.b - z31.b }, { z0.b - z3.b }
+ sdot za.s[w8, 0], { z0.b - z3.b }, { z28.b - z31.b }
+ sdot za.s[w11, 3], { z16.b - z19.b }, { z24.b - z27.b }
+
+ udot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ udot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ UDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ UDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ udot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ udot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ udot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ udot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ udot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ udot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ udot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ udot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ UDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ UDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ udot za.s[w11, 0], { z0.h - z3.h }, z0.h[0]
+ udot za.s[w8, 7], { z0.h - z3.h }, z0.h[0]
+ udot za.s[w8, 0], { z28.h - z31.h }, z0.h[0]
+ udot za.s[w8, 0], { z0.h - z3.h }, z15.h[0]
+ udot za.s[w8, 0], { z0.h - z3.h }, z0.h[3]
+ udot za.s[w9, 1], { z4.h - z7.h }, z10.h[2]
+
+ udot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ udot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ UDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ UDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ udot za.s[w11, 0], { z0.h - z1.h }, z0.h
+ udot za.s[w8, 7], { z0.h - z1.h }, z0.h
+ udot za.s[w8, 0], { z30.h - z31.h }, z0.h
+ udot za.s[w8, 0], { z31.h, z0.h }, z0.h
+ udot za.s[w8, 0], { z31.h - z0.h }, z0.h
+ udot za.s[w8, 0], { z0.h - z1.h }, z15.h
+ udot za.s[w9, 3], { z21.h - z22.h }, z9.h
+
+ udot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ udot za.s[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ UDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ UDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ udot za.s[w11, 0], { z0.h - z3.h }, z0.h
+ udot za.s[w8, 7], { z0.h - z3.h }, z0.h
+ udot za.s[w8, 0], { z28.h - z31.h }, z0.h
+ udot za.s[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ udot za.s[w8, 0], { z30.h - z1.h }, z0.h
+ udot za.s[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ udot za.s[w8, 0], { z31.h - z2.h }, z0.h
+ udot za.s[w8, 0], { z0.h - z3.h }, z15.h
+ udot za.s[w10, 5], { z17.h - z20.h }, z3.h
+
+ udot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.s[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ UDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ UDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ udot za.s[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.s[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.s[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ udot za.s[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ udot za.s[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ udot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.s[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ UDOT ZA.s[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ UDOT ZA.S[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ udot za.s[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.s[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.s[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ udot za.s[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ udot za.s[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ udot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ udot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b[0]
+ UDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b[0]
+ UDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B[0]
+ udot za.s[w11, 0], { z0.b - z1.b }, z0.b[0]
+ udot za.s[w8, 7], { z0.b - z1.b }, z0.b[0]
+ udot za.s[w8, 0], { z30.b - z31.b }, z0.b[0]
+ udot za.s[w8, 0], { z0.b - z1.b }, z15.b[0]
+ udot za.s[w8, 0], { z0.b - z1.b }, z0.b[3]
+ udot za.s[w10, 2], { z14.b - z15.b }, z13.b[1]
+
+ udot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ udot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ UDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ UDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ udot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ udot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ udot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ udot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ udot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ udot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ udot za.s[w8, 0], { z0.b - z1.b }, z0.b
+ udot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b
+ UDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b
+ UDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B
+ udot za.s[w11, 0], { z0.b - z1.b }, z0.b
+ udot za.s[w8, 7], { z0.b - z1.b }, z0.b
+ udot za.s[w8, 0], { z30.b - z31.b }, z0.b
+ udot za.s[w8, 0], { z31.b, z0.b }, z0.b
+ udot za.s[w8, 0], { z31.b - z0.b }, z0.b
+ udot za.s[w8, 0], { z0.b - z1.b }, z15.b
+ udot za.s[w9, 3], { z21.b - z22.b }, z9.b
+
+ udot za.s[w8, 0], { z0.b - z3.b }, z0.b
+ udot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b
+ UDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b
+ UDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B
+ udot za.s[w11, 0], { z0.b - z3.b }, z0.b
+ udot za.s[w8, 7], { z0.b - z3.b }, z0.b
+ udot za.s[w8, 0], { z28.b - z31.b }, z0.b
+ udot za.s[w8, 0], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ udot za.s[w8, 0], { z30.b - z1.b }, z0.b
+ udot za.s[w8, 0], { z31.b, z0.b, z1.b, z2.b }, z0.b
+ udot za.s[w8, 0], { z31.b - z2.b }, z0.b
+ udot za.s[w8, 0], { z0.b - z3.b }, z15.b
+ udot za.s[w10, 5], { z17.b - z20.b }, z3.b
+
+ udot za.s[w8, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ udot za.s[w8, 0, vgx2], { z0.b - z1.b }, { z0.b - z1.b }
+ UDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, { Z0.b - Z1.b }
+ UDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, { Z0.B - Z1.B }
+ udot za.s[w11, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ udot za.s[w8, 7], { z0.b - z1.b }, { z0.b - z1.b }
+ udot za.s[w8, 0], { z30.b - z31.b }, { z0.b - z1.b }
+ udot za.s[w8, 0], { z0.b - z1.b }, { z30.b - z31.b }
+ udot za.s[w10, 1], { z22.b - z23.b }, { z18.b - z19.b }
+
+ udot za.s[w8, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ udot za.s[w8, 0, vgx4], { z0.b - z3.b }, { z0.b - z3.b }
+ UDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, { Z0.b - Z3.b }
+ UDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, { Z0.B - Z3.B }
+ udot za.s[w11, 0], { z0.b - z3.b }, { z0.b - z3.b }
+ udot za.s[w8, 7], { z0.b - z3.b }, { z0.b - z3.b }
+ udot za.s[w8, 0], { z28.b - z31.b }, { z0.b - z3.b }
+ udot za.s[w8, 0], { z0.b - z3.b }, { z28.b - z31.b }
+ udot za.s[w11, 3], { z16.b - z19.b }, { z24.b - z27.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-17-invalid.d b/gas/testsuite/gas/aarch64/sme2-17-invalid.d
new file mode 100644
index 00000000000..8713e800cb3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-17-invalid.s
+#error_output: sme2-17-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-17-invalid.l b/gas/testsuite/gas/aarch64/sme2-17-invalid.l
new file mode 100644
index 00000000000..b1f59231a8e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-invalid.l
@@ -0,0 +1,20 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sudot 0,{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sudot za\.s\[w8,0\],0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z1\.b},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-17-invalid.s b/gas/testsuite/gas/aarch64/sme2-17-invalid.s
new file mode 100644
index 00000000000..50c3dbe01ef
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-invalid.s
@@ -0,0 +1,12 @@
+ sudot 0, { z0.b - z1.b }, z0.b[0]
+ sudot za.s[w8, 0], 0, z0.b[0]
+ sudot za.s[w8, 0], { z0.b - z1.b }, 0
+
+ sudot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sudot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ sudot za.s[w8, 0], { z0.h - z1.h }, z0.h
+ sudot za.s[w8, 0], { z0.h - z3.h }, z0.h
+ sudot za.s[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sudot za.s[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sudot za.s[w8, 0], { z0.b - z1.b }, { z0.b - z1.b }
+ sudot za.s[w8, 0], { z0.b - z3.b }, { z0.b - z3.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-17-noarch.d b/gas/testsuite/gas/aarch64/sme2-17-noarch.d
new file mode 100644
index 00000000000..266cde1a638
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-17.s
+#error_output: sme2-17-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-17-noarch.l b/gas/testsuite/gas/aarch64/sme2-17-noarch.l
new file mode 100644
index 00000000000..f3f2f53574e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17-noarch.l
@@ -0,0 +1,45 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b'
diff --git a/gas/testsuite/gas/aarch64/sme2-17.d b/gas/testsuite/gas/aarch64/sme2-17.d
new file mode 100644
index 00000000000..7866240a75a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17.d
@@ -0,0 +1,53 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1501038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1501038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c1507038 sudot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c150103f sudot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^:]+: c15013f8 sudot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f1038 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b\[0\]
+[^:]+: c1501c38 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b\[3\]
+[^:]+: c15d55fa sudot za\.s\[w10, 2, vgx2\], {z14\.b-z15\.b}, z13\.b\[1\]
+[^:]+: c1509038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1509038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150f038 sudot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150903f sudot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15093b8 sudot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f9038 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1509c38 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15ab8b9 sudot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+: c1201418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1201418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c1207418 sudot za\.s\[w11, 0, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c120141f sudot za\.s\[w8, 7, vgx2\], {z0\.b-z1\.b}, z0\.b
+[^:]+: c12017d8 sudot za\.s\[w8, 0, vgx2\], {z30\.b-z31\.b}, z0\.b
+[^:]+: c12017f8 sudot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12017f8 sudot za\.s\[w8, 0, vgx2\], {z31\.b-z0\.b}, z0\.b
+[^:]+: c12f1418 sudot za\.s\[w8, 0, vgx2\], {z0\.b-z1\.b}, z15\.b
+[^:]+: c12936bb sudot za\.s\[w9, 3, vgx2\], {z21\.b-z22\.b}, z9\.b
+[^:]+: c1301418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1307418 sudot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c130141f sudot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b
+[^:]+: c1301798 sudot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b
+[^:]+: c13017d8 sudot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017d8 sudot za\.s\[w8, 0, vgx4\], {z30\.b-z1\.b}, z0\.b
+[^:]+: c13017f8 sudot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13017f8 sudot za\.s\[w8, 0, vgx4\], {z31\.b-z2\.b}, z0\.b
+[^:]+: c13f1418 sudot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b
+[^:]+: c133563d sudot za\.s\[w10, 5, vgx4\], {z17\.b-z20\.b}, z3\.b
diff --git a/gas/testsuite/gas/aarch64/sme2-17.s b/gas/testsuite/gas/aarch64/sme2-17.s
new file mode 100644
index 00000000000..a6fb1664645
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-17.s
@@ -0,0 +1,47 @@
+ sudot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ sudot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b[0]
+ SUDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b[0]
+ SUDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B[0]
+ sudot za.s[w11, 0], { z0.b - z1.b }, z0.b[0]
+ sudot za.s[w8, 7], { z0.b - z1.b }, z0.b[0]
+ sudot za.s[w8, 0], { z30.b - z31.b }, z0.b[0]
+ sudot za.s[w8, 0], { z0.b - z1.b }, z15.b[0]
+ sudot za.s[w8, 0], { z0.b - z1.b }, z0.b[3]
+ sudot za.s[w10, 2], { z14.b - z15.b }, z13.b[1]
+
+ sudot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ sudot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ SUDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ SUDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ sudot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ sudot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ sudot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ sudot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ sudot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ sudot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ sudot za.s[w8, 0], { z0.b - z1.b }, z0.b
+ sudot za.s[w8, 0, vgx2], { z0.b - z1.b }, z0.b
+ SUDOT ZA.s[W8, 0, VGx2], { Z0.b - Z1.b }, Z0.b
+ SUDOT ZA.S[W8, 0, VGX2], { Z0.B - Z1.B }, Z0.B
+ sudot za.s[w11, 0], { z0.b - z1.b }, z0.b
+ sudot za.s[w8, 7], { z0.b - z1.b }, z0.b
+ sudot za.s[w8, 0], { z30.b - z31.b }, z0.b
+ sudot za.s[w8, 0], { z31.b, z0.b }, z0.b
+ sudot za.s[w8, 0], { z31.b - z0.b }, z0.b
+ sudot za.s[w8, 0], { z0.b - z1.b }, z15.b
+ sudot za.s[w9, 3], { z21.b - z22.b }, z9.b
+
+ sudot za.s[w8, 0], { z0.b - z3.b }, z0.b
+ sudot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b
+ SUDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b
+ SUDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B
+ sudot za.s[w11, 0], { z0.b - z3.b }, z0.b
+ sudot za.s[w8, 7], { z0.b - z3.b }, z0.b
+ sudot za.s[w8, 0], { z28.b - z31.b }, z0.b
+ sudot za.s[w8, 0], { z30.b, z31.b, z0.b, z1.b }, z0.b
+ sudot za.s[w8, 0], { z30.b - z1.b }, z0.b
+ sudot za.s[w8, 0], { z31.b, z0.b, z1.b, z2.b }, z0.b
+ sudot za.s[w8, 0], { z31.b - z2.b }, z0.b
+ sudot za.s[w8, 0], { z0.b - z3.b }, z15.b
+ sudot za.s[w10, 5], { z17.b - z20.b }, z3.b
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d
new file mode 100644
index 00000000000..fb1b90b6023
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-i16i64-3-invalid.s
+#error_output: sme2-i16i64-3-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
new file mode 100644
index 00000000000..dfbb8f97982
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l
@@ -0,0 +1,19 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b
+[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s
new file mode 100644
index 00000000000..20dd22f47e1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s
@@ -0,0 +1,12 @@
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h[-1]
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h[2]
+
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h[-1]
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h[2]
+
+ sudot za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sudot za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ sudot za.d[w8, 0], { z0.h - z1.h }, z0.h
+ sudot za.d[w8, 0], { z0.h - z3.h }, z0.h
+ sudot za.d[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sudot za.d[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d
new file mode 100644
index 00000000000..66d062e6290
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sme2-i16i64-3.s
+#error_output: sme2-i16i64-3-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
new file mode 100644
index 00000000000..432d1943481
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
@@ -0,0 +1,125 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h,z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h-z0\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,3\],{z21\.h-z22\.h},z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h-z2\.h},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,5\],{z17\.h-z20\.h},z3\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3.d b/gas/testsuite/gas/aarch64/sme2-i16i64-3.d
new file mode 100644
index 00000000000..c7f6129fc1c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3.d
@@ -0,0 +1,133 @@
+#as: -march=armv8-a+sme2+sme-i16i64
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1d00008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d06008 sdot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d0000f sdot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d003c8 sdot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df0008 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1d00408 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[1\]
+[^:]+: c1dd45ca sdot za\.d\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1d08008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0e008 sdot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0800f sdot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08388 sdot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df8008 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d08408 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[1\]
+[^:]+: c1daa489 sdot za\.d\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[1\]
+[^:]+: c1601400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1607400 sdot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601407 sdot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c16017c0 sdot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c16017e0 sdot za\.d\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16017e0 sdot za\.d\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f1400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16936a3 sdot za\.d\[w9, 3, vgx2\], {z21\.h-z22\.h}, z9\.h
+[^:]+: c1701400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1707400 sdot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701407 sdot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701780 sdot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c17017c0 sdot za\.d\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17017c0 sdot za\.d\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17017e0 sdot za\.d\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17017e0 sdot za\.d\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f1400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c1735625 sdot za\.d\[w10, 5, vgx4\], {z17\.h-z20\.h}, z3\.h
+[^:]+: c1e01400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e07400 sdot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01407 sdot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e017c0 sdot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe1400 sdot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f256c1 sdot za\.d\[w10, 1, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e11400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e17400 sdot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11407 sdot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11780 sdot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd1400 sdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f97603 sdot za\.d\[w11, 3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
+[^:]+: c1d00018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d00018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d06018 udot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d0001f udot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1d003d8 udot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df0018 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1d00418 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[1\]
+[^:]+: c1dd45da udot za\.d\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1d08018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0e018 udot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0801f udot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08398 udot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df8018 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d08418 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[1\]
+[^:]+: c1daa099 udot za\.d\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[0\]
+[^:]+: c1601410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1607410 udot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c1601417 udot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h
+[^:]+: c16017d0 udot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h
+[^:]+: c16017f0 udot za\.d\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16017f0 udot za\.d\[w8, 0, vgx2\], {z31\.h-z0\.h}, z0\.h
+[^:]+: c16f1410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h
+[^:]+: c16936b3 udot za\.d\[w9, 3, vgx2\], {z21\.h-z22\.h}, z9\.h
+[^:]+: c1701410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1707410 udot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701417 udot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h
+[^:]+: c1701790 udot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h
+[^:]+: c17017d0 udot za\.d\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17017d0 udot za\.d\[w8, 0, vgx4\], {z30\.h-z1\.h}, z0\.h
+[^:]+: c17017f0 udot za\.d\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17017f0 udot za\.d\[w8, 0, vgx4\], {z31\.h-z2\.h}, z0\.h
+[^:]+: c17f1410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h
+[^:]+: c1735635 udot za\.d\[w10, 5, vgx4\], {z17\.h-z20\.h}, z3\.h
+[^:]+: c1e01410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e07410 udot za\.d\[w11, 0, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e01417 udot za\.d\[w8, 7, vgx2\], {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1e017d0 udot za\.d\[w8, 0, vgx2\], {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c1fe1410 udot za\.d\[w8, 0, vgx2\], {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c1f256d1 udot za\.d\[w10, 1, vgx2\], {z22\.h-z23\.h}, {z18\.h-z19\.h}
+[^:]+: c1e11410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e17410 udot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11417 udot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1e11790 udot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c1fd1410 udot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1f97613 udot za\.d\[w11, 3, vgx4\], {z16\.h-z19\.h}, {z24\.h-z27\.h}
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3.s b/gas/testsuite/gas/aarch64/sme2-i16i64-3.s
new file mode 100644
index 00000000000..bb08d744579
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3.s
@@ -0,0 +1,135 @@
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.d[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ SDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ SDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ sdot za.d[w11, 0], { z0.h - z1.h }, z0.h[0]
+ sdot za.d[w8, 7], { z0.h - z1.h }, z0.h[0]
+ sdot za.d[w8, 0], { z30.h - z31.h }, z0.h[0]
+ sdot za.d[w8, 0], { z0.h - z1.h }, z15.h[0]
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h[1]
+ sdot za.d[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ SDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ SDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ sdot za.d[w11, 0], { z0.h - z3.h }, z0.h[0]
+ sdot za.d[w8, 7], { z0.h - z3.h }, z0.h[0]
+ sdot za.d[w8, 0], { z28.h - z31.h }, z0.h[0]
+ sdot za.d[w8, 0], { z0.h - z3.h }, z15.h[0]
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h[1]
+ sdot za.d[w9, 1], { z4.h - z7.h }, z10.h[1]
+
+ sdot za.d[w8, 0], { z0.h - z1.h }, z0.h
+ sdot za.d[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ SDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ SDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ sdot za.d[w11, 0], { z0.h - z1.h }, z0.h
+ sdot za.d[w8, 7], { z0.h - z1.h }, z0.h
+ sdot za.d[w8, 0], { z30.h - z31.h }, z0.h
+ sdot za.d[w8, 0], { z31.h, z0.h }, z0.h
+ sdot za.d[w8, 0], { z31.h - z0.h }, z0.h
+ sdot za.d[w8, 0], { z0.h - z1.h }, z15.h
+ sdot za.d[w9, 3], { z21.h - z22.h }, z9.h
+
+ sdot za.d[w8, 0], { z0.h - z3.h }, z0.h
+ sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ SDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ SDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ sdot za.d[w11, 0], { z0.h - z3.h }, z0.h
+ sdot za.d[w8, 7], { z0.h - z3.h }, z0.h
+ sdot za.d[w8, 0], { z28.h - z31.h }, z0.h
+ sdot za.d[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ sdot za.d[w8, 0], { z30.h - z1.h }, z0.h
+ sdot za.d[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ sdot za.d[w8, 0], { z31.h - z2.h }, z0.h
+ sdot za.d[w8, 0], { z0.h - z3.h }, z15.h
+ sdot za.d[w10, 5], { z17.h - z20.h }, z3.h
+
+ sdot za.d[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.d[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ SDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ SDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ sdot za.d[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.d[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ sdot za.d[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ sdot za.d[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ sdot za.d[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ sdot za.d[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.d[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ SDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ SDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ sdot za.d[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.d[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ sdot za.d[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ sdot za.d[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ sdot za.d[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
+
+ udot za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+ udot za.d[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ UDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ UDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ udot za.d[w11, 0], { z0.h - z1.h }, z0.h[0]
+ udot za.d[w8, 7], { z0.h - z1.h }, z0.h[0]
+ udot za.d[w8, 0], { z30.h - z31.h }, z0.h[0]
+ udot za.d[w8, 0], { z0.h - z1.h }, z15.h[0]
+ udot za.d[w8, 0], { z0.h - z1.h }, z0.h[1]
+ udot za.d[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ udot za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ udot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ UDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ UDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ udot za.d[w11, 0], { z0.h - z3.h }, z0.h[0]
+ udot za.d[w8, 7], { z0.h - z3.h }, z0.h[0]
+ udot za.d[w8, 0], { z28.h - z31.h }, z0.h[0]
+ udot za.d[w8, 0], { z0.h - z3.h }, z15.h[0]
+ udot za.d[w8, 0], { z0.h - z3.h }, z0.h[1]
+ udot za.d[w9, 1], { z4.h - z7.h }, z10.h[0]
+
+ udot za.d[w8, 0], { z0.h - z1.h }, z0.h
+ udot za.d[w8, 0, vgx2], { z0.h - z1.h }, z0.h
+ UDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h
+ UDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H
+ udot za.d[w11, 0], { z0.h - z1.h }, z0.h
+ udot za.d[w8, 7], { z0.h - z1.h }, z0.h
+ udot za.d[w8, 0], { z30.h - z31.h }, z0.h
+ udot za.d[w8, 0], { z31.h, z0.h }, z0.h
+ udot za.d[w8, 0], { z31.h - z0.h }, z0.h
+ udot za.d[w8, 0], { z0.h - z1.h }, z15.h
+ udot za.d[w9, 3], { z21.h - z22.h }, z9.h
+
+ udot za.d[w8, 0], { z0.h - z3.h }, z0.h
+ udot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h
+ UDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h
+ UDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H
+ udot za.d[w11, 0], { z0.h - z3.h }, z0.h
+ udot za.d[w8, 7], { z0.h - z3.h }, z0.h
+ udot za.d[w8, 0], { z28.h - z31.h }, z0.h
+ udot za.d[w8, 0], { z30.h, z31.h, z0.h, z1.h }, z0.h
+ udot za.d[w8, 0], { z30.h - z1.h }, z0.h
+ udot za.d[w8, 0], { z31.h, z0.h, z1.h, z2.h }, z0.h
+ udot za.d[w8, 0], { z31.h - z2.h }, z0.h
+ udot za.d[w8, 0], { z0.h - z3.h }, z15.h
+ udot za.d[w10, 5], { z17.h - z20.h }, z3.h
+
+ udot za.d[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.d[w8, 0, vgx2], { z0.h - z1.h }, { z0.h - z1.h }
+ UDOT ZA.d[W8, 0, VGx2], { Z0.h - Z1.h }, { Z0.h - Z1.h }
+ UDOT ZA.D[W8, 0, VGX2], { Z0.H - Z1.H }, { Z0.H - Z1.H }
+ udot za.d[w11, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.d[w8, 7], { z0.h - z1.h }, { z0.h - z1.h }
+ udot za.d[w8, 0], { z30.h - z31.h }, { z0.h - z1.h }
+ udot za.d[w8, 0], { z0.h - z1.h }, { z30.h - z31.h }
+ udot za.d[w10, 1], { z22.h - z23.h }, { z18.h - z19.h }
+
+ udot za.d[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.d[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
+ UDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, { Z0.h - Z3.h }
+ UDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, { Z0.H - Z3.H }
+ udot za.d[w11, 0], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.d[w8, 7], { z0.h - z3.h }, { z0.h - z3.h }
+ udot za.d[w8, 0], { z28.h - z31.h }, { z0.h - z3.h }
+ udot za.d[w8, 0], { z0.h - z3.h }, { z28.h - z31.h }
+ udot za.d[w11, 3], { z16.h - z19.h }, { z24.h - z27.h }
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 72da86865eb..c631e1cd59b 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2779;
+ return 2825;
}
}
}
@@ -190,7 +190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2571;
+ return 2583;
}
else
{
@@ -198,7 +198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2570;
+ return 2582;
}
}
else
@@ -207,7 +207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2569;
+ return 2581;
}
}
}
@@ -226,7 +226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2578;
+ return 2590;
}
else
{
@@ -234,7 +234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2574;
+ return 2586;
}
}
else
@@ -247,7 +247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2568;
+ return 2580;
}
else
{
@@ -255,7 +255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2567;
+ return 2579;
}
}
else
@@ -268,7 +268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2589;
+ return 2601;
}
else
{
@@ -276,7 +276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2588;
+ return 2600;
}
}
else
@@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2566;
+ return 2578;
}
}
}
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2576;
+ return 2588;
}
else
{
@@ -306,7 +306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2572;
+ return 2584;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2579;
+ return 2591;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2575;
+ return 2587;
}
}
else
@@ -339,7 +339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2577;
+ return 2589;
}
else
{
@@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2573;
+ return 2585;
}
}
}
@@ -374,7 +374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2505;
+ return 2517;
}
else
{
@@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2506;
+ return 2518;
}
}
else
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2529;
+ return 2541;
}
else
{
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2530;
+ return 2542;
}
}
}
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2521;
+ return 2533;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2522;
+ return 2534;
}
}
else
@@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2513;
+ return 2525;
}
else
{
@@ -442,7 +442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2514;
+ return 2526;
}
}
}
@@ -459,7 +459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2537;
+ return 2549;
}
else
{
@@ -467,7 +467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2538;
+ return 2550;
}
}
else
@@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2561;
+ return 2573;
}
else
{
@@ -486,7 +486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2562;
+ return 2574;
}
}
}
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2553;
+ return 2565;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2554;
+ return 2566;
}
}
else
@@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2545;
+ return 2557;
}
else
{
@@ -527,7 +527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2546;
+ return 2558;
}
}
}
@@ -591,7 +591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2501;
+ return 2513;
}
else
{
@@ -599,7 +599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2502;
+ return 2514;
}
}
else
@@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2525;
+ return 2537;
}
else
{
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2526;
+ return 2538;
}
}
}
@@ -632,7 +632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2517;
+ return 2529;
}
else
{
@@ -640,7 +640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2518;
+ return 2530;
}
}
else
@@ -651,7 +651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2509;
+ return 2521;
}
else
{
@@ -659,7 +659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2510;
+ return 2522;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2533;
+ return 2545;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2534;
+ return 2546;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2557;
+ return 2569;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2558;
+ return 2570;
}
}
}
@@ -717,7 +717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2549;
+ return 2561;
}
else
{
@@ -725,7 +725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2550;
+ return 2562;
}
}
else
@@ -736,7 +736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2541;
+ return 2553;
}
else
{
@@ -744,7 +744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2542;
+ return 2554;
}
}
}
@@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2647;
+ return 2671;
}
else
{
@@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2648;
+ return 2672;
}
}
else
@@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2671;
+ return 2695;
}
else
{
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2672;
+ return 2696;
}
}
}
@@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2663;
+ return 2687;
}
else
{
@@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2664;
+ return 2688;
}
}
else
@@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2655;
+ return 2679;
}
else
{
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2656;
+ return 2680;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2679;
+ return 2703;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2680;
+ return 2704;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2703;
+ return 2727;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2704;
+ return 2728;
}
}
}
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2695;
+ return 2719;
}
else
{
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2696;
+ return 2720;
}
}
else
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2687;
+ return 2711;
}
else
{
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2688;
+ return 2712;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2643;
+ return 2667;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2644;
+ return 2668;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2667;
+ return 2691;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2668;
+ return 2692;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2659;
+ return 2683;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2660;
+ return 2684;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2651;
+ return 2675;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2652;
+ return 2676;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2675;
+ return 2699;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2676;
+ return 2700;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2699;
+ return 2723;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2700;
+ return 2724;
}
}
}
@@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2691;
+ return 2715;
}
else
{
@@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2692;
+ return 2716;
}
}
else
@@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2683;
+ return 2707;
}
else
{
@@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2684;
+ return 2708;
}
}
}
@@ -1274,7 +1274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2611;
+ return 2635;
}
else
{
@@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2763;
+ return 2809;
}
}
else
@@ -1295,7 +1295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2612;
+ return 2636;
}
else
{
@@ -1303,7 +1303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2613;
+ return 2637;
}
}
else
@@ -1314,7 +1314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2764;
+ return 2810;
}
else
{
@@ -1322,7 +1322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2765;
+ return 2811;
}
}
}
@@ -1337,7 +1337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2735;
+ return 2775;
}
else
{
@@ -1345,7 +1345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2714;
+ return 2742;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2736;
+ return 2776;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2737;
+ return 2777;
}
}
else
@@ -1377,7 +1377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2715;
+ return 2743;
}
else
{
@@ -1385,7 +1385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2716;
+ return 2744;
}
}
}
@@ -1401,7 +1401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2627;
+ return 2651;
}
else
{
@@ -1411,7 +1411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2628;
+ return 2652;
}
else
{
@@ -1419,7 +1419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2629;
+ return 2653;
}
}
}
@@ -1431,7 +1431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2751;
+ return 2791;
}
else
{
@@ -1441,7 +1441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2752;
+ return 2792;
}
else
{
@@ -1449,7 +1449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2753;
+ return 2793;
}
}
}
@@ -1471,7 +1471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2507;
+ return 2519;
}
else
{
@@ -1479,7 +1479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2531;
+ return 2543;
}
}
else
@@ -1490,7 +1490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2523;
+ return 2535;
}
else
{
@@ -1498,7 +1498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2515;
+ return 2527;
}
}
}
@@ -1512,7 +1512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2539;
+ return 2551;
}
else
{
@@ -1520,7 +1520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2563;
+ return 2575;
}
}
else
@@ -1531,7 +1531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2555;
+ return 2567;
}
else
{
@@ -1539,7 +1539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2547;
+ return 2559;
}
}
}
@@ -1567,7 +1567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2508;
+ return 2520;
}
else
{
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2565;
+ return 2577;
}
}
else
@@ -1584,7 +1584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2532;
+ return 2544;
}
}
else
@@ -1595,7 +1595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2524;
+ return 2536;
}
else
{
@@ -1603,7 +1603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2516;
+ return 2528;
}
}
}
@@ -1617,7 +1617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2540;
+ return 2552;
}
else
{
@@ -1625,7 +1625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2564;
+ return 2576;
}
}
else
@@ -1636,7 +1636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2556;
+ return 2568;
}
else
{
@@ -1644,7 +1644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2548;
+ return 2560;
}
}
}
@@ -1677,7 +1677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2780;
+ return 2828;
}
else
{
@@ -1687,7 +1687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2781;
+ return 2829;
}
else
{
@@ -1695,7 +1695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2782;
+ return 2830;
}
}
}
@@ -1707,7 +1707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2477;
+ return 2489;
}
else
{
@@ -1717,7 +1717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2478;
+ return 2490;
}
else
{
@@ -1725,7 +1725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2479;
+ return 2491;
}
}
}
@@ -1762,7 +1762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2786;
+ return 2836;
}
else
{
@@ -1772,7 +1772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2787;
+ return 2837;
}
else
{
@@ -1780,7 +1780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2788;
+ return 2838;
}
}
}
@@ -1792,7 +1792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2436;
+ return 2442;
}
else
{
@@ -1802,7 +1802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2437;
+ return 2443;
}
else
{
@@ -1810,7 +1810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2438;
+ return 2444;
}
}
}
@@ -1838,7 +1838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2783;
+ return 2831;
}
else
{
@@ -1848,7 +1848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2784;
+ return 2832;
}
else
{
@@ -1856,7 +1856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2785;
+ return 2833;
}
}
}
@@ -1868,7 +1868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2491;
+ return 2503;
}
else
{
@@ -1878,7 +1878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2492;
+ return 2504;
}
else
{
@@ -1886,7 +1886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2493;
+ return 2505;
}
}
}
@@ -1901,7 +1901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2789;
+ return 2839;
}
else
{
@@ -1911,7 +1911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2790;
+ return 2840;
}
else
{
@@ -1919,7 +1919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2791;
+ return 2841;
}
}
}
@@ -1931,7 +1931,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2444;
+ return 2450;
}
else
{
@@ -1941,7 +1941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2445;
+ return 2451;
}
else
{
@@ -1949,7 +1949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2446;
+ return 2452;
}
}
}
@@ -1975,7 +1975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2503;
+ return 2515;
}
else
{
@@ -1983,7 +1983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2527;
+ return 2539;
}
}
else
@@ -1994,7 +1994,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2519;
+ return 2531;
}
else
{
@@ -2002,7 +2002,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2511;
+ return 2523;
}
}
}
@@ -2010,19 +2010,63 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx0xxxxxxxxxx00xxx
- fmla. */
- return 2471;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx0xxxxxx000xxx
+ fmla. */
+ return 2483;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx1xxxxxx000xxx
+ sdot. */
+ return 2605;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx100xxx
+ sdot. */
+ return 2611;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx0xxxxxxxxxx10xxx
- fmls. */
- return 2485;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx0xxxxxx010xxx
+ fmls. */
+ return 2497;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx1xxxxxx010xxx
+ udot. */
+ return 2747;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx110xxx
+ udot. */
+ return 2753;
+ }
}
}
}
@@ -2038,7 +2082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2504;
+ return 2516;
}
else
{
@@ -2046,7 +2090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2528;
+ return 2540;
}
}
else
@@ -2057,7 +2101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2520;
+ return 2532;
}
else
{
@@ -2065,7 +2109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2512;
+ return 2524;
}
}
}
@@ -2073,104 +2117,236 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx1xxxxxxxxxx00xxx
- fmla. */
- return 2472;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx0xxxxxx000xxx
+ fmla. */
+ return 2484;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx1xxxxxx000xxx
+ sdot. */
+ return 2606;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx100xxx
+ sdot. */
+ return 2612;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx1xxxxxxxxxx10xxx
- fmls. */
- return 2486;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx0xxxxxx010xxx
+ fmls. */
+ return 2498;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx1xxxxxx010xxx
+ udot. */
+ return 2748;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx110xxx
+ udot. */
+ return 2754;
+ }
}
}
}
}
else
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx000xxxxxxxxx1xxx
- ldnt1b. */
- return 2535;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx000xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2547;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx010xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2571;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx100xxxxxxxxx1xxx
- ldnt1b. */
- return 2536;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx001xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2563;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx011xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2555;
+ }
}
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx010xxxxxxxxx1xxx
- ldnt1w. */
- return 2559;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx001xxx
+ fdot. */
+ return 2461;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx101xxx
+ usdot. */
+ return 2803;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx110xxxxxxxxx1xxx
- ldnt1w. */
- return 2560;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx011xxx
+ bfdot. */
+ return 2436;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xxxxxxxxx111xxx
+ sudot. */
+ return 2738;
+ }
}
}
}
else
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx001xxxxxxxxx1xxx
- ldnt1h. */
- return 2551;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx100xxxxxxxxx1xxx
+ ldnt1b. */
+ return 2548;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx110xxxxxxxxx1xxx
+ ldnt1w. */
+ return 2572;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx101xxxxxxxxx1xxx
- ldnt1h. */
- return 2552;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx101xxxxxxxxx1xxx
+ ldnt1h. */
+ return 2564;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010100xxxx111xxxxxxxxx1xxx
+ ldnt1d. */
+ return 2556;
+ }
}
}
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 4) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx011xxxxxxxxx1xxx
- ldnt1d. */
- return 2543;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx001xxx
+ fdot. */
+ return 2462;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx101xxx
+ usdot. */
+ return 2804;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001010xxxxx111xxxxxxxxx1xxx
- ldnt1d. */
- return 2544;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx011xxx
+ bfdot. */
+ return 2437;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xxxxxxxxx111xxx
+ sudot. */
+ return 2739;
+ }
}
}
}
@@ -2192,7 +2368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2792;
+ return 2842;
}
else
{
@@ -2200,7 +2376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2793;
+ return 2843;
}
}
else
@@ -2211,7 +2387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2603;
+ return 2627;
}
else
{
@@ -2221,7 +2397,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2604;
+ return 2628;
}
else
{
@@ -2229,38 +2405,60 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2605;
+ return 2629;
}
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx0000011100xxxxxxxxxxxxxxx01xxx
- smlsl. */
- return 2619;
- }
- else
+ if (((word >> 12) & 0x1) == 0)
{
if (((word >> 15) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000011101xxxx0xxxxxxxxxx01xxx
- smlsl. */
- return 2620;
+ xx000001110xxxxx0xx0xxxxxxx01xxx
+ sdot. */
+ return 2826;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx0000011101xxxx1xxxxxxxxxx01xxx
+ xx000001110xxxxx1xx0xxxxxxx01xxx
+ sdot. */
+ return 2827;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2621;
+ return 2643;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx0xx1xxxxxxx01xxx
+ smlsl. */
+ return 2644;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011101xxxx1xx1xxxxxxx01xxx
+ smlsl. */
+ return 2645;
+ }
}
}
}
@@ -2299,7 +2497,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2794;
+ return 2844;
}
else
{
@@ -2307,7 +2505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2795;
+ return 2845;
}
}
else
@@ -2318,7 +2516,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2727;
+ return 2767;
}
else
{
@@ -2328,7 +2526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2728;
+ return 2768;
}
else
{
@@ -2336,7 +2534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2729;
+ return 2769;
}
}
}
@@ -2352,31 +2550,53 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011100xxxxxxxxxxxxxxx11xxx
- umlsl. */
- return 2743;
- }
- else
+ if (((word >> 12) & 0x1) == 0)
{
if (((word >> 15) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011101xxxx0xxxxxxxxxx11xxx
- umlsl. */
- return 2744;
+ xxx00001110xxxxx0xx0xxxxxxx11xxx
+ udot. */
+ return 2834;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011101xxxx1xxxxxxxxxx11xxx
+ xxx00001110xxxxx1xx0xxxxxxx11xxx
+ udot. */
+ return 2835;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2745;
+ return 2783;
+ }
+ else
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011101xxxx0xx1xxxxxxx11xxx
+ umlsl. */
+ return 2784;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000011101xxxx1xx1xxxxxxx11xxx
+ umlsl. */
+ return 2785;
+ }
}
}
}
@@ -2419,44 +2639,88 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 2) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x10xxxx0xxx00xxxxx000xx
- smlall. */
- return 2615;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx000xxxxx000xx
+ smlall. */
+ return 2639;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx000xxxxx000xx
+ smlall. */
+ return 2640;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x11xxxx0xxx00xxxxx000xx
- smlall. */
- return 2616;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx000xxxxx000xx
+ smlall. */
+ return 2641;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx000xxxxx000xx
+ smlall. */
+ return 2642;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx00xxx00xxxxx000xx
- smlall. */
- return 2617;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx000xxxxx001xx
+ usmlall. */
+ return 2813;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx000xxxxx001xx
+ usmlall. */
+ return 2814;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000011x1xxxx10xxx00xxxxx000xx
- smlall. */
- return 2618;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx000xxxxx001xx
+ usmlall. */
+ return 2815;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx000xxxxx001xx
+ usmlall. */
+ return 2816;
+ }
}
}
}
@@ -2468,17 +2732,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x10xxxx0xxx00xxxxx001xx
- usmlall. */
- return 2767;
+ x10000010x10xxxx0xx100xxxxx00xxx
+ fdot. */
+ return 2463;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000010x11xxxx0xxx00xxxxx001xx
- usmlall. */
- return 2768;
+ x10000010x11xxxx0xx100xxxxx00xxx
+ fdot. */
+ return 2464;
}
}
else
@@ -2487,17 +2751,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxx00xxxxx001xx
- usmlall. */
- return 2769;
+ x10000011x1xxxx00xx100xxxxx00xxx
+ fdot. */
+ return 2465;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxx00xxxxx001xx
- usmlall. */
- return 2770;
+ x10000011x1xxxx10xx100xxxxx00xxx
+ fdot. */
+ return 2466;
}
}
}
@@ -2516,7 +2780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2481;
+ return 2493;
}
else
{
@@ -2524,7 +2788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2482;
+ return 2494;
}
}
else
@@ -2535,7 +2799,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2483;
+ return 2495;
}
else
{
@@ -2543,7 +2807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2484;
+ return 2496;
}
}
}
@@ -2557,7 +2821,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2607;
+ return 2631;
}
else
{
@@ -2565,7 +2829,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2608;
+ return 2632;
}
}
else
@@ -2576,7 +2840,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2609;
+ return 2633;
}
else
{
@@ -2584,7 +2848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2610;
+ return 2634;
}
}
}
@@ -2599,7 +2863,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2473;
+ return 2485;
}
else
{
@@ -2607,7 +2871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2474;
+ return 2486;
}
}
else
@@ -2618,7 +2882,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2475;
+ return 2487;
}
else
{
@@ -2626,7 +2890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2476;
+ return 2488;
}
}
}
@@ -2636,21 +2900,65 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 2) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx000xx
- smlall. */
- return 2614;
+ if (((word >> 2) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx000xx
+ smlall. */
+ return 2638;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx001xx
+ usmlall. */
+ return 2812;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx001xx
- usmlall. */
- return 2766;
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx101xxxxx00xxx
+ sdot. */
+ return 2613;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx101xxxxx00xxx
+ sdot. */
+ return 2614;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx101xxxxx00xxx
+ sdot. */
+ return 2615;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx101xxxxx00xxx
+ sdot. */
+ return 2616;
+ }
+ }
}
}
else
@@ -2663,7 +2971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2480;
+ return 2492;
}
else
{
@@ -2671,7 +2979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2606;
+ return 2630;
}
}
else
@@ -2682,7 +2990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2453;
+ return 2459;
}
else
{
@@ -2690,7 +2998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2454;
+ return 2460;
}
}
}
@@ -2702,64 +3010,108 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 2) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 2) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x10xxxx0xxx00xxxxx100xx
- umlall. */
- return 2739;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx000xxxxx100xx
+ umlall. */
+ return 2779;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx000xxxxx100xx
+ umlall. */
+ return 2780;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x10000010x11xxxx0xxx00xxxxx100xx
- umlall. */
- return 2740;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx000xxxxx100xx
+ umlall. */
+ return 2781;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx000xxxxx100xx
+ umlall. */
+ return 2782;
+ }
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx00xxx00xxxxx100xx
- umlall. */
- return 2741;
+ x1000001xx10xxxx0xx000xxxxx101xx
+ sumlall. */
+ return 2745;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x10000011x1xxxx10xxx00xxxxx100xx
- umlall. */
- return 2742;
+ x1000001xx11xxxx0xx000xxxxx101xx
+ sumlall. */
+ return 2746;
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx10xxxx0xxx00xxxxx101xx
- sumlall. */
- return 2717;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx100xxxxx10xxx
+ bfdot. */
+ return 2438;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx100xxxxx10xxx
+ bfdot. */
+ return 2439;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx11xxxx0xxx00xxxxx101xx
- sumlall. */
- return 2718;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx100xxxxx10xxx
+ bfdot. */
+ return 2440;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx100xxxxx10xxx
+ bfdot. */
+ return 2441;
+ }
}
}
}
@@ -2777,7 +3129,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2440;
+ return 2446;
}
else
{
@@ -2785,7 +3137,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2441;
+ return 2447;
}
}
else
@@ -2796,7 +3148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2442;
+ return 2448;
}
else
{
@@ -2804,7 +3156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2443;
+ return 2449;
}
}
}
@@ -2818,7 +3170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2731;
+ return 2771;
}
else
{
@@ -2826,7 +3178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2732;
+ return 2772;
}
}
else
@@ -2837,7 +3189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2733;
+ return 2773;
}
else
{
@@ -2845,7 +3197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2734;
+ return 2774;
}
}
}
@@ -2897,11 +3249,55 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx10xxx
- umlall. */
- return 2738;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx10xxx
+ umlall. */
+ return 2778;
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x10xxxx0xx101xxxxx10xxx
+ udot. */
+ return 2755;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010x11xxxx0xx101xxxxx10xxx
+ udot. */
+ return 2756;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx00xx101xxxxx10xxx
+ udot. */
+ return 2757;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000011x1xxxx10xx101xxxxx10xxx
+ udot. */
+ return 2758;
+ }
+ }
+ }
}
else
{
@@ -2913,7 +3309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2439;
+ return 2445;
}
else
{
@@ -2921,7 +3317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2730;
+ return 2770;
}
}
else
@@ -2963,7 +3359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2631;
+ return 2655;
}
else
{
@@ -2971,7 +3367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2632;
+ return 2656;
}
}
else
@@ -2982,7 +3378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2633;
+ return 2657;
}
else
{
@@ -2990,7 +3386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2634;
+ return 2658;
}
}
}
@@ -3008,7 +3404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2495;
+ return 2507;
}
else
{
@@ -3016,7 +3412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2496;
+ return 2508;
}
}
else
@@ -3027,7 +3423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2497;
+ return 2509;
}
else
{
@@ -3035,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2498;
+ return 2510;
}
}
}
@@ -3049,7 +3445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2623;
+ return 2647;
}
else
{
@@ -3057,7 +3453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2624;
+ return 2648;
}
}
else
@@ -3068,7 +3464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2625;
+ return 2649;
}
else
{
@@ -3076,7 +3472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2626;
+ return 2650;
}
}
}
@@ -3091,7 +3487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2487;
+ return 2499;
}
else
{
@@ -3099,7 +3495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2488;
+ return 2500;
}
}
else
@@ -3110,7 +3506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2489;
+ return 2501;
}
else
{
@@ -3118,7 +3514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2490;
+ return 2502;
}
}
}
@@ -3128,11 +3524,99 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx01xxx
- smlsll. */
- return 2630;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx01xxx
+ smlsll. */
+ return 2654;
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010010xxxx0xx101xxxxx01xxx
+ usdot. */
+ return 2805;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010011xxxx0xx101xxxxx01xxx
+ usdot. */
+ return 2806;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx00xx101xxxxx01xxx
+ usdot. */
+ return 2807;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001101xxxx10xx101xxxxx01xxx
+ usdot. */
+ return 2808;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx101xxxxx01xxx
+ sdot. */
+ return 2607;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx101xxxxx01xxx
+ sdot. */
+ return 2608;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx101xxxxx01xxx
+ sdot. */
+ return 2609;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx101xxxxx01xxx
+ sdot. */
+ return 2610;
+ }
+ }
+ }
+ }
}
else
{
@@ -3144,7 +3628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2494;
+ return 2506;
}
else
{
@@ -3152,7 +3636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2622;
+ return 2646;
}
}
else
@@ -3163,7 +3647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2499;
+ return 2511;
}
else
{
@@ -3171,7 +3655,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2500;
+ return 2512;
}
}
}
@@ -3191,7 +3675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2755;
+ return 2795;
}
else
{
@@ -3199,7 +3683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2756;
+ return 2796;
}
}
else
@@ -3210,7 +3694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2757;
+ return 2797;
}
else
{
@@ -3218,7 +3702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2758;
+ return 2798;
}
}
}
@@ -3236,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2448;
+ return 2454;
}
else
{
@@ -3244,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2449;
+ return 2455;
}
}
else
@@ -3255,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2450;
+ return 2456;
}
else
{
@@ -3263,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2451;
+ return 2457;
}
}
}
@@ -3277,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2747;
+ return 2787;
}
else
{
@@ -3285,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2748;
+ return 2788;
}
}
else
@@ -3296,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2749;
+ return 2789;
}
else
{
@@ -3304,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2750;
+ return 2790;
}
}
}
@@ -3319,7 +3803,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2710;
+ return 2734;
}
else
{
@@ -3327,7 +3811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2711;
+ return 2735;
}
}
else
@@ -3338,7 +3822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2712;
+ return 2736;
}
else
{
@@ -3346,7 +3830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2713;
+ return 2737;
}
}
}
@@ -3356,11 +3840,77 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx0xxx01xxxxx11xxx
- umlsll. */
- return 2754;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx0xx001xxxxx11xxx
+ umlsll. */
+ return 2794;
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x010xxxx0xx101xxxxx11xxx
+ sudot. */
+ return 2740;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x011xxxx0xx101xxxxx11xxx
+ sudot. */
+ return 2741;
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010110xxxx0xx101xxxxx11xxx
+ udot. */
+ return 2749;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10000010111xxxx0xx101xxxxx11xxx
+ udot. */
+ return 2750;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx00xx101xxxxx11xxx
+ udot. */
+ return 2751;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001111xxxx10xx101xxxxx11xxx
+ udot. */
+ return 2752;
+ }
+ }
+ }
+ }
}
else
{
@@ -3372,7 +3922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2447;
+ return 2453;
}
else
{
@@ -3380,7 +3930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2746;
+ return 2786;
}
}
else
@@ -3391,7 +3941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2708;
+ return 2732;
}
else
{
@@ -3399,7 +3949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2709;
+ return 2733;
}
}
}
@@ -3421,7 +3971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx01x0xxxxxxx0xxxx0
sel. */
- return 2593;
+ return 2617;
}
else
{
@@ -3429,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx11x0xxxxxxx0xxxx0
sel. */
- return 2594;
+ return 2618;
}
}
else
@@ -3446,7 +3996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1000x0xx0xxxx0
smax. */
- return 2595;
+ return 2619;
}
else
{
@@ -3454,7 +4004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2597;
+ return 2621;
}
}
else
@@ -3465,7 +4015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2596;
+ return 2620;
}
else
{
@@ -3473,7 +4023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2598;
+ return 2622;
}
}
}
@@ -3487,7 +4037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2635;
+ return 2659;
}
else
{
@@ -3495,7 +4045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2637;
+ return 2661;
}
}
else
@@ -3506,7 +4056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2636;
+ return 2660;
}
else
{
@@ -3514,7 +4064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2638;
+ return 2662;
}
}
}
@@ -3531,7 +4081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x100x01xx0xxxx0
fmax. */
- return 2455;
+ return 2467;
}
else
{
@@ -3539,7 +4089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x01xx0xxxx0
fmax. */
- return 2457;
+ return 2469;
}
}
else
@@ -3550,7 +4100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x01xx0xxxx0
fmax. */
- return 2456;
+ return 2468;
}
else
{
@@ -3558,7 +4108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x01xx0xxxx0
fmax. */
- return 2458;
+ return 2470;
}
}
}
@@ -3598,7 +4148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx0
smin. */
- return 2599;
+ return 2623;
}
else
{
@@ -3606,7 +4156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx0
smin. */
- return 2601;
+ return 2625;
}
}
else
@@ -3617,7 +4167,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx0
smin. */
- return 2600;
+ return 2624;
}
else
{
@@ -3625,7 +4175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx0
smin. */
- return 2602;
+ return 2626;
}
}
}
@@ -3639,7 +4189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2639;
+ return 2663;
}
else
{
@@ -3647,7 +4197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2641;
+ return 2665;
}
}
else
@@ -3658,7 +4208,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2640;
+ return 2664;
}
else
{
@@ -3666,7 +4216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2642;
+ return 2666;
}
}
}
@@ -3681,7 +4231,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx0
fmaxnm. */
- return 2459;
+ return 2471;
}
else
{
@@ -3689,7 +4239,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx0
fmaxnm. */
- return 2461;
+ return 2473;
}
}
else
@@ -3700,7 +4250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx0
fmaxnm. */
- return 2460;
+ return 2472;
}
else
{
@@ -3708,7 +4258,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx0
fmaxnm. */
- return 2462;
+ return 2474;
}
}
}
@@ -3728,7 +4278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2719;
+ return 2759;
}
else
{
@@ -3736,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2721;
+ return 2761;
}
}
else
@@ -3747,7 +4297,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2720;
+ return 2760;
}
else
{
@@ -3755,7 +4305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2722;
+ return 2762;
}
}
}
@@ -3769,7 +4319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx0xxxx1
fmin. */
- return 2463;
+ return 2475;
}
else
{
@@ -3777,7 +4327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx0xxxx1
fmin. */
- return 2465;
+ return 2477;
}
}
else
@@ -3788,7 +4338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx0xxxx1
fmin. */
- return 2464;
+ return 2476;
}
else
{
@@ -3796,7 +4346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx0xxxx1
fmin. */
- return 2466;
+ return 2478;
}
}
}
@@ -3815,7 +4365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2723;
+ return 2763;
}
else
{
@@ -3823,7 +4373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2725;
+ return 2765;
}
}
else
@@ -3834,7 +4384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2724;
+ return 2764;
}
else
{
@@ -3842,7 +4392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2726;
+ return 2766;
}
}
}
@@ -3856,7 +4406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2759;
+ return 2799;
}
else
{
@@ -3864,7 +4414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2761;
+ return 2801;
}
}
else
@@ -3875,7 +4425,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2760;
+ return 2800;
}
else
{
@@ -3883,7 +4433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2762;
+ return 2802;
}
}
}
@@ -3898,7 +4448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx1
fminnm. */
- return 2467;
+ return 2479;
}
else
{
@@ -3906,7 +4456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx1
fminnm. */
- return 2469;
+ return 2481;
}
}
else
@@ -3917,7 +4467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx1
fminnm. */
- return 2468;
+ return 2480;
}
else
{
@@ -3925,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx1
fminnm. */
- return 2470;
+ return 2482;
}
}
}
@@ -3954,7 +4504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2649;
+ return 2673;
}
else
{
@@ -3962,7 +4512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2673;
+ return 2697;
}
}
else
@@ -3973,7 +4523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2665;
+ return 2689;
}
else
{
@@ -3981,7 +4531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2657;
+ return 2681;
}
}
}
@@ -3995,7 +4545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2681;
+ return 2705;
}
else
{
@@ -4003,7 +4553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2705;
+ return 2729;
}
}
else
@@ -4014,7 +4564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2697;
+ return 2721;
}
else
{
@@ -4022,7 +4572,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2689;
+ return 2713;
}
}
}
@@ -4050,7 +4600,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2650;
+ return 2674;
}
else
{
@@ -4058,7 +4608,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2707;
+ return 2731;
}
}
else
@@ -4067,7 +4617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2674;
+ return 2698;
}
}
else
@@ -4078,7 +4628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2666;
+ return 2690;
}
else
{
@@ -4086,7 +4636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2658;
+ return 2682;
}
}
}
@@ -4100,7 +4650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2682;
+ return 2706;
}
else
{
@@ -4108,7 +4658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2706;
+ return 2730;
}
}
else
@@ -4119,7 +4669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2698;
+ return 2722;
}
else
{
@@ -4127,7 +4677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2690;
+ return 2714;
}
}
}
@@ -4169,7 +4719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2645;
+ return 2669;
}
else
{
@@ -4177,7 +4727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2646;
+ return 2670;
}
}
else
@@ -4188,7 +4738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2669;
+ return 2693;
}
else
{
@@ -4196,7 +4746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2670;
+ return 2694;
}
}
}
@@ -4210,7 +4760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2661;
+ return 2685;
}
else
{
@@ -4218,7 +4768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2662;
+ return 2686;
}
}
else
@@ -4229,7 +4779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2653;
+ return 2677;
}
else
{
@@ -4237,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2654;
+ return 2678;
}
}
}
@@ -4254,7 +4804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2677;
+ return 2701;
}
else
{
@@ -4262,7 +4812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2678;
+ return 2702;
}
}
else
@@ -4273,7 +4823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2701;
+ return 2725;
}
else
{
@@ -4281,7 +4831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2702;
+ return 2726;
}
}
}
@@ -4295,7 +4845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2693;
+ return 2717;
}
else
{
@@ -4303,7 +4853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2694;
+ return 2718;
}
}
else
@@ -4314,7 +4864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2685;
+ return 2709;
}
else
{
@@ -4322,7 +4872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2686;
+ return 2710;
}
}
}
@@ -6724,7 +7274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2836;
+ return 2886;
}
else
{
@@ -6732,7 +7282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2844;
+ return 2894;
}
}
else
@@ -6743,7 +7293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2840;
+ return 2890;
}
else
{
@@ -6751,7 +7301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2847;
+ return 2897;
}
}
}
@@ -6789,7 +7339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2896;
+ return 2946;
}
else
{
@@ -6797,7 +7347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2902;
+ return 2952;
}
}
else
@@ -6808,7 +7358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2899;
+ return 2949;
}
else
{
@@ -6816,7 +7366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2905;
+ return 2955;
}
}
}
@@ -6830,7 +7380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2920;
+ return 2970;
}
else
{
@@ -6838,7 +7388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2926;
+ return 2976;
}
}
else
@@ -6849,7 +7399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2923;
+ return 2973;
}
else
{
@@ -6857,7 +7407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2929;
+ return 2979;
}
}
}
@@ -6874,7 +7424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2908;
+ return 2958;
}
else
{
@@ -6882,7 +7432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2914;
+ return 2964;
}
}
else
@@ -6893,7 +7443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2911;
+ return 2961;
}
else
{
@@ -6901,7 +7451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2917;
+ return 2967;
}
}
}
@@ -6915,7 +7465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2932;
+ return 2982;
}
else
{
@@ -6923,7 +7473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2938;
+ return 2988;
}
}
else
@@ -6934,7 +7484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2935;
+ return 2985;
}
else
{
@@ -6942,7 +7492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2941;
+ return 2991;
}
}
}
@@ -7007,7 +7557,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2837;
+ return 2887;
}
else
{
@@ -7015,7 +7565,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2845;
+ return 2895;
}
}
else
@@ -7026,7 +7576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2841;
+ return 2891;
}
else
{
@@ -7034,7 +7584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2848;
+ return 2898;
}
}
}
@@ -7072,7 +7622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2897;
+ return 2947;
}
else
{
@@ -7080,7 +7630,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2903;
+ return 2953;
}
}
else
@@ -7091,7 +7641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2900;
+ return 2950;
}
else
{
@@ -7099,7 +7649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2906;
+ return 2956;
}
}
}
@@ -7113,7 +7663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2921;
+ return 2971;
}
else
{
@@ -7121,7 +7671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2927;
+ return 2977;
}
}
else
@@ -7132,7 +7682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2924;
+ return 2974;
}
else
{
@@ -7140,7 +7690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2930;
+ return 2980;
}
}
}
@@ -7157,7 +7707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2909;
+ return 2959;
}
else
{
@@ -7165,7 +7715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2915;
+ return 2965;
}
}
else
@@ -7176,7 +7726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2912;
+ return 2962;
}
else
{
@@ -7184,7 +7734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2918;
+ return 2968;
}
}
}
@@ -7198,7 +7748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2933;
+ return 2983;
}
else
{
@@ -7206,7 +7756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2939;
+ return 2989;
}
}
else
@@ -7217,7 +7767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2936;
+ return 2986;
}
else
{
@@ -7225,7 +7775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2942;
+ return 2992;
}
}
}
@@ -7293,7 +7843,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2839;
+ return 2889;
}
else
{
@@ -7301,7 +7851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2846;
+ return 2896;
}
}
else
@@ -7310,7 +7860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2843;
+ return 2893;
}
}
else
@@ -7321,7 +7871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2838;
+ return 2888;
}
else
{
@@ -7329,7 +7879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2842;
+ return 2892;
}
}
}
@@ -7391,7 +7941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2898;
+ return 2948;
}
else
{
@@ -7399,7 +7949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 2992;
+ return 3042;
}
}
else
@@ -7410,7 +7960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2904;
+ return 2954;
}
else
{
@@ -7418,7 +7968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 2994;
+ return 3044;
}
}
}
@@ -7432,7 +7982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2901;
+ return 2951;
}
else
{
@@ -7440,7 +7990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 2993;
+ return 3043;
}
}
else
@@ -7449,7 +7999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2907;
+ return 2957;
}
}
}
@@ -7465,7 +8015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2922;
+ return 2972;
}
else
{
@@ -7473,7 +8023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 2998;
+ return 3048;
}
}
else
@@ -7484,7 +8034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2928;
+ return 2978;
}
else
{
@@ -7492,7 +8042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3000;
+ return 3050;
}
}
}
@@ -7506,7 +8056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2925;
+ return 2975;
}
else
{
@@ -7514,7 +8064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 2999;
+ return 3049;
}
}
else
@@ -7523,7 +8073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2931;
+ return 2981;
}
}
}
@@ -7542,7 +8092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2910;
+ return 2960;
}
else
{
@@ -7550,7 +8100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 2995;
+ return 3045;
}
}
else
@@ -7561,7 +8111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2916;
+ return 2966;
}
else
{
@@ -7569,7 +8119,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 2997;
+ return 3047;
}
}
}
@@ -7583,7 +8133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2913;
+ return 2963;
}
else
{
@@ -7591,7 +8141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 2996;
+ return 3046;
}
}
else
@@ -7600,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2919;
+ return 2969;
}
}
}
@@ -7616,7 +8166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2934;
+ return 2984;
}
else
{
@@ -7624,7 +8174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3001;
+ return 3051;
}
}
else
@@ -7635,7 +8185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2940;
+ return 2990;
}
else
{
@@ -7643,7 +8193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3003;
+ return 3053;
}
}
}
@@ -7657,7 +8207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2937;
+ return 2987;
}
else
{
@@ -7665,7 +8215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3002;
+ return 3052;
}
}
else
@@ -7674,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2943;
+ return 2993;
}
}
}
@@ -8047,7 +8597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3021;
+ return 3071;
}
else
{
@@ -8065,7 +8615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3024;
+ return 3074;
}
}
}
@@ -8145,7 +8695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2834;
+ return 2884;
}
else
{
@@ -8153,7 +8703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2835;
+ return 2885;
}
}
else
@@ -8260,7 +8810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3026;
+ return 3076;
}
}
}
@@ -8276,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3023;
+ return 3073;
}
else
{
@@ -8321,7 +8871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2833;
+ return 2883;
}
else
{
@@ -8415,7 +8965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3025;
+ return 3075;
}
}
}
@@ -8545,7 +9095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3027;
+ return 3077;
}
}
}
@@ -8561,7 +9111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3022;
+ return 3072;
}
else
{
@@ -9403,7 +9953,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2853;
+ return 2903;
}
}
}
@@ -9477,7 +10027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2854;
+ return 2904;
}
}
}
@@ -12151,7 +12701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2852;
+ return 2902;
}
}
}
@@ -13855,7 +14405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2881;
+ return 2931;
}
}
else
@@ -14098,7 +14648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2857;
+ return 2907;
}
else
{
@@ -14106,7 +14656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2858;
+ return 2908;
}
}
else
@@ -14338,7 +14888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2878;
+ return 2928;
}
else
{
@@ -14359,7 +14909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2885;
+ return 2935;
}
else
{
@@ -14367,7 +14917,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2884;
+ return 2934;
}
}
else
@@ -14422,7 +14972,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2877;
+ return 2927;
}
else
{
@@ -14434,7 +14984,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2883;
+ return 2933;
}
else
{
@@ -14442,7 +14992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2882;
+ return 2932;
}
}
else
@@ -14493,7 +15043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2861;
+ return 2911;
}
else
{
@@ -14501,7 +15051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2862;
+ return 2912;
}
}
else
@@ -14860,7 +15410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2855;
+ return 2905;
}
else
{
@@ -14893,7 +15443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2879;
+ return 2929;
}
else
{
@@ -14923,7 +15473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2856;
+ return 2906;
}
else
{
@@ -15052,7 +15602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2865;
+ return 2915;
}
else
{
@@ -15062,7 +15612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2867;
+ return 2917;
}
else
{
@@ -15070,7 +15620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2869;
+ return 2919;
}
}
}
@@ -15082,7 +15632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2866;
+ return 2916;
}
else
{
@@ -15092,7 +15642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2868;
+ return 2918;
}
else
{
@@ -15100,7 +15650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2870;
+ return 2920;
}
}
}
@@ -16159,7 +16709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2849;
+ return 2899;
}
else
{
@@ -16167,7 +16717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2851;
+ return 2901;
}
}
else
@@ -16176,7 +16726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2850;
+ return 2900;
}
}
}
@@ -17672,7 +18222,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2859;
+ return 2909;
}
else
{
@@ -17680,7 +18230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2860;
+ return 2910;
}
}
}
@@ -18054,7 +18604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2863;
+ return 2913;
}
else
{
@@ -18062,7 +18612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2864;
+ return 2914;
}
}
}
@@ -18423,7 +18973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2771;
+ return 2817;
}
else
{
@@ -18431,7 +18981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2772;
+ return 2818;
}
}
else
@@ -18461,7 +19011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2590;
+ return 2602;
}
}
}
@@ -18475,7 +19025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2774;
+ return 2820;
}
else
{
@@ -18483,7 +19033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2773;
+ return 2819;
}
}
else
@@ -18513,7 +19063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2592;
+ return 2604;
}
}
}
@@ -18530,7 +19080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2778;
+ return 2824;
}
else
{
@@ -18538,7 +19088,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2775;
+ return 2821;
}
}
else
@@ -18568,7 +19118,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2591;
+ return 2603;
}
}
}
@@ -18582,7 +19132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2776;
+ return 2822;
}
else
{
@@ -18590,7 +19140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2777;
+ return 2823;
}
}
else
@@ -19716,7 +20266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2880;
+ return 2930;
}
}
else
@@ -20375,7 +20925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2452;
+ return 2458;
}
}
else
@@ -21077,7 +21627,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3016;
+ return 3066;
}
else
{
@@ -21657,7 +22207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2944;
+ return 2994;
}
else
{
@@ -21665,7 +22215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2946;
+ return 2996;
}
}
else
@@ -21676,7 +22226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 2950;
+ return 3000;
}
else
{
@@ -21684,7 +22234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 2952;
+ return 3002;
}
}
}
@@ -21698,7 +22248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2947;
+ return 2997;
}
else
{
@@ -21706,7 +22256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2949;
+ return 2999;
}
}
else
@@ -21717,7 +22267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 2953;
+ return 3003;
}
else
{
@@ -21725,7 +22275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 2955;
+ return 3005;
}
}
}
@@ -21742,7 +22292,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 2968;
+ return 3018;
}
else
{
@@ -21750,7 +22300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 2970;
+ return 3020;
}
}
else
@@ -21761,7 +22311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 2974;
+ return 3024;
}
else
{
@@ -21769,7 +22319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 2976;
+ return 3026;
}
}
}
@@ -21783,7 +22333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 2971;
+ return 3021;
}
else
{
@@ -21791,7 +22341,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 2973;
+ return 3023;
}
}
else
@@ -21802,7 +22352,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 2977;
+ return 3027;
}
else
{
@@ -21810,7 +22360,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 2979;
+ return 3029;
}
}
}
@@ -21830,7 +22380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 2956;
+ return 3006;
}
else
{
@@ -21838,7 +22388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 2958;
+ return 3008;
}
}
else
@@ -21849,7 +22399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 2962;
+ return 3012;
}
else
{
@@ -21857,7 +22407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 2964;
+ return 3014;
}
}
}
@@ -21871,7 +22421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 2959;
+ return 3009;
}
else
{
@@ -21879,7 +22429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 2961;
+ return 3011;
}
}
else
@@ -21890,7 +22440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 2965;
+ return 3015;
}
else
{
@@ -21898,7 +22448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 2967;
+ return 3017;
}
}
}
@@ -21915,7 +22465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 2980;
+ return 3030;
}
else
{
@@ -21923,7 +22473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 2982;
+ return 3032;
}
}
else
@@ -21934,7 +22484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 2986;
+ return 3036;
}
else
{
@@ -21942,7 +22492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 2988;
+ return 3038;
}
}
}
@@ -21956,7 +22506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 2983;
+ return 3033;
}
else
{
@@ -21964,7 +22514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 2985;
+ return 3035;
}
}
else
@@ -21975,7 +22525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 2989;
+ return 3039;
}
else
{
@@ -21983,7 +22533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 2991;
+ return 3041;
}
}
}
@@ -22017,7 +22567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2945;
+ return 2995;
}
else
{
@@ -22025,7 +22575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3004;
+ return 3054;
}
}
else
@@ -22036,7 +22586,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 2951;
+ return 3001;
}
else
{
@@ -22044,7 +22594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3006;
+ return 3056;
}
}
}
@@ -22058,7 +22608,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2948;
+ return 2998;
}
else
{
@@ -22066,7 +22616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3005;
+ return 3055;
}
}
else
@@ -22075,7 +22625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 2954;
+ return 3004;
}
}
}
@@ -22091,7 +22641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 2969;
+ return 3019;
}
else
{
@@ -22099,7 +22649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3010;
+ return 3060;
}
}
else
@@ -22110,7 +22660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 2975;
+ return 3025;
}
else
{
@@ -22118,7 +22668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3012;
+ return 3062;
}
}
}
@@ -22132,7 +22682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 2972;
+ return 3022;
}
else
{
@@ -22140,7 +22690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3011;
+ return 3061;
}
}
else
@@ -22149,7 +22699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 2978;
+ return 3028;
}
}
}
@@ -22168,7 +22718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 2957;
+ return 3007;
}
else
{
@@ -22176,7 +22726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3007;
+ return 3057;
}
}
else
@@ -22187,7 +22737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 2963;
+ return 3013;
}
else
{
@@ -22195,7 +22745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3009;
+ return 3059;
}
}
}
@@ -22209,7 +22759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 2960;
+ return 3010;
}
else
{
@@ -22217,7 +22767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3008;
+ return 3058;
}
}
else
@@ -22226,7 +22776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 2966;
+ return 3016;
}
}
}
@@ -22242,7 +22792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 2981;
+ return 3031;
}
else
{
@@ -22250,7 +22800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3013;
+ return 3063;
}
}
else
@@ -22261,7 +22811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 2987;
+ return 3037;
}
else
{
@@ -22269,7 +22819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3015;
+ return 3065;
}
}
}
@@ -22283,7 +22833,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 2984;
+ return 3034;
}
else
{
@@ -22291,7 +22841,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3014;
+ return 3064;
}
}
else
@@ -22300,7 +22850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 2990;
+ return 3040;
}
}
}
@@ -22467,7 +23017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2871;
+ return 2921;
}
}
}
@@ -22500,7 +23050,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2797;
+ return 2847;
}
}
else
@@ -22574,7 +23124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2873;
+ return 2923;
}
}
}
@@ -22607,7 +23157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2874;
+ return 2924;
}
}
else
@@ -22654,7 +23204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2804;
+ return 2854;
}
else
{
@@ -22662,7 +23212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2806;
+ return 2856;
}
}
else
@@ -22673,7 +23223,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2808;
+ return 2858;
}
else
{
@@ -22687,7 +23237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2809;
+ return 2859;
}
else
{
@@ -22695,7 +23245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2802;
+ return 2852;
}
}
else
@@ -22704,7 +23254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2811;
+ return 2861;
}
}
else
@@ -22717,7 +23267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2810;
+ return 2860;
}
else
{
@@ -22725,7 +23275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2815;
+ return 2865;
}
}
else
@@ -22734,7 +23284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2812;
+ return 2862;
}
}
}
@@ -22915,7 +23465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2796;
+ return 2846;
}
}
else
@@ -22946,7 +23496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2872;
+ return 2922;
}
else
{
@@ -22965,7 +23515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2888;
+ return 2938;
}
else
{
@@ -22975,7 +23525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2886;
+ return 2936;
}
else
{
@@ -22985,7 +23535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2893;
+ return 2943;
}
else
{
@@ -22993,7 +23543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2892;
+ return 2942;
}
}
}
@@ -23577,7 +24127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2889;
+ return 2939;
}
else
{
@@ -23585,7 +24135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2890;
+ return 2940;
}
}
}
@@ -23903,7 +24453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2807;
+ return 2857;
}
}
else
@@ -24514,7 +25064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2800;
+ return 2850;
}
}
}
@@ -24566,7 +25116,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2813;
+ return 2863;
}
}
}
@@ -24809,7 +25359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2803;
+ return 2853;
}
}
else
@@ -24885,7 +25435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2816;
+ return 2866;
}
}
else
@@ -25711,7 +26261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2801;
+ return 2851;
}
}
else
@@ -25743,7 +26293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2814;
+ return 2864;
}
}
else
@@ -25983,7 +26533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2805;
+ return 2855;
}
}
else
@@ -26015,7 +26565,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2819;
+ return 2869;
}
else
{
@@ -26023,7 +26573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2823;
+ return 2873;
}
}
}
@@ -26045,7 +26595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2820;
+ return 2870;
}
else
{
@@ -26053,7 +26603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2824;
+ return 2874;
}
}
}
@@ -26092,7 +26642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2817;
+ return 2867;
}
else
{
@@ -26100,7 +26650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2821;
+ return 2871;
}
}
else
@@ -26122,7 +26672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2818;
+ return 2868;
}
else
{
@@ -26130,7 +26680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2822;
+ return 2872;
}
}
else
@@ -27938,7 +28488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2825;
+ return 2875;
}
else
{
@@ -27946,7 +28496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2829;
+ return 2879;
}
}
else
@@ -27968,7 +28518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2826;
+ return 2876;
}
else
{
@@ -27976,7 +28526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2830;
+ return 2880;
}
}
else
@@ -28482,7 +29032,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2827;
+ return 2877;
}
else
{
@@ -28490,7 +29040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2831;
+ return 2881;
}
}
}
@@ -28512,7 +29062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2828;
+ return 2878;
}
else
{
@@ -28520,7 +29070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2832;
+ return 2882;
}
}
}
@@ -28576,7 +29126,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2799;
+ return 2849;
}
else
{
@@ -28584,7 +29134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2798;
+ return 2848;
}
}
}
@@ -28687,7 +29237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2876;
+ return 2926;
}
else
{
@@ -28695,7 +29245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2875;
+ return 2925;
}
}
else
@@ -28706,7 +29256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2887;
+ return 2937;
}
else
{
@@ -28716,7 +29266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2895;
+ return 2945;
}
else
{
@@ -28724,7 +29274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2894;
+ return 2944;
}
}
}
@@ -29215,22 +29765,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2578: value = 2586; break; /* mov --> mova. */
- case 2586: return NULL; /* mova --> NULL. */
- case 2574: value = 2582; break; /* mov --> mova. */
- case 2582: return NULL; /* mova --> NULL. */
- case 2576: value = 2584; break; /* mov --> mova. */
- case 2584: return NULL; /* mova --> NULL. */
- case 2572: value = 2580; break; /* mov --> mova. */
- case 2580: return NULL; /* mova --> NULL. */
- case 2579: value = 2587; break; /* mov --> mova. */
- case 2587: return NULL; /* mova --> NULL. */
- case 2575: value = 2583; break; /* mov --> mova. */
- case 2583: return NULL; /* mova --> NULL. */
- case 2577: value = 2585; break; /* mov --> mova. */
- case 2585: return NULL; /* mova --> NULL. */
- case 2573: value = 2581; break; /* mov --> mova. */
- case 2581: return NULL; /* mova --> NULL. */
+ case 2590: value = 2598; break; /* mov --> mova. */
+ case 2598: return NULL; /* mova --> NULL. */
+ case 2586: value = 2594; break; /* mov --> mova. */
+ case 2594: return NULL; /* mova --> NULL. */
+ case 2588: value = 2596; break; /* mov --> mova. */
+ case 2596: return NULL; /* mova --> NULL. */
+ case 2584: value = 2592; break; /* mov --> mova. */
+ case 2592: return NULL; /* mova --> NULL. */
+ case 2591: value = 2599; break; /* mov --> mova. */
+ case 2599: return NULL; /* mova --> NULL. */
+ case 2587: value = 2595; break; /* mov --> mova. */
+ case 2595: return NULL; /* mova --> NULL. */
+ case 2589: value = 2597; break; /* mov --> mova. */
+ case 2597: return NULL; /* mova --> NULL. */
+ case 2585: value = 2593; break; /* mov --> mova. */
+ case 2593: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -29252,11 +29802,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3017; break; /* addg --> smax. */
- case 3017: value = 3018; break; /* smax --> umax. */
- case 3018: value = 3019; break; /* umax --> smin. */
- case 3019: value = 3020; break; /* smin --> umin. */
- case 3020: return NULL; /* umin --> NULL. */
+ case 19: value = 3067; break; /* addg --> smax. */
+ case 3067: value = 3068; break; /* smax --> umax. */
+ case 3068: value = 3069; break; /* umax --> smin. */
+ case 3069: value = 3070; break; /* smin --> umin. */
+ case 3070: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -29414,8 +29964,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2891; break; /* fcvt --> bfcvt. */
- case 2891: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2941; break; /* fcvt --> bfcvt. */
+ case 2941: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 75d36640da4..2012615e519 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5349,6 +5349,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("add", 0xc1a11810, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("add", 0xc120a300, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("add", 0xc120ab00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("bfdot", 0xc1501018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfdot", 0xc1509018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfdot", 0xc1201010, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfdot", 0xc1301010, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfdot", 0xc1a01010, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bfdot", 0xc1a11010, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("bfmlal", 0xc1801010, 0xfff01018, sme_misc, 0, OP3 (SME_ZA_array_off3x2, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_SHH, 0, 0),
SME2_INSN ("bfmlal", 0xc1901010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("bfmlal", 0xc1909010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zm_INDEX3_2), OP_SVE_SHH, F_OD (4), 0),
@@ -5368,6 +5374,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fdot", 0xc1501008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fdot", 0xc1509008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fdot", 0xc1201000, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fdot", 0xc1301000, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("fdot", 0xc1a01000, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("fdot", 0xc1a11000, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fmax", 0xc120a100, 0xff30ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
SME2_INSN ("fmax", 0xc120a900, 0xff30ffe3, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_HSD, 0, 1),
SME2_INSN ("fmax", 0xc120b100, 0xff21ffe1, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_HSD, 0, 1),
@@ -5506,6 +5518,18 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("pext", 0x25207010, 0xff3ffc10, sme_size_22, 0, OP2 (SVE_Pd, SME_PNn3_INDEX2), OP_SVE_VU_BHSD, 0, 0),
SME2_INSN ("pext", 0x25207410, 0xff3ffe10, sme_size_22, 0, OP2 (SME_PdxN, SME_PNn3_INDEX1), OP_SVE_VU_BHSD, F_OD (2), 0),
SME2_INSN ("ptrue", 0x25207810, 0xff3ffff8, sme_size_22, 0, OP1 (SME_PNd3), OP_SVE_V_BHSD, 0, 0),
+ SME2_INSN ("sdot", 0xc1501000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1509000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1601408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1701408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1e01408, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1e11408, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1501020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1509020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1201400, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1301400, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("sdot", 0xc1a01400, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("sdot", 0xc1a11400, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("sel", 0xc1208000, 0xff21e021, sme_size_22, 0, OP4 (SME_Zdnx2, SME_PNg3, SME_Znx2, SME_Zmx2), OP_SVE_VUVV_BHSD, 0, 0),
SME2_INSN ("sel", 0xc1218000, 0xff23e063, sme_size_22, 0, OP4 (SME_Zdnx4, SME_PNg3, SME_Znx4, SME_Zmx4), OP_SVE_VUVV_BHSD, 0, 0),
SME2_INSN ("smax", 0xc120a000, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
@@ -5627,11 +5651,27 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("sub", 0xc1301818, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("sub", 0xc1a01818, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("sub", 0xc1a11818, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("sudot", 0xc1501038, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sudot", 0xc1509038, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("sudot", 0xc1201418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("sudot", 0xc1301418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("sumlall", 0xc1000014, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
SME2_INSN ("sumlall", 0xc1100030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("sumlall", 0xc1108030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("sumlall", 0xc1200014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("sumlall", 0xc1300014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1501010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1509010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1601418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1701418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1e01418, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1e11418, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1501030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1509030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1201410, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1301410, 0xffb09c18, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("udot", 0xc1a01410, 0xffa19c38, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
+ SME2_INSN ("udot", 0xc1a11410, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("umax", 0xc120a001, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umax", 0xc120a801, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("umax", 0xc120b001, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -5676,6 +5716,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120ba21, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("usdot", 0xc1501028, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usdot", 0xc1509028, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("usdot", 0xc1201408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usdot", 0xc1301408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("usdot", 0xc1a01408, 0xffe19c38, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zmx2), OP_SVE_SBB, F_OD (2), 0),
+ SME2_INSN ("usdot", 0xc1a11408, 0xffe39c78, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("usmlall", 0xc1000004, 0xfff0001c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX4_10), OP_SVE_SBB, 0, 0),
SME2_INSN ("usmlall", 0xc1100020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("usmlall", 0xc1108020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
@@ -5695,12 +5741,16 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("zero", 0xc0480001, 0xffffffff, sme_misc, 0, OP1 (SME_ZT0_LIST), {}, 0, 0),
/* SME2 I16I64 instructions. */
+ SME2_I16I64_INSN ("sdot", 0xc1d00008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("sdot", 0xc1d08008, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (4), 0),
SME2_I16I64_INSN ("smlall", 0xc1800000, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
SME2_I16I64_INSN ("smlall", 0xc1900000, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("smlall", 0xc1908000, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
SME2_I16I64_INSN ("smlsll", 0xc1800008, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
SME2_I16I64_INSN ("smlsll", 0xc1900008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("smlsll", 0xc1908008, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("udot", 0xc1d00018, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (2), 0),
+ SME2_I16I64_INSN ("udot", 0xc1d08018, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (4), 0),
SME2_I16I64_INSN ("umlall", 0xc1800010, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
SME2_I16I64_INSN ("umlall", 0xc1900010, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("umlall", 0xc1908010, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 17/31] aarch64: Add the SME2 vertical dot-product instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (15 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 16/31] aarch64: Add the SME2 dot-product instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 18/31] aarch64: Add the SME2 MOPA and MOPS instructions Richard Sandiford
` (15 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
There are three instruction formats here:
- BFVDOT + FVDOT
- SVDOT + UVDOT
- SUVDOT + USVDOT
There are also 64-bit forms of SVDOT and UVDOT.
---
gas/testsuite/gas/aarch64/sme2-18-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-18-invalid.l | 21 +
gas/testsuite/gas/aarch64/sme2-18-invalid.s | 20 +
gas/testsuite/gas/aarch64/sme2-18-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-18-noarch.l | 21 +
gas/testsuite/gas/aarch64/sme2-18.d | 29 +
gas/testsuite/gas/aarch64/sme2-18.s | 21 +
gas/testsuite/gas/aarch64/sme2-19-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-19-invalid.l | 36 +
gas/testsuite/gas/aarch64/sme2-19-invalid.s | 36 +
gas/testsuite/gas/aarch64/sme2-19-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-19-noarch.l | 41 +
gas/testsuite/gas/aarch64/sme2-19.d | 49 +
gas/testsuite/gas/aarch64/sme2-19.s | 43 +
gas/testsuite/gas/aarch64/sme2-20-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-20-invalid.l | 27 +
gas/testsuite/gas/aarch64/sme2-20-invalid.s | 23 +
gas/testsuite/gas/aarch64/sme2-20-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-20-noarch.l | 21 +
gas/testsuite/gas/aarch64/sme2-20.d | 29 +
gas/testsuite/gas/aarch64/sme2-20.s | 21 +
.../gas/aarch64/sme2-i16i64-4-invalid.d | 3 +
.../gas/aarch64/sme2-i16i64-4-invalid.l | 11 +
.../gas/aarch64/sme2-i16i64-4-invalid.s | 12 +
.../gas/aarch64/sme2-i16i64-4-noarch.d | 3 +
.../gas/aarch64/sme2-i16i64-4-noarch.l | 21 +
gas/testsuite/gas/aarch64/sme2-i16i64-4.d | 29 +
gas/testsuite/gas/aarch64/sme2-i16i64-4.s | 21 +
opcodes/aarch64-dis-2.c | 1448 +++++++++--------
opcodes/aarch64-tbl.h | 10 +
30 files changed, 1345 insertions(+), 669 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-18-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-18-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-18-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-18-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-18-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-18.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-18.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-19-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-19-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-19-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-19-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-19-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-19.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-19.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-20-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-20-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-20-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-20-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-20-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-20.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-20.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4.s
diff --git a/gas/testsuite/gas/aarch64/sme2-18-invalid.d b/gas/testsuite/gas/aarch64/sme2-18-invalid.d
new file mode 100644
index 00000000000..d049bda4368
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-18-invalid.s
+#error_output: sme2-18-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-18-invalid.l b/gas/testsuite/gas/aarch64/sme2-18-invalid.l
new file mode 100644
index 00000000000..6a1b77a1494
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-invalid.l
@@ -0,0 +1,21 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfvdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `bfvdot za\.s\[w8,0\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `fvdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `fvdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fvdot za\.s\[w8,0\],{z0\.b-z1\.h},z0\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fvdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fvdot za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `fvdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fvdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-18-invalid.s b/gas/testsuite/gas/aarch64/sme2-18-invalid.s
new file mode 100644
index 00000000000..efe3235eed2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-invalid.s
@@ -0,0 +1,20 @@
+ bfvdot 0, { z0.h - z1.h }, z0.h[0]
+ bfvdot za.s[w8, 0], 0, z0.h[0]
+ bfvdot za.s[w8, 0], { z0.h - z1.h }, 0
+
+ fvdot za.h[w8, 0], z0.h, z0.h
+ fvdot za.h[w8, 0], { z0.h - z1.h }, z0.h
+ fvdot za.s[w8, 0], { z0.b - z1.h }, z0.b[0]
+ fvdot za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ fvdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h[0]
+
+ fvdot za.s[w7, 0], { z0.h - z1.h }, z0.h[0]
+ fvdot za.s[w12, 0], { z0.h - z1.h }, z0.h[0]
+ fvdot za.s[w8, -1], { z0.h - z1.h }, z0.h[0]
+ fvdot za.s[w8, 8], { z0.h - z1.h }, z0.h[0]
+ fvdot za.s[w8, 0], { z0.h - z2.h }, z0.h[0]
+ fvdot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ fvdot za.s[w8, 0], { z1.h - z2.h }, z0.h[0]
+ fvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[-1]
+ fvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[4]
+ fvdot za.s[w8, 0], { z0.h - z1.h }, z16.h[0]
diff --git a/gas/testsuite/gas/aarch64/sme2-18-noarch.d b/gas/testsuite/gas/aarch64/sme2-18-noarch.d
new file mode 100644
index 00000000000..1f9fbc9b58e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-18.s
+#error_output: sme2-18-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-18-noarch.l b/gas/testsuite/gas/aarch64/sme2-18-noarch.l
new file mode 100644
index 00000000000..525e3950c9c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18-noarch.l
@@ -0,0 +1,21 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-18.d b/gas/testsuite/gas/aarch64/sme2-18.d
new file mode 100644
index 00000000000..017f275fa6d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18.d
@@ -0,0 +1,29 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1500018 bfvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500018 bfvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500018 bfvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500018 bfvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1506018 bfvdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c150001f bfvdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15003d8 bfvdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f0018 bfvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1500c18 bfvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d45da bfvdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1500008 fvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500008 fvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500008 fvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500008 fvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1506008 fvdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c150000f fvdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15003c8 fvdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f0008 fvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1500c08 fvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d45ca fvdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
diff --git a/gas/testsuite/gas/aarch64/sme2-18.s b/gas/testsuite/gas/aarch64/sme2-18.s
new file mode 100644
index 00000000000..b553b41cd95
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-18.s
@@ -0,0 +1,21 @@
+ bfvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ bfvdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ BFVDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ BFVDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ bfvdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ bfvdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ bfvdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ bfvdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ bfvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ bfvdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ fvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ fvdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ FVDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ FVDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ fvdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ fvdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ fvdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ fvdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ fvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ fvdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
diff --git a/gas/testsuite/gas/aarch64/sme2-19-invalid.d b/gas/testsuite/gas/aarch64/sme2-19-invalid.d
new file mode 100644
index 00000000000..ecc08442c6e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-19-invalid.s
+#error_output: sme2-19-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-19-invalid.l b/gas/testsuite/gas/aarch64/sme2-19-invalid.l
new file mode 100644
index 00000000000..936e6f50ca4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-invalid.l
@@ -0,0 +1,36 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `svdot 0,{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `svdot za\.s\[w8,0\],0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `svdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `svdot za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `svdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: svdot za\.s\[w8, 0:1\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.b-z2\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z1\.b-z4\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z3\.b-z6\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-19-invalid.s b/gas/testsuite/gas/aarch64/sme2-19-invalid.s
new file mode 100644
index 00000000000..3c97857c442
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-invalid.s
@@ -0,0 +1,36 @@
+ svdot 0, { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w8, 0], 0, z0.h[0]
+ svdot za.s[w8, 0], { z0.h - z1.h }, 0
+
+ svdot za.h[w8, 0], z0.h, z0.h
+ svdot za.h[w8, 0], { z0.h - z1.h }, z0.h
+
+ svdot za.s[w8, 0:1], { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w8, 0, vgx4], { z0.h - z1.h }, z0.h[0]
+
+ svdot za.s[w7, 0], { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w12, 0], { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w8, -1], { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w8, 8], { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w8, 0], { z0.h - z2.h }, z0.h[0]
+ svdot za.s[w8, 0], { z0.h - z3.h }, z0.h[0]
+ svdot za.s[w8, 0], { z1.h - z2.h }, z0.h[0]
+ svdot za.s[w8, 0], { z0.h - z1.h }, z0.h[-1]
+ svdot za.s[w8, 0], { z0.h - z1.h }, z0.h[4]
+ svdot za.s[w8, 0], { z0.h - z1.h }, z16.h[0]
+
+ svdot za.s[w8, 0:1], { z0.b - z3.b }, z0.h[0]
+ svdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.h[0]
+
+ svdot za.s[w7, 0], { z0.b - z3.b }, z0.b[0]
+ svdot za.s[w12, 0], { z0.b - z3.b }, z0.b[0]
+ svdot za.s[w8, -1], { z0.b - z3.b }, z0.b[0]
+ svdot za.s[w8, 8], { z0.b - z3.b }, z0.b[0]
+ svdot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ svdot za.s[w8, 0], { z0.b - z2.b }, z0.b[0]
+ svdot za.s[w8, 0], { z1.b - z4.b }, z0.b[0]
+ svdot za.s[w8, 0], { z2.b - z5.b }, z0.b[0]
+ svdot za.s[w8, 0], { z3.b - z6.b }, z0.b[0]
+ svdot za.s[w8, 0], { z0.b - z3.b }, z0.b[-1]
+ svdot za.s[w8, 0], { z0.b - z3.b }, z0.b[4]
+ svdot za.s[w8, 0], { z0.b - z3.b }, z16.b[0]
diff --git a/gas/testsuite/gas/aarch64/sme2-19-noarch.d b/gas/testsuite/gas/aarch64/sme2-19-noarch.d
new file mode 100644
index 00000000000..9006a30a52a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-19.s
+#error_output: sme2-19-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-19-noarch.l b/gas/testsuite/gas/aarch64/sme2-19-noarch.l
new file mode 100644
index 00000000000..c4d760e17a0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19-noarch.l
@@ -0,0 +1,41 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-19.d b/gas/testsuite/gas/aarch64/sme2-19.d
new file mode 100644
index 00000000000..5af3a2acd2a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19.d
@@ -0,0 +1,49 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1500020 svdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500020 svdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500020 svdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500020 svdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1506020 svdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500027 svdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15003e0 svdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f0020 svdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1500c20 svdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d45e2 svdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1508020 svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508020 svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508020 svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508020 svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150e020 svdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508027 svdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15083a0 svdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f8020 svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1508c20 svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15aa8a1 svdot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+: c1500030 uvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500030 uvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500030 uvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500030 uvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1506030 uvdot za\.s\[w11, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c1500037 uvdot za\.s\[w8, 7, vgx2\], {z0\.h-z1\.h}, z0\.h\[0\]
+[^:]+: c15003f0 uvdot za\.s\[w8, 0, vgx2\], {z30\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c15f0030 uvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z15\.h\[0\]
+[^:]+: c1500c30 uvdot za\.s\[w8, 0, vgx2\], {z0\.h-z1\.h}, z0\.h\[3\]
+[^:]+: c15d45f2 uvdot za\.s\[w10, 2, vgx2\], {z14\.h-z15\.h}, z13\.h\[1\]
+[^:]+: c1508030 uvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508030 uvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508030 uvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508030 uvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150e030 uvdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508037 uvdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15083b0 uvdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f8030 uvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1508c30 uvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15aa8b1 uvdot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
diff --git a/gas/testsuite/gas/aarch64/sme2-19.s b/gas/testsuite/gas/aarch64/sme2-19.s
new file mode 100644
index 00000000000..d95296f5fa1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-19.s
@@ -0,0 +1,43 @@
+ svdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ SVDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ SVDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ svdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ svdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ svdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ svdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ svdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ svdot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ svdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ SVDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ SVDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ svdot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ svdot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ svdot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ svdot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ svdot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ svdot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ uvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+ uvdot za.s[w8, 0, vgx2], { z0.h - z1.h }, z0.h[0]
+ UVDOT ZA.s[W8, 0, VGx2], { Z0.h - Z1.h }, Z0.h[0]
+ UVDOT ZA.S[W8, 0, VGX2], { Z0.H - Z1.H }, Z0.H[0]
+ uvdot za.s[w11, 0], { z0.h - z1.h }, z0.h[0]
+ uvdot za.s[w8, 7], { z0.h - z1.h }, z0.h[0]
+ uvdot za.s[w8, 0], { z30.h - z31.h }, z0.h[0]
+ uvdot za.s[w8, 0], { z0.h - z1.h }, z15.h[0]
+ uvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[3]
+ uvdot za.s[w10, 2], { z14.h - z15.h }, z13.h[1]
+
+ uvdot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ uvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ UVDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ UVDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ uvdot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ uvdot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ uvdot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ uvdot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ uvdot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ uvdot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
diff --git a/gas/testsuite/gas/aarch64/sme2-20-invalid.d b/gas/testsuite/gas/aarch64/sme2-20-invalid.d
new file mode 100644
index 00000000000..e7691162f13
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-20-invalid.s
+#error_output: sme2-20-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-20-invalid.l b/gas/testsuite/gas/aarch64/sme2-20-invalid.l
new file mode 100644
index 00000000000..cea44765bbb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-invalid.l
@@ -0,0 +1,27 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `suvdot 0,{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `suvdot za\.s\[w8,0\],0,z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 2 -- `suvdot za\.h\[w8,0\],z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `suvdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: suvdot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: suvdot za\.s\[w8, 0:1\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,-1\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{z0\.b-z2\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z1\.b-z4\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z3\.b-z6\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]'
+[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-20-invalid.s b/gas/testsuite/gas/aarch64/sme2-20-invalid.s
new file mode 100644
index 00000000000..9669e28733a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-invalid.s
@@ -0,0 +1,23 @@
+ suvdot 0, { z0.b - z3.b }, z0.b[0]
+ suvdot za.s[w8, 0], 0, z0.b[0]
+ suvdot za.s[w8, 0], { z0.b - z3.b }, 0
+
+ suvdot za.h[w8, 0], z0.h, z0.h
+ suvdot za.h[w8, 0], { z0.h - z1.h }, z0.h
+ suvdot za.s[w8, 0], { z0.h - z1.h }, z0.h[0]
+
+ suvdot za.s[w8, 0:1], { z0.b - z3.b }, z0.h[0]
+ suvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.h[0]
+
+ suvdot za.s[w7, 0], { z0.b - z3.b }, z0.b[0]
+ suvdot za.s[w12, 0], { z0.b - z3.b }, z0.b[0]
+ suvdot za.s[w8, -1], { z0.b - z3.b }, z0.b[0]
+ suvdot za.s[w8, 8], { z0.b - z3.b }, z0.b[0]
+ suvdot za.s[w8, 0], { z0.b - z1.b }, z0.b[0]
+ suvdot za.s[w8, 0], { z0.b - z2.b }, z0.b[0]
+ suvdot za.s[w8, 0], { z1.b - z4.b }, z0.b[0]
+ suvdot za.s[w8, 0], { z2.b - z5.b }, z0.b[0]
+ suvdot za.s[w8, 0], { z3.b - z6.b }, z0.b[0]
+ suvdot za.s[w8, 0], { z0.b - z3.b }, z0.b[-1]
+ suvdot za.s[w8, 0], { z0.b - z3.b }, z0.b[4]
+ suvdot za.s[w8, 0], { z0.b - z3.b }, z16.b[0]
diff --git a/gas/testsuite/gas/aarch64/sme2-20-noarch.d b/gas/testsuite/gas/aarch64/sme2-20-noarch.d
new file mode 100644
index 00000000000..f73e2610161
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-20.s
+#error_output: sme2-20-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-20-noarch.l b/gas/testsuite/gas/aarch64/sme2-20-noarch.l
new file mode 100644
index 00000000000..8b268d3aaa6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20-noarch.l
@@ -0,0 +1,21 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-20.d b/gas/testsuite/gas/aarch64/sme2-20.d
new file mode 100644
index 00000000000..860152a0bd4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20.d
@@ -0,0 +1,29 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1508038 suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508038 suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508038 suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508038 suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150e038 suvdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150803f suvdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15083b8 suvdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f8038 suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1508c38 suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15aa8b9 suvdot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
+[^:]+: c1508028 usvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508028 usvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508028 usvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c1508028 usvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150e028 usvdot za\.s\[w11, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c150802f usvdot za\.s\[w8, 7, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\]
+[^:]+: c15083a8 usvdot za\.s\[w8, 0, vgx4\], {z28\.b-z31\.b}, z0\.b\[0\]
+[^:]+: c15f8028 usvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z15\.b\[0\]
+[^:]+: c1508c28 usvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[3\]
+[^:]+: c15aa8a9 usvdot za\.s\[w9, 1, vgx4\], {z4\.b-z7\.b}, z10\.b\[2\]
diff --git a/gas/testsuite/gas/aarch64/sme2-20.s b/gas/testsuite/gas/aarch64/sme2-20.s
new file mode 100644
index 00000000000..bcec166ca1d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-20.s
@@ -0,0 +1,21 @@
+ suvdot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ suvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ SUVDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ SUVDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ suvdot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ suvdot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ suvdot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ suvdot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ suvdot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ suvdot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
+
+ usvdot za.s[w8, 0], { z0.b - z3.b }, z0.b[0]
+ usvdot za.s[w8, 0, vgx4], { z0.b - z3.b }, z0.b[0]
+ USVDOT ZA.s[W8, 0, VGx4], { Z0.b - Z3.b }, Z0.b[0]
+ USVDOT ZA.S[W8, 0, VGX4], { Z0.B - Z3.B }, Z0.B[0]
+ usvdot za.s[w11, 0], { z0.b - z3.b }, z0.b[0]
+ usvdot za.s[w8, 7], { z0.b - z3.b }, z0.b[0]
+ usvdot za.s[w8, 0], { z28.b - z31.b }, z0.b[0]
+ usvdot za.s[w8, 0], { z0.b - z3.b }, z15.b[0]
+ usvdot za.s[w8, 0], { z0.b - z3.b }, z0.b[3]
+ usvdot za.s[w9, 1], { z4.b - z7.b }, z10.b[2]
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.d b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.d
new file mode 100644
index 00000000000..6352d4bb328
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-i16i64-4-invalid.s
+#error_output: sme2-i16i64-4-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
new file mode 100644
index 00000000000..c33f15ec46f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
@@ -0,0 +1,11 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[2\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h'
+[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.s b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.s
new file mode 100644
index 00000000000..ef9862831fe
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.s
@@ -0,0 +1,12 @@
+ svdot za.d[w8, 0], { z0.h - z1.h }, z0.h[0]
+
+ svdot za.d[w8, 0], { z0.h - z3.h }, z0.h[-1]
+ svdot za.d[w8, 0], { z0.h - z3.h }, z0.h[2]
+ svdot za.d[w8, 0], { z1.h - z4.h }, z0.h[0]
+ svdot za.d[w8, 0], { z2.h - z5.h }, z0.h[0]
+ svdot za.d[w8, 0], { z3.h - z6.h }, z0.h[0]
+
+ svdot za.d[w8, 0], { z0.h - z1.h }, z0.h
+ svdot za.d[w8, 0], { z0.h - z3.h }, z0.h
+ svdot za.d[w8, 0], { z0.h - z1.h }, { z0.h - z1.h }
+ svdot za.d[w8, 0], { z0.h - z3.h }, { z0.h - z3.h }
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.d b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.d
new file mode 100644
index 00000000000..6d48f4e0ff8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sme2-i16i64-4.s
+#error_output: sme2-i16i64-4-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
new file mode 100644
index 00000000000..4b27662fee8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
@@ -0,0 +1,21 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4.d b/gas/testsuite/gas/aarch64/sme2-i16i64-4.d
new file mode 100644
index 00000000000..441baebe89e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4.d
@@ -0,0 +1,29 @@
+#as: -march=armv8-a+sme2+sme-i16i64
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1d08808 svdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08808 svdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08808 svdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08808 svdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0e808 svdot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0880f svdot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08b88 svdot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df8808 svdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d08c08 svdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[1\]
+[^:]+: c1daac89 svdot za\.d\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[1\]
+[^:]+: c1d08818 uvdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08818 uvdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08818 uvdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08818 uvdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0e818 uvdot za\.d\[w11, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d0881f uvdot za\.d\[w8, 7, vgx4\], {z0\.h-z3\.h}, z0\.h\[0\]
+[^:]+: c1d08b98 uvdot za\.d\[w8, 0, vgx4\], {z28\.h-z31\.h}, z0\.h\[0\]
+[^:]+: c1df8818 uvdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z15\.h\[0\]
+[^:]+: c1d08c18 uvdot za\.d\[w8, 0, vgx4\], {z0\.h-z3\.h}, z0\.h\[1\]
+[^:]+: c1daac99 uvdot za\.d\[w9, 1, vgx4\], {z4\.h-z7\.h}, z10\.h\[1\]
diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4.s b/gas/testsuite/gas/aarch64/sme2-i16i64-4.s
new file mode 100644
index 00000000000..fbddfa6e3a3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4.s
@@ -0,0 +1,21 @@
+ svdot za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ svdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ SVDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ SVDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ svdot za.d[w11, 0], { z0.h - z3.h }, z0.h[0]
+ svdot za.d[w8, 7], { z0.h - z3.h }, z0.h[0]
+ svdot za.d[w8, 0], { z28.h - z31.h }, z0.h[0]
+ svdot za.d[w8, 0], { z0.h - z3.h }, z15.h[0]
+ svdot za.d[w8, 0], { z0.h - z3.h }, z0.h[1]
+ svdot za.d[w9, 1], { z4.h - z7.h }, z10.h[1]
+
+ uvdot za.d[w8, 0], { z0.h - z3.h }, z0.h[0]
+ uvdot za.d[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
+ UVDOT ZA.d[W8, 0, VGx4], { Z0.h - Z3.h }, Z0.h[0]
+ UVDOT ZA.D[W8, 0, VGX4], { Z0.H - Z3.H }, Z0.H[0]
+ uvdot za.d[w11, 0], { z0.h - z3.h }, z0.h[0]
+ uvdot za.d[w8, 7], { z0.h - z3.h }, z0.h[0]
+ uvdot za.d[w8, 0], { z28.h - z31.h }, z0.h[0]
+ uvdot za.d[w8, 0], { z0.h - z3.h }, z15.h[0]
+ uvdot za.d[w8, 0], { z0.h - z3.h }, z0.h[1]
+ uvdot za.d[w9, 1], { z4.h - z7.h }, z10.h[1]
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index c631e1cd59b..ddd0a68970a 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -166,7 +166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2825;
+ return 2833;
}
}
}
@@ -190,7 +190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2583;
+ return 2585;
}
else
{
@@ -198,7 +198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2582;
+ return 2584;
}
}
else
@@ -207,7 +207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2581;
+ return 2583;
}
}
}
@@ -226,7 +226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2590;
+ return 2592;
}
else
{
@@ -234,7 +234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2586;
+ return 2588;
}
}
else
@@ -247,7 +247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2580;
+ return 2582;
}
else
{
@@ -255,7 +255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2579;
+ return 2581;
}
}
else
@@ -268,7 +268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2601;
+ return 2603;
}
else
{
@@ -276,7 +276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2600;
+ return 2602;
}
}
else
@@ -285,7 +285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2578;
+ return 2580;
}
}
}
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2588;
+ return 2590;
}
else
{
@@ -306,7 +306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2584;
+ return 2586;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2591;
+ return 2593;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2587;
+ return 2589;
}
}
else
@@ -339,7 +339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2589;
+ return 2591;
}
else
{
@@ -347,7 +347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2585;
+ return 2587;
}
}
}
@@ -374,7 +374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2517;
+ return 2519;
}
else
{
@@ -382,7 +382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2518;
+ return 2520;
}
}
else
@@ -393,7 +393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2541;
+ return 2543;
}
else
{
@@ -401,7 +401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2542;
+ return 2544;
}
}
}
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2533;
+ return 2535;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2534;
+ return 2536;
}
}
else
@@ -434,7 +434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2525;
+ return 2527;
}
else
{
@@ -442,7 +442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2526;
+ return 2528;
}
}
}
@@ -459,7 +459,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2549;
+ return 2551;
}
else
{
@@ -467,7 +467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2550;
+ return 2552;
}
}
else
@@ -478,7 +478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2573;
+ return 2575;
}
else
{
@@ -486,7 +486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2574;
+ return 2576;
}
}
}
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2565;
+ return 2567;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2566;
+ return 2568;
}
}
else
@@ -519,7 +519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2557;
+ return 2559;
}
else
{
@@ -527,7 +527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2558;
+ return 2560;
}
}
}
@@ -591,7 +591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2513;
+ return 2515;
}
else
{
@@ -599,7 +599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2514;
+ return 2516;
}
}
else
@@ -610,7 +610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2537;
+ return 2539;
}
else
{
@@ -618,7 +618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2538;
+ return 2540;
}
}
}
@@ -632,7 +632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2529;
+ return 2531;
}
else
{
@@ -640,7 +640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2530;
+ return 2532;
}
}
else
@@ -651,7 +651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2521;
+ return 2523;
}
else
{
@@ -659,7 +659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2522;
+ return 2524;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2545;
+ return 2547;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2546;
+ return 2548;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2569;
+ return 2571;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2570;
+ return 2572;
}
}
}
@@ -717,7 +717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2561;
+ return 2563;
}
else
{
@@ -725,7 +725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2562;
+ return 2564;
}
}
else
@@ -736,7 +736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2553;
+ return 2555;
}
else
{
@@ -744,7 +744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2554;
+ return 2556;
}
}
}
@@ -812,7 +812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2671;
+ return 2673;
}
else
{
@@ -820,7 +820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2672;
+ return 2674;
}
}
else
@@ -831,7 +831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2695;
+ return 2697;
}
else
{
@@ -839,7 +839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2696;
+ return 2698;
}
}
}
@@ -853,7 +853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2687;
+ return 2689;
}
else
{
@@ -861,7 +861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2688;
+ return 2690;
}
}
else
@@ -872,7 +872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2679;
+ return 2681;
}
else
{
@@ -880,7 +880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2680;
+ return 2682;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2703;
+ return 2705;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2704;
+ return 2706;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2727;
+ return 2729;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2728;
+ return 2730;
}
}
}
@@ -938,7 +938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2719;
+ return 2721;
}
else
{
@@ -946,7 +946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2720;
+ return 2722;
}
}
else
@@ -957,7 +957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2711;
+ return 2713;
}
else
{
@@ -965,7 +965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2712;
+ return 2714;
}
}
}
@@ -1029,7 +1029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2667;
+ return 2669;
}
else
{
@@ -1037,7 +1037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2668;
+ return 2670;
}
}
else
@@ -1048,7 +1048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2691;
+ return 2693;
}
else
{
@@ -1056,7 +1056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2692;
+ return 2694;
}
}
}
@@ -1070,7 +1070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2683;
+ return 2685;
}
else
{
@@ -1078,7 +1078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2684;
+ return 2686;
}
}
else
@@ -1089,7 +1089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2675;
+ return 2677;
}
else
{
@@ -1097,7 +1097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2676;
+ return 2678;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2699;
+ return 2701;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2700;
+ return 2702;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2723;
+ return 2725;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2724;
+ return 2726;
}
}
}
@@ -1155,7 +1155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2715;
+ return 2717;
}
else
{
@@ -1163,7 +1163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2716;
+ return 2718;
}
}
else
@@ -1174,7 +1174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2707;
+ return 2709;
}
else
{
@@ -1182,7 +1182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2708;
+ return 2710;
}
}
}
@@ -1274,7 +1274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2635;
+ return 2637;
}
else
{
@@ -1282,7 +1282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2809;
+ return 2814;
}
}
else
@@ -1295,7 +1295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2636;
+ return 2638;
}
else
{
@@ -1303,7 +1303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2637;
+ return 2639;
}
}
else
@@ -1314,7 +1314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2810;
+ return 2815;
}
else
{
@@ -1322,7 +1322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2811;
+ return 2816;
}
}
}
@@ -1337,7 +1337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2775;
+ return 2780;
}
else
{
@@ -1345,7 +1345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2742;
+ return 2744;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2776;
+ return 2781;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2777;
+ return 2782;
}
}
else
@@ -1377,7 +1377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2743;
+ return 2745;
}
else
{
@@ -1385,7 +1385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2744;
+ return 2746;
}
}
}
@@ -1401,7 +1401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2651;
+ return 2653;
}
else
{
@@ -1411,7 +1411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2652;
+ return 2654;
}
else
{
@@ -1419,7 +1419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2653;
+ return 2655;
}
}
}
@@ -1431,7 +1431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2791;
+ return 2796;
}
else
{
@@ -1441,7 +1441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2792;
+ return 2797;
}
else
{
@@ -1449,7 +1449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2793;
+ return 2798;
}
}
}
@@ -1471,7 +1471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2519;
+ return 2521;
}
else
{
@@ -1479,7 +1479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2543;
+ return 2545;
}
}
else
@@ -1490,7 +1490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2535;
+ return 2537;
}
else
{
@@ -1498,7 +1498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2527;
+ return 2529;
}
}
}
@@ -1512,7 +1512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2551;
+ return 2553;
}
else
{
@@ -1520,7 +1520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2575;
+ return 2577;
}
}
else
@@ -1531,7 +1531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2567;
+ return 2569;
}
else
{
@@ -1539,7 +1539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2559;
+ return 2561;
}
}
}
@@ -1567,7 +1567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2520;
+ return 2522;
}
else
{
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2577;
+ return 2579;
}
}
else
@@ -1584,7 +1584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2544;
+ return 2546;
}
}
else
@@ -1595,7 +1595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2536;
+ return 2538;
}
else
{
@@ -1603,7 +1603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2528;
+ return 2530;
}
}
}
@@ -1617,7 +1617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2552;
+ return 2554;
}
else
{
@@ -1625,7 +1625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2576;
+ return 2578;
}
}
else
@@ -1636,7 +1636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2568;
+ return 2570;
}
else
{
@@ -1644,7 +1644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2560;
+ return 2562;
}
}
}
@@ -1677,7 +1677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2828;
+ return 2836;
}
else
{
@@ -1687,7 +1687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2829;
+ return 2837;
}
else
{
@@ -1695,7 +1695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2830;
+ return 2838;
}
}
}
@@ -1707,7 +1707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2489;
+ return 2490;
}
else
{
@@ -1717,7 +1717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2490;
+ return 2491;
}
else
{
@@ -1725,7 +1725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2491;
+ return 2492;
}
}
}
@@ -1762,7 +1762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2836;
+ return 2845;
}
else
{
@@ -1772,7 +1772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2837;
+ return 2846;
}
else
{
@@ -1780,7 +1780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2838;
+ return 2847;
}
}
}
@@ -1838,7 +1838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2831;
+ return 2839;
}
else
{
@@ -1848,7 +1848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2832;
+ return 2840;
}
else
{
@@ -1856,7 +1856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2833;
+ return 2841;
}
}
}
@@ -1868,7 +1868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2503;
+ return 2504;
}
else
{
@@ -1878,7 +1878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2504;
+ return 2505;
}
else
{
@@ -1886,7 +1886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2505;
+ return 2506;
}
}
}
@@ -1901,7 +1901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2839;
+ return 2848;
}
else
{
@@ -1911,7 +1911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2840;
+ return 2849;
}
else
{
@@ -1919,7 +1919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2841;
+ return 2850;
}
}
}
@@ -1975,7 +1975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2515;
+ return 2517;
}
else
{
@@ -1983,7 +1983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2539;
+ return 2541;
}
}
else
@@ -1994,7 +1994,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2531;
+ return 2533;
}
else
{
@@ -2002,7 +2002,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2523;
+ return 2525;
}
}
}
@@ -2018,7 +2018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2483;
+ return 2484;
}
else
{
@@ -2026,16 +2026,27 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2605;
+ return 2607;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx0xxxxxxxxx100xxx
- sdot. */
- return 2611;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx0xxxxxx100xxx
+ svdot. */
+ return 2750;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx1xxxxxx100xxx
+ sdot. */
+ return 2613;
+ }
}
}
else
@@ -2048,7 +2059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2497;
+ return 2498;
}
else
{
@@ -2056,16 +2067,27 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2747;
+ return 2752;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx0xxxxxxxxx110xxx
- udot. */
- return 2753;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx0xxxxxx110xxx
+ uvdot. */
+ return 2823;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx1xxxxxx110xxx
+ udot. */
+ return 2758;
+ }
}
}
}
@@ -2082,7 +2104,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2516;
+ return 2518;
}
else
{
@@ -2090,7 +2112,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2540;
+ return 2542;
}
}
else
@@ -2101,7 +2123,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2532;
+ return 2534;
}
else
{
@@ -2109,7 +2131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2524;
+ return 2526;
}
}
}
@@ -2125,7 +2147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2484;
+ return 2485;
}
else
{
@@ -2133,16 +2155,27 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2606;
+ return 2608;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx1xxxxxxxxx100xxx
- sdot. */
- return 2612;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx0xxxxxx100xxx
+ svdot. */
+ return 2751;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx1xxxxxx100xxx
+ sdot. */
+ return 2614;
+ }
}
}
else
@@ -2155,7 +2188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2498;
+ return 2499;
}
else
{
@@ -2163,16 +2196,27 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2748;
+ return 2753;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx1xxxxxxxxx110xxx
- udot. */
- return 2754;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx0xxxxxx110xxx
+ uvdot. */
+ return 2824;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx1xxxxxx110xxx
+ udot. */
+ return 2759;
+ }
}
}
}
@@ -2192,7 +2236,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2547;
+ return 2549;
}
else
{
@@ -2200,7 +2244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2571;
+ return 2573;
}
}
else
@@ -2211,7 +2255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2563;
+ return 2565;
}
else
{
@@ -2219,7 +2263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2555;
+ return 2557;
}
}
}
@@ -2229,11 +2273,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx0xxxxxxxxx001xxx
- fdot. */
- return 2461;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx0xxxxxx001xxx
+ fvdot. */
+ return 2514;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx1xxxxxx001xxx
+ fdot. */
+ return 2462;
+ }
}
else
{
@@ -2241,18 +2296,29 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2803;
+ return 2808;
}
}
else
{
if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx0xxxxxxxxx011xxx
- bfdot. */
- return 2436;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx0xxxxxx011xxx
+ bfvdot. */
+ return 2458;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx0xx1xxxxxx011xxx
+ bfdot. */
+ return 2436;
+ }
}
else
{
@@ -2260,7 +2326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2738;
+ return 2740;
}
}
}
@@ -2277,7 +2343,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2548;
+ return 2550;
}
else
{
@@ -2285,7 +2351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2572;
+ return 2574;
}
}
else
@@ -2296,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2564;
+ return 2566;
}
else
{
@@ -2304,7 +2370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2556;
+ return 2558;
}
}
}
@@ -2318,15 +2384,26 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2462;
+ return 2463;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx1xxxxxxxxx101xxx
- usdot. */
- return 2804;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx0xxxxxx101xxx
+ usvdot. */
+ return 2822;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx1xxxxxx101xxx
+ usdot. */
+ return 2809;
+ }
}
}
else
@@ -2341,11 +2418,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000010101xxxx1xxxxxxxxx111xxx
- sudot. */
- return 2739;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx0xxxxxx111xxx
+ suvdot. */
+ return 2749;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx000010101xxxx1xx1xxxxxx111xxx
+ sudot. */
+ return 2741;
+ }
}
}
}
@@ -2368,7 +2456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2842;
+ return 2852;
}
else
{
@@ -2376,7 +2464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2843;
+ return 2853;
}
}
else
@@ -2387,7 +2475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2627;
+ return 2629;
}
else
{
@@ -2397,7 +2485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2628;
+ return 2630;
}
else
{
@@ -2405,7 +2493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2629;
+ return 2631;
}
}
}
@@ -2414,21 +2502,32 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx000001110xxxxx0xx0xxxxxxx01xxx
- sdot. */
- return 2826;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx0xx00xxxxxx01xxx
+ sdot. */
+ return 2834;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx000001110xxxxx1xx00xxxxxx01xxx
+ sdot. */
+ return 2835;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xx000001110xxxxx1xx0xxxxxxx01xxx
- sdot. */
- return 2827;
+ xx000001110xxxxxxxx01xxxxxx01xxx
+ svdot. */
+ return 2842;
}
}
else
@@ -2439,7 +2538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2643;
+ return 2645;
}
else
{
@@ -2449,7 +2548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2644;
+ return 2646;
}
else
{
@@ -2457,7 +2556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2645;
+ return 2647;
}
}
}
@@ -2497,7 +2596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2844;
+ return 2854;
}
else
{
@@ -2505,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2845;
+ return 2855;
}
}
else
@@ -2516,7 +2615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2767;
+ return 2772;
}
else
{
@@ -2526,7 +2625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2768;
+ return 2773;
}
else
{
@@ -2534,7 +2633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2769;
+ return 2774;
}
}
}
@@ -2552,21 +2651,32 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx00001110xxxxx0xx0xxxxxxx11xxx
- udot. */
- return 2834;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001110xxxxx0xx00xxxxxx11xxx
+ udot. */
+ return 2843;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxx00001110xxxxx1xx00xxxxxx11xxx
+ udot. */
+ return 2844;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx00001110xxxxx1xx0xxxxxxx11xxx
- udot. */
- return 2835;
+ xxx00001110xxxxxxxx01xxxxxx11xxx
+ uvdot. */
+ return 2851;
}
}
else
@@ -2577,7 +2687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2783;
+ return 2788;
}
else
{
@@ -2587,7 +2697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2784;
+ return 2789;
}
else
{
@@ -2595,7 +2705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2785;
+ return 2790;
}
}
}
@@ -2651,7 +2761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2639;
+ return 2641;
}
else
{
@@ -2659,7 +2769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2640;
+ return 2642;
}
}
else
@@ -2670,7 +2780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2641;
+ return 2643;
}
else
{
@@ -2678,7 +2788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2642;
+ return 2644;
}
}
}
@@ -2692,7 +2802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2813;
+ return 2818;
}
else
{
@@ -2700,7 +2810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2814;
+ return 2819;
}
}
else
@@ -2711,7 +2821,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2815;
+ return 2820;
}
else
{
@@ -2719,7 +2829,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2816;
+ return 2821;
}
}
}
@@ -2734,7 +2844,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2463;
+ return 2464;
}
else
{
@@ -2742,7 +2852,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2464;
+ return 2465;
}
}
else
@@ -2753,7 +2863,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2465;
+ return 2466;
}
else
{
@@ -2761,7 +2871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2466;
+ return 2467;
}
}
}
@@ -2780,7 +2890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2493;
+ return 2494;
}
else
{
@@ -2788,7 +2898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2494;
+ return 2495;
}
}
else
@@ -2799,7 +2909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2495;
+ return 2496;
}
else
{
@@ -2807,7 +2917,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2496;
+ return 2497;
}
}
}
@@ -2821,7 +2931,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2631;
+ return 2633;
}
else
{
@@ -2829,7 +2939,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2632;
+ return 2634;
}
}
else
@@ -2840,7 +2950,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2633;
+ return 2635;
}
else
{
@@ -2848,7 +2958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2634;
+ return 2636;
}
}
}
@@ -2863,7 +2973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2485;
+ return 2486;
}
else
{
@@ -2871,7 +2981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2486;
+ return 2487;
}
}
else
@@ -2882,7 +2992,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2487;
+ return 2488;
}
else
{
@@ -2890,7 +3000,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2488;
+ return 2489;
}
}
}
@@ -2908,7 +3018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2638;
+ return 2640;
}
else
{
@@ -2916,7 +3026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2812;
+ return 2817;
}
}
else
@@ -2929,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2613;
+ return 2615;
}
else
{
@@ -2937,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2614;
+ return 2616;
}
}
else
@@ -2948,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2615;
+ return 2617;
}
else
{
@@ -2956,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2616;
+ return 2618;
}
}
}
@@ -2971,7 +3081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2492;
+ return 2493;
}
else
{
@@ -2979,7 +3089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2630;
+ return 2632;
}
}
else
@@ -2990,7 +3100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2459;
+ return 2460;
}
else
{
@@ -2998,7 +3108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2460;
+ return 2461;
}
}
}
@@ -3022,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2779;
+ return 2784;
}
else
{
@@ -3030,7 +3140,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2780;
+ return 2785;
}
}
else
@@ -3041,7 +3151,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2781;
+ return 2786;
}
else
{
@@ -3049,7 +3159,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2782;
+ return 2787;
}
}
}
@@ -3061,7 +3171,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2745;
+ return 2747;
}
else
{
@@ -3069,7 +3179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2746;
+ return 2748;
}
}
}
@@ -3170,7 +3280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2771;
+ return 2776;
}
else
{
@@ -3178,7 +3288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2772;
+ return 2777;
}
}
else
@@ -3189,7 +3299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2773;
+ return 2778;
}
else
{
@@ -3197,7 +3307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2774;
+ return 2779;
}
}
}
@@ -3255,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2778;
+ return 2783;
}
else
{
@@ -3267,7 +3377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2755;
+ return 2760;
}
else
{
@@ -3275,7 +3385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2756;
+ return 2761;
}
}
else
@@ -3286,7 +3396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2757;
+ return 2762;
}
else
{
@@ -3294,7 +3404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2758;
+ return 2763;
}
}
}
@@ -3317,7 +3427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2770;
+ return 2775;
}
}
else
@@ -3359,7 +3469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2655;
+ return 2657;
}
else
{
@@ -3367,7 +3477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2656;
+ return 2658;
}
}
else
@@ -3378,7 +3488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2657;
+ return 2659;
}
else
{
@@ -3386,7 +3496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2658;
+ return 2660;
}
}
}
@@ -3404,7 +3514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2507;
+ return 2508;
}
else
{
@@ -3412,7 +3522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2508;
+ return 2509;
}
}
else
@@ -3423,7 +3533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2509;
+ return 2510;
}
else
{
@@ -3431,7 +3541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2510;
+ return 2511;
}
}
}
@@ -3445,7 +3555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2647;
+ return 2649;
}
else
{
@@ -3453,7 +3563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2648;
+ return 2650;
}
}
else
@@ -3464,7 +3574,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2649;
+ return 2651;
}
else
{
@@ -3472,7 +3582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2650;
+ return 2652;
}
}
}
@@ -3487,7 +3597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2499;
+ return 2500;
}
else
{
@@ -3495,7 +3605,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2500;
+ return 2501;
}
}
else
@@ -3506,7 +3616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2501;
+ return 2502;
}
else
{
@@ -3514,7 +3624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2502;
+ return 2503;
}
}
}
@@ -3530,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2654;
+ return 2656;
}
else
{
@@ -3544,7 +3654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2805;
+ return 2810;
}
else
{
@@ -3552,7 +3662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2806;
+ return 2811;
}
}
else
@@ -3563,7 +3673,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2807;
+ return 2812;
}
else
{
@@ -3571,7 +3681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2808;
+ return 2813;
}
}
}
@@ -3585,7 +3695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2607;
+ return 2609;
}
else
{
@@ -3593,7 +3703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2608;
+ return 2610;
}
}
else
@@ -3604,7 +3714,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2609;
+ return 2611;
}
else
{
@@ -3612,7 +3722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2610;
+ return 2612;
}
}
}
@@ -3628,7 +3738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2506;
+ return 2507;
}
else
{
@@ -3636,7 +3746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2646;
+ return 2648;
}
}
else
@@ -3647,7 +3757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2511;
+ return 2512;
}
else
{
@@ -3655,7 +3765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2512;
+ return 2513;
}
}
}
@@ -3675,7 +3785,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2795;
+ return 2800;
}
else
{
@@ -3683,7 +3793,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2796;
+ return 2801;
}
}
else
@@ -3694,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2797;
+ return 2802;
}
else
{
@@ -3702,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2798;
+ return 2803;
}
}
}
@@ -3761,7 +3871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2787;
+ return 2792;
}
else
{
@@ -3769,7 +3879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2788;
+ return 2793;
}
}
else
@@ -3780,7 +3890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2789;
+ return 2794;
}
else
{
@@ -3788,7 +3898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2790;
+ return 2795;
}
}
}
@@ -3803,7 +3913,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2734;
+ return 2736;
}
else
{
@@ -3811,7 +3921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2735;
+ return 2737;
}
}
else
@@ -3822,7 +3932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2736;
+ return 2738;
}
else
{
@@ -3830,7 +3940,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2737;
+ return 2739;
}
}
}
@@ -3846,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2794;
+ return 2799;
}
else
{
@@ -3858,7 +3968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2740;
+ return 2742;
}
else
{
@@ -3866,7 +3976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2741;
+ return 2743;
}
}
else
@@ -3879,7 +3989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2749;
+ return 2754;
}
else
{
@@ -3887,7 +3997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2750;
+ return 2755;
}
}
else
@@ -3898,7 +4008,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2751;
+ return 2756;
}
else
{
@@ -3906,7 +4016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2752;
+ return 2757;
}
}
}
@@ -3930,7 +4040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2786;
+ return 2791;
}
}
else
@@ -3941,7 +4051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2732;
+ return 2734;
}
else
{
@@ -3949,7 +4059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2733;
+ return 2735;
}
}
}
@@ -3971,7 +4081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx01x0xxxxxxx0xxxx0
sel. */
- return 2617;
+ return 2619;
}
else
{
@@ -3979,7 +4089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx11x0xxxxxxx0xxxx0
sel. */
- return 2618;
+ return 2620;
}
}
else
@@ -3996,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1000x0xx0xxxx0
smax. */
- return 2619;
+ return 2621;
}
else
{
@@ -4004,7 +4114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2621;
+ return 2623;
}
}
else
@@ -4015,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2620;
+ return 2622;
}
else
{
@@ -4023,7 +4133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2622;
+ return 2624;
}
}
}
@@ -4037,7 +4147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2659;
+ return 2661;
}
else
{
@@ -4045,7 +4155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2661;
+ return 2663;
}
}
else
@@ -4056,7 +4166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2660;
+ return 2662;
}
else
{
@@ -4064,7 +4174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2662;
+ return 2664;
}
}
}
@@ -4081,7 +4191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x100x01xx0xxxx0
fmax. */
- return 2467;
+ return 2468;
}
else
{
@@ -4089,7 +4199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x01xx0xxxx0
fmax. */
- return 2469;
+ return 2470;
}
}
else
@@ -4100,7 +4210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x01xx0xxxx0
fmax. */
- return 2468;
+ return 2469;
}
else
{
@@ -4108,7 +4218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x01xx0xxxx0
fmax. */
- return 2470;
+ return 2471;
}
}
}
@@ -4148,7 +4258,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx0
smin. */
- return 2623;
+ return 2625;
}
else
{
@@ -4156,7 +4266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx0
smin. */
- return 2625;
+ return 2627;
}
}
else
@@ -4167,7 +4277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx0
smin. */
- return 2624;
+ return 2626;
}
else
{
@@ -4175,7 +4285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx0
smin. */
- return 2626;
+ return 2628;
}
}
}
@@ -4189,7 +4299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2663;
+ return 2665;
}
else
{
@@ -4197,7 +4307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2665;
+ return 2667;
}
}
else
@@ -4208,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2664;
+ return 2666;
}
else
{
@@ -4216,7 +4326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2666;
+ return 2668;
}
}
}
@@ -4231,7 +4341,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx0
fmaxnm. */
- return 2471;
+ return 2472;
}
else
{
@@ -4239,7 +4349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx0
fmaxnm. */
- return 2473;
+ return 2474;
}
}
else
@@ -4250,7 +4360,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx0
fmaxnm. */
- return 2472;
+ return 2473;
}
else
{
@@ -4258,7 +4368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx0
fmaxnm. */
- return 2474;
+ return 2475;
}
}
}
@@ -4278,7 +4388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2759;
+ return 2764;
}
else
{
@@ -4286,7 +4396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2761;
+ return 2766;
}
}
else
@@ -4297,7 +4407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2760;
+ return 2765;
}
else
{
@@ -4305,7 +4415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2762;
+ return 2767;
}
}
}
@@ -4319,7 +4429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx0xxxx1
fmin. */
- return 2475;
+ return 2476;
}
else
{
@@ -4327,7 +4437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx0xxxx1
fmin. */
- return 2477;
+ return 2478;
}
}
else
@@ -4338,7 +4448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx0xxxx1
fmin. */
- return 2476;
+ return 2477;
}
else
{
@@ -4346,7 +4456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx0xxxx1
fmin. */
- return 2478;
+ return 2479;
}
}
}
@@ -4365,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2763;
+ return 2768;
}
else
{
@@ -4373,7 +4483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2765;
+ return 2770;
}
}
else
@@ -4384,7 +4494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2764;
+ return 2769;
}
else
{
@@ -4392,7 +4502,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2766;
+ return 2771;
}
}
}
@@ -4406,7 +4516,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2799;
+ return 2804;
}
else
{
@@ -4414,7 +4524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2801;
+ return 2806;
}
}
else
@@ -4425,7 +4535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2800;
+ return 2805;
}
else
{
@@ -4433,7 +4543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2802;
+ return 2807;
}
}
}
@@ -4448,7 +4558,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx1
fminnm. */
- return 2479;
+ return 2480;
}
else
{
@@ -4456,7 +4566,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx1
fminnm. */
- return 2481;
+ return 2482;
}
}
else
@@ -4467,7 +4577,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx1
fminnm. */
- return 2480;
+ return 2481;
}
else
{
@@ -4475,7 +4585,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx1
fminnm. */
- return 2482;
+ return 2483;
}
}
}
@@ -4504,7 +4614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2673;
+ return 2675;
}
else
{
@@ -4512,7 +4622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2697;
+ return 2699;
}
}
else
@@ -4523,7 +4633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2689;
+ return 2691;
}
else
{
@@ -4531,7 +4641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2681;
+ return 2683;
}
}
}
@@ -4545,7 +4655,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2705;
+ return 2707;
}
else
{
@@ -4553,7 +4663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2729;
+ return 2731;
}
}
else
@@ -4564,7 +4674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2721;
+ return 2723;
}
else
{
@@ -4572,7 +4682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2713;
+ return 2715;
}
}
}
@@ -4600,7 +4710,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2674;
+ return 2676;
}
else
{
@@ -4608,7 +4718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2731;
+ return 2733;
}
}
else
@@ -4617,7 +4727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2698;
+ return 2700;
}
}
else
@@ -4628,7 +4738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2690;
+ return 2692;
}
else
{
@@ -4636,7 +4746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2682;
+ return 2684;
}
}
}
@@ -4650,7 +4760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2706;
+ return 2708;
}
else
{
@@ -4658,7 +4768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2730;
+ return 2732;
}
}
else
@@ -4669,7 +4779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2722;
+ return 2724;
}
else
{
@@ -4677,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2714;
+ return 2716;
}
}
}
@@ -4719,7 +4829,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2669;
+ return 2671;
}
else
{
@@ -4727,7 +4837,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2670;
+ return 2672;
}
}
else
@@ -4738,7 +4848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2693;
+ return 2695;
}
else
{
@@ -4746,7 +4856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2694;
+ return 2696;
}
}
}
@@ -4760,7 +4870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2685;
+ return 2687;
}
else
{
@@ -4768,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2686;
+ return 2688;
}
}
else
@@ -4779,7 +4889,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2677;
+ return 2679;
}
else
{
@@ -4787,7 +4897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2678;
+ return 2680;
}
}
}
@@ -4804,7 +4914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2701;
+ return 2703;
}
else
{
@@ -4812,7 +4922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2702;
+ return 2704;
}
}
else
@@ -4823,7 +4933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2725;
+ return 2727;
}
else
{
@@ -4831,7 +4941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2726;
+ return 2728;
}
}
}
@@ -4845,7 +4955,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2717;
+ return 2719;
}
else
{
@@ -4853,7 +4963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2718;
+ return 2720;
}
}
else
@@ -4864,7 +4974,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2709;
+ return 2711;
}
else
{
@@ -4872,7 +4982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2710;
+ return 2712;
}
}
}
@@ -7274,7 +7384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2886;
+ return 2896;
}
else
{
@@ -7282,7 +7392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2894;
+ return 2904;
}
}
else
@@ -7293,7 +7403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2890;
+ return 2900;
}
else
{
@@ -7301,7 +7411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2897;
+ return 2907;
}
}
}
@@ -7339,7 +7449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2946;
+ return 2956;
}
else
{
@@ -7347,7 +7457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2952;
+ return 2962;
}
}
else
@@ -7358,7 +7468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2949;
+ return 2959;
}
else
{
@@ -7366,7 +7476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2955;
+ return 2965;
}
}
}
@@ -7380,7 +7490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2970;
+ return 2980;
}
else
{
@@ -7388,7 +7498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2976;
+ return 2986;
}
}
else
@@ -7399,7 +7509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2973;
+ return 2983;
}
else
{
@@ -7407,7 +7517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2979;
+ return 2989;
}
}
}
@@ -7424,7 +7534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2958;
+ return 2968;
}
else
{
@@ -7432,7 +7542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2964;
+ return 2974;
}
}
else
@@ -7443,7 +7553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2961;
+ return 2971;
}
else
{
@@ -7451,7 +7561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2967;
+ return 2977;
}
}
}
@@ -7465,7 +7575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2982;
+ return 2992;
}
else
{
@@ -7473,7 +7583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2988;
+ return 2998;
}
}
else
@@ -7484,7 +7594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2985;
+ return 2995;
}
else
{
@@ -7492,7 +7602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 2991;
+ return 3001;
}
}
}
@@ -7557,7 +7667,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2887;
+ return 2897;
}
else
{
@@ -7565,7 +7675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2895;
+ return 2905;
}
}
else
@@ -7576,7 +7686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2891;
+ return 2901;
}
else
{
@@ -7584,7 +7694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2898;
+ return 2908;
}
}
}
@@ -7622,7 +7732,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2947;
+ return 2957;
}
else
{
@@ -7630,7 +7740,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2953;
+ return 2963;
}
}
else
@@ -7641,7 +7751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2950;
+ return 2960;
}
else
{
@@ -7649,7 +7759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2956;
+ return 2966;
}
}
}
@@ -7663,7 +7773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2971;
+ return 2981;
}
else
{
@@ -7671,7 +7781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2977;
+ return 2987;
}
}
else
@@ -7682,7 +7792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2974;
+ return 2984;
}
else
{
@@ -7690,7 +7800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2980;
+ return 2990;
}
}
}
@@ -7707,7 +7817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2959;
+ return 2969;
}
else
{
@@ -7715,7 +7825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2965;
+ return 2975;
}
}
else
@@ -7726,7 +7836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2962;
+ return 2972;
}
else
{
@@ -7734,7 +7844,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2968;
+ return 2978;
}
}
}
@@ -7748,7 +7858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2983;
+ return 2993;
}
else
{
@@ -7756,7 +7866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2989;
+ return 2999;
}
}
else
@@ -7767,7 +7877,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2986;
+ return 2996;
}
else
{
@@ -7775,7 +7885,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 2992;
+ return 3002;
}
}
}
@@ -7843,7 +7953,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2889;
+ return 2899;
}
else
{
@@ -7851,7 +7961,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2896;
+ return 2906;
}
}
else
@@ -7860,7 +7970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2893;
+ return 2903;
}
}
else
@@ -7871,7 +7981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2888;
+ return 2898;
}
else
{
@@ -7879,7 +7989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2892;
+ return 2902;
}
}
}
@@ -7941,7 +8051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2948;
+ return 2958;
}
else
{
@@ -7949,7 +8059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3042;
+ return 3052;
}
}
else
@@ -7960,7 +8070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2954;
+ return 2964;
}
else
{
@@ -7968,7 +8078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3044;
+ return 3054;
}
}
}
@@ -7982,7 +8092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2951;
+ return 2961;
}
else
{
@@ -7990,7 +8100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3043;
+ return 3053;
}
}
else
@@ -7999,7 +8109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2957;
+ return 2967;
}
}
}
@@ -8015,7 +8125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2972;
+ return 2982;
}
else
{
@@ -8023,7 +8133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3048;
+ return 3058;
}
}
else
@@ -8034,7 +8144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2978;
+ return 2988;
}
else
{
@@ -8042,7 +8152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3050;
+ return 3060;
}
}
}
@@ -8056,7 +8166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2975;
+ return 2985;
}
else
{
@@ -8064,7 +8174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3049;
+ return 3059;
}
}
else
@@ -8073,7 +8183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2981;
+ return 2991;
}
}
}
@@ -8092,7 +8202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2960;
+ return 2970;
}
else
{
@@ -8100,7 +8210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3045;
+ return 3055;
}
}
else
@@ -8111,7 +8221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2966;
+ return 2976;
}
else
{
@@ -8119,7 +8229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3047;
+ return 3057;
}
}
}
@@ -8133,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2963;
+ return 2973;
}
else
{
@@ -8141,7 +8251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3046;
+ return 3056;
}
}
else
@@ -8150,7 +8260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2969;
+ return 2979;
}
}
}
@@ -8166,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2984;
+ return 2994;
}
else
{
@@ -8174,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3051;
+ return 3061;
}
}
else
@@ -8185,7 +8295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 2990;
+ return 3000;
}
else
{
@@ -8193,7 +8303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3053;
+ return 3063;
}
}
}
@@ -8207,7 +8317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2987;
+ return 2997;
}
else
{
@@ -8215,7 +8325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3052;
+ return 3062;
}
}
else
@@ -8224,7 +8334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 2993;
+ return 3003;
}
}
}
@@ -8597,7 +8707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3071;
+ return 3081;
}
else
{
@@ -8615,7 +8725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3074;
+ return 3084;
}
}
}
@@ -8695,7 +8805,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2884;
+ return 2894;
}
else
{
@@ -8703,7 +8813,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2885;
+ return 2895;
}
}
else
@@ -8810,7 +8920,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3076;
+ return 3086;
}
}
}
@@ -8826,7 +8936,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3073;
+ return 3083;
}
else
{
@@ -8871,7 +8981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2883;
+ return 2893;
}
else
{
@@ -8965,7 +9075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3075;
+ return 3085;
}
}
}
@@ -9095,7 +9205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3077;
+ return 3087;
}
}
}
@@ -9111,7 +9221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3072;
+ return 3082;
}
else
{
@@ -9953,7 +10063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2903;
+ return 2913;
}
}
}
@@ -10027,7 +10137,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2904;
+ return 2914;
}
}
}
@@ -12701,7 +12811,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2902;
+ return 2912;
}
}
}
@@ -14405,7 +14515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2931;
+ return 2941;
}
}
else
@@ -14648,7 +14758,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2907;
+ return 2917;
}
else
{
@@ -14656,7 +14766,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2908;
+ return 2918;
}
}
else
@@ -14888,7 +14998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2928;
+ return 2938;
}
else
{
@@ -14909,7 +15019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2935;
+ return 2945;
}
else
{
@@ -14917,7 +15027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2934;
+ return 2944;
}
}
else
@@ -14972,7 +15082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2927;
+ return 2937;
}
else
{
@@ -14984,7 +15094,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2933;
+ return 2943;
}
else
{
@@ -14992,7 +15102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2932;
+ return 2942;
}
}
else
@@ -15043,7 +15153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2911;
+ return 2921;
}
else
{
@@ -15051,7 +15161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2912;
+ return 2922;
}
}
else
@@ -15410,7 +15520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2905;
+ return 2915;
}
else
{
@@ -15443,7 +15553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2929;
+ return 2939;
}
else
{
@@ -15473,7 +15583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2906;
+ return 2916;
}
else
{
@@ -15602,7 +15712,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2915;
+ return 2925;
}
else
{
@@ -15612,7 +15722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2917;
+ return 2927;
}
else
{
@@ -15620,7 +15730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2919;
+ return 2929;
}
}
}
@@ -15632,7 +15742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2916;
+ return 2926;
}
else
{
@@ -15642,7 +15752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2918;
+ return 2928;
}
else
{
@@ -15650,7 +15760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2920;
+ return 2930;
}
}
}
@@ -16709,7 +16819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2899;
+ return 2909;
}
else
{
@@ -16717,7 +16827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2901;
+ return 2911;
}
}
else
@@ -16726,7 +16836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2900;
+ return 2910;
}
}
}
@@ -18222,7 +18332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2909;
+ return 2919;
}
else
{
@@ -18230,7 +18340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2910;
+ return 2920;
}
}
}
@@ -18604,7 +18714,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2913;
+ return 2923;
}
else
{
@@ -18612,7 +18722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2914;
+ return 2924;
}
}
}
@@ -18973,7 +19083,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2817;
+ return 2825;
}
else
{
@@ -18981,7 +19091,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2818;
+ return 2826;
}
}
else
@@ -19011,7 +19121,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2602;
+ return 2604;
}
}
}
@@ -19025,7 +19135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2820;
+ return 2828;
}
else
{
@@ -19033,7 +19143,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2819;
+ return 2827;
}
}
else
@@ -19063,7 +19173,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2604;
+ return 2606;
}
}
}
@@ -19080,7 +19190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2824;
+ return 2832;
}
else
{
@@ -19088,7 +19198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2821;
+ return 2829;
}
}
else
@@ -19118,7 +19228,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2603;
+ return 2605;
}
}
}
@@ -19132,7 +19242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2822;
+ return 2830;
}
else
{
@@ -19140,7 +19250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2823;
+ return 2831;
}
}
else
@@ -20266,7 +20376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2930;
+ return 2940;
}
}
else
@@ -20925,7 +21035,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2458;
+ return 2459;
}
}
else
@@ -21627,7 +21737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3066;
+ return 3076;
}
else
{
@@ -22207,7 +22317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 2994;
+ return 3004;
}
else
{
@@ -22215,7 +22325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 2996;
+ return 3006;
}
}
else
@@ -22226,7 +22336,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3000;
+ return 3010;
}
else
{
@@ -22234,7 +22344,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3002;
+ return 3012;
}
}
}
@@ -22248,7 +22358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 2997;
+ return 3007;
}
else
{
@@ -22256,7 +22366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 2999;
+ return 3009;
}
}
else
@@ -22267,7 +22377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3003;
+ return 3013;
}
else
{
@@ -22275,7 +22385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3005;
+ return 3015;
}
}
}
@@ -22292,7 +22402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3018;
+ return 3028;
}
else
{
@@ -22300,7 +22410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3020;
+ return 3030;
}
}
else
@@ -22311,7 +22421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3024;
+ return 3034;
}
else
{
@@ -22319,7 +22429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3026;
+ return 3036;
}
}
}
@@ -22333,7 +22443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3021;
+ return 3031;
}
else
{
@@ -22341,7 +22451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3023;
+ return 3033;
}
}
else
@@ -22352,7 +22462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3027;
+ return 3037;
}
else
{
@@ -22360,7 +22470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3029;
+ return 3039;
}
}
}
@@ -22380,7 +22490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3006;
+ return 3016;
}
else
{
@@ -22388,7 +22498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3008;
+ return 3018;
}
}
else
@@ -22399,7 +22509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3012;
+ return 3022;
}
else
{
@@ -22407,7 +22517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3014;
+ return 3024;
}
}
}
@@ -22421,7 +22531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3009;
+ return 3019;
}
else
{
@@ -22429,7 +22539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3011;
+ return 3021;
}
}
else
@@ -22440,7 +22550,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3015;
+ return 3025;
}
else
{
@@ -22448,7 +22558,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3017;
+ return 3027;
}
}
}
@@ -22465,7 +22575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3030;
+ return 3040;
}
else
{
@@ -22473,7 +22583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3032;
+ return 3042;
}
}
else
@@ -22484,7 +22594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3036;
+ return 3046;
}
else
{
@@ -22492,7 +22602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3038;
+ return 3048;
}
}
}
@@ -22506,7 +22616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3033;
+ return 3043;
}
else
{
@@ -22514,7 +22624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3035;
+ return 3045;
}
}
else
@@ -22525,7 +22635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3039;
+ return 3049;
}
else
{
@@ -22533,7 +22643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3041;
+ return 3051;
}
}
}
@@ -22567,7 +22677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 2995;
+ return 3005;
}
else
{
@@ -22575,7 +22685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3054;
+ return 3064;
}
}
else
@@ -22586,7 +22696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3001;
+ return 3011;
}
else
{
@@ -22594,7 +22704,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3056;
+ return 3066;
}
}
}
@@ -22608,7 +22718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 2998;
+ return 3008;
}
else
{
@@ -22616,7 +22726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3055;
+ return 3065;
}
}
else
@@ -22625,7 +22735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3004;
+ return 3014;
}
}
}
@@ -22641,7 +22751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3019;
+ return 3029;
}
else
{
@@ -22649,7 +22759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3060;
+ return 3070;
}
}
else
@@ -22660,7 +22770,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3025;
+ return 3035;
}
else
{
@@ -22668,7 +22778,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3062;
+ return 3072;
}
}
}
@@ -22682,7 +22792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3022;
+ return 3032;
}
else
{
@@ -22690,7 +22800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3061;
+ return 3071;
}
}
else
@@ -22699,7 +22809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3028;
+ return 3038;
}
}
}
@@ -22718,7 +22828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3007;
+ return 3017;
}
else
{
@@ -22726,7 +22836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3057;
+ return 3067;
}
}
else
@@ -22737,7 +22847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3013;
+ return 3023;
}
else
{
@@ -22745,7 +22855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3059;
+ return 3069;
}
}
}
@@ -22759,7 +22869,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3010;
+ return 3020;
}
else
{
@@ -22767,7 +22877,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3058;
+ return 3068;
}
}
else
@@ -22776,7 +22886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3016;
+ return 3026;
}
}
}
@@ -22792,7 +22902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3031;
+ return 3041;
}
else
{
@@ -22800,7 +22910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3063;
+ return 3073;
}
}
else
@@ -22811,7 +22921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3037;
+ return 3047;
}
else
{
@@ -22819,7 +22929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3065;
+ return 3075;
}
}
}
@@ -22833,7 +22943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3034;
+ return 3044;
}
else
{
@@ -22841,7 +22951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3064;
+ return 3074;
}
}
else
@@ -22850,7 +22960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3040;
+ return 3050;
}
}
}
@@ -23017,7 +23127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2921;
+ return 2931;
}
}
}
@@ -23050,7 +23160,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2847;
+ return 2857;
}
}
else
@@ -23124,7 +23234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2923;
+ return 2933;
}
}
}
@@ -23157,7 +23267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2924;
+ return 2934;
}
}
else
@@ -23204,7 +23314,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2854;
+ return 2864;
}
else
{
@@ -23212,7 +23322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2856;
+ return 2866;
}
}
else
@@ -23223,7 +23333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2858;
+ return 2868;
}
else
{
@@ -23237,7 +23347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2859;
+ return 2869;
}
else
{
@@ -23245,7 +23355,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2852;
+ return 2862;
}
}
else
@@ -23254,7 +23364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2861;
+ return 2871;
}
}
else
@@ -23267,7 +23377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2860;
+ return 2870;
}
else
{
@@ -23275,7 +23385,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2865;
+ return 2875;
}
}
else
@@ -23284,7 +23394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2862;
+ return 2872;
}
}
}
@@ -23465,7 +23575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2846;
+ return 2856;
}
}
else
@@ -23496,7 +23606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2922;
+ return 2932;
}
else
{
@@ -23515,7 +23625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2938;
+ return 2948;
}
else
{
@@ -23525,7 +23635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2936;
+ return 2946;
}
else
{
@@ -23535,7 +23645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2943;
+ return 2953;
}
else
{
@@ -23543,7 +23653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2942;
+ return 2952;
}
}
}
@@ -24127,7 +24237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2939;
+ return 2949;
}
else
{
@@ -24135,7 +24245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2940;
+ return 2950;
}
}
}
@@ -24453,7 +24563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2857;
+ return 2867;
}
}
else
@@ -25064,7 +25174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2850;
+ return 2860;
}
}
}
@@ -25116,7 +25226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2863;
+ return 2873;
}
}
}
@@ -25359,7 +25469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2853;
+ return 2863;
}
}
else
@@ -25435,7 +25545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2866;
+ return 2876;
}
}
else
@@ -26261,7 +26371,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2851;
+ return 2861;
}
}
else
@@ -26293,7 +26403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2864;
+ return 2874;
}
}
else
@@ -26533,7 +26643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2855;
+ return 2865;
}
}
else
@@ -26565,7 +26675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2869;
+ return 2879;
}
else
{
@@ -26573,7 +26683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2873;
+ return 2883;
}
}
}
@@ -26595,7 +26705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2870;
+ return 2880;
}
else
{
@@ -26603,7 +26713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2874;
+ return 2884;
}
}
}
@@ -26642,7 +26752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2867;
+ return 2877;
}
else
{
@@ -26650,7 +26760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2871;
+ return 2881;
}
}
else
@@ -26672,7 +26782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2868;
+ return 2878;
}
else
{
@@ -26680,7 +26790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2872;
+ return 2882;
}
}
else
@@ -28488,7 +28598,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2875;
+ return 2885;
}
else
{
@@ -28496,7 +28606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2879;
+ return 2889;
}
}
else
@@ -28518,7 +28628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2876;
+ return 2886;
}
else
{
@@ -28526,7 +28636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2880;
+ return 2890;
}
}
else
@@ -29032,7 +29142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2877;
+ return 2887;
}
else
{
@@ -29040,7 +29150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2881;
+ return 2891;
}
}
}
@@ -29062,7 +29172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2878;
+ return 2888;
}
else
{
@@ -29070,7 +29180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2882;
+ return 2892;
}
}
}
@@ -29126,7 +29236,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2849;
+ return 2859;
}
else
{
@@ -29134,7 +29244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2848;
+ return 2858;
}
}
}
@@ -29237,7 +29347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2926;
+ return 2936;
}
else
{
@@ -29245,7 +29355,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2925;
+ return 2935;
}
}
else
@@ -29256,7 +29366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2937;
+ return 2947;
}
else
{
@@ -29266,7 +29376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2945;
+ return 2955;
}
else
{
@@ -29274,7 +29384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2944;
+ return 2954;
}
}
}
@@ -29765,22 +29875,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
+ case 2592: value = 2600; break; /* mov --> mova. */
+ case 2600: return NULL; /* mova --> NULL. */
+ case 2588: value = 2596; break; /* mov --> mova. */
+ case 2596: return NULL; /* mova --> NULL. */
case 2590: value = 2598; break; /* mov --> mova. */
case 2598: return NULL; /* mova --> NULL. */
case 2586: value = 2594; break; /* mov --> mova. */
case 2594: return NULL; /* mova --> NULL. */
- case 2588: value = 2596; break; /* mov --> mova. */
- case 2596: return NULL; /* mova --> NULL. */
- case 2584: value = 2592; break; /* mov --> mova. */
- case 2592: return NULL; /* mova --> NULL. */
+ case 2593: value = 2601; break; /* mov --> mova. */
+ case 2601: return NULL; /* mova --> NULL. */
+ case 2589: value = 2597; break; /* mov --> mova. */
+ case 2597: return NULL; /* mova --> NULL. */
case 2591: value = 2599; break; /* mov --> mova. */
case 2599: return NULL; /* mova --> NULL. */
case 2587: value = 2595; break; /* mov --> mova. */
case 2595: return NULL; /* mova --> NULL. */
- case 2589: value = 2597; break; /* mov --> mova. */
- case 2597: return NULL; /* mova --> NULL. */
- case 2585: value = 2593; break; /* mov --> mova. */
- case 2593: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -29802,11 +29912,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3067; break; /* addg --> smax. */
- case 3067: value = 3068; break; /* smax --> umax. */
- case 3068: value = 3069; break; /* umax --> smin. */
- case 3069: value = 3070; break; /* smin --> umin. */
- case 3070: return NULL; /* umin --> NULL. */
+ case 19: value = 3077; break; /* addg --> smax. */
+ case 3077: value = 3078; break; /* smax --> umax. */
+ case 3078: value = 3079; break; /* umax --> smin. */
+ case 3079: value = 3080; break; /* smin --> umin. */
+ case 3080: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -29964,8 +30074,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2941; break; /* fcvt --> bfcvt. */
- case 2941: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2951; break; /* fcvt --> bfcvt. */
+ case 2951: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 2012615e519..51dfc60e116 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5371,6 +5371,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("bfmlsl", 0xc1300818, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("bfmlsl", 0xc1a00818, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("bfmlsl", 0xc1a10818, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("bfvdot", 0xc1500018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
@@ -5426,6 +5427,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("fmlsl", 0xc1a10808, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fsub", 0xc1a01c08, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fsub", 0xc1a11c08, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fvdot", 0xc1500008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("ld1b", 0xa0400000, 0xfff0e001, sve_misc, 0, OP3 (SME_Zdnx2, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
SME2_INSN ("ld1b", 0xa0408000, 0xfff0e003, sve_misc, 0, OP3 (SME_Zdnx4, SME_PNg3, SVE_ADDR_RI_S4x4xVL), OP_SVE_BZU, 0, 0),
SME2_INSN ("ld1b", 0xa1400000, 0xfff0e008, sve_misc, 0, OP3 (SME_Ztx2_STRIDED, SME_PNg3, SVE_ADDR_RI_S4x2xVL), OP_SVE_BZU, 0, 0),
@@ -5660,6 +5662,9 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("sumlall", 0xc1108030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("sumlall", 0xc1200014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("sumlall", 0xc1300014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("suvdot", 0xc1508038, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("svdot", 0xc1500020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("svdot", 0xc1508020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("udot", 0xc1501010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("udot", 0xc1509010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("udot", 0xc1601418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
@@ -5730,6 +5735,9 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("usmlall", 0xc1300004, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("usmlall", 0xc1a00004, 0xffe19c3e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("usmlall", 0xc1a10004, 0xffe39c7e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("usvdot", 0xc1508028, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("uvdot", 0xc1500030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("uvdot", 0xc1508030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
@@ -5749,6 +5757,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_I16I64_INSN ("smlsll", 0xc1800008, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
SME2_I16I64_INSN ("smlsll", 0xc1900008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("smlsll", 0xc1908008, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("svdot", 0xc1d08808, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (4), 0),
SME2_I16I64_INSN ("udot", 0xc1d00018, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("udot", 0xc1d08018, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (4), 0),
SME2_I16I64_INSN ("umlall", 0xc1800010, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
@@ -5757,6 +5766,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_I16I64_INSN ("umlsll", 0xc1800018, 0xfff0101c, sme_misc, 0, OP3 (SME_ZA_array_off2x4, SVE_Zn, SME_Zm_INDEX3_10), OP_SVE_DHH, 0, 0),
SME2_I16I64_INSN ("umlsll", 0xc1900018, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (2), 0),
SME2_I16I64_INSN ("umlsll", 0xc1908018, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX3_1), OP_SVE_DHH, F_OD (4), 0),
+ SME2_I16I64_INSN ("uvdot", 0xc1d08818, 0xfff09878, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (4), 0),
/* SME2 F64F64 instructions. */
SME2_F64F64_INSN ("fmla", 0xc1d00000, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DDD, F_OD (2), 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 18/31] aarch64: Add the SME2 MOPA and MOPS instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (16 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 17/31] aarch64: Add the SME2 vertical " Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 19/31] aarch64: Add the SME2 CLAMP instructions Richard Sandiford
` (14 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
[BSU]MOP[AS] share the same format.
---
gas/testsuite/gas/aarch64/sme2-21-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-21-invalid.l | 18 +
gas/testsuite/gas/aarch64/sme2-21-invalid.s | 12 +
gas/testsuite/gas/aarch64/sme2-21-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-21-noarch.l | 43 +
gas/testsuite/gas/aarch64/sme2-21.d | 51 +
gas/testsuite/gas/aarch64/sme2-21.s | 47 +
opcodes/aarch64-dis-2.c | 1500 ++++++++++---------
opcodes/aarch64-tbl.h | 6 +
9 files changed, 966 insertions(+), 717 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-21-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-21-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-21-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-21-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-21-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-21.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-21.s
diff --git a/gas/testsuite/gas/aarch64/sme2-21-invalid.d b/gas/testsuite/gas/aarch64/sme2-21-invalid.d
new file mode 100644
index 00000000000..5d1d1f4091e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-21-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-21-invalid.s
+#error_output: sme2-21-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-21-invalid.l b/gas/testsuite/gas/aarch64/sme2-21-invalid.l
new file mode 100644
index 00000000000..c148ab2ece7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-21-invalid.l
@@ -0,0 +1,18 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a ZA tile at operand 1 -- `bmopa 0,p0/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `bmopa za0\.s,0,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 3 -- `bmopa za0\.s,p0/m,0,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `bmopa za0\.s,p0/m,p0/m,0,z0\.s'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 5 -- `bmopa za0\.s,p0/m,p0/m,z0\.s,0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bmopa za0\.b,p0/m,p0/m,z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bmopa za0\.s, p0/m, p0/m, z0\.s, z0\.s
+[^ :]+:[0-9]+: Error: operand mismatch -- `bmopa za0\.b,p0/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bmopa za0\.s, p0/m, p0/m, z0\.s, z0\.s
+[^ :]+:[0-9]+: Error: operand mismatch -- `bmopa za0\.s,p0/m,p0/m,z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bmopa za0\.s, p0/m, p0/m, z0\.s, z0\.s
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `bmopa za4\.s,p0/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `bmopa za0\.s,p8/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `bmopa za4\.s,p0/m,p8/m,z0\.s,z0\.s'
diff --git a/gas/testsuite/gas/aarch64/sme2-21-invalid.s b/gas/testsuite/gas/aarch64/sme2-21-invalid.s
new file mode 100644
index 00000000000..91a3e8f70c0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-21-invalid.s
@@ -0,0 +1,12 @@
+ bmopa 0, p0/m, p0/m, z0.s, z0.s
+ bmopa za0.s, 0, p0/m, z0.s, z0.s
+ bmopa za0.s, p0/m, 0, z0.s, z0.s
+ bmopa za0.s, p0/m, p0/m, 0, z0.s
+ bmopa za0.s, p0/m, p0/m, z0.s, 0
+
+ bmopa za0.b, p0/m, p0/m, z0.b, z0.b
+ bmopa za0.b, p0/m, p0/m, z0.s, z0.s
+ bmopa za0.s, p0/m, p0/m, z0.b, z0.b
+ bmopa za4.s, p0/m, p0/m, z0.s, z0.s
+ bmopa za0.s, p8/m, p0/m, z0.s, z0.s
+ bmopa za4.s, p0/m, p8/m, z0.s, z0.s
diff --git a/gas/testsuite/gas/aarch64/sme2-21-noarch.d b/gas/testsuite/gas/aarch64/sme2-21-noarch.d
new file mode 100644
index 00000000000..830ef05c601
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-21-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-21.s
+#error_output: sme2-21-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-21-noarch.l b/gas/testsuite/gas/aarch64/sme2-21-noarch.l
new file mode 100644
index 00000000000..64842d9714c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-21-noarch.l
@@ -0,0 +1,43 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bmopa za0\.s,p0/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmopa za3\.s,p0/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmopa za0\.s,p7/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmopa za0\.s,p0/m,p7/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmopa za0\.s,p0/m,p0/m,z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmopa za0\.s,p0/m,p0/m,z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmopa za2\.s,p6/m,p3/m,z19\.s,z8\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmops za0\.s,p0/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmops za3\.s,p0/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmops za0\.s,p7/m,p0/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmops za0\.s,p0/m,p7/m,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmops za0\.s,p0/m,p0/m,z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmops za0\.s,p0/m,p0/m,z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `bmops za1\.s,p3/m,p5/m,z24\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `smopa za0\.s,p0/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smopa za3\.s,p0/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smopa za0\.s,p7/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smopa za0\.s,p0/m,p7/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smopa za0\.s,p0/m,p0/m,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smopa za0\.s,p0/m,p0/m,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smopa za1\.s,p2/m,p3/m,z14\.h,z25\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smops za0\.s,p0/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smops za3\.s,p0/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smops za0\.s,p7/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smops za0\.s,p0/m,p7/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smops za0\.s,p0/m,p0/m,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smops za0\.s,p0/m,p0/m,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `smops za1\.s,p2/m,p3/m,z14\.h,z25\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umopa za0\.s,p0/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umopa za3\.s,p0/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umopa za0\.s,p7/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umopa za0\.s,p0/m,p7/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umopa za0\.s,p0/m,p0/m,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umopa za0\.s,p0/m,p0/m,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umopa za1\.s,p2/m,p3/m,z14\.h,z25\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umops za0\.s,p0/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umops za3\.s,p0/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umops za0\.s,p7/m,p0/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umops za0\.s,p0/m,p7/m,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umops za0\.s,p0/m,p0/m,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umops za0\.s,p0/m,p0/m,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `umops za1\.s,p2/m,p3/m,z14\.h,z25\.h'
diff --git a/gas/testsuite/gas/aarch64/sme2-21.d b/gas/testsuite/gas/aarch64/sme2-21.d
new file mode 100644
index 00000000000..255a56d9b70
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-21.d
@@ -0,0 +1,51 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 80800008 bmopa za0\.s, p0/m, p0/m, z0\.s, z0\.s
+[^:]+: 8080000b bmopa za3\.s, p0/m, p0/m, z0\.s, z0\.s
+[^:]+: 80801c08 bmopa za0\.s, p7/m, p0/m, z0\.s, z0\.s
+[^:]+: 8080e008 bmopa za0\.s, p0/m, p7/m, z0\.s, z0\.s
+[^:]+: 808003e8 bmopa za0\.s, p0/m, p0/m, z31\.s, z0\.s
+[^:]+: 809f0008 bmopa za0\.s, p0/m, p0/m, z0\.s, z31\.s
+[^:]+: 80887a6a bmopa za2\.s, p6/m, p3/m, z19\.s, z8\.s
+[^:]+: 80800018 bmops za0\.s, p0/m, p0/m, z0\.s, z0\.s
+[^:]+: 8080001b bmops za3\.s, p0/m, p0/m, z0\.s, z0\.s
+[^:]+: 80801c18 bmops za0\.s, p7/m, p0/m, z0\.s, z0\.s
+[^:]+: 8080e018 bmops za0\.s, p0/m, p7/m, z0\.s, z0\.s
+[^:]+: 808003f8 bmops za0\.s, p0/m, p0/m, z31\.s, z0\.s
+[^:]+: 809f0018 bmops za0\.s, p0/m, p0/m, z0\.s, z31\.s
+[^:]+: 8086af19 bmops za1\.s, p3/m, p5/m, z24\.s, z6\.s
+[^:]+: a0800008 smopa za0\.s, p0/m, p0/m, z0\.h, z0\.h
+[^:]+: a080000b smopa za3\.s, p0/m, p0/m, z0\.h, z0\.h
+[^:]+: a0801c08 smopa za0\.s, p7/m, p0/m, z0\.h, z0\.h
+[^:]+: a080e008 smopa za0\.s, p0/m, p7/m, z0\.h, z0\.h
+[^:]+: a08003e8 smopa za0\.s, p0/m, p0/m, z31\.h, z0\.h
+[^:]+: a09f0008 smopa za0\.s, p0/m, p0/m, z0\.h, z31\.h
+[^:]+: a09969c9 smopa za1\.s, p2/m, p3/m, z14\.h, z25\.h
+[^:]+: a0800018 smops za0\.s, p0/m, p0/m, z0\.h, z0\.h
+[^:]+: a080001b smops za3\.s, p0/m, p0/m, z0\.h, z0\.h
+[^:]+: a0801c18 smops za0\.s, p7/m, p0/m, z0\.h, z0\.h
+[^:]+: a080e018 smops za0\.s, p0/m, p7/m, z0\.h, z0\.h
+[^:]+: a08003f8 smops za0\.s, p0/m, p0/m, z31\.h, z0\.h
+[^:]+: a09f0018 smops za0\.s, p0/m, p0/m, z0\.h, z31\.h
+[^:]+: a09969d9 smops za1\.s, p2/m, p3/m, z14\.h, z25\.h
+[^:]+: a1800008 umopa za0\.s, p0/m, p0/m, z0\.h, z0\.h
+[^:]+: a180000b umopa za3\.s, p0/m, p0/m, z0\.h, z0\.h
+[^:]+: a1801c08 umopa za0\.s, p7/m, p0/m, z0\.h, z0\.h
+[^:]+: a180e008 umopa za0\.s, p0/m, p7/m, z0\.h, z0\.h
+[^:]+: a18003e8 umopa za0\.s, p0/m, p0/m, z31\.h, z0\.h
+[^:]+: a19f0008 umopa za0\.s, p0/m, p0/m, z0\.h, z31\.h
+[^:]+: a19969c9 umopa za1\.s, p2/m, p3/m, z14\.h, z25\.h
+[^:]+: a1800018 umops za0\.s, p0/m, p0/m, z0\.h, z0\.h
+[^:]+: a180001b umops za3\.s, p0/m, p0/m, z0\.h, z0\.h
+[^:]+: a1801c18 umops za0\.s, p7/m, p0/m, z0\.h, z0\.h
+[^:]+: a180e018 umops za0\.s, p0/m, p7/m, z0\.h, z0\.h
+[^:]+: a18003f8 umops za0\.s, p0/m, p0/m, z31\.h, z0\.h
+[^:]+: a19f0018 umops za0\.s, p0/m, p0/m, z0\.h, z31\.h
+[^:]+: a19969d9 umops za1\.s, p2/m, p3/m, z14\.h, z25\.h
diff --git a/gas/testsuite/gas/aarch64/sme2-21.s b/gas/testsuite/gas/aarch64/sme2-21.s
new file mode 100644
index 00000000000..a924b7d83a6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-21.s
@@ -0,0 +1,47 @@
+ bmopa za0.s, p0/m, p0/m, z0.s, z0.s
+ bmopa za3.s, p0/m, p0/m, z0.s, z0.s
+ bmopa za0.s, p7/m, p0/m, z0.s, z0.s
+ bmopa za0.s, p0/m, p7/m, z0.s, z0.s
+ bmopa za0.s, p0/m, p0/m, z31.s, z0.s
+ bmopa za0.s, p0/m, p0/m, z0.s, z31.s
+ bmopa za2.s, p6/m, p3/m, z19.s, z8.s
+
+ bmops za0.s, p0/m, p0/m, z0.s, z0.s
+ bmops za3.s, p0/m, p0/m, z0.s, z0.s
+ bmops za0.s, p7/m, p0/m, z0.s, z0.s
+ bmops za0.s, p0/m, p7/m, z0.s, z0.s
+ bmops za0.s, p0/m, p0/m, z31.s, z0.s
+ bmops za0.s, p0/m, p0/m, z0.s, z31.s
+ bmops za1.s, p3/m, p5/m, z24.s, z6.s
+
+ smopa za0.s, p0/m, p0/m, z0.h, z0.h
+ smopa za3.s, p0/m, p0/m, z0.h, z0.h
+ smopa za0.s, p7/m, p0/m, z0.h, z0.h
+ smopa za0.s, p0/m, p7/m, z0.h, z0.h
+ smopa za0.s, p0/m, p0/m, z31.h, z0.h
+ smopa za0.s, p0/m, p0/m, z0.h, z31.h
+ smopa za1.s, p2/m, p3/m, z14.h, z25.h
+
+ smops za0.s, p0/m, p0/m, z0.h, z0.h
+ smops za3.s, p0/m, p0/m, z0.h, z0.h
+ smops za0.s, p7/m, p0/m, z0.h, z0.h
+ smops za0.s, p0/m, p7/m, z0.h, z0.h
+ smops za0.s, p0/m, p0/m, z31.h, z0.h
+ smops za0.s, p0/m, p0/m, z0.h, z31.h
+ smops za1.s, p2/m, p3/m, z14.h, z25.h
+
+ umopa za0.s, p0/m, p0/m, z0.h, z0.h
+ umopa za3.s, p0/m, p0/m, z0.h, z0.h
+ umopa za0.s, p7/m, p0/m, z0.h, z0.h
+ umopa za0.s, p0/m, p7/m, z0.h, z0.h
+ umopa za0.s, p0/m, p0/m, z31.h, z0.h
+ umopa za0.s, p0/m, p0/m, z0.h, z31.h
+ umopa za1.s, p2/m, p3/m, z14.h, z25.h
+
+ umops za0.s, p0/m, p0/m, z0.h, z0.h
+ umops za3.s, p0/m, p0/m, z0.h, z0.h
+ umops za0.s, p7/m, p0/m, z0.h, z0.h
+ umops za0.s, p0/m, p7/m, z0.h, z0.h
+ umops za0.s, p0/m, p0/m, z31.h, z0.h
+ umops za0.s, p0/m, p0/m, z0.h, z31.h
+ umops za1.s, p2/m, p3/m, z14.h, z25.h
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index ddd0a68970a..672475aee5b 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -54,21 +54,43 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 4) & 0x1) == 0)
+ if (((word >> 3) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0000000100xxxxxxxxxxxxxxxx0xxxx
- fmopa. */
- return 2365;
+ if (((word >> 4) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000000100xxxxxxxxxxxxxxxx00xxx
+ fmopa. */
+ return 2365;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000000100xxxxxxxxxxxxxxxx10xxx
+ fmops. */
+ return 2368;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0000000100xxxxxxxxxxxxxxxx1xxxx
- fmops. */
- return 2368;
+ if (((word >> 4) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000000100xxxxxxxxxxxxxxxx01xxx
+ bmopa. */
+ return 2459;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0000000100xxxxxxxxxxxxxxxx11xxx
+ bmops. */
+ return 2460;
+ }
}
}
}
@@ -166,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2833;
+ return 2839;
}
}
}
@@ -190,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2585;
+ return 2587;
}
else
{
@@ -198,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2584;
+ return 2586;
}
}
else
@@ -207,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2583;
+ return 2585;
}
}
}
@@ -226,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2592;
+ return 2594;
}
else
{
@@ -234,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2588;
+ return 2590;
}
}
else
@@ -247,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2582;
+ return 2584;
}
else
{
@@ -255,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2581;
+ return 2583;
}
}
else
@@ -268,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2603;
+ return 2605;
}
else
{
@@ -276,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2602;
+ return 2604;
}
}
else
@@ -285,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2580;
+ return 2582;
}
}
}
@@ -298,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2590;
+ return 2592;
}
else
{
@@ -306,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2586;
+ return 2588;
}
}
}
@@ -320,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2593;
+ return 2595;
}
else
{
@@ -328,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2589;
+ return 2591;
}
}
else
@@ -339,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2591;
+ return 2593;
}
else
{
@@ -347,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2587;
+ return 2589;
}
}
}
@@ -374,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2519;
+ return 2521;
}
else
{
@@ -382,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2520;
+ return 2522;
}
}
else
@@ -393,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2543;
+ return 2545;
}
else
{
@@ -401,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2544;
+ return 2546;
}
}
}
@@ -415,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2535;
+ return 2537;
}
else
{
@@ -423,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2536;
+ return 2538;
}
}
else
@@ -434,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2527;
+ return 2529;
}
else
{
@@ -442,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2528;
+ return 2530;
}
}
}
@@ -459,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2551;
+ return 2553;
}
else
{
@@ -467,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2552;
+ return 2554;
}
}
else
@@ -478,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2575;
+ return 2577;
}
else
{
@@ -486,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2576;
+ return 2578;
}
}
}
@@ -500,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2567;
+ return 2569;
}
else
{
@@ -508,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2568;
+ return 2570;
}
}
else
@@ -519,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2559;
+ return 2561;
}
else
{
@@ -527,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2560;
+ return 2562;
}
}
}
@@ -548,11 +570,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 30) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x0100000100xxxxxxxxxxxxxxxx0xxxx
- smopa. */
- return 2372;
+ if (((word >> 3) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000100xxxxxxxxxxxxxxxx00xxx
+ smopa. */
+ return 2372;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x0100000100xxxxxxxxxxxxxxxx01xxx
+ smopa. */
+ return 2663;
+ }
}
else
{
@@ -565,11 +598,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xx100000100xxxxxxxxxxxxxxxx1xxxx
- smops. */
- return 2374;
+ if (((word >> 3) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100000100xxxxxxxxxxxxxxxx10xxx
+ smops. */
+ return 2374;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100000100xxxxxxxxxxxxxxxx11xxx
+ smops. */
+ return 2664;
+ }
}
}
}
@@ -591,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2515;
+ return 2517;
}
else
{
@@ -599,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2516;
+ return 2518;
}
}
else
@@ -610,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2539;
+ return 2541;
}
else
{
@@ -618,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2540;
+ return 2542;
}
}
}
@@ -632,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2531;
+ return 2533;
}
else
{
@@ -640,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2532;
+ return 2534;
}
}
else
@@ -651,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2523;
+ return 2525;
}
else
{
@@ -659,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2524;
+ return 2526;
}
}
}
@@ -676,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2547;
+ return 2549;
}
else
{
@@ -684,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2548;
+ return 2550;
}
}
else
@@ -695,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2571;
+ return 2573;
}
else
{
@@ -703,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2572;
+ return 2574;
}
}
}
@@ -717,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2563;
+ return 2565;
}
else
{
@@ -725,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2564;
+ return 2566;
}
}
else
@@ -736,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2555;
+ return 2557;
}
else
{
@@ -744,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2556;
+ return 2558;
}
}
}
@@ -812,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2673;
+ return 2677;
}
else
{
@@ -820,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2674;
+ return 2678;
}
}
else
@@ -831,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2697;
+ return 2701;
}
else
{
@@ -839,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2698;
+ return 2702;
}
}
}
@@ -853,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2689;
+ return 2693;
}
else
{
@@ -861,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2690;
+ return 2694;
}
}
else
@@ -872,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2681;
+ return 2685;
}
else
{
@@ -880,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2682;
+ return 2686;
}
}
}
@@ -897,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2705;
+ return 2709;
}
else
{
@@ -905,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2706;
+ return 2710;
}
}
else
@@ -916,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2729;
+ return 2733;
}
else
{
@@ -924,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2730;
+ return 2734;
}
}
}
@@ -938,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2721;
+ return 2725;
}
else
{
@@ -946,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2722;
+ return 2726;
}
}
else
@@ -957,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2713;
+ return 2717;
}
else
{
@@ -965,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2714;
+ return 2718;
}
}
}
@@ -1029,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2669;
+ return 2673;
}
else
{
@@ -1037,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2670;
+ return 2674;
}
}
else
@@ -1048,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2693;
+ return 2697;
}
else
{
@@ -1056,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2694;
+ return 2698;
}
}
}
@@ -1070,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2685;
+ return 2689;
}
else
{
@@ -1078,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2686;
+ return 2690;
}
}
else
@@ -1089,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2677;
+ return 2681;
}
else
{
@@ -1097,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2678;
+ return 2682;
}
}
}
@@ -1114,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2701;
+ return 2705;
}
else
{
@@ -1122,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2702;
+ return 2706;
}
}
else
@@ -1133,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2725;
+ return 2729;
}
else
{
@@ -1141,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2726;
+ return 2730;
}
}
}
@@ -1155,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2717;
+ return 2721;
}
else
{
@@ -1163,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2718;
+ return 2722;
}
}
else
@@ -1174,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2709;
+ return 2713;
}
else
{
@@ -1182,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2710;
+ return 2714;
}
}
}
@@ -1274,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2637;
+ return 2639;
}
else
{
@@ -1282,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2814;
+ return 2820;
}
}
else
@@ -1295,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2638;
+ return 2640;
}
else
{
@@ -1303,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2639;
+ return 2641;
}
}
else
@@ -1314,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2815;
+ return 2821;
}
else
{
@@ -1322,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2816;
+ return 2822;
}
}
}
@@ -1337,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2780;
+ return 2784;
}
else
{
@@ -1345,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2744;
+ return 2748;
}
}
else
@@ -1358,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2781;
+ return 2785;
}
else
{
@@ -1366,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2782;
+ return 2786;
}
}
else
@@ -1377,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2745;
+ return 2749;
}
else
{
@@ -1385,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2746;
+ return 2750;
}
}
}
@@ -1401,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2653;
+ return 2655;
}
else
{
@@ -1411,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2654;
+ return 2656;
}
else
{
@@ -1419,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2655;
+ return 2657;
}
}
}
@@ -1431,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2796;
+ return 2800;
}
else
{
@@ -1441,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2797;
+ return 2801;
}
else
{
@@ -1449,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2798;
+ return 2802;
}
}
}
@@ -1471,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2521;
+ return 2523;
}
else
{
@@ -1479,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2545;
+ return 2547;
}
}
else
@@ -1490,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2537;
+ return 2539;
}
else
{
@@ -1498,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2529;
+ return 2531;
}
}
}
@@ -1512,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2553;
+ return 2555;
}
else
{
@@ -1520,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2577;
+ return 2579;
}
}
else
@@ -1531,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2569;
+ return 2571;
}
else
{
@@ -1539,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2561;
+ return 2563;
}
}
}
@@ -1567,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2522;
+ return 2524;
}
else
{
@@ -1575,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2579;
+ return 2581;
}
}
else
@@ -1584,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2546;
+ return 2548;
}
}
else
@@ -1595,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2538;
+ return 2540;
}
else
{
@@ -1603,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2530;
+ return 2532;
}
}
}
@@ -1617,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2554;
+ return 2556;
}
else
{
@@ -1625,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2578;
+ return 2580;
}
}
else
@@ -1636,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2570;
+ return 2572;
}
else
{
@@ -1644,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2562;
+ return 2564;
}
}
}
@@ -1677,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2836;
+ return 2842;
}
else
{
@@ -1687,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2837;
+ return 2843;
}
else
{
@@ -1695,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2838;
+ return 2844;
}
}
}
@@ -1707,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2490;
+ return 2492;
}
else
{
@@ -1717,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2491;
+ return 2493;
}
else
{
@@ -1725,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2492;
+ return 2494;
}
}
}
@@ -1762,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2845;
+ return 2851;
}
else
{
@@ -1772,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2846;
+ return 2852;
}
else
{
@@ -1780,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2847;
+ return 2853;
}
}
}
@@ -1830,129 +1874,151 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 4) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011000xxxxxxx0xxxxxxx01xxx
- smlsll. */
- return 2839;
- }
- else
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011001xxxx0xx0xxxxxxx01xxx
+ xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2840;
+ return 2845;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011001xxxx1xx0xxxxxxx01xxx
- smlsll. */
- return 2841;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011001xxxx0xx0xxxxxxx01xxx
+ smlsll. */
+ return 2846;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011001xxxx1xx0xxxxxxx01xxx
+ smlsll. */
+ return 2847;
+ }
}
}
- }
- else
- {
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011000xxxxxxx1xxxxxxx01xxx
- fmlsl. */
- return 2504;
- }
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011001xxxx0xx1xxxxxxx01xxx
+ xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2505;
+ return 2506;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011001xxxx1xx1xxxxxxx01xxx
- fmlsl. */
- return 2506;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011001xxxx0xx1xxxxxxx01xxx
+ fmlsl. */
+ return 2507;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011001xxxx1xx1xxxxxxx01xxx
+ fmlsl. */
+ return 2508;
+ }
}
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001100xxxxxxxxxxxxxxxx01xxx
+ umopa. */
+ return 2808;
+ }
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011000xxxxxxx0xxxxxxx11xxx
- umlsll. */
- return 2848;
- }
- else
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011001xxxx0xx0xxxxxxx11xxx
+ xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2849;
+ return 2854;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011001xxxx1xx0xxxxxxx11xxx
- umlsll. */
- return 2850;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011001xxxx0xx0xxxxxxx11xxx
+ umlsll. */
+ return 2855;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011001xxxx1xx0xxxxxxx11xxx
+ umlsll. */
+ return 2856;
+ }
}
}
- }
- else
- {
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011000xxxxxxx1xxxxxxx11xxx
- bfmlsl. */
- return 2450;
- }
else
{
- if (((word >> 15) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxx000011001xxxx0xx1xxxxxxx11xxx
+ xx0000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2451;
+ return 2450;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxx000011001xxxx1xx1xxxxxxx11xxx
- bfmlsl. */
- return 2452;
+ if (((word >> 15) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011001xxxx0xx1xxxxxxx11xxx
+ bfmlsl. */
+ return 2451;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx0000011001xxxx1xx1xxxxxxx11xxx
+ bfmlsl. */
+ return 2452;
+ }
}
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xx100001100xxxxxxxxxxxxxxxx11xxx
+ umops. */
+ return 2809;
+ }
}
}
}
@@ -1975,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2517;
+ return 2519;
}
else
{
@@ -1983,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2541;
+ return 2543;
}
}
else
@@ -1994,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2533;
+ return 2535;
}
else
{
@@ -2002,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2525;
+ return 2527;
}
}
}
@@ -2018,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2484;
+ return 2486;
}
else
{
@@ -2026,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2607;
+ return 2609;
}
}
else
@@ -2037,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2750;
+ return 2754;
}
else
{
@@ -2045,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2613;
+ return 2615;
}
}
}
@@ -2059,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2498;
+ return 2500;
}
else
{
@@ -2067,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2752;
+ return 2756;
}
}
else
@@ -2078,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2823;
+ return 2829;
}
else
{
@@ -2086,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2758;
+ return 2762;
}
}
}
@@ -2104,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2518;
+ return 2520;
}
else
{
@@ -2112,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2542;
+ return 2544;
}
}
else
@@ -2123,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2534;
+ return 2536;
}
else
{
@@ -2131,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2526;
+ return 2528;
}
}
}
@@ -2147,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2485;
+ return 2487;
}
else
{
@@ -2155,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2608;
+ return 2610;
}
}
else
@@ -2166,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2751;
+ return 2755;
}
else
{
@@ -2174,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2614;
+ return 2616;
}
}
}
@@ -2188,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2499;
+ return 2501;
}
else
{
@@ -2196,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2753;
+ return 2757;
}
}
else
@@ -2207,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2824;
+ return 2830;
}
else
{
@@ -2215,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2759;
+ return 2763;
}
}
}
@@ -2236,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2549;
+ return 2551;
}
else
{
@@ -2244,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2573;
+ return 2575;
}
}
else
@@ -2255,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2565;
+ return 2567;
}
else
{
@@ -2263,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2557;
+ return 2559;
}
}
}
@@ -2279,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2514;
+ return 2516;
}
else
{
@@ -2287,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2462;
+ return 2464;
}
}
else
@@ -2296,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2808;
+ return 2814;
}
}
else
@@ -2326,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2740;
+ return 2744;
}
}
}
@@ -2343,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2550;
+ return 2552;
}
else
{
@@ -2351,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2574;
+ return 2576;
}
}
else
@@ -2362,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2566;
+ return 2568;
}
else
{
@@ -2370,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2558;
+ return 2560;
}
}
}
@@ -2384,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2463;
+ return 2465;
}
else
{
@@ -2394,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2822;
+ return 2828;
}
else
{
@@ -2402,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2809;
+ return 2815;
}
}
}
@@ -2424,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2749;
+ return 2753;
}
else
{
@@ -2432,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2741;
+ return 2745;
}
}
}
@@ -2456,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2852;
+ return 2858;
}
else
{
@@ -2464,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2853;
+ return 2859;
}
}
else
@@ -2475,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2629;
+ return 2631;
}
else
{
@@ -2485,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2630;
+ return 2632;
}
else
{
@@ -2493,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2631;
+ return 2633;
}
}
}
@@ -2510,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2834;
+ return 2840;
}
else
{
@@ -2518,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2835;
+ return 2841;
}
}
else
@@ -2527,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2842;
+ return 2848;
}
}
else
@@ -2538,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2645;
+ return 2647;
}
else
{
@@ -2548,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2646;
+ return 2648;
}
else
{
@@ -2556,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2647;
+ return 2649;
}
}
}
@@ -2596,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2854;
+ return 2860;
}
else
{
@@ -2604,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2855;
+ return 2861;
}
}
else
@@ -2615,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2772;
+ return 2776;
}
else
{
@@ -2625,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2773;
+ return 2777;
}
else
{
@@ -2633,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2774;
+ return 2778;
}
}
}
@@ -2659,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2843;
+ return 2849;
}
else
{
@@ -2667,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2844;
+ return 2850;
}
}
else
@@ -2676,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2851;
+ return 2857;
}
}
else
@@ -2687,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2788;
+ return 2792;
}
else
{
@@ -2697,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2789;
+ return 2793;
}
else
{
@@ -2705,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2790;
+ return 2794;
}
}
}
@@ -2761,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2641;
+ return 2643;
}
else
{
@@ -2769,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2642;
+ return 2644;
}
}
else
@@ -2780,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2643;
+ return 2645;
}
else
{
@@ -2788,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2644;
+ return 2646;
}
}
}
@@ -2802,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2818;
+ return 2824;
}
else
{
@@ -2810,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2819;
+ return 2825;
}
}
else
@@ -2821,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2820;
+ return 2826;
}
else
{
@@ -2829,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2821;
+ return 2827;
}
}
}
@@ -2844,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2464;
+ return 2466;
}
else
{
@@ -2852,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2465;
+ return 2467;
}
}
else
@@ -2863,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2466;
+ return 2468;
}
else
{
@@ -2871,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2467;
+ return 2469;
}
}
}
@@ -2890,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2494;
+ return 2496;
}
else
{
@@ -2898,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2495;
+ return 2497;
}
}
else
@@ -2909,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2496;
+ return 2498;
}
else
{
@@ -2917,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2497;
+ return 2499;
}
}
}
@@ -2931,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2633;
+ return 2635;
}
else
{
@@ -2939,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2634;
+ return 2636;
}
}
else
@@ -2950,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2635;
+ return 2637;
}
else
{
@@ -2958,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2636;
+ return 2638;
}
}
}
@@ -2973,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2486;
+ return 2488;
}
else
{
@@ -2981,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2487;
+ return 2489;
}
}
else
@@ -2992,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2488;
+ return 2490;
}
else
{
@@ -3000,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2489;
+ return 2491;
}
}
}
@@ -3018,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2640;
+ return 2642;
}
else
{
@@ -3026,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2817;
+ return 2823;
}
}
else
@@ -3039,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2615;
+ return 2617;
}
else
{
@@ -3047,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2616;
+ return 2618;
}
}
else
@@ -3058,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2617;
+ return 2619;
}
else
{
@@ -3066,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2618;
+ return 2620;
}
}
}
@@ -3081,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2493;
+ return 2495;
}
else
{
@@ -3089,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2632;
+ return 2634;
}
}
else
@@ -3100,7 +3166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2460;
+ return 2462;
}
else
{
@@ -3108,7 +3174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2461;
+ return 2463;
}
}
}
@@ -3132,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2784;
+ return 2788;
}
else
{
@@ -3140,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2785;
+ return 2789;
}
}
else
@@ -3151,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2786;
+ return 2790;
}
else
{
@@ -3159,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2787;
+ return 2791;
}
}
}
@@ -3171,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2747;
+ return 2751;
}
else
{
@@ -3179,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2748;
+ return 2752;
}
}
}
@@ -3280,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2776;
+ return 2780;
}
else
{
@@ -3288,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2777;
+ return 2781;
}
}
else
@@ -3299,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2778;
+ return 2782;
}
else
{
@@ -3307,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2779;
+ return 2783;
}
}
}
@@ -3365,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2783;
+ return 2787;
}
else
{
@@ -3377,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2760;
+ return 2764;
}
else
{
@@ -3385,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2761;
+ return 2765;
}
}
else
@@ -3396,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2762;
+ return 2766;
}
else
{
@@ -3404,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2763;
+ return 2767;
}
}
}
@@ -3427,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2775;
+ return 2779;
}
}
else
@@ -3469,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2657;
+ return 2659;
}
else
{
@@ -3477,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2658;
+ return 2660;
}
}
else
@@ -3488,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2659;
+ return 2661;
}
else
{
@@ -3496,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2660;
+ return 2662;
}
}
}
@@ -3514,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2508;
+ return 2510;
}
else
{
@@ -3522,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2509;
+ return 2511;
}
}
else
@@ -3533,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2510;
+ return 2512;
}
else
{
@@ -3541,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2511;
+ return 2513;
}
}
}
@@ -3555,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2649;
+ return 2651;
}
else
{
@@ -3563,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2650;
+ return 2652;
}
}
else
@@ -3574,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2651;
+ return 2653;
}
else
{
@@ -3582,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2652;
+ return 2654;
}
}
}
@@ -3597,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2500;
+ return 2502;
}
else
{
@@ -3605,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2501;
+ return 2503;
}
}
else
@@ -3616,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2502;
+ return 2504;
}
else
{
@@ -3624,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2503;
+ return 2505;
}
}
}
@@ -3640,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2656;
+ return 2658;
}
else
{
@@ -3654,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2810;
+ return 2816;
}
else
{
@@ -3662,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2811;
+ return 2817;
}
}
else
@@ -3673,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2812;
+ return 2818;
}
else
{
@@ -3681,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2813;
+ return 2819;
}
}
}
@@ -3695,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2609;
+ return 2611;
}
else
{
@@ -3703,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2610;
+ return 2612;
}
}
else
@@ -3714,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2611;
+ return 2613;
}
else
{
@@ -3722,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2612;
+ return 2614;
}
}
}
@@ -3738,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2507;
+ return 2509;
}
else
{
@@ -3746,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2648;
+ return 2650;
}
}
else
@@ -3757,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2512;
+ return 2514;
}
else
{
@@ -3765,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2513;
+ return 2515;
}
}
}
@@ -3785,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2800;
+ return 2804;
}
else
{
@@ -3793,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2801;
+ return 2805;
}
}
else
@@ -3804,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2802;
+ return 2806;
}
else
{
@@ -3812,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2803;
+ return 2807;
}
}
}
@@ -3871,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2792;
+ return 2796;
}
else
{
@@ -3879,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2793;
+ return 2797;
}
}
else
@@ -3890,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2794;
+ return 2798;
}
else
{
@@ -3898,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2795;
+ return 2799;
}
}
}
@@ -3913,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2736;
+ return 2740;
}
else
{
@@ -3921,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2737;
+ return 2741;
}
}
else
@@ -3932,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2738;
+ return 2742;
}
else
{
@@ -3940,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2739;
+ return 2743;
}
}
}
@@ -3956,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2799;
+ return 2803;
}
else
{
@@ -3968,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2742;
+ return 2746;
}
else
{
@@ -3976,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2743;
+ return 2747;
}
}
else
@@ -3989,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2754;
+ return 2758;
}
else
{
@@ -3997,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2755;
+ return 2759;
}
}
else
@@ -4008,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2756;
+ return 2760;
}
else
{
@@ -4016,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2757;
+ return 2761;
}
}
}
@@ -4040,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2791;
+ return 2795;
}
}
else
@@ -4051,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2734;
+ return 2738;
}
else
{
@@ -4059,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2735;
+ return 2739;
}
}
}
@@ -4081,7 +4147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx01x0xxxxxxx0xxxx0
sel. */
- return 2619;
+ return 2621;
}
else
{
@@ -4089,7 +4155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx11x0xxxxxxx0xxxx0
sel. */
- return 2620;
+ return 2622;
}
}
else
@@ -4106,7 +4172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1000x0xx0xxxx0
smax. */
- return 2621;
+ return 2623;
}
else
{
@@ -4114,7 +4180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2623;
+ return 2625;
}
}
else
@@ -4125,7 +4191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2622;
+ return 2624;
}
else
{
@@ -4133,7 +4199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2624;
+ return 2626;
}
}
}
@@ -4147,7 +4213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2661;
+ return 2665;
}
else
{
@@ -4155,7 +4221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2663;
+ return 2667;
}
}
else
@@ -4166,7 +4232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2662;
+ return 2666;
}
else
{
@@ -4174,7 +4240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2664;
+ return 2668;
}
}
}
@@ -4191,7 +4257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x100x01xx0xxxx0
fmax. */
- return 2468;
+ return 2470;
}
else
{
@@ -4199,7 +4265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x01xx0xxxx0
fmax. */
- return 2470;
+ return 2472;
}
}
else
@@ -4210,7 +4276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x01xx0xxxx0
fmax. */
- return 2469;
+ return 2471;
}
else
{
@@ -4218,7 +4284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x01xx0xxxx0
fmax. */
- return 2471;
+ return 2473;
}
}
}
@@ -4258,7 +4324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx0
smin. */
- return 2625;
+ return 2627;
}
else
{
@@ -4266,7 +4332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx0
smin. */
- return 2627;
+ return 2629;
}
}
else
@@ -4277,7 +4343,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx0
smin. */
- return 2626;
+ return 2628;
}
else
{
@@ -4285,7 +4351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx0
smin. */
- return 2628;
+ return 2630;
}
}
}
@@ -4299,7 +4365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx0
srshl. */
- return 2665;
+ return 2669;
}
else
{
@@ -4307,7 +4373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx0
srshl. */
- return 2667;
+ return 2671;
}
}
else
@@ -4318,7 +4384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx0
srshl. */
- return 2666;
+ return 2670;
}
else
{
@@ -4326,7 +4392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx0
srshl. */
- return 2668;
+ return 2672;
}
}
}
@@ -4341,7 +4407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx0
fmaxnm. */
- return 2472;
+ return 2474;
}
else
{
@@ -4349,7 +4415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx0
fmaxnm. */
- return 2474;
+ return 2476;
}
}
else
@@ -4360,7 +4426,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx0
fmaxnm. */
- return 2473;
+ return 2475;
}
else
{
@@ -4368,7 +4434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx0
fmaxnm. */
- return 2475;
+ return 2477;
}
}
}
@@ -4388,7 +4454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx0xx0xxxx1
umax. */
- return 2764;
+ return 2768;
}
else
{
@@ -4396,7 +4462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx0xx0xxxx1
umax. */
- return 2766;
+ return 2770;
}
}
else
@@ -4407,7 +4473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx0xx0xxxx1
umax. */
- return 2765;
+ return 2769;
}
else
{
@@ -4415,7 +4481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx0xx0xxxx1
umax. */
- return 2767;
+ return 2771;
}
}
}
@@ -4429,7 +4495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx0xxxx1
fmin. */
- return 2476;
+ return 2478;
}
else
{
@@ -4437,7 +4503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx0xxxx1
fmin. */
- return 2478;
+ return 2480;
}
}
else
@@ -4448,7 +4514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx0xxxx1
fmin. */
- return 2477;
+ return 2479;
}
else
{
@@ -4456,7 +4522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx0xxxx1
fmin. */
- return 2479;
+ return 2481;
}
}
}
@@ -4475,7 +4541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x00xx1xxxx1
umin. */
- return 2768;
+ return 2772;
}
else
{
@@ -4483,7 +4549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x00xx1xxxx1
umin. */
- return 2770;
+ return 2774;
}
}
else
@@ -4494,7 +4560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x00xx1xxxx1
umin. */
- return 2769;
+ return 2773;
}
else
{
@@ -4502,7 +4568,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x00xx1xxxx1
umin. */
- return 2771;
+ return 2775;
}
}
}
@@ -4516,7 +4582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00x10xx1xxxx1
urshl. */
- return 2804;
+ return 2810;
}
else
{
@@ -4524,7 +4590,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10x10xx1xxxx1
urshl. */
- return 2806;
+ return 2812;
}
}
else
@@ -4535,7 +4601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01x10xx1xxxx1
urshl. */
- return 2805;
+ return 2811;
}
else
{
@@ -4543,7 +4609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11x10xx1xxxx1
urshl. */
- return 2807;
+ return 2813;
}
}
}
@@ -4558,7 +4624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00xx1xx1xxxx1
fminnm. */
- return 2480;
+ return 2482;
}
else
{
@@ -4566,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10xx1xx1xxxx1
fminnm. */
- return 2482;
+ return 2484;
}
}
else
@@ -4577,7 +4643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01xx1xx1xxxx1
fminnm. */
- return 2481;
+ return 2483;
}
else
{
@@ -4585,7 +4651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11xx1xx1xxxx1
fminnm. */
- return 2483;
+ return 2485;
}
}
}
@@ -4614,7 +4680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2675;
+ return 2679;
}
else
{
@@ -4622,7 +4688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2699;
+ return 2703;
}
}
else
@@ -4633,7 +4699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2691;
+ return 2695;
}
else
{
@@ -4641,7 +4707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2683;
+ return 2687;
}
}
}
@@ -4655,7 +4721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2707;
+ return 2711;
}
else
{
@@ -4663,7 +4729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2731;
+ return 2735;
}
}
else
@@ -4674,7 +4740,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2723;
+ return 2727;
}
else
{
@@ -4682,7 +4748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2715;
+ return 2719;
}
}
}
@@ -4710,7 +4776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2676;
+ return 2680;
}
else
{
@@ -4718,7 +4784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2733;
+ return 2737;
}
}
else
@@ -4727,7 +4793,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2700;
+ return 2704;
}
}
else
@@ -4738,7 +4804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2692;
+ return 2696;
}
else
{
@@ -4746,7 +4812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2684;
+ return 2688;
}
}
}
@@ -4760,7 +4826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2708;
+ return 2712;
}
else
{
@@ -4768,7 +4834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2732;
+ return 2736;
}
}
else
@@ -4779,7 +4845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2724;
+ return 2728;
}
else
{
@@ -4787,7 +4853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2716;
+ return 2720;
}
}
}
@@ -4829,7 +4895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2671;
+ return 2675;
}
else
{
@@ -4837,7 +4903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2672;
+ return 2676;
}
}
else
@@ -4848,7 +4914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2695;
+ return 2699;
}
else
{
@@ -4856,7 +4922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2696;
+ return 2700;
}
}
}
@@ -4870,7 +4936,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2687;
+ return 2691;
}
else
{
@@ -4878,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2688;
+ return 2692;
}
}
else
@@ -4889,7 +4955,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2679;
+ return 2683;
}
else
{
@@ -4897,7 +4963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2680;
+ return 2684;
}
}
}
@@ -4914,7 +4980,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2703;
+ return 2707;
}
else
{
@@ -4922,7 +4988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2704;
+ return 2708;
}
}
else
@@ -4933,7 +4999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2727;
+ return 2731;
}
else
{
@@ -4941,7 +5007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2728;
+ return 2732;
}
}
}
@@ -4955,7 +5021,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2719;
+ return 2723;
}
else
{
@@ -4963,7 +5029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2720;
+ return 2724;
}
}
else
@@ -4974,7 +5040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2711;
+ return 2715;
}
else
{
@@ -4982,7 +5048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2712;
+ return 2716;
}
}
}
@@ -7384,7 +7450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2896;
+ return 2902;
}
else
{
@@ -7392,7 +7458,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2904;
+ return 2910;
}
}
else
@@ -7403,7 +7469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2900;
+ return 2906;
}
else
{
@@ -7411,7 +7477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2907;
+ return 2913;
}
}
}
@@ -7449,7 +7515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2956;
+ return 2962;
}
else
{
@@ -7457,7 +7523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2962;
+ return 2968;
}
}
else
@@ -7468,7 +7534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2959;
+ return 2965;
}
else
{
@@ -7476,7 +7542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2965;
+ return 2971;
}
}
}
@@ -7490,7 +7556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2980;
+ return 2986;
}
else
{
@@ -7498,7 +7564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2986;
+ return 2992;
}
}
else
@@ -7509,7 +7575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2983;
+ return 2989;
}
else
{
@@ -7517,7 +7583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2989;
+ return 2995;
}
}
}
@@ -7534,7 +7600,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2968;
+ return 2974;
}
else
{
@@ -7542,7 +7608,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2974;
+ return 2980;
}
}
else
@@ -7553,7 +7619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2971;
+ return 2977;
}
else
{
@@ -7561,7 +7627,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2977;
+ return 2983;
}
}
}
@@ -7575,7 +7641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2992;
+ return 2998;
}
else
{
@@ -7583,7 +7649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 2998;
+ return 3004;
}
}
else
@@ -7594,7 +7660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 2995;
+ return 3001;
}
else
{
@@ -7602,7 +7668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3001;
+ return 3007;
}
}
}
@@ -7667,7 +7733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2897;
+ return 2903;
}
else
{
@@ -7675,7 +7741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2905;
+ return 2911;
}
}
else
@@ -7686,7 +7752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2901;
+ return 2907;
}
else
{
@@ -7694,7 +7760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2908;
+ return 2914;
}
}
}
@@ -7732,7 +7798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2957;
+ return 2963;
}
else
{
@@ -7740,7 +7806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2963;
+ return 2969;
}
}
else
@@ -7751,7 +7817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2960;
+ return 2966;
}
else
{
@@ -7759,7 +7825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2966;
+ return 2972;
}
}
}
@@ -7773,7 +7839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2981;
+ return 2987;
}
else
{
@@ -7781,7 +7847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2987;
+ return 2993;
}
}
else
@@ -7792,7 +7858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2984;
+ return 2990;
}
else
{
@@ -7800,7 +7866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2990;
+ return 2996;
}
}
}
@@ -7817,7 +7883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2969;
+ return 2975;
}
else
{
@@ -7825,7 +7891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2975;
+ return 2981;
}
}
else
@@ -7836,7 +7902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2972;
+ return 2978;
}
else
{
@@ -7844,7 +7910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2978;
+ return 2984;
}
}
}
@@ -7858,7 +7924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2993;
+ return 2999;
}
else
{
@@ -7866,7 +7932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 2999;
+ return 3005;
}
}
else
@@ -7877,7 +7943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 2996;
+ return 3002;
}
else
{
@@ -7885,7 +7951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3002;
+ return 3008;
}
}
}
@@ -7953,7 +8019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2899;
+ return 2905;
}
else
{
@@ -7961,7 +8027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2906;
+ return 2912;
}
}
else
@@ -7970,7 +8036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2903;
+ return 2909;
}
}
else
@@ -7981,7 +8047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2898;
+ return 2904;
}
else
{
@@ -7989,7 +8055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2902;
+ return 2908;
}
}
}
@@ -8051,7 +8117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2958;
+ return 2964;
}
else
{
@@ -8059,7 +8125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3052;
+ return 3058;
}
}
else
@@ -8070,7 +8136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2964;
+ return 2970;
}
else
{
@@ -8078,7 +8144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3054;
+ return 3060;
}
}
}
@@ -8092,7 +8158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2961;
+ return 2967;
}
else
{
@@ -8100,7 +8166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3053;
+ return 3059;
}
}
else
@@ -8109,7 +8175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2967;
+ return 2973;
}
}
}
@@ -8125,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2982;
+ return 2988;
}
else
{
@@ -8133,7 +8199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3058;
+ return 3064;
}
}
else
@@ -8144,7 +8210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2988;
+ return 2994;
}
else
{
@@ -8152,7 +8218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3060;
+ return 3066;
}
}
}
@@ -8166,7 +8232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2985;
+ return 2991;
}
else
{
@@ -8174,7 +8240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3059;
+ return 3065;
}
}
else
@@ -8183,7 +8249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2991;
+ return 2997;
}
}
}
@@ -8202,7 +8268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2970;
+ return 2976;
}
else
{
@@ -8210,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3055;
+ return 3061;
}
}
else
@@ -8221,7 +8287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2976;
+ return 2982;
}
else
{
@@ -8229,7 +8295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3057;
+ return 3063;
}
}
}
@@ -8243,7 +8309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2973;
+ return 2979;
}
else
{
@@ -8251,7 +8317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3056;
+ return 3062;
}
}
else
@@ -8260,7 +8326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2979;
+ return 2985;
}
}
}
@@ -8276,7 +8342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 2994;
+ return 3000;
}
else
{
@@ -8284,7 +8350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3061;
+ return 3067;
}
}
else
@@ -8295,7 +8361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3000;
+ return 3006;
}
else
{
@@ -8303,7 +8369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3063;
+ return 3069;
}
}
}
@@ -8317,7 +8383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 2997;
+ return 3003;
}
else
{
@@ -8325,7 +8391,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3062;
+ return 3068;
}
}
else
@@ -8334,7 +8400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3003;
+ return 3009;
}
}
}
@@ -8707,7 +8773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3081;
+ return 3087;
}
else
{
@@ -8725,7 +8791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3084;
+ return 3090;
}
}
}
@@ -8805,7 +8871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2894;
+ return 2900;
}
else
{
@@ -8813,7 +8879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2895;
+ return 2901;
}
}
else
@@ -8920,7 +8986,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3086;
+ return 3092;
}
}
}
@@ -8936,7 +9002,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3083;
+ return 3089;
}
else
{
@@ -8981,7 +9047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2893;
+ return 2899;
}
else
{
@@ -9075,7 +9141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3085;
+ return 3091;
}
}
}
@@ -9205,7 +9271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3087;
+ return 3093;
}
}
}
@@ -9221,7 +9287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3082;
+ return 3088;
}
else
{
@@ -10063,7 +10129,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2913;
+ return 2919;
}
}
}
@@ -10137,7 +10203,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2914;
+ return 2920;
}
}
}
@@ -12811,7 +12877,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2912;
+ return 2918;
}
}
}
@@ -14515,7 +14581,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2941;
+ return 2947;
}
}
else
@@ -14758,7 +14824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2917;
+ return 2923;
}
else
{
@@ -14766,7 +14832,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2918;
+ return 2924;
}
}
else
@@ -14998,7 +15064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2938;
+ return 2944;
}
else
{
@@ -15019,7 +15085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2945;
+ return 2951;
}
else
{
@@ -15027,7 +15093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2944;
+ return 2950;
}
}
else
@@ -15082,7 +15148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2937;
+ return 2943;
}
else
{
@@ -15094,7 +15160,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2943;
+ return 2949;
}
else
{
@@ -15102,7 +15168,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2942;
+ return 2948;
}
}
else
@@ -15153,7 +15219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2921;
+ return 2927;
}
else
{
@@ -15161,7 +15227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2922;
+ return 2928;
}
}
else
@@ -15520,7 +15586,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2915;
+ return 2921;
}
else
{
@@ -15553,7 +15619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2939;
+ return 2945;
}
else
{
@@ -15583,7 +15649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2916;
+ return 2922;
}
else
{
@@ -15712,7 +15778,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2925;
+ return 2931;
}
else
{
@@ -15722,7 +15788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2927;
+ return 2933;
}
else
{
@@ -15730,7 +15796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2929;
+ return 2935;
}
}
}
@@ -15742,7 +15808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2926;
+ return 2932;
}
else
{
@@ -15752,7 +15818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2928;
+ return 2934;
}
else
{
@@ -15760,7 +15826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2930;
+ return 2936;
}
}
}
@@ -16819,7 +16885,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2909;
+ return 2915;
}
else
{
@@ -16827,7 +16893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2911;
+ return 2917;
}
}
else
@@ -16836,7 +16902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2910;
+ return 2916;
}
}
}
@@ -18332,7 +18398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2919;
+ return 2925;
}
else
{
@@ -18340,7 +18406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2920;
+ return 2926;
}
}
}
@@ -18714,7 +18780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2923;
+ return 2929;
}
else
{
@@ -18722,7 +18788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2924;
+ return 2930;
}
}
}
@@ -19083,7 +19149,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2825;
+ return 2831;
}
else
{
@@ -19091,7 +19157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2826;
+ return 2832;
}
}
else
@@ -19121,7 +19187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2604;
+ return 2606;
}
}
}
@@ -19135,7 +19201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2828;
+ return 2834;
}
else
{
@@ -19143,7 +19209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2827;
+ return 2833;
}
}
else
@@ -19173,7 +19239,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2606;
+ return 2608;
}
}
}
@@ -19190,7 +19256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2832;
+ return 2838;
}
else
{
@@ -19198,7 +19264,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2829;
+ return 2835;
}
}
else
@@ -19228,7 +19294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2605;
+ return 2607;
}
}
}
@@ -19242,7 +19308,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2830;
+ return 2836;
}
else
{
@@ -19250,7 +19316,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2831;
+ return 2837;
}
}
else
@@ -20376,7 +20442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2940;
+ return 2946;
}
}
else
@@ -21035,7 +21101,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2459;
+ return 2461;
}
}
else
@@ -21737,7 +21803,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3076;
+ return 3082;
}
else
{
@@ -22317,7 +22383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3004;
+ return 3010;
}
else
{
@@ -22325,7 +22391,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3006;
+ return 3012;
}
}
else
@@ -22336,7 +22402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3010;
+ return 3016;
}
else
{
@@ -22344,7 +22410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3012;
+ return 3018;
}
}
}
@@ -22358,7 +22424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3007;
+ return 3013;
}
else
{
@@ -22366,7 +22432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3009;
+ return 3015;
}
}
else
@@ -22377,7 +22443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3013;
+ return 3019;
}
else
{
@@ -22385,7 +22451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3015;
+ return 3021;
}
}
}
@@ -22402,7 +22468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3028;
+ return 3034;
}
else
{
@@ -22410,7 +22476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3030;
+ return 3036;
}
}
else
@@ -22421,7 +22487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3034;
+ return 3040;
}
else
{
@@ -22429,7 +22495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3036;
+ return 3042;
}
}
}
@@ -22443,7 +22509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3031;
+ return 3037;
}
else
{
@@ -22451,7 +22517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3033;
+ return 3039;
}
}
else
@@ -22462,7 +22528,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3037;
+ return 3043;
}
else
{
@@ -22470,7 +22536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3039;
+ return 3045;
}
}
}
@@ -22490,7 +22556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3016;
+ return 3022;
}
else
{
@@ -22498,7 +22564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3018;
+ return 3024;
}
}
else
@@ -22509,7 +22575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3022;
+ return 3028;
}
else
{
@@ -22517,7 +22583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3024;
+ return 3030;
}
}
}
@@ -22531,7 +22597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3019;
+ return 3025;
}
else
{
@@ -22539,7 +22605,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3021;
+ return 3027;
}
}
else
@@ -22550,7 +22616,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3025;
+ return 3031;
}
else
{
@@ -22558,7 +22624,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3027;
+ return 3033;
}
}
}
@@ -22575,7 +22641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3040;
+ return 3046;
}
else
{
@@ -22583,7 +22649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3042;
+ return 3048;
}
}
else
@@ -22594,7 +22660,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3046;
+ return 3052;
}
else
{
@@ -22602,7 +22668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3048;
+ return 3054;
}
}
}
@@ -22616,7 +22682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3043;
+ return 3049;
}
else
{
@@ -22624,7 +22690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3045;
+ return 3051;
}
}
else
@@ -22635,7 +22701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3049;
+ return 3055;
}
else
{
@@ -22643,7 +22709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3051;
+ return 3057;
}
}
}
@@ -22677,7 +22743,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3005;
+ return 3011;
}
else
{
@@ -22685,7 +22751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3064;
+ return 3070;
}
}
else
@@ -22696,7 +22762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3011;
+ return 3017;
}
else
{
@@ -22704,7 +22770,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3066;
+ return 3072;
}
}
}
@@ -22718,7 +22784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3008;
+ return 3014;
}
else
{
@@ -22726,7 +22792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3065;
+ return 3071;
}
}
else
@@ -22735,7 +22801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3014;
+ return 3020;
}
}
}
@@ -22751,7 +22817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3029;
+ return 3035;
}
else
{
@@ -22759,7 +22825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3070;
+ return 3076;
}
}
else
@@ -22770,7 +22836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3035;
+ return 3041;
}
else
{
@@ -22778,7 +22844,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3072;
+ return 3078;
}
}
}
@@ -22792,7 +22858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3032;
+ return 3038;
}
else
{
@@ -22800,7 +22866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3071;
+ return 3077;
}
}
else
@@ -22809,7 +22875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3038;
+ return 3044;
}
}
}
@@ -22828,7 +22894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3017;
+ return 3023;
}
else
{
@@ -22836,7 +22902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3067;
+ return 3073;
}
}
else
@@ -22847,7 +22913,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3023;
+ return 3029;
}
else
{
@@ -22855,7 +22921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3069;
+ return 3075;
}
}
}
@@ -22869,7 +22935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3020;
+ return 3026;
}
else
{
@@ -22877,7 +22943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3068;
+ return 3074;
}
}
else
@@ -22886,7 +22952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3026;
+ return 3032;
}
}
}
@@ -22902,7 +22968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3041;
+ return 3047;
}
else
{
@@ -22910,7 +22976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3073;
+ return 3079;
}
}
else
@@ -22921,7 +22987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3047;
+ return 3053;
}
else
{
@@ -22929,7 +22995,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3075;
+ return 3081;
}
}
}
@@ -22943,7 +23009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3044;
+ return 3050;
}
else
{
@@ -22951,7 +23017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3074;
+ return 3080;
}
}
else
@@ -22960,7 +23026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3050;
+ return 3056;
}
}
}
@@ -23127,7 +23193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2931;
+ return 2937;
}
}
}
@@ -23160,7 +23226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2857;
+ return 2863;
}
}
else
@@ -23234,7 +23300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2933;
+ return 2939;
}
}
}
@@ -23267,7 +23333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2934;
+ return 2940;
}
}
else
@@ -23314,7 +23380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2864;
+ return 2870;
}
else
{
@@ -23322,7 +23388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2866;
+ return 2872;
}
}
else
@@ -23333,7 +23399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2868;
+ return 2874;
}
else
{
@@ -23347,7 +23413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2869;
+ return 2875;
}
else
{
@@ -23355,7 +23421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2862;
+ return 2868;
}
}
else
@@ -23364,7 +23430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2871;
+ return 2877;
}
}
else
@@ -23377,7 +23443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2870;
+ return 2876;
}
else
{
@@ -23385,7 +23451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2875;
+ return 2881;
}
}
else
@@ -23394,7 +23460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2872;
+ return 2878;
}
}
}
@@ -23575,7 +23641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2856;
+ return 2862;
}
}
else
@@ -23606,7 +23672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2932;
+ return 2938;
}
else
{
@@ -23625,7 +23691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2948;
+ return 2954;
}
else
{
@@ -23635,7 +23701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2946;
+ return 2952;
}
else
{
@@ -23645,7 +23711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2953;
+ return 2959;
}
else
{
@@ -23653,7 +23719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2952;
+ return 2958;
}
}
}
@@ -24237,7 +24303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2949;
+ return 2955;
}
else
{
@@ -24245,7 +24311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2950;
+ return 2956;
}
}
}
@@ -24563,7 +24629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2867;
+ return 2873;
}
}
else
@@ -25174,7 +25240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2860;
+ return 2866;
}
}
}
@@ -25226,7 +25292,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2873;
+ return 2879;
}
}
}
@@ -25469,7 +25535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2863;
+ return 2869;
}
}
else
@@ -25545,7 +25611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2876;
+ return 2882;
}
}
else
@@ -26371,7 +26437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2861;
+ return 2867;
}
}
else
@@ -26403,7 +26469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2874;
+ return 2880;
}
}
else
@@ -26643,7 +26709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2865;
+ return 2871;
}
}
else
@@ -26675,7 +26741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2879;
+ return 2885;
}
else
{
@@ -26683,7 +26749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2883;
+ return 2889;
}
}
}
@@ -26705,7 +26771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2880;
+ return 2886;
}
else
{
@@ -26713,7 +26779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2884;
+ return 2890;
}
}
}
@@ -26752,7 +26818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2877;
+ return 2883;
}
else
{
@@ -26760,7 +26826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2881;
+ return 2887;
}
}
else
@@ -26782,7 +26848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2878;
+ return 2884;
}
else
{
@@ -26790,7 +26856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2882;
+ return 2888;
}
}
else
@@ -28598,7 +28664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2885;
+ return 2891;
}
else
{
@@ -28606,7 +28672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2889;
+ return 2895;
}
}
else
@@ -28628,7 +28694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2886;
+ return 2892;
}
else
{
@@ -28636,7 +28702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2890;
+ return 2896;
}
}
else
@@ -29142,7 +29208,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2887;
+ return 2893;
}
else
{
@@ -29150,7 +29216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2891;
+ return 2897;
}
}
}
@@ -29172,7 +29238,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2888;
+ return 2894;
}
else
{
@@ -29180,7 +29246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2892;
+ return 2898;
}
}
}
@@ -29236,7 +29302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2859;
+ return 2865;
}
else
{
@@ -29244,7 +29310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2858;
+ return 2864;
}
}
}
@@ -29347,7 +29413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2936;
+ return 2942;
}
else
{
@@ -29355,7 +29421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2935;
+ return 2941;
}
}
else
@@ -29366,7 +29432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2947;
+ return 2953;
}
else
{
@@ -29376,7 +29442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2955;
+ return 2961;
}
else
{
@@ -29384,7 +29450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2954;
+ return 2960;
}
}
}
@@ -29875,22 +29941,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
+ case 2594: value = 2602; break; /* mov --> mova. */
+ case 2602: return NULL; /* mova --> NULL. */
+ case 2590: value = 2598; break; /* mov --> mova. */
+ case 2598: return NULL; /* mova --> NULL. */
case 2592: value = 2600; break; /* mov --> mova. */
case 2600: return NULL; /* mova --> NULL. */
case 2588: value = 2596; break; /* mov --> mova. */
case 2596: return NULL; /* mova --> NULL. */
- case 2590: value = 2598; break; /* mov --> mova. */
- case 2598: return NULL; /* mova --> NULL. */
- case 2586: value = 2594; break; /* mov --> mova. */
- case 2594: return NULL; /* mova --> NULL. */
+ case 2595: value = 2603; break; /* mov --> mova. */
+ case 2603: return NULL; /* mova --> NULL. */
+ case 2591: value = 2599; break; /* mov --> mova. */
+ case 2599: return NULL; /* mova --> NULL. */
case 2593: value = 2601; break; /* mov --> mova. */
case 2601: return NULL; /* mova --> NULL. */
case 2589: value = 2597; break; /* mov --> mova. */
case 2597: return NULL; /* mova --> NULL. */
- case 2591: value = 2599; break; /* mov --> mova. */
- case 2599: return NULL; /* mova --> NULL. */
- case 2587: value = 2595; break; /* mov --> mova. */
- case 2595: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -29912,11 +29978,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3077; break; /* addg --> smax. */
- case 3077: value = 3078; break; /* smax --> umax. */
- case 3078: value = 3079; break; /* umax --> smin. */
- case 3079: value = 3080; break; /* smin --> umin. */
- case 3080: return NULL; /* umin --> NULL. */
+ case 19: value = 3083; break; /* addg --> smax. */
+ case 3083: value = 3084; break; /* smax --> umax. */
+ case 3084: value = 3085; break; /* umax --> smin. */
+ case 3085: value = 3086; break; /* smin --> umin. */
+ case 3086: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30074,8 +30140,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2951; break; /* fcvt --> bfcvt. */
- case 2951: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2957; break; /* fcvt --> bfcvt. */
+ case 2957: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 51dfc60e116..cb6f0d65769 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5372,6 +5372,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("bfmlsl", 0xc1a00818, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("bfmlsl", 0xc1a10818, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("bfvdot", 0xc1500018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
+ SME2_INSN ("bmopa", 0x80800008, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMSS, 0, 0),
+ SME2_INSN ("bmops", 0x80800018, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMSS, 0, 0),
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
@@ -5574,6 +5576,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("smlsll", 0xc1300008, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("smlsll", 0xc1a00008, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
SME2_INSN ("smlsll", 0xc1a10008, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("smopa", 0xa0800008, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMHH, 0, 0),
+ SME2_INSN ("smops", 0xa0800018, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMHH, 0, 0),
SME2_INSN ("sqdmulh", 0xc120a400, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -5717,6 +5721,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("umlsll", 0xc1300018, 0xffb09c1e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("umlsll", 0xc1a00018, 0xffa19c3e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_VVV_SD_BH, F_OD (2), 0),
SME2_INSN ("umlsll", 0xc1a10018, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
+ SME2_INSN ("umopa", 0xa1800008, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMHH, 0, 0),
+ SME2_INSN ("umops", 0xa1800018, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMHH, 0, 0),
SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 19/31] aarch64: Add the SME2 CLAMP instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (17 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 18/31] aarch64: Add the SME2 MOPA and MOPS instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 20/31] aarch64: Add the SME2 FP<->int conversion instructions Richard Sandiford
` (13 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
FCLAMP, SCLAMP and UCLAMP share the same format, although FCLAMP
doesn't have a .B form.
---
gas/testsuite/gas/aarch64/sme2-22-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-22-invalid.l | 27 +
gas/testsuite/gas/aarch64/sme2-22-invalid.s | 13 +
gas/testsuite/gas/aarch64/sme2-22-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-22-noarch.l | 111 ++
gas/testsuite/gas/aarch64/sme2-22.d | 119 ++
gas/testsuite/gas/aarch64/sme2-22.s | 131 ++
opcodes/aarch64-dis-2.c | 1706 ++++++++++---------
opcodes/aarch64-tbl.h | 6 +
9 files changed, 1299 insertions(+), 820 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-22-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-22-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-22-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-22-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-22-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-22.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-22.s
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.d b/gas/testsuite/gas/aarch64/sme2-22-invalid.d
new file mode 100644
index 00000000000..87213eddbe3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-22-invalid.s
+#error_output: sme2-22-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.l b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
new file mode 100644
index 00000000000..85251cd1fee
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
@@ -0,0 +1,27 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `fclamp 0,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp {z0\.h-z1\.h},0,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp {z0\.h-z1\.h},z0\.h,0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z3\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.q-z1\.q},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fclamp {z0\.h-z2\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z2\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z4\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z2\.h-z5\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z3\.h-z6\.h},z0\.h,z0\.h'
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.s b/gas/testsuite/gas/aarch64/sme2-22-invalid.s
new file mode 100644
index 00000000000..c284ef63f1e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.s
@@ -0,0 +1,13 @@
+ fclamp 0, z0.h, z0.h
+ fclamp { z0.h - z1.h }, 0, z0.h
+ fclamp { z0.h - z1.h }, z0.h, 0
+
+ fclamp { z0.b - z1.b }, z0.b, z0.b
+ fclamp { z0.b - z3.b }, z0.b, z0.b
+ fclamp { z0.q - z1.q }, z0.q, z0.q
+
+ fclamp { z0.h - z2.h }, z0.h, z0.h
+ fclamp { z1.h - z2.h }, z0.h, z0.h
+ fclamp { z1.h - z4.h }, z0.h, z0.h
+ fclamp { z2.h - z5.h }, z0.h, z0.h
+ fclamp { z3.h - z6.h }, z0.h, z0.h
diff --git a/gas/testsuite/gas/aarch64/sme2-22-noarch.d b/gas/testsuite/gas/aarch64/sme2-22-noarch.d
new file mode 100644
index 00000000000..162d84a74a7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-22.s
+#error_output: sme2-22-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-22-noarch.l b/gas/testsuite/gas/aarch64/sme2-22-noarch.l
new file mode 100644
index 00000000000..f313ad0ad99
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-noarch.l
@@ -0,0 +1,111 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.h-z9\.h},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z18\.s-z19\.s},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z10\.d-z11\.d},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z20\.h-z23\.h},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z24\.s-z27\.s},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.d-z11\.d},z7\.d,z30\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z2\.b-z3\.b},z21\.b,z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.h-z9\.h},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z18\.s-z19\.s},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z10\.d-z11\.d},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z4\.b-z7\.b},z19\.b,z26\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z20\.h-z23\.h},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z24\.s-z27\.s},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.d-z11\.d},z7\.d,z30\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z2\.b-z3\.b},z21\.b,z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.h-z9\.h},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z18\.s-z19\.s},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z10\.d-z11\.d},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z4\.b-z7\.b},z19\.b,z26\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z20\.h-z23\.h},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z24\.s-z27\.s},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.d-z11\.d},z7\.d,z30\.d'
diff --git a/gas/testsuite/gas/aarch64/sme2-22.d b/gas/testsuite/gas/aarch64/sme2-22.d
new file mode 100644
index 00000000000..19482207986
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22.d
@@ -0,0 +1,119 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c160c000 fclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^:]+: c160c01e fclamp {z30\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160c3e0 fclamp {z0\.h-z1\.h}, z31\.h, z0\.h
+[^:]+: c17fc000 fclamp {z0\.h-z1\.h}, z0\.h, z31\.h
+[^:]+: c164c348 fclamp {z8\.h-z9\.h}, z26\.h, z4\.h
+[^:]+: c1a0c000 fclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^:]+: c1a0c01e fclamp {z30\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0c3e0 fclamp {z0\.s-z1\.s}, z31\.s, z0\.s
+[^:]+: c1bfc000 fclamp {z0\.s-z1\.s}, z0\.s, z31\.s
+[^:]+: c1aec132 fclamp {z18\.s-z19\.s}, z9\.s, z14\.s
+[^:]+: c1e0c000 fclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^:]+: c1e0c01e fclamp {z30\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0c3e0 fclamp {z0\.d-z1\.d}, z31\.d, z0\.d
+[^:]+: c1ffc000 fclamp {z0\.d-z1\.d}, z0\.d, z31\.d
+[^:]+: c1f6c16a fclamp {z10\.d-z11\.d}, z11\.d, z22\.d
+[^:]+: c160c800 fclamp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^:]+: c160c81c fclamp {z28\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160cbe0 fclamp {z0\.h-z3\.h}, z31\.h, z0\.h
+[^:]+: c17fc800 fclamp {z0\.h-z3\.h}, z0\.h, z31\.h
+[^:]+: c171c9f4 fclamp {z20\.h-z23\.h}, z15\.h, z17\.h
+[^:]+: c1a0c800 fclamp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^:]+: c1a0c81c fclamp {z28\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0cbe0 fclamp {z0\.s-z3\.s}, z31\.s, z0\.s
+[^:]+: c1bfc800 fclamp {z0\.s-z3\.s}, z0\.s, z31\.s
+[^:]+: c1a6cbb8 fclamp {z24\.s-z27\.s}, z29\.s, z6\.s
+[^:]+: c1e0c800 fclamp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^:]+: c1e0c81c fclamp {z28\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0cbe0 fclamp {z0\.d-z3\.d}, z31\.d, z0\.d
+[^:]+: c1ffc800 fclamp {z0\.d-z3\.d}, z0\.d, z31\.d
+[^:]+: c1fec8e8 fclamp {z8\.d-z11\.d}, z7\.d, z30\.d
+[^:]+: c120c400 sclamp {z0\.b-z1\.b}, z0\.b, z0\.b
+[^:]+: c120c41e sclamp {z30\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120c7e0 sclamp {z0\.b-z1\.b}, z31\.b, z0\.b
+[^:]+: c13fc400 sclamp {z0\.b-z1\.b}, z0\.b, z31\.b
+[^:]+: c129c6a2 sclamp {z2\.b-z3\.b}, z21\.b, z9\.b
+[^:]+: c160c400 sclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^:]+: c160c41e sclamp {z30\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160c7e0 sclamp {z0\.h-z1\.h}, z31\.h, z0\.h
+[^:]+: c17fc400 sclamp {z0\.h-z1\.h}, z0\.h, z31\.h
+[^:]+: c164c748 sclamp {z8\.h-z9\.h}, z26\.h, z4\.h
+[^:]+: c1a0c400 sclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^:]+: c1a0c41e sclamp {z30\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0c7e0 sclamp {z0\.s-z1\.s}, z31\.s, z0\.s
+[^:]+: c1bfc400 sclamp {z0\.s-z1\.s}, z0\.s, z31\.s
+[^:]+: c1aec532 sclamp {z18\.s-z19\.s}, z9\.s, z14\.s
+[^:]+: c1e0c400 sclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^:]+: c1e0c41e sclamp {z30\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0c7e0 sclamp {z0\.d-z1\.d}, z31\.d, z0\.d
+[^:]+: c1ffc400 sclamp {z0\.d-z1\.d}, z0\.d, z31\.d
+[^:]+: c1f6c56a sclamp {z10\.d-z11\.d}, z11\.d, z22\.d
+[^:]+: c120cc00 sclamp {z0\.b-z3\.b}, z0\.b, z0\.b
+[^:]+: c120cc1c sclamp {z28\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120cfe0 sclamp {z0\.b-z3\.b}, z31\.b, z0\.b
+[^:]+: c13fcc00 sclamp {z0\.b-z3\.b}, z0\.b, z31\.b
+[^:]+: c13ace64 sclamp {z4\.b-z7\.b}, z19\.b, z26\.b
+[^:]+: c160cc00 sclamp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^:]+: c160cc1c sclamp {z28\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160cfe0 sclamp {z0\.h-z3\.h}, z31\.h, z0\.h
+[^:]+: c17fcc00 sclamp {z0\.h-z3\.h}, z0\.h, z31\.h
+[^:]+: c171cdf4 sclamp {z20\.h-z23\.h}, z15\.h, z17\.h
+[^:]+: c1a0cc00 sclamp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^:]+: c1a0cc1c sclamp {z28\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0cfe0 sclamp {z0\.s-z3\.s}, z31\.s, z0\.s
+[^:]+: c1bfcc00 sclamp {z0\.s-z3\.s}, z0\.s, z31\.s
+[^:]+: c1a6cfb8 sclamp {z24\.s-z27\.s}, z29\.s, z6\.s
+[^:]+: c1e0cc00 sclamp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^:]+: c1e0cc1c sclamp {z28\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0cfe0 sclamp {z0\.d-z3\.d}, z31\.d, z0\.d
+[^:]+: c1ffcc00 sclamp {z0\.d-z3\.d}, z0\.d, z31\.d
+[^:]+: c1fecce8 sclamp {z8\.d-z11\.d}, z7\.d, z30\.d
+[^:]+: c120c401 uclamp {z0\.b-z1\.b}, z0\.b, z0\.b
+[^:]+: c120c41f uclamp {z30\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120c7e1 uclamp {z0\.b-z1\.b}, z31\.b, z0\.b
+[^:]+: c13fc401 uclamp {z0\.b-z1\.b}, z0\.b, z31\.b
+[^:]+: c129c6a3 uclamp {z2\.b-z3\.b}, z21\.b, z9\.b
+[^:]+: c160c401 uclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^:]+: c160c41f uclamp {z30\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160c7e1 uclamp {z0\.h-z1\.h}, z31\.h, z0\.h
+[^:]+: c17fc401 uclamp {z0\.h-z1\.h}, z0\.h, z31\.h
+[^:]+: c164c749 uclamp {z8\.h-z9\.h}, z26\.h, z4\.h
+[^:]+: c1a0c401 uclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^:]+: c1a0c41f uclamp {z30\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0c7e1 uclamp {z0\.s-z1\.s}, z31\.s, z0\.s
+[^:]+: c1bfc401 uclamp {z0\.s-z1\.s}, z0\.s, z31\.s
+[^:]+: c1aec533 uclamp {z18\.s-z19\.s}, z9\.s, z14\.s
+[^:]+: c1e0c401 uclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^:]+: c1e0c41f uclamp {z30\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0c7e1 uclamp {z0\.d-z1\.d}, z31\.d, z0\.d
+[^:]+: c1ffc401 uclamp {z0\.d-z1\.d}, z0\.d, z31\.d
+[^:]+: c1f6c56b uclamp {z10\.d-z11\.d}, z11\.d, z22\.d
+[^:]+: c120cc01 uclamp {z0\.b-z3\.b}, z0\.b, z0\.b
+[^:]+: c120cc1d uclamp {z28\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120cfe1 uclamp {z0\.b-z3\.b}, z31\.b, z0\.b
+[^:]+: c13fcc01 uclamp {z0\.b-z3\.b}, z0\.b, z31\.b
+[^:]+: c13ace65 uclamp {z4\.b-z7\.b}, z19\.b, z26\.b
+[^:]+: c160cc01 uclamp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^:]+: c160cc1d uclamp {z28\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160cfe1 uclamp {z0\.h-z3\.h}, z31\.h, z0\.h
+[^:]+: c17fcc01 uclamp {z0\.h-z3\.h}, z0\.h, z31\.h
+[^:]+: c171cdf5 uclamp {z20\.h-z23\.h}, z15\.h, z17\.h
+[^:]+: c1a0cc01 uclamp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^:]+: c1a0cc1d uclamp {z28\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0cfe1 uclamp {z0\.s-z3\.s}, z31\.s, z0\.s
+[^:]+: c1bfcc01 uclamp {z0\.s-z3\.s}, z0\.s, z31\.s
+[^:]+: c1a6cfb9 uclamp {z24\.s-z27\.s}, z29\.s, z6\.s
+[^:]+: c1e0cc01 uclamp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^:]+: c1e0cc1d uclamp {z28\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0cfe1 uclamp {z0\.d-z3\.d}, z31\.d, z0\.d
+[^:]+: c1ffcc01 uclamp {z0\.d-z3\.d}, z0\.d, z31\.d
+[^:]+: c1fecce9 uclamp {z8\.d-z11\.d}, z7\.d, z30\.d
diff --git a/gas/testsuite/gas/aarch64/sme2-22.s b/gas/testsuite/gas/aarch64/sme2-22.s
new file mode 100644
index 00000000000..a209de18141
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22.s
@@ -0,0 +1,131 @@
+ fclamp { z0.h - z1.h }, z0.h, z0.h
+ fclamp { z30.h - z31.h }, z0.h, z0.h
+ fclamp { z0.h - z1.h }, z31.h, z0.h
+ fclamp { z0.h - z1.h }, z0.h, z31.h
+ fclamp { z8.h - z9.h }, z26.h, z4.h
+
+ fclamp { z0.s - z1.s }, z0.s, z0.s
+ fclamp { z30.s - z31.s }, z0.s, z0.s
+ fclamp { z0.s - z1.s }, z31.s, z0.s
+ fclamp { z0.s - z1.s }, z0.s, z31.s
+ fclamp { z18.s - z19.s }, z9.s, z14.s
+
+ fclamp { z0.d - z1.d }, z0.d, z0.d
+ fclamp { z30.d - z31.d }, z0.d, z0.d
+ fclamp { z0.d - z1.d }, z31.d, z0.d
+ fclamp { z0.d - z1.d }, z0.d, z31.d
+ fclamp { z10.d - z11.d }, z11.d, z22.d
+
+ fclamp { z0.h - z3.h }, z0.h, z0.h
+ fclamp { z28.h - z31.h }, z0.h, z0.h
+ fclamp { z0.h - z3.h }, z31.h, z0.h
+ fclamp { z0.h - z3.h }, z0.h, z31.h
+ fclamp { z20.h - z23.h }, z15.h, z17.h
+
+ fclamp { z0.s - z3.s }, z0.s, z0.s
+ fclamp { z28.s - z31.s }, z0.s, z0.s
+ fclamp { z0.s - z3.s }, z31.s, z0.s
+ fclamp { z0.s - z3.s }, z0.s, z31.s
+ fclamp { z24.s - z27.s }, z29.s, z6.s
+
+ fclamp { z0.d - z3.d }, z0.d, z0.d
+ fclamp { z28.d - z31.d }, z0.d, z0.d
+ fclamp { z0.d - z3.d }, z31.d, z0.d
+ fclamp { z0.d - z3.d }, z0.d, z31.d
+ fclamp { z8.d - z11.d }, z7.d, z30.d
+
+ sclamp { z0.b - z1.b }, z0.b, z0.b
+ sclamp { z30.b - z31.b }, z0.b, z0.b
+ sclamp { z0.b - z1.b }, z31.b, z0.b
+ sclamp { z0.b - z1.b }, z0.b, z31.b
+ sclamp { z2.b - z3.b }, z21.b, z9.b
+
+ sclamp { z0.h - z1.h }, z0.h, z0.h
+ sclamp { z30.h - z31.h }, z0.h, z0.h
+ sclamp { z0.h - z1.h }, z31.h, z0.h
+ sclamp { z0.h - z1.h }, z0.h, z31.h
+ sclamp { z8.h - z9.h }, z26.h, z4.h
+
+ sclamp { z0.s - z1.s }, z0.s, z0.s
+ sclamp { z30.s - z31.s }, z0.s, z0.s
+ sclamp { z0.s - z1.s }, z31.s, z0.s
+ sclamp { z0.s - z1.s }, z0.s, z31.s
+ sclamp { z18.s - z19.s }, z9.s, z14.s
+
+ sclamp { z0.d - z1.d }, z0.d, z0.d
+ sclamp { z30.d - z31.d }, z0.d, z0.d
+ sclamp { z0.d - z1.d }, z31.d, z0.d
+ sclamp { z0.d - z1.d }, z0.d, z31.d
+ sclamp { z10.d - z11.d }, z11.d, z22.d
+
+ sclamp { z0.b - z3.b }, z0.b, z0.b
+ sclamp { z28.b - z31.b }, z0.b, z0.b
+ sclamp { z0.b - z3.b }, z31.b, z0.b
+ sclamp { z0.b - z3.b }, z0.b, z31.b
+ sclamp { z4.b - z7.b }, z19.b, z26.b
+
+ sclamp { z0.h - z3.h }, z0.h, z0.h
+ sclamp { z28.h - z31.h }, z0.h, z0.h
+ sclamp { z0.h - z3.h }, z31.h, z0.h
+ sclamp { z0.h - z3.h }, z0.h, z31.h
+ sclamp { z20.h - z23.h }, z15.h, z17.h
+
+ sclamp { z0.s - z3.s }, z0.s, z0.s
+ sclamp { z28.s - z31.s }, z0.s, z0.s
+ sclamp { z0.s - z3.s }, z31.s, z0.s
+ sclamp { z0.s - z3.s }, z0.s, z31.s
+ sclamp { z24.s - z27.s }, z29.s, z6.s
+
+ sclamp { z0.d - z3.d }, z0.d, z0.d
+ sclamp { z28.d - z31.d }, z0.d, z0.d
+ sclamp { z0.d - z3.d }, z31.d, z0.d
+ sclamp { z0.d - z3.d }, z0.d, z31.d
+ sclamp { z8.d - z11.d }, z7.d, z30.d
+
+ uclamp { z0.b - z1.b }, z0.b, z0.b
+ uclamp { z30.b - z31.b }, z0.b, z0.b
+ uclamp { z0.b - z1.b }, z31.b, z0.b
+ uclamp { z0.b - z1.b }, z0.b, z31.b
+ uclamp { z2.b - z3.b }, z21.b, z9.b
+
+ uclamp { z0.h - z1.h }, z0.h, z0.h
+ uclamp { z30.h - z31.h }, z0.h, z0.h
+ uclamp { z0.h - z1.h }, z31.h, z0.h
+ uclamp { z0.h - z1.h }, z0.h, z31.h
+ uclamp { z8.h - z9.h }, z26.h, z4.h
+
+ uclamp { z0.s - z1.s }, z0.s, z0.s
+ uclamp { z30.s - z31.s }, z0.s, z0.s
+ uclamp { z0.s - z1.s }, z31.s, z0.s
+ uclamp { z0.s - z1.s }, z0.s, z31.s
+ uclamp { z18.s - z19.s }, z9.s, z14.s
+
+ uclamp { z0.d - z1.d }, z0.d, z0.d
+ uclamp { z30.d - z31.d }, z0.d, z0.d
+ uclamp { z0.d - z1.d }, z31.d, z0.d
+ uclamp { z0.d - z1.d }, z0.d, z31.d
+ uclamp { z10.d - z11.d }, z11.d, z22.d
+
+ uclamp { z0.b - z3.b }, z0.b, z0.b
+ uclamp { z28.b - z31.b }, z0.b, z0.b
+ uclamp { z0.b - z3.b }, z31.b, z0.b
+ uclamp { z0.b - z3.b }, z0.b, z31.b
+ uclamp { z4.b - z7.b }, z19.b, z26.b
+
+ uclamp { z0.h - z3.h }, z0.h, z0.h
+ uclamp { z28.h - z31.h }, z0.h, z0.h
+ uclamp { z0.h - z3.h }, z31.h, z0.h
+ uclamp { z0.h - z3.h }, z0.h, z31.h
+ uclamp { z20.h - z23.h }, z15.h, z17.h
+
+ uclamp { z0.s - z3.s }, z0.s, z0.s
+ uclamp { z28.s - z31.s }, z0.s, z0.s
+ uclamp { z0.s - z3.s }, z31.s, z0.s
+ uclamp { z0.s - z3.s }, z0.s, z31.s
+ uclamp { z24.s - z27.s }, z29.s, z6.s
+
+ uclamp { z0.d - z3.d }, z0.d, z0.d
+ uclamp { z28.d - z31.d }, z0.d, z0.d
+ uclamp { z0.d - z3.d }, z31.d, z0.d
+ uclamp { z0.d - z3.d }, z0.d, z31.d
+ uclamp { z8.d - z11.d }, z7.d, z30.d
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 672475aee5b..9baf928fa96 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2839;
+ return 2845;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2587;
+ return 2589;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2586;
+ return 2588;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2585;
+ return 2587;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2594;
+ return 2596;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2590;
+ return 2592;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2584;
+ return 2586;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2583;
+ return 2585;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2605;
+ return 2607;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2604;
+ return 2606;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2582;
+ return 2584;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2592;
+ return 2594;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2588;
+ return 2590;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2595;
+ return 2597;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2591;
+ return 2593;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2593;
+ return 2595;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2589;
+ return 2591;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2521;
+ return 2523;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2522;
+ return 2524;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2545;
+ return 2547;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2546;
+ return 2548;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2537;
+ return 2539;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2538;
+ return 2540;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2529;
+ return 2531;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2530;
+ return 2532;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2553;
+ return 2555;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2554;
+ return 2556;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2577;
+ return 2579;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2578;
+ return 2580;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2569;
+ return 2571;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2570;
+ return 2572;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2561;
+ return 2563;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2562;
+ return 2564;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2663;
+ return 2667;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2664;
+ return 2668;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2517;
+ return 2519;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2518;
+ return 2520;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2541;
+ return 2543;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2542;
+ return 2544;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2533;
+ return 2535;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2534;
+ return 2536;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2525;
+ return 2527;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2526;
+ return 2528;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2549;
+ return 2551;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2550;
+ return 2552;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2573;
+ return 2575;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2574;
+ return 2576;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2565;
+ return 2567;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2566;
+ return 2568;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2557;
+ return 2559;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2558;
+ return 2560;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2677;
+ return 2681;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2678;
+ return 2682;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2701;
+ return 2705;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2702;
+ return 2706;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2693;
+ return 2697;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2694;
+ return 2698;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2685;
+ return 2689;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2686;
+ return 2690;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2709;
+ return 2713;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2710;
+ return 2714;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2733;
+ return 2737;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2734;
+ return 2738;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2725;
+ return 2729;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2726;
+ return 2730;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2717;
+ return 2721;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2718;
+ return 2722;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2673;
+ return 2677;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2674;
+ return 2678;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2697;
+ return 2701;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2698;
+ return 2702;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2689;
+ return 2693;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2690;
+ return 2694;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2681;
+ return 2685;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2682;
+ return 2686;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2705;
+ return 2709;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2706;
+ return 2710;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2729;
+ return 2733;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2730;
+ return 2734;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2721;
+ return 2725;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2722;
+ return 2726;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2713;
+ return 2717;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2714;
+ return 2718;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2639;
+ return 2643;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2820;
+ return 2826;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2640;
+ return 2644;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2641;
+ return 2645;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2821;
+ return 2827;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2822;
+ return 2828;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2784;
+ return 2790;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2748;
+ return 2752;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2785;
+ return 2791;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2786;
+ return 2792;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2749;
+ return 2753;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2750;
+ return 2754;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2655;
+ return 2659;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2656;
+ return 2660;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2657;
+ return 2661;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2800;
+ return 2806;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2801;
+ return 2807;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2802;
+ return 2808;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2523;
+ return 2525;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2547;
+ return 2549;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2539;
+ return 2541;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2531;
+ return 2533;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2555;
+ return 2557;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2579;
+ return 2581;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2571;
+ return 2573;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2563;
+ return 2565;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2524;
+ return 2526;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2581;
+ return 2583;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2548;
+ return 2550;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2540;
+ return 2542;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2532;
+ return 2534;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2556;
+ return 2558;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2580;
+ return 2582;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2572;
+ return 2574;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2564;
+ return 2566;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2842;
+ return 2848;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2843;
+ return 2849;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2844;
+ return 2850;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2492;
+ return 2494;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2493;
+ return 2495;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2494;
+ return 2496;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2851;
+ return 2857;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2852;
+ return 2858;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2853;
+ return 2859;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2845;
+ return 2851;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2846;
+ return 2852;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2847;
+ return 2853;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2506;
+ return 2508;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2507;
+ return 2509;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2508;
+ return 2510;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2808;
+ return 2814;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2854;
+ return 2860;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2855;
+ return 2861;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2856;
+ return 2862;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2809;
+ return 2815;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2519;
+ return 2521;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2543;
+ return 2545;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2535;
+ return 2537;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2527;
+ return 2529;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2486;
+ return 2488;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2609;
+ return 2613;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2754;
+ return 2758;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2615;
+ return 2619;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2500;
+ return 2502;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2756;
+ return 2762;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2829;
+ return 2835;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2762;
+ return 2768;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2520;
+ return 2522;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2544;
+ return 2546;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2536;
+ return 2538;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2528;
+ return 2530;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2487;
+ return 2489;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2610;
+ return 2614;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2755;
+ return 2759;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2616;
+ return 2620;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2501;
+ return 2503;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2757;
+ return 2763;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2830;
+ return 2836;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2763;
+ return 2769;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2551;
+ return 2553;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2575;
+ return 2577;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2567;
+ return 2569;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2559;
+ return 2561;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2516;
+ return 2518;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2464;
+ return 2466;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2814;
+ return 2820;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2744;
+ return 2748;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2552;
+ return 2554;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2576;
+ return 2578;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2568;
+ return 2570;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2560;
+ return 2562;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2465;
+ return 2467;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2828;
+ return 2834;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2815;
+ return 2821;
}
}
}
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2753;
+ return 2757;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2745;
+ return 2749;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2858;
+ return 2864;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2859;
+ return 2865;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2631;
+ return 2635;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2632;
+ return 2636;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2633;
+ return 2637;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2840;
+ return 2846;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2841;
+ return 2847;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2848;
+ return 2854;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2647;
+ return 2651;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2648;
+ return 2652;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2649;
+ return 2653;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2860;
+ return 2866;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2861;
+ return 2867;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2776;
+ return 2782;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2777;
+ return 2783;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2778;
+ return 2784;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2849;
+ return 2855;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2850;
+ return 2856;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2857;
+ return 2863;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2792;
+ return 2798;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2793;
+ return 2799;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2794;
+ return 2800;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2643;
+ return 2647;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2644;
+ return 2648;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2645;
+ return 2649;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2646;
+ return 2650;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2824;
+ return 2830;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2825;
+ return 2831;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2826;
+ return 2832;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2827;
+ return 2833;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2466;
+ return 2468;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2467;
+ return 2469;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2468;
+ return 2470;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2469;
+ return 2471;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2496;
+ return 2498;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2497;
+ return 2499;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2498;
+ return 2500;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2499;
+ return 2501;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2635;
+ return 2639;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2636;
+ return 2640;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2637;
+ return 2641;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2638;
+ return 2642;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2488;
+ return 2490;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2489;
+ return 2491;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2490;
+ return 2492;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2491;
+ return 2493;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2642;
+ return 2646;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2823;
+ return 2829;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2617;
+ return 2621;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2618;
+ return 2622;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2619;
+ return 2623;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2620;
+ return 2624;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2495;
+ return 2497;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2634;
+ return 2638;
}
}
else
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2788;
+ return 2794;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2789;
+ return 2795;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2790;
+ return 2796;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2791;
+ return 2797;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2751;
+ return 2755;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2752;
+ return 2756;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2780;
+ return 2786;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2781;
+ return 2787;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2782;
+ return 2788;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2783;
+ return 2789;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2787;
+ return 2793;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2764;
+ return 2770;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2765;
+ return 2771;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2766;
+ return 2772;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2767;
+ return 2773;
}
}
}
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2779;
+ return 2785;
}
}
else
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2659;
+ return 2663;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2660;
+ return 2664;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2661;
+ return 2665;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2662;
+ return 2666;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2510;
+ return 2512;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2511;
+ return 2513;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2512;
+ return 2514;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2513;
+ return 2515;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2651;
+ return 2655;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2652;
+ return 2656;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2653;
+ return 2657;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2654;
+ return 2658;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2502;
+ return 2504;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2503;
+ return 2505;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2504;
+ return 2506;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2505;
+ return 2507;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2658;
+ return 2662;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2816;
+ return 2822;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2817;
+ return 2823;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2818;
+ return 2824;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2819;
+ return 2825;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2611;
+ return 2615;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2612;
+ return 2616;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2613;
+ return 2617;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2614;
+ return 2618;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2509;
+ return 2511;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2650;
+ return 2654;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2514;
+ return 2516;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2515;
+ return 2517;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2804;
+ return 2810;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2805;
+ return 2811;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2806;
+ return 2812;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2807;
+ return 2813;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2796;
+ return 2802;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2797;
+ return 2803;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2798;
+ return 2804;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2799;
+ return 2805;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2740;
+ return 2744;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2741;
+ return 2745;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2742;
+ return 2746;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2743;
+ return 2747;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2803;
+ return 2809;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2746;
+ return 2750;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2747;
+ return 2751;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2758;
+ return 2764;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2759;
+ return 2765;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2760;
+ return 2766;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2761;
+ return 2767;
}
}
}
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2795;
+ return 2801;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2738;
+ return 2742;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2739;
+ return 2743;
}
}
}
@@ -4137,28 +4137,72 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 0) & 0x1) == 0)
{
- if (((word >> 5) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
if (((word >> 16) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxx01x0xxxxxxx0xxxx0
+ x1000001xx1xxxx0100xxxxxxxxxxxx0
sel. */
- return 2621;
+ return 2625;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxx11x0xxxxxxx0xxxx0
+ x1000001xx1xxxx1100xxxxxxxxxxxx0
sel. */
- return 2622;
+ return 2626;
}
}
else
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110x00xxxxxxxxx0
+ fclamp. */
+ return 2464;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110x10xxxxxxxxx0
+ fclamp. */
+ return 2465;
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110x01xxxxxxxxx0
+ sclamp. */
+ return 2611;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110x11xxxxxxxxx0
+ sclamp. */
+ return 2612;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 5) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4172,7 +4216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1000x0xx0xxxx0
smax. */
- return 2623;
+ return 2627;
}
else
{
@@ -4180,7 +4224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2625;
+ return 2629;
}
}
else
@@ -4191,7 +4235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2624;
+ return 2628;
}
else
{
@@ -4199,7 +4243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2626;
+ return 2630;
}
}
}
@@ -4213,7 +4257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001x0xx0xxxx0
sqdmulh. */
- return 2665;
+ return 2669;
}
else
{
@@ -4221,7 +4265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101x0xx0xxxx0
sqdmulh. */
- return 2667;
+ return 2671;
}
}
else
@@ -4232,7 +4276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011x0xx0xxxx0
sqdmulh. */
- return 2666;
+ return 2670;
}
else
{
@@ -4240,7 +4284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111x0xx0xxxx0
sqdmulh. */
- return 2668;
+ return 2672;
}
}
}
@@ -4257,7 +4301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x100x01xx0xxxx0
fmax. */
- return 2470;
+ return 2472;
}
else
{
@@ -4265,7 +4309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x01xx0xxxx0
fmax. */
- return 2472;
+ return 2474;
}
}
else
@@ -4276,7 +4320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x01xx0xxxx0
fmax. */
- return 2471;
+ return 2473;
}
else
{
@@ -4284,7 +4328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x01xx0xxxx0
fmax. */
- return 2473;
+ return 2475;
}
}
}
@@ -4309,49 +4353,90 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
}
}
- }
- else
- {
- if (((word >> 8) & 0x1) == 0)
+ else
{
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx00x00xx1xxxx0
- smin. */
- return 2627;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x100x00xx1xxxx0
+ smin. */
+ return 2631;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110x00xx1xxxx0
+ smin. */
+ return 2633;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx10x00xx1xxxx0
- smin. */
- return 2629;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x101x00xx1xxxx0
+ smin. */
+ return 2632;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x111x00xx1xxxx0
+ smin. */
+ return 2634;
+ }
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx01x00xx1xxxx0
- smin. */
- return 2628;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x100x10xx1xxxx0
+ srshl. */
+ return 2673;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110x10xx1xxxx0
+ srshl. */
+ return 2675;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx11x00xx1xxxx0
- smin. */
- return 2630;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x101x10xx1xxxx0
+ srshl. */
+ return 2674;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x111x10xx1xxxx0
+ srshl. */
+ return 2676;
+ }
}
}
}
@@ -4363,17 +4448,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx00x10xx1xxxx0
- srshl. */
- return 2669;
+ x1000001xx1xxxxx1x100xx1xx1xxxx0
+ fmaxnm. */
+ return 2476;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx10x10xx1xxxx0
- srshl. */
- return 2671;
+ x1000001xx1xxxxx1x110xx1xx1xxxx0
+ fmaxnm. */
+ return 2478;
}
}
else
@@ -4382,156 +4467,30 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx01x10xx1xxxx0
- srshl. */
- return 2670;
+ x1000001xx1xxxxx1x101xx1xx1xxxx0
+ fmaxnm. */
+ return 2477;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx11x10xx1xxxx0
- srshl. */
- return 2672;
+ x1000001xx1xxxxx1x111xx1xx1xxxx0
+ fmaxnm. */
+ return 2479;
}
}
}
}
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx00xx1xx1xxxx0
- fmaxnm. */
- return 2474;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx10xx1xx1xxxx0
- fmaxnm. */
- return 2476;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx01xx1xx1xxxx0
- fmaxnm. */
- return 2475;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx11xx1xx1xxxx0
- fmaxnm. */
- return 2477;
- }
- }
- }
}
}
else
{
- if (((word >> 5) & 0x1) == 0)
- {
- if (((word >> 8) & 0x1) == 0)
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx00xx0xx0xxxx1
- umax. */
- return 2768;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx10xx0xx0xxxx1
- umax. */
- return 2770;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx01xx0xx0xxxx1
- umax. */
- return 2769;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx11xx0xx0xxxx1
- umax. */
- return 2771;
- }
- }
- }
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx00xx1xx0xxxx1
- fmin. */
- return 2478;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx10xx1xx0xxxx1
- fmin. */
- return 2480;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx01xx1xx0xxxx1
- fmin. */
- return 2479;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx11xx1xx0xxxx1
- fmin. */
- return 2481;
- }
- }
- }
- }
- else
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 8) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
if (((word >> 11) & 0x1) == 0)
{
@@ -4539,17 +4498,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx00x00xx1xxxx1
- umin. */
- return 2772;
+ x1000001xx1xxxxx1xx000x0xx0xxxx1
+ umax. */
+ return 2774;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx10x00xx1xxxx1
- umin. */
- return 2774;
+ x1000001xx1xxxxx1xx100x0xx0xxxx1
+ umax. */
+ return 2776;
}
}
else
@@ -4558,17 +4517,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx01x00xx1xxxx1
- umin. */
- return 2773;
+ x1000001xx1xxxxx1xx010x0xx0xxxx1
+ umax. */
+ return 2775;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx11x00xx1xxxx1
- umin. */
- return 2775;
+ x1000001xx1xxxxx1xx110x0xx0xxxx1
+ umax. */
+ return 2777;
}
}
}
@@ -4580,17 +4539,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx00x10xx1xxxx1
- urshl. */
- return 2810;
+ x1000001xx1xxxxx1xx000x1xx0xxxx1
+ fmin. */
+ return 2480;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx10x10xx1xxxx1
- urshl. */
- return 2812;
+ x1000001xx1xxxxx1xx100x1xx0xxxx1
+ fmin. */
+ return 2482;
}
}
else
@@ -4599,63 +4558,170 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx01x10xx1xxxx1
- urshl. */
- return 2811;
+ x1000001xx1xxxxx1xx010x1xx0xxxx1
+ fmin. */
+ return 2481;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx11x10xx1xxxx1
- urshl. */
- return 2813;
+ x1000001xx1xxxxx1xx110x1xx0xxxx1
+ fmin. */
+ return 2483;
}
}
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx00xx1xx1xxxx1
- fminnm. */
- return 2482;
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00000xx1xxxx1
+ umin. */
+ return 2778;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10000xx1xxxx1
+ umin. */
+ return 2780;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01000xx1xxxx1
+ umin. */
+ return 2779;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11000xx1xxxx1
+ umin. */
+ return 2781;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx10xx1xx1xxxx1
- fminnm. */
- return 2484;
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx00010xx1xxxx1
+ urshl. */
+ return 2816;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx10010xx1xxxx1
+ urshl. */
+ return 2818;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx01010xx1xxxx1
+ urshl. */
+ return 2817;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx11010xx1xxxx1
+ urshl. */
+ return 2819;
+ }
+ }
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx01xx1xx1xxxx1
- fminnm. */
- return 2483;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx000x1xx1xxxx1
+ fminnm. */
+ return 2484;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx100x1xx1xxxx1
+ fminnm. */
+ return 2486;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx11xx1xx1xxxx1
- fminnm. */
- return 2485;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx010x1xx1xxxx1
+ fminnm. */
+ return 2485;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xx110x1xx1xxxx1
+ fminnm. */
+ return 2487;
+ }
}
}
}
}
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xxx01xxxxxxxxx1
+ uclamp. */
+ return 2760;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1xxx11xxxxxxxxx1
+ uclamp. */
+ return 2761;
+ }
+ }
}
}
}
@@ -4680,7 +4746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2679;
+ return 2683;
}
else
{
@@ -4688,7 +4754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2703;
+ return 2707;
}
}
else
@@ -4699,7 +4765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2695;
+ return 2699;
}
else
{
@@ -4707,7 +4773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2687;
+ return 2691;
}
}
}
@@ -4721,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2711;
+ return 2715;
}
else
{
@@ -4729,7 +4795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2735;
+ return 2739;
}
}
else
@@ -4740,7 +4806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2727;
+ return 2731;
}
else
{
@@ -4748,7 +4814,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2719;
+ return 2723;
}
}
}
@@ -4776,7 +4842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2680;
+ return 2684;
}
else
{
@@ -4784,7 +4850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2737;
+ return 2741;
}
}
else
@@ -4793,7 +4859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2704;
+ return 2708;
}
}
else
@@ -4804,7 +4870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2696;
+ return 2700;
}
else
{
@@ -4812,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2688;
+ return 2692;
}
}
}
@@ -4826,7 +4892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2712;
+ return 2716;
}
else
{
@@ -4834,7 +4900,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2736;
+ return 2740;
}
}
else
@@ -4845,7 +4911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2728;
+ return 2732;
}
else
{
@@ -4853,7 +4919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2720;
+ return 2724;
}
}
}
@@ -4895,7 +4961,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2675;
+ return 2679;
}
else
{
@@ -4903,7 +4969,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2676;
+ return 2680;
}
}
else
@@ -4914,7 +4980,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2699;
+ return 2703;
}
else
{
@@ -4922,7 +4988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2700;
+ return 2704;
}
}
}
@@ -4936,7 +5002,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2691;
+ return 2695;
}
else
{
@@ -4944,7 +5010,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2692;
+ return 2696;
}
}
else
@@ -4955,7 +5021,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2683;
+ return 2687;
}
else
{
@@ -4963,7 +5029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2684;
+ return 2688;
}
}
}
@@ -4980,7 +5046,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2707;
+ return 2711;
}
else
{
@@ -4988,7 +5054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2708;
+ return 2712;
}
}
else
@@ -4999,7 +5065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2731;
+ return 2735;
}
else
{
@@ -5007,7 +5073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2732;
+ return 2736;
}
}
}
@@ -5021,7 +5087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2723;
+ return 2727;
}
else
{
@@ -5029,7 +5095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2724;
+ return 2728;
}
}
else
@@ -5040,7 +5106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2715;
+ return 2719;
}
else
{
@@ -5048,7 +5114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2716;
+ return 2720;
}
}
}
@@ -7450,7 +7516,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2902;
+ return 2908;
}
else
{
@@ -7458,7 +7524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2910;
+ return 2916;
}
}
else
@@ -7469,7 +7535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2906;
+ return 2912;
}
else
{
@@ -7477,7 +7543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2913;
+ return 2919;
}
}
}
@@ -7515,7 +7581,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2962;
+ return 2968;
}
else
{
@@ -7523,7 +7589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2968;
+ return 2974;
}
}
else
@@ -7534,7 +7600,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2965;
+ return 2971;
}
else
{
@@ -7542,7 +7608,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2971;
+ return 2977;
}
}
}
@@ -7556,7 +7622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2986;
+ return 2992;
}
else
{
@@ -7564,7 +7630,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2992;
+ return 2998;
}
}
else
@@ -7575,7 +7641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2989;
+ return 2995;
}
else
{
@@ -7583,7 +7649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 2995;
+ return 3001;
}
}
}
@@ -7600,7 +7666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2974;
+ return 2980;
}
else
{
@@ -7608,7 +7674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2980;
+ return 2986;
}
}
else
@@ -7619,7 +7685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2977;
+ return 2983;
}
else
{
@@ -7627,7 +7693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2983;
+ return 2989;
}
}
}
@@ -7641,7 +7707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 2998;
+ return 3004;
}
else
{
@@ -7649,7 +7715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3004;
+ return 3010;
}
}
else
@@ -7660,7 +7726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3001;
+ return 3007;
}
else
{
@@ -7668,7 +7734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3007;
+ return 3013;
}
}
}
@@ -7733,7 +7799,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2903;
+ return 2909;
}
else
{
@@ -7741,7 +7807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2911;
+ return 2917;
}
}
else
@@ -7752,7 +7818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2907;
+ return 2913;
}
else
{
@@ -7760,7 +7826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2914;
+ return 2920;
}
}
}
@@ -7798,7 +7864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2963;
+ return 2969;
}
else
{
@@ -7806,7 +7872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2969;
+ return 2975;
}
}
else
@@ -7817,7 +7883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2966;
+ return 2972;
}
else
{
@@ -7825,7 +7891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2972;
+ return 2978;
}
}
}
@@ -7839,7 +7905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2987;
+ return 2993;
}
else
{
@@ -7847,7 +7913,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2993;
+ return 2999;
}
}
else
@@ -7858,7 +7924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2990;
+ return 2996;
}
else
{
@@ -7866,7 +7932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 2996;
+ return 3002;
}
}
}
@@ -7883,7 +7949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2975;
+ return 2981;
}
else
{
@@ -7891,7 +7957,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2981;
+ return 2987;
}
}
else
@@ -7902,7 +7968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2978;
+ return 2984;
}
else
{
@@ -7910,7 +7976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2984;
+ return 2990;
}
}
}
@@ -7924,7 +7990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 2999;
+ return 3005;
}
else
{
@@ -7932,7 +7998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3005;
+ return 3011;
}
}
else
@@ -7943,7 +8009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3002;
+ return 3008;
}
else
{
@@ -7951,7 +8017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3008;
+ return 3014;
}
}
}
@@ -8019,7 +8085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2905;
+ return 2911;
}
else
{
@@ -8027,7 +8093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2912;
+ return 2918;
}
}
else
@@ -8036,7 +8102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2909;
+ return 2915;
}
}
else
@@ -8047,7 +8113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2904;
+ return 2910;
}
else
{
@@ -8055,7 +8121,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2908;
+ return 2914;
}
}
}
@@ -8117,7 +8183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2964;
+ return 2970;
}
else
{
@@ -8125,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3058;
+ return 3064;
}
}
else
@@ -8136,7 +8202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2970;
+ return 2976;
}
else
{
@@ -8144,7 +8210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3060;
+ return 3066;
}
}
}
@@ -8158,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2967;
+ return 2973;
}
else
{
@@ -8166,7 +8232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3059;
+ return 3065;
}
}
else
@@ -8175,7 +8241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2973;
+ return 2979;
}
}
}
@@ -8191,7 +8257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2988;
+ return 2994;
}
else
{
@@ -8199,7 +8265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3064;
+ return 3070;
}
}
else
@@ -8210,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 2994;
+ return 3000;
}
else
{
@@ -8218,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3066;
+ return 3072;
}
}
}
@@ -8232,7 +8298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2991;
+ return 2997;
}
else
{
@@ -8240,7 +8306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3065;
+ return 3071;
}
}
else
@@ -8249,7 +8315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 2997;
+ return 3003;
}
}
}
@@ -8268,7 +8334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2976;
+ return 2982;
}
else
{
@@ -8276,7 +8342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3061;
+ return 3067;
}
}
else
@@ -8287,7 +8353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2982;
+ return 2988;
}
else
{
@@ -8295,7 +8361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3063;
+ return 3069;
}
}
}
@@ -8309,7 +8375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2979;
+ return 2985;
}
else
{
@@ -8317,7 +8383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3062;
+ return 3068;
}
}
else
@@ -8326,7 +8392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2985;
+ return 2991;
}
}
}
@@ -8342,7 +8408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3000;
+ return 3006;
}
else
{
@@ -8350,7 +8416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3067;
+ return 3073;
}
}
else
@@ -8361,7 +8427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3006;
+ return 3012;
}
else
{
@@ -8369,7 +8435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3069;
+ return 3075;
}
}
}
@@ -8383,7 +8449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3003;
+ return 3009;
}
else
{
@@ -8391,7 +8457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3068;
+ return 3074;
}
}
else
@@ -8400,7 +8466,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3009;
+ return 3015;
}
}
}
@@ -8773,7 +8839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3087;
+ return 3093;
}
else
{
@@ -8791,7 +8857,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3090;
+ return 3096;
}
}
}
@@ -8871,7 +8937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2900;
+ return 2906;
}
else
{
@@ -8879,7 +8945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2901;
+ return 2907;
}
}
else
@@ -8986,7 +9052,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3092;
+ return 3098;
}
}
}
@@ -9002,7 +9068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3089;
+ return 3095;
}
else
{
@@ -9047,7 +9113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2899;
+ return 2905;
}
else
{
@@ -9141,7 +9207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3091;
+ return 3097;
}
}
}
@@ -9271,7 +9337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3093;
+ return 3099;
}
}
}
@@ -9287,7 +9353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3088;
+ return 3094;
}
else
{
@@ -10129,7 +10195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2919;
+ return 2925;
}
}
}
@@ -10203,7 +10269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2920;
+ return 2926;
}
}
}
@@ -12877,7 +12943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2918;
+ return 2924;
}
}
}
@@ -14581,7 +14647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2947;
+ return 2953;
}
}
else
@@ -14824,7 +14890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2923;
+ return 2929;
}
else
{
@@ -14832,7 +14898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2924;
+ return 2930;
}
}
else
@@ -15064,7 +15130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2944;
+ return 2950;
}
else
{
@@ -15085,7 +15151,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2951;
+ return 2957;
}
else
{
@@ -15093,7 +15159,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2950;
+ return 2956;
}
}
else
@@ -15148,7 +15214,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2943;
+ return 2949;
}
else
{
@@ -15160,7 +15226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2949;
+ return 2955;
}
else
{
@@ -15168,7 +15234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2948;
+ return 2954;
}
}
else
@@ -15219,7 +15285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2927;
+ return 2933;
}
else
{
@@ -15227,7 +15293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2928;
+ return 2934;
}
}
else
@@ -15586,7 +15652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2921;
+ return 2927;
}
else
{
@@ -15619,7 +15685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2945;
+ return 2951;
}
else
{
@@ -15649,7 +15715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2922;
+ return 2928;
}
else
{
@@ -15778,7 +15844,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2931;
+ return 2937;
}
else
{
@@ -15788,7 +15854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2933;
+ return 2939;
}
else
{
@@ -15796,7 +15862,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2935;
+ return 2941;
}
}
}
@@ -15808,7 +15874,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2932;
+ return 2938;
}
else
{
@@ -15818,7 +15884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2934;
+ return 2940;
}
else
{
@@ -15826,7 +15892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2936;
+ return 2942;
}
}
}
@@ -16885,7 +16951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2915;
+ return 2921;
}
else
{
@@ -16893,7 +16959,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2917;
+ return 2923;
}
}
else
@@ -16902,7 +16968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2916;
+ return 2922;
}
}
}
@@ -18398,7 +18464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2925;
+ return 2931;
}
else
{
@@ -18406,7 +18472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2926;
+ return 2932;
}
}
}
@@ -18780,7 +18846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2929;
+ return 2935;
}
else
{
@@ -18788,7 +18854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2930;
+ return 2936;
}
}
}
@@ -19149,7 +19215,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2831;
+ return 2837;
}
else
{
@@ -19157,7 +19223,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2832;
+ return 2838;
}
}
else
@@ -19187,7 +19253,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2606;
+ return 2608;
}
}
}
@@ -19201,7 +19267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2834;
+ return 2840;
}
else
{
@@ -19209,7 +19275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2833;
+ return 2839;
}
}
else
@@ -19239,7 +19305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2608;
+ return 2610;
}
}
}
@@ -19256,7 +19322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2838;
+ return 2844;
}
else
{
@@ -19264,7 +19330,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2835;
+ return 2841;
}
}
else
@@ -19294,7 +19360,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2607;
+ return 2609;
}
}
}
@@ -19308,7 +19374,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2836;
+ return 2842;
}
else
{
@@ -19316,7 +19382,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2837;
+ return 2843;
}
}
else
@@ -20442,7 +20508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2946;
+ return 2952;
}
}
else
@@ -21803,7 +21869,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3082;
+ return 3088;
}
else
{
@@ -22383,7 +22449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3010;
+ return 3016;
}
else
{
@@ -22391,7 +22457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3012;
+ return 3018;
}
}
else
@@ -22402,7 +22468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3016;
+ return 3022;
}
else
{
@@ -22410,7 +22476,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3018;
+ return 3024;
}
}
}
@@ -22424,7 +22490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3013;
+ return 3019;
}
else
{
@@ -22432,7 +22498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3015;
+ return 3021;
}
}
else
@@ -22443,7 +22509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3019;
+ return 3025;
}
else
{
@@ -22451,7 +22517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3021;
+ return 3027;
}
}
}
@@ -22468,7 +22534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3034;
+ return 3040;
}
else
{
@@ -22476,7 +22542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3036;
+ return 3042;
}
}
else
@@ -22487,7 +22553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3040;
+ return 3046;
}
else
{
@@ -22495,7 +22561,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3042;
+ return 3048;
}
}
}
@@ -22509,7 +22575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3037;
+ return 3043;
}
else
{
@@ -22517,7 +22583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3039;
+ return 3045;
}
}
else
@@ -22528,7 +22594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3043;
+ return 3049;
}
else
{
@@ -22536,7 +22602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3045;
+ return 3051;
}
}
}
@@ -22556,7 +22622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3022;
+ return 3028;
}
else
{
@@ -22564,7 +22630,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3024;
+ return 3030;
}
}
else
@@ -22575,7 +22641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3028;
+ return 3034;
}
else
{
@@ -22583,7 +22649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3030;
+ return 3036;
}
}
}
@@ -22597,7 +22663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3025;
+ return 3031;
}
else
{
@@ -22605,7 +22671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3027;
+ return 3033;
}
}
else
@@ -22616,7 +22682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3031;
+ return 3037;
}
else
{
@@ -22624,7 +22690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3033;
+ return 3039;
}
}
}
@@ -22641,7 +22707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3046;
+ return 3052;
}
else
{
@@ -22649,7 +22715,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3048;
+ return 3054;
}
}
else
@@ -22660,7 +22726,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3052;
+ return 3058;
}
else
{
@@ -22668,7 +22734,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3054;
+ return 3060;
}
}
}
@@ -22682,7 +22748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3049;
+ return 3055;
}
else
{
@@ -22690,7 +22756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3051;
+ return 3057;
}
}
else
@@ -22701,7 +22767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3055;
+ return 3061;
}
else
{
@@ -22709,7 +22775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3057;
+ return 3063;
}
}
}
@@ -22743,7 +22809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3011;
+ return 3017;
}
else
{
@@ -22751,7 +22817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3070;
+ return 3076;
}
}
else
@@ -22762,7 +22828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3017;
+ return 3023;
}
else
{
@@ -22770,7 +22836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3072;
+ return 3078;
}
}
}
@@ -22784,7 +22850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3014;
+ return 3020;
}
else
{
@@ -22792,7 +22858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3071;
+ return 3077;
}
}
else
@@ -22801,7 +22867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3020;
+ return 3026;
}
}
}
@@ -22817,7 +22883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3035;
+ return 3041;
}
else
{
@@ -22825,7 +22891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3076;
+ return 3082;
}
}
else
@@ -22836,7 +22902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3041;
+ return 3047;
}
else
{
@@ -22844,7 +22910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3078;
+ return 3084;
}
}
}
@@ -22858,7 +22924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3038;
+ return 3044;
}
else
{
@@ -22866,7 +22932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3077;
+ return 3083;
}
}
else
@@ -22875,7 +22941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3044;
+ return 3050;
}
}
}
@@ -22894,7 +22960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3023;
+ return 3029;
}
else
{
@@ -22902,7 +22968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3073;
+ return 3079;
}
}
else
@@ -22913,7 +22979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3029;
+ return 3035;
}
else
{
@@ -22921,7 +22987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3075;
+ return 3081;
}
}
}
@@ -22935,7 +23001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3026;
+ return 3032;
}
else
{
@@ -22943,7 +23009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3074;
+ return 3080;
}
}
else
@@ -22952,7 +23018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3032;
+ return 3038;
}
}
}
@@ -22968,7 +23034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3047;
+ return 3053;
}
else
{
@@ -22976,7 +23042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3079;
+ return 3085;
}
}
else
@@ -22987,7 +23053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3053;
+ return 3059;
}
else
{
@@ -22995,7 +23061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3081;
+ return 3087;
}
}
}
@@ -23009,7 +23075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3050;
+ return 3056;
}
else
{
@@ -23017,7 +23083,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3080;
+ return 3086;
}
}
else
@@ -23026,7 +23092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3056;
+ return 3062;
}
}
}
@@ -23193,7 +23259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2937;
+ return 2943;
}
}
}
@@ -23226,7 +23292,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2863;
+ return 2869;
}
}
else
@@ -23300,7 +23366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2939;
+ return 2945;
}
}
}
@@ -23333,7 +23399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2940;
+ return 2946;
}
}
else
@@ -23380,7 +23446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2870;
+ return 2876;
}
else
{
@@ -23388,7 +23454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2872;
+ return 2878;
}
}
else
@@ -23399,7 +23465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2874;
+ return 2880;
}
else
{
@@ -23413,7 +23479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2875;
+ return 2881;
}
else
{
@@ -23421,7 +23487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2868;
+ return 2874;
}
}
else
@@ -23430,7 +23496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2877;
+ return 2883;
}
}
else
@@ -23443,7 +23509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2876;
+ return 2882;
}
else
{
@@ -23451,7 +23517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2881;
+ return 2887;
}
}
else
@@ -23460,7 +23526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2878;
+ return 2884;
}
}
}
@@ -23641,7 +23707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2862;
+ return 2868;
}
}
else
@@ -23672,7 +23738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2938;
+ return 2944;
}
else
{
@@ -23691,7 +23757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2954;
+ return 2960;
}
else
{
@@ -23701,7 +23767,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2952;
+ return 2958;
}
else
{
@@ -23711,7 +23777,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2959;
+ return 2965;
}
else
{
@@ -23719,7 +23785,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2958;
+ return 2964;
}
}
}
@@ -24303,7 +24369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2955;
+ return 2961;
}
else
{
@@ -24311,7 +24377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2956;
+ return 2962;
}
}
}
@@ -24629,7 +24695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2873;
+ return 2879;
}
}
else
@@ -25240,7 +25306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2866;
+ return 2872;
}
}
}
@@ -25292,7 +25358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2879;
+ return 2885;
}
}
}
@@ -25535,7 +25601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2869;
+ return 2875;
}
}
else
@@ -25611,7 +25677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2882;
+ return 2888;
}
}
else
@@ -26437,7 +26503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2867;
+ return 2873;
}
}
else
@@ -26469,7 +26535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2880;
+ return 2886;
}
}
else
@@ -26709,7 +26775,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2871;
+ return 2877;
}
}
else
@@ -26741,7 +26807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2885;
+ return 2891;
}
else
{
@@ -26749,7 +26815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2889;
+ return 2895;
}
}
}
@@ -26771,7 +26837,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2886;
+ return 2892;
}
else
{
@@ -26779,7 +26845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2890;
+ return 2896;
}
}
}
@@ -26818,7 +26884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2883;
+ return 2889;
}
else
{
@@ -26826,7 +26892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2887;
+ return 2893;
}
}
else
@@ -26848,7 +26914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2884;
+ return 2890;
}
else
{
@@ -26856,7 +26922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2888;
+ return 2894;
}
}
else
@@ -28664,7 +28730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2891;
+ return 2897;
}
else
{
@@ -28672,7 +28738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2895;
+ return 2901;
}
}
else
@@ -28694,7 +28760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2892;
+ return 2898;
}
else
{
@@ -28702,7 +28768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2896;
+ return 2902;
}
}
else
@@ -29208,7 +29274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2893;
+ return 2899;
}
else
{
@@ -29216,7 +29282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2897;
+ return 2903;
}
}
}
@@ -29238,7 +29304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2894;
+ return 2900;
}
else
{
@@ -29246,7 +29312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2898;
+ return 2904;
}
}
}
@@ -29302,7 +29368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2865;
+ return 2871;
}
else
{
@@ -29310,7 +29376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2864;
+ return 2870;
}
}
}
@@ -29413,7 +29479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2942;
+ return 2948;
}
else
{
@@ -29421,7 +29487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2941;
+ return 2947;
}
}
else
@@ -29432,7 +29498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2953;
+ return 2959;
}
else
{
@@ -29442,7 +29508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2961;
+ return 2967;
}
else
{
@@ -29450,7 +29516,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2960;
+ return 2966;
}
}
}
@@ -29941,22 +30007,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
+ case 2596: value = 2604; break; /* mov --> mova. */
+ case 2604: return NULL; /* mova --> NULL. */
+ case 2592: value = 2600; break; /* mov --> mova. */
+ case 2600: return NULL; /* mova --> NULL. */
case 2594: value = 2602; break; /* mov --> mova. */
case 2602: return NULL; /* mova --> NULL. */
case 2590: value = 2598; break; /* mov --> mova. */
case 2598: return NULL; /* mova --> NULL. */
- case 2592: value = 2600; break; /* mov --> mova. */
- case 2600: return NULL; /* mova --> NULL. */
- case 2588: value = 2596; break; /* mov --> mova. */
- case 2596: return NULL; /* mova --> NULL. */
+ case 2597: value = 2605; break; /* mov --> mova. */
+ case 2605: return NULL; /* mova --> NULL. */
+ case 2593: value = 2601; break; /* mov --> mova. */
+ case 2601: return NULL; /* mova --> NULL. */
case 2595: value = 2603; break; /* mov --> mova. */
case 2603: return NULL; /* mova --> NULL. */
case 2591: value = 2599; break; /* mov --> mova. */
case 2599: return NULL; /* mova --> NULL. */
- case 2593: value = 2601; break; /* mov --> mova. */
- case 2601: return NULL; /* mova --> NULL. */
- case 2589: value = 2597; break; /* mov --> mova. */
- case 2597: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -29978,11 +30044,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3083; break; /* addg --> smax. */
- case 3083: value = 3084; break; /* smax --> umax. */
- case 3084: value = 3085; break; /* umax --> smin. */
- case 3085: value = 3086; break; /* smin --> umin. */
- case 3086: return NULL; /* umin --> NULL. */
+ case 19: value = 3089; break; /* addg --> smax. */
+ case 3089: value = 3090; break; /* smax --> umax. */
+ case 3090: value = 3091; break; /* umax --> smin. */
+ case 3091: value = 3092; break; /* smin --> umin. */
+ case 3092: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30140,8 +30206,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2957; break; /* fcvt --> bfcvt. */
- case 2957: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2963; break; /* fcvt --> bfcvt. */
+ case 2963: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index cb6f0d65769..ce04dff613e 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5377,6 +5377,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("cntp", 0x25208200, 0xff3ffa00, sme_size_22, 0, OP3 (Rd, SME_PNn, SME_VLxN_10), OP_SVE_XV_BHSD, 0, 0),
SME2_INSN ("fadd", 0xc1a01c00, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
+ SME2_INSN ("fclamp", 0xc120c000, 0xff20fc01, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_HSD, 0, 0),
+ SME2_INSN ("fclamp", 0xc120c800, 0xff20fc03, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_HSD, 0, 0),
SME2_INSN ("fdot", 0xc1501008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("fdot", 0xc1509008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fdot", 0xc1201000, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
@@ -5522,6 +5524,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("pext", 0x25207010, 0xff3ffc10, sme_size_22, 0, OP2 (SVE_Pd, SME_PNn3_INDEX2), OP_SVE_VU_BHSD, 0, 0),
SME2_INSN ("pext", 0x25207410, 0xff3ffe10, sme_size_22, 0, OP2 (SME_PdxN, SME_PNn3_INDEX1), OP_SVE_VU_BHSD, F_OD (2), 0),
SME2_INSN ("ptrue", 0x25207810, 0xff3ffff8, sme_size_22, 0, OP1 (SME_PNd3), OP_SVE_V_BHSD, 0, 0),
+ SME2_INSN ("sclamp", 0xc120c400, 0xff20fc01, sme_size_22, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
+ SME2_INSN ("sclamp", 0xc120cc00, 0xff20fc03, sme_size_22, 0, OP3 (SME_Zdnx4, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
SME2_INSN ("sdot", 0xc1501000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("sdot", 0xc1509000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("sdot", 0xc1601408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
@@ -5669,6 +5673,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("suvdot", 0xc1508038, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("svdot", 0xc1500020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("svdot", 0xc1508020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("uclamp", 0xc120c401, 0xff20fc01, sme_size_22, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
+ SME2_INSN ("uclamp", 0xc120cc01, 0xff20fc03, sme_size_22, 0, OP3 (SME_Zdnx4, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
SME2_INSN ("udot", 0xc1501010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("udot", 0xc1509010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("udot", 0xc1601418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 20/31] aarch64: Add the SME2 FP<->int conversion instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (18 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 19/31] aarch64: Add the SME2 CLAMP instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 21/31] aarch64: Add the SME2 FP<->FP " Richard Sandiford
` (12 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds the SME2 versions of the FP<->integer conversion
instructions FCVT* and *CVTF. It also adds FP rounding instructions
FRINT*, which share the same format.
---
gas/testsuite/gas/aarch64/sme2-23-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-23-invalid.l | 14 +
gas/testsuite/gas/aarch64/sme2-23-invalid.s | 8 +
gas/testsuite/gas/aarch64/sme2-23-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-23-noarch.l | 65 +
gas/testsuite/gas/aarch64/sme2-23.d | 73 +
gas/testsuite/gas/aarch64/sme2-23.s | 79 +
opcodes/aarch64-dis-2.c | 1674 ++++++++++---------
opcodes/aarch64-tbl.h | 20 +
9 files changed, 1190 insertions(+), 749 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-23-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-23-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-23-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-23-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-23-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-23.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-23.s
diff --git a/gas/testsuite/gas/aarch64/sme2-23-invalid.d b/gas/testsuite/gas/aarch64/sme2-23-invalid.d
new file mode 100644
index 00000000000..b9deb8e1c04
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-23-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-23-invalid.s
+#error_output: sme2-23-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-23-invalid.l b/gas/testsuite/gas/aarch64/sme2-23-invalid.l
new file mode 100644
index 00000000000..b3e9312cd0f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-23-invalid.l
@@ -0,0 +1,14 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fcvtzs 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fcvtzs {z0\.s,z1\.s},0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z0\.s,z1\.s},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fcvtzs {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z30\.h,z31\.h},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fcvtzs {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z0\.d,z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fcvtzs {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fcvtzs {z1\.s,z2\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvtzs {z0\.s,z1\.s},{z29\.s-z30\.s}'
diff --git a/gas/testsuite/gas/aarch64/sme2-23-invalid.s b/gas/testsuite/gas/aarch64/sme2-23-invalid.s
new file mode 100644
index 00000000000..45ee01ea85e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-23-invalid.s
@@ -0,0 +1,8 @@
+ fcvtzs 0, { z0.s - z1.s }
+ fcvtzs { z0.s, z1.s }, 0
+
+ fcvtzs { z0.s, z1.s }, { z0.h - z1.h }
+ fcvtzs { z30.h, z31.h }, { z0.s - z1.s }
+ fcvtzs { z0.d, z1.d }, { z30.d - z31.d }
+ fcvtzs { z1.s, z2.s }, { z30.s - z31.s }
+ fcvtzs { z0.s, z1.s }, { z29.s - z30.s }
diff --git a/gas/testsuite/gas/aarch64/sme2-23-noarch.d b/gas/testsuite/gas/aarch64/sme2-23-noarch.d
new file mode 100644
index 00000000000..a30446f6aa7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-23-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-23.s
+#error_output: sme2-23-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-23-noarch.l b/gas/testsuite/gas/aarch64/sme2-23-noarch.l
new file mode 100644
index 00000000000..033e87a5b72
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-23-noarch.l
@@ -0,0 +1,65 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s,z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z30\.s,z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s,z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z10\.s,z11\.s},{z26\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z24\.s-z27\.s},{z8\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s,z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z30\.s,z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s,z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z12\.s,z13\.s},{z14\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z16\.s-z19\.s},{z12\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s,z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z30\.s,z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s,z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z10\.s,z11\.s},{z26\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z24\.s-z27\.s},{z8\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s,z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z30\.s,z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s,z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z10\.s,z11\.s},{z26\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z24\.s-z27\.s},{z8\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s,z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z30\.s,z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s,z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z10\.s,z11\.s},{z26\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z24\.s-z27\.s},{z8\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s,z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z30\.s,z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s,z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z10\.s,z11\.s},{z26\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z24\.s-z27\.s},{z8\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s,z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z30\.s,z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s,z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z10\.s,z11\.s},{z26\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z24\.s-z27\.s},{z8\.s-z11\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s,z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z30\.s,z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s,z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z10\.s,z11\.s},{z26\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z24\.s-z27\.s},{z8\.s-z11\.s}'
diff --git a/gas/testsuite/gas/aarch64/sme2-23.d b/gas/testsuite/gas/aarch64/sme2-23.d
new file mode 100644
index 00000000000..d82704b1874
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-23.d
@@ -0,0 +1,73 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c121e000 fcvtzs {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c121e01e fcvtzs {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c121e3c0 fcvtzs {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c121e34a fcvtzs {z10\.s-z11\.s}, {z26\.s-z27\.s}
+[^:]+: c131e000 fcvtzs {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c131e01c fcvtzs {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c131e380 fcvtzs {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c131e118 fcvtzs {z24\.s-z27\.s}, {z8\.s-z11\.s}
+[^:]+: c121e020 fcvtzu {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c121e03e fcvtzu {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c121e3e0 fcvtzu {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c121e1ec fcvtzu {z12\.s-z13\.s}, {z14\.s-z15\.s}
+[^:]+: c131e020 fcvtzu {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c131e03c fcvtzu {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c131e3a0 fcvtzu {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c131e1b0 fcvtzu {z16\.s-z19\.s}, {z12\.s-z15\.s}
+[^:]+: c1ace000 frinta {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1ace01e frinta {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1ace3c0 frinta {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1ace34a frinta {z10\.s-z11\.s}, {z26\.s-z27\.s}
+[^:]+: c1bce000 frinta {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1bce01c frinta {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bce380 frinta {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1bce118 frinta {z24\.s-z27\.s}, {z8\.s-z11\.s}
+[^:]+: c1aae000 frintm {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1aae01e frintm {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1aae3c0 frintm {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1aae34a frintm {z10\.s-z11\.s}, {z26\.s-z27\.s}
+[^:]+: c1bae000 frintm {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1bae01c frintm {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bae380 frintm {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1bae118 frintm {z24\.s-z27\.s}, {z8\.s-z11\.s}
+[^:]+: c1a8e000 frintn {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a8e01e frintn {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1a8e3c0 frintn {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1a8e34a frintn {z10\.s-z11\.s}, {z26\.s-z27\.s}
+[^:]+: c1b8e000 frintn {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1b8e01c frintn {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1b8e380 frintn {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b8e118 frintn {z24\.s-z27\.s}, {z8\.s-z11\.s}
+[^:]+: c1a9e000 frintp {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a9e01e frintp {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1a9e3c0 frintp {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1a9e34a frintp {z10\.s-z11\.s}, {z26\.s-z27\.s}
+[^:]+: c1b9e000 frintp {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1b9e01c frintp {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1b9e380 frintp {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b9e118 frintp {z24\.s-z27\.s}, {z8\.s-z11\.s}
+[^:]+: c122e000 scvtf {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c122e01e scvtf {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c122e3c0 scvtf {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c122e34a scvtf {z10\.s-z11\.s}, {z26\.s-z27\.s}
+[^:]+: c132e000 scvtf {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c132e01c scvtf {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c132e380 scvtf {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c132e118 scvtf {z24\.s-z27\.s}, {z8\.s-z11\.s}
+[^:]+: c122e020 ucvtf {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c122e03e ucvtf {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c122e3e0 ucvtf {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c122e36a ucvtf {z10\.s-z11\.s}, {z26\.s-z27\.s}
+[^:]+: c132e020 ucvtf {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c132e03c ucvtf {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c132e3a0 ucvtf {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c132e138 ucvtf {z24\.s-z27\.s}, {z8\.s-z11\.s}
diff --git a/gas/testsuite/gas/aarch64/sme2-23.s b/gas/testsuite/gas/aarch64/sme2-23.s
new file mode 100644
index 00000000000..55ec0f8e203
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-23.s
@@ -0,0 +1,79 @@
+ fcvtzs { z0.s, z1.s }, { z0.s - z1.s }
+ fcvtzs { z30.s, z31.s }, { z0.s - z1.s }
+ fcvtzs { z0.s, z1.s }, { z30.s - z31.s }
+ fcvtzs { z10.s, z11.s }, { z26.s - z27.s }
+
+ fcvtzs { z0.s - z3.s }, { z0.s - z3.s }
+ fcvtzs { z28.s - z31.s }, { z0.s - z3.s }
+ fcvtzs { z0.s - z3.s }, { z28.s - z31.s }
+ fcvtzs { z24.s - z27.s }, { z8.s - z11.s }
+
+ fcvtzu { z0.s, z1.s }, { z0.s - z1.s }
+ fcvtzu { z30.s, z31.s }, { z0.s - z1.s }
+ fcvtzu { z0.s, z1.s }, { z30.s - z31.s }
+ fcvtzu { z12.s, z13.s }, { z14.s - z15.s }
+
+ fcvtzu { z0.s - z3.s }, { z0.s - z3.s }
+ fcvtzu { z28.s - z31.s }, { z0.s - z3.s }
+ fcvtzu { z0.s - z3.s }, { z28.s - z31.s }
+ fcvtzu { z16.s - z19.s }, { z12.s - z15.s }
+
+ frinta { z0.s, z1.s }, { z0.s - z1.s }
+ frinta { z30.s, z31.s }, { z0.s - z1.s }
+ frinta { z0.s, z1.s }, { z30.s - z31.s }
+ frinta { z10.s, z11.s }, { z26.s - z27.s }
+
+ frinta { z0.s - z3.s }, { z0.s - z3.s }
+ frinta { z28.s - z31.s }, { z0.s - z3.s }
+ frinta { z0.s - z3.s }, { z28.s - z31.s }
+ frinta { z24.s - z27.s }, { z8.s - z11.s }
+
+ frintm { z0.s, z1.s }, { z0.s - z1.s }
+ frintm { z30.s, z31.s }, { z0.s - z1.s }
+ frintm { z0.s, z1.s }, { z30.s - z31.s }
+ frintm { z10.s, z11.s }, { z26.s - z27.s }
+
+ frintm { z0.s - z3.s }, { z0.s - z3.s }
+ frintm { z28.s - z31.s }, { z0.s - z3.s }
+ frintm { z0.s - z3.s }, { z28.s - z31.s }
+ frintm { z24.s - z27.s }, { z8.s - z11.s }
+
+ frintn { z0.s, z1.s }, { z0.s - z1.s }
+ frintn { z30.s, z31.s }, { z0.s - z1.s }
+ frintn { z0.s, z1.s }, { z30.s - z31.s }
+ frintn { z10.s, z11.s }, { z26.s - z27.s }
+
+ frintn { z0.s - z3.s }, { z0.s - z3.s }
+ frintn { z28.s - z31.s }, { z0.s - z3.s }
+ frintn { z0.s - z3.s }, { z28.s - z31.s }
+ frintn { z24.s - z27.s }, { z8.s - z11.s }
+
+ frintp { z0.s, z1.s }, { z0.s - z1.s }
+ frintp { z30.s, z31.s }, { z0.s - z1.s }
+ frintp { z0.s, z1.s }, { z30.s - z31.s }
+ frintp { z10.s, z11.s }, { z26.s - z27.s }
+
+ frintp { z0.s - z3.s }, { z0.s - z3.s }
+ frintp { z28.s - z31.s }, { z0.s - z3.s }
+ frintp { z0.s - z3.s }, { z28.s - z31.s }
+ frintp { z24.s - z27.s }, { z8.s - z11.s }
+
+ scvtf { z0.s, z1.s }, { z0.s - z1.s }
+ scvtf { z30.s, z31.s }, { z0.s - z1.s }
+ scvtf { z0.s, z1.s }, { z30.s - z31.s }
+ scvtf { z10.s, z11.s }, { z26.s - z27.s }
+
+ scvtf { z0.s - z3.s }, { z0.s - z3.s }
+ scvtf { z28.s - z31.s }, { z0.s - z3.s }
+ scvtf { z0.s - z3.s }, { z28.s - z31.s }
+ scvtf { z24.s - z27.s }, { z8.s - z11.s }
+
+ ucvtf { z0.s, z1.s }, { z0.s - z1.s }
+ ucvtf { z30.s, z31.s }, { z0.s - z1.s }
+ ucvtf { z0.s, z1.s }, { z30.s - z31.s }
+ ucvtf { z10.s, z11.s }, { z26.s - z27.s }
+
+ ucvtf { z0.s - z3.s }, { z0.s - z3.s }
+ ucvtf { z28.s - z31.s }, { z0.s - z3.s }
+ ucvtf { z0.s - z3.s }, { z28.s - z31.s }
+ ucvtf { z24.s - z27.s }, { z8.s - z11.s }
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 9baf928fa96..90a96f0ce5f 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2845;
+ return 2861;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2589;
+ return 2601;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2588;
+ return 2600;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2587;
+ return 2599;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2596;
+ return 2608;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2592;
+ return 2604;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2586;
+ return 2598;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2585;
+ return 2597;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2607;
+ return 2619;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2606;
+ return 2618;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2584;
+ return 2596;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2594;
+ return 2606;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2590;
+ return 2602;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2597;
+ return 2609;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2593;
+ return 2605;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2595;
+ return 2607;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2591;
+ return 2603;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2523;
+ return 2535;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2524;
+ return 2536;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2547;
+ return 2559;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2548;
+ return 2560;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2539;
+ return 2551;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2540;
+ return 2552;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2531;
+ return 2543;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2532;
+ return 2544;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2555;
+ return 2567;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2556;
+ return 2568;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2579;
+ return 2591;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2580;
+ return 2592;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2571;
+ return 2583;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2572;
+ return 2584;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2563;
+ return 2575;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2564;
+ return 2576;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2667;
+ return 2681;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2668;
+ return 2682;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2519;
+ return 2531;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2520;
+ return 2532;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2543;
+ return 2555;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2544;
+ return 2556;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2535;
+ return 2547;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2536;
+ return 2548;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2527;
+ return 2539;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2528;
+ return 2540;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2551;
+ return 2563;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2552;
+ return 2564;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2575;
+ return 2587;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2576;
+ return 2588;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2567;
+ return 2579;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2568;
+ return 2580;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2559;
+ return 2571;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2560;
+ return 2572;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2681;
+ return 2695;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2682;
+ return 2696;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2705;
+ return 2719;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2706;
+ return 2720;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2697;
+ return 2711;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2698;
+ return 2712;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2689;
+ return 2703;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2690;
+ return 2704;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2713;
+ return 2727;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2714;
+ return 2728;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2737;
+ return 2751;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2738;
+ return 2752;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2729;
+ return 2743;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2730;
+ return 2744;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2721;
+ return 2735;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2722;
+ return 2736;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2677;
+ return 2691;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2678;
+ return 2692;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2701;
+ return 2715;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2702;
+ return 2716;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2693;
+ return 2707;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2694;
+ return 2708;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2685;
+ return 2699;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2686;
+ return 2700;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2709;
+ return 2723;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2710;
+ return 2724;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2733;
+ return 2747;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2734;
+ return 2748;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2725;
+ return 2739;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2726;
+ return 2740;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2717;
+ return 2731;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2718;
+ return 2732;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2643;
+ return 2657;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2826;
+ return 2842;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2644;
+ return 2658;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2645;
+ return 2659;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2827;
+ return 2843;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2828;
+ return 2844;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2790;
+ return 2806;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2752;
+ return 2766;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2791;
+ return 2807;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2792;
+ return 2808;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2753;
+ return 2767;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2754;
+ return 2768;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2659;
+ return 2673;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2660;
+ return 2674;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2661;
+ return 2675;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2806;
+ return 2822;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2807;
+ return 2823;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2808;
+ return 2824;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2525;
+ return 2537;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2549;
+ return 2561;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2541;
+ return 2553;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2533;
+ return 2545;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2557;
+ return 2569;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2581;
+ return 2593;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2573;
+ return 2585;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2565;
+ return 2577;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2526;
+ return 2538;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2583;
+ return 2595;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2550;
+ return 2562;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2542;
+ return 2554;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2534;
+ return 2546;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2558;
+ return 2570;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2582;
+ return 2594;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2574;
+ return 2586;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2566;
+ return 2578;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2848;
+ return 2864;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2849;
+ return 2865;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2850;
+ return 2866;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2494;
+ return 2498;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2495;
+ return 2499;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2496;
+ return 2500;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2857;
+ return 2873;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2858;
+ return 2874;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2859;
+ return 2875;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2851;
+ return 2867;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2852;
+ return 2868;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2853;
+ return 2869;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2508;
+ return 2512;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2509;
+ return 2513;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2510;
+ return 2514;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2814;
+ return 2830;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2860;
+ return 2876;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2861;
+ return 2877;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2862;
+ return 2878;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2815;
+ return 2831;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2521;
+ return 2533;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2545;
+ return 2557;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2537;
+ return 2549;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2529;
+ return 2541;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2488;
+ return 2492;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2613;
+ return 2627;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2758;
+ return 2772;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2619;
+ return 2633;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2502;
+ return 2506;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2762;
+ return 2778;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2835;
+ return 2851;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2768;
+ return 2784;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2522;
+ return 2534;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2546;
+ return 2558;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2538;
+ return 2550;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2530;
+ return 2542;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2489;
+ return 2493;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2614;
+ return 2628;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2759;
+ return 2773;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2620;
+ return 2634;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2503;
+ return 2507;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2763;
+ return 2779;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2836;
+ return 2852;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2769;
+ return 2785;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2553;
+ return 2565;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2577;
+ return 2589;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2569;
+ return 2581;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2561;
+ return 2573;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2518;
+ return 2530;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2466;
+ return 2470;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2820;
+ return 2836;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2748;
+ return 2762;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2554;
+ return 2566;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2578;
+ return 2590;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2570;
+ return 2582;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2562;
+ return 2574;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2467;
+ return 2471;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2834;
+ return 2850;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2821;
+ return 2837;
}
}
}
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2757;
+ return 2771;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2749;
+ return 2763;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2864;
+ return 2880;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2865;
+ return 2881;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2635;
+ return 2649;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2636;
+ return 2650;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2637;
+ return 2651;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2846;
+ return 2862;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2847;
+ return 2863;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2854;
+ return 2870;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2651;
+ return 2665;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2652;
+ return 2666;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2653;
+ return 2667;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2866;
+ return 2882;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2867;
+ return 2883;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2782;
+ return 2798;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2783;
+ return 2799;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2784;
+ return 2800;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2855;
+ return 2871;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2856;
+ return 2872;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2863;
+ return 2879;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2798;
+ return 2814;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2799;
+ return 2815;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2800;
+ return 2816;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2647;
+ return 2661;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2648;
+ return 2662;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2649;
+ return 2663;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2650;
+ return 2664;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2830;
+ return 2846;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2831;
+ return 2847;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2832;
+ return 2848;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2833;
+ return 2849;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2468;
+ return 2472;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2469;
+ return 2473;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2470;
+ return 2474;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2471;
+ return 2475;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2498;
+ return 2502;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2499;
+ return 2503;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2500;
+ return 2504;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2501;
+ return 2505;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2639;
+ return 2653;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2640;
+ return 2654;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2641;
+ return 2655;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2642;
+ return 2656;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2490;
+ return 2494;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2491;
+ return 2495;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2492;
+ return 2496;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2493;
+ return 2497;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2646;
+ return 2660;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2829;
+ return 2845;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2621;
+ return 2635;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2622;
+ return 2636;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2623;
+ return 2637;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2624;
+ return 2638;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2497;
+ return 2501;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2638;
+ return 2652;
}
}
else
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2794;
+ return 2810;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2795;
+ return 2811;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2796;
+ return 2812;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2797;
+ return 2813;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2755;
+ return 2769;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2756;
+ return 2770;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2786;
+ return 2802;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2787;
+ return 2803;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2788;
+ return 2804;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2789;
+ return 2805;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2793;
+ return 2809;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2770;
+ return 2786;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2771;
+ return 2787;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2772;
+ return 2788;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2773;
+ return 2789;
}
}
}
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2785;
+ return 2801;
}
}
else
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2663;
+ return 2677;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2664;
+ return 2678;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2665;
+ return 2679;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2666;
+ return 2680;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2512;
+ return 2516;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2513;
+ return 2517;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2514;
+ return 2518;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2515;
+ return 2519;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2655;
+ return 2669;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2656;
+ return 2670;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2657;
+ return 2671;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2658;
+ return 2672;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2504;
+ return 2508;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2505;
+ return 2509;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2506;
+ return 2510;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2507;
+ return 2511;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2662;
+ return 2676;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2822;
+ return 2838;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2823;
+ return 2839;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2824;
+ return 2840;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2825;
+ return 2841;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2615;
+ return 2629;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2616;
+ return 2630;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2617;
+ return 2631;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2618;
+ return 2632;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2511;
+ return 2515;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2654;
+ return 2668;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2516;
+ return 2528;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2517;
+ return 2529;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2810;
+ return 2826;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2811;
+ return 2827;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2812;
+ return 2828;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2813;
+ return 2829;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2802;
+ return 2818;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2803;
+ return 2819;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2804;
+ return 2820;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2805;
+ return 2821;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2744;
+ return 2758;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2745;
+ return 2759;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2746;
+ return 2760;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2747;
+ return 2761;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2809;
+ return 2825;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2750;
+ return 2764;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2751;
+ return 2765;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2764;
+ return 2780;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2765;
+ return 2781;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2766;
+ return 2782;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2767;
+ return 2783;
}
}
}
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2801;
+ return 2817;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2742;
+ return 2756;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2743;
+ return 2757;
}
}
}
@@ -4147,7 +4147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0100xxxxxxxxxxxx0
sel. */
- return 2625;
+ return 2639;
}
else
{
@@ -4155,7 +4155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1100xxxxxxxxxxxx0
sel. */
- return 2626;
+ return 2640;
}
}
else
@@ -4187,7 +4187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x01xxxxxxxxx0
sclamp. */
- return 2611;
+ return 2623;
}
else
{
@@ -4195,7 +4195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x11xxxxxxxxx0
sclamp. */
- return 2612;
+ return 2624;
}
}
}
@@ -4204,219 +4204,417 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 5) & 0x1) == 0)
{
- if (((word >> 8) & 0x1) == 0)
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 10) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1000x0xx0xxxx0
- smax. */
- return 2627;
+ if (((word >> 8) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx101000x0xx0xxxx0
+ smax. */
+ return 2641;
+ }
+ else
+ {
+ if (((word >> 9) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100001xx0xxxx0
+ fmax. */
+ return 2476;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100011xx0xxxx0
+ add. */
+ return 2434;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1100x0xx0xxxx0
- smax. */
- return 2629;
+ if (((word >> 16) & 0x1) == 0)
+ {
+ if (((word >> 17) & 0x1) == 0)
+ {
+ if (((word >> 18) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10x000111000xxxx0xxxx0
+ frintn. */
+ return 2524;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11x000111000xxxx0xxxx0
+ frintn. */
+ return 2525;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10x100111000xxxx0xxxx0
+ frinta. */
+ return 2520;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11x100111000xxxx0xxxx0
+ frinta. */
+ return 2521;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 19) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx100x10111000xxxx0xxxx0
+ scvtf. */
+ return 2625;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx110x10111000xxxx0xxxx0
+ scvtf. */
+ return 2626;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx101x10111000xxxx0xxxx0
+ frintm. */
+ return 2522;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx111x10111000xxxx0xxxx0
+ frintm. */
+ return 2523;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 19) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx100xx1111000xxxx0xxxx0
+ fcvtzs. */
+ return 2466;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx110xx1111000xxxx0xxxx0
+ fcvtzs. */
+ return 2467;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx101xx1111000xxxx0xxxx0
+ frintp. */
+ return 2526;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx111xx1111000xxxx0xxxx0
+ frintp. */
+ return 2527;
+ }
+ }
+ }
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1010x0xx0xxxx0
+ x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2628;
+ return 2643;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1110x0xx0xxxx0
- smax. */
- return 2630;
+ x1000001xx1xxxxx1x1100x1xx0xxxx0
+ fmax. */
+ return 2478;
}
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1001x0xx0xxxx0
- sqdmulh. */
- return 2669;
+ x1000001xx1xxxxx1x1010x0xx0xxxx0
+ smax. */
+ return 2642;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1101x0xx0xxxx0
- sqdmulh. */
- return 2671;
+ x1000001xx1xxxxx1x1110x0xx0xxxx0
+ smax. */
+ return 2644;
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1011x0xx0xxxx0
- sqdmulh. */
- return 2670;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x101001xx0xxxx0
+ fmax. */
+ return 2477;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x111001xx0xxxx0
+ fmax. */
+ return 2479;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1111x0xx0xxxx0
- sqdmulh. */
- return 2672;
+ x1000001xx1xxxxx1x1x1011xx0xxxx0
+ add. */
+ return 2435;
}
}
}
}
else
{
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x100x01xx0xxxx0
- fmax. */
- return 2472;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x110x01xx0xxxx0
- fmax. */
- return 2474;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1001xxxx0xxxx0
+ sqdmulh. */
+ return 2683;
}
else
{
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x101x01xx0xxxx0
- fmax. */
- return 2473;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x111x01xx0xxxx0
- fmax. */
- return 2475;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1101xxxx0xxxx0
+ sqdmulh. */
+ return 2685;
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1x0x11xx0xxxx0
- add. */
- return 2434;
+ x1000001xx1xxxxx1x1011xxxx0xxxx0
+ sqdmulh. */
+ return 2684;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1x1x11xx0xxxx0
- add. */
- return 2435;
+ x1000001xx1xxxxx1x1111xxxx0xxxx0
+ sqdmulh. */
+ return 2686;
}
}
}
}
else
{
- if (((word >> 8) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x100x00xx1xxxx0
- smin. */
- return 2631;
+ if (((word >> 9) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100x00xx1xxxx0
+ smin. */
+ return 2645;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100x10xx1xxxx0
+ srshl. */
+ return 2687;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x110x00xx1xxxx0
- smin. */
- return 2633;
+ x1000001xx1xxxxx10100xx1xx1xxxx0
+ fmaxnm. */
+ return 2480;
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 16) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xxx011100xxxxx1xxxx0
+ ucvtf. */
+ return 2776;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xxx011100xxxxx1xxxx0
+ ucvtf. */
+ return 2777;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xxx111100xxxxx1xxxx0
+ fcvtzu. */
+ return 2468;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xxx111100xxxxx1xxxx0
+ fcvtzu. */
+ return 2469;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 8) & 0x1) == 0)
+ {
+ if (((word >> 9) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x101x00xx1xxxx0
+ x1000001xx1xxxxx1x110x00xx1xxxx0
smin. */
- return 2632;
+ return 2647;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x111x00xx1xxxx0
- smin. */
- return 2634;
+ x1000001xx1xxxxx1x110x10xx1xxxx0
+ srshl. */
+ return 2689;
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110xx1xx1xxxx0
+ fmaxnm. */
+ return 2482;
+ }
}
- else
+ }
+ else
+ {
+ if (((word >> 8) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x100x10xx1xxxx0
- srshl. */
- return 2673;
+ x1000001xx1xxxxx1x101x00xx1xxxx0
+ smin. */
+ return 2646;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x110x10xx1xxxx0
- srshl. */
- return 2675;
+ x1000001xx1xxxxx1x111x00xx1xxxx0
+ smin. */
+ return 2648;
}
}
else
@@ -4427,7 +4625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x10xx1xxxx0
srshl. */
- return 2674;
+ return 2688;
}
else
{
@@ -4435,32 +4633,10 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x10xx1xxxx0
srshl. */
- return 2676;
+ return 2690;
}
}
}
- }
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x100xx1xx1xxxx0
- fmaxnm. */
- return 2476;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x110xx1xx1xxxx0
- fmaxnm. */
- return 2478;
- }
- }
else
{
if (((word >> 12) & 0x1) == 0)
@@ -4469,7 +4645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101xx1xx1xxxx0
fmaxnm. */
- return 2477;
+ return 2481;
}
else
{
@@ -4477,7 +4653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111xx1xx1xxxx0
fmaxnm. */
- return 2479;
+ return 2483;
}
}
}
@@ -4500,7 +4676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx000x0xx0xxxx1
umax. */
- return 2774;
+ return 2790;
}
else
{
@@ -4508,7 +4684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx100x0xx0xxxx1
umax. */
- return 2776;
+ return 2792;
}
}
else
@@ -4519,7 +4695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx010x0xx0xxxx1
umax. */
- return 2775;
+ return 2791;
}
else
{
@@ -4527,7 +4703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx110x0xx0xxxx1
umax. */
- return 2777;
+ return 2793;
}
}
}
@@ -4541,7 +4717,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx000x1xx0xxxx1
fmin. */
- return 2480;
+ return 2484;
}
else
{
@@ -4549,7 +4725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx100x1xx0xxxx1
fmin. */
- return 2482;
+ return 2486;
}
}
else
@@ -4560,7 +4736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx010x1xx0xxxx1
fmin. */
- return 2481;
+ return 2485;
}
else
{
@@ -4568,7 +4744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx110x1xx0xxxx1
fmin. */
- return 2483;
+ return 2487;
}
}
}
@@ -4587,7 +4763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00000xx1xxxx1
umin. */
- return 2778;
+ return 2794;
}
else
{
@@ -4595,7 +4771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10000xx1xxxx1
umin. */
- return 2780;
+ return 2796;
}
}
else
@@ -4606,7 +4782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01000xx1xxxx1
umin. */
- return 2779;
+ return 2795;
}
else
{
@@ -4614,7 +4790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11000xx1xxxx1
umin. */
- return 2781;
+ return 2797;
}
}
}
@@ -4628,7 +4804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx00010xx1xxxx1
urshl. */
- return 2816;
+ return 2832;
}
else
{
@@ -4636,7 +4812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx10010xx1xxxx1
urshl. */
- return 2818;
+ return 2834;
}
}
else
@@ -4647,7 +4823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx01010xx1xxxx1
urshl. */
- return 2817;
+ return 2833;
}
else
{
@@ -4655,7 +4831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx11010xx1xxxx1
urshl. */
- return 2819;
+ return 2835;
}
}
}
@@ -4670,7 +4846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx000x1xx1xxxx1
fminnm. */
- return 2484;
+ return 2488;
}
else
{
@@ -4678,7 +4854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx100x1xx1xxxx1
fminnm. */
- return 2486;
+ return 2490;
}
}
else
@@ -4689,7 +4865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx010x1xx1xxxx1
fminnm. */
- return 2485;
+ return 2489;
}
else
{
@@ -4697,7 +4873,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xx110x1xx1xxxx1
fminnm. */
- return 2487;
+ return 2491;
}
}
}
@@ -4711,7 +4887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xxx01xxxxxxxxx1
uclamp. */
- return 2760;
+ return 2774;
}
else
{
@@ -4719,7 +4895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1xxx11xxxxxxxxx1
uclamp. */
- return 2761;
+ return 2775;
}
}
}
@@ -4746,7 +4922,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2683;
+ return 2697;
}
else
{
@@ -4754,7 +4930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2707;
+ return 2721;
}
}
else
@@ -4765,7 +4941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2699;
+ return 2713;
}
else
{
@@ -4773,7 +4949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2691;
+ return 2705;
}
}
}
@@ -4787,7 +4963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2715;
+ return 2729;
}
else
{
@@ -4795,7 +4971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2739;
+ return 2753;
}
}
else
@@ -4806,7 +4982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2731;
+ return 2745;
}
else
{
@@ -4814,7 +4990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2723;
+ return 2737;
}
}
}
@@ -4842,7 +5018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2684;
+ return 2698;
}
else
{
@@ -4850,7 +5026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2741;
+ return 2755;
}
}
else
@@ -4859,7 +5035,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2708;
+ return 2722;
}
}
else
@@ -4870,7 +5046,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2700;
+ return 2714;
}
else
{
@@ -4878,7 +5054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2692;
+ return 2706;
}
}
}
@@ -4892,7 +5068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2716;
+ return 2730;
}
else
{
@@ -4900,7 +5076,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2740;
+ return 2754;
}
}
else
@@ -4911,7 +5087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2732;
+ return 2746;
}
else
{
@@ -4919,7 +5095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2724;
+ return 2738;
}
}
}
@@ -4961,7 +5137,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2679;
+ return 2693;
}
else
{
@@ -4969,7 +5145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2680;
+ return 2694;
}
}
else
@@ -4980,7 +5156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2703;
+ return 2717;
}
else
{
@@ -4988,7 +5164,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2704;
+ return 2718;
}
}
}
@@ -5002,7 +5178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2695;
+ return 2709;
}
else
{
@@ -5010,7 +5186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2696;
+ return 2710;
}
}
else
@@ -5021,7 +5197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2687;
+ return 2701;
}
else
{
@@ -5029,7 +5205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2688;
+ return 2702;
}
}
}
@@ -5046,7 +5222,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2711;
+ return 2725;
}
else
{
@@ -5054,7 +5230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2712;
+ return 2726;
}
}
else
@@ -5065,7 +5241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2735;
+ return 2749;
}
else
{
@@ -5073,7 +5249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2736;
+ return 2750;
}
}
}
@@ -5087,7 +5263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2727;
+ return 2741;
}
else
{
@@ -5095,7 +5271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2728;
+ return 2742;
}
}
else
@@ -5106,7 +5282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2719;
+ return 2733;
}
else
{
@@ -5114,7 +5290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2720;
+ return 2734;
}
}
}
@@ -7516,7 +7692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2908;
+ return 2924;
}
else
{
@@ -7524,7 +7700,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2916;
+ return 2932;
}
}
else
@@ -7535,7 +7711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2912;
+ return 2928;
}
else
{
@@ -7543,7 +7719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2919;
+ return 2935;
}
}
}
@@ -7581,7 +7757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2968;
+ return 2984;
}
else
{
@@ -7589,7 +7765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2974;
+ return 2990;
}
}
else
@@ -7600,7 +7776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2971;
+ return 2987;
}
else
{
@@ -7608,7 +7784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2977;
+ return 2993;
}
}
}
@@ -7622,7 +7798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 2992;
+ return 3008;
}
else
{
@@ -7630,7 +7806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 2998;
+ return 3014;
}
}
else
@@ -7641,7 +7817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 2995;
+ return 3011;
}
else
{
@@ -7649,7 +7825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3001;
+ return 3017;
}
}
}
@@ -7666,7 +7842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2980;
+ return 2996;
}
else
{
@@ -7674,7 +7850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 2986;
+ return 3002;
}
}
else
@@ -7685,7 +7861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2983;
+ return 2999;
}
else
{
@@ -7693,7 +7869,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 2989;
+ return 3005;
}
}
}
@@ -7707,7 +7883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3004;
+ return 3020;
}
else
{
@@ -7715,7 +7891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3010;
+ return 3026;
}
}
else
@@ -7726,7 +7902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3007;
+ return 3023;
}
else
{
@@ -7734,7 +7910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3013;
+ return 3029;
}
}
}
@@ -7799,7 +7975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2909;
+ return 2925;
}
else
{
@@ -7807,7 +7983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2917;
+ return 2933;
}
}
else
@@ -7818,7 +7994,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2913;
+ return 2929;
}
else
{
@@ -7826,7 +8002,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2920;
+ return 2936;
}
}
}
@@ -7864,7 +8040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2969;
+ return 2985;
}
else
{
@@ -7872,7 +8048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2975;
+ return 2991;
}
}
else
@@ -7883,7 +8059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2972;
+ return 2988;
}
else
{
@@ -7891,7 +8067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2978;
+ return 2994;
}
}
}
@@ -7905,7 +8081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 2993;
+ return 3009;
}
else
{
@@ -7913,7 +8089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 2999;
+ return 3015;
}
}
else
@@ -7924,7 +8100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 2996;
+ return 3012;
}
else
{
@@ -7932,7 +8108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3002;
+ return 3018;
}
}
}
@@ -7949,7 +8125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2981;
+ return 2997;
}
else
{
@@ -7957,7 +8133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 2987;
+ return 3003;
}
}
else
@@ -7968,7 +8144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 2984;
+ return 3000;
}
else
{
@@ -7976,7 +8152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 2990;
+ return 3006;
}
}
}
@@ -7990,7 +8166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3005;
+ return 3021;
}
else
{
@@ -7998,7 +8174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3011;
+ return 3027;
}
}
else
@@ -8009,7 +8185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3008;
+ return 3024;
}
else
{
@@ -8017,7 +8193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3014;
+ return 3030;
}
}
}
@@ -8085,7 +8261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2911;
+ return 2927;
}
else
{
@@ -8093,7 +8269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2918;
+ return 2934;
}
}
else
@@ -8102,7 +8278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2915;
+ return 2931;
}
}
else
@@ -8113,7 +8289,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2910;
+ return 2926;
}
else
{
@@ -8121,7 +8297,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2914;
+ return 2930;
}
}
}
@@ -8183,7 +8359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2970;
+ return 2986;
}
else
{
@@ -8191,7 +8367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3064;
+ return 3080;
}
}
else
@@ -8202,7 +8378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2976;
+ return 2992;
}
else
{
@@ -8210,7 +8386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3066;
+ return 3082;
}
}
}
@@ -8224,7 +8400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2973;
+ return 2989;
}
else
{
@@ -8232,7 +8408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3065;
+ return 3081;
}
}
else
@@ -8241,7 +8417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2979;
+ return 2995;
}
}
}
@@ -8257,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 2994;
+ return 3010;
}
else
{
@@ -8265,7 +8441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3070;
+ return 3086;
}
}
else
@@ -8276,7 +8452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3000;
+ return 3016;
}
else
{
@@ -8284,7 +8460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3072;
+ return 3088;
}
}
}
@@ -8298,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 2997;
+ return 3013;
}
else
{
@@ -8306,7 +8482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3071;
+ return 3087;
}
}
else
@@ -8315,7 +8491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3003;
+ return 3019;
}
}
}
@@ -8334,7 +8510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2982;
+ return 2998;
}
else
{
@@ -8342,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3067;
+ return 3083;
}
}
else
@@ -8353,7 +8529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 2988;
+ return 3004;
}
else
{
@@ -8361,7 +8537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3069;
+ return 3085;
}
}
}
@@ -8375,7 +8551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 2985;
+ return 3001;
}
else
{
@@ -8383,7 +8559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3068;
+ return 3084;
}
}
else
@@ -8392,7 +8568,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 2991;
+ return 3007;
}
}
}
@@ -8408,7 +8584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3006;
+ return 3022;
}
else
{
@@ -8416,7 +8592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3073;
+ return 3089;
}
}
else
@@ -8427,7 +8603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3012;
+ return 3028;
}
else
{
@@ -8435,7 +8611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3075;
+ return 3091;
}
}
}
@@ -8449,7 +8625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3009;
+ return 3025;
}
else
{
@@ -8457,7 +8633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3074;
+ return 3090;
}
}
else
@@ -8466,7 +8642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3015;
+ return 3031;
}
}
}
@@ -8839,7 +9015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3093;
+ return 3109;
}
else
{
@@ -8857,7 +9033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3096;
+ return 3112;
}
}
}
@@ -8937,7 +9113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2906;
+ return 2922;
}
else
{
@@ -8945,7 +9121,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2907;
+ return 2923;
}
}
else
@@ -9052,7 +9228,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3098;
+ return 3114;
}
}
}
@@ -9068,7 +9244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3095;
+ return 3111;
}
else
{
@@ -9113,7 +9289,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2905;
+ return 2921;
}
else
{
@@ -9207,7 +9383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3097;
+ return 3113;
}
}
}
@@ -9337,7 +9513,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3099;
+ return 3115;
}
}
}
@@ -9353,7 +9529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3094;
+ return 3110;
}
else
{
@@ -10195,7 +10371,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2925;
+ return 2941;
}
}
}
@@ -10269,7 +10445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2926;
+ return 2942;
}
}
}
@@ -12943,7 +13119,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2924;
+ return 2940;
}
}
}
@@ -14647,7 +14823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2953;
+ return 2969;
}
}
else
@@ -14890,7 +15066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2929;
+ return 2945;
}
else
{
@@ -14898,7 +15074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2930;
+ return 2946;
}
}
else
@@ -15130,7 +15306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2950;
+ return 2966;
}
else
{
@@ -15151,7 +15327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2957;
+ return 2973;
}
else
{
@@ -15159,7 +15335,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2956;
+ return 2972;
}
}
else
@@ -15214,7 +15390,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2949;
+ return 2965;
}
else
{
@@ -15226,7 +15402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2955;
+ return 2971;
}
else
{
@@ -15234,7 +15410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2954;
+ return 2970;
}
}
else
@@ -15285,7 +15461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2933;
+ return 2949;
}
else
{
@@ -15293,7 +15469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2934;
+ return 2950;
}
}
else
@@ -15652,7 +15828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2927;
+ return 2943;
}
else
{
@@ -15685,7 +15861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2951;
+ return 2967;
}
else
{
@@ -15715,7 +15891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2928;
+ return 2944;
}
else
{
@@ -15844,7 +16020,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2937;
+ return 2953;
}
else
{
@@ -15854,7 +16030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2939;
+ return 2955;
}
else
{
@@ -15862,7 +16038,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2941;
+ return 2957;
}
}
}
@@ -15874,7 +16050,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2938;
+ return 2954;
}
else
{
@@ -15884,7 +16060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2940;
+ return 2956;
}
else
{
@@ -15892,7 +16068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2942;
+ return 2958;
}
}
}
@@ -16951,7 +17127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2921;
+ return 2937;
}
else
{
@@ -16959,7 +17135,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2923;
+ return 2939;
}
}
else
@@ -16968,7 +17144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2922;
+ return 2938;
}
}
}
@@ -18464,7 +18640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2931;
+ return 2947;
}
else
{
@@ -18472,7 +18648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2932;
+ return 2948;
}
}
}
@@ -18846,7 +19022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2935;
+ return 2951;
}
else
{
@@ -18854,7 +19030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2936;
+ return 2952;
}
}
}
@@ -19215,7 +19391,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2837;
+ return 2853;
}
else
{
@@ -19223,7 +19399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2838;
+ return 2854;
}
}
else
@@ -19253,7 +19429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2608;
+ return 2620;
}
}
}
@@ -19267,7 +19443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2840;
+ return 2856;
}
else
{
@@ -19275,7 +19451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2839;
+ return 2855;
}
}
else
@@ -19305,7 +19481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2610;
+ return 2622;
}
}
}
@@ -19322,7 +19498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2844;
+ return 2860;
}
else
{
@@ -19330,7 +19506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2841;
+ return 2857;
}
}
else
@@ -19360,7 +19536,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2609;
+ return 2621;
}
}
}
@@ -19374,7 +19550,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2842;
+ return 2858;
}
else
{
@@ -19382,7 +19558,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2843;
+ return 2859;
}
}
else
@@ -20508,7 +20684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2952;
+ return 2968;
}
}
else
@@ -21869,7 +22045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3088;
+ return 3104;
}
else
{
@@ -22449,7 +22625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3016;
+ return 3032;
}
else
{
@@ -22457,7 +22633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3018;
+ return 3034;
}
}
else
@@ -22468,7 +22644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3022;
+ return 3038;
}
else
{
@@ -22476,7 +22652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3024;
+ return 3040;
}
}
}
@@ -22490,7 +22666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3019;
+ return 3035;
}
else
{
@@ -22498,7 +22674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3021;
+ return 3037;
}
}
else
@@ -22509,7 +22685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3025;
+ return 3041;
}
else
{
@@ -22517,7 +22693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3027;
+ return 3043;
}
}
}
@@ -22534,7 +22710,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3040;
+ return 3056;
}
else
{
@@ -22542,7 +22718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3042;
+ return 3058;
}
}
else
@@ -22553,7 +22729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3046;
+ return 3062;
}
else
{
@@ -22561,7 +22737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3048;
+ return 3064;
}
}
}
@@ -22575,7 +22751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3043;
+ return 3059;
}
else
{
@@ -22583,7 +22759,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3045;
+ return 3061;
}
}
else
@@ -22594,7 +22770,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3049;
+ return 3065;
}
else
{
@@ -22602,7 +22778,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3051;
+ return 3067;
}
}
}
@@ -22622,7 +22798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3028;
+ return 3044;
}
else
{
@@ -22630,7 +22806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3030;
+ return 3046;
}
}
else
@@ -22641,7 +22817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3034;
+ return 3050;
}
else
{
@@ -22649,7 +22825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3036;
+ return 3052;
}
}
}
@@ -22663,7 +22839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3031;
+ return 3047;
}
else
{
@@ -22671,7 +22847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3033;
+ return 3049;
}
}
else
@@ -22682,7 +22858,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3037;
+ return 3053;
}
else
{
@@ -22690,7 +22866,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3039;
+ return 3055;
}
}
}
@@ -22707,7 +22883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3052;
+ return 3068;
}
else
{
@@ -22715,7 +22891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3054;
+ return 3070;
}
}
else
@@ -22726,7 +22902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3058;
+ return 3074;
}
else
{
@@ -22734,7 +22910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3060;
+ return 3076;
}
}
}
@@ -22748,7 +22924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3055;
+ return 3071;
}
else
{
@@ -22756,7 +22932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3057;
+ return 3073;
}
}
else
@@ -22767,7 +22943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3061;
+ return 3077;
}
else
{
@@ -22775,7 +22951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3063;
+ return 3079;
}
}
}
@@ -22809,7 +22985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3017;
+ return 3033;
}
else
{
@@ -22817,7 +22993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3076;
+ return 3092;
}
}
else
@@ -22828,7 +23004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3023;
+ return 3039;
}
else
{
@@ -22836,7 +23012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3078;
+ return 3094;
}
}
}
@@ -22850,7 +23026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3020;
+ return 3036;
}
else
{
@@ -22858,7 +23034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3077;
+ return 3093;
}
}
else
@@ -22867,7 +23043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3026;
+ return 3042;
}
}
}
@@ -22883,7 +23059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3041;
+ return 3057;
}
else
{
@@ -22891,7 +23067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3082;
+ return 3098;
}
}
else
@@ -22902,7 +23078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3047;
+ return 3063;
}
else
{
@@ -22910,7 +23086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3084;
+ return 3100;
}
}
}
@@ -22924,7 +23100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3044;
+ return 3060;
}
else
{
@@ -22932,7 +23108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3083;
+ return 3099;
}
}
else
@@ -22941,7 +23117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3050;
+ return 3066;
}
}
}
@@ -22960,7 +23136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3029;
+ return 3045;
}
else
{
@@ -22968,7 +23144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3079;
+ return 3095;
}
}
else
@@ -22979,7 +23155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3035;
+ return 3051;
}
else
{
@@ -22987,7 +23163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3081;
+ return 3097;
}
}
}
@@ -23001,7 +23177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3032;
+ return 3048;
}
else
{
@@ -23009,7 +23185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3080;
+ return 3096;
}
}
else
@@ -23018,7 +23194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3038;
+ return 3054;
}
}
}
@@ -23034,7 +23210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3053;
+ return 3069;
}
else
{
@@ -23042,7 +23218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3085;
+ return 3101;
}
}
else
@@ -23053,7 +23229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3059;
+ return 3075;
}
else
{
@@ -23061,7 +23237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3087;
+ return 3103;
}
}
}
@@ -23075,7 +23251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3056;
+ return 3072;
}
else
{
@@ -23083,7 +23259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3086;
+ return 3102;
}
}
else
@@ -23092,7 +23268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3062;
+ return 3078;
}
}
}
@@ -23259,7 +23435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2943;
+ return 2959;
}
}
}
@@ -23292,7 +23468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2869;
+ return 2885;
}
}
else
@@ -23366,7 +23542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2945;
+ return 2961;
}
}
}
@@ -23399,7 +23575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2946;
+ return 2962;
}
}
else
@@ -23446,7 +23622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2876;
+ return 2892;
}
else
{
@@ -23454,7 +23630,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2878;
+ return 2894;
}
}
else
@@ -23465,7 +23641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2880;
+ return 2896;
}
else
{
@@ -23479,7 +23655,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2881;
+ return 2897;
}
else
{
@@ -23487,7 +23663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2874;
+ return 2890;
}
}
else
@@ -23496,7 +23672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2883;
+ return 2899;
}
}
else
@@ -23509,7 +23685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2882;
+ return 2898;
}
else
{
@@ -23517,7 +23693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2887;
+ return 2903;
}
}
else
@@ -23526,7 +23702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2884;
+ return 2900;
}
}
}
@@ -23707,7 +23883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2868;
+ return 2884;
}
}
else
@@ -23738,7 +23914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2944;
+ return 2960;
}
else
{
@@ -23757,7 +23933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2960;
+ return 2976;
}
else
{
@@ -23767,7 +23943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2958;
+ return 2974;
}
else
{
@@ -23777,7 +23953,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2965;
+ return 2981;
}
else
{
@@ -23785,7 +23961,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2964;
+ return 2980;
}
}
}
@@ -24369,7 +24545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2961;
+ return 2977;
}
else
{
@@ -24377,7 +24553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2962;
+ return 2978;
}
}
}
@@ -24695,7 +24871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2879;
+ return 2895;
}
}
else
@@ -25306,7 +25482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2872;
+ return 2888;
}
}
}
@@ -25358,7 +25534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2885;
+ return 2901;
}
}
}
@@ -25601,7 +25777,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2875;
+ return 2891;
}
}
else
@@ -25677,7 +25853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2888;
+ return 2904;
}
}
else
@@ -26503,7 +26679,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2873;
+ return 2889;
}
}
else
@@ -26535,7 +26711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2886;
+ return 2902;
}
}
else
@@ -26775,7 +26951,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2877;
+ return 2893;
}
}
else
@@ -26807,7 +26983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2891;
+ return 2907;
}
else
{
@@ -26815,7 +26991,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2895;
+ return 2911;
}
}
}
@@ -26837,7 +27013,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2892;
+ return 2908;
}
else
{
@@ -26845,7 +27021,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2896;
+ return 2912;
}
}
}
@@ -26884,7 +27060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2889;
+ return 2905;
}
else
{
@@ -26892,7 +27068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2893;
+ return 2909;
}
}
else
@@ -26914,7 +27090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2890;
+ return 2906;
}
else
{
@@ -26922,7 +27098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2894;
+ return 2910;
}
}
else
@@ -28730,7 +28906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2897;
+ return 2913;
}
else
{
@@ -28738,7 +28914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2901;
+ return 2917;
}
}
else
@@ -28760,7 +28936,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2898;
+ return 2914;
}
else
{
@@ -28768,7 +28944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2902;
+ return 2918;
}
}
else
@@ -29274,7 +29450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2899;
+ return 2915;
}
else
{
@@ -29282,7 +29458,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2903;
+ return 2919;
}
}
}
@@ -29304,7 +29480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2900;
+ return 2916;
}
else
{
@@ -29312,7 +29488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2904;
+ return 2920;
}
}
}
@@ -29368,7 +29544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2871;
+ return 2887;
}
else
{
@@ -29376,7 +29552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2870;
+ return 2886;
}
}
}
@@ -29479,7 +29655,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2948;
+ return 2964;
}
else
{
@@ -29487,7 +29663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2947;
+ return 2963;
}
}
else
@@ -29498,7 +29674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2959;
+ return 2975;
}
else
{
@@ -29508,7 +29684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2967;
+ return 2983;
}
else
{
@@ -29516,7 +29692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2966;
+ return 2982;
}
}
}
@@ -30007,22 +30183,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2596: value = 2604; break; /* mov --> mova. */
- case 2604: return NULL; /* mova --> NULL. */
- case 2592: value = 2600; break; /* mov --> mova. */
- case 2600: return NULL; /* mova --> NULL. */
- case 2594: value = 2602; break; /* mov --> mova. */
- case 2602: return NULL; /* mova --> NULL. */
- case 2590: value = 2598; break; /* mov --> mova. */
- case 2598: return NULL; /* mova --> NULL. */
- case 2597: value = 2605; break; /* mov --> mova. */
- case 2605: return NULL; /* mova --> NULL. */
- case 2593: value = 2601; break; /* mov --> mova. */
- case 2601: return NULL; /* mova --> NULL. */
- case 2595: value = 2603; break; /* mov --> mova. */
- case 2603: return NULL; /* mova --> NULL. */
- case 2591: value = 2599; break; /* mov --> mova. */
- case 2599: return NULL; /* mova --> NULL. */
+ case 2608: value = 2616; break; /* mov --> mova. */
+ case 2616: return NULL; /* mova --> NULL. */
+ case 2604: value = 2612; break; /* mov --> mova. */
+ case 2612: return NULL; /* mova --> NULL. */
+ case 2606: value = 2614; break; /* mov --> mova. */
+ case 2614: return NULL; /* mova --> NULL. */
+ case 2602: value = 2610; break; /* mov --> mova. */
+ case 2610: return NULL; /* mova --> NULL. */
+ case 2609: value = 2617; break; /* mov --> mova. */
+ case 2617: return NULL; /* mova --> NULL. */
+ case 2605: value = 2613; break; /* mov --> mova. */
+ case 2613: return NULL; /* mova --> NULL. */
+ case 2607: value = 2615; break; /* mov --> mova. */
+ case 2615: return NULL; /* mova --> NULL. */
+ case 2603: value = 2611; break; /* mov --> mova. */
+ case 2611: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -30044,11 +30220,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3089; break; /* addg --> smax. */
- case 3089: value = 3090; break; /* smax --> umax. */
- case 3090: value = 3091; break; /* umax --> smin. */
- case 3091: value = 3092; break; /* smin --> umin. */
- case 3092: return NULL; /* umin --> NULL. */
+ case 19: value = 3105; break; /* addg --> smax. */
+ case 3105: value = 3106; break; /* smax --> umax. */
+ case 3106: value = 3107; break; /* umax --> smin. */
+ case 3107: value = 3108; break; /* smin --> umin. */
+ case 3108: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30206,8 +30382,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2963; break; /* fcvt --> bfcvt. */
- case 2963: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2979; break; /* fcvt --> bfcvt. */
+ case 2979: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index ce04dff613e..d57df3f5216 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1711,6 +1711,10 @@
{ \
QLF3(S_S,P_M,S_S), \
}
+#define OP_SVE_SS \
+{ \
+ QLF2(S_S,S_S), \
+}
#define OP_SVE_SU \
{ \
QLF2(S_S,NIL), \
@@ -5379,6 +5383,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fclamp", 0xc120c000, 0xff20fc01, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_HSD, 0, 0),
SME2_INSN ("fclamp", 0xc120c800, 0xff20fc03, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_HSD, 0, 0),
+ SME2_INSN ("fcvtzs", 0xc121e000, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
+ SME2_INSN ("fcvtzs", 0xc131e000, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
+ SME2_INSN ("fcvtzu", 0xc121e020, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
+ SME2_INSN ("fcvtzu", 0xc131e020, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
SME2_INSN ("fdot", 0xc1501008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("fdot", 0xc1509008, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fdot", 0xc1201000, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
@@ -5429,6 +5437,14 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("fmlsl", 0xc1300808, 0xfff09c1c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("fmlsl", 0xc1a00808, 0xffe19c3c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx2, SME_Zmx2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("fmlsl", 0xc1a10808, 0xffe39c7c, sme_misc, 0, OP3 (SME_ZA_array_off2x2, SME_Znx4, SME_Zmx4), OP_SVE_SHH, F_OD (4), 0),
+ SME2_INSN ("frinta", 0xc1ace000, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
+ SME2_INSN ("frinta", 0xc1bce000, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
+ SME2_INSN ("frintm", 0xc1aae000, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
+ SME2_INSN ("frintm", 0xc1bae000, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
+ SME2_INSN ("frintn", 0xc1a8e000, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
+ SME2_INSN ("frintn", 0xc1b8e000, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
+ SME2_INSN ("frintp", 0xc1a9e000, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
+ SME2_INSN ("frintp", 0xc1b9e000, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
SME2_INSN ("fsub", 0xc1a01c08, 0xffbf9c38, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VVV_SD, F_OD (2), 0),
SME2_INSN ("fsub", 0xc1a11c08, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fvdot", 0xc1500008, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
@@ -5526,6 +5542,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("ptrue", 0x25207810, 0xff3ffff8, sme_size_22, 0, OP1 (SME_PNd3), OP_SVE_V_BHSD, 0, 0),
SME2_INSN ("sclamp", 0xc120c400, 0xff20fc01, sme_size_22, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
SME2_INSN ("sclamp", 0xc120cc00, 0xff20fc03, sme_size_22, 0, OP3 (SME_Zdnx4, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
+ SME2_INSN ("scvtf", 0xc122e000, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
+ SME2_INSN ("scvtf", 0xc132e000, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
SME2_INSN ("sdot", 0xc1501000, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("sdot", 0xc1509000, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("sdot", 0xc1601408, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
@@ -5675,6 +5693,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("svdot", 0xc1508020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("uclamp", 0xc120c401, 0xff20fc01, sme_size_22, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
SME2_INSN ("uclamp", 0xc120cc01, 0xff20fc03, sme_size_22, 0, OP3 (SME_Zdnx4, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
+ SME2_INSN ("ucvtf", 0xc122e020, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
+ SME2_INSN ("ucvtf", 0xc132e020, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
SME2_INSN ("udot", 0xc1501010, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("udot", 0xc1509010, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("udot", 0xc1601418, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 21/31] aarch64: Add the SME2 FP<->FP conversion instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (19 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 20/31] aarch64: Add the SME2 FP<->int conversion instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 22/31] aarch64: Add the SME2 saturating " Richard Sandiford
` (11 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds the BFCVT{,N} and FCVT{,N} instructions,
which narrow a pair of .S registers to a single .H register.
---
gas/testsuite/gas/aarch64/sme2-24-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-24-invalid.l | 22 +
gas/testsuite/gas/aarch64/sme2-24-invalid.s | 13 +
gas/testsuite/gas/aarch64/sme2-24-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-24-noarch.l | 17 +
gas/testsuite/gas/aarch64/sme2-24.d | 25 +
gas/testsuite/gas/aarch64/sme2-24.s | 19 +
opcodes/aarch64-dis-2.c | 1940 ++++++++++---------
opcodes/aarch64-tbl.h | 8 +
9 files changed, 1102 insertions(+), 948 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-24-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-24-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-24-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-24-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-24-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-24.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-24.s
diff --git a/gas/testsuite/gas/aarch64/sme2-24-invalid.d b/gas/testsuite/gas/aarch64/sme2-24-invalid.d
new file mode 100644
index 00000000000..9ce97b6abc7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-24-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-24-invalid.s
+#error_output: sme2-24-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-24-invalid.l b/gas/testsuite/gas/aarch64/sme2-24-invalid.l
new file mode 100644
index 00000000000..c44a582979d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-24-invalid.l
@@ -0,0 +1,22 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfcvt 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `bfcvt z0\.h,0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfcvt z0\.h,{z1\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvtn z0\.h,{z0\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvt z0\.h,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvtn z0\.s,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfcvtn z0\.h, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvt z0\.s,{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfcvt z0\.h, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fcvt z0\.h, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fcvt z0\.h, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.d,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fcvt z0\.h, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvt z0\.h,{z1\.s-z2\.s}'
diff --git a/gas/testsuite/gas/aarch64/sme2-24-invalid.s b/gas/testsuite/gas/aarch64/sme2-24-invalid.s
new file mode 100644
index 00000000000..e22be3649e2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-24-invalid.s
@@ -0,0 +1,13 @@
+ bfcvt 0, { z0.s - z1.s }
+ bfcvt z0.h, 0
+
+ bfcvt z0.h, { z1.s - z2.s }
+ bfcvtn z0.h, { z0.s - z2.s }
+ bfcvt z0.h, { z0.s - z3.s }
+ bfcvtn z0.s, { z0.s - z3.s }
+ bfcvt z0.s, { z0.h - z3.h }
+
+ fcvt z0.s, { z0.h - z1.h }
+ fcvt z0.s, { z0.s - z1.s }
+ fcvt z0.d, { z0.s - z1.s }
+ fcvt z0.h, { z1.s - z2.s }
diff --git a/gas/testsuite/gas/aarch64/sme2-24-noarch.d b/gas/testsuite/gas/aarch64/sme2-24-noarch.d
new file mode 100644
index 00000000000..c26670dc3d5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-24-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-24.s
+#error_output: sme2-24-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-24-noarch.l b/gas/testsuite/gas/aarch64/sme2-24-noarch.l
new file mode 100644
index 00000000000..ef23b8b852d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-24-noarch.l
@@ -0,0 +1,17 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z14\.h,{z20\.s-z21\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z26\.h,{z14\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z29\.h,{z6\.s-z7\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z29\.h,{z6\.s-z7\.s}'
diff --git a/gas/testsuite/gas/aarch64/sme2-24.d b/gas/testsuite/gas/aarch64/sme2-24.d
new file mode 100644
index 00000000000..3a621c232ad
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-24.d
@@ -0,0 +1,25 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c160e000 bfcvt z0\.h, {z0\.s-z1\.s}
+[^:]+: c160e01f bfcvt z31\.h, {z0\.s-z1\.s}
+[^:]+: c160e3c0 bfcvt z0\.h, {z30\.s-z31\.s}
+[^:]+: c160e28e bfcvt z14\.h, {z20\.s-z21\.s}
+[^:]+: c160e020 bfcvtn z0\.h, {z0\.s-z1\.s}
+[^:]+: c160e03f bfcvtn z31\.h, {z0\.s-z1\.s}
+[^:]+: c160e3e0 bfcvtn z0\.h, {z30\.s-z31\.s}
+[^:]+: c160e1fa bfcvtn z26\.h, {z14\.s-z15\.s}
+[^:]+: c120e000 fcvt z0\.h, {z0\.s-z1\.s}
+[^:]+: c120e01f fcvt z31\.h, {z0\.s-z1\.s}
+[^:]+: c120e3c0 fcvt z0\.h, {z30\.s-z31\.s}
+[^:]+: c120e0dd fcvt z29\.h, {z6\.s-z7\.s}
+[^:]+: c120e020 fcvtn z0\.h, {z0\.s-z1\.s}
+[^:]+: c120e03f fcvtn z31\.h, {z0\.s-z1\.s}
+[^:]+: c120e3e0 fcvtn z0\.h, {z30\.s-z31\.s}
+[^:]+: c120e0fd fcvtn z29\.h, {z6\.s-z7\.s}
diff --git a/gas/testsuite/gas/aarch64/sme2-24.s b/gas/testsuite/gas/aarch64/sme2-24.s
new file mode 100644
index 00000000000..081d7f1576b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-24.s
@@ -0,0 +1,19 @@
+ bfcvt z0.h, { z0.s - z1.s }
+ bfcvt z31.h, { z0.s - z1.s }
+ bfcvt z0.h, { z30.s - z31.s }
+ bfcvt z14.h, { z20.s - z21.s }
+
+ bfcvtn z0.h, { z0.s - z1.s }
+ bfcvtn z31.h, { z0.s - z1.s }
+ bfcvtn z0.h, { z30.s - z31.s }
+ bfcvtn z26.h, { z14.s - z15.s }
+
+ fcvt z0.h, { z0.s - z1.s }
+ fcvt z31.h, { z0.s - z1.s }
+ fcvt z0.h, { z30.s - z31.s }
+ fcvt z29.h, { z6.s - z7.s }
+
+ fcvtn z0.h, { z0.s - z1.s }
+ fcvtn z31.h, { z0.s - z1.s }
+ fcvtn z0.h, { z30.s - z31.s }
+ fcvtn z29.h, { z6.s - z7.s }
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 90a96f0ce5f..759f6ab3611 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2459;
+ return 2461;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2460;
+ return 2462;
}
}
}
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2861;
+ return 2865;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2601;
+ return 2605;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2600;
+ return 2604;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2599;
+ return 2603;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2608;
+ return 2612;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2604;
+ return 2608;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2598;
+ return 2602;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2597;
+ return 2601;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2619;
+ return 2623;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2618;
+ return 2622;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2596;
+ return 2600;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2606;
+ return 2610;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2602;
+ return 2606;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2609;
+ return 2613;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2605;
+ return 2609;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2607;
+ return 2611;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2603;
+ return 2607;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2535;
+ return 2539;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2536;
+ return 2540;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2559;
+ return 2563;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2560;
+ return 2564;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2551;
+ return 2555;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2552;
+ return 2556;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2543;
+ return 2547;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2544;
+ return 2548;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2567;
+ return 2571;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2568;
+ return 2572;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2591;
+ return 2595;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2592;
+ return 2596;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2583;
+ return 2587;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2584;
+ return 2588;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2575;
+ return 2579;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2576;
+ return 2580;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2681;
+ return 2685;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2682;
+ return 2686;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2531;
+ return 2535;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2532;
+ return 2536;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2555;
+ return 2559;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2556;
+ return 2560;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2547;
+ return 2551;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2548;
+ return 2552;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2539;
+ return 2543;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2540;
+ return 2544;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2563;
+ return 2567;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2564;
+ return 2568;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2587;
+ return 2591;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2588;
+ return 2592;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2579;
+ return 2583;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2580;
+ return 2584;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2571;
+ return 2575;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2572;
+ return 2576;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2695;
+ return 2699;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2696;
+ return 2700;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2719;
+ return 2723;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2720;
+ return 2724;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2711;
+ return 2715;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2712;
+ return 2716;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2703;
+ return 2707;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2704;
+ return 2708;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2727;
+ return 2731;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2728;
+ return 2732;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2751;
+ return 2755;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2752;
+ return 2756;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2743;
+ return 2747;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2744;
+ return 2748;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2735;
+ return 2739;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2736;
+ return 2740;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2691;
+ return 2695;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2692;
+ return 2696;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2715;
+ return 2719;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2716;
+ return 2720;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2707;
+ return 2711;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2708;
+ return 2712;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2699;
+ return 2703;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2700;
+ return 2704;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2723;
+ return 2727;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2724;
+ return 2728;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2747;
+ return 2751;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2748;
+ return 2752;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2739;
+ return 2743;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2740;
+ return 2744;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2731;
+ return 2735;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2732;
+ return 2736;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2657;
+ return 2661;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2842;
+ return 2846;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2658;
+ return 2662;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2659;
+ return 2663;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2843;
+ return 2847;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2844;
+ return 2848;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2806;
+ return 2810;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2766;
+ return 2770;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2807;
+ return 2811;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2808;
+ return 2812;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2767;
+ return 2771;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2768;
+ return 2772;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2673;
+ return 2677;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2674;
+ return 2678;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2675;
+ return 2679;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2822;
+ return 2826;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2823;
+ return 2827;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2824;
+ return 2828;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2537;
+ return 2541;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2561;
+ return 2565;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2553;
+ return 2557;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2545;
+ return 2549;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2569;
+ return 2573;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2593;
+ return 2597;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2585;
+ return 2589;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2577;
+ return 2581;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2538;
+ return 2542;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2595;
+ return 2599;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2562;
+ return 2566;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2554;
+ return 2558;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2546;
+ return 2550;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2570;
+ return 2574;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2594;
+ return 2598;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2586;
+ return 2590;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2578;
+ return 2582;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2864;
+ return 2868;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2865;
+ return 2869;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2866;
+ return 2870;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2498;
+ return 2502;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2499;
+ return 2503;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2500;
+ return 2504;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2873;
+ return 2877;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2874;
+ return 2878;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2875;
+ return 2879;
}
}
}
@@ -1836,7 +1836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2442;
+ return 2444;
}
else
{
@@ -1846,7 +1846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2443;
+ return 2445;
}
else
{
@@ -1854,7 +1854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2444;
+ return 2446;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2867;
+ return 2871;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2868;
+ return 2872;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2869;
+ return 2873;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2512;
+ return 2516;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2513;
+ return 2517;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2514;
+ return 2518;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2830;
+ return 2834;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2876;
+ return 2880;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2877;
+ return 2881;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2878;
+ return 2882;
}
}
}
@@ -1988,7 +1988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2450;
+ return 2452;
}
else
{
@@ -1998,7 +1998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2451;
+ return 2453;
}
else
{
@@ -2006,7 +2006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2452;
+ return 2454;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2831;
+ return 2835;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2533;
+ return 2537;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2557;
+ return 2561;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2549;
+ return 2553;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2541;
+ return 2545;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2492;
+ return 2496;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2627;
+ return 2631;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2772;
+ return 2776;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2633;
+ return 2637;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2506;
+ return 2510;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2778;
+ return 2782;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2851;
+ return 2855;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2784;
+ return 2788;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2534;
+ return 2538;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2558;
+ return 2562;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2550;
+ return 2554;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2542;
+ return 2546;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2493;
+ return 2497;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2628;
+ return 2632;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2773;
+ return 2777;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2634;
+ return 2638;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2507;
+ return 2511;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2779;
+ return 2783;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2852;
+ return 2856;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2785;
+ return 2789;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2565;
+ return 2569;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2589;
+ return 2593;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2581;
+ return 2585;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2573;
+ return 2577;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2530;
+ return 2534;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2470;
+ return 2474;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2836;
+ return 2840;
}
}
else
@@ -2375,7 +2375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx011xxx
bfvdot. */
- return 2458;
+ return 2460;
}
else
{
@@ -2383,7 +2383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx011xxx
bfdot. */
- return 2436;
+ return 2438;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2762;
+ return 2766;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2566;
+ return 2570;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2590;
+ return 2594;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2582;
+ return 2586;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2574;
+ return 2578;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2471;
+ return 2475;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2850;
+ return 2854;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2837;
+ return 2841;
}
}
}
@@ -2480,7 +2480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx011xxx
bfdot. */
- return 2437;
+ return 2439;
}
else
{
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2771;
+ return 2775;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2763;
+ return 2767;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2880;
+ return 2884;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2881;
+ return 2885;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2649;
+ return 2653;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2650;
+ return 2654;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2651;
+ return 2655;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2862;
+ return 2866;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2863;
+ return 2867;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2870;
+ return 2874;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2665;
+ return 2669;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2666;
+ return 2670;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2667;
+ return 2671;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2882;
+ return 2886;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2883;
+ return 2887;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2798;
+ return 2802;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2799;
+ return 2803;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2800;
+ return 2804;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2871;
+ return 2875;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2872;
+ return 2876;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2879;
+ return 2883;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2814;
+ return 2818;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2815;
+ return 2819;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2816;
+ return 2820;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2661;
+ return 2665;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2662;
+ return 2666;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2663;
+ return 2667;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2664;
+ return 2668;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2846;
+ return 2850;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2847;
+ return 2851;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2848;
+ return 2852;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2849;
+ return 2853;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2472;
+ return 2476;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2473;
+ return 2477;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2474;
+ return 2478;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2475;
+ return 2479;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2502;
+ return 2506;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2503;
+ return 2507;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2504;
+ return 2508;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2505;
+ return 2509;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2653;
+ return 2657;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2654;
+ return 2658;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2655;
+ return 2659;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2656;
+ return 2660;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2494;
+ return 2498;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2495;
+ return 2499;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2496;
+ return 2500;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2497;
+ return 2501;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2660;
+ return 2664;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2845;
+ return 2849;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2635;
+ return 2639;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2636;
+ return 2640;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2637;
+ return 2641;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2638;
+ return 2642;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2501;
+ return 2505;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2652;
+ return 2656;
}
}
else
@@ -3166,7 +3166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2462;
+ return 2464;
}
else
{
@@ -3174,7 +3174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2463;
+ return 2465;
}
}
}
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2810;
+ return 2814;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2811;
+ return 2815;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2812;
+ return 2816;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2813;
+ return 2817;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2769;
+ return 2773;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2770;
+ return 2774;
}
}
}
@@ -3259,7 +3259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx10xxx
bfdot. */
- return 2438;
+ return 2440;
}
else
{
@@ -3267,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx10xxx
bfdot. */
- return 2439;
+ return 2441;
}
}
else
@@ -3278,7 +3278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx10xxx
bfdot. */
- return 2440;
+ return 2442;
}
else
{
@@ -3286,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx10xxx
bfdot. */
- return 2441;
+ return 2443;
}
}
}
@@ -3305,7 +3305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2446;
+ return 2448;
}
else
{
@@ -3313,7 +3313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2447;
+ return 2449;
}
}
else
@@ -3324,7 +3324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2448;
+ return 2450;
}
else
{
@@ -3332,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2449;
+ return 2451;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2802;
+ return 2806;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2803;
+ return 2807;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2804;
+ return 2808;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2805;
+ return 2809;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2809;
+ return 2813;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2786;
+ return 2790;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2787;
+ return 2791;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2788;
+ return 2792;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2789;
+ return 2793;
}
}
}
@@ -3485,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2445;
+ return 2447;
}
else
{
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2801;
+ return 2805;
}
}
else
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2677;
+ return 2681;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2678;
+ return 2682;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2679;
+ return 2683;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2680;
+ return 2684;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2516;
+ return 2520;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2517;
+ return 2521;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2518;
+ return 2522;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2519;
+ return 2523;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2669;
+ return 2673;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2670;
+ return 2674;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2671;
+ return 2675;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2672;
+ return 2676;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2508;
+ return 2512;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2509;
+ return 2513;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2510;
+ return 2514;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2511;
+ return 2515;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2676;
+ return 2680;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2838;
+ return 2842;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2839;
+ return 2843;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2840;
+ return 2844;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2841;
+ return 2845;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2629;
+ return 2633;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2630;
+ return 2634;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2631;
+ return 2635;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2632;
+ return 2636;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2515;
+ return 2519;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2668;
+ return 2672;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2528;
+ return 2532;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2529;
+ return 2533;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2826;
+ return 2830;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2827;
+ return 2831;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2828;
+ return 2832;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2829;
+ return 2833;
}
}
}
@@ -3896,7 +3896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2454;
+ return 2456;
}
else
{
@@ -3904,7 +3904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2455;
+ return 2457;
}
}
else
@@ -3915,7 +3915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2456;
+ return 2458;
}
else
{
@@ -3923,7 +3923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2457;
+ return 2459;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2818;
+ return 2822;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2819;
+ return 2823;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2820;
+ return 2824;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2821;
+ return 2825;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2758;
+ return 2762;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2759;
+ return 2763;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2760;
+ return 2764;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2761;
+ return 2765;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2825;
+ return 2829;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2764;
+ return 2768;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2765;
+ return 2769;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2780;
+ return 2784;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2781;
+ return 2785;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2782;
+ return 2786;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2783;
+ return 2787;
}
}
}
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2453;
+ return 2455;
}
else
{
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2817;
+ return 2821;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2756;
+ return 2760;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2757;
+ return 2761;
}
}
}
@@ -4135,9 +4135,9 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 0) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- if (((word >> 13) & 0x1) == 0)
+ if (((word >> 0) & 0x1) == 0)
{
if (((word >> 14) & 0x1) == 0)
{
@@ -4147,7 +4147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0100xxxxxxxxxxxx0
sel. */
- return 2639;
+ return 2643;
}
else
{
@@ -4155,7 +4155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1100xxxxxxxxxxxx0
sel. */
- return 2640;
+ return 2644;
}
}
else
@@ -4168,7 +4168,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x00xxxxxxxxx0
fclamp. */
- return 2464;
+ return 2466;
}
else
{
@@ -4176,7 +4176,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x10xxxxxxxxx0
fclamp. */
- return 2465;
+ return 2467;
}
}
else
@@ -4187,7 +4187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x01xxxxxxxxx0
sclamp. */
- return 2623;
+ return 2627;
}
else
{
@@ -4195,22 +4195,44 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x11xxxxxxxxx0
sclamp. */
- return 2624;
+ return 2628;
}
}
}
}
else
{
- if (((word >> 5) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 10) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x0x0xxxxxxxxxx1
+ uclamp. */
+ return 2778;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x0x1xxxxxxxxxx1
+ uclamp. */
+ return 2779;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 0) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4218,7 +4240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx0
smax. */
- return 2641;
+ return 2645;
}
else
{
@@ -4228,7 +4250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100001xx0xxxx0
fmax. */
- return 2476;
+ return 2480;
}
else
{
@@ -4242,27 +4264,49 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx101000x0xx0xxxx1
+ umax. */
+ return 2794;
+ }
+ else
{
- if (((word >> 17) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx101000x1xx0xxxx1
+ fmin. */
+ return 2488;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ if (((word >> 17) & 0x1) == 0)
+ {
+ if (((word >> 18) & 0x1) == 0)
{
- if (((word >> 18) & 0x1) == 0)
+ if (((word >> 19) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx10x000111000xxxx0xxxx0
- frintn. */
- return 2524;
+ x1000001x01x0000111000xxxx0xxxxx
+ fcvt. */
+ return 2468;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx11x000111000xxxx0xxxx0
- frintn. */
- return 2525;
+ x1000001x11x0000111000xxxx0xxxxx
+ bfcvt. */
+ return 2436;
}
}
else
@@ -4271,59 +4315,37 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx10x100111000xxxx0xxxx0
- frinta. */
- return 2520;
+ x1000001xx101000111000xxxx0xxxxx
+ frintn. */
+ return 2528;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx11x100111000xxxx0xxxx0
- frinta. */
- return 2521;
+ x1000001xx111000111000xxxx0xxxxx
+ frintn. */
+ return 2529;
}
}
}
else
{
- if (((word >> 19) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx100x10111000xxxx0xxxx0
- scvtf. */
- return 2625;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx110x10111000xxxx0xxxx0
- scvtf. */
- return 2626;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10x100111000xxxx0xxxxx
+ frinta. */
+ return 2524;
}
else
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx101x10111000xxxx0xxxx0
- frintm. */
- return 2522;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx111x10111000xxxx0xxxx0
- frintm. */
- return 2523;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11x100111000xxxx0xxxxx
+ frinta. */
+ return 2525;
}
}
}
@@ -4335,17 +4357,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx100xx1111000xxxx0xxxx0
- fcvtzs. */
- return 2466;
+ x1000001xx100x10111000xxxx0xxxxx
+ scvtf. */
+ return 2629;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx110xx1111000xxxx0xxxx0
- fcvtzs. */
- return 2467;
+ x1000001xx110x10111000xxxx0xxxxx
+ scvtf. */
+ return 2630;
}
}
else
@@ -4354,23 +4376,67 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx101xx1111000xxxx0xxxx0
- frintp. */
+ x1000001xx101x10111000xxxx0xxxxx
+ frintm. */
return 2526;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx111xx1111000xxxx0xxxx0
- frintp. */
+ x1000001xx111x10111000xxxx0xxxxx
+ frintm. */
return 2527;
}
}
}
}
+ else
+ {
+ if (((word >> 19) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx100xx1111000xxxx0xxxxx
+ fcvtzs. */
+ return 2470;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx110xx1111000xxxx0xxxxx
+ fcvtzs. */
+ return 2471;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx101xx1111000xxxx0xxxxx
+ frintp. */
+ return 2530;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx111xx1111000xxxx0xxxxx
+ frintp. */
+ return 2531;
+ }
+ }
+ }
}
- else
+ }
+ else
+ {
+ if (((word >> 0) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4378,7 +4444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2643;
+ return 2647;
}
else
{
@@ -4386,11 +4452,33 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx0
fmax. */
- return 2478;
+ return 2482;
+ }
+ }
+ else
+ {
+ if (((word >> 8) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1100x0xx0xxxx1
+ umax. */
+ return 2796;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1100x1xx0xxxx1
+ fmin. */
+ return 2490;
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 0) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4400,7 +4488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2642;
+ return 2646;
}
else
{
@@ -4408,7 +4496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2644;
+ return 2648;
}
}
else
@@ -4421,7 +4509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101001xx0xxxx0
fmax. */
- return 2477;
+ return 2481;
}
else
{
@@ -4429,7 +4517,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111001xx0xxxx0
fmax. */
- return 2479;
+ return 2483;
}
}
else
@@ -4442,45 +4530,45 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
}
}
- }
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1001xxxx0xxxx0
- sqdmulh. */
- return 2683;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1101xxxx0xxxx0
- sqdmulh. */
- return 2685;
- }
- }
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1011xxxx0xxxx0
- sqdmulh. */
- return 2684;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1010x0xx0xxxx1
+ umax. */
+ return 2795;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1110x0xx0xxxx1
+ umax. */
+ return 2797;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1111xxxx0xxxx0
- sqdmulh. */
- return 2686;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1010x1xx0xxxx1
+ fmin. */
+ return 2489;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1110x1xx0xxxx1
+ fmin. */
+ return 2491;
+ }
}
}
}
@@ -4491,7 +4579,51 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1001xxxx0xxxxx
+ sqdmulh. */
+ return 2687;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1101xxxx0xxxxx
+ sqdmulh. */
+ return 2689;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1011xxxx0xxxxx
+ sqdmulh. */
+ return 2688;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1111xxxx0xxxxx
+ sqdmulh. */
+ return 2690;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4501,7 +4633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100x00xx1xxxx0
smin. */
- return 2645;
+ return 2649;
}
else
{
@@ -4509,7 +4641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100x10xx1xxxx0
srshl. */
- return 2687;
+ return 2691;
}
}
else
@@ -4518,28 +4650,61 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100xx1xx1xxxx0
fmaxnm. */
- return 2480;
+ return 2484;
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx10xxx011100xxxxx1xxxx0
- ucvtf. */
- return 2776;
+ x1000001xx1xxxxx10100x00xx1xxxx1
+ umin. */
+ return 2798;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx11xxx011100xxxxx1xxxx0
- ucvtf. */
- return 2777;
+ x1000001xx1xxxxx10100x10xx1xxxx1
+ urshl. */
+ return 2836;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100xx1xx1xxxx1
+ fminnm. */
+ return 2492;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ if (((word >> 17) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x01xxx0011100xxxxx1xxxxx
+ fcvtn. */
+ return 2469;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x11xxx0011100xxxxx1xxxxx
+ bfcvtn. */
+ return 2437;
}
}
else
@@ -4548,22 +4713,44 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx10xxx111100xxxxx1xxxx0
- fcvtzu. */
- return 2468;
+ x1000001xx10xx1011100xxxxx1xxxxx
+ ucvtf. */
+ return 2780;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx11xxx111100xxxxx1xxxx0
- fcvtzu. */
- return 2469;
+ x1000001xx11xx1011100xxxxx1xxxxx
+ ucvtf. */
+ return 2781;
}
}
}
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xxx111100xxxxx1xxxxx
+ fcvtzu. */
+ return 2472;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xxx111100xxxxx1xxxxx
+ fcvtzu. */
+ return 2473;
+ }
+ }
}
- else
+ }
+ else
+ {
+ if (((word >> 0) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4573,7 +4760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x00xx1xxxx0
smin. */
- return 2647;
+ return 2651;
}
else
{
@@ -4581,7 +4768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x10xx1xxxx0
srshl. */
- return 2689;
+ return 2693;
}
}
else
@@ -4590,11 +4777,44 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110xx1xx1xxxx0
fmaxnm. */
- return 2482;
+ return 2486;
+ }
+ }
+ else
+ {
+ if (((word >> 8) & 0x1) == 0)
+ {
+ if (((word >> 9) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110x00xx1xxxx1
+ umin. */
+ return 2800;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110x10xx1xxxx1
+ urshl. */
+ return 2838;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110xx1xx1xxxx1
+ fminnm. */
+ return 2494;
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 0) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4606,7 +4826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x00xx1xxxx0
smin. */
- return 2646;
+ return 2650;
}
else
{
@@ -4614,7 +4834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x00xx1xxxx0
smin. */
- return 2648;
+ return 2652;
}
}
else
@@ -4625,7 +4845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x10xx1xxxx0
srshl. */
- return 2688;
+ return 2692;
}
else
{
@@ -4633,7 +4853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x10xx1xxxx0
srshl. */
- return 2690;
+ return 2694;
}
}
}
@@ -4645,7 +4865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101xx1xx1xxxx0
fmaxnm. */
- return 2481;
+ return 2485;
}
else
{
@@ -4653,125 +4873,31 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111xx1xx1xxxx0
fmaxnm. */
- return 2483;
- }
- }
- }
- }
- }
- }
- else
- {
- if (((word >> 10) & 0x1) == 0)
- {
- if (((word >> 5) & 0x1) == 0)
- {
- if (((word >> 8) & 0x1) == 0)
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx000x0xx0xxxx1
- umax. */
- return 2790;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx100x0xx0xxxx1
- umax. */
- return 2792;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx010x0xx0xxxx1
- umax. */
- return 2791;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx110x0xx0xxxx1
- umax. */
- return 2793;
- }
- }
- }
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx000x1xx0xxxx1
- fmin. */
- return 2484;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx100x1xx0xxxx1
- fmin. */
- return 2486;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx010x1xx0xxxx1
- fmin. */
- return 2485;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx110x1xx0xxxx1
- fmin. */
return 2487;
}
}
}
- }
- else
- {
- if (((word >> 8) & 0x1) == 0)
+ else
{
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx00000xx1xxxx1
+ x1000001xx1xxxxx1x101x00xx1xxxx1
umin. */
- return 2794;
+ return 2799;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx10000xx1xxxx1
+ x1000001xx1xxxxx1x111x00xx1xxxx1
umin. */
- return 2796;
+ return 2801;
}
}
else
@@ -4780,124 +4906,42 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx01000xx1xxxx1
- umin. */
- return 2795;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx11000xx1xxxx1
- umin. */
- return 2797;
- }
- }
- }
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx00010xx1xxxx1
- urshl. */
- return 2832;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx10010xx1xxxx1
- urshl. */
- return 2834;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx01010xx1xxxx1
+ x1000001xx1xxxxx1x101x10xx1xxxx1
urshl. */
- return 2833;
+ return 2837;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx11010xx1xxxx1
+ x1000001xx1xxxxx1x111x10xx1xxxx1
urshl. */
- return 2835;
+ return 2839;
}
}
}
- }
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx000x1xx1xxxx1
- fminnm. */
- return 2488;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xx100x1xx1xxxx1
- fminnm. */
- return 2490;
- }
- }
else
{
if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx010x1xx1xxxx1
+ x1000001xx1xxxxx1x101xx1xx1xxxx1
fminnm. */
- return 2489;
+ return 2493;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1xx110x1xx1xxxx1
+ x1000001xx1xxxxx1x111xx1xx1xxxx1
fminnm. */
- return 2491;
+ return 2495;
}
}
}
}
}
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xxx01xxxxxxxxx1
- uclamp. */
- return 2774;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1xxx11xxxxxxxxx1
- uclamp. */
- return 2775;
- }
- }
}
}
}
@@ -4922,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2697;
+ return 2701;
}
else
{
@@ -4930,7 +4974,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2721;
+ return 2725;
}
}
else
@@ -4941,7 +4985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2713;
+ return 2717;
}
else
{
@@ -4949,7 +4993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2705;
+ return 2709;
}
}
}
@@ -4963,7 +5007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2729;
+ return 2733;
}
else
{
@@ -4971,7 +5015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2753;
+ return 2757;
}
}
else
@@ -4982,7 +5026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2745;
+ return 2749;
}
else
{
@@ -4990,7 +5034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2737;
+ return 2741;
}
}
}
@@ -5018,7 +5062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2698;
+ return 2702;
}
else
{
@@ -5026,7 +5070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2755;
+ return 2759;
}
}
else
@@ -5035,7 +5079,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2722;
+ return 2726;
}
}
else
@@ -5046,7 +5090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2714;
+ return 2718;
}
else
{
@@ -5054,7 +5098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2706;
+ return 2710;
}
}
}
@@ -5068,7 +5112,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2730;
+ return 2734;
}
else
{
@@ -5076,7 +5120,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2754;
+ return 2758;
}
}
else
@@ -5087,7 +5131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2746;
+ return 2750;
}
else
{
@@ -5095,7 +5139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2738;
+ return 2742;
}
}
}
@@ -5137,7 +5181,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2693;
+ return 2697;
}
else
{
@@ -5145,7 +5189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2694;
+ return 2698;
}
}
else
@@ -5156,7 +5200,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2717;
+ return 2721;
}
else
{
@@ -5164,7 +5208,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2718;
+ return 2722;
}
}
}
@@ -5178,7 +5222,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2709;
+ return 2713;
}
else
{
@@ -5186,7 +5230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2710;
+ return 2714;
}
}
else
@@ -5197,7 +5241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2701;
+ return 2705;
}
else
{
@@ -5205,7 +5249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2702;
+ return 2706;
}
}
}
@@ -5222,7 +5266,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2725;
+ return 2729;
}
else
{
@@ -5230,7 +5274,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2726;
+ return 2730;
}
}
else
@@ -5241,7 +5285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2749;
+ return 2753;
}
else
{
@@ -5249,7 +5293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2750;
+ return 2754;
}
}
}
@@ -5263,7 +5307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2741;
+ return 2745;
}
else
{
@@ -5271,7 +5315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2742;
+ return 2746;
}
}
else
@@ -5282,7 +5326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2733;
+ return 2737;
}
else
{
@@ -5290,7 +5334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2734;
+ return 2738;
}
}
}
@@ -7692,7 +7736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2924;
+ return 2928;
}
else
{
@@ -7700,7 +7744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2932;
+ return 2936;
}
}
else
@@ -7711,7 +7755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2928;
+ return 2932;
}
else
{
@@ -7719,7 +7763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2935;
+ return 2939;
}
}
}
@@ -7757,7 +7801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2984;
+ return 2988;
}
else
{
@@ -7765,7 +7809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2990;
+ return 2994;
}
}
else
@@ -7776,7 +7820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2987;
+ return 2991;
}
else
{
@@ -7784,7 +7828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2993;
+ return 2997;
}
}
}
@@ -7798,7 +7842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3008;
+ return 3012;
}
else
{
@@ -7806,7 +7850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3014;
+ return 3018;
}
}
else
@@ -7817,7 +7861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3011;
+ return 3015;
}
else
{
@@ -7825,7 +7869,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3017;
+ return 3021;
}
}
}
@@ -7842,7 +7886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 2996;
+ return 3000;
}
else
{
@@ -7850,7 +7894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3002;
+ return 3006;
}
}
else
@@ -7861,7 +7905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 2999;
+ return 3003;
}
else
{
@@ -7869,7 +7913,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3005;
+ return 3009;
}
}
}
@@ -7883,7 +7927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3020;
+ return 3024;
}
else
{
@@ -7891,7 +7935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3026;
+ return 3030;
}
}
else
@@ -7902,7 +7946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3023;
+ return 3027;
}
else
{
@@ -7910,7 +7954,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3029;
+ return 3033;
}
}
}
@@ -7975,7 +8019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2925;
+ return 2929;
}
else
{
@@ -7983,7 +8027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2933;
+ return 2937;
}
}
else
@@ -7994,7 +8038,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2929;
+ return 2933;
}
else
{
@@ -8002,7 +8046,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2936;
+ return 2940;
}
}
}
@@ -8040,7 +8084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2985;
+ return 2989;
}
else
{
@@ -8048,7 +8092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2991;
+ return 2995;
}
}
else
@@ -8059,7 +8103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2988;
+ return 2992;
}
else
{
@@ -8067,7 +8111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2994;
+ return 2998;
}
}
}
@@ -8081,7 +8125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3009;
+ return 3013;
}
else
{
@@ -8089,7 +8133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3015;
+ return 3019;
}
}
else
@@ -8100,7 +8144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3012;
+ return 3016;
}
else
{
@@ -8108,7 +8152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3018;
+ return 3022;
}
}
}
@@ -8125,7 +8169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 2997;
+ return 3001;
}
else
{
@@ -8133,7 +8177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3003;
+ return 3007;
}
}
else
@@ -8144,7 +8188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3000;
+ return 3004;
}
else
{
@@ -8152,7 +8196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3006;
+ return 3010;
}
}
}
@@ -8166,7 +8210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3021;
+ return 3025;
}
else
{
@@ -8174,7 +8218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3027;
+ return 3031;
}
}
else
@@ -8185,7 +8229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3024;
+ return 3028;
}
else
{
@@ -8193,7 +8237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3030;
+ return 3034;
}
}
}
@@ -8261,7 +8305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2927;
+ return 2931;
}
else
{
@@ -8269,7 +8313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2934;
+ return 2938;
}
}
else
@@ -8278,7 +8322,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2931;
+ return 2935;
}
}
else
@@ -8289,7 +8333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2926;
+ return 2930;
}
else
{
@@ -8297,7 +8341,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2930;
+ return 2934;
}
}
}
@@ -8359,7 +8403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2986;
+ return 2990;
}
else
{
@@ -8367,7 +8411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3080;
+ return 3084;
}
}
else
@@ -8378,7 +8422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2992;
+ return 2996;
}
else
{
@@ -8386,7 +8430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3082;
+ return 3086;
}
}
}
@@ -8400,7 +8444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2989;
+ return 2993;
}
else
{
@@ -8408,7 +8452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3081;
+ return 3085;
}
}
else
@@ -8417,7 +8461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2995;
+ return 2999;
}
}
}
@@ -8433,7 +8477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3010;
+ return 3014;
}
else
{
@@ -8441,7 +8485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3086;
+ return 3090;
}
}
else
@@ -8452,7 +8496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3016;
+ return 3020;
}
else
{
@@ -8460,7 +8504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3088;
+ return 3092;
}
}
}
@@ -8474,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3013;
+ return 3017;
}
else
{
@@ -8482,7 +8526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3087;
+ return 3091;
}
}
else
@@ -8491,7 +8535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3019;
+ return 3023;
}
}
}
@@ -8510,7 +8554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 2998;
+ return 3002;
}
else
{
@@ -8518,7 +8562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3083;
+ return 3087;
}
}
else
@@ -8529,7 +8573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3004;
+ return 3008;
}
else
{
@@ -8537,7 +8581,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3085;
+ return 3089;
}
}
}
@@ -8551,7 +8595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3001;
+ return 3005;
}
else
{
@@ -8559,7 +8603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3084;
+ return 3088;
}
}
else
@@ -8568,7 +8612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3007;
+ return 3011;
}
}
}
@@ -8584,7 +8628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3022;
+ return 3026;
}
else
{
@@ -8592,7 +8636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3089;
+ return 3093;
}
}
else
@@ -8603,7 +8647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3028;
+ return 3032;
}
else
{
@@ -8611,7 +8655,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3091;
+ return 3095;
}
}
}
@@ -8625,7 +8669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3025;
+ return 3029;
}
else
{
@@ -8633,7 +8677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3090;
+ return 3094;
}
}
else
@@ -8642,7 +8686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3031;
+ return 3035;
}
}
}
@@ -9015,7 +9059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3109;
+ return 3113;
}
else
{
@@ -9033,7 +9077,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3112;
+ return 3116;
}
}
}
@@ -9113,7 +9157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2922;
+ return 2926;
}
else
{
@@ -9121,7 +9165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2923;
+ return 2927;
}
}
else
@@ -9228,7 +9272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3114;
+ return 3118;
}
}
}
@@ -9244,7 +9288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3111;
+ return 3115;
}
else
{
@@ -9289,7 +9333,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2921;
+ return 2925;
}
else
{
@@ -9383,7 +9427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3113;
+ return 3117;
}
}
}
@@ -9513,7 +9557,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3115;
+ return 3119;
}
}
}
@@ -9529,7 +9573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3110;
+ return 3114;
}
else
{
@@ -10371,7 +10415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2941;
+ return 2945;
}
}
}
@@ -10445,7 +10489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2942;
+ return 2946;
}
}
}
@@ -13119,7 +13163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2940;
+ return 2944;
}
}
}
@@ -14823,7 +14867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2969;
+ return 2973;
}
}
else
@@ -15066,7 +15110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2945;
+ return 2949;
}
else
{
@@ -15074,7 +15118,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2946;
+ return 2950;
}
}
else
@@ -15306,7 +15350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2966;
+ return 2970;
}
else
{
@@ -15327,7 +15371,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2973;
+ return 2977;
}
else
{
@@ -15335,7 +15379,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2972;
+ return 2976;
}
}
else
@@ -15390,7 +15434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2965;
+ return 2969;
}
else
{
@@ -15402,7 +15446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2971;
+ return 2975;
}
else
{
@@ -15410,7 +15454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2970;
+ return 2974;
}
}
else
@@ -15461,7 +15505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2949;
+ return 2953;
}
else
{
@@ -15469,7 +15513,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2950;
+ return 2954;
}
}
else
@@ -15828,7 +15872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2943;
+ return 2947;
}
else
{
@@ -15861,7 +15905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2967;
+ return 2971;
}
else
{
@@ -15891,7 +15935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2944;
+ return 2948;
}
else
{
@@ -16020,7 +16064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2953;
+ return 2957;
}
else
{
@@ -16030,7 +16074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2955;
+ return 2959;
}
else
{
@@ -16038,7 +16082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2957;
+ return 2961;
}
}
}
@@ -16050,7 +16094,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2954;
+ return 2958;
}
else
{
@@ -16060,7 +16104,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2956;
+ return 2960;
}
else
{
@@ -16068,7 +16112,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2958;
+ return 2962;
}
}
}
@@ -17127,7 +17171,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2937;
+ return 2941;
}
else
{
@@ -17135,7 +17179,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2939;
+ return 2943;
}
}
else
@@ -17144,7 +17188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2938;
+ return 2942;
}
}
}
@@ -18640,7 +18684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2947;
+ return 2951;
}
else
{
@@ -18648,7 +18692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2948;
+ return 2952;
}
}
}
@@ -19022,7 +19066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2951;
+ return 2955;
}
else
{
@@ -19030,7 +19074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2952;
+ return 2956;
}
}
}
@@ -19391,7 +19435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2853;
+ return 2857;
}
else
{
@@ -19399,7 +19443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2854;
+ return 2858;
}
}
else
@@ -19429,7 +19473,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2620;
+ return 2624;
}
}
}
@@ -19443,7 +19487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2856;
+ return 2860;
}
else
{
@@ -19451,7 +19495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2855;
+ return 2859;
}
}
else
@@ -19481,7 +19525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2622;
+ return 2626;
}
}
}
@@ -19498,7 +19542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2860;
+ return 2864;
}
else
{
@@ -19506,7 +19550,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2857;
+ return 2861;
}
}
else
@@ -19536,7 +19580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2621;
+ return 2625;
}
}
}
@@ -19550,7 +19594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2858;
+ return 2862;
}
else
{
@@ -19558,7 +19602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2859;
+ return 2863;
}
}
else
@@ -20684,7 +20728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2968;
+ return 2972;
}
}
else
@@ -21343,7 +21387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2461;
+ return 2463;
}
}
else
@@ -22045,7 +22089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3104;
+ return 3108;
}
else
{
@@ -22625,7 +22669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3032;
+ return 3036;
}
else
{
@@ -22633,7 +22677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3034;
+ return 3038;
}
}
else
@@ -22644,7 +22688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3038;
+ return 3042;
}
else
{
@@ -22652,7 +22696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3040;
+ return 3044;
}
}
}
@@ -22666,7 +22710,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3035;
+ return 3039;
}
else
{
@@ -22674,7 +22718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3037;
+ return 3041;
}
}
else
@@ -22685,7 +22729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3041;
+ return 3045;
}
else
{
@@ -22693,7 +22737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3043;
+ return 3047;
}
}
}
@@ -22710,7 +22754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3056;
+ return 3060;
}
else
{
@@ -22718,7 +22762,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3058;
+ return 3062;
}
}
else
@@ -22729,7 +22773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3062;
+ return 3066;
}
else
{
@@ -22737,7 +22781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3064;
+ return 3068;
}
}
}
@@ -22751,7 +22795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3059;
+ return 3063;
}
else
{
@@ -22759,7 +22803,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3061;
+ return 3065;
}
}
else
@@ -22770,7 +22814,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3065;
+ return 3069;
}
else
{
@@ -22778,7 +22822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3067;
+ return 3071;
}
}
}
@@ -22798,7 +22842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3044;
+ return 3048;
}
else
{
@@ -22806,7 +22850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3046;
+ return 3050;
}
}
else
@@ -22817,7 +22861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3050;
+ return 3054;
}
else
{
@@ -22825,7 +22869,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3052;
+ return 3056;
}
}
}
@@ -22839,7 +22883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3047;
+ return 3051;
}
else
{
@@ -22847,7 +22891,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3049;
+ return 3053;
}
}
else
@@ -22858,7 +22902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3053;
+ return 3057;
}
else
{
@@ -22866,7 +22910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3055;
+ return 3059;
}
}
}
@@ -22883,7 +22927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3068;
+ return 3072;
}
else
{
@@ -22891,7 +22935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3070;
+ return 3074;
}
}
else
@@ -22902,7 +22946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3074;
+ return 3078;
}
else
{
@@ -22910,7 +22954,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3076;
+ return 3080;
}
}
}
@@ -22924,7 +22968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3071;
+ return 3075;
}
else
{
@@ -22932,7 +22976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3073;
+ return 3077;
}
}
else
@@ -22943,7 +22987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3077;
+ return 3081;
}
else
{
@@ -22951,7 +22995,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3079;
+ return 3083;
}
}
}
@@ -22985,7 +23029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3033;
+ return 3037;
}
else
{
@@ -22993,7 +23037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3092;
+ return 3096;
}
}
else
@@ -23004,7 +23048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3039;
+ return 3043;
}
else
{
@@ -23012,7 +23056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3094;
+ return 3098;
}
}
}
@@ -23026,7 +23070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3036;
+ return 3040;
}
else
{
@@ -23034,7 +23078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3093;
+ return 3097;
}
}
else
@@ -23043,7 +23087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3042;
+ return 3046;
}
}
}
@@ -23059,7 +23103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3057;
+ return 3061;
}
else
{
@@ -23067,7 +23111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3098;
+ return 3102;
}
}
else
@@ -23078,7 +23122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3063;
+ return 3067;
}
else
{
@@ -23086,7 +23130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3100;
+ return 3104;
}
}
}
@@ -23100,7 +23144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3060;
+ return 3064;
}
else
{
@@ -23108,7 +23152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3099;
+ return 3103;
}
}
else
@@ -23117,7 +23161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3066;
+ return 3070;
}
}
}
@@ -23136,7 +23180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3045;
+ return 3049;
}
else
{
@@ -23144,7 +23188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3095;
+ return 3099;
}
}
else
@@ -23155,7 +23199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3051;
+ return 3055;
}
else
{
@@ -23163,7 +23207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3097;
+ return 3101;
}
}
}
@@ -23177,7 +23221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3048;
+ return 3052;
}
else
{
@@ -23185,7 +23229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3096;
+ return 3100;
}
}
else
@@ -23194,7 +23238,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3054;
+ return 3058;
}
}
}
@@ -23210,7 +23254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3069;
+ return 3073;
}
else
{
@@ -23218,7 +23262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3101;
+ return 3105;
}
}
else
@@ -23229,7 +23273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3075;
+ return 3079;
}
else
{
@@ -23237,7 +23281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3103;
+ return 3107;
}
}
}
@@ -23251,7 +23295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3072;
+ return 3076;
}
else
{
@@ -23259,7 +23303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3102;
+ return 3106;
}
}
else
@@ -23268,7 +23312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3078;
+ return 3082;
}
}
}
@@ -23435,7 +23479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2959;
+ return 2963;
}
}
}
@@ -23468,7 +23512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2885;
+ return 2889;
}
}
else
@@ -23542,7 +23586,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2961;
+ return 2965;
}
}
}
@@ -23575,7 +23619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2962;
+ return 2966;
}
}
else
@@ -23622,7 +23666,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2892;
+ return 2896;
}
else
{
@@ -23630,7 +23674,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2894;
+ return 2898;
}
}
else
@@ -23641,7 +23685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2896;
+ return 2900;
}
else
{
@@ -23655,7 +23699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2897;
+ return 2901;
}
else
{
@@ -23663,7 +23707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2890;
+ return 2894;
}
}
else
@@ -23672,7 +23716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2899;
+ return 2903;
}
}
else
@@ -23685,7 +23729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2898;
+ return 2902;
}
else
{
@@ -23693,7 +23737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2903;
+ return 2907;
}
}
else
@@ -23702,7 +23746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2900;
+ return 2904;
}
}
}
@@ -23883,7 +23927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2884;
+ return 2888;
}
}
else
@@ -23914,7 +23958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2960;
+ return 2964;
}
else
{
@@ -23933,7 +23977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2976;
+ return 2980;
}
else
{
@@ -23943,7 +23987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2974;
+ return 2978;
}
else
{
@@ -23953,7 +23997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2981;
+ return 2985;
}
else
{
@@ -23961,7 +24005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2980;
+ return 2984;
}
}
}
@@ -24545,7 +24589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2977;
+ return 2981;
}
else
{
@@ -24553,7 +24597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2978;
+ return 2982;
}
}
}
@@ -24871,7 +24915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2895;
+ return 2899;
}
}
else
@@ -25482,7 +25526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2888;
+ return 2892;
}
}
}
@@ -25534,7 +25578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2901;
+ return 2905;
}
}
}
@@ -25777,7 +25821,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2891;
+ return 2895;
}
}
else
@@ -25853,7 +25897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2904;
+ return 2908;
}
}
else
@@ -26679,7 +26723,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2889;
+ return 2893;
}
}
else
@@ -26711,7 +26755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2902;
+ return 2906;
}
}
else
@@ -26951,7 +26995,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2893;
+ return 2897;
}
}
else
@@ -26983,7 +27027,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2907;
+ return 2911;
}
else
{
@@ -26991,7 +27035,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2911;
+ return 2915;
}
}
}
@@ -27013,7 +27057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2908;
+ return 2912;
}
else
{
@@ -27021,7 +27065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2912;
+ return 2916;
}
}
}
@@ -27060,7 +27104,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2905;
+ return 2909;
}
else
{
@@ -27068,7 +27112,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2909;
+ return 2913;
}
}
else
@@ -27090,7 +27134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2906;
+ return 2910;
}
else
{
@@ -27098,7 +27142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2910;
+ return 2914;
}
}
else
@@ -28906,7 +28950,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2913;
+ return 2917;
}
else
{
@@ -28914,7 +28958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2917;
+ return 2921;
}
}
else
@@ -28936,7 +28980,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2914;
+ return 2918;
}
else
{
@@ -28944,7 +28988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2918;
+ return 2922;
}
}
else
@@ -29450,7 +29494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2915;
+ return 2919;
}
else
{
@@ -29458,7 +29502,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2919;
+ return 2923;
}
}
}
@@ -29480,7 +29524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2916;
+ return 2920;
}
else
{
@@ -29488,7 +29532,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2920;
+ return 2924;
}
}
}
@@ -29544,7 +29588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2887;
+ return 2891;
}
else
{
@@ -29552,7 +29596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2886;
+ return 2890;
}
}
}
@@ -29655,7 +29699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2964;
+ return 2968;
}
else
{
@@ -29663,7 +29707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2963;
+ return 2967;
}
}
else
@@ -29674,7 +29718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2975;
+ return 2979;
}
else
{
@@ -29684,7 +29728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2983;
+ return 2987;
}
else
{
@@ -29692,7 +29736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2982;
+ return 2986;
}
}
}
@@ -30183,22 +30227,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
+ case 2612: value = 2620; break; /* mov --> mova. */
+ case 2620: return NULL; /* mova --> NULL. */
case 2608: value = 2616; break; /* mov --> mova. */
case 2616: return NULL; /* mova --> NULL. */
- case 2604: value = 2612; break; /* mov --> mova. */
- case 2612: return NULL; /* mova --> NULL. */
+ case 2610: value = 2618; break; /* mov --> mova. */
+ case 2618: return NULL; /* mova --> NULL. */
case 2606: value = 2614; break; /* mov --> mova. */
case 2614: return NULL; /* mova --> NULL. */
- case 2602: value = 2610; break; /* mov --> mova. */
- case 2610: return NULL; /* mova --> NULL. */
+ case 2613: value = 2621; break; /* mov --> mova. */
+ case 2621: return NULL; /* mova --> NULL. */
case 2609: value = 2617; break; /* mov --> mova. */
case 2617: return NULL; /* mova --> NULL. */
- case 2605: value = 2613; break; /* mov --> mova. */
- case 2613: return NULL; /* mova --> NULL. */
+ case 2611: value = 2619; break; /* mov --> mova. */
+ case 2619: return NULL; /* mova --> NULL. */
case 2607: value = 2615; break; /* mov --> mova. */
case 2615: return NULL; /* mova --> NULL. */
- case 2603: value = 2611; break; /* mov --> mova. */
- case 2611: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -30220,11 +30264,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3105; break; /* addg --> smax. */
- case 3105: value = 3106; break; /* smax --> umax. */
- case 3106: value = 3107; break; /* umax --> smin. */
- case 3107: value = 3108; break; /* smin --> umin. */
- case 3108: return NULL; /* umin --> NULL. */
+ case 19: value = 3109; break; /* addg --> smax. */
+ case 3109: value = 3110; break; /* smax --> umax. */
+ case 3110: value = 3111; break; /* umax --> smin. */
+ case 3111: value = 3112; break; /* smin --> umin. */
+ case 3112: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30382,8 +30426,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2979; break; /* fcvt --> bfcvt. */
- case 2979: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2983; break; /* fcvt --> bfcvt. */
+ case 2983: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index d57df3f5216..eae843b593c 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1624,6 +1624,10 @@
{ \
QLF3(S_H,P_M,S_S), \
}
+#define OP_SVE_HS \
+{ \
+ QLF2(S_H,S_S), \
+}
#define OP_SVE_HU \
{ \
QLF2(S_H,NIL), \
@@ -5353,6 +5357,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("add", 0xc1a11810, 0xffa39c78, sme_int_sd, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("add", 0xc120a300, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("add", 0xc120ab00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("bfcvt", 0xc160e000, 0xfffffc20, sme_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
+ SME2_INSN ("bfcvtn", 0xc160e020, 0xfffffc20, sme_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
SME2_INSN ("bfdot", 0xc1501018, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("bfdot", 0xc1509018, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (4), 0),
SME2_INSN ("bfdot", 0xc1201010, 0xfff09c18, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SVE_ZnxN, SME_Zm), OP_SVE_SHH, F_OD (2), 0),
@@ -5383,6 +5389,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("fadd", 0xc1a11c00, 0xffbf9c78, sme_fp_sd, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VVV_SD, F_OD (4), 0),
SME2_INSN ("fclamp", 0xc120c000, 0xff20fc01, sme_size_22_hsd, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_HSD, 0, 0),
SME2_INSN ("fclamp", 0xc120c800, 0xff20fc03, sme_size_22_hsd, 0, OP3 (SME_Zdnx4, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_HSD, 0, 0),
+ SME2_INSN ("fcvt", 0xc120e000, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
+ SME2_INSN ("fcvtn", 0xc120e020, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
SME2_INSN ("fcvtzs", 0xc121e000, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
SME2_INSN ("fcvtzs", 0xc131e000, 0xfffffc63, sve_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_SS, 0, 0),
SME2_INSN ("fcvtzu", 0xc121e020, 0xfffffc21, sve_misc, 0, OP2 (SME_Zdnx2, SME_Znx2), OP_SVE_SS, 0, 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 22/31] aarch64: Add the SME2 saturating conversion instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (20 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 21/31] aarch64: Add the SME2 FP<->FP " Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 23/31] aarch64: Add the SME2 shift instructions Richard Sandiford
` (10 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
There are two instruction formats here:
- SQCVT, SQCVTU and UQCVT, which operate on lists of two or
four registers.
- SQCVTN, SQCVTUN and UQCVTN, which operate on lists of
four registers.
---
gas/testsuite/gas/aarch64/sme2-25-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-25-invalid.l | 48 +
gas/testsuite/gas/aarch64/sme2-25-invalid.s | 28 +
gas/testsuite/gas/aarch64/sme2-25-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-25-noarch.l | 37 +
gas/testsuite/gas/aarch64/sme2-25.d | 45 +
gas/testsuite/gas/aarch64/sme2-25.s | 44 +
gas/testsuite/gas/aarch64/sme2-26-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-26-invalid.l | 13 +
gas/testsuite/gas/aarch64/sme2-26-invalid.s | 14 +
gas/testsuite/gas/aarch64/sme2-26-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-26-noarch.l | 25 +
gas/testsuite/gas/aarch64/sme2-26.d | 33 +
gas/testsuite/gas/aarch64/sme2-26.s | 29 +
include/opcode/aarch64.h | 1 +
opcodes/aarch64-asm.c | 5 +
opcodes/aarch64-dis-2.c | 1035 ++++++++++---------
opcodes/aarch64-dis.c | 4 +
opcodes/aarch64-opc.c | 1 +
opcodes/aarch64-opc.h | 1 +
opcodes/aarch64-tbl.h | 14 +
21 files changed, 921 insertions(+), 468 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-25-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-25-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-25-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-25-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-25-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-25.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-25.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-26-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-26-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-26-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-26-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-26-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-26.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-26.s
diff --git a/gas/testsuite/gas/aarch64/sme2-25-invalid.d b/gas/testsuite/gas/aarch64/sme2-25-invalid.d
new file mode 100644
index 00000000000..62b23cd19a7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-25-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-25-invalid.s
+#error_output: sme2-25-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-25-invalid.l b/gas/testsuite/gas/aarch64/sme2-25-invalid.l
new file mode 100644
index 00000000000..5b18a2ac99c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-25-invalid.l
@@ -0,0 +1,48 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvt 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvt z0\.h,0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{z0\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `sqcvt z0\.h,{z0\.s,z8\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z1\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z31\.s,z0\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{z0\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z1\.s-z4\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z2\.s-z5\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z3\.s-z6\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{z0\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z1\.d-z4\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z2\.d-z5\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z3\.d-z6\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-25-invalid.s b/gas/testsuite/gas/aarch64/sme2-25-invalid.s
new file mode 100644
index 00000000000..10395f75c40
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-25-invalid.s
@@ -0,0 +1,28 @@
+ sqcvt 0, { z0.s - z1.s }
+ sqcvt z0.h, 0
+
+ sqcvt z0.s, { z0.s - z1.s }
+ sqcvt z0.b, { z0.d - z1.d }
+ sqcvt z0.s, { z0.d - z1.d }
+
+ sqcvt z0.s, { z0.s - z3.s }
+ sqcvt z0.b, { z0.d - z3.d }
+ sqcvt z0.s, { z0.d - z3.d }
+
+ sqcvt z0.h, { z0.s - z2.s }
+ sqcvt z0.h, { z0.s - z3.s }
+ sqcvt z0.h, { z0.s, z8.s }
+ sqcvt z0.h, { z1.s - z2.s }
+ sqcvt z0.h, { z31.s, z0.s }
+
+ sqcvt z0.b, { z0.s - z1.s }
+ sqcvt z0.b, { z0.s - z2.s }
+ sqcvt z0.b, { z1.s - z4.s }
+ sqcvt z0.b, { z2.s - z5.s }
+ sqcvt z0.b, { z3.s - z6.s }
+
+ sqcvt z0.h, { z0.d - z1.d }
+ sqcvt z0.h, { z0.d - z2.d }
+ sqcvt z0.h, { z1.d - z4.d }
+ sqcvt z0.h, { z2.d - z5.d }
+ sqcvt z0.h, { z3.d - z6.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-25-noarch.d b/gas/testsuite/gas/aarch64/sme2-25-noarch.d
new file mode 100644
index 00000000000..e1e9d3968c8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-25-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-25.s
+#error_output: sme2-25-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-25-noarch.l b/gas/testsuite/gas/aarch64/sme2-25-noarch.l
new file mode 100644
index 00000000000..66998fffd32
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-25-noarch.l
@@ -0,0 +1,37 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z19\.h,{z14\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z11\.b,{z20\.s-z23\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z22\.h,{z4\.d-z7\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z19\.h,{z14\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z11\.b,{z20\.s-z23\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z22\.h,{z4\.d-z7\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z19\.h,{z14\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z11\.b,{z20\.s-z23\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z22\.h,{z4\.d-z7\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-25.d b/gas/testsuite/gas/aarch64/sme2-25.d
new file mode 100644
index 00000000000..b2fdce756c3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-25.d
@@ -0,0 +1,45 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c123e000 sqcvt z0\.h, {z0\.s-z1\.s}
+[^:]+: c123e01f sqcvt z31\.h, {z0\.s-z1\.s}
+[^:]+: c123e3c0 sqcvt z0\.h, {z30\.s-z31\.s}
+[^:]+: c123e1d3 sqcvt z19\.h, {z14\.s-z15\.s}
+[^:]+: c133e000 sqcvt z0\.b, {z0\.s-z3\.s}
+[^:]+: c133e01f sqcvt z31\.b, {z0\.s-z3\.s}
+[^:]+: c133e380 sqcvt z0\.b, {z28\.s-z31\.s}
+[^:]+: c133e28b sqcvt z11\.b, {z20\.s-z23\.s}
+[^:]+: c1b3e000 sqcvt z0\.h, {z0\.d-z3\.d}
+[^:]+: c1b3e01f sqcvt z31\.h, {z0\.d-z3\.d}
+[^:]+: c1b3e380 sqcvt z0\.h, {z28\.d-z31\.d}
+[^:]+: c1b3e096 sqcvt z22\.h, {z4\.d-z7\.d}
+[^:]+: c163e000 sqcvtu z0\.h, {z0\.s-z1\.s}
+[^:]+: c163e01f sqcvtu z31\.h, {z0\.s-z1\.s}
+[^:]+: c163e3c0 sqcvtu z0\.h, {z30\.s-z31\.s}
+[^:]+: c163e1d3 sqcvtu z19\.h, {z14\.s-z15\.s}
+[^:]+: c173e000 sqcvtu z0\.b, {z0\.s-z3\.s}
+[^:]+: c173e01f sqcvtu z31\.b, {z0\.s-z3\.s}
+[^:]+: c173e380 sqcvtu z0\.b, {z28\.s-z31\.s}
+[^:]+: c173e28b sqcvtu z11\.b, {z20\.s-z23\.s}
+[^:]+: c1f3e000 sqcvtu z0\.h, {z0\.d-z3\.d}
+[^:]+: c1f3e01f sqcvtu z31\.h, {z0\.d-z3\.d}
+[^:]+: c1f3e380 sqcvtu z0\.h, {z28\.d-z31\.d}
+[^:]+: c1f3e096 sqcvtu z22\.h, {z4\.d-z7\.d}
+[^:]+: c123e020 uqcvt z0\.h, {z0\.s-z1\.s}
+[^:]+: c123e03f uqcvt z31\.h, {z0\.s-z1\.s}
+[^:]+: c123e3e0 uqcvt z0\.h, {z30\.s-z31\.s}
+[^:]+: c123e1f3 uqcvt z19\.h, {z14\.s-z15\.s}
+[^:]+: c133e020 uqcvt z0\.b, {z0\.s-z3\.s}
+[^:]+: c133e03f uqcvt z31\.b, {z0\.s-z3\.s}
+[^:]+: c133e3a0 uqcvt z0\.b, {z28\.s-z31\.s}
+[^:]+: c133e2ab uqcvt z11\.b, {z20\.s-z23\.s}
+[^:]+: c1b3e020 uqcvt z0\.h, {z0\.d-z3\.d}
+[^:]+: c1b3e03f uqcvt z31\.h, {z0\.d-z3\.d}
+[^:]+: c1b3e3a0 uqcvt z0\.h, {z28\.d-z31\.d}
+[^:]+: c1b3e0b6 uqcvt z22\.h, {z4\.d-z7\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-25.s b/gas/testsuite/gas/aarch64/sme2-25.s
new file mode 100644
index 00000000000..45a2a70b021
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-25.s
@@ -0,0 +1,44 @@
+ sqcvt z0.h, { z0.s - z1.s }
+ sqcvt z31.h, { z0.s - z1.s }
+ sqcvt z0.h, { z30.s - z31.s }
+ sqcvt z19.h, { z14.s - z15.s }
+
+ sqcvt z0.b, { z0.s - z3.s }
+ sqcvt z31.b, { z0.s - z3.s }
+ sqcvt z0.b, { z28.s - z31.s }
+ sqcvt z11.b, { z20.s - z23.s }
+
+ sqcvt z0.h, { z0.d - z3.d }
+ sqcvt z31.h, { z0.d - z3.d }
+ sqcvt z0.h, { z28.d - z31.d }
+ sqcvt z22.h, { z4.d - z7.d }
+
+ sqcvtu z0.h, { z0.s - z1.s }
+ sqcvtu z31.h, { z0.s - z1.s }
+ sqcvtu z0.h, { z30.s - z31.s }
+ sqcvtu z19.h, { z14.s - z15.s }
+
+ sqcvtu z0.b, { z0.s - z3.s }
+ sqcvtu z31.b, { z0.s - z3.s }
+ sqcvtu z0.b, { z28.s - z31.s }
+ sqcvtu z11.b, { z20.s - z23.s }
+
+ sqcvtu z0.h, { z0.d - z3.d }
+ sqcvtu z31.h, { z0.d - z3.d }
+ sqcvtu z0.h, { z28.d - z31.d }
+ sqcvtu z22.h, { z4.d - z7.d }
+
+ uqcvt z0.h, { z0.s - z1.s }
+ uqcvt z31.h, { z0.s - z1.s }
+ uqcvt z0.h, { z30.s - z31.s }
+ uqcvt z19.h, { z14.s - z15.s }
+
+ uqcvt z0.b, { z0.s - z3.s }
+ uqcvt z31.b, { z0.s - z3.s }
+ uqcvt z0.b, { z28.s - z31.s }
+ uqcvt z11.b, { z20.s - z23.s }
+
+ uqcvt z0.h, { z0.d - z3.d }
+ uqcvt z31.h, { z0.d - z3.d }
+ uqcvt z0.h, { z28.d - z31.d }
+ uqcvt z22.h, { z4.d - z7.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-26-invalid.d b/gas/testsuite/gas/aarch64/sme2-26-invalid.d
new file mode 100644
index 00000000000..5e336bf0905
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-26-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-26-invalid.s
+#error_output: sme2-26-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-26-invalid.l b/gas/testsuite/gas/aarch64/sme2-26-invalid.l
new file mode 100644
index 00000000000..08c2f7fc7af
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-26-invalid.l
@@ -0,0 +1,13 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvtn z0\.b,0'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{z0\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z1\.s-z4\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z2\.s-z5\.s}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z3\.s-z6\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{z0\.d-z2\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z1\.d-z4\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z2\.d-z5\.d}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z3\.d-z6\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-26-invalid.s b/gas/testsuite/gas/aarch64/sme2-26-invalid.s
new file mode 100644
index 00000000000..2eddec902b2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-26-invalid.s
@@ -0,0 +1,14 @@
+ sqcvtn 0, { z0.s - z3.s }
+ sqcvtn z0.b, 0
+
+ sqcvtn z0.b, { z0.s - z1.s }
+ sqcvtn z0.b, { z0.s - z2.s }
+ sqcvtn z0.b, { z1.s - z4.s }
+ sqcvtn z0.b, { z2.s - z5.s }
+ sqcvtn z0.b, { z3.s - z6.s }
+
+ sqcvtn z0.h, { z0.d - z1.d }
+ sqcvtn z0.h, { z0.d - z2.d }
+ sqcvtn z0.h, { z1.d - z4.d }
+ sqcvtn z0.h, { z2.d - z5.d }
+ sqcvtn z0.h, { z3.d - z6.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-26-noarch.d b/gas/testsuite/gas/aarch64/sme2-26-noarch.d
new file mode 100644
index 00000000000..e9af412a1e0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-26-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-26.s
+#error_output: sme2-26-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-26-noarch.l b/gas/testsuite/gas/aarch64/sme2-26-noarch.l
new file mode 100644
index 00000000000..b1bd4899d5e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-26-noarch.l
@@ -0,0 +1,25 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z11\.b,{z20\.s-z23\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z22\.h,{z4\.d-z7\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z11\.b,{z20\.s-z23\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z22\.h,{z4\.d-z7\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.b,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z11\.b,{z20\.s-z23\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z22\.h,{z4\.d-z7\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-26.d b/gas/testsuite/gas/aarch64/sme2-26.d
new file mode 100644
index 00000000000..96e0ca990f6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-26.d
@@ -0,0 +1,33 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c133e040 sqcvtn z0\.b, {z0\.s-z3\.s}
+[^:]+: c133e05f sqcvtn z31\.b, {z0\.s-z3\.s}
+[^:]+: c133e3c0 sqcvtn z0\.b, {z28\.s-z31\.s}
+[^:]+: c133e2cb sqcvtn z11\.b, {z20\.s-z23\.s}
+[^:]+: c1b3e040 sqcvtn z0\.h, {z0\.d-z3\.d}
+[^:]+: c1b3e05f sqcvtn z31\.h, {z0\.d-z3\.d}
+[^:]+: c1b3e3c0 sqcvtn z0\.h, {z28\.d-z31\.d}
+[^:]+: c1b3e0d6 sqcvtn z22\.h, {z4\.d-z7\.d}
+[^:]+: c173e040 sqcvtun z0\.b, {z0\.s-z3\.s}
+[^:]+: c173e05f sqcvtun z31\.b, {z0\.s-z3\.s}
+[^:]+: c173e3c0 sqcvtun z0\.b, {z28\.s-z31\.s}
+[^:]+: c173e2cb sqcvtun z11\.b, {z20\.s-z23\.s}
+[^:]+: c1f3e040 sqcvtun z0\.h, {z0\.d-z3\.d}
+[^:]+: c1f3e05f sqcvtun z31\.h, {z0\.d-z3\.d}
+[^:]+: c1f3e3c0 sqcvtun z0\.h, {z28\.d-z31\.d}
+[^:]+: c1f3e0d6 sqcvtun z22\.h, {z4\.d-z7\.d}
+[^:]+: c133e060 uqcvtn z0\.b, {z0\.s-z3\.s}
+[^:]+: c133e07f uqcvtn z31\.b, {z0\.s-z3\.s}
+[^:]+: c133e3e0 uqcvtn z0\.b, {z28\.s-z31\.s}
+[^:]+: c133e2eb uqcvtn z11\.b, {z20\.s-z23\.s}
+[^:]+: c1b3e060 uqcvtn z0\.h, {z0\.d-z3\.d}
+[^:]+: c1b3e07f uqcvtn z31\.h, {z0\.d-z3\.d}
+[^:]+: c1b3e3e0 uqcvtn z0\.h, {z28\.d-z31\.d}
+[^:]+: c1b3e0f6 uqcvtn z22\.h, {z4\.d-z7\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-26.s b/gas/testsuite/gas/aarch64/sme2-26.s
new file mode 100644
index 00000000000..72bdbf68676
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-26.s
@@ -0,0 +1,29 @@
+ sqcvtn z0.b, { z0.s - z3.s }
+ sqcvtn z31.b, { z0.s - z3.s }
+ sqcvtn z0.b, { z28.s - z31.s }
+ sqcvtn z11.b, { z20.s - z23.s }
+
+ sqcvtn z0.h, { z0.d - z3.d }
+ sqcvtn z31.h, { z0.d - z3.d }
+ sqcvtn z0.h, { z28.d - z31.d }
+ sqcvtn z22.h, { z4.d - z7.d }
+
+ sqcvtun z0.b, { z0.s - z3.s }
+ sqcvtun z31.b, { z0.s - z3.s }
+ sqcvtun z0.b, { z28.s - z31.s }
+ sqcvtun z11.b, { z20.s - z23.s }
+
+ sqcvtun z0.h, { z0.d - z3.d }
+ sqcvtun z31.h, { z0.d - z3.d }
+ sqcvtun z0.h, { z28.d - z31.d }
+ sqcvtun z22.h, { z4.d - z7.d }
+
+ uqcvtn z0.b, { z0.s - z3.s }
+ uqcvtn z31.b, { z0.s - z3.s }
+ uqcvtn z0.b, { z28.s - z31.s }
+ uqcvtn z11.b, { z20.s - z23.s }
+
+ uqcvtn z0.h, { z0.d - z3.d }
+ uqcvtn z31.h, { z0.d - z3.d }
+ uqcvtn z0.h, { z28.d - z31.d }
+ uqcvtn z22.h, { z4.d - z7.d }
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index f18f383a711..b445bf758fc 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -717,6 +717,7 @@ enum aarch64_insn_class
sme_size_12_hs,
sme_size_22,
sme_size_22_hsd,
+ sme_sz_23,
sme_str,
sme_start,
sme_stop,
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index b1d2d589a13..5f2e51044ce 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1970,6 +1970,11 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
aarch64_get_variant (inst) + 1, 0);
break;
+ case sme_sz_23:
+ insert_field (FLD_SME_sz_23, &inst->value,
+ aarch64_get_variant (inst), 0);
+ break;
+
case sve_cpy:
insert_fields (&inst->value, aarch64_get_variant (inst),
0, 2, FLD_SVE_M_14, FLD_size);
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 759f6ab3611..55a01e6e593 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2865;
+ return 2874;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2699;
+ return 2705;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2700;
+ return 2706;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2723;
+ return 2729;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2724;
+ return 2730;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2715;
+ return 2721;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2716;
+ return 2722;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2707;
+ return 2713;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2708;
+ return 2714;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2731;
+ return 2737;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2732;
+ return 2738;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2755;
+ return 2761;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2756;
+ return 2762;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2747;
+ return 2753;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2748;
+ return 2754;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2739;
+ return 2745;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2740;
+ return 2746;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2695;
+ return 2701;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2696;
+ return 2702;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2719;
+ return 2725;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2720;
+ return 2726;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2711;
+ return 2717;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2712;
+ return 2718;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2703;
+ return 2709;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2704;
+ return 2710;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2727;
+ return 2733;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2728;
+ return 2734;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2751;
+ return 2757;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2752;
+ return 2758;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2743;
+ return 2749;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2744;
+ return 2750;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2735;
+ return 2741;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2736;
+ return 2742;
}
}
}
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2846;
+ return 2855;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2847;
+ return 2856;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2848;
+ return 2857;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2810;
+ return 2816;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2770;
+ return 2776;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2811;
+ return 2817;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2812;
+ return 2818;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2771;
+ return 2777;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2772;
+ return 2778;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2826;
+ return 2832;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2827;
+ return 2833;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2828;
+ return 2834;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2868;
+ return 2877;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2869;
+ return 2878;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2870;
+ return 2879;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2877;
+ return 2886;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2878;
+ return 2887;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2879;
+ return 2888;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2871;
+ return 2880;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2872;
+ return 2881;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2873;
+ return 2882;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2834;
+ return 2840;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2880;
+ return 2889;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2881;
+ return 2890;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2882;
+ return 2891;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2835;
+ return 2841;
}
}
}
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2776;
+ return 2782;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2782;
+ return 2788;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2855;
+ return 2864;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2788;
+ return 2794;
}
}
}
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2777;
+ return 2783;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2783;
+ return 2789;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2856;
+ return 2865;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2789;
+ return 2795;
}
}
}
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2840;
+ return 2849;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2766;
+ return 2772;
}
}
}
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2854;
+ return 2863;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2841;
+ return 2850;
}
}
}
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2775;
+ return 2781;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2767;
+ return 2773;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2884;
+ return 2893;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2885;
+ return 2894;
}
}
else
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2866;
+ return 2875;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2867;
+ return 2876;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2874;
+ return 2883;
}
}
else
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2886;
+ return 2895;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2887;
+ return 2896;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2802;
+ return 2808;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2803;
+ return 2809;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2804;
+ return 2810;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2875;
+ return 2884;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2876;
+ return 2885;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2883;
+ return 2892;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2818;
+ return 2824;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2819;
+ return 2825;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2820;
+ return 2826;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2850;
+ return 2859;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2851;
+ return 2860;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2852;
+ return 2861;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2853;
+ return 2862;
}
}
}
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2849;
+ return 2858;
}
}
else
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2814;
+ return 2820;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2815;
+ return 2821;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2816;
+ return 2822;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2817;
+ return 2823;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2773;
+ return 2779;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2774;
+ return 2780;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2806;
+ return 2812;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2807;
+ return 2813;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2808;
+ return 2814;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2809;
+ return 2815;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2813;
+ return 2819;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2790;
+ return 2796;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2791;
+ return 2797;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2792;
+ return 2798;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2793;
+ return 2799;
}
}
}
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2805;
+ return 2811;
}
}
else
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2842;
+ return 2851;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2843;
+ return 2852;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2844;
+ return 2853;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2845;
+ return 2854;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2830;
+ return 2836;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2831;
+ return 2837;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2832;
+ return 2838;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2833;
+ return 2839;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2822;
+ return 2828;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2823;
+ return 2829;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2824;
+ return 2830;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2825;
+ return 2831;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2762;
+ return 2768;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2763;
+ return 2769;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2764;
+ return 2770;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2765;
+ return 2771;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2829;
+ return 2835;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2768;
+ return 2774;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2769;
+ return 2775;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2784;
+ return 2790;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2785;
+ return 2791;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2786;
+ return 2792;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2787;
+ return 2793;
}
}
}
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2821;
+ return 2827;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2760;
+ return 2766;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2761;
+ return 2767;
}
}
}
@@ -4208,7 +4208,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x0x0xxxxxxxxxx1
uclamp. */
- return 2778;
+ return 2784;
}
else
{
@@ -4216,7 +4216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x0x1xxxxxxxxxx1
uclamp. */
- return 2779;
+ return 2785;
}
}
}
@@ -4270,7 +4270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2794;
+ return 2800;
}
else
{
@@ -4393,42 +4393,108 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 19) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 19) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx100xx1111000xxxx0xxxxx
- fcvtzs. */
- return 2470;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx100x01111000xxxx0xxxxx
+ fcvtzs. */
+ return 2470;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx110x01111000xxxx0xxxxx
+ fcvtzs. */
+ return 2471;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx110xx1111000xxxx0xxxxx
- fcvtzs. */
- return 2471;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx101x01111000xxxx0xxxxx
+ frintp. */
+ return 2530;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx111x01111000xxxx0xxxxx
+ frintp. */
+ return 2531;
+ }
}
}
else
{
if (((word >> 20) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx101xx1111000xxxx0xxxxx
- frintp. */
- return 2530;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x010xx11111000xxxx0xxxxx
+ sqcvt. */
+ return 2687;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x110xx11111000xxxx0xxxxx
+ sqcvtu. */
+ return 2690;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx111xx1111000xxxx0xxxxx
- frintp. */
- return 2531;
+ if (((word >> 6) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x011xx11111000xxx00xxxxx
+ sqcvt. */
+ return 2688;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x111xx11111000xxx00xxxxx
+ sqcvtu. */
+ return 2691;
+ }
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x011xx11111000xxx10xxxxx
+ sqcvtn. */
+ return 2689;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x111xx11111000xxx10xxxxx
+ sqcvtun. */
+ return 2692;
+ }
+ }
}
}
}
@@ -4463,7 +4529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2796;
+ return 2802;
}
else
{
@@ -4540,7 +4606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx1
umax. */
- return 2795;
+ return 2801;
}
else
{
@@ -4548,7 +4614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx1
umax. */
- return 2797;
+ return 2803;
}
}
else
@@ -4583,7 +4649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001xxxx0xxxxx
sqdmulh. */
- return 2687;
+ return 2693;
}
else
{
@@ -4591,7 +4657,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101xxxx0xxxxx
sqdmulh. */
- return 2689;
+ return 2695;
}
}
else
@@ -4602,7 +4668,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011xxxx0xxxxx
sqdmulh. */
- return 2688;
+ return 2694;
}
else
{
@@ -4610,7 +4676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111xxxx0xxxxx
sqdmulh. */
- return 2690;
+ return 2696;
}
}
}
@@ -4641,7 +4707,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100x10xx1xxxx0
srshl. */
- return 2691;
+ return 2697;
}
}
else
@@ -4663,7 +4729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100x00xx1xxxx1
umin. */
- return 2798;
+ return 2804;
}
else
{
@@ -4671,7 +4737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100x10xx1xxxx1
urshl. */
- return 2836;
+ return 2845;
}
}
else
@@ -4715,7 +4781,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx1011100xxxxx1xxxxx
ucvtf. */
- return 2780;
+ return 2786;
}
else
{
@@ -4723,27 +4789,60 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx1011100xxxxx1xxxxx
ucvtf. */
- return 2781;
+ return 2787;
}
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 17) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx10xxx111100xxxxx1xxxxx
- fcvtzu. */
- return 2472;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xx0111100xxxxx1xxxxx
+ fcvtzu. */
+ return 2472;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xx0111100xxxxx1xxxxx
+ fcvtzu. */
+ return 2473;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx11xxx111100xxxxx1xxxxx
- fcvtzu. */
- return 2473;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xx1111100xxxxx1xxxxx
+ uqcvt. */
+ return 2842;
+ }
+ else
+ {
+ if (((word >> 6) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xx1111100xxxx01xxxxx
+ uqcvt. */
+ return 2843;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xx1111100xxxx11xxxxx
+ uqcvtn. */
+ return 2844;
+ }
+ }
}
}
}
@@ -4768,7 +4867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x10xx1xxxx0
srshl. */
- return 2693;
+ return 2699;
}
}
else
@@ -4790,7 +4889,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x00xx1xxxx1
umin. */
- return 2800;
+ return 2806;
}
else
{
@@ -4798,7 +4897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x10xx1xxxx1
urshl. */
- return 2838;
+ return 2847;
}
}
else
@@ -4845,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x10xx1xxxx0
srshl. */
- return 2692;
+ return 2698;
}
else
{
@@ -4853,7 +4952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x10xx1xxxx0
srshl. */
- return 2694;
+ return 2700;
}
}
}
@@ -4889,7 +4988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x00xx1xxxx1
umin. */
- return 2799;
+ return 2805;
}
else
{
@@ -4897,7 +4996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x00xx1xxxx1
umin. */
- return 2801;
+ return 2807;
}
}
else
@@ -4908,7 +5007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x10xx1xxxx1
urshl. */
- return 2837;
+ return 2846;
}
else
{
@@ -4916,7 +5015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x10xx1xxxx1
urshl. */
- return 2839;
+ return 2848;
}
}
}
@@ -4966,7 +5065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2701;
+ return 2707;
}
else
{
@@ -4974,7 +5073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2725;
+ return 2731;
}
}
else
@@ -4985,7 +5084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2717;
+ return 2723;
}
else
{
@@ -4993,7 +5092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2709;
+ return 2715;
}
}
}
@@ -5007,7 +5106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2733;
+ return 2739;
}
else
{
@@ -5015,7 +5114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2757;
+ return 2763;
}
}
else
@@ -5026,7 +5125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2749;
+ return 2755;
}
else
{
@@ -5034,7 +5133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2741;
+ return 2747;
}
}
}
@@ -5062,7 +5161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2702;
+ return 2708;
}
else
{
@@ -5070,7 +5169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2759;
+ return 2765;
}
}
else
@@ -5079,7 +5178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2726;
+ return 2732;
}
}
else
@@ -5090,7 +5189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2718;
+ return 2724;
}
else
{
@@ -5098,7 +5197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2710;
+ return 2716;
}
}
}
@@ -5112,7 +5211,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2734;
+ return 2740;
}
else
{
@@ -5120,7 +5219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2758;
+ return 2764;
}
}
else
@@ -5131,7 +5230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2750;
+ return 2756;
}
else
{
@@ -5139,7 +5238,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2742;
+ return 2748;
}
}
}
@@ -5181,7 +5280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2697;
+ return 2703;
}
else
{
@@ -5189,7 +5288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2698;
+ return 2704;
}
}
else
@@ -5200,7 +5299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2721;
+ return 2727;
}
else
{
@@ -5208,7 +5307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2722;
+ return 2728;
}
}
}
@@ -5222,7 +5321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2713;
+ return 2719;
}
else
{
@@ -5230,7 +5329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2714;
+ return 2720;
}
}
else
@@ -5241,7 +5340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2705;
+ return 2711;
}
else
{
@@ -5249,7 +5348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2706;
+ return 2712;
}
}
}
@@ -5266,7 +5365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2729;
+ return 2735;
}
else
{
@@ -5274,7 +5373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2730;
+ return 2736;
}
}
else
@@ -5285,7 +5384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2753;
+ return 2759;
}
else
{
@@ -5293,7 +5392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2754;
+ return 2760;
}
}
}
@@ -5307,7 +5406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2745;
+ return 2751;
}
else
{
@@ -5315,7 +5414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2746;
+ return 2752;
}
}
else
@@ -5326,7 +5425,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2737;
+ return 2743;
}
else
{
@@ -5334,7 +5433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2738;
+ return 2744;
}
}
}
@@ -7736,7 +7835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2928;
+ return 2937;
}
else
{
@@ -7744,7 +7843,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2936;
+ return 2945;
}
}
else
@@ -7755,7 +7854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2932;
+ return 2941;
}
else
{
@@ -7763,7 +7862,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2939;
+ return 2948;
}
}
}
@@ -7801,7 +7900,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2988;
+ return 2997;
}
else
{
@@ -7809,7 +7908,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 2994;
+ return 3003;
}
}
else
@@ -7820,7 +7919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 2991;
+ return 3000;
}
else
{
@@ -7828,7 +7927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 2997;
+ return 3006;
}
}
}
@@ -7842,7 +7941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3012;
+ return 3021;
}
else
{
@@ -7850,7 +7949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3018;
+ return 3027;
}
}
else
@@ -7861,7 +7960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3015;
+ return 3024;
}
else
{
@@ -7869,7 +7968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3021;
+ return 3030;
}
}
}
@@ -7886,7 +7985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3000;
+ return 3009;
}
else
{
@@ -7894,7 +7993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3006;
+ return 3015;
}
}
else
@@ -7905,7 +8004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3003;
+ return 3012;
}
else
{
@@ -7913,7 +8012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3009;
+ return 3018;
}
}
}
@@ -7927,7 +8026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3024;
+ return 3033;
}
else
{
@@ -7935,7 +8034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3030;
+ return 3039;
}
}
else
@@ -7946,7 +8045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3027;
+ return 3036;
}
else
{
@@ -7954,7 +8053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3033;
+ return 3042;
}
}
}
@@ -8019,7 +8118,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2929;
+ return 2938;
}
else
{
@@ -8027,7 +8126,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2937;
+ return 2946;
}
}
else
@@ -8038,7 +8137,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2933;
+ return 2942;
}
else
{
@@ -8046,7 +8145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2940;
+ return 2949;
}
}
}
@@ -8084,7 +8183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2989;
+ return 2998;
}
else
{
@@ -8092,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 2995;
+ return 3004;
}
}
else
@@ -8103,7 +8202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 2992;
+ return 3001;
}
else
{
@@ -8111,7 +8210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 2998;
+ return 3007;
}
}
}
@@ -8125,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3013;
+ return 3022;
}
else
{
@@ -8133,7 +8232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3019;
+ return 3028;
}
}
else
@@ -8144,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3016;
+ return 3025;
}
else
{
@@ -8152,7 +8251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3022;
+ return 3031;
}
}
}
@@ -8169,7 +8268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3001;
+ return 3010;
}
else
{
@@ -8177,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3007;
+ return 3016;
}
}
else
@@ -8188,7 +8287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3004;
+ return 3013;
}
else
{
@@ -8196,7 +8295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3010;
+ return 3019;
}
}
}
@@ -8210,7 +8309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3025;
+ return 3034;
}
else
{
@@ -8218,7 +8317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3031;
+ return 3040;
}
}
else
@@ -8229,7 +8328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3028;
+ return 3037;
}
else
{
@@ -8237,7 +8336,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3034;
+ return 3043;
}
}
}
@@ -8305,7 +8404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2931;
+ return 2940;
}
else
{
@@ -8313,7 +8412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2938;
+ return 2947;
}
}
else
@@ -8322,7 +8421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2935;
+ return 2944;
}
}
else
@@ -8333,7 +8432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2930;
+ return 2939;
}
else
{
@@ -8341,7 +8440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2934;
+ return 2943;
}
}
}
@@ -8403,7 +8502,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2990;
+ return 2999;
}
else
{
@@ -8411,7 +8510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3084;
+ return 3093;
}
}
else
@@ -8422,7 +8521,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 2996;
+ return 3005;
}
else
{
@@ -8430,7 +8529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3086;
+ return 3095;
}
}
}
@@ -8444,7 +8543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 2993;
+ return 3002;
}
else
{
@@ -8452,7 +8551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3085;
+ return 3094;
}
}
else
@@ -8461,7 +8560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 2999;
+ return 3008;
}
}
}
@@ -8477,7 +8576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3014;
+ return 3023;
}
else
{
@@ -8485,7 +8584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3090;
+ return 3099;
}
}
else
@@ -8496,7 +8595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3020;
+ return 3029;
}
else
{
@@ -8504,7 +8603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3092;
+ return 3101;
}
}
}
@@ -8518,7 +8617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3017;
+ return 3026;
}
else
{
@@ -8526,7 +8625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3091;
+ return 3100;
}
}
else
@@ -8535,7 +8634,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3023;
+ return 3032;
}
}
}
@@ -8554,7 +8653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3002;
+ return 3011;
}
else
{
@@ -8562,7 +8661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3087;
+ return 3096;
}
}
else
@@ -8573,7 +8672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3008;
+ return 3017;
}
else
{
@@ -8581,7 +8680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3089;
+ return 3098;
}
}
}
@@ -8595,7 +8694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3005;
+ return 3014;
}
else
{
@@ -8603,7 +8702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3088;
+ return 3097;
}
}
else
@@ -8612,7 +8711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3011;
+ return 3020;
}
}
}
@@ -8628,7 +8727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3026;
+ return 3035;
}
else
{
@@ -8636,7 +8735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3093;
+ return 3102;
}
}
else
@@ -8647,7 +8746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3032;
+ return 3041;
}
else
{
@@ -8655,7 +8754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3095;
+ return 3104;
}
}
}
@@ -8669,7 +8768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3029;
+ return 3038;
}
else
{
@@ -8677,7 +8776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3094;
+ return 3103;
}
}
else
@@ -8686,7 +8785,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3035;
+ return 3044;
}
}
}
@@ -9059,7 +9158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3113;
+ return 3122;
}
else
{
@@ -9077,7 +9176,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3116;
+ return 3125;
}
}
}
@@ -9157,7 +9256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2926;
+ return 2935;
}
else
{
@@ -9165,7 +9264,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2927;
+ return 2936;
}
}
else
@@ -9272,7 +9371,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3118;
+ return 3127;
}
}
}
@@ -9288,7 +9387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3115;
+ return 3124;
}
else
{
@@ -9333,7 +9432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2925;
+ return 2934;
}
else
{
@@ -9427,7 +9526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3117;
+ return 3126;
}
}
}
@@ -9557,7 +9656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3119;
+ return 3128;
}
}
}
@@ -9573,7 +9672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3114;
+ return 3123;
}
else
{
@@ -10415,7 +10514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2945;
+ return 2954;
}
}
}
@@ -10489,7 +10588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2946;
+ return 2955;
}
}
}
@@ -13163,7 +13262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2944;
+ return 2953;
}
}
}
@@ -14867,7 +14966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2973;
+ return 2982;
}
}
else
@@ -15110,7 +15209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2949;
+ return 2958;
}
else
{
@@ -15118,7 +15217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2950;
+ return 2959;
}
}
else
@@ -15350,7 +15449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2970;
+ return 2979;
}
else
{
@@ -15371,7 +15470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2977;
+ return 2986;
}
else
{
@@ -15379,7 +15478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2976;
+ return 2985;
}
}
else
@@ -15434,7 +15533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2969;
+ return 2978;
}
else
{
@@ -15446,7 +15545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2975;
+ return 2984;
}
else
{
@@ -15454,7 +15553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2974;
+ return 2983;
}
}
else
@@ -15505,7 +15604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2953;
+ return 2962;
}
else
{
@@ -15513,7 +15612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2954;
+ return 2963;
}
}
else
@@ -15872,7 +15971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2947;
+ return 2956;
}
else
{
@@ -15905,7 +16004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2971;
+ return 2980;
}
else
{
@@ -15935,7 +16034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2948;
+ return 2957;
}
else
{
@@ -16064,7 +16163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2957;
+ return 2966;
}
else
{
@@ -16074,7 +16173,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2959;
+ return 2968;
}
else
{
@@ -16082,7 +16181,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2961;
+ return 2970;
}
}
}
@@ -16094,7 +16193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2958;
+ return 2967;
}
else
{
@@ -16104,7 +16203,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2960;
+ return 2969;
}
else
{
@@ -16112,7 +16211,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2962;
+ return 2971;
}
}
}
@@ -17171,7 +17270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2941;
+ return 2950;
}
else
{
@@ -17179,7 +17278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2943;
+ return 2952;
}
}
else
@@ -17188,7 +17287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2942;
+ return 2951;
}
}
}
@@ -18684,7 +18783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2951;
+ return 2960;
}
else
{
@@ -18692,7 +18791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2952;
+ return 2961;
}
}
}
@@ -19066,7 +19165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2955;
+ return 2964;
}
else
{
@@ -19074,7 +19173,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2956;
+ return 2965;
}
}
}
@@ -19435,7 +19534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2857;
+ return 2866;
}
else
{
@@ -19443,7 +19542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2858;
+ return 2867;
}
}
else
@@ -19487,7 +19586,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2860;
+ return 2869;
}
else
{
@@ -19495,7 +19594,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2859;
+ return 2868;
}
}
else
@@ -19542,7 +19641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2864;
+ return 2873;
}
else
{
@@ -19550,7 +19649,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2861;
+ return 2870;
}
}
else
@@ -19594,7 +19693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2862;
+ return 2871;
}
else
{
@@ -19602,7 +19701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2863;
+ return 2872;
}
}
else
@@ -20728,7 +20827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2972;
+ return 2981;
}
}
else
@@ -22089,7 +22188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3108;
+ return 3117;
}
else
{
@@ -22669,7 +22768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3036;
+ return 3045;
}
else
{
@@ -22677,7 +22776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3038;
+ return 3047;
}
}
else
@@ -22688,7 +22787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3042;
+ return 3051;
}
else
{
@@ -22696,7 +22795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3044;
+ return 3053;
}
}
}
@@ -22710,7 +22809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3039;
+ return 3048;
}
else
{
@@ -22718,7 +22817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3041;
+ return 3050;
}
}
else
@@ -22729,7 +22828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3045;
+ return 3054;
}
else
{
@@ -22737,7 +22836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3047;
+ return 3056;
}
}
}
@@ -22754,7 +22853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3060;
+ return 3069;
}
else
{
@@ -22762,7 +22861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3062;
+ return 3071;
}
}
else
@@ -22773,7 +22872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3066;
+ return 3075;
}
else
{
@@ -22781,7 +22880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3068;
+ return 3077;
}
}
}
@@ -22795,7 +22894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3063;
+ return 3072;
}
else
{
@@ -22803,7 +22902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3065;
+ return 3074;
}
}
else
@@ -22814,7 +22913,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3069;
+ return 3078;
}
else
{
@@ -22822,7 +22921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3071;
+ return 3080;
}
}
}
@@ -22842,7 +22941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3048;
+ return 3057;
}
else
{
@@ -22850,7 +22949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3050;
+ return 3059;
}
}
else
@@ -22861,7 +22960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3054;
+ return 3063;
}
else
{
@@ -22869,7 +22968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3056;
+ return 3065;
}
}
}
@@ -22883,7 +22982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3051;
+ return 3060;
}
else
{
@@ -22891,7 +22990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3053;
+ return 3062;
}
}
else
@@ -22902,7 +23001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3057;
+ return 3066;
}
else
{
@@ -22910,7 +23009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3059;
+ return 3068;
}
}
}
@@ -22927,7 +23026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3072;
+ return 3081;
}
else
{
@@ -22935,7 +23034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3074;
+ return 3083;
}
}
else
@@ -22946,7 +23045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3078;
+ return 3087;
}
else
{
@@ -22954,7 +23053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3080;
+ return 3089;
}
}
}
@@ -22968,7 +23067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3075;
+ return 3084;
}
else
{
@@ -22976,7 +23075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3077;
+ return 3086;
}
}
else
@@ -22987,7 +23086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3081;
+ return 3090;
}
else
{
@@ -22995,7 +23094,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3083;
+ return 3092;
}
}
}
@@ -23029,7 +23128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3037;
+ return 3046;
}
else
{
@@ -23037,7 +23136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3096;
+ return 3105;
}
}
else
@@ -23048,7 +23147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3043;
+ return 3052;
}
else
{
@@ -23056,7 +23155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3098;
+ return 3107;
}
}
}
@@ -23070,7 +23169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3040;
+ return 3049;
}
else
{
@@ -23078,7 +23177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3097;
+ return 3106;
}
}
else
@@ -23087,7 +23186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3046;
+ return 3055;
}
}
}
@@ -23103,7 +23202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3061;
+ return 3070;
}
else
{
@@ -23111,7 +23210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3102;
+ return 3111;
}
}
else
@@ -23122,7 +23221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3067;
+ return 3076;
}
else
{
@@ -23130,7 +23229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3104;
+ return 3113;
}
}
}
@@ -23144,7 +23243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3064;
+ return 3073;
}
else
{
@@ -23152,7 +23251,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3103;
+ return 3112;
}
}
else
@@ -23161,7 +23260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3070;
+ return 3079;
}
}
}
@@ -23180,7 +23279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3049;
+ return 3058;
}
else
{
@@ -23188,7 +23287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3099;
+ return 3108;
}
}
else
@@ -23199,7 +23298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3055;
+ return 3064;
}
else
{
@@ -23207,7 +23306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3101;
+ return 3110;
}
}
}
@@ -23221,7 +23320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3052;
+ return 3061;
}
else
{
@@ -23229,7 +23328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3100;
+ return 3109;
}
}
else
@@ -23238,7 +23337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3058;
+ return 3067;
}
}
}
@@ -23254,7 +23353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3073;
+ return 3082;
}
else
{
@@ -23262,7 +23361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3105;
+ return 3114;
}
}
else
@@ -23273,7 +23372,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3079;
+ return 3088;
}
else
{
@@ -23281,7 +23380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3107;
+ return 3116;
}
}
}
@@ -23295,7 +23394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3076;
+ return 3085;
}
else
{
@@ -23303,7 +23402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3106;
+ return 3115;
}
}
else
@@ -23312,7 +23411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3082;
+ return 3091;
}
}
}
@@ -23479,7 +23578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2963;
+ return 2972;
}
}
}
@@ -23512,7 +23611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2889;
+ return 2898;
}
}
else
@@ -23586,7 +23685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2965;
+ return 2974;
}
}
}
@@ -23619,7 +23718,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2966;
+ return 2975;
}
}
else
@@ -23666,7 +23765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2896;
+ return 2905;
}
else
{
@@ -23674,7 +23773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2898;
+ return 2907;
}
}
else
@@ -23685,7 +23784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2900;
+ return 2909;
}
else
{
@@ -23699,7 +23798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2901;
+ return 2910;
}
else
{
@@ -23707,7 +23806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2894;
+ return 2903;
}
}
else
@@ -23716,7 +23815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2903;
+ return 2912;
}
}
else
@@ -23729,7 +23828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2902;
+ return 2911;
}
else
{
@@ -23737,7 +23836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2907;
+ return 2916;
}
}
else
@@ -23746,7 +23845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2904;
+ return 2913;
}
}
}
@@ -23927,7 +24026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2888;
+ return 2897;
}
}
else
@@ -23958,7 +24057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2964;
+ return 2973;
}
else
{
@@ -23977,7 +24076,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2980;
+ return 2989;
}
else
{
@@ -23987,7 +24086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2978;
+ return 2987;
}
else
{
@@ -23997,7 +24096,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2985;
+ return 2994;
}
else
{
@@ -24005,7 +24104,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2984;
+ return 2993;
}
}
}
@@ -24589,7 +24688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2981;
+ return 2990;
}
else
{
@@ -24597,7 +24696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2982;
+ return 2991;
}
}
}
@@ -24915,7 +25014,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2899;
+ return 2908;
}
}
else
@@ -25526,7 +25625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2892;
+ return 2901;
}
}
}
@@ -25578,7 +25677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2905;
+ return 2914;
}
}
}
@@ -25821,7 +25920,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2895;
+ return 2904;
}
}
else
@@ -25897,7 +25996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2908;
+ return 2917;
}
}
else
@@ -26723,7 +26822,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2893;
+ return 2902;
}
}
else
@@ -26755,7 +26854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2906;
+ return 2915;
}
}
else
@@ -26995,7 +27094,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2897;
+ return 2906;
}
}
else
@@ -27027,7 +27126,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2911;
+ return 2920;
}
else
{
@@ -27035,7 +27134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2915;
+ return 2924;
}
}
}
@@ -27057,7 +27156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2912;
+ return 2921;
}
else
{
@@ -27065,7 +27164,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2916;
+ return 2925;
}
}
}
@@ -27104,7 +27203,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2909;
+ return 2918;
}
else
{
@@ -27112,7 +27211,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2913;
+ return 2922;
}
}
else
@@ -27134,7 +27233,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2910;
+ return 2919;
}
else
{
@@ -27142,7 +27241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2914;
+ return 2923;
}
}
else
@@ -28950,7 +29049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2917;
+ return 2926;
}
else
{
@@ -28958,7 +29057,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2921;
+ return 2930;
}
}
else
@@ -28980,7 +29079,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2918;
+ return 2927;
}
else
{
@@ -28988,7 +29087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2922;
+ return 2931;
}
}
else
@@ -29494,7 +29593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2919;
+ return 2928;
}
else
{
@@ -29502,7 +29601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2923;
+ return 2932;
}
}
}
@@ -29524,7 +29623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2920;
+ return 2929;
}
else
{
@@ -29532,7 +29631,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2924;
+ return 2933;
}
}
}
@@ -29588,7 +29687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2891;
+ return 2900;
}
else
{
@@ -29596,7 +29695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2890;
+ return 2899;
}
}
}
@@ -29699,7 +29798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2968;
+ return 2977;
}
else
{
@@ -29707,7 +29806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2967;
+ return 2976;
}
}
else
@@ -29718,7 +29817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2979;
+ return 2988;
}
else
{
@@ -29728,7 +29827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2987;
+ return 2996;
}
else
{
@@ -29736,7 +29835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2986;
+ return 2995;
}
}
}
@@ -30264,11 +30363,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3109; break; /* addg --> smax. */
- case 3109: value = 3110; break; /* smax --> umax. */
- case 3110: value = 3111; break; /* umax --> smin. */
- case 3111: value = 3112; break; /* smin --> umin. */
- case 3112: return NULL; /* umin --> NULL. */
+ case 19: value = 3118; break; /* addg --> smax. */
+ case 3118: value = 3119; break; /* smax --> umax. */
+ case 3119: value = 3120; break; /* umax --> smin. */
+ case 3120: value = 3121; break; /* smin --> umin. */
+ case 3121: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30426,8 +30525,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2983; break; /* fcvt --> bfcvt. */
- case 2983: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2992; break; /* fcvt --> bfcvt. */
+ case 2992: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 7271231eb3f..fd13c924804 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -3102,6 +3102,10 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
variant -= 1;
break;
+ case sme_sz_23:
+ variant = extract_field (FLD_SME_sz_23, inst->value, 0);
+ break;
+
case sve_cpy:
variant = extract_fields (inst->value, 0, 2, FLD_size, FLD_SVE_M_14);
break;
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index ac54bf7811a..0418a21b295 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -252,6 +252,7 @@ const aarch64_field fields[] =
{ 23, 1 }, /* SME_i1: immediate field, bit 23. */
{ 12, 2 }, /* SME_size_12: bits [13:12]. */
{ 22, 2 }, /* SME_size_22: size<1>, size<0> class field, [23:22]. */
+ { 23, 1 }, /* SME_sz_23: bit [23]. */
{ 22, 1 }, /* SME_tszh: immediate and qualifier field, bit 22. */
{ 18, 3 }, /* SME_tszl: immediate and qualifier field, bits [20:18]. */
{ 0, 8 }, /* SME_zero_mask: list of up to 8 tile names separated by commas [7:0]. */
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index f8051c9b2da..698b00d7805 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -73,6 +73,7 @@ enum aarch64_field_kind
FLD_SME_i1,
FLD_SME_size_12,
FLD_SME_size_22,
+ FLD_SME_sz_23,
FLD_SME_tszh,
FLD_SME_tszl,
FLD_SME_zero_mask,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index eae843b593c..b0c5bb54ae4 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2128,6 +2128,11 @@
QLF2(S_D,S_D), \
QLF2(S_Q,S_Q), \
}
+#define OP_SVE_VV_BH_SD \
+{ \
+ QLF2(S_B,S_S), \
+ QLF2(S_H,S_D), \
+}
#define OP_SVE_VV_HSD \
{ \
QLF2(S_H,S_H), \
@@ -5608,6 +5613,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("smlsll", 0xc1a10008, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("smopa", 0xa0800008, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMHH, 0, 0),
SME2_INSN ("smops", 0xa0800018, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMHH, 0, 0),
+ SME2_INSN ("sqcvt", 0xc123e000, 0xfffffc20, sme_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
+ SME2_INSN ("sqcvt", 0xc133e000, 0xff7ffc60, sme_sz_23, 0, OP2 (SVE_Zd, SME_Znx4), OP_SVE_VV_BH_SD, 0, 0),
+ SME2_INSN ("sqcvtn", 0xc133e040, 0xff7ffc60, sme_sz_23, 0, OP2 (SVE_Zd, SME_Znx4), OP_SVE_VV_BH_SD, 0, 0),
+ SME2_INSN ("sqcvtu", 0xc163e000, 0xfffffc20, sme_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
+ SME2_INSN ("sqcvtu", 0xc173e000, 0xff7ffc60, sme_sz_23, 0, OP2 (SVE_Zd, SME_Znx4), OP_SVE_VV_BH_SD, 0, 0),
+ SME2_INSN ("sqcvtun", 0xc173e040, 0xff7ffc60, sme_sz_23, 0, OP2 (SVE_Zd, SME_Znx4), OP_SVE_VV_BH_SD, 0, 0),
SME2_INSN ("sqdmulh", 0xc120a400, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -5757,6 +5768,9 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("umlsll", 0xc1a10018, 0xffa39c7e, sme_int_sd, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_VVV_SD_BH, F_OD (4), 0),
SME2_INSN ("umopa", 0xa1800008, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMHH, 0, 0),
SME2_INSN ("umops", 0xa1800018, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SVE_SMMHH, 0, 0),
+ SME2_INSN ("uqcvt", 0xc123e020, 0xfffffc20, sme_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
+ SME2_INSN ("uqcvt", 0xc133e020, 0xff7ffc60, sme_sz_23, 0, OP2 (SVE_Zd, SME_Znx4), OP_SVE_VV_BH_SD, 0, 0),
+ SME2_INSN ("uqcvtn", 0xc133e060, 0xff7ffc60, sme_sz_23, 0, OP2 (SVE_Zd, SME_Znx4), OP_SVE_VV_BH_SD, 0, 0),
SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 23/31] aarch64: Add the SME2 shift instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (21 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 22/31] aarch64: Add the SME2 saturating " Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 24/31] aarch64: Add the SME2 UNPK instructions Richard Sandiford
` (9 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
There are two instruction formats here:
- SQRSHR, SQRSHRU and UQRSHR, which operate on lists of two
or four registers.
- SQRSHRN, SQRSHRUN and UQRSHRN, which operate on lists of
four registers.
These are the first SME2 instructions to have immediate operands.
The patch makes sure that, when parsing SME2 instructions with
immediate operands, the new predicate-as-counter registers are
parsed as registers rather than as #-less immediates.
---
gas/config/tc-aarch64.c | 17 +-
gas/testsuite/gas/aarch64/sme2-27-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-27-invalid.l | 31 +
gas/testsuite/gas/aarch64/sme2-27-invalid.s | 25 +
gas/testsuite/gas/aarch64/sme2-27-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-27-noarch.l | 50 +
gas/testsuite/gas/aarch64/sme2-27.d | 62 ++
gas/testsuite/gas/aarch64/sme2-27.s | 71 ++
gas/testsuite/gas/aarch64/sme2-28-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-28-invalid.l | 19 +
gas/testsuite/gas/aarch64/sme2-28-invalid.s | 11 +
gas/testsuite/gas/aarch64/sme2-28-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-28-noarch.l | 26 +
gas/testsuite/gas/aarch64/sme2-28.d | 34 +
gas/testsuite/gas/aarch64/sme2-28.s | 29 +
include/opcode/aarch64.h | 3 +
opcodes/aarch64-asm-2.c | 23 +-
opcodes/aarch64-asm.c | 14 +
opcodes/aarch64-asm.h | 1 +
opcodes/aarch64-dis-2.c | 1092 ++++++++++---------
opcodes/aarch64-dis.c | 17 +
opcodes/aarch64-dis.h | 1 +
opcodes/aarch64-opc-2.c | 2 +
opcodes/aarch64-opc.c | 12 +
opcodes/aarch64-tbl.h | 22 +
25 files changed, 1066 insertions(+), 508 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-27-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-27-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-27-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-27-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-27-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-27.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-27.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-28-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-28-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-28-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-28-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-28-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-28.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-28.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 2c8d5916182..781c87bbc41 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -349,6 +349,13 @@ struct reloc_entry
| REG_TYPE(FP_B) | REG_TYPE(FP_H) \
| REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q) \
| REG_TYPE(Z) | REG_TYPE(P)) \
+ /* Likewise, but with predicate-as-counter registers added. */ \
+ MULTI_REG_TYPE(R_ZR_SP_BHSDQ_VZP_PN, REG_TYPE(R_32) | REG_TYPE(R_64) \
+ | REG_TYPE(SP_32) | REG_TYPE(SP_64) \
+ | REG_TYPE(ZR_32) | REG_TYPE(ZR_64) | REG_TYPE(V) \
+ | REG_TYPE(FP_B) | REG_TYPE(FP_H) \
+ | REG_TYPE(FP_S) | REG_TYPE(FP_D) | REG_TYPE(FP_Q) \
+ | REG_TYPE(Z) | REG_TYPE(P) | REG_TYPE(PN)) \
/* Any integer register; used for error messages only. */ \
MULTI_REG_TYPE(R_N, REG_TYPE(R_32) | REG_TYPE(R_64) \
| REG_TYPE(SP_32) | REG_TYPE(SP_64) \
@@ -6527,9 +6534,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
clear_error ();
skip_whitespace (str);
- if (AARCH64_CPU_HAS_ANY_FEATURES (*opcode->avariant,
- AARCH64_FEATURE_SVE
- | AARCH64_FEATURE_SVE2))
+ if (AARCH64_CPU_HAS_FEATURE (*opcode->avariant, AARCH64_FEATURE_SME2))
+ imm_reg_type = REG_TYPE_R_ZR_SP_BHSDQ_VZP_PN;
+ else if (AARCH64_CPU_HAS_ANY_FEATURES (*opcode->avariant,
+ AARCH64_FEATURE_SVE
+ | AARCH64_FEATURE_SVE2))
imm_reg_type = REG_TYPE_R_ZR_SP_BHSDQ_VZP;
else
imm_reg_type = REG_TYPE_R_ZR_BHSDQ_V;
@@ -6892,6 +6901,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_SHLIMM_PRED:
case AARCH64_OPND_SVE_SHLIMM_UNPRED:
case AARCH64_OPND_SVE_SHLIMM_UNPRED_22:
+ case AARCH64_OPND_SME_SHRIMM4:
+ case AARCH64_OPND_SME_SHRIMM5:
case AARCH64_OPND_SVE_SHRIMM_PRED:
case AARCH64_OPND_SVE_SHRIMM_UNPRED:
case AARCH64_OPND_SVE_SHRIMM_UNPRED_22:
diff --git a/gas/testsuite/gas/aarch64/sme2-27-invalid.d b/gas/testsuite/gas/aarch64/sme2-27-invalid.d
new file mode 100644
index 00000000000..7b34ec4ce67
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-27-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-27-invalid.s
+#error_output: sme2-27-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-27-invalid.l b/gas/testsuite/gas/aarch64/sme2-27-invalid.l
new file mode 100644
index 00000000000..9efaa04ca90
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-27-invalid.l
@@ -0,0 +1,31 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqrshr 0,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshr z0\.h,0,#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.h,{z1\.s-z2\.s},#1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},#17'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.s,{z0\.d-z1\.d},#1'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqrshr z0\.h, {z0\.d-z1\.d}, #1
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqrshr z0\.b, {z0\.s-z1\.s}, #1
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},x0'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},z0\.s'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},p0'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},pn0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z1\.s-z4\.s},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z2\.s-z5\.s},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z3\.s-z6\.s},#1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#-1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#33'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqrshr z0\.b, {z0\.s-z3\.s}, #1
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqrshr z0\.h, {z0\.d-z3\.d}, #1
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{z0\.d-z3\.d},#65'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqrshr z0\.b, {z0\.s-z3\.s}, #65
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqrshr z0\.h, {z0\.d-z3\.d}, #65
diff --git a/gas/testsuite/gas/aarch64/sme2-27-invalid.s b/gas/testsuite/gas/aarch64/sme2-27-invalid.s
new file mode 100644
index 00000000000..3a613af9a8d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-27-invalid.s
@@ -0,0 +1,25 @@
+ .equ x0, 1
+ .equ z0.s, 2
+ .equ p0, 3
+ .equ pn0, 4
+
+ sqrshr 0, { z0.s - z1.s }, #1
+ sqrshr z0.h, 0, #1
+
+ sqrshr z0.h, { z1.s - z2.s }, #1
+ sqrshr z0.h, { z0.s - z1.s }, #0
+ sqrshr z0.h, { z0.s - z1.s }, #17
+ sqrshr z0.s, { z0.d - z1.d }, #1
+ sqrshr z0.h, { z0.s - z1.s }, x0
+ sqrshr z0.h, { z0.s - z1.s }, z0.s
+ sqrshr z0.h, { z0.s - z1.s }, p0
+ sqrshr z0.h, { z0.s - z1.s }, pn0
+
+ sqrshr z0.b, { z1.s - z4.s }, #1
+ sqrshr z0.b, { z2.s - z5.s }, #1
+ sqrshr z0.b, { z3.s - z6.s }, #1
+ sqrshr z0.b, { z0.s - z3.s }, #-1
+ sqrshr z0.b, { z0.s - z3.s }, #0
+ sqrshr z0.b, { z0.s - z3.s }, #33
+ sqrshr z0.b, { z0.d - z3.d }, #1
+ sqrshr z0.b, { z0.d - z3.d }, #65 // Double error
diff --git a/gas/testsuite/gas/aarch64/sme2-27-noarch.d b/gas/testsuite/gas/aarch64/sme2-27-noarch.d
new file mode 100644
index 00000000000..f0e735db033
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-27-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-27.s
+#error_output: sme2-27-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-27-noarch.l b/gas/testsuite/gas/aarch64/sme2-27-noarch.l
new file mode 100644
index 00000000000..72213e0c281
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-27-noarch.l
@@ -0,0 +1,50 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z30\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z14\.h,{z22\.s-z23\.s},#7'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#x0'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#p0'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#pn0'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z28\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z0\.s-z3\.s},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z6\.b,{z12\.s-z15\.s},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z28\.d-z31\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.d-z3\.d},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z25\.h,{z20\.d-z23\.d},#50'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z30\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.s-z1\.s},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z14\.h,{z22\.s-z23\.s},#7'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z28\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z0\.s-z3\.s},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z6\.b,{z12\.s-z15\.s},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z28\.d-z31\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.d-z3\.d},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z25\.h,{z20\.d-z23\.d},#50'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z30\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.s-z1\.s},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z14\.h,{z22\.s-z23\.s},#7'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z28\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z0\.s-z3\.s},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z6\.b,{z12\.s-z15\.s},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z28\.d-z31\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.d-z3\.d},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z25\.h,{z20\.d-z23\.d},#50'
diff --git a/gas/testsuite/gas/aarch64/sme2-27.d b/gas/testsuite/gas/aarch64/sme2-27.d
new file mode 100644
index 00000000000..e217715489e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-27.d
@@ -0,0 +1,62 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c1efd400 sqrshr z0\.h, {z0\.s-z1\.s}, #1
+[^:]+: c1efd41f sqrshr z31\.h, {z0\.s-z1\.s}, #1
+[^:]+: c1efd7c0 sqrshr z0\.h, {z30\.s-z31\.s}, #1
+[^:]+: c1e0d400 sqrshr z0\.h, {z0\.s-z1\.s}, #16
+[^:]+: c1e9d6ce sqrshr z14\.h, {z22\.s-z23\.s}, #7
+[^:]+: c1efd400 sqrshr z0\.h, {z0\.s-z1\.s}, #1
+[^:]+: c1eed400 sqrshr z0\.h, {z0\.s-z1\.s}, #2
+[^:]+: c1edd400 sqrshr z0\.h, {z0\.s-z1\.s}, #3
+[^:]+: c1ecd400 sqrshr z0\.h, {z0\.s-z1\.s}, #4
+[^:]+: c17fd800 sqrshr z0\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fd81f sqrshr z31\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdb80 sqrshr z0\.b, {z28\.s-z31\.s}, #1
+[^:]+: c160d800 sqrshr z0\.b, {z0\.s-z3\.s}, #32
+[^:]+: c167d986 sqrshr z6\.b, {z12\.s-z15\.s}, #25
+[^:]+: c1ffd800 sqrshr z0\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffd81f sqrshr z31\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffdb80 sqrshr z0\.h, {z28\.d-z31\.d}, #1
+[^:]+: c1a0d800 sqrshr z0\.h, {z0\.d-z3\.d}, #64
+[^:]+: c1aeda99 sqrshr z25\.h, {z20\.d-z23\.d}, #50
+[^:]+: c13fd800 \.inst 0xc13fd800 ; undefined
+[^:]+: c120d800 \.inst 0xc120d800 ; undefined
+[^:]+: c1ffd400 sqrshru z0\.h, {z0\.s-z1\.s}, #1
+[^:]+: c1ffd41f sqrshru z31\.h, {z0\.s-z1\.s}, #1
+[^:]+: c1ffd7c0 sqrshru z0\.h, {z30\.s-z31\.s}, #1
+[^:]+: c1f0d400 sqrshru z0\.h, {z0\.s-z1\.s}, #16
+[^:]+: c1f9d6ce sqrshru z14\.h, {z22\.s-z23\.s}, #7
+[^:]+: c17fd840 sqrshru z0\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fd85f sqrshru z31\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdbc0 sqrshru z0\.b, {z28\.s-z31\.s}, #1
+[^:]+: c160d840 sqrshru z0\.b, {z0\.s-z3\.s}, #32
+[^:]+: c167d9c6 sqrshru z6\.b, {z12\.s-z15\.s}, #25
+[^:]+: c1ffd840 sqrshru z0\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffd85f sqrshru z31\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffdbc0 sqrshru z0\.h, {z28\.d-z31\.d}, #1
+[^:]+: c1a0d840 sqrshru z0\.h, {z0\.d-z3\.d}, #64
+[^:]+: c1aedad9 sqrshru z25\.h, {z20\.d-z23\.d}, #50
+[^:]+: c1efd420 uqrshr z0\.h, {z0\.s-z1\.s}, #1
+[^:]+: c1efd43f uqrshr z31\.h, {z0\.s-z1\.s}, #1
+[^:]+: c1efd7e0 uqrshr z0\.h, {z30\.s-z31\.s}, #1
+[^:]+: c1e0d420 uqrshr z0\.h, {z0\.s-z1\.s}, #16
+[^:]+: c1e9d6ee uqrshr z14\.h, {z22\.s-z23\.s}, #7
+[^:]+: c17fd820 uqrshr z0\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fd83f uqrshr z31\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdba0 uqrshr z0\.b, {z28\.s-z31\.s}, #1
+[^:]+: c160d820 uqrshr z0\.b, {z0\.s-z3\.s}, #32
+[^:]+: c167d9a6 uqrshr z6\.b, {z12\.s-z15\.s}, #25
+[^:]+: c1ffd820 uqrshr z0\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffd83f uqrshr z31\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffdba0 uqrshr z0\.h, {z28\.d-z31\.d}, #1
+[^:]+: c1a0d820 uqrshr z0\.h, {z0\.d-z3\.d}, #64
+[^:]+: c1aedab9 uqrshr z25\.h, {z20\.d-z23\.d}, #50
+[^:]+: c13fd820 \.inst 0xc13fd820 ; undefined
+[^:]+: c120d820 \.inst 0xc120d820 ; undefined
diff --git a/gas/testsuite/gas/aarch64/sme2-27.s b/gas/testsuite/gas/aarch64/sme2-27.s
new file mode 100644
index 00000000000..e7e04ba68c9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-27.s
@@ -0,0 +1,71 @@
+ .equ x0, 1
+ .equ z0.s, 2
+ .equ p0, 3
+ .equ pn0, 4
+
+ sqrshr z0.h, { z0.s - z1.s }, #1
+ sqrshr z31.h, { z0.s - z1.s }, #1
+ sqrshr z0.h, { z30.s - z31.s }, #1
+ sqrshr z0.h, { z0.s - z1.s }, #16
+ sqrshr z14.h, { z22.s - z23.s }, #7
+
+ sqrshr z0.h, { z0.s - z1.s }, #x0
+ sqrshr z0.h, { z0.s - z1.s }, #z0.s
+ sqrshr z0.h, { z0.s - z1.s }, #p0
+ sqrshr z0.h, { z0.s - z1.s }, #pn0
+
+ sqrshr z0.b, { z0.s - z3.s }, #1
+ sqrshr z31.b, { z0.s - z3.s }, #1
+ sqrshr z0.b, { z28.s - z31.s }, #1
+ sqrshr z0.b, { z0.s - z3.s }, #32
+ sqrshr z6.b, { z12.s - z15.s }, #25
+
+ sqrshr z0.h, { z0.d - z3.d }, #1
+ sqrshr z31.h, { z0.d - z3.d }, #1
+ sqrshr z0.h, { z28.d - z31.d }, #1
+ sqrshr z0.h, { z0.d - z3.d }, #64
+ sqrshr z25.h, { z20.d - z23.d }, #50
+
+ // Invalid SQRSHR
+ .inst 0xc13fd800
+ .inst 0xc120d800
+
+ sqrshru z0.h, { z0.s - z1.s }, #1
+ sqrshru z31.h, { z0.s - z1.s }, #1
+ sqrshru z0.h, { z30.s - z31.s }, #1
+ sqrshru z0.h, { z0.s - z1.s }, #16
+ sqrshru z14.h, { z22.s - z23.s }, #7
+
+ sqrshru z0.b, { z0.s - z3.s }, #1
+ sqrshru z31.b, { z0.s - z3.s }, #1
+ sqrshru z0.b, { z28.s - z31.s }, #1
+ sqrshru z0.b, { z0.s - z3.s }, #32
+ sqrshru z6.b, { z12.s - z15.s }, #25
+
+ sqrshru z0.h, { z0.d - z3.d }, #1
+ sqrshru z31.h, { z0.d - z3.d }, #1
+ sqrshru z0.h, { z28.d - z31.d }, #1
+ sqrshru z0.h, { z0.d - z3.d }, #64
+ sqrshru z25.h, { z20.d - z23.d }, #50
+
+ uqrshr z0.h, { z0.s - z1.s }, #1
+ uqrshr z31.h, { z0.s - z1.s }, #1
+ uqrshr z0.h, { z30.s - z31.s }, #1
+ uqrshr z0.h, { z0.s - z1.s }, #16
+ uqrshr z14.h, { z22.s - z23.s }, #7
+
+ uqrshr z0.b, { z0.s - z3.s }, #1
+ uqrshr z31.b, { z0.s - z3.s }, #1
+ uqrshr z0.b, { z28.s - z31.s }, #1
+ uqrshr z0.b, { z0.s - z3.s }, #32
+ uqrshr z6.b, { z12.s - z15.s }, #25
+
+ uqrshr z0.h, { z0.d - z3.d }, #1
+ uqrshr z31.h, { z0.d - z3.d }, #1
+ uqrshr z0.h, { z28.d - z31.d }, #1
+ uqrshr z0.h, { z0.d - z3.d }, #64
+ uqrshr z25.h, { z20.d - z23.d }, #50
+
+ // Invalid UQRSHR
+ .inst 0xc13fd820
+ .inst 0xc120d820
diff --git a/gas/testsuite/gas/aarch64/sme2-28-invalid.d b/gas/testsuite/gas/aarch64/sme2-28-invalid.d
new file mode 100644
index 00000000000..dbe03ce0a7c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-28-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-28-invalid.s
+#error_output: sme2-28-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-28-invalid.l b/gas/testsuite/gas/aarch64/sme2-28-invalid.l
new file mode 100644
index 00000000000..615f8c35039
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-28-invalid.l
@@ -0,0 +1,19 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshrn z0\.b,0,#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z1\.s-z4\.s},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z2\.s-z5\.s},#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z3\.s-z6\.s},#1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#-1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#33'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z3\.s}, #1
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z3\.d}, #1
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.d-z3\.d},#65'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z3\.s}, #65
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z3\.d}, #65
diff --git a/gas/testsuite/gas/aarch64/sme2-28-invalid.s b/gas/testsuite/gas/aarch64/sme2-28-invalid.s
new file mode 100644
index 00000000000..f587049967e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-28-invalid.s
@@ -0,0 +1,11 @@
+ sqrshrn 0, { z0.s - z3.s }, #1
+ sqrshrn z0.b, 0, #1
+
+ sqrshrn z0.b, { z1.s - z4.s }, #1
+ sqrshrn z0.b, { z2.s - z5.s }, #1
+ sqrshrn z0.b, { z3.s - z6.s }, #1
+ sqrshrn z0.b, { z0.s - z3.s }, #-1
+ sqrshrn z0.b, { z0.s - z3.s }, #0
+ sqrshrn z0.b, { z0.s - z3.s }, #33
+ sqrshrn z0.b, { z0.d - z3.d }, #1
+ sqrshrn z0.b, { z0.d - z3.d }, #65 // Double error
diff --git a/gas/testsuite/gas/aarch64/sme2-28-noarch.d b/gas/testsuite/gas/aarch64/sme2-28-noarch.d
new file mode 100644
index 00000000000..de378eb1998
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-28-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-28.s
+#error_output: sme2-28-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-28-noarch.l b/gas/testsuite/gas/aarch64/sme2-28-noarch.l
new file mode 100644
index 00000000000..a3762f1b9a9
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-28-noarch.l
@@ -0,0 +1,26 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z28\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z0\.s-z3\.s},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z6\.b,{z12\.s-z15\.s},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z28\.d-z31\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.d-z3\.d},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z25\.h,{z20\.d-z23\.d},#50'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z28\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z0\.s-z3\.s},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z6\.b,{z12\.s-z15\.s},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.b,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z28\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z0\.s-z3\.s},#32'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z6\.b,{z12\.s-z15\.s},#25'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{z0\.d-z3\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z28\.d-z31\.d},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.d-z3\.d},#64'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z25\.h,{z20\.d-z23\.d},#50'
diff --git a/gas/testsuite/gas/aarch64/sme2-28.d b/gas/testsuite/gas/aarch64/sme2-28.d
new file mode 100644
index 00000000000..b72273dd548
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-28.d
@@ -0,0 +1,34 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c17fdc00 sqrshrn z0\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdc1f sqrshrn z31\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdf80 sqrshrn z0\.b, {z28\.s-z31\.s}, #1
+[^:]+: c160dc00 sqrshrn z0\.b, {z0\.s-z3\.s}, #32
+[^:]+: c167dd86 sqrshrn z6\.b, {z12\.s-z15\.s}, #25
+[^:]+: c1ffdc00 sqrshrn z0\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffdc1f sqrshrn z31\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffdf80 sqrshrn z0\.h, {z28\.d-z31\.d}, #1
+[^:]+: c1a0dc00 sqrshrn z0\.h, {z0\.d-z3\.d}, #64
+[^:]+: c1aede99 sqrshrn z25\.h, {z20\.d-z23\.d}, #50
+[^:]+: c17fdc40 sqrshrun z0\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdc5f sqrshrun z31\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdfc0 sqrshrun z0\.b, {z28\.s-z31\.s}, #1
+[^:]+: c160dc40 sqrshrun z0\.b, {z0\.s-z3\.s}, #32
+[^:]+: c167ddc6 sqrshrun z6\.b, {z12\.s-z15\.s}, #25
+[^:]+: c17fdc20 uqrshrn z0\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdc3f uqrshrn z31\.b, {z0\.s-z3\.s}, #1
+[^:]+: c17fdfa0 uqrshrn z0\.b, {z28\.s-z31\.s}, #1
+[^:]+: c160dc20 uqrshrn z0\.b, {z0\.s-z3\.s}, #32
+[^:]+: c167dda6 uqrshrn z6\.b, {z12\.s-z15\.s}, #25
+[^:]+: c1ffdc20 uqrshrn z0\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffdc3f uqrshrn z31\.h, {z0\.d-z3\.d}, #1
+[^:]+: c1ffdfa0 uqrshrn z0\.h, {z28\.d-z31\.d}, #1
+[^:]+: c1a0dc20 uqrshrn z0\.h, {z0\.d-z3\.d}, #64
+[^:]+: c1aedeb9 uqrshrn z25\.h, {z20\.d-z23\.d}, #50
diff --git a/gas/testsuite/gas/aarch64/sme2-28.s b/gas/testsuite/gas/aarch64/sme2-28.s
new file mode 100644
index 00000000000..3b51448288e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-28.s
@@ -0,0 +1,29 @@
+ sqrshrn z0.b, { z0.s - z3.s }, #1
+ sqrshrn z31.b, { z0.s - z3.s }, #1
+ sqrshrn z0.b, { z28.s - z31.s }, #1
+ sqrshrn z0.b, { z0.s - z3.s }, #32
+ sqrshrn z6.b, { z12.s - z15.s }, #25
+
+ sqrshrn z0.h, { z0.d - z3.d }, #1
+ sqrshrn z31.h, { z0.d - z3.d }, #1
+ sqrshrn z0.h, { z28.d - z31.d }, #1
+ sqrshrn z0.h, { z0.d - z3.d }, #64
+ sqrshrn z25.h, { z20.d - z23.d }, #50
+
+ sqrshrun z0.b, { z0.s - z3.s }, #1
+ sqrshrun z31.b, { z0.s - z3.s }, #1
+ sqrshrun z0.b, { z28.s - z31.s }, #1
+ sqrshrun z0.b, { z0.s - z3.s }, #32
+ sqrshrun z6.b, { z12.s - z15.s }, #25
+
+ uqrshrn z0.b, { z0.s - z3.s }, #1
+ uqrshrn z31.b, { z0.s - z3.s }, #1
+ uqrshrn z0.b, { z28.s - z31.s }, #1
+ uqrshrn z0.b, { z0.s - z3.s }, #32
+ uqrshrn z6.b, { z12.s - z15.s }, #25
+
+ uqrshrn z0.h, { z0.d - z3.d }, #1
+ uqrshrn z31.h, { z0.d - z3.d }, #1
+ uqrshrn z0.h, { z28.d - z31.d }, #1
+ uqrshrn z0.h, { z0.d - z3.d }, #64
+ uqrshrn z25.h, { z20.d - z23.d }, #50
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index b445bf758fc..a4f1623d4ca 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -520,6 +520,8 @@ enum aarch64_opnd
AARCH64_OPND_SME_ADDR_RI_U4xVL, /* SME [<Xn|SP>{, #<imm>, MUL VL}]. */
AARCH64_OPND_SME_SM_ZA, /* SME {SM | ZA}. */
AARCH64_OPND_SME_PnT_Wm_imm, /* SME <Pn>.<T>[<Wm>, #<imm>]. */
+ AARCH64_OPND_SME_SHRIMM4, /* 4-bit right shift, bits [19:16]. */
+ AARCH64_OPND_SME_SHRIMM5, /* size + 5-bit right shift, bits [23:22,20:16]. */
AARCH64_OPND_SME_Zm_INDEX1, /* Zn.T[index], bits [19:16,10]. */
AARCH64_OPND_SME_Zm_INDEX2, /* Zn.T[index], bits [19:16,11:10]. */
AARCH64_OPND_SME_Zm_INDEX3_1, /* Zn.T[index], bits [19:16,10,2:1]. */
@@ -713,6 +715,7 @@ enum aarch64_insn_class
sme_mov,
sme_ldr,
sme_psel,
+ sme_shift,
sme_size_12_bhs,
sme_size_12_hs,
sme_size_22,
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 3d439d4e688..03d1c0e1221 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -685,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 268:
+ case 270:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -731,12 +731,12 @@ aarch64_insert_operand (const aarch64_operand *self,
case 193:
case 194:
case 237:
- case 262:
- case 263:
+ case 264:
case 265:
case 267:
- case 272:
- case 273:
+ case 269:
+ case 274:
+ case 275:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -805,8 +805,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 264:
case 266:
+ case 268:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
@@ -886,6 +886,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 184:
case 185:
case 186:
+ case 250:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
case 204:
case 205:
@@ -919,8 +920,6 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 249:
- case 250:
case 251:
case 252:
case 253:
@@ -932,6 +931,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 259:
case 260:
case 261:
+ case 262:
+ case 263:
return aarch64_ins_simple_index (self, info, code, inst, errors);
case 239:
case 240:
@@ -947,9 +948,11 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 248:
return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 269:
- case 270:
+ case 249:
+ return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
case 271:
+ case 272:
+ case 273:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 5f2e51044ce..0025cb6f80c 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1624,6 +1624,19 @@ aarch64_ins_simple_index (const aarch64_operand *self,
return true;
}
+/* Insert a plain shift-right immediate, when there is only a single
+ element size. */
+bool
+aarch64_ins_plain_shrimm (const aarch64_operand *self,
+ const aarch64_opnd_info *info, aarch64_insn *code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors ATTRIBUTE_UNUSED)
+{
+ unsigned int base = 1 << get_operand_field_width (self, 0);
+ insert_field (self->fields[0], code, base - info->imm.value, 0);
+ return true;
+}
+
/* Miscellaneous encoding functions. */
/* Encode size[0], i.e. bit 22, for
@@ -1980,6 +1993,7 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
0, 2, FLD_SVE_M_14, FLD_size);
break;
+ case sme_shift:
case sve_index:
case sve_shift_pred:
case sve_shift_unpred:
diff --git a/opcodes/aarch64-asm.h b/opcodes/aarch64-asm.h
index 4cc48dfdcb6..0028e8bbaed 100644
--- a/opcodes/aarch64-asm.h
+++ b/opcodes/aarch64-asm.h
@@ -111,6 +111,7 @@ AARCH64_DECL_OPD_INSERTER (ins_imm_rotate1);
AARCH64_DECL_OPD_INSERTER (ins_imm_rotate2);
AARCH64_DECL_OPD_INSERTER (ins_x0_to_x30);
AARCH64_DECL_OPD_INSERTER (ins_simple_index);
+AARCH64_DECL_OPD_INSERTER (ins_plain_shrimm);
#undef AARCH64_DECL_OPD_INSERTER
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 55a01e6e593..d82c37498e7 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2874;
+ return 2883;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2705;
+ return 2711;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2706;
+ return 2712;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2729;
+ return 2735;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2730;
+ return 2736;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2721;
+ return 2727;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2722;
+ return 2728;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2713;
+ return 2719;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2714;
+ return 2720;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2737;
+ return 2743;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2738;
+ return 2744;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2761;
+ return 2767;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2762;
+ return 2768;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2753;
+ return 2759;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2754;
+ return 2760;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2745;
+ return 2751;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2746;
+ return 2752;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2701;
+ return 2707;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2702;
+ return 2708;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2725;
+ return 2731;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2726;
+ return 2732;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2717;
+ return 2723;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2718;
+ return 2724;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2709;
+ return 2715;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2710;
+ return 2716;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2733;
+ return 2739;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2734;
+ return 2740;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2757;
+ return 2763;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2758;
+ return 2764;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2749;
+ return 2755;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2750;
+ return 2756;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2741;
+ return 2747;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2742;
+ return 2748;
}
}
}
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2855;
+ return 2864;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2856;
+ return 2865;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2857;
+ return 2866;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2816;
+ return 2822;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2776;
+ return 2782;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2817;
+ return 2823;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2818;
+ return 2824;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2777;
+ return 2783;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2778;
+ return 2784;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2832;
+ return 2838;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2833;
+ return 2839;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2834;
+ return 2840;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2877;
+ return 2886;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2878;
+ return 2887;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2879;
+ return 2888;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2886;
+ return 2895;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2887;
+ return 2896;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2888;
+ return 2897;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2880;
+ return 2889;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2881;
+ return 2890;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2882;
+ return 2891;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2840;
+ return 2846;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2889;
+ return 2898;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2890;
+ return 2899;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2891;
+ return 2900;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2841;
+ return 2847;
}
}
}
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2782;
+ return 2788;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2788;
+ return 2794;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2864;
+ return 2873;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2794;
+ return 2800;
}
}
}
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2783;
+ return 2789;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2789;
+ return 2795;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2865;
+ return 2874;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2795;
+ return 2801;
}
}
}
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2849;
+ return 2858;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2772;
+ return 2778;
}
}
}
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2863;
+ return 2872;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2850;
+ return 2859;
}
}
}
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2781;
+ return 2787;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2773;
+ return 2779;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2893;
+ return 2902;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2894;
+ return 2903;
}
}
else
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2875;
+ return 2884;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2876;
+ return 2885;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2883;
+ return 2892;
}
}
else
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2895;
+ return 2904;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2896;
+ return 2905;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2808;
+ return 2814;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2809;
+ return 2815;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2810;
+ return 2816;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2884;
+ return 2893;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2885;
+ return 2894;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2892;
+ return 2901;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2824;
+ return 2830;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2825;
+ return 2831;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2826;
+ return 2832;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2859;
+ return 2868;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2860;
+ return 2869;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2861;
+ return 2870;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2862;
+ return 2871;
}
}
}
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2858;
+ return 2867;
}
}
else
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2820;
+ return 2826;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2821;
+ return 2827;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2822;
+ return 2828;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2823;
+ return 2829;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2779;
+ return 2785;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2780;
+ return 2786;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2812;
+ return 2818;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2813;
+ return 2819;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2814;
+ return 2820;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2815;
+ return 2821;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2819;
+ return 2825;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2796;
+ return 2802;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2797;
+ return 2803;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2798;
+ return 2804;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2799;
+ return 2805;
}
}
}
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2811;
+ return 2817;
}
}
else
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2851;
+ return 2860;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2852;
+ return 2861;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2853;
+ return 2862;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2854;
+ return 2863;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2836;
+ return 2842;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2837;
+ return 2843;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2838;
+ return 2844;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2839;
+ return 2845;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2828;
+ return 2834;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2829;
+ return 2835;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2830;
+ return 2836;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2831;
+ return 2837;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2768;
+ return 2774;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2769;
+ return 2775;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2770;
+ return 2776;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2771;
+ return 2777;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2835;
+ return 2841;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2774;
+ return 2780;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2775;
+ return 2781;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2790;
+ return 2796;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2791;
+ return 2797;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2792;
+ return 2798;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2793;
+ return 2799;
}
}
}
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2827;
+ return 2833;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2766;
+ return 2772;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2767;
+ return 2773;
}
}
}
@@ -4137,88 +4137,187 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 13) & 0x1) == 0)
{
- if (((word >> 0) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 16) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx0100xxxxxxxxxxxxx
+ sel. */
+ return 2643;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxx1100xxxxxxxxxxxxx
+ sel. */
+ return 2644;
+ }
+ }
+ else
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ if (((word >> 11) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxx0100xxxxxxxxxxxx0
- sel. */
- return 2643;
+ x1000001xx1xxxxx110x00xxxxxxxxxx
+ fclamp. */
+ return 2466;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxx1100xxxxxxxxxxxx0
- sel. */
- return 2644;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110010xxxxxxxxxx
+ fclamp. */
+ return 2467;
+ }
+ else
+ {
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 6) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110110xxx00xxxxx
+ sqrshr. */
+ return 2698;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110110xxx10xxxxx
+ sqrshru. */
+ return 2701;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110110xxxx1xxxxx
+ uqrshr. */
+ return 2852;
+ }
+ }
}
}
else
{
- if (((word >> 10) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx110x00xxxxxxxxx0
- fclamp. */
- return 2466;
+ if (((word >> 0) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110001xxxxxxxxx0
+ sclamp. */
+ return 2627;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110001xxxxxxxxx1
+ uclamp. */
+ return 2790;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx110x10xxxxxxxxx0
- fclamp. */
- return 2467;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xxxx110101xxxx0xxxxx
+ sqrshr. */
+ return 2697;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xxxx110101xxxx0xxxxx
+ sqrshru. */
+ return 2700;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110101xxxx1xxxxx
+ uqrshr. */
+ return 2851;
+ }
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx110x01xxxxxxxxx0
- sclamp. */
- return 2627;
+ if (((word >> 0) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110011xxxxxxxxx0
+ sclamp. */
+ return 2628;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110011xxxxxxxxx1
+ uclamp. */
+ return 2791;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx110x11xxxxxxxxx0
- sclamp. */
- return 2628;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 6) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110111xxx00xxxxx
+ sqrshrn. */
+ return 2699;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110111xxx10xxxxx
+ sqrshrun. */
+ return 2702;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110111xxxx1xxxxx
+ uqrshrn. */
+ return 2853;
+ }
}
}
}
}
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x0x0xxxxxxxxxx1
- uclamp. */
- return 2784;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x0x1xxxxxxxxxx1
- uclamp. */
- return 2785;
- }
- }
}
else
{
@@ -4270,7 +4369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2800;
+ return 2806;
}
else
{
@@ -4529,7 +4628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2802;
+ return 2808;
}
else
{
@@ -4606,7 +4705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx1
umax. */
- return 2801;
+ return 2807;
}
else
{
@@ -4614,7 +4713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx1
umax. */
- return 2803;
+ return 2809;
}
}
else
@@ -4707,7 +4806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100x10xx1xxxx0
srshl. */
- return 2697;
+ return 2703;
}
}
else
@@ -4729,7 +4828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100x00xx1xxxx1
umin. */
- return 2804;
+ return 2810;
}
else
{
@@ -4737,7 +4836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100x10xx1xxxx1
urshl. */
- return 2845;
+ return 2854;
}
}
else
@@ -4781,7 +4880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx1011100xxxxx1xxxxx
ucvtf. */
- return 2786;
+ return 2792;
}
else
{
@@ -4789,7 +4888,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx1011100xxxxx1xxxxx
ucvtf. */
- return 2787;
+ return 2793;
}
}
}
@@ -4822,7 +4921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx1111100xxxxx1xxxxx
uqcvt. */
- return 2842;
+ return 2848;
}
else
{
@@ -4832,7 +4931,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx1111100xxxx01xxxxx
uqcvt. */
- return 2843;
+ return 2849;
}
else
{
@@ -4840,7 +4939,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx1111100xxxx11xxxxx
uqcvtn. */
- return 2844;
+ return 2850;
}
}
}
@@ -4867,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x10xx1xxxx0
srshl. */
- return 2699;
+ return 2705;
}
}
else
@@ -4889,7 +4988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x00xx1xxxx1
umin. */
- return 2806;
+ return 2812;
}
else
{
@@ -4897,7 +4996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110x10xx1xxxx1
urshl. */
- return 2847;
+ return 2856;
}
}
else
@@ -4944,7 +5043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x10xx1xxxx0
srshl. */
- return 2698;
+ return 2704;
}
else
{
@@ -4952,7 +5051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x10xx1xxxx0
srshl. */
- return 2700;
+ return 2706;
}
}
}
@@ -4988,7 +5087,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x00xx1xxxx1
umin. */
- return 2805;
+ return 2811;
}
else
{
@@ -4996,7 +5095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x00xx1xxxx1
umin. */
- return 2807;
+ return 2813;
}
}
else
@@ -5007,7 +5106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101x10xx1xxxx1
urshl. */
- return 2846;
+ return 2855;
}
else
{
@@ -5015,7 +5114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111x10xx1xxxx1
urshl. */
- return 2848;
+ return 2857;
}
}
}
@@ -5065,7 +5164,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2707;
+ return 2713;
}
else
{
@@ -5073,7 +5172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2731;
+ return 2737;
}
}
else
@@ -5084,7 +5183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2723;
+ return 2729;
}
else
{
@@ -5092,7 +5191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2715;
+ return 2721;
}
}
}
@@ -5106,7 +5205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2739;
+ return 2745;
}
else
{
@@ -5114,7 +5213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2763;
+ return 2769;
}
}
else
@@ -5125,7 +5224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2755;
+ return 2761;
}
else
{
@@ -5133,7 +5232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2747;
+ return 2753;
}
}
}
@@ -5161,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2708;
+ return 2714;
}
else
{
@@ -5169,7 +5268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2765;
+ return 2771;
}
}
else
@@ -5178,7 +5277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2732;
+ return 2738;
}
}
else
@@ -5189,7 +5288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2724;
+ return 2730;
}
else
{
@@ -5197,7 +5296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2716;
+ return 2722;
}
}
}
@@ -5211,7 +5310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2740;
+ return 2746;
}
else
{
@@ -5219,7 +5318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2764;
+ return 2770;
}
}
else
@@ -5230,7 +5329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2756;
+ return 2762;
}
else
{
@@ -5238,7 +5337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2748;
+ return 2754;
}
}
}
@@ -5280,7 +5379,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2703;
+ return 2709;
}
else
{
@@ -5288,7 +5387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2704;
+ return 2710;
}
}
else
@@ -5299,7 +5398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2727;
+ return 2733;
}
else
{
@@ -5307,7 +5406,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2728;
+ return 2734;
}
}
}
@@ -5321,7 +5420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2719;
+ return 2725;
}
else
{
@@ -5329,7 +5428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2720;
+ return 2726;
}
}
else
@@ -5340,7 +5439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2711;
+ return 2717;
}
else
{
@@ -5348,7 +5447,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2712;
+ return 2718;
}
}
}
@@ -5365,7 +5464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2735;
+ return 2741;
}
else
{
@@ -5373,7 +5472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2736;
+ return 2742;
}
}
else
@@ -5384,7 +5483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2759;
+ return 2765;
}
else
{
@@ -5392,7 +5491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2760;
+ return 2766;
}
}
}
@@ -5406,7 +5505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2751;
+ return 2757;
}
else
{
@@ -5414,7 +5513,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2752;
+ return 2758;
}
}
else
@@ -5425,7 +5524,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2743;
+ return 2749;
}
else
{
@@ -5433,7 +5532,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2744;
+ return 2750;
}
}
}
@@ -7835,7 +7934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2937;
+ return 2946;
}
else
{
@@ -7843,7 +7942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2945;
+ return 2954;
}
}
else
@@ -7854,7 +7953,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2941;
+ return 2950;
}
else
{
@@ -7862,7 +7961,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2948;
+ return 2957;
}
}
}
@@ -7900,7 +7999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 2997;
+ return 3006;
}
else
{
@@ -7908,7 +8007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3003;
+ return 3012;
}
}
else
@@ -7919,7 +8018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3000;
+ return 3009;
}
else
{
@@ -7927,7 +8026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3006;
+ return 3015;
}
}
}
@@ -7941,7 +8040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3021;
+ return 3030;
}
else
{
@@ -7949,7 +8048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3027;
+ return 3036;
}
}
else
@@ -7960,7 +8059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3024;
+ return 3033;
}
else
{
@@ -7968,7 +8067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3030;
+ return 3039;
}
}
}
@@ -7985,7 +8084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3009;
+ return 3018;
}
else
{
@@ -7993,7 +8092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3015;
+ return 3024;
}
}
else
@@ -8004,7 +8103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3012;
+ return 3021;
}
else
{
@@ -8012,7 +8111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3018;
+ return 3027;
}
}
}
@@ -8026,7 +8125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3033;
+ return 3042;
}
else
{
@@ -8034,7 +8133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3039;
+ return 3048;
}
}
else
@@ -8045,7 +8144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3036;
+ return 3045;
}
else
{
@@ -8053,7 +8152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3042;
+ return 3051;
}
}
}
@@ -8118,7 +8217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2938;
+ return 2947;
}
else
{
@@ -8126,7 +8225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2946;
+ return 2955;
}
}
else
@@ -8137,7 +8236,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2942;
+ return 2951;
}
else
{
@@ -8145,7 +8244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2949;
+ return 2958;
}
}
}
@@ -8183,7 +8282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 2998;
+ return 3007;
}
else
{
@@ -8191,7 +8290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3004;
+ return 3013;
}
}
else
@@ -8202,7 +8301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3001;
+ return 3010;
}
else
{
@@ -8210,7 +8309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3007;
+ return 3016;
}
}
}
@@ -8224,7 +8323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3022;
+ return 3031;
}
else
{
@@ -8232,7 +8331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3028;
+ return 3037;
}
}
else
@@ -8243,7 +8342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3025;
+ return 3034;
}
else
{
@@ -8251,7 +8350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3031;
+ return 3040;
}
}
}
@@ -8268,7 +8367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3010;
+ return 3019;
}
else
{
@@ -8276,7 +8375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3016;
+ return 3025;
}
}
else
@@ -8287,7 +8386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3013;
+ return 3022;
}
else
{
@@ -8295,7 +8394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3019;
+ return 3028;
}
}
}
@@ -8309,7 +8408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3034;
+ return 3043;
}
else
{
@@ -8317,7 +8416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3040;
+ return 3049;
}
}
else
@@ -8328,7 +8427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3037;
+ return 3046;
}
else
{
@@ -8336,7 +8435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3043;
+ return 3052;
}
}
}
@@ -8404,7 +8503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2940;
+ return 2949;
}
else
{
@@ -8412,7 +8511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2947;
+ return 2956;
}
}
else
@@ -8421,7 +8520,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2944;
+ return 2953;
}
}
else
@@ -8432,7 +8531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2939;
+ return 2948;
}
else
{
@@ -8440,7 +8539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2943;
+ return 2952;
}
}
}
@@ -8502,7 +8601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 2999;
+ return 3008;
}
else
{
@@ -8510,7 +8609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3093;
+ return 3102;
}
}
else
@@ -8521,7 +8620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3005;
+ return 3014;
}
else
{
@@ -8529,7 +8628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3095;
+ return 3104;
}
}
}
@@ -8543,7 +8642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3002;
+ return 3011;
}
else
{
@@ -8551,7 +8650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3094;
+ return 3103;
}
}
else
@@ -8560,7 +8659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3008;
+ return 3017;
}
}
}
@@ -8576,7 +8675,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3023;
+ return 3032;
}
else
{
@@ -8584,7 +8683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3099;
+ return 3108;
}
}
else
@@ -8595,7 +8694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3029;
+ return 3038;
}
else
{
@@ -8603,7 +8702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3101;
+ return 3110;
}
}
}
@@ -8617,7 +8716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3026;
+ return 3035;
}
else
{
@@ -8625,7 +8724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3100;
+ return 3109;
}
}
else
@@ -8634,7 +8733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3032;
+ return 3041;
}
}
}
@@ -8653,7 +8752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3011;
+ return 3020;
}
else
{
@@ -8661,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3096;
+ return 3105;
}
}
else
@@ -8672,7 +8771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3017;
+ return 3026;
}
else
{
@@ -8680,7 +8779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3098;
+ return 3107;
}
}
}
@@ -8694,7 +8793,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3014;
+ return 3023;
}
else
{
@@ -8702,7 +8801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3097;
+ return 3106;
}
}
else
@@ -8711,7 +8810,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3020;
+ return 3029;
}
}
}
@@ -8727,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3035;
+ return 3044;
}
else
{
@@ -8735,7 +8834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3102;
+ return 3111;
}
}
else
@@ -8746,7 +8845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3041;
+ return 3050;
}
else
{
@@ -8754,7 +8853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3104;
+ return 3113;
}
}
}
@@ -8768,7 +8867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3038;
+ return 3047;
}
else
{
@@ -8776,7 +8875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3103;
+ return 3112;
}
}
else
@@ -8785,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3044;
+ return 3053;
}
}
}
@@ -9158,7 +9257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3122;
+ return 3131;
}
else
{
@@ -9176,7 +9275,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3125;
+ return 3134;
}
}
}
@@ -9256,7 +9355,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2935;
+ return 2944;
}
else
{
@@ -9264,7 +9363,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2936;
+ return 2945;
}
}
else
@@ -9371,7 +9470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3127;
+ return 3136;
}
}
}
@@ -9387,7 +9486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3124;
+ return 3133;
}
else
{
@@ -9432,7 +9531,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2934;
+ return 2943;
}
else
{
@@ -9526,7 +9625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3126;
+ return 3135;
}
}
}
@@ -9656,7 +9755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3128;
+ return 3137;
}
}
}
@@ -9672,7 +9771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3123;
+ return 3132;
}
else
{
@@ -10514,7 +10613,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2954;
+ return 2963;
}
}
}
@@ -10588,7 +10687,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2955;
+ return 2964;
}
}
}
@@ -13262,7 +13361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2953;
+ return 2962;
}
}
}
@@ -14966,7 +15065,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2982;
+ return 2991;
}
}
else
@@ -15209,7 +15308,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2958;
+ return 2967;
}
else
{
@@ -15217,7 +15316,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2959;
+ return 2968;
}
}
else
@@ -15449,7 +15548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2979;
+ return 2988;
}
else
{
@@ -15470,7 +15569,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2986;
+ return 2995;
}
else
{
@@ -15478,7 +15577,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2985;
+ return 2994;
}
}
else
@@ -15533,7 +15632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2978;
+ return 2987;
}
else
{
@@ -15545,7 +15644,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2984;
+ return 2993;
}
else
{
@@ -15553,7 +15652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2983;
+ return 2992;
}
}
else
@@ -15604,7 +15703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2962;
+ return 2971;
}
else
{
@@ -15612,7 +15711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2963;
+ return 2972;
}
}
else
@@ -15971,7 +16070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2956;
+ return 2965;
}
else
{
@@ -16004,7 +16103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2980;
+ return 2989;
}
else
{
@@ -16034,7 +16133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2957;
+ return 2966;
}
else
{
@@ -16163,7 +16262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2966;
+ return 2975;
}
else
{
@@ -16173,7 +16272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2968;
+ return 2977;
}
else
{
@@ -16181,7 +16280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2970;
+ return 2979;
}
}
}
@@ -16193,7 +16292,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2967;
+ return 2976;
}
else
{
@@ -16203,7 +16302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2969;
+ return 2978;
}
else
{
@@ -16211,7 +16310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2971;
+ return 2980;
}
}
}
@@ -17270,7 +17369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2950;
+ return 2959;
}
else
{
@@ -17278,7 +17377,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2952;
+ return 2961;
}
}
else
@@ -17287,7 +17386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2951;
+ return 2960;
}
}
}
@@ -18783,7 +18882,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2960;
+ return 2969;
}
else
{
@@ -18791,7 +18890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2961;
+ return 2970;
}
}
}
@@ -19165,7 +19264,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2964;
+ return 2973;
}
else
{
@@ -19173,7 +19272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2965;
+ return 2974;
}
}
}
@@ -19534,7 +19633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2866;
+ return 2875;
}
else
{
@@ -19542,7 +19641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2867;
+ return 2876;
}
}
else
@@ -19586,7 +19685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2869;
+ return 2878;
}
else
{
@@ -19594,7 +19693,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2868;
+ return 2877;
}
}
else
@@ -19641,7 +19740,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2873;
+ return 2882;
}
else
{
@@ -19649,7 +19748,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2870;
+ return 2879;
}
}
else
@@ -19693,7 +19792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2871;
+ return 2880;
}
else
{
@@ -19701,7 +19800,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2872;
+ return 2881;
}
}
else
@@ -20827,7 +20926,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2981;
+ return 2990;
}
}
else
@@ -22188,7 +22287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3117;
+ return 3126;
}
else
{
@@ -22768,7 +22867,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3045;
+ return 3054;
}
else
{
@@ -22776,7 +22875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3047;
+ return 3056;
}
}
else
@@ -22787,7 +22886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3051;
+ return 3060;
}
else
{
@@ -22795,7 +22894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3053;
+ return 3062;
}
}
}
@@ -22809,7 +22908,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3048;
+ return 3057;
}
else
{
@@ -22817,7 +22916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3050;
+ return 3059;
}
}
else
@@ -22828,7 +22927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3054;
+ return 3063;
}
else
{
@@ -22836,7 +22935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3056;
+ return 3065;
}
}
}
@@ -22853,7 +22952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3069;
+ return 3078;
}
else
{
@@ -22861,7 +22960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3071;
+ return 3080;
}
}
else
@@ -22872,7 +22971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3075;
+ return 3084;
}
else
{
@@ -22880,7 +22979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3077;
+ return 3086;
}
}
}
@@ -22894,7 +22993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3072;
+ return 3081;
}
else
{
@@ -22902,7 +23001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3074;
+ return 3083;
}
}
else
@@ -22913,7 +23012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3078;
+ return 3087;
}
else
{
@@ -22921,7 +23020,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3080;
+ return 3089;
}
}
}
@@ -22941,7 +23040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3057;
+ return 3066;
}
else
{
@@ -22949,7 +23048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3059;
+ return 3068;
}
}
else
@@ -22960,7 +23059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3063;
+ return 3072;
}
else
{
@@ -22968,7 +23067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3065;
+ return 3074;
}
}
}
@@ -22982,7 +23081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3060;
+ return 3069;
}
else
{
@@ -22990,7 +23089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3062;
+ return 3071;
}
}
else
@@ -23001,7 +23100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3066;
+ return 3075;
}
else
{
@@ -23009,7 +23108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3068;
+ return 3077;
}
}
}
@@ -23026,7 +23125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3081;
+ return 3090;
}
else
{
@@ -23034,7 +23133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3083;
+ return 3092;
}
}
else
@@ -23045,7 +23144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3087;
+ return 3096;
}
else
{
@@ -23053,7 +23152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3089;
+ return 3098;
}
}
}
@@ -23067,7 +23166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3084;
+ return 3093;
}
else
{
@@ -23075,7 +23174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3086;
+ return 3095;
}
}
else
@@ -23086,7 +23185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3090;
+ return 3099;
}
else
{
@@ -23094,7 +23193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3092;
+ return 3101;
}
}
}
@@ -23128,7 +23227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3046;
+ return 3055;
}
else
{
@@ -23136,7 +23235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3105;
+ return 3114;
}
}
else
@@ -23147,7 +23246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3052;
+ return 3061;
}
else
{
@@ -23155,7 +23254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3107;
+ return 3116;
}
}
}
@@ -23169,7 +23268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3049;
+ return 3058;
}
else
{
@@ -23177,7 +23276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3106;
+ return 3115;
}
}
else
@@ -23186,7 +23285,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3055;
+ return 3064;
}
}
}
@@ -23202,7 +23301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3070;
+ return 3079;
}
else
{
@@ -23210,7 +23309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3111;
+ return 3120;
}
}
else
@@ -23221,7 +23320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3076;
+ return 3085;
}
else
{
@@ -23229,7 +23328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3113;
+ return 3122;
}
}
}
@@ -23243,7 +23342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3073;
+ return 3082;
}
else
{
@@ -23251,7 +23350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3112;
+ return 3121;
}
}
else
@@ -23260,7 +23359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3079;
+ return 3088;
}
}
}
@@ -23279,7 +23378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3058;
+ return 3067;
}
else
{
@@ -23287,7 +23386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3108;
+ return 3117;
}
}
else
@@ -23298,7 +23397,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3064;
+ return 3073;
}
else
{
@@ -23306,7 +23405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3110;
+ return 3119;
}
}
}
@@ -23320,7 +23419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3061;
+ return 3070;
}
else
{
@@ -23328,7 +23427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3109;
+ return 3118;
}
}
else
@@ -23337,7 +23436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3067;
+ return 3076;
}
}
}
@@ -23353,7 +23452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3082;
+ return 3091;
}
else
{
@@ -23361,7 +23460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3114;
+ return 3123;
}
}
else
@@ -23372,7 +23471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3088;
+ return 3097;
}
else
{
@@ -23380,7 +23479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3116;
+ return 3125;
}
}
}
@@ -23394,7 +23493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3085;
+ return 3094;
}
else
{
@@ -23402,7 +23501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3115;
+ return 3124;
}
}
else
@@ -23411,7 +23510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3091;
+ return 3100;
}
}
}
@@ -23578,7 +23677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2972;
+ return 2981;
}
}
}
@@ -23611,7 +23710,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2898;
+ return 2907;
}
}
else
@@ -23685,7 +23784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2974;
+ return 2983;
}
}
}
@@ -23718,7 +23817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2975;
+ return 2984;
}
}
else
@@ -23765,7 +23864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2905;
+ return 2914;
}
else
{
@@ -23773,7 +23872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2907;
+ return 2916;
}
}
else
@@ -23784,7 +23883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2909;
+ return 2918;
}
else
{
@@ -23798,7 +23897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2910;
+ return 2919;
}
else
{
@@ -23806,7 +23905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2903;
+ return 2912;
}
}
else
@@ -23815,7 +23914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2912;
+ return 2921;
}
}
else
@@ -23828,7 +23927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2911;
+ return 2920;
}
else
{
@@ -23836,7 +23935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2916;
+ return 2925;
}
}
else
@@ -23845,7 +23944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2913;
+ return 2922;
}
}
}
@@ -24026,7 +24125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2897;
+ return 2906;
}
}
else
@@ -24057,7 +24156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2973;
+ return 2982;
}
else
{
@@ -24076,7 +24175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2989;
+ return 2998;
}
else
{
@@ -24086,7 +24185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2987;
+ return 2996;
}
else
{
@@ -24096,7 +24195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2994;
+ return 3003;
}
else
{
@@ -24104,7 +24203,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2993;
+ return 3002;
}
}
}
@@ -24688,7 +24787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2990;
+ return 2999;
}
else
{
@@ -24696,7 +24795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2991;
+ return 3000;
}
}
}
@@ -25014,7 +25113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2908;
+ return 2917;
}
}
else
@@ -25625,7 +25724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2901;
+ return 2910;
}
}
}
@@ -25677,7 +25776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2914;
+ return 2923;
}
}
}
@@ -25920,7 +26019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2904;
+ return 2913;
}
}
else
@@ -25996,7 +26095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2917;
+ return 2926;
}
}
else
@@ -26822,7 +26921,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2902;
+ return 2911;
}
}
else
@@ -26854,7 +26953,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2915;
+ return 2924;
}
}
else
@@ -27094,7 +27193,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2906;
+ return 2915;
}
}
else
@@ -27126,7 +27225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2920;
+ return 2929;
}
else
{
@@ -27134,7 +27233,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2924;
+ return 2933;
}
}
}
@@ -27156,7 +27255,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2921;
+ return 2930;
}
else
{
@@ -27164,7 +27263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2925;
+ return 2934;
}
}
}
@@ -27203,7 +27302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2918;
+ return 2927;
}
else
{
@@ -27211,7 +27310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2922;
+ return 2931;
}
}
else
@@ -27233,7 +27332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2919;
+ return 2928;
}
else
{
@@ -27241,7 +27340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2923;
+ return 2932;
}
}
else
@@ -29049,7 +29148,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2926;
+ return 2935;
}
else
{
@@ -29057,7 +29156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2930;
+ return 2939;
}
}
else
@@ -29079,7 +29178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2927;
+ return 2936;
}
else
{
@@ -29087,7 +29186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2931;
+ return 2940;
}
}
else
@@ -29593,7 +29692,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2928;
+ return 2937;
}
else
{
@@ -29601,7 +29700,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2932;
+ return 2941;
}
}
}
@@ -29623,7 +29722,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2929;
+ return 2938;
}
else
{
@@ -29631,7 +29730,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2933;
+ return 2942;
}
}
}
@@ -29687,7 +29786,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2900;
+ return 2909;
}
else
{
@@ -29695,7 +29794,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2899;
+ return 2908;
}
}
}
@@ -29798,7 +29897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2977;
+ return 2986;
}
else
{
@@ -29806,7 +29905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2976;
+ return 2985;
}
}
else
@@ -29817,7 +29916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2988;
+ return 2997;
}
else
{
@@ -29827,7 +29926,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2996;
+ return 3005;
}
else
{
@@ -29835,7 +29934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2995;
+ return 3004;
}
}
}
@@ -30363,11 +30462,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3118; break; /* addg --> smax. */
- case 3118: value = 3119; break; /* smax --> umax. */
- case 3119: value = 3120; break; /* umax --> smin. */
- case 3120: value = 3121; break; /* smin --> umin. */
- case 3121: return NULL; /* umin --> NULL. */
+ case 19: value = 3127; break; /* addg --> smax. */
+ case 3127: value = 3128; break; /* smax --> umax. */
+ case 3128: value = 3129; break; /* umax --> smin. */
+ case 3129: value = 3130; break; /* smin --> umin. */
+ case 3130: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30525,8 +30624,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2992; break; /* fcvt --> bfcvt. */
- case 2992: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3001; break; /* fcvt --> bfcvt. */
+ case 3001: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -31055,7 +31154,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 268:
+ case 270:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -31102,12 +31201,12 @@ aarch64_extract_operand (const aarch64_operand *self,
case 193:
case 194:
case 237:
- case 262:
- case 263:
+ case 264:
case 265:
case 267:
- case 272:
- case 273:
+ case 269:
+ case 274:
+ case 275:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -31178,8 +31277,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
- case 264:
case 266:
+ case 268:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
@@ -31259,6 +31358,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 184:
case 185:
case 186:
+ case 250:
return aarch64_ext_sve_shrimm (self, info, code, inst, errors);
case 204:
case 205:
@@ -31292,8 +31392,6 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
case 235:
case 236:
- case 249:
- case 250:
case 251:
case 252:
case 253:
@@ -31305,6 +31403,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 259:
case 260:
case 261:
+ case 262:
+ case 263:
return aarch64_ext_simple_index (self, info, code, inst, errors);
case 239:
case 240:
@@ -31320,9 +31420,11 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 248:
return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
- case 269:
- case 270:
+ case 249:
+ return aarch64_ext_plain_shrimm (self, info, code, inst, errors);
case 271:
+ case 272:
+ case 273:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index fd13c924804..019ee8b0b81 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -2157,6 +2157,19 @@ aarch64_ext_simple_index (const aarch64_operand *self, aarch64_opnd_info *info,
info->reglane.index = extract_all_fields_after (self, 1, code);
return true;
}
+
+/* Decode a plain shift-right immediate, when there is only a single
+ element size. */
+bool
+aarch64_ext_plain_shrimm (const aarch64_operand *self, aarch64_opnd_info *info,
+ const aarch64_insn code,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED,
+ aarch64_operand_error *errors ATTRIBUTE_UNUSED)
+{
+ unsigned int base = 1 << get_operand_field_width (self, 0);
+ info->imm.value = base - extract_field (self->fields[0], code, 0);
+ return true;
+}
\f
/* Bitfields that are commonly used to encode certain operands' information
may be partially used as part of the base opcode in some instructions.
@@ -3078,6 +3091,10 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
}
break;
+ case sme_shift:
+ i = extract_field (FLD_SVE_tszh, inst->value, 0);
+ goto sve_shift;
+
case sme_size_12_bhs:
variant = extract_field (FLD_SME_size_12, inst->value, 0);
if (variant >= 3)
diff --git a/opcodes/aarch64-dis.h b/opcodes/aarch64-dis.h
index 6e6c00b1de2..3be382fe5fd 100644
--- a/opcodes/aarch64-dis.h
+++ b/opcodes/aarch64-dis.h
@@ -135,6 +135,7 @@ AARCH64_DECL_OPD_EXTRACTOR (ext_imm_rotate1);
AARCH64_DECL_OPD_EXTRACTOR (ext_imm_rotate2);
AARCH64_DECL_OPD_EXTRACTOR (ext_x0_to_x30);
AARCH64_DECL_OPD_EXTRACTOR (ext_simple_index);
+AARCH64_DECL_OPD_EXTRACTOR (ext_plain_shrimm);
#undef AARCH64_DECL_OPD_EXTRACTOR
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index a2ef94536ff..ae707ef82c9 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -273,6 +273,8 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"},
{AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_PnT_Wm_imm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl}, "Source scalable predicate register with index "},
+ {AARCH64_OPND_CLASS_IMMEDIATE, "SME_SHRIMM4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_imm4}, "a shift-right immediate operand"},
+ {AARCH64_OPND_CLASS_IMMEDIATE, "SME_SHRIMM5", 1 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_tszh,FLD_SVE_imm5b}, "a shift-right immediate operand"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm2_10}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_Zm_INDEX3_1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zm, FLD_imm1_10, FLD_imm2_1}, "an indexed SVE vector register"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 0418a21b295..810548a93bd 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -2924,6 +2924,16 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
}
break;
+ case AARCH64_OPND_SME_SHRIMM4:
+ size = 1 << get_operand_fields_width (get_operand_from_code (type));
+ if (!value_in_range_p (opnd->imm.value, 1, size))
+ {
+ set_imm_out_of_range_error (mismatch_detail, idx, 1, size);
+ return 0;
+ }
+ break;
+
+ case AARCH64_OPND_SME_SHRIMM5:
case AARCH64_OPND_SVE_SHRIMM_PRED:
case AARCH64_OPND_SVE_SHRIMM_UNPRED:
case AARCH64_OPND_SVE_SHRIMM_UNPRED_22:
@@ -4103,6 +4113,8 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_FBITS:
case AARCH64_OPND_TME_UIMM16:
case AARCH64_OPND_SIMM5:
+ case AARCH64_OPND_SME_SHRIMM4:
+ case AARCH64_OPND_SME_SHRIMM5:
case AARCH64_OPND_SVE_SHLIMM_PRED:
case AARCH64_OPND_SVE_SHLIMM_UNPRED:
case AARCH64_OPND_SVE_SHLIMM_UNPRED_22:
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index b0c5bb54ae4..a6f5747c417 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1628,6 +1628,10 @@
{ \
QLF2(S_H,S_S), \
}
+#define OP_SVE_HSU \
+{ \
+ QLF3(S_H,S_S,NIL), \
+}
#define OP_SVE_HU \
{ \
QLF2(S_H,NIL), \
@@ -1854,6 +1858,11 @@
QLF3(S_S,P_M,S_H), \
QLF3(S_D,P_M,S_S), \
}
+#define OP_SVE_VVU_BH_SD \
+{ \
+ QLF3(S_B,S_S,NIL), \
+ QLF3(S_H,S_D,NIL), \
+}
#define OP_SVE_VVU_HSD_BHS \
{ \
QLF3(S_H,S_B,NIL), \
@@ -5623,6 +5632,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("sqdmulh", 0xc120ac00, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120b400, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("sqdmulh", 0xc120bc00, 0xff23ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zmx4), OP_SVE_VVV_BHSD, 0, 1),
+ SME2_INSN ("sqrshr", 0xc1e0d400, 0xfff0fc20, sme_misc, 0, OP3 (SVE_Zd, SME_Znx2, SME_SHRIMM4), OP_SVE_HSU, 0, 0),
+ SME2_INSN ("sqrshr", 0xc120d800, 0xff20fc60, sme_shift, 0, OP3 (SVE_Zd, SME_Znx4, SME_SHRIMM5), OP_SVE_VVU_BH_SD, 0, 0),
+ SME2_INSN ("sqrshrn", 0xc120dc00, 0xff20fc60, sme_shift, 0, OP3 (SVE_Zd, SME_Znx4, SME_SHRIMM5), OP_SVE_VVU_BH_SD, 0, 0),
+ SME2_INSN ("sqrshru", 0xc1f0d400, 0xfff0fc20, sme_misc, 0, OP3 (SVE_Zd, SME_Znx2, SME_SHRIMM4), OP_SVE_HSU, 0, 0),
+ SME2_INSN ("sqrshru", 0xc120d840, 0xff20fc60, sme_shift, 0, OP3 (SVE_Zd, SME_Znx4, SME_SHRIMM5), OP_SVE_VVU_BH_SD, 0, 0),
+ SME2_INSN ("sqrshrun", 0xc120dc40, 0xff20fc60, sme_shift, 0, OP3 (SVE_Zd, SME_Znx4, SME_SHRIMM5), OP_SVE_VVU_BH_SD, 0, 0),
SME2_INSN ("srshl", 0xc120a220, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("srshl", 0xc120aa20, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("srshl", 0xc120b220, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -5771,6 +5786,9 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("uqcvt", 0xc123e020, 0xfffffc20, sme_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
SME2_INSN ("uqcvt", 0xc133e020, 0xff7ffc60, sme_sz_23, 0, OP2 (SVE_Zd, SME_Znx4), OP_SVE_VV_BH_SD, 0, 0),
SME2_INSN ("uqcvtn", 0xc133e060, 0xff7ffc60, sme_sz_23, 0, OP2 (SVE_Zd, SME_Znx4), OP_SVE_VV_BH_SD, 0, 0),
+ SME2_INSN ("uqrshr", 0xc1e0d420, 0xfff0fc20, sme_misc, 0, OP3 (SVE_Zd, SME_Znx2, SME_SHRIMM4), OP_SVE_HSU, 0, 0),
+ SME2_INSN ("uqrshr", 0xc120d820, 0xff20fc60, sme_shift, 0, OP3 (SVE_Zd, SME_Znx4, SME_SHRIMM5), OP_SVE_VVU_BH_SD, 0, 0),
+ SME2_INSN ("uqrshrn", 0xc120dc20, 0xff20fc60, sme_shift, 0, OP3 (SVE_Zd, SME_Znx4, SME_SHRIMM5), OP_SVE_VVU_BH_SD, 0, 0),
SME2_INSN ("urshl", 0xc120a221, 0xff30ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120aa21, 0xff30ffe3, sme_size_22, 0, OP3 (SME_Zdnx4, SME_Zdnx4, SME_Zm), OP_SVE_VVV_BHSD, 0, 1),
SME2_INSN ("urshl", 0xc120b221, 0xff21ffe1, sme_size_22, 0, OP3 (SME_Zdnx2, SME_Zdnx2, SME_Zmx2), OP_SVE_VVV_BHSD, 0, 1),
@@ -6547,6 +6565,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(SVE_REG, sme_pred_reg_with_index, "SME_PnT_Wm_imm", 0, \
F(FLD_SME_Rm,FLD_SVE_Pn,FLD_SME_i1,FLD_SME_tszh,FLD_SME_tszl), \
"Source scalable predicate register with index ") \
+ Y(IMMEDIATE, plain_shrimm, "SME_SHRIMM4", 0, F(FLD_SVE_imm4), \
+ "a shift-right immediate operand") \
+ Y(IMMEDIATE, sve_shrimm, "SME_SHRIMM5", 1 << OPD_F_OD_LSB, \
+ F(FLD_SVE_tszh,FLD_SVE_imm5b), "a shift-right immediate operand") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX1", 0, \
F(FLD_SME_Zm, FLD_imm1_10), "an indexed SVE vector register") \
Y(SVE_REG, simple_index, "SME_Zm_INDEX2", 0, \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 24/31] aarch64: Add the SME2 UNPK instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (22 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 23/31] aarch64: Add the SME2 shift instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 25/31] aarch64: Add the SME2 UZP and ZIP instructions Richard Sandiford
` (8 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds SUNPK and UUNPK, which unpack one register's
worth of elements to two registers' worth, or two registers'
worth to four registers' worth.
---
gas/testsuite/gas/aarch64/sme2-29-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-29-invalid.l | 39 +
gas/testsuite/gas/aarch64/sme2-29-invalid.s | 14 +
gas/testsuite/gas/aarch64/sme2-29-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-29-noarch.l | 37 +
gas/testsuite/gas/aarch64/sme2-29.d | 45 +
gas/testsuite/gas/aarch64/sme2-29.s | 47 +
opcodes/aarch64-dis-2.c | 1462 ++++++++++---------
opcodes/aarch64-tbl.h | 4 +
9 files changed, 945 insertions(+), 709 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-29-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-29-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-29-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-29-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-29-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-29.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-29.s
diff --git a/gas/testsuite/gas/aarch64/sme2-29-invalid.d b/gas/testsuite/gas/aarch64/sme2-29-invalid.d
new file mode 100644
index 00000000000..ad85e2d6ffa
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-29-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-29-invalid.s
+#error_output: sme2-29-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-29-invalid.l b/gas/testsuite/gas/aarch64/sme2-29-invalid.l
new file mode 100644
index 00000000000..893866c114f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-29-invalid.l
@@ -0,0 +1,39 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `sunpk 0,z0\.b'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sunpk {z0\.h,z1\.h},0'
+[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `sunpk z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.b,z1\.b},z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sunpk {z0\.h-z1\.h}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sunpk {z0\.s-z1\.s}, z0\.h
+[^ :]+:[0-9]+: Info: sunpk {z0\.d-z1\.d}, z0\.s
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.h,z1\.h},z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sunpk {z0\.h-z1\.h}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sunpk {z0\.s-z1\.s}, z0\.h
+[^ :]+:[0-9]+: Info: sunpk {z0\.d-z1\.d}, z0\.s
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sunpk {z1\.h,z2\.h},z0\.b'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.b,z2\.b},z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sunpk {z0\.h, z2\.h}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sunpk {z0\.s, z2\.s}, z0\.h
+[^ :]+:[0-9]+: Info: sunpk {z0\.d, z2\.d}, z0\.s
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z1\.h-z3\.h},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z2\.h-z4\.h},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z3\.h-z5\.h},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.s-z3\.s},z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sunpk {z0\.h-z3\.h}, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sunpk {z0\.s-z3\.s}, z0\.h
+[^ :]+:[0-9]+: Info: sunpk {z0\.d-z3\.d}, z0\.s
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sunpk {z0\.s-z3\.s},{x0\.s-x1\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sunpk {z0\.s-z3\.s}, {z0\.h-z3\.h}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sunpk {z0\.h-z3\.h}, {z0\.b-z3\.b}
+[^ :]+:[0-9]+: Info: sunpk {z0\.d-z3\.d}, {z0\.s-z3\.s}
diff --git a/gas/testsuite/gas/aarch64/sme2-29-invalid.s b/gas/testsuite/gas/aarch64/sme2-29-invalid.s
new file mode 100644
index 00000000000..2282dd214f4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-29-invalid.s
@@ -0,0 +1,14 @@
+ sunpk 0, z0.b
+ sunpk { z0.h, z1.h }, 0
+
+ sunpk z0.b, z0.b
+ sunpk { z0.b, z1.b }, z0.b
+ sunpk { z0.h, z1.h }, z0.h
+ sunpk { z1.h, z2.h }, z0.b
+ sunpk { z0.b, z2.b }, z0.b
+ sunpk { z1.h - z3.h }, { z0.b - z1.b }
+ sunpk { z2.h - z4.h }, { z0.b - z1.b }
+ sunpk { z3.h - z5.h }, { z0.b - z1.b }
+ sunpk { z0.s - z3.s }, z0.b
+ sunpk { z0.s - z3.s }, { x0.s - x1.s }
+ sunpk { z0.s - z3.s }, { z0.s - z3.s }
diff --git a/gas/testsuite/gas/aarch64/sme2-29-noarch.d b/gas/testsuite/gas/aarch64/sme2-29-noarch.d
new file mode 100644
index 00000000000..73c02c50997
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-29-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-29.s
+#error_output: sme2-29-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-29-noarch.l b/gas/testsuite/gas/aarch64/sme2-29-noarch.l
new file mode 100644
index 00000000000..2777e1672b3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-29-noarch.l
@@ -0,0 +1,37 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h,z1\.h},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.h,z31\.h},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h,z1\.h},z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h-z3\.h},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.h-z31\.h},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h-z3\.h},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s,z1\.s},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.s,z31\.s},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s,z1\.s},z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s-z3\.s},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.s-z31\.s},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s-z3\.s},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d,z1\.d},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.d,z31\.d},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d,z1\.d},z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d-z3\.d},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.d-z31\.d},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d-z3\.d},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h,z1\.h},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.h,z31\.h},z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h,z1\.h},z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h-z3\.h},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.h-z31\.h},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h-z3\.h},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s,z1\.s},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.s,z31\.s},z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s,z1\.s},z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s-z3\.s},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.s-z31\.s},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s-z3\.s},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d,z1\.d},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.d,z31\.d},z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d,z1\.d},z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d-z3\.d},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.d-z31\.d},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d-z3\.d},{z30\.s-z31\.s}'
diff --git a/gas/testsuite/gas/aarch64/sme2-29.d b/gas/testsuite/gas/aarch64/sme2-29.d
new file mode 100644
index 00000000000..235b0554b8f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-29.d
@@ -0,0 +1,45 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c165e000 sunpk {z0\.h-z1\.h}, z0\.b
+[^:]+: c165e01e sunpk {z30\.h-z31\.h}, z0\.b
+[^:]+: c165e3e0 sunpk {z0\.h-z1\.h}, z31\.b
+[^:]+: c175e000 sunpk {z0\.h-z3\.h}, {z0\.b-z1\.b}
+[^:]+: c175e01c sunpk {z28\.h-z31\.h}, {z0\.b-z1\.b}
+[^:]+: c175e3c0 sunpk {z0\.h-z3\.h}, {z30\.b-z31\.b}
+[^:]+: c1a5e000 sunpk {z0\.s-z1\.s}, z0\.h
+[^:]+: c1a5e01e sunpk {z30\.s-z31\.s}, z0\.h
+[^:]+: c1a5e3e0 sunpk {z0\.s-z1\.s}, z31\.h
+[^:]+: c1b5e000 sunpk {z0\.s-z3\.s}, {z0\.h-z1\.h}
+[^:]+: c1b5e01c sunpk {z28\.s-z31\.s}, {z0\.h-z1\.h}
+[^:]+: c1b5e3c0 sunpk {z0\.s-z3\.s}, {z30\.h-z31\.h}
+[^:]+: c1e5e000 sunpk {z0\.d-z1\.d}, z0\.s
+[^:]+: c1e5e01e sunpk {z30\.d-z31\.d}, z0\.s
+[^:]+: c1e5e3e0 sunpk {z0\.d-z1\.d}, z31\.s
+[^:]+: c1f5e000 sunpk {z0\.d-z3\.d}, {z0\.s-z1\.s}
+[^:]+: c1f5e01c sunpk {z28\.d-z31\.d}, {z0\.s-z1\.s}
+[^:]+: c1f5e3c0 sunpk {z0\.d-z3\.d}, {z30\.s-z31\.s}
+[^:]+: c165e001 uunpk {z0\.h-z1\.h}, z0\.b
+[^:]+: c165e01f uunpk {z30\.h-z31\.h}, z0\.b
+[^:]+: c165e3e1 uunpk {z0\.h-z1\.h}, z31\.b
+[^:]+: c175e001 uunpk {z0\.h-z3\.h}, {z0\.b-z1\.b}
+[^:]+: c175e01d uunpk {z28\.h-z31\.h}, {z0\.b-z1\.b}
+[^:]+: c175e3c1 uunpk {z0\.h-z3\.h}, {z30\.b-z31\.b}
+[^:]+: c1a5e001 uunpk {z0\.s-z1\.s}, z0\.h
+[^:]+: c1a5e01f uunpk {z30\.s-z31\.s}, z0\.h
+[^:]+: c1a5e3e1 uunpk {z0\.s-z1\.s}, z31\.h
+[^:]+: c1b5e001 uunpk {z0\.s-z3\.s}, {z0\.h-z1\.h}
+[^:]+: c1b5e01d uunpk {z28\.s-z31\.s}, {z0\.h-z1\.h}
+[^:]+: c1b5e3c1 uunpk {z0\.s-z3\.s}, {z30\.h-z31\.h}
+[^:]+: c1e5e001 uunpk {z0\.d-z1\.d}, z0\.s
+[^:]+: c1e5e01f uunpk {z30\.d-z31\.d}, z0\.s
+[^:]+: c1e5e3e1 uunpk {z0\.d-z1\.d}, z31\.s
+[^:]+: c1f5e001 uunpk {z0\.d-z3\.d}, {z0\.s-z1\.s}
+[^:]+: c1f5e01d uunpk {z28\.d-z31\.d}, {z0\.s-z1\.s}
+[^:]+: c1f5e3c1 uunpk {z0\.d-z3\.d}, {z30\.s-z31\.s}
diff --git a/gas/testsuite/gas/aarch64/sme2-29.s b/gas/testsuite/gas/aarch64/sme2-29.s
new file mode 100644
index 00000000000..1cf1a3f239b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-29.s
@@ -0,0 +1,47 @@
+ sunpk { z0.h, z1.h }, z0.b
+ sunpk { z30.h, z31.h }, z0.b
+ sunpk { z0.h, z1.h }, z31.b
+
+ sunpk { z0.h - z3.h }, { z0.b - z1.b }
+ sunpk { z28.h - z31.h }, { z0.b - z1.b }
+ sunpk { z0.h - z3.h }, { z30.b - z31.b }
+
+ sunpk { z0.s, z1.s }, z0.h
+ sunpk { z30.s, z31.s }, z0.h
+ sunpk { z0.s, z1.s }, z31.h
+
+ sunpk { z0.s - z3.s }, { z0.h - z1.h }
+ sunpk { z28.s - z31.s }, { z0.h - z1.h }
+ sunpk { z0.s - z3.s }, { z30.h - z31.h }
+
+ sunpk { z0.d, z1.d }, z0.s
+ sunpk { z30.d, z31.d }, z0.s
+ sunpk { z0.d, z1.d }, z31.s
+
+ sunpk { z0.d - z3.d }, { z0.s - z1.s }
+ sunpk { z28.d - z31.d }, { z0.s - z1.s }
+ sunpk { z0.d - z3.d }, { z30.s - z31.s }
+
+ uunpk { z0.h, z1.h }, z0.b
+ uunpk { z30.h, z31.h }, z0.b
+ uunpk { z0.h, z1.h }, z31.b
+
+ uunpk { z0.h - z3.h }, { z0.b - z1.b }
+ uunpk { z28.h - z31.h }, { z0.b - z1.b }
+ uunpk { z0.h - z3.h }, { z30.b - z31.b }
+
+ uunpk { z0.s, z1.s }, z0.h
+ uunpk { z30.s, z31.s }, z0.h
+ uunpk { z0.s, z1.s }, z31.h
+
+ uunpk { z0.s - z3.s }, { z0.h - z1.h }
+ uunpk { z28.s - z31.s }, { z0.h - z1.h }
+ uunpk { z0.s - z3.s }, { z30.h - z31.h }
+
+ uunpk { z0.d, z1.d }, z0.s
+ uunpk { z30.d, z31.d }, z0.s
+ uunpk { z0.d, z1.d }, z31.s
+
+ uunpk { z0.d - z3.d }, { z0.s - z1.s }
+ uunpk { z28.d - z31.d }, { z0.s - z1.s }
+ uunpk { z0.d - z3.d }, { z30.s - z31.s }
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index d82c37498e7..e514becb5fd 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2883;
+ return 2887;
}
}
}
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2864;
+ return 2866;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2865;
+ return 2867;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2866;
+ return 2868;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2822;
+ return 2824;
}
else
{
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2823;
+ return 2825;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2824;
+ return 2826;
}
}
else
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2838;
+ return 2840;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2839;
+ return 2841;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2840;
+ return 2842;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2886;
+ return 2890;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2887;
+ return 2891;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2888;
+ return 2892;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2895;
+ return 2899;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2896;
+ return 2900;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2897;
+ return 2901;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2889;
+ return 2893;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2890;
+ return 2894;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2891;
+ return 2895;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2846;
+ return 2848;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2898;
+ return 2902;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2899;
+ return 2903;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2900;
+ return 2904;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2847;
+ return 2849;
}
}
}
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2788;
+ return 2790;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2794;
+ return 2796;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2873;
+ return 2877;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2800;
+ return 2802;
}
}
}
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2789;
+ return 2791;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2795;
+ return 2797;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2874;
+ return 2878;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2801;
+ return 2803;
}
}
}
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2858;
+ return 2860;
}
}
else
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2872;
+ return 2874;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2859;
+ return 2861;
}
}
}
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2787;
+ return 2789;
}
else
{
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2902;
+ return 2906;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2903;
+ return 2907;
}
}
else
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2884;
+ return 2888;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2885;
+ return 2889;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2892;
+ return 2896;
}
}
else
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2904;
+ return 2908;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2905;
+ return 2909;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2814;
+ return 2816;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2815;
+ return 2817;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2816;
+ return 2818;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2893;
+ return 2897;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2894;
+ return 2898;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2901;
+ return 2905;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2830;
+ return 2832;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2831;
+ return 2833;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2832;
+ return 2834;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2868;
+ return 2870;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2869;
+ return 2871;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2870;
+ return 2872;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2871;
+ return 2873;
}
}
}
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2867;
+ return 2869;
}
}
else
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2826;
+ return 2828;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2827;
+ return 2829;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2828;
+ return 2830;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2829;
+ return 2831;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2818;
+ return 2820;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2819;
+ return 2821;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2820;
+ return 2822;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2821;
+ return 2823;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2825;
+ return 2827;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2802;
+ return 2804;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2803;
+ return 2805;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2804;
+ return 2806;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2805;
+ return 2807;
}
}
}
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2817;
+ return 2819;
}
}
else
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2860;
+ return 2862;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2861;
+ return 2863;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2862;
+ return 2864;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2863;
+ return 2865;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2842;
+ return 2844;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2843;
+ return 2845;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2844;
+ return 2846;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2845;
+ return 2847;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2834;
+ return 2836;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2835;
+ return 2837;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2836;
+ return 2838;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2837;
+ return 2839;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2841;
+ return 2843;
}
else
{
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2796;
+ return 2798;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2797;
+ return 2799;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2798;
+ return 2800;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2799;
+ return 2801;
}
}
}
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2833;
+ return 2835;
}
}
else
@@ -4205,7 +4205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxxx1xxxxx
uqrshr. */
- return 2852;
+ return 2854;
}
}
}
@@ -4230,7 +4230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx1
uclamp. */
- return 2790;
+ return 2792;
}
}
else
@@ -4260,7 +4260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110101xxxx1xxxxx
uqrshr. */
- return 2851;
+ return 2853;
}
}
}
@@ -4282,7 +4282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx1
uclamp. */
- return 2791;
+ return 2793;
}
}
else
@@ -4312,7 +4312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxxx1xxxxx
uqrshrn. */
- return 2853;
+ return 2855;
}
}
}
@@ -4321,17 +4321,17 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 5) & 0x1) == 0)
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 10) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 14) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 0) & 0x1) == 0)
{
- if (((word >> 0) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4362,6 +4362,39 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
}
else
+ {
+ if (((word >> 8) & 0x1) == 0)
+ {
+ if (((word >> 9) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100000xx1xxxx0
+ smin. */
+ return 2649;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100010xx1xxxx0
+ srshl. */
+ return 2703;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx101000x1xx1xxxx0
+ fmaxnm. */
+ return 2484;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 5) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4369,7 +4402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2806;
+ return 2808;
}
else
{
@@ -4380,10 +4413,43 @@ aarch64_opcode_lookup_1 (uint32_t word)
return 2488;
}
}
+ else
+ {
+ if (((word >> 8) & 0x1) == 0)
+ {
+ if (((word >> 9) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100000xx1xxxx1
+ umin. */
+ return 2812;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx10100010xx1xxxx1
+ urshl. */
+ return 2856;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx101000x1xx1xxxx1
+ fminnm. */
+ return 2492;
+ }
+ }
}
- else
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
if (((word >> 17) & 0x1) == 0)
{
@@ -4494,23 +4560,111 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 17) & 0x1) == 0)
{
- if (((word >> 19) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x01xxx00111000xxxx1xxxxx
+ fcvtn. */
+ return 2469;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x11xxx00111000xxxx1xxxxx
+ bfcvtn. */
+ return 2437;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xx10111000xxxx1xxxxx
+ ucvtf. */
+ return 2794;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xx10111000xxxx1xxxxx
+ ucvtf. */
+ return 2795;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 17) & 0x1) == 0)
+ {
+ if (((word >> 0) & 0x1) == 0)
+ {
+ if (((word >> 18) & 0x1) == 0)
+ {
+ if (((word >> 5) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx100x01111000xxxx0xxxxx
- fcvtzs. */
- return 2470;
+ if (((word >> 19) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx100001111000xxxx0xxxx0
+ fcvtzs. */
+ return 2470;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx110001111000xxxx0xxxx0
+ fcvtzs. */
+ return 2471;
+ }
+ }
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx101001111000xxxx0xxxx0
+ frintp. */
+ return 2530;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx111001111000xxxx0xxxx0
+ frintp. */
+ return 2531;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx110x01111000xxxx0xxxxx
- fcvtzs. */
- return 2471;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10x001111000xxxx1xxxx0
+ fcvtzu. */
+ return 2472;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11x001111000xxxx1xxxx0
+ fcvtzu. */
+ return 2473;
+ }
}
}
else
@@ -4519,21 +4673,43 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx101x01111000xxxx0xxxxx
- frintp. */
- return 2530;
+ x1000001xx10x101111000xxxxxxxxx0
+ sunpk. */
+ return 2787;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx111x01111000xxxx0xxxxx
- frintp. */
- return 2531;
+ x1000001xx11x101111000xxxxxxxxx0
+ sunpk. */
+ return 2788;
}
}
}
else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xx01111000xxxxxxxxx1
+ uunpk. */
+ return 2875;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xx01111000xxxxxxxxx1
+ uunpk. */
+ return 2876;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 5) & 0x1) == 0)
{
if (((word >> 20) & 0x1) == 0)
{
@@ -4596,12 +4772,45 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
}
}
+ else
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx10xx11111000xxxx1xxxxx
+ uqcvt. */
+ return 2850;
+ }
+ else
+ {
+ if (((word >> 6) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xx11111000xxx01xxxxx
+ uqcvt. */
+ return 2851;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx11xx11111000xxx11xxxxx
+ uqcvtn. */
+ return 2852;
+ }
+ }
+ }
}
}
}
- else
+ }
+ else
+ {
+ if (((word >> 0) & 0x1) == 0)
{
- if (((word >> 0) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
if (((word >> 8) & 0x1) == 0)
{
@@ -4624,115 +4833,82 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 8) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1100x0xx0xxxx1
- umax. */
- return 2808;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1100x1xx0xxxx1
- fmin. */
- return 2490;
- }
- }
- }
- }
- else
- {
- if (((word >> 0) & 0x1) == 0)
- {
- if (((word >> 8) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1010x0xx0xxxx0
- smax. */
- return 2646;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1110x0xx0xxxx0
- smax. */
- return 2648;
- }
- }
- else
- {
- if (((word >> 9) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x101001xx0xxxx0
- fmax. */
- return 2481;
+ x1000001xx1xxxxx1x110000xx1xxxx0
+ smin. */
+ return 2651;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x111001xx0xxxx0
- fmax. */
- return 2483;
+ x1000001xx1xxxxx1x110010xx1xxxx0
+ srshl. */
+ return 2705;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1x1011xx0xxxx0
- add. */
- return 2435;
+ x1000001xx1xxxxx1x1100x1xx1xxxx0
+ fmaxnm. */
+ return 2486;
}
}
}
else
{
- if (((word >> 8) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1010x0xx0xxxx1
+ x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2807;
+ return 2810;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1110x0xx0xxxx1
- umax. */
- return 2809;
+ x1000001xx1xxxxx1x1100x1xx0xxxx1
+ fmin. */
+ return 2490;
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1010x1xx0xxxx1
- fmin. */
- return 2489;
+ if (((word >> 9) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110000xx1xxxx1
+ umin. */
+ return 2814;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x110010xx1xxxx1
+ urshl. */
+ return 2858;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x1110x1xx0xxxx1
- fmin. */
- return 2491;
+ x1000001xx1xxxxx1x1100x1xx1xxxx1
+ fminnm. */
+ return 2494;
}
}
}
@@ -4740,299 +4916,145 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1001xxxx0xxxxx
- sqdmulh. */
- return 2693;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1101xxxx0xxxxx
- sqdmulh. */
- return 2695;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1011xxxx0xxxxx
- sqdmulh. */
- return 2694;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x1111xxxx0xxxxx
- sqdmulh. */
- return 2696;
- }
- }
- }
- }
- else
- {
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 0) & 0x1) == 0)
{
- if (((word >> 14) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- if (((word >> 0) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- if (((word >> 8) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 9) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx10100x00xx1xxxx0
- smin. */
- return 2649;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx10100x10xx1xxxx0
- srshl. */
- return 2703;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1010x0xx0xxxx0
+ smax. */
+ return 2646;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx10100xx1xx1xxxx0
- fmaxnm. */
- return 2484;
+ x1000001xx1xxxxx1x1110x0xx0xxxx0
+ smax. */
+ return 2648;
}
}
else
{
- if (((word >> 8) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx10100x00xx1xxxx1
- umin. */
- return 2810;
+ x1000001xx1xxxxx1x101001xx0xxxx0
+ fmax. */
+ return 2481;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx10100x10xx1xxxx1
- urshl. */
- return 2854;
+ x1000001xx1xxxxx1x111001xx0xxxx0
+ fmax. */
+ return 2483;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx10100xx1xx1xxxx1
- fminnm. */
- return 2492;
+ x1000001xx1xxxxx1x1x1011xx0xxxx0
+ add. */
+ return 2435;
}
}
}
else
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- if (((word >> 17) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001x01xxx0011100xxxxx1xxxxx
- fcvtn. */
- return 2469;
+ x1000001xx1xxxxx1x101000xx1xxxx0
+ smin. */
+ return 2650;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001x11xxx0011100xxxxx1xxxxx
- bfcvtn. */
- return 2437;
+ x1000001xx1xxxxx1x111000xx1xxxx0
+ smin. */
+ return 2652;
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx10xx1011100xxxxx1xxxxx
- ucvtf. */
- return 2792;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx11xx1011100xxxxx1xxxxx
- ucvtf. */
- return 2793;
- }
- }
- }
- else
- {
- if (((word >> 17) & 0x1) == 0)
- {
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx10xx0111100xxxxx1xxxxx
- fcvtzu. */
- return 2472;
+ x1000001xx1xxxxx1x101010xx1xxxx0
+ srshl. */
+ return 2704;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx11xx0111100xxxxx1xxxxx
- fcvtzu. */
- return 2473;
- }
- }
- else
- {
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx10xx1111100xxxxx1xxxxx
- uqcvt. */
- return 2848;
- }
- else
- {
- if (((word >> 6) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx11xx1111100xxxx01xxxxx
- uqcvt. */
- return 2849;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx11xx1111100xxxx11xxxxx
- uqcvtn. */
- return 2850;
- }
+ x1000001xx1xxxxx1x111010xx1xxxx0
+ srshl. */
+ return 2706;
}
}
}
- }
- }
- else
- {
- if (((word >> 0) & 0x1) == 0)
- {
- if (((word >> 8) & 0x1) == 0)
- {
- if (((word >> 9) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x110x00xx1xxxx0
- smin. */
- return 2651;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x110x10xx1xxxx0
- srshl. */
- return 2705;
- }
- }
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x110xx1xx1xxxx0
- fmaxnm. */
- return 2486;
- }
- }
- else
- {
- if (((word >> 8) & 0x1) == 0)
- {
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x110x00xx1xxxx1
- umin. */
- return 2812;
+ x1000001xx1xxxxx1x1010x1xx1xxxx0
+ fmaxnm. */
+ return 2485;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x110x10xx1xxxx1
- urshl. */
- return 2856;
+ x1000001xx1xxxxx1x1110x1xx1xxxx0
+ fmaxnm. */
+ return 2487;
}
}
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x110xx1xx1xxxx1
- fminnm. */
- return 2494;
- }
}
}
- }
- else
- {
- if (((word >> 0) & 0x1) == 0)
+ else
{
- if (((word >> 8) & 0x1) == 0)
+ if (((word >> 5) & 0x1) == 0)
{
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
if (((word >> 12) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x101x00xx1xxxx0
- smin. */
- return 2650;
+ x1000001xx1xxxxx1x1010x0xx0xxxx1
+ umax. */
+ return 2809;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x111x00xx1xxxx0
- smin. */
- return 2652;
+ x1000001xx1xxxxx1x1110x0xx0xxxx1
+ umax. */
+ return 2811;
}
}
else
@@ -5041,61 +5063,61 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x101x10xx1xxxx0
- srshl. */
- return 2704;
+ x1000001xx1xxxxx1x1010x1xx0xxxx1
+ fmin. */
+ return 2489;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x111x10xx1xxxx0
- srshl. */
- return 2706;
+ x1000001xx1xxxxx1x1110x1xx0xxxx1
+ fmin. */
+ return 2491;
}
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x101xx1xx1xxxx0
- fmaxnm. */
- return 2485;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x111xx1xx1xxxx0
- fmaxnm. */
- return 2487;
- }
- }
- }
- else
- {
- if (((word >> 8) & 0x1) == 0)
- {
- if (((word >> 9) & 0x1) == 0)
+ if (((word >> 8) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 9) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x101x00xx1xxxx1
- umin. */
- return 2811;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x101000xx1xxxx1
+ umin. */
+ return 2813;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x111000xx1xxxx1
+ umin. */
+ return 2815;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x111x00xx1xxxx1
- umin. */
- return 2813;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x101010xx1xxxx1
+ urshl. */
+ return 2857;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x111010xx1xxxx1
+ urshl. */
+ return 2859;
+ }
}
}
else
@@ -5104,39 +5126,61 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x101x10xx1xxxx1
- urshl. */
- return 2855;
+ x1000001xx1xxxxx1x1010x1xx1xxxx1
+ fminnm. */
+ return 2493;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx1xxxxx1x111x10xx1xxxx1
- urshl. */
- return 2857;
+ x1000001xx1xxxxx1x1110x1xx1xxxx1
+ fminnm. */
+ return 2495;
}
}
}
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x101xx1xx1xxxx1
- fminnm. */
- return 2493;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx1x111xx1xx1xxxx1
- fminnm. */
- return 2495;
- }
- }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 11) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1001xxxxxxxxxx
+ sqdmulh. */
+ return 2693;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1101xxxxxxxxxx
+ sqdmulh. */
+ return 2695;
+ }
+ }
+ else
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1011xxxxxxxxxx
+ sqdmulh. */
+ return 2694;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx1x1111xxxxxxxxxx
+ sqdmulh. */
+ return 2696;
}
}
}
@@ -7934,7 +7978,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2946;
+ return 2950;
}
else
{
@@ -7942,7 +7986,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2954;
+ return 2958;
}
}
else
@@ -7953,7 +7997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2950;
+ return 2954;
}
else
{
@@ -7961,7 +8005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2957;
+ return 2961;
}
}
}
@@ -7999,7 +8043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 3006;
+ return 3010;
}
else
{
@@ -8007,7 +8051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3012;
+ return 3016;
}
}
else
@@ -8018,7 +8062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3009;
+ return 3013;
}
else
{
@@ -8026,7 +8070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3015;
+ return 3019;
}
}
}
@@ -8040,7 +8084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3030;
+ return 3034;
}
else
{
@@ -8048,7 +8092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3036;
+ return 3040;
}
}
else
@@ -8059,7 +8103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3033;
+ return 3037;
}
else
{
@@ -8067,7 +8111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3039;
+ return 3043;
}
}
}
@@ -8084,7 +8128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3018;
+ return 3022;
}
else
{
@@ -8092,7 +8136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3024;
+ return 3028;
}
}
else
@@ -8103,7 +8147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3021;
+ return 3025;
}
else
{
@@ -8111,7 +8155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3027;
+ return 3031;
}
}
}
@@ -8125,7 +8169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3042;
+ return 3046;
}
else
{
@@ -8133,7 +8177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3048;
+ return 3052;
}
}
else
@@ -8144,7 +8188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3045;
+ return 3049;
}
else
{
@@ -8152,7 +8196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3051;
+ return 3055;
}
}
}
@@ -8217,7 +8261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2947;
+ return 2951;
}
else
{
@@ -8225,7 +8269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2955;
+ return 2959;
}
}
else
@@ -8236,7 +8280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2951;
+ return 2955;
}
else
{
@@ -8244,7 +8288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2958;
+ return 2962;
}
}
}
@@ -8282,7 +8326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 3007;
+ return 3011;
}
else
{
@@ -8290,7 +8334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3013;
+ return 3017;
}
}
else
@@ -8301,7 +8345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3010;
+ return 3014;
}
else
{
@@ -8309,7 +8353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3016;
+ return 3020;
}
}
}
@@ -8323,7 +8367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3031;
+ return 3035;
}
else
{
@@ -8331,7 +8375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3037;
+ return 3041;
}
}
else
@@ -8342,7 +8386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3034;
+ return 3038;
}
else
{
@@ -8350,7 +8394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3040;
+ return 3044;
}
}
}
@@ -8367,7 +8411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3019;
+ return 3023;
}
else
{
@@ -8375,7 +8419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3025;
+ return 3029;
}
}
else
@@ -8386,7 +8430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3022;
+ return 3026;
}
else
{
@@ -8394,7 +8438,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3028;
+ return 3032;
}
}
}
@@ -8408,7 +8452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3043;
+ return 3047;
}
else
{
@@ -8416,7 +8460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3049;
+ return 3053;
}
}
else
@@ -8427,7 +8471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3046;
+ return 3050;
}
else
{
@@ -8435,7 +8479,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3052;
+ return 3056;
}
}
}
@@ -8503,7 +8547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2949;
+ return 2953;
}
else
{
@@ -8511,7 +8555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2956;
+ return 2960;
}
}
else
@@ -8520,7 +8564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2953;
+ return 2957;
}
}
else
@@ -8531,7 +8575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2948;
+ return 2952;
}
else
{
@@ -8539,7 +8583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2952;
+ return 2956;
}
}
}
@@ -8601,7 +8645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 3008;
+ return 3012;
}
else
{
@@ -8609,7 +8653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3102;
+ return 3106;
}
}
else
@@ -8620,7 +8664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3014;
+ return 3018;
}
else
{
@@ -8628,7 +8672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3104;
+ return 3108;
}
}
}
@@ -8642,7 +8686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3011;
+ return 3015;
}
else
{
@@ -8650,7 +8694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3103;
+ return 3107;
}
}
else
@@ -8659,7 +8703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3017;
+ return 3021;
}
}
}
@@ -8675,7 +8719,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3032;
+ return 3036;
}
else
{
@@ -8683,7 +8727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3108;
+ return 3112;
}
}
else
@@ -8694,7 +8738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3038;
+ return 3042;
}
else
{
@@ -8702,7 +8746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3110;
+ return 3114;
}
}
}
@@ -8716,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3035;
+ return 3039;
}
else
{
@@ -8724,7 +8768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3109;
+ return 3113;
}
}
else
@@ -8733,7 +8777,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3041;
+ return 3045;
}
}
}
@@ -8752,7 +8796,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3020;
+ return 3024;
}
else
{
@@ -8760,7 +8804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3105;
+ return 3109;
}
}
else
@@ -8771,7 +8815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3026;
+ return 3030;
}
else
{
@@ -8779,7 +8823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3107;
+ return 3111;
}
}
}
@@ -8793,7 +8837,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3023;
+ return 3027;
}
else
{
@@ -8801,7 +8845,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3106;
+ return 3110;
}
}
else
@@ -8810,7 +8854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3029;
+ return 3033;
}
}
}
@@ -8826,7 +8870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3044;
+ return 3048;
}
else
{
@@ -8834,7 +8878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3111;
+ return 3115;
}
}
else
@@ -8845,7 +8889,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3050;
+ return 3054;
}
else
{
@@ -8853,7 +8897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3113;
+ return 3117;
}
}
}
@@ -8867,7 +8911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3047;
+ return 3051;
}
else
{
@@ -8875,7 +8919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3112;
+ return 3116;
}
}
else
@@ -8884,7 +8928,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3053;
+ return 3057;
}
}
}
@@ -9257,7 +9301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3131;
+ return 3135;
}
else
{
@@ -9275,7 +9319,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3134;
+ return 3138;
}
}
}
@@ -9355,7 +9399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2944;
+ return 2948;
}
else
{
@@ -9363,7 +9407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2945;
+ return 2949;
}
}
else
@@ -9470,7 +9514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3136;
+ return 3140;
}
}
}
@@ -9486,7 +9530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3133;
+ return 3137;
}
else
{
@@ -9531,7 +9575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2943;
+ return 2947;
}
else
{
@@ -9625,7 +9669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3135;
+ return 3139;
}
}
}
@@ -9755,7 +9799,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3137;
+ return 3141;
}
}
}
@@ -9771,7 +9815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3132;
+ return 3136;
}
else
{
@@ -10613,7 +10657,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2963;
+ return 2967;
}
}
}
@@ -10687,7 +10731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2964;
+ return 2968;
}
}
}
@@ -13361,7 +13405,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2962;
+ return 2966;
}
}
}
@@ -15065,7 +15109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2991;
+ return 2995;
}
}
else
@@ -15308,7 +15352,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2967;
+ return 2971;
}
else
{
@@ -15316,7 +15360,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2968;
+ return 2972;
}
}
else
@@ -15548,7 +15592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2988;
+ return 2992;
}
else
{
@@ -15569,7 +15613,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2995;
+ return 2999;
}
else
{
@@ -15577,7 +15621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2994;
+ return 2998;
}
}
else
@@ -15632,7 +15676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2987;
+ return 2991;
}
else
{
@@ -15644,7 +15688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2993;
+ return 2997;
}
else
{
@@ -15652,7 +15696,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2992;
+ return 2996;
}
}
else
@@ -15703,7 +15747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2971;
+ return 2975;
}
else
{
@@ -15711,7 +15755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2972;
+ return 2976;
}
}
else
@@ -16070,7 +16114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2965;
+ return 2969;
}
else
{
@@ -16103,7 +16147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2989;
+ return 2993;
}
else
{
@@ -16133,7 +16177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2966;
+ return 2970;
}
else
{
@@ -16262,7 +16306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2975;
+ return 2979;
}
else
{
@@ -16272,7 +16316,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2977;
+ return 2981;
}
else
{
@@ -16280,7 +16324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2979;
+ return 2983;
}
}
}
@@ -16292,7 +16336,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2976;
+ return 2980;
}
else
{
@@ -16302,7 +16346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2978;
+ return 2982;
}
else
{
@@ -16310,7 +16354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2980;
+ return 2984;
}
}
}
@@ -17369,7 +17413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2959;
+ return 2963;
}
else
{
@@ -17377,7 +17421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2961;
+ return 2965;
}
}
else
@@ -17386,7 +17430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2960;
+ return 2964;
}
}
}
@@ -18882,7 +18926,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2969;
+ return 2973;
}
else
{
@@ -18890,7 +18934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2970;
+ return 2974;
}
}
}
@@ -19264,7 +19308,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2973;
+ return 2977;
}
else
{
@@ -19272,7 +19316,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2974;
+ return 2978;
}
}
}
@@ -19633,7 +19677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2875;
+ return 2879;
}
else
{
@@ -19641,7 +19685,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2876;
+ return 2880;
}
}
else
@@ -19685,7 +19729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2878;
+ return 2882;
}
else
{
@@ -19693,7 +19737,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2877;
+ return 2881;
}
}
else
@@ -19740,7 +19784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2882;
+ return 2886;
}
else
{
@@ -19748,7 +19792,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2879;
+ return 2883;
}
}
else
@@ -19792,7 +19836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2880;
+ return 2884;
}
else
{
@@ -19800,7 +19844,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2881;
+ return 2885;
}
}
else
@@ -20926,7 +20970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2990;
+ return 2994;
}
}
else
@@ -22287,7 +22331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3126;
+ return 3130;
}
else
{
@@ -22867,7 +22911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3054;
+ return 3058;
}
else
{
@@ -22875,7 +22919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3056;
+ return 3060;
}
}
else
@@ -22886,7 +22930,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3060;
+ return 3064;
}
else
{
@@ -22894,7 +22938,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3062;
+ return 3066;
}
}
}
@@ -22908,7 +22952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3057;
+ return 3061;
}
else
{
@@ -22916,7 +22960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3059;
+ return 3063;
}
}
else
@@ -22927,7 +22971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3063;
+ return 3067;
}
else
{
@@ -22935,7 +22979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3065;
+ return 3069;
}
}
}
@@ -22952,7 +22996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3078;
+ return 3082;
}
else
{
@@ -22960,7 +23004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3080;
+ return 3084;
}
}
else
@@ -22971,7 +23015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3084;
+ return 3088;
}
else
{
@@ -22979,7 +23023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3086;
+ return 3090;
}
}
}
@@ -22993,7 +23037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3081;
+ return 3085;
}
else
{
@@ -23001,7 +23045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3083;
+ return 3087;
}
}
else
@@ -23012,7 +23056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3087;
+ return 3091;
}
else
{
@@ -23020,7 +23064,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3089;
+ return 3093;
}
}
}
@@ -23040,7 +23084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3066;
+ return 3070;
}
else
{
@@ -23048,7 +23092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3068;
+ return 3072;
}
}
else
@@ -23059,7 +23103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3072;
+ return 3076;
}
else
{
@@ -23067,7 +23111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3074;
+ return 3078;
}
}
}
@@ -23081,7 +23125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3069;
+ return 3073;
}
else
{
@@ -23089,7 +23133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3071;
+ return 3075;
}
}
else
@@ -23100,7 +23144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3075;
+ return 3079;
}
else
{
@@ -23108,7 +23152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3077;
+ return 3081;
}
}
}
@@ -23125,7 +23169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3090;
+ return 3094;
}
else
{
@@ -23133,7 +23177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3092;
+ return 3096;
}
}
else
@@ -23144,7 +23188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3096;
+ return 3100;
}
else
{
@@ -23152,7 +23196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3098;
+ return 3102;
}
}
}
@@ -23166,7 +23210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3093;
+ return 3097;
}
else
{
@@ -23174,7 +23218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3095;
+ return 3099;
}
}
else
@@ -23185,7 +23229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3099;
+ return 3103;
}
else
{
@@ -23193,7 +23237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3101;
+ return 3105;
}
}
}
@@ -23227,7 +23271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3055;
+ return 3059;
}
else
{
@@ -23235,7 +23279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3114;
+ return 3118;
}
}
else
@@ -23246,7 +23290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3061;
+ return 3065;
}
else
{
@@ -23254,7 +23298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3116;
+ return 3120;
}
}
}
@@ -23268,7 +23312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3058;
+ return 3062;
}
else
{
@@ -23276,7 +23320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3115;
+ return 3119;
}
}
else
@@ -23285,7 +23329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3064;
+ return 3068;
}
}
}
@@ -23301,7 +23345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3079;
+ return 3083;
}
else
{
@@ -23309,7 +23353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3120;
+ return 3124;
}
}
else
@@ -23320,7 +23364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3085;
+ return 3089;
}
else
{
@@ -23328,7 +23372,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3122;
+ return 3126;
}
}
}
@@ -23342,7 +23386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3082;
+ return 3086;
}
else
{
@@ -23350,7 +23394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3121;
+ return 3125;
}
}
else
@@ -23359,7 +23403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3088;
+ return 3092;
}
}
}
@@ -23378,7 +23422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3067;
+ return 3071;
}
else
{
@@ -23386,7 +23430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3117;
+ return 3121;
}
}
else
@@ -23397,7 +23441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3073;
+ return 3077;
}
else
{
@@ -23405,7 +23449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3119;
+ return 3123;
}
}
}
@@ -23419,7 +23463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3070;
+ return 3074;
}
else
{
@@ -23427,7 +23471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3118;
+ return 3122;
}
}
else
@@ -23436,7 +23480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3076;
+ return 3080;
}
}
}
@@ -23452,7 +23496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3091;
+ return 3095;
}
else
{
@@ -23460,7 +23504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3123;
+ return 3127;
}
}
else
@@ -23471,7 +23515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3097;
+ return 3101;
}
else
{
@@ -23479,7 +23523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3125;
+ return 3129;
}
}
}
@@ -23493,7 +23537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3094;
+ return 3098;
}
else
{
@@ -23501,7 +23545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3124;
+ return 3128;
}
}
else
@@ -23510,7 +23554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3100;
+ return 3104;
}
}
}
@@ -23677,7 +23721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2981;
+ return 2985;
}
}
}
@@ -23710,7 +23754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2907;
+ return 2911;
}
}
else
@@ -23784,7 +23828,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2983;
+ return 2987;
}
}
}
@@ -23817,7 +23861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2984;
+ return 2988;
}
}
else
@@ -23864,7 +23908,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2914;
+ return 2918;
}
else
{
@@ -23872,7 +23916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2916;
+ return 2920;
}
}
else
@@ -23883,7 +23927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2918;
+ return 2922;
}
else
{
@@ -23897,7 +23941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2919;
+ return 2923;
}
else
{
@@ -23905,7 +23949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2912;
+ return 2916;
}
}
else
@@ -23914,7 +23958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2921;
+ return 2925;
}
}
else
@@ -23927,7 +23971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2920;
+ return 2924;
}
else
{
@@ -23935,7 +23979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2925;
+ return 2929;
}
}
else
@@ -23944,7 +23988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2922;
+ return 2926;
}
}
}
@@ -24125,7 +24169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2906;
+ return 2910;
}
}
else
@@ -24156,7 +24200,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2982;
+ return 2986;
}
else
{
@@ -24175,7 +24219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2998;
+ return 3002;
}
else
{
@@ -24185,7 +24229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2996;
+ return 3000;
}
else
{
@@ -24195,7 +24239,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 3003;
+ return 3007;
}
else
{
@@ -24203,7 +24247,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 3002;
+ return 3006;
}
}
}
@@ -24787,7 +24831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2999;
+ return 3003;
}
else
{
@@ -24795,7 +24839,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 3000;
+ return 3004;
}
}
}
@@ -25113,7 +25157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2917;
+ return 2921;
}
}
else
@@ -25724,7 +25768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2910;
+ return 2914;
}
}
}
@@ -25776,7 +25820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2923;
+ return 2927;
}
}
}
@@ -26019,7 +26063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2913;
+ return 2917;
}
}
else
@@ -26095,7 +26139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2926;
+ return 2930;
}
}
else
@@ -26921,7 +26965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2911;
+ return 2915;
}
}
else
@@ -26953,7 +26997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2924;
+ return 2928;
}
}
else
@@ -27193,7 +27237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2915;
+ return 2919;
}
}
else
@@ -27225,7 +27269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2929;
+ return 2933;
}
else
{
@@ -27233,7 +27277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2933;
+ return 2937;
}
}
}
@@ -27255,7 +27299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2930;
+ return 2934;
}
else
{
@@ -27263,7 +27307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2934;
+ return 2938;
}
}
}
@@ -27302,7 +27346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2927;
+ return 2931;
}
else
{
@@ -27310,7 +27354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2931;
+ return 2935;
}
}
else
@@ -27332,7 +27376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2928;
+ return 2932;
}
else
{
@@ -27340,7 +27384,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2932;
+ return 2936;
}
}
else
@@ -29148,7 +29192,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2935;
+ return 2939;
}
else
{
@@ -29156,7 +29200,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2939;
+ return 2943;
}
}
else
@@ -29178,7 +29222,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2936;
+ return 2940;
}
else
{
@@ -29186,7 +29230,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2940;
+ return 2944;
}
}
else
@@ -29692,7 +29736,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2937;
+ return 2941;
}
else
{
@@ -29700,7 +29744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2941;
+ return 2945;
}
}
}
@@ -29722,7 +29766,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2938;
+ return 2942;
}
else
{
@@ -29730,7 +29774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2942;
+ return 2946;
}
}
}
@@ -29786,7 +29830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2909;
+ return 2913;
}
else
{
@@ -29794,7 +29838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2908;
+ return 2912;
}
}
}
@@ -29897,7 +29941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2986;
+ return 2990;
}
else
{
@@ -29905,7 +29949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2985;
+ return 2989;
}
}
else
@@ -29916,7 +29960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2997;
+ return 3001;
}
else
{
@@ -29926,7 +29970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 3005;
+ return 3009;
}
else
{
@@ -29934,7 +29978,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 3004;
+ return 3008;
}
}
}
@@ -30462,11 +30506,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3127; break; /* addg --> smax. */
- case 3127: value = 3128; break; /* smax --> umax. */
- case 3128: value = 3129; break; /* umax --> smin. */
- case 3129: value = 3130; break; /* smin --> umin. */
- case 3130: return NULL; /* umin --> NULL. */
+ case 19: value = 3131; break; /* addg --> smax. */
+ case 3131: value = 3132; break; /* smax --> umax. */
+ case 3132: value = 3133; break; /* umax --> smin. */
+ case 3133: value = 3134; break; /* smin --> umin. */
+ case 3134: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30624,8 +30668,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 3001; break; /* fcvt --> bfcvt. */
- case 3001: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3005; break; /* fcvt --> bfcvt. */
+ case 3005: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index a6f5747c417..e44ad1622c8 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5722,6 +5722,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("sumlall", 0xc1108030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zm_INDEX4_1), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("sumlall", 0xc1200014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("sumlall", 0xc1300014, 0xfff09c1e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SVE_ZnxN, SME_Zm), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("sunpk", 0xc125e000, 0xff3ffc01, sme_size_22_hsd, 0, OP2 (SME_Zdnx2, SVE_Zn), OP_SVE_VV_HSD_BHS, 0, 0),
+ SME2_INSN ("sunpk", 0xc135e000, 0xff3ffc23, sme_size_22_hsd, 0, OP2 (SME_Zdnx4, SME_Znx2), OP_SVE_VV_HSD_BHS, 0, 0),
SME2_INSN ("suvdot", 0xc1508038, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("svdot", 0xc1500020, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("svdot", 0xc1508020, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
@@ -5808,6 +5810,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("usmlall", 0xc1a00004, 0xffe19c3e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx2, SME_Zmx2), OP_SVE_SBB, F_OD (2), 0),
SME2_INSN ("usmlall", 0xc1a10004, 0xffe39c7e, sme_misc, 0, OP3 (SME_ZA_array_off1x4, SME_Znx4, SME_Zmx4), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("usvdot", 0xc1508028, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("uunpk", 0xc125e001, 0xff3ffc01, sme_size_22_hsd, 0, OP2 (SME_Zdnx2, SVE_Zn), OP_SVE_VV_HSD_BHS, 0, 0),
+ SME2_INSN ("uunpk", 0xc135e001, 0xff3ffc23, sme_size_22_hsd, 0, OP2 (SME_Zdnx4, SME_Znx2), OP_SVE_VV_HSD_BHS, 0, 0),
SME2_INSN ("uvdot", 0xc1500030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("uvdot", 0xc1508030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 25/31] aarch64: Add the SME2 UZP and ZIP instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (23 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 24/31] aarch64: Add the SME2 UNPK instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 26/31] aarch64: Add the SVE BFMLSL instructions Richard Sandiford
` (7 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds UZP and ZIP, which combine UZP{1,2} and ZIP{1,2}
into single instructions.
---
gas/testsuite/gas/aarch64/sme2-30-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-30-invalid.l | 29 +
gas/testsuite/gas/aarch64/sme2-30-invalid.s | 18 +
gas/testsuite/gas/aarch64/sme2-30-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-30-noarch.l | 91 +++
gas/testsuite/gas/aarch64/sme2-30.d | 99 +++
gas/testsuite/gas/aarch64/sme2-30.s | 109 +++
opcodes/aarch64-dis-2.c | 764 +++++++++++---------
opcodes/aarch64-tbl.h | 12 +
9 files changed, 790 insertions(+), 338 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sme2-30-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-30-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-30-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sme2-30-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-30-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sme2-30.d
create mode 100644 gas/testsuite/gas/aarch64/sme2-30.s
diff --git a/gas/testsuite/gas/aarch64/sme2-30-invalid.d b/gas/testsuite/gas/aarch64/sme2-30-invalid.d
new file mode 100644
index 00000000000..535abe3f490
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-30-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-30-invalid.s
+#error_output: sme2-30-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-30-invalid.l b/gas/testsuite/gas/aarch64/sme2-30-invalid.l
new file mode 100644
index 00000000000..6805ddba39c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-30-invalid.l
@@ -0,0 +1,29 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `uzp 0,z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `uzp {z0\.b-z1\.b},0,z0\.b'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `uzp {z0\.b-z1\.b},z0\.b,0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z1\.b-z2\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp {z0\.b-z2\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp {z0\.b-z3\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b,z1\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `uzp {z0\.h-z1\.h},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: uzp {z0\.b-z1\.b}, z0\.b, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: uzp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: uzp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: uzp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `uzp {z0\.q-z3\.q},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: uzp {z0\.b-z3\.b}, z0\.b, z0\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: uzp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: uzp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: uzp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp {z0\.b-z3\.b},{z0\.b-z1\.b},{z2\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z1\.b-z4\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z2\.b-z5\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z3\.b-z6\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z1\.b-z4\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z2\.b-z5\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z3\.b-z6\.b}'
diff --git a/gas/testsuite/gas/aarch64/sme2-30-invalid.s b/gas/testsuite/gas/aarch64/sme2-30-invalid.s
new file mode 100644
index 00000000000..2d3dd1b2604
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-30-invalid.s
@@ -0,0 +1,18 @@
+ uzp 0, z0.b, z0.b
+ uzp { z0.b - z1.b }, 0, z0.b
+ uzp { z0.b - z1.b }, z0.b, 0
+
+ uzp { z1.b - z2.b }, z0.b, z0.b
+ uzp { z0.b - z2.b }, z0.b, z0.b
+ uzp { z0.b - z3.b }, z0.b, z0.b
+ uzp { z0.b - z1.b }, { z0.b - z1.b }, { z0.b, z1.b }
+ uzp { z0.h - z1.h }, z0.b, z0.b
+ uzp { z0.q - z3.q }, z0.b, z0.b
+
+ uzp { z0.b - z3.b }, { z0.b - z1.b }, { z2.b - z3.b }
+ uzp { z1.b - z4.b }, { z0.b - z3.b }
+ uzp { z2.b - z5.b }, { z0.b - z3.b }
+ uzp { z3.b - z6.b }, { z0.b - z3.b }
+ uzp { z0.b - z3.b }, { z1.b - z4.b }
+ uzp { z0.b - z3.b }, { z2.b - z5.b }
+ uzp { z0.b - z3.b }, { z3.b - z6.b }
diff --git a/gas/testsuite/gas/aarch64/sme2-30-noarch.d b/gas/testsuite/gas/aarch64/sme2-30-noarch.d
new file mode 100644
index 00000000000..c58d102b75b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-30-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-30.s
+#error_output: sme2-30-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-30-noarch.l b/gas/testsuite/gas/aarch64/sme2-30-noarch.l
new file mode 100644
index 00000000000..e3ddd704860
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-30-noarch.l
@@ -0,0 +1,91 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z18\.b-z19\.b},z11\.b,z25\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z6\.h-z7\.h},z8\.h,z22\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z24\.s-z25\.s},z19\.s,z2\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z2\.d-z3\.d},z29\.d,z5\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.q-z31\.q},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z31\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z0\.q,z31\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z14\.q-z15\.q},z24\.q,z9\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z4\.b-z7\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z16\.h-z19\.h},{z8\.h-z11\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z20\.s-z23\.s},{z12\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z8\.d-z11\.d},{z16\.d-z19\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z3\.q},{z0\.q-z3\.q}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.q-z31\.q},{z0\.q-z3\.q}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z3\.q},{z28\.q-z31\.q}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z12\.q-z15\.q},{z4\.q-z7\.q}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z18\.b-z19\.b},z11\.b,z25\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z6\.h-z7\.h},z8\.h,z22\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z24\.s-z25\.s},z19\.s,z2\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z2\.d-z3\.d},z29\.d,z5\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.q-z31\.q},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z31\.q,z0\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z0\.q,z31\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z14\.q-z15\.q},z24\.q,z9\.q'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z4\.b-z7\.b},{z24\.b-z27\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z16\.h-z19\.h},{z8\.h-z11\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z20\.s-z23\.s},{z12\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z8\.d-z11\.d},{z16\.d-z19\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z3\.q},{z0\.q-z3\.q}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.q-z31\.q},{z0\.q-z3\.q}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z3\.q},{z28\.q-z31\.q}'
+[^ :]+:[0-9]+: Error: selected processor does not support `zip {z12\.q-z15\.q},{z4\.q-z7\.q}'
diff --git a/gas/testsuite/gas/aarch64/sme2-30.d b/gas/testsuite/gas/aarch64/sme2-30.d
new file mode 100644
index 00000000000..2db95e0a83a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-30.d
@@ -0,0 +1,99 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c120d001 uzp {z0\.b-z1\.b}, z0\.b, z0\.b
+[^:]+: c120d01f uzp {z30\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120d3e1 uzp {z0\.b-z1\.b}, z31\.b, z0\.b
+[^:]+: c13fd001 uzp {z0\.b-z1\.b}, z0\.b, z31\.b
+[^:]+: c139d173 uzp {z18\.b-z19\.b}, z11\.b, z25\.b
+[^:]+: c160d001 uzp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^:]+: c160d01f uzp {z30\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160d3e1 uzp {z0\.h-z1\.h}, z31\.h, z0\.h
+[^:]+: c17fd001 uzp {z0\.h-z1\.h}, z0\.h, z31\.h
+[^:]+: c176d107 uzp {z6\.h-z7\.h}, z8\.h, z22\.h
+[^:]+: c1a0d001 uzp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^:]+: c1a0d01f uzp {z30\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0d3e1 uzp {z0\.s-z1\.s}, z31\.s, z0\.s
+[^:]+: c1bfd001 uzp {z0\.s-z1\.s}, z0\.s, z31\.s
+[^:]+: c1a2d279 uzp {z24\.s-z25\.s}, z19\.s, z2\.s
+[^:]+: c1e0d001 uzp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^:]+: c1e0d01f uzp {z30\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0d3e1 uzp {z0\.d-z1\.d}, z31\.d, z0\.d
+[^:]+: c1ffd001 uzp {z0\.d-z1\.d}, z0\.d, z31\.d
+[^:]+: c1e5d3a3 uzp {z2\.d-z3\.d}, z29\.d, z5\.d
+[^:]+: c120d401 uzp {z0\.q-z1\.q}, z0\.q, z0\.q
+[^:]+: c120d41f uzp {z30\.q-z31\.q}, z0\.q, z0\.q
+[^:]+: c120d7e1 uzp {z0\.q-z1\.q}, z31\.q, z0\.q
+[^:]+: c13fd401 uzp {z0\.q-z1\.q}, z0\.q, z31\.q
+[^:]+: c129d70f uzp {z14\.q-z15\.q}, z24\.q, z9\.q
+[^:]+: c136e002 uzp {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c136e01e uzp {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c136e382 uzp {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c136e306 uzp {z4\.b-z7\.b}, {z24\.b-z27\.b}
+[^:]+: c176e002 uzp {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c176e01e uzp {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c176e382 uzp {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c176e112 uzp {z16\.h-z19\.h}, {z8\.h-z11\.h}
+[^:]+: c1b6e002 uzp {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1b6e01e uzp {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1b6e382 uzp {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b6e196 uzp {z20\.s-z23\.s}, {z12\.s-z15\.s}
+[^:]+: c1f6e002 uzp {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1f6e01e uzp {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1f6e382 uzp {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1f6e20a uzp {z8\.d-z11\.d}, {z16\.d-z19\.d}
+[^:]+: c137e002 uzp {z0\.q-z3\.q}, {z0\.q-z3\.q}
+[^:]+: c137e01e uzp {z28\.q-z31\.q}, {z0\.q-z3\.q}
+[^:]+: c137e382 uzp {z0\.q-z3\.q}, {z28\.q-z31\.q}
+[^:]+: c137e08e uzp {z12\.q-z15\.q}, {z4\.q-z7\.q}
+[^:]+: c120d000 zip {z0\.b-z1\.b}, z0\.b, z0\.b
+[^:]+: c120d01e zip {z30\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120d3e0 zip {z0\.b-z1\.b}, z31\.b, z0\.b
+[^:]+: c13fd000 zip {z0\.b-z1\.b}, z0\.b, z31\.b
+[^:]+: c139d172 zip {z18\.b-z19\.b}, z11\.b, z25\.b
+[^:]+: c160d000 zip {z0\.h-z1\.h}, z0\.h, z0\.h
+[^:]+: c160d01e zip {z30\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160d3e0 zip {z0\.h-z1\.h}, z31\.h, z0\.h
+[^:]+: c17fd000 zip {z0\.h-z1\.h}, z0\.h, z31\.h
+[^:]+: c176d106 zip {z6\.h-z7\.h}, z8\.h, z22\.h
+[^:]+: c1a0d000 zip {z0\.s-z1\.s}, z0\.s, z0\.s
+[^:]+: c1a0d01e zip {z30\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0d3e0 zip {z0\.s-z1\.s}, z31\.s, z0\.s
+[^:]+: c1bfd000 zip {z0\.s-z1\.s}, z0\.s, z31\.s
+[^:]+: c1a2d278 zip {z24\.s-z25\.s}, z19\.s, z2\.s
+[^:]+: c1e0d000 zip {z0\.d-z1\.d}, z0\.d, z0\.d
+[^:]+: c1e0d01e zip {z30\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0d3e0 zip {z0\.d-z1\.d}, z31\.d, z0\.d
+[^:]+: c1ffd000 zip {z0\.d-z1\.d}, z0\.d, z31\.d
+[^:]+: c1e5d3a2 zip {z2\.d-z3\.d}, z29\.d, z5\.d
+[^:]+: c120d400 zip {z0\.q-z1\.q}, z0\.q, z0\.q
+[^:]+: c120d41e zip {z30\.q-z31\.q}, z0\.q, z0\.q
+[^:]+: c120d7e0 zip {z0\.q-z1\.q}, z31\.q, z0\.q
+[^:]+: c13fd400 zip {z0\.q-z1\.q}, z0\.q, z31\.q
+[^:]+: c129d70e zip {z14\.q-z15\.q}, z24\.q, z9\.q
+[^:]+: c136e000 zip {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c136e01c zip {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c136e380 zip {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c136e304 zip {z4\.b-z7\.b}, {z24\.b-z27\.b}
+[^:]+: c176e000 zip {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c176e01c zip {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c176e380 zip {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c176e110 zip {z16\.h-z19\.h}, {z8\.h-z11\.h}
+[^:]+: c1b6e000 zip {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1b6e01c zip {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1b6e380 zip {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b6e194 zip {z20\.s-z23\.s}, {z12\.s-z15\.s}
+[^:]+: c1f6e000 zip {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1f6e01c zip {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1f6e380 zip {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1f6e208 zip {z8\.d-z11\.d}, {z16\.d-z19\.d}
+[^:]+: c137e000 zip {z0\.q-z3\.q}, {z0\.q-z3\.q}
+[^:]+: c137e01c zip {z28\.q-z31\.q}, {z0\.q-z3\.q}
+[^:]+: c137e380 zip {z0\.q-z3\.q}, {z28\.q-z31\.q}
+[^:]+: c137e08c zip {z12\.q-z15\.q}, {z4\.q-z7\.q}
diff --git a/gas/testsuite/gas/aarch64/sme2-30.s b/gas/testsuite/gas/aarch64/sme2-30.s
new file mode 100644
index 00000000000..ade5fc1a0bd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-30.s
@@ -0,0 +1,109 @@
+ uzp { z0.b - z1.b }, z0.b, z0.b
+ uzp { z30.b - z31.b }, z0.b, z0.b
+ uzp { z0.b - z1.b }, z31.b, z0.b
+ uzp { z0.b - z1.b }, z0.b, z31.b
+ uzp { z18.b - z19.b }, z11.b, z25.b
+
+ uzp { z0.h - z1.h }, z0.h, z0.h
+ uzp { z30.h - z31.h }, z0.h, z0.h
+ uzp { z0.h - z1.h }, z31.h, z0.h
+ uzp { z0.h - z1.h }, z0.h, z31.h
+ uzp { z6.h - z7.h }, z8.h, z22.h
+
+ uzp { z0.s - z1.s }, z0.s, z0.s
+ uzp { z30.s - z31.s }, z0.s, z0.s
+ uzp { z0.s - z1.s }, z31.s, z0.s
+ uzp { z0.s - z1.s }, z0.s, z31.s
+ uzp { z24.s - z25.s }, z19.s, z2.s
+
+ uzp { z0.d - z1.d }, z0.d, z0.d
+ uzp { z30.d - z31.d }, z0.d, z0.d
+ uzp { z0.d - z1.d }, z31.d, z0.d
+ uzp { z0.d - z1.d }, z0.d, z31.d
+ uzp { z2.d - z3.d }, z29.d, z5.d
+
+ uzp { z0.q - z1.q }, z0.q, z0.q
+ uzp { z30.q - z31.q }, z0.q, z0.q
+ uzp { z0.q - z1.q }, z31.q, z0.q
+ uzp { z0.q - z1.q }, z0.q, z31.q
+ uzp { z14.q - z15.q }, z24.q, z9.q
+
+ uzp { z0.b - z3.b }, { z0.b - z3.b }
+ uzp { z28.b - z31.b }, { z0.b - z3.b }
+ uzp { z0.b - z3.b }, { z28.b - z31.b }
+ uzp { z4.b - z7.b }, { z24.b - z27.b }
+
+ uzp { z0.h - z3.h }, { z0.h - z3.h }
+ uzp { z28.h - z31.h }, { z0.h - z3.h }
+ uzp { z0.h - z3.h }, { z28.h - z31.h }
+ uzp { z16.h - z19.h }, { z8.h - z11.h }
+
+ uzp { z0.s - z3.s }, { z0.s - z3.s }
+ uzp { z28.s - z31.s }, { z0.s - z3.s }
+ uzp { z0.s - z3.s }, { z28.s - z31.s }
+ uzp { z20.s - z23.s }, { z12.s - z15.s }
+
+ uzp { z0.d - z3.d }, { z0.d - z3.d }
+ uzp { z28.d - z31.d }, { z0.d - z3.d }
+ uzp { z0.d - z3.d }, { z28.d - z31.d }
+ uzp { z8.d - z11.d }, { z16.d - z19.d }
+
+ uzp { z0.q - z3.q }, { z0.q - z3.q }
+ uzp { z28.q - z31.q }, { z0.q - z3.q }
+ uzp { z0.q - z3.q }, { z28.q - z31.q }
+ uzp { z12.q - z15.q }, { z4.q - z7.q }
+
+ zip { z0.b - z1.b }, z0.b, z0.b
+ zip { z30.b - z31.b }, z0.b, z0.b
+ zip { z0.b - z1.b }, z31.b, z0.b
+ zip { z0.b - z1.b }, z0.b, z31.b
+ zip { z18.b - z19.b }, z11.b, z25.b
+
+ zip { z0.h - z1.h }, z0.h, z0.h
+ zip { z30.h - z31.h }, z0.h, z0.h
+ zip { z0.h - z1.h }, z31.h, z0.h
+ zip { z0.h - z1.h }, z0.h, z31.h
+ zip { z6.h - z7.h }, z8.h, z22.h
+
+ zip { z0.s - z1.s }, z0.s, z0.s
+ zip { z30.s - z31.s }, z0.s, z0.s
+ zip { z0.s - z1.s }, z31.s, z0.s
+ zip { z0.s - z1.s }, z0.s, z31.s
+ zip { z24.s - z25.s }, z19.s, z2.s
+
+ zip { z0.d - z1.d }, z0.d, z0.d
+ zip { z30.d - z31.d }, z0.d, z0.d
+ zip { z0.d - z1.d }, z31.d, z0.d
+ zip { z0.d - z1.d }, z0.d, z31.d
+ zip { z2.d - z3.d }, z29.d, z5.d
+
+ zip { z0.q - z1.q }, z0.q, z0.q
+ zip { z30.q - z31.q }, z0.q, z0.q
+ zip { z0.q - z1.q }, z31.q, z0.q
+ zip { z0.q - z1.q }, z0.q, z31.q
+ zip { z14.q - z15.q }, z24.q, z9.q
+
+ zip { z0.b - z3.b }, { z0.b - z3.b }
+ zip { z28.b - z31.b }, { z0.b - z3.b }
+ zip { z0.b - z3.b }, { z28.b - z31.b }
+ zip { z4.b - z7.b }, { z24.b - z27.b }
+
+ zip { z0.h - z3.h }, { z0.h - z3.h }
+ zip { z28.h - z31.h }, { z0.h - z3.h }
+ zip { z0.h - z3.h }, { z28.h - z31.h }
+ zip { z16.h - z19.h }, { z8.h - z11.h }
+
+ zip { z0.s - z3.s }, { z0.s - z3.s }
+ zip { z28.s - z31.s }, { z0.s - z3.s }
+ zip { z0.s - z3.s }, { z28.s - z31.s }
+ zip { z20.s - z23.s }, { z12.s - z15.s }
+
+ zip { z0.d - z3.d }, { z0.d - z3.d }
+ zip { z28.d - z31.d }, { z0.d - z3.d }
+ zip { z0.d - z3.d }, { z28.d - z31.d }
+ zip { z8.d - z11.d }, { z16.d - z19.d }
+
+ zip { z0.q - z3.q }, { z0.q - z3.q }
+ zip { z28.q - z31.q }, { z0.q - z3.q }
+ zip { z0.q - z3.q }, { z28.q - z31.q }
+ zip { z12.q - z15.q }, { z4.q - z7.q }
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index e514becb5fd..bf04e3fcb0b 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2887;
+ return 2891;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2890;
+ return 2898;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2891;
+ return 2899;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2892;
+ return 2900;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2899;
+ return 2907;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2900;
+ return 2908;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2901;
+ return 2909;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2893;
+ return 2901;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2894;
+ return 2902;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2895;
+ return 2903;
}
}
}
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2902;
+ return 2910;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2903;
+ return 2911;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2904;
+ return 2912;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2906;
+ return 2914;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2907;
+ return 2915;
}
}
else
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2888;
+ return 2896;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2889;
+ return 2897;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2896;
+ return 2904;
}
}
else
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2908;
+ return 2916;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2909;
+ return 2917;
}
}
else
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2897;
+ return 2905;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2898;
+ return 2906;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2905;
+ return 2913;
}
}
else
@@ -4162,11 +4162,33 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx110x00xxxxxxxxxx
- fclamp. */
- return 2466;
+ if (((word >> 0) & 0x1) == 0)
+ {
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110000xxxxxxxxx0
+ fclamp. */
+ return 2466;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110100xxxxxxxxx0
+ zip. */
+ return 2892;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xxxxx110x00xxxxxxxxx1
+ uzp. */
+ return 2879;
+ }
}
else
{
@@ -4235,32 +4257,54 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 5) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 0) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx10xxxx110101xxxx0xxxxx
- sqrshr. */
- return 2697;
+ x1000001x01xxxxx110101xxxxxxxxx0
+ zip. */
+ return 2893;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx11xxxx110101xxxx0xxxxx
- sqrshru. */
- return 2700;
+ x1000001x01xxxxx110101xxxxxxxxx1
+ uzp. */
+ return 2880;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx1xxxxx110101xxxx1xxxxx
- uqrshr. */
- return 2853;
+ if (((word >> 5) & 0x1) == 0)
+ {
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x110xxxx110101xxxx0xxxxx
+ sqrshr. */
+ return 2697;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x111xxxx110101xxxx0xxxxx
+ sqrshru. */
+ return 2700;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x11xxxxx110101xxxx1xxxxx
+ uqrshr. */
+ return 2853;
+ }
}
}
}
@@ -4516,42 +4560,64 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 19) & 0x1) == 0)
+ if (((word >> 18) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 19) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx100x10111000xxxx0xxxxx
- scvtf. */
- return 2629;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx100010111000xxxx0xxxxx
+ scvtf. */
+ return 2629;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx110010111000xxxx0xxxxx
+ scvtf. */
+ return 2630;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001xx110x10111000xxxx0xxxxx
- scvtf. */
- return 2630;
+ if (((word >> 20) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx101010111000xxxx0xxxxx
+ frintm. */
+ return 2526;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx111010111000xxxx0xxxxx
+ frintm. */
+ return 2527;
+ }
}
}
else
{
- if (((word >> 20) & 0x1) == 0)
+ if (((word >> 1) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx101x10111000xxxx0xxxxx
- frintm. */
- return 2526;
+ x1000001xx1xx110111000xxxx0xxx0x
+ zip. */
+ return 2894;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001xx111x10111000xxxx0xxxxx
- frintm. */
- return 2527;
+ x1000001xx1xx110111000xxxx0xxx1x
+ uzp. */
+ return 2881;
}
}
}
@@ -4711,66 +4777,88 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 5) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
- {
- if (((word >> 22) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x010xx11111000xxxx0xxxxx
- sqcvt. */
- return 2687;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x110xx11111000xxxx0xxxxx
- sqcvtu. */
- return 2690;
- }
- }
- else
+ if (((word >> 18) & 0x1) == 0)
{
- if (((word >> 6) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
if (((word >> 22) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001x011xx11111000xxx00xxxxx
+ x1000001x010x011111000xxxx0xxxxx
sqcvt. */
- return 2688;
+ return 2687;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x1000001x111xx11111000xxx00xxxxx
+ x1000001x110x011111000xxxx0xxxxx
sqcvtu. */
- return 2691;
+ return 2690;
}
}
else
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 6) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x011xx11111000xxx10xxxxx
- sqcvtn. */
- return 2689;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x011x011111000xxx00xxxxx
+ sqcvt. */
+ return 2688;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x111x011111000xxx00xxxxx
+ sqcvtu. */
+ return 2691;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000001x111xx11111000xxx10xxxxx
- sqcvtun. */
- return 2692;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x011x011111000xxx10xxxxx
+ sqcvtn. */
+ return 2689;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001x111x011111000xxx10xxxxx
+ sqcvtun. */
+ return 2692;
+ }
}
}
}
+ else
+ {
+ if (((word >> 1) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xx111111000xxxx0xxx0x
+ zip. */
+ return 2895;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000001xx1xx111111000xxxx0xxx1x
+ uzp. */
+ return 2882;
+ }
+ }
}
else
{
@@ -7978,7 +8066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2950;
+ return 2958;
}
else
{
@@ -7986,7 +8074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2958;
+ return 2966;
}
}
else
@@ -7997,7 +8085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2954;
+ return 2962;
}
else
{
@@ -8005,7 +8093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2961;
+ return 2969;
}
}
}
@@ -8043,7 +8131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 3010;
+ return 3018;
}
else
{
@@ -8051,7 +8139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3016;
+ return 3024;
}
}
else
@@ -8062,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3013;
+ return 3021;
}
else
{
@@ -8070,7 +8158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3019;
+ return 3027;
}
}
}
@@ -8084,7 +8172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3034;
+ return 3042;
}
else
{
@@ -8092,7 +8180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3040;
+ return 3048;
}
}
else
@@ -8103,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3037;
+ return 3045;
}
else
{
@@ -8111,7 +8199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3043;
+ return 3051;
}
}
}
@@ -8128,7 +8216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3022;
+ return 3030;
}
else
{
@@ -8136,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3028;
+ return 3036;
}
}
else
@@ -8147,7 +8235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3025;
+ return 3033;
}
else
{
@@ -8155,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3031;
+ return 3039;
}
}
}
@@ -8169,7 +8257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3046;
+ return 3054;
}
else
{
@@ -8177,7 +8265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3052;
+ return 3060;
}
}
else
@@ -8188,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3049;
+ return 3057;
}
else
{
@@ -8196,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3055;
+ return 3063;
}
}
}
@@ -8261,7 +8349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2951;
+ return 2959;
}
else
{
@@ -8269,7 +8357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2959;
+ return 2967;
}
}
else
@@ -8280,7 +8368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2955;
+ return 2963;
}
else
{
@@ -8288,7 +8376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2962;
+ return 2970;
}
}
}
@@ -8326,7 +8414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 3011;
+ return 3019;
}
else
{
@@ -8334,7 +8422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3017;
+ return 3025;
}
}
else
@@ -8345,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3014;
+ return 3022;
}
else
{
@@ -8353,7 +8441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3020;
+ return 3028;
}
}
}
@@ -8367,7 +8455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3035;
+ return 3043;
}
else
{
@@ -8375,7 +8463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3041;
+ return 3049;
}
}
else
@@ -8386,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3038;
+ return 3046;
}
else
{
@@ -8394,7 +8482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3044;
+ return 3052;
}
}
}
@@ -8411,7 +8499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3023;
+ return 3031;
}
else
{
@@ -8419,7 +8507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3029;
+ return 3037;
}
}
else
@@ -8430,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3026;
+ return 3034;
}
else
{
@@ -8438,7 +8526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3032;
+ return 3040;
}
}
}
@@ -8452,7 +8540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3047;
+ return 3055;
}
else
{
@@ -8460,7 +8548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3053;
+ return 3061;
}
}
else
@@ -8471,7 +8559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3050;
+ return 3058;
}
else
{
@@ -8479,7 +8567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3056;
+ return 3064;
}
}
}
@@ -8547,7 +8635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2953;
+ return 2961;
}
else
{
@@ -8555,7 +8643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2960;
+ return 2968;
}
}
else
@@ -8564,7 +8652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2957;
+ return 2965;
}
}
else
@@ -8575,7 +8663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2952;
+ return 2960;
}
else
{
@@ -8583,7 +8671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2956;
+ return 2964;
}
}
}
@@ -8645,7 +8733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 3012;
+ return 3020;
}
else
{
@@ -8653,7 +8741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3106;
+ return 3114;
}
}
else
@@ -8664,7 +8752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3018;
+ return 3026;
}
else
{
@@ -8672,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3108;
+ return 3116;
}
}
}
@@ -8686,7 +8774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3015;
+ return 3023;
}
else
{
@@ -8694,7 +8782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3107;
+ return 3115;
}
}
else
@@ -8703,7 +8791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3021;
+ return 3029;
}
}
}
@@ -8719,7 +8807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3036;
+ return 3044;
}
else
{
@@ -8727,7 +8815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3112;
+ return 3120;
}
}
else
@@ -8738,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3042;
+ return 3050;
}
else
{
@@ -8746,7 +8834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3114;
+ return 3122;
}
}
}
@@ -8760,7 +8848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3039;
+ return 3047;
}
else
{
@@ -8768,7 +8856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3113;
+ return 3121;
}
}
else
@@ -8777,7 +8865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3045;
+ return 3053;
}
}
}
@@ -8796,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3024;
+ return 3032;
}
else
{
@@ -8804,7 +8892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3109;
+ return 3117;
}
}
else
@@ -8815,7 +8903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3030;
+ return 3038;
}
else
{
@@ -8823,7 +8911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3111;
+ return 3119;
}
}
}
@@ -8837,7 +8925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3027;
+ return 3035;
}
else
{
@@ -8845,7 +8933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3110;
+ return 3118;
}
}
else
@@ -8854,7 +8942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3033;
+ return 3041;
}
}
}
@@ -8870,7 +8958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3048;
+ return 3056;
}
else
{
@@ -8878,7 +8966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3115;
+ return 3123;
}
}
else
@@ -8889,7 +8977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3054;
+ return 3062;
}
else
{
@@ -8897,7 +8985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3117;
+ return 3125;
}
}
}
@@ -8911,7 +8999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3051;
+ return 3059;
}
else
{
@@ -8919,7 +9007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3116;
+ return 3124;
}
}
else
@@ -8928,7 +9016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3057;
+ return 3065;
}
}
}
@@ -9301,7 +9389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3135;
+ return 3143;
}
else
{
@@ -9319,7 +9407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3138;
+ return 3146;
}
}
}
@@ -9399,7 +9487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2948;
+ return 2956;
}
else
{
@@ -9407,7 +9495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2949;
+ return 2957;
}
}
else
@@ -9514,7 +9602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3140;
+ return 3148;
}
}
}
@@ -9530,7 +9618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3137;
+ return 3145;
}
else
{
@@ -9575,7 +9663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2947;
+ return 2955;
}
else
{
@@ -9669,7 +9757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3139;
+ return 3147;
}
}
}
@@ -9799,7 +9887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3141;
+ return 3149;
}
}
}
@@ -9815,7 +9903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3136;
+ return 3144;
}
else
{
@@ -10657,7 +10745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2967;
+ return 2975;
}
}
}
@@ -10731,7 +10819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2968;
+ return 2976;
}
}
}
@@ -13405,7 +13493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2966;
+ return 2974;
}
}
}
@@ -15109,7 +15197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2995;
+ return 3003;
}
}
else
@@ -15352,7 +15440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2971;
+ return 2979;
}
else
{
@@ -15360,7 +15448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2972;
+ return 2980;
}
}
else
@@ -15592,7 +15680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2992;
+ return 3000;
}
else
{
@@ -15613,7 +15701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2999;
+ return 3007;
}
else
{
@@ -15621,7 +15709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2998;
+ return 3006;
}
}
else
@@ -15676,7 +15764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2991;
+ return 2999;
}
else
{
@@ -15688,7 +15776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2997;
+ return 3005;
}
else
{
@@ -15696,7 +15784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2996;
+ return 3004;
}
}
else
@@ -15747,7 +15835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2975;
+ return 2983;
}
else
{
@@ -15755,7 +15843,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2976;
+ return 2984;
}
}
else
@@ -16114,7 +16202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2969;
+ return 2977;
}
else
{
@@ -16147,7 +16235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2993;
+ return 3001;
}
else
{
@@ -16177,7 +16265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2970;
+ return 2978;
}
else
{
@@ -16306,7 +16394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2979;
+ return 2987;
}
else
{
@@ -16316,7 +16404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2981;
+ return 2989;
}
else
{
@@ -16324,7 +16412,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2983;
+ return 2991;
}
}
}
@@ -16336,7 +16424,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2980;
+ return 2988;
}
else
{
@@ -16346,7 +16434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2982;
+ return 2990;
}
else
{
@@ -16354,7 +16442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2984;
+ return 2992;
}
}
}
@@ -17413,7 +17501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2963;
+ return 2971;
}
else
{
@@ -17421,7 +17509,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2965;
+ return 2973;
}
}
else
@@ -17430,7 +17518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2964;
+ return 2972;
}
}
}
@@ -18926,7 +19014,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2973;
+ return 2981;
}
else
{
@@ -18934,7 +19022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2974;
+ return 2982;
}
}
}
@@ -19308,7 +19396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2977;
+ return 2985;
}
else
{
@@ -19316,7 +19404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2978;
+ return 2986;
}
}
}
@@ -19677,7 +19765,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2879;
+ return 2883;
}
else
{
@@ -19685,7 +19773,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2880;
+ return 2884;
}
}
else
@@ -19729,7 +19817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2882;
+ return 2886;
}
else
{
@@ -19737,7 +19825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2881;
+ return 2885;
}
}
else
@@ -19784,7 +19872,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2886;
+ return 2890;
}
else
{
@@ -19792,7 +19880,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2883;
+ return 2887;
}
}
else
@@ -19836,7 +19924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2884;
+ return 2888;
}
else
{
@@ -19844,7 +19932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2885;
+ return 2889;
}
}
else
@@ -20970,7 +21058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2994;
+ return 3002;
}
}
else
@@ -22331,7 +22419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3130;
+ return 3138;
}
else
{
@@ -22911,7 +22999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3058;
+ return 3066;
}
else
{
@@ -22919,7 +23007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3060;
+ return 3068;
}
}
else
@@ -22930,7 +23018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3064;
+ return 3072;
}
else
{
@@ -22938,7 +23026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3066;
+ return 3074;
}
}
}
@@ -22952,7 +23040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3061;
+ return 3069;
}
else
{
@@ -22960,7 +23048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3063;
+ return 3071;
}
}
else
@@ -22971,7 +23059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3067;
+ return 3075;
}
else
{
@@ -22979,7 +23067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3069;
+ return 3077;
}
}
}
@@ -22996,7 +23084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3082;
+ return 3090;
}
else
{
@@ -23004,7 +23092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3084;
+ return 3092;
}
}
else
@@ -23015,7 +23103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3088;
+ return 3096;
}
else
{
@@ -23023,7 +23111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3090;
+ return 3098;
}
}
}
@@ -23037,7 +23125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3085;
+ return 3093;
}
else
{
@@ -23045,7 +23133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3087;
+ return 3095;
}
}
else
@@ -23056,7 +23144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3091;
+ return 3099;
}
else
{
@@ -23064,7 +23152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3093;
+ return 3101;
}
}
}
@@ -23084,7 +23172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3070;
+ return 3078;
}
else
{
@@ -23092,7 +23180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3072;
+ return 3080;
}
}
else
@@ -23103,7 +23191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3076;
+ return 3084;
}
else
{
@@ -23111,7 +23199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3078;
+ return 3086;
}
}
}
@@ -23125,7 +23213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3073;
+ return 3081;
}
else
{
@@ -23133,7 +23221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3075;
+ return 3083;
}
}
else
@@ -23144,7 +23232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3079;
+ return 3087;
}
else
{
@@ -23152,7 +23240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3081;
+ return 3089;
}
}
}
@@ -23169,7 +23257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3094;
+ return 3102;
}
else
{
@@ -23177,7 +23265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3096;
+ return 3104;
}
}
else
@@ -23188,7 +23276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3100;
+ return 3108;
}
else
{
@@ -23196,7 +23284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3102;
+ return 3110;
}
}
}
@@ -23210,7 +23298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3097;
+ return 3105;
}
else
{
@@ -23218,7 +23306,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3099;
+ return 3107;
}
}
else
@@ -23229,7 +23317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3103;
+ return 3111;
}
else
{
@@ -23237,7 +23325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3105;
+ return 3113;
}
}
}
@@ -23271,7 +23359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3059;
+ return 3067;
}
else
{
@@ -23279,7 +23367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3118;
+ return 3126;
}
}
else
@@ -23290,7 +23378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3065;
+ return 3073;
}
else
{
@@ -23298,7 +23386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3120;
+ return 3128;
}
}
}
@@ -23312,7 +23400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3062;
+ return 3070;
}
else
{
@@ -23320,7 +23408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3119;
+ return 3127;
}
}
else
@@ -23329,7 +23417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3068;
+ return 3076;
}
}
}
@@ -23345,7 +23433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3083;
+ return 3091;
}
else
{
@@ -23353,7 +23441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3124;
+ return 3132;
}
}
else
@@ -23364,7 +23452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3089;
+ return 3097;
}
else
{
@@ -23372,7 +23460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3126;
+ return 3134;
}
}
}
@@ -23386,7 +23474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3086;
+ return 3094;
}
else
{
@@ -23394,7 +23482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3125;
+ return 3133;
}
}
else
@@ -23403,7 +23491,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3092;
+ return 3100;
}
}
}
@@ -23422,7 +23510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3071;
+ return 3079;
}
else
{
@@ -23430,7 +23518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3121;
+ return 3129;
}
}
else
@@ -23441,7 +23529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3077;
+ return 3085;
}
else
{
@@ -23449,7 +23537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3123;
+ return 3131;
}
}
}
@@ -23463,7 +23551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3074;
+ return 3082;
}
else
{
@@ -23471,7 +23559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3122;
+ return 3130;
}
}
else
@@ -23480,7 +23568,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3080;
+ return 3088;
}
}
}
@@ -23496,7 +23584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3095;
+ return 3103;
}
else
{
@@ -23504,7 +23592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3127;
+ return 3135;
}
}
else
@@ -23515,7 +23603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3101;
+ return 3109;
}
else
{
@@ -23523,7 +23611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3129;
+ return 3137;
}
}
}
@@ -23537,7 +23625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3098;
+ return 3106;
}
else
{
@@ -23545,7 +23633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3128;
+ return 3136;
}
}
else
@@ -23554,7 +23642,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3104;
+ return 3112;
}
}
}
@@ -23721,7 +23809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2985;
+ return 2993;
}
}
}
@@ -23754,7 +23842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2911;
+ return 2919;
}
}
else
@@ -23828,7 +23916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2987;
+ return 2995;
}
}
}
@@ -23861,7 +23949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2988;
+ return 2996;
}
}
else
@@ -23908,7 +23996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2918;
+ return 2926;
}
else
{
@@ -23916,7 +24004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2920;
+ return 2928;
}
}
else
@@ -23927,7 +24015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2922;
+ return 2930;
}
else
{
@@ -23941,7 +24029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2923;
+ return 2931;
}
else
{
@@ -23949,7 +24037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2916;
+ return 2924;
}
}
else
@@ -23958,7 +24046,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2925;
+ return 2933;
}
}
else
@@ -23971,7 +24059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2924;
+ return 2932;
}
else
{
@@ -23979,7 +24067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2929;
+ return 2937;
}
}
else
@@ -23988,7 +24076,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2926;
+ return 2934;
}
}
}
@@ -24169,7 +24257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2910;
+ return 2918;
}
}
else
@@ -24200,7 +24288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2986;
+ return 2994;
}
else
{
@@ -24219,7 +24307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 3002;
+ return 3010;
}
else
{
@@ -24229,7 +24317,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 3000;
+ return 3008;
}
else
{
@@ -24239,7 +24327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 3007;
+ return 3015;
}
else
{
@@ -24247,7 +24335,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 3006;
+ return 3014;
}
}
}
@@ -24831,7 +24919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 3003;
+ return 3011;
}
else
{
@@ -24839,7 +24927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 3004;
+ return 3012;
}
}
}
@@ -25157,7 +25245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2921;
+ return 2929;
}
}
else
@@ -25768,7 +25856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2914;
+ return 2922;
}
}
}
@@ -25820,7 +25908,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2927;
+ return 2935;
}
}
}
@@ -26063,7 +26151,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2917;
+ return 2925;
}
}
else
@@ -26139,7 +26227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2930;
+ return 2938;
}
}
else
@@ -26965,7 +27053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2915;
+ return 2923;
}
}
else
@@ -26997,7 +27085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2928;
+ return 2936;
}
}
else
@@ -27237,7 +27325,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2919;
+ return 2927;
}
}
else
@@ -27269,7 +27357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2933;
+ return 2941;
}
else
{
@@ -27277,7 +27365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2937;
+ return 2945;
}
}
}
@@ -27299,7 +27387,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2934;
+ return 2942;
}
else
{
@@ -27307,7 +27395,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2938;
+ return 2946;
}
}
}
@@ -27346,7 +27434,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2931;
+ return 2939;
}
else
{
@@ -27354,7 +27442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2935;
+ return 2943;
}
}
else
@@ -27376,7 +27464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2932;
+ return 2940;
}
else
{
@@ -27384,7 +27472,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2936;
+ return 2944;
}
}
else
@@ -29192,7 +29280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2939;
+ return 2947;
}
else
{
@@ -29200,7 +29288,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2943;
+ return 2951;
}
}
else
@@ -29222,7 +29310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2940;
+ return 2948;
}
else
{
@@ -29230,7 +29318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2944;
+ return 2952;
}
}
else
@@ -29736,7 +29824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2941;
+ return 2949;
}
else
{
@@ -29744,7 +29832,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2945;
+ return 2953;
}
}
}
@@ -29766,7 +29854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2942;
+ return 2950;
}
else
{
@@ -29774,7 +29862,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2946;
+ return 2954;
}
}
}
@@ -29830,7 +29918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2913;
+ return 2921;
}
else
{
@@ -29838,7 +29926,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2912;
+ return 2920;
}
}
}
@@ -29941,7 +30029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2990;
+ return 2998;
}
else
{
@@ -29949,7 +30037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2989;
+ return 2997;
}
}
else
@@ -29960,7 +30048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 3001;
+ return 3009;
}
else
{
@@ -29970,7 +30058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 3009;
+ return 3017;
}
else
{
@@ -29978,7 +30066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 3008;
+ return 3016;
}
}
}
@@ -30506,11 +30594,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3131; break; /* addg --> smax. */
- case 3131: value = 3132; break; /* smax --> umax. */
- case 3132: value = 3133; break; /* umax --> smin. */
- case 3133: value = 3134; break; /* smin --> umin. */
- case 3134: return NULL; /* umin --> NULL. */
+ case 19: value = 3139; break; /* addg --> smax. */
+ case 3139: value = 3140; break; /* smax --> umax. */
+ case 3140: value = 3141; break; /* umax --> smin. */
+ case 3141: value = 3142; break; /* smin --> umin. */
+ case 3142: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30668,8 +30756,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 3005; break; /* fcvt --> bfcvt. */
- case 3005: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3013; break; /* fcvt --> bfcvt. */
+ case 3013: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index e44ad1622c8..a99d2a4a039 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1648,6 +1648,10 @@
{ \
QLF3(S_Q,P_M,S_Q), \
}
+#define OP_SVE_QQ \
+{ \
+ QLF2(S_Q,S_Q), \
+}
#define OP_SVE_QQQ \
{ \
QLF3(S_Q,S_Q,S_Q), \
@@ -5814,6 +5818,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("uunpk", 0xc135e001, 0xff3ffc23, sme_size_22_hsd, 0, OP2 (SME_Zdnx4, SME_Znx2), OP_SVE_VV_HSD_BHS, 0, 0),
SME2_INSN ("uvdot", 0xc1500030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
SME2_INSN ("uvdot", 0xc1508030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
+ SME2_INSN ("uzp", 0xc120d001, 0xff20fc01, sme_size_22, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
+ SME2_INSN ("uzp", 0xc120d401, 0xffe0fc01, sme_misc, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_QQQ, 0, 0),
+ SME2_INSN ("uzp", 0xc136e002, 0xff3ffc63, sme_size_22, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_VV_BHSD, 0, 0),
+ SME2_INSN ("uzp", 0xc137e002, 0xfffffc63, sme_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_QQ, 0, 0),
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
@@ -5823,6 +5831,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSN ("whilels", 0x25204c18, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("whilelt", 0x25204410, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
SME2_INSN ("zero", 0xc0480001, 0xffffffff, sme_misc, 0, OP1 (SME_ZT0_LIST), {}, 0, 0),
+ SME2_INSN ("zip", 0xc120d000, 0xff20fc01, sme_size_22, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
+ SME2_INSN ("zip", 0xc120d400, 0xffe0fc01, sme_misc, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_QQQ, 0, 0),
+ SME2_INSN ("zip", 0xc136e000, 0xff3ffc63, sme_size_22, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_VV_BHSD, 0, 0),
+ SME2_INSN ("zip", 0xc137e000, 0xfffffc63, sme_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_QQ, 0, 0),
/* SME2 I16I64 instructions. */
SME2_I16I64_INSN ("sdot", 0xc1d00008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (2), 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 26/31] aarch64: Add the SVE BFMLSL instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (24 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 25/31] aarch64: Add the SME2 UZP and ZIP instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 27/31] aarch64: Add new SVE dot-product instructions Richard Sandiford
` (6 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds the SVE BFMLSLB and BFMLSLT instructions,
which are available when FEAT_SME2 is implemented.
---
.../gas/aarch64/sve2-sme2-3-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-3-invalid.l | 17 +
.../gas/aarch64/sve2-sme2-3-invalid.s | 15 +
.../gas/aarch64/sve2-sme2-3-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-3-noarch.l | 29 +
gas/testsuite/gas/aarch64/sve2-sme2-3.d | 41 +
gas/testsuite/gas/aarch64/sve2-sme2-3.s | 35 +
opcodes/aarch64-dis-2.c | 1528 +++++++++--------
opcodes/aarch64-tbl.h | 7 +
9 files changed, 936 insertions(+), 742 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3.s
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.d
new file mode 100644
index 00000000000..2d3dbdb187c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sve2-sme2-3-invalid.s
+#error_output: sve2-sme2-3-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.l
new file mode 100644
index 00000000000..195931c7aad
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.l
@@ -0,0 +1,17 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `bfmlslb 0,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `bfmlslb z0\.s,0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfmlslb z0\.s,z0\.h,0'
+[^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `bfmlslb z0\.s,z0\.h,z8\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlslb z0\.s,z0\.h,z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlslb z0\.s,z0\.h,z0\.h\[8\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlslb z0\.h,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlslb z0\.s, z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlslb z0\.d,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: bfmlslb z0\.s, z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' used as input at operand 2 -- `bfmlslb z0\.s,z0\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `bfmlslb z0\.s,z1\.h,z2\.h\[0\]'
+[^ :]+:[0-9]+: Warning: predicated instruction expected after `movprfx' -- `bfmlslb z0\.s,z1\.h,z2\.h\[0\]'
+[^ :]+:[0-9]+: Warning: predicated instruction expected after `movprfx' -- `bfmlslb z0\.s,z1\.h,z2\.h\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.s
new file mode 100644
index 00000000000..f553e12d8f3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.s
@@ -0,0 +1,15 @@
+ bfmlslb 0, z0.h, z0.h[0]
+ bfmlslb z0.s, 0, z0.h[0]
+ bfmlslb z0.s, z0.h, 0
+
+ bfmlslb z0.s, z0.h, z8.h[0]
+ bfmlslb z0.s, z0.h, z0.h[-1]
+ bfmlslb z0.s, z0.h, z0.h[8]
+ bfmlslb z0.h, z0.h, z0.h[0]
+ bfmlslb z0.d, z0.h, z0.h[0]
+
+ movprfx z0, z1; bfmlslb z0.s, z0.h, z1.h[0]
+ movprfx z0, z1; bfmlslb z0.s, z1.h, z0.h[0]
+ movprfx z3, z4; bfmlslb z0.s, z1.h, z2.h[0]
+ movprfx z0.s, p0/m, z1.s; bfmlslb z0.s, z1.h, z2.h[0]
+ movprfx z0.s, p0/z, z1.s; bfmlslb z0.s, z1.h, z2.h[0]
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.d
new file mode 100644
index 00000000000..6e7278ee00d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sve2-sme2-3.s
+#error_output: sve2-sme2-3-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.l
new file mode 100644
index 00000000000..5015005aedb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.l
@@ -0,0 +1,29 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb Z0\.S,Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z31\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z0\.h,z7\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z5\.s,z22\.h,z4\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z1\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z31\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z25\.s,z13\.h,z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslb z0\.s,z1\.h,z2\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt Z0\.S,Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z31\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z0\.h,z7\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z0\.h,z0\.h\[7\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z5\.s,z22\.h,z4\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z1\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z31\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z25\.s,z13\.h,z6\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `bfmlslt z0\.s,z1\.h,z2\.h'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-3.d b/gas/testsuite/gas/aarch64/sve2-sme2-3.d
new file mode 100644
index 00000000000..2095aba0e65
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-3.d
@@ -0,0 +1,41 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 64e06000 bfmlslb z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 64e06000 bfmlslb z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 64e0601f bfmlslb z31\.s, z0\.h, z0\.h\[0\]
+[^:]+: 64e063e0 bfmlslb z0\.s, z31\.h, z0\.h\[0\]
+[^:]+: 64e76000 bfmlslb z0\.s, z0\.h, z7\.h\[0\]
+[^:]+: 64f86800 bfmlslb z0\.s, z0\.h, z0\.h\[7\]
+[^:]+: 64ec6ac5 bfmlslb z5\.s, z22\.h, z4\.h\[3\]
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 64e16020 bfmlslb z0\.s, z1\.h, z1\.h\[0\]
+[^:]+: 64e0a000 bfmlslb z0\.s, z0\.h, z0\.h
+[^:]+: 64e0a01f bfmlslb z31\.s, z0\.h, z0\.h
+[^:]+: 64e0a3e0 bfmlslb z0\.s, z31\.h, z0\.h
+[^:]+: 64ffa000 bfmlslb z0\.s, z0\.h, z31\.h
+[^:]+: 64e6a1b9 bfmlslb z25\.s, z13\.h, z6\.h
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 64e2a020 bfmlslb z0\.s, z1\.h, z2\.h
+[^:]+: 64e06400 bfmlslt z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 64e06400 bfmlslt z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 64e0641f bfmlslt z31\.s, z0\.h, z0\.h\[0\]
+[^:]+: 64e067e0 bfmlslt z0\.s, z31\.h, z0\.h\[0\]
+[^:]+: 64e76400 bfmlslt z0\.s, z0\.h, z7\.h\[0\]
+[^:]+: 64f86c00 bfmlslt z0\.s, z0\.h, z0\.h\[7\]
+[^:]+: 64ec6ec5 bfmlslt z5\.s, z22\.h, z4\.h\[3\]
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 64e16420 bfmlslt z0\.s, z1\.h, z1\.h\[0\]
+[^:]+: 64e0a400 bfmlslt z0\.s, z0\.h, z0\.h
+[^:]+: 64e0a41f bfmlslt z31\.s, z0\.h, z0\.h
+[^:]+: 64e0a7e0 bfmlslt z0\.s, z31\.h, z0\.h
+[^:]+: 64ffa400 bfmlslt z0\.s, z0\.h, z31\.h
+[^:]+: 64e6a5b9 bfmlslt z25\.s, z13\.h, z6\.h
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 64e2a420 bfmlslt z0\.s, z1\.h, z2\.h
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-3.s b/gas/testsuite/gas/aarch64/sve2-sme2-3.s
new file mode 100644
index 00000000000..2347efa27fc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-3.s
@@ -0,0 +1,35 @@
+ bfmlslb z0.s, z0.h, z0.h[0]
+ BFMLSLB Z0.S, Z0.H, Z0.H[0]
+ bfmlslb z31.s, z0.h, z0.h[0]
+ bfmlslb z0.s, z31.h, z0.h[0]
+ bfmlslb z0.s, z0.h, z7.h[0]
+ bfmlslb z0.s, z0.h, z0.h[7]
+ bfmlslb z5.s, z22.h, z4.h[3]
+
+ movprfx z0, z1; bfmlslb z0.s, z1.h, z1.h[0]
+
+ bfmlslb z0.s, z0.h, z0.h
+ bfmlslb z31.s, z0.h, z0.h
+ bfmlslb z0.s, z31.h, z0.h
+ bfmlslb z0.s, z0.h, z31.h
+ bfmlslb z25.s, z13.h, z6.h
+
+ movprfx z0, z1; bfmlslb z0.s, z1.h, z2.h
+
+ bfmlslt z0.s, z0.h, z0.h[0]
+ BFMLSLT Z0.S, Z0.H, Z0.H[0]
+ bfmlslt z31.s, z0.h, z0.h[0]
+ bfmlslt z0.s, z31.h, z0.h[0]
+ bfmlslt z0.s, z0.h, z7.h[0]
+ bfmlslt z0.s, z0.h, z0.h[7]
+ bfmlslt z5.s, z22.h, z4.h[3]
+
+ movprfx z0, z1; bfmlslt z0.s, z1.h, z1.h[0]
+
+ bfmlslt z0.s, z0.h, z0.h
+ bfmlslt z31.s, z0.h, z0.h
+ bfmlslt z0.s, z31.h, z0.h
+ bfmlslt z0.s, z0.h, z31.h
+ bfmlslt z25.s, z13.h, z6.h
+
+ movprfx z0, z1; bfmlslt z0.s, z1.h, z2.h
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index bf04e3fcb0b..a122e908630 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2461;
+ return 2465;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2462;
+ return 2466;
}
}
}
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2891;
+ return 2895;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2605;
+ return 2609;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2604;
+ return 2608;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2603;
+ return 2607;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2612;
+ return 2616;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2608;
+ return 2612;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2602;
+ return 2606;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2601;
+ return 2605;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2623;
+ return 2627;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2622;
+ return 2626;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2600;
+ return 2604;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2610;
+ return 2614;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2606;
+ return 2610;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2613;
+ return 2617;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2609;
+ return 2613;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2611;
+ return 2615;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2607;
+ return 2611;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2539;
+ return 2543;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2540;
+ return 2544;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2563;
+ return 2567;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2564;
+ return 2568;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2555;
+ return 2559;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2556;
+ return 2560;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2547;
+ return 2551;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2548;
+ return 2552;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2571;
+ return 2575;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2572;
+ return 2576;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2595;
+ return 2599;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2596;
+ return 2600;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2587;
+ return 2591;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2588;
+ return 2592;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2579;
+ return 2583;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2580;
+ return 2584;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2685;
+ return 2689;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2686;
+ return 2690;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2535;
+ return 2539;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2536;
+ return 2540;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2559;
+ return 2563;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2560;
+ return 2564;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2551;
+ return 2555;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2552;
+ return 2556;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2543;
+ return 2547;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2544;
+ return 2548;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2567;
+ return 2571;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2568;
+ return 2572;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2591;
+ return 2595;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2592;
+ return 2596;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2583;
+ return 2587;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2584;
+ return 2588;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2575;
+ return 2579;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2576;
+ return 2580;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2711;
+ return 2715;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2712;
+ return 2716;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2735;
+ return 2739;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2736;
+ return 2740;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2727;
+ return 2731;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2728;
+ return 2732;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2719;
+ return 2723;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2720;
+ return 2724;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2743;
+ return 2747;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2744;
+ return 2748;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2767;
+ return 2771;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2768;
+ return 2772;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2759;
+ return 2763;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2760;
+ return 2764;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2751;
+ return 2755;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2752;
+ return 2756;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2707;
+ return 2711;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2708;
+ return 2712;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2731;
+ return 2735;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2732;
+ return 2736;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2723;
+ return 2727;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2724;
+ return 2728;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2715;
+ return 2719;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2716;
+ return 2720;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2739;
+ return 2743;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2740;
+ return 2744;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2763;
+ return 2767;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2764;
+ return 2768;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2755;
+ return 2759;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2756;
+ return 2760;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2747;
+ return 2751;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2748;
+ return 2752;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2661;
+ return 2665;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2866;
+ return 2870;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2662;
+ return 2666;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2663;
+ return 2667;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2867;
+ return 2871;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2868;
+ return 2872;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2824;
+ return 2828;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2782;
+ return 2786;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2825;
+ return 2829;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2826;
+ return 2830;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2783;
+ return 2787;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2784;
+ return 2788;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2677;
+ return 2681;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2678;
+ return 2682;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2679;
+ return 2683;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2840;
+ return 2844;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2841;
+ return 2845;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2842;
+ return 2846;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2541;
+ return 2545;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2565;
+ return 2569;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2557;
+ return 2561;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2549;
+ return 2553;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2573;
+ return 2577;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2597;
+ return 2601;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2589;
+ return 2593;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2581;
+ return 2585;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2542;
+ return 2546;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2599;
+ return 2603;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2566;
+ return 2570;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2558;
+ return 2562;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2550;
+ return 2554;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2574;
+ return 2578;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2598;
+ return 2602;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2590;
+ return 2594;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2582;
+ return 2586;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2898;
+ return 2902;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2899;
+ return 2903;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2900;
+ return 2904;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2502;
+ return 2506;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2503;
+ return 2507;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2504;
+ return 2508;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2907;
+ return 2911;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2908;
+ return 2912;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2909;
+ return 2913;
}
}
}
@@ -1836,7 +1836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2444;
+ return 2448;
}
else
{
@@ -1846,7 +1846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2445;
+ return 2449;
}
else
{
@@ -1854,7 +1854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2446;
+ return 2450;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2901;
+ return 2905;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2902;
+ return 2906;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2903;
+ return 2907;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2516;
+ return 2520;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2517;
+ return 2521;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2518;
+ return 2522;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2848;
+ return 2852;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2910;
+ return 2914;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2911;
+ return 2915;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2912;
+ return 2916;
}
}
}
@@ -1988,7 +1988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2452;
+ return 2456;
}
else
{
@@ -1998,7 +1998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2453;
+ return 2457;
}
else
{
@@ -2006,7 +2006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2454;
+ return 2458;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2849;
+ return 2853;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2537;
+ return 2541;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2561;
+ return 2565;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2553;
+ return 2557;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2545;
+ return 2549;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2496;
+ return 2500;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2631;
+ return 2635;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2790;
+ return 2794;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2637;
+ return 2641;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2510;
+ return 2514;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2796;
+ return 2800;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2877;
+ return 2881;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2802;
+ return 2806;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2538;
+ return 2542;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2562;
+ return 2566;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2554;
+ return 2558;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2546;
+ return 2550;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2497;
+ return 2501;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2632;
+ return 2636;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2791;
+ return 2795;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2638;
+ return 2642;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2511;
+ return 2515;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2797;
+ return 2801;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2878;
+ return 2882;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2803;
+ return 2807;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2569;
+ return 2573;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2593;
+ return 2597;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2585;
+ return 2589;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2577;
+ return 2581;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2534;
+ return 2538;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2474;
+ return 2478;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2860;
+ return 2864;
}
}
else
@@ -2375,7 +2375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx011xxx
bfvdot. */
- return 2460;
+ return 2464;
}
else
{
@@ -2383,7 +2383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx011xxx
bfdot. */
- return 2438;
+ return 2442;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2778;
+ return 2782;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2570;
+ return 2574;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2594;
+ return 2598;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2586;
+ return 2590;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2578;
+ return 2582;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2475;
+ return 2479;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2874;
+ return 2878;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2861;
+ return 2865;
}
}
}
@@ -2480,7 +2480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx011xxx
bfdot. */
- return 2439;
+ return 2443;
}
else
{
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2789;
+ return 2793;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2779;
+ return 2783;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2914;
+ return 2918;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2915;
+ return 2919;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2653;
+ return 2657;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2654;
+ return 2658;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2655;
+ return 2659;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2896;
+ return 2900;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2897;
+ return 2901;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2904;
+ return 2908;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2669;
+ return 2673;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2670;
+ return 2674;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2671;
+ return 2675;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2916;
+ return 2920;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2917;
+ return 2921;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2816;
+ return 2820;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2817;
+ return 2821;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2818;
+ return 2822;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2905;
+ return 2909;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2906;
+ return 2910;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2913;
+ return 2917;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2832;
+ return 2836;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2833;
+ return 2837;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2834;
+ return 2838;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2665;
+ return 2669;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2666;
+ return 2670;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2667;
+ return 2671;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2668;
+ return 2672;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2870;
+ return 2874;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2871;
+ return 2875;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2872;
+ return 2876;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2873;
+ return 2877;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2476;
+ return 2480;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2477;
+ return 2481;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2478;
+ return 2482;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2479;
+ return 2483;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2506;
+ return 2510;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2507;
+ return 2511;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2508;
+ return 2512;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2509;
+ return 2513;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2657;
+ return 2661;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2658;
+ return 2662;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2659;
+ return 2663;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2660;
+ return 2664;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2498;
+ return 2502;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2499;
+ return 2503;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2500;
+ return 2504;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2501;
+ return 2505;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2664;
+ return 2668;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2869;
+ return 2873;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2639;
+ return 2643;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2640;
+ return 2644;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2641;
+ return 2645;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2642;
+ return 2646;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2505;
+ return 2509;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2656;
+ return 2660;
}
}
else
@@ -3166,7 +3166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2464;
+ return 2468;
}
else
{
@@ -3174,7 +3174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2465;
+ return 2469;
}
}
}
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2828;
+ return 2832;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2829;
+ return 2833;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2830;
+ return 2834;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2831;
+ return 2835;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2785;
+ return 2789;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2786;
+ return 2790;
}
}
}
@@ -3259,7 +3259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx10xxx
bfdot. */
- return 2440;
+ return 2444;
}
else
{
@@ -3267,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx10xxx
bfdot. */
- return 2441;
+ return 2445;
}
}
else
@@ -3278,7 +3278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx10xxx
bfdot. */
- return 2442;
+ return 2446;
}
else
{
@@ -3286,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx10xxx
bfdot. */
- return 2443;
+ return 2447;
}
}
}
@@ -3305,7 +3305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2448;
+ return 2452;
}
else
{
@@ -3313,7 +3313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2449;
+ return 2453;
}
}
else
@@ -3324,7 +3324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2450;
+ return 2454;
}
else
{
@@ -3332,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2451;
+ return 2455;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2820;
+ return 2824;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2821;
+ return 2825;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2822;
+ return 2826;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2823;
+ return 2827;
}
}
}
@@ -3388,7 +3388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx10xxx
add. */
- return 2430;
+ return 2434;
}
else
{
@@ -3396,7 +3396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx10xxx
add. */
- return 2431;
+ return 2435;
}
}
else
@@ -3407,7 +3407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx10xxx
add. */
- return 2432;
+ return 2436;
}
else
{
@@ -3415,7 +3415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx10xxx
add. */
- return 2433;
+ return 2437;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2827;
+ return 2831;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2804;
+ return 2808;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2805;
+ return 2809;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2806;
+ return 2810;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2807;
+ return 2811;
}
}
}
@@ -3485,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2447;
+ return 2451;
}
else
{
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2819;
+ return 2823;
}
}
else
@@ -3504,7 +3504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx10xxx
add. */
- return 2428;
+ return 2432;
}
else
{
@@ -3512,7 +3512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx10xxx
add. */
- return 2429;
+ return 2433;
}
}
}
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2681;
+ return 2685;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2682;
+ return 2686;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2683;
+ return 2687;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2684;
+ return 2688;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2520;
+ return 2524;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2521;
+ return 2525;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2522;
+ return 2526;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2523;
+ return 2527;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2673;
+ return 2677;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2674;
+ return 2678;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2675;
+ return 2679;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2676;
+ return 2680;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2512;
+ return 2516;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2513;
+ return 2517;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2514;
+ return 2518;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2515;
+ return 2519;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2680;
+ return 2684;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2862;
+ return 2866;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2863;
+ return 2867;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2864;
+ return 2868;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2865;
+ return 2869;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2633;
+ return 2637;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2634;
+ return 2638;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2635;
+ return 2639;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2636;
+ return 2640;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2519;
+ return 2523;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2672;
+ return 2676;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2532;
+ return 2536;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2533;
+ return 2537;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2844;
+ return 2848;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2845;
+ return 2849;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2846;
+ return 2850;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2847;
+ return 2851;
}
}
}
@@ -3896,7 +3896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2456;
+ return 2460;
}
else
{
@@ -3904,7 +3904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2457;
+ return 2461;
}
}
else
@@ -3915,7 +3915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2458;
+ return 2462;
}
else
{
@@ -3923,7 +3923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2459;
+ return 2463;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2836;
+ return 2840;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2837;
+ return 2841;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2838;
+ return 2842;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2839;
+ return 2843;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2774;
+ return 2778;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2775;
+ return 2779;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2776;
+ return 2780;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2777;
+ return 2781;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2843;
+ return 2847;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2780;
+ return 2784;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2781;
+ return 2785;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2798;
+ return 2802;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2799;
+ return 2803;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2800;
+ return 2804;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2801;
+ return 2805;
}
}
}
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2455;
+ return 2459;
}
else
{
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2835;
+ return 2839;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2772;
+ return 2776;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2773;
+ return 2777;
}
}
}
@@ -4145,7 +4145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0100xxxxxxxxxxxxx
sel. */
- return 2643;
+ return 2647;
}
else
{
@@ -4153,7 +4153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1100xxxxxxxxxxxxx
sel. */
- return 2644;
+ return 2648;
}
}
else
@@ -4170,7 +4170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110000xxxxxxxxx0
fclamp. */
- return 2466;
+ return 2470;
}
else
{
@@ -4178,7 +4178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110100xxxxxxxxx0
zip. */
- return 2892;
+ return 2896;
}
}
else
@@ -4187,7 +4187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x00xxxxxxxxx1
uzp. */
- return 2879;
+ return 2883;
}
}
else
@@ -4198,7 +4198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110010xxxxxxxxxx
fclamp. */
- return 2467;
+ return 2471;
}
else
{
@@ -4210,7 +4210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx00xxxxx
sqrshr. */
- return 2698;
+ return 2702;
}
else
{
@@ -4218,7 +4218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx10xxxxx
sqrshru. */
- return 2701;
+ return 2705;
}
}
else
@@ -4227,7 +4227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxxx1xxxxx
uqrshr. */
- return 2854;
+ return 2858;
}
}
}
@@ -4244,7 +4244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx0
sclamp. */
- return 2627;
+ return 2631;
}
else
{
@@ -4252,7 +4252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx1
uclamp. */
- return 2792;
+ return 2796;
}
}
else
@@ -4265,7 +4265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx0
zip. */
- return 2893;
+ return 2897;
}
else
{
@@ -4273,7 +4273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx1
uzp. */
- return 2880;
+ return 2884;
}
}
else
@@ -4286,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110xxxx110101xxxx0xxxxx
sqrshr. */
- return 2697;
+ return 2701;
}
else
{
@@ -4294,7 +4294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111xxxx110101xxxx0xxxxx
sqrshru. */
- return 2700;
+ return 2704;
}
}
else
@@ -4303,7 +4303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx110101xxxx1xxxxx
uqrshr. */
- return 2853;
+ return 2857;
}
}
}
@@ -4318,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx0
sclamp. */
- return 2628;
+ return 2632;
}
else
{
@@ -4326,7 +4326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx1
uclamp. */
- return 2793;
+ return 2797;
}
}
else
@@ -4339,7 +4339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx00xxxxx
sqrshrn. */
- return 2699;
+ return 2703;
}
else
{
@@ -4347,7 +4347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx10xxxxx
sqrshrun. */
- return 2702;
+ return 2706;
}
}
else
@@ -4356,7 +4356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxxx1xxxxx
uqrshrn. */
- return 2855;
+ return 2859;
}
}
}
@@ -4383,7 +4383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx0
smax. */
- return 2645;
+ return 2649;
}
else
{
@@ -4393,7 +4393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100001xx0xxxx0
fmax. */
- return 2480;
+ return 2484;
}
else
{
@@ -4401,7 +4401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100011xx0xxxx0
add. */
- return 2434;
+ return 2438;
}
}
}
@@ -4415,7 +4415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx0
smin. */
- return 2649;
+ return 2653;
}
else
{
@@ -4423,7 +4423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx0
srshl. */
- return 2703;
+ return 2707;
}
}
else
@@ -4432,7 +4432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx0
fmaxnm. */
- return 2484;
+ return 2488;
}
}
}
@@ -4446,7 +4446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2808;
+ return 2812;
}
else
{
@@ -4454,7 +4454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx0xxxx1
fmin. */
- return 2488;
+ return 2492;
}
}
else
@@ -4467,7 +4467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx1
umin. */
- return 2812;
+ return 2816;
}
else
{
@@ -4475,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx1
urshl. */
- return 2856;
+ return 2860;
}
}
else
@@ -4484,7 +4484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx1
fminnm. */
- return 2492;
+ return 2496;
}
}
}
@@ -4507,7 +4507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01x0000111000xxxx0xxxxx
fcvt. */
- return 2468;
+ return 2472;
}
else
{
@@ -4515,7 +4515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11x0000111000xxxx0xxxxx
bfcvt. */
- return 2436;
+ return 2440;
}
}
else
@@ -4526,7 +4526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101000111000xxxx0xxxxx
frintn. */
- return 2528;
+ return 2532;
}
else
{
@@ -4534,7 +4534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111000111000xxxx0xxxxx
frintn. */
- return 2529;
+ return 2533;
}
}
}
@@ -4546,7 +4546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x100111000xxxx0xxxxx
frinta. */
- return 2524;
+ return 2528;
}
else
{
@@ -4554,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x100111000xxxx0xxxxx
frinta. */
- return 2525;
+ return 2529;
}
}
}
@@ -4570,7 +4570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100010111000xxxx0xxxxx
scvtf. */
- return 2629;
+ return 2633;
}
else
{
@@ -4578,7 +4578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110010111000xxxx0xxxxx
scvtf. */
- return 2630;
+ return 2634;
}
}
else
@@ -4589,7 +4589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101010111000xxxx0xxxxx
frintm. */
- return 2526;
+ return 2530;
}
else
{
@@ -4597,7 +4597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111010111000xxxx0xxxxx
frintm. */
- return 2527;
+ return 2531;
}
}
}
@@ -4609,7 +4609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx0x
zip. */
- return 2894;
+ return 2898;
}
else
{
@@ -4617,7 +4617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx1x
uzp. */
- return 2881;
+ return 2885;
}
}
}
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxx00111000xxxx1xxxxx
fcvtn. */
- return 2469;
+ return 2473;
}
else
{
@@ -4640,7 +4640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxx00111000xxxx1xxxxx
bfcvtn. */
- return 2437;
+ return 2441;
}
}
else
@@ -4651,7 +4651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx10111000xxxx1xxxxx
ucvtf. */
- return 2794;
+ return 2798;
}
else
{
@@ -4659,7 +4659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx10111000xxxx1xxxxx
ucvtf. */
- return 2795;
+ return 2799;
}
}
}
@@ -4682,7 +4682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100001111000xxxx0xxxx0
fcvtzs. */
- return 2470;
+ return 2474;
}
else
{
@@ -4690,7 +4690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110001111000xxxx0xxxx0
fcvtzs. */
- return 2471;
+ return 2475;
}
}
else
@@ -4701,7 +4701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101001111000xxxx0xxxx0
frintp. */
- return 2530;
+ return 2534;
}
else
{
@@ -4709,7 +4709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111001111000xxxx0xxxx0
frintp. */
- return 2531;
+ return 2535;
}
}
}
@@ -4721,7 +4721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x001111000xxxx1xxxx0
fcvtzu. */
- return 2472;
+ return 2476;
}
else
{
@@ -4729,7 +4729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x001111000xxxx1xxxx0
fcvtzu. */
- return 2473;
+ return 2477;
}
}
}
@@ -4741,7 +4741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x101111000xxxxxxxxx0
sunpk. */
- return 2787;
+ return 2791;
}
else
{
@@ -4749,7 +4749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x101111000xxxxxxxxx0
sunpk. */
- return 2788;
+ return 2792;
}
}
}
@@ -4761,7 +4761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx01111000xxxxxxxxx1
uunpk. */
- return 2875;
+ return 2879;
}
else
{
@@ -4769,7 +4769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx01111000xxxxxxxxx1
uunpk. */
- return 2876;
+ return 2880;
}
}
}
@@ -4787,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010x011111000xxxx0xxxxx
sqcvt. */
- return 2687;
+ return 2691;
}
else
{
@@ -4795,7 +4795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110x011111000xxxx0xxxxx
sqcvtu. */
- return 2690;
+ return 2694;
}
}
else
@@ -4808,7 +4808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx00xxxxx
sqcvt. */
- return 2688;
+ return 2692;
}
else
{
@@ -4816,7 +4816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx00xxxxx
sqcvtu. */
- return 2691;
+ return 2695;
}
}
else
@@ -4827,7 +4827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx10xxxxx
sqcvtn. */
- return 2689;
+ return 2693;
}
else
{
@@ -4835,7 +4835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx10xxxxx
sqcvtun. */
- return 2692;
+ return 2696;
}
}
}
@@ -4848,7 +4848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx0x
zip. */
- return 2895;
+ return 2899;
}
else
{
@@ -4856,7 +4856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx1x
uzp. */
- return 2882;
+ return 2886;
}
}
}
@@ -4868,7 +4868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx11111000xxxx1xxxxx
uqcvt. */
- return 2850;
+ return 2854;
}
else
{
@@ -4878,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx01xxxxx
uqcvt. */
- return 2851;
+ return 2855;
}
else
{
@@ -4886,7 +4886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx11xxxxx
uqcvtn. */
- return 2852;
+ return 2856;
}
}
}
@@ -4906,7 +4906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2647;
+ return 2651;
}
else
{
@@ -4914,7 +4914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx0
fmax. */
- return 2482;
+ return 2486;
}
}
else
@@ -4927,7 +4927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx0
smin. */
- return 2651;
+ return 2655;
}
else
{
@@ -4935,7 +4935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx0
srshl. */
- return 2705;
+ return 2709;
}
}
else
@@ -4944,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx0
fmaxnm. */
- return 2486;
+ return 2490;
}
}
}
@@ -4958,7 +4958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2810;
+ return 2814;
}
else
{
@@ -4966,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx1
fmin. */
- return 2490;
+ return 2494;
}
}
else
@@ -4979,7 +4979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx1
umin. */
- return 2814;
+ return 2818;
}
else
{
@@ -4987,7 +4987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx1
urshl. */
- return 2858;
+ return 2862;
}
}
else
@@ -4996,7 +4996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx1
fminnm. */
- return 2494;
+ return 2498;
}
}
}
@@ -5016,7 +5016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2646;
+ return 2650;
}
else
{
@@ -5024,7 +5024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2648;
+ return 2652;
}
}
else
@@ -5037,7 +5037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101001xx0xxxx0
fmax. */
- return 2481;
+ return 2485;
}
else
{
@@ -5045,7 +5045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111001xx0xxxx0
fmax. */
- return 2483;
+ return 2487;
}
}
else
@@ -5054,7 +5054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1x1011xx0xxxx0
add. */
- return 2435;
+ return 2439;
}
}
}
@@ -5070,7 +5070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx0
smin. */
- return 2650;
+ return 2654;
}
else
{
@@ -5078,7 +5078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx0
smin. */
- return 2652;
+ return 2656;
}
}
else
@@ -5089,7 +5089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx0
srshl. */
- return 2704;
+ return 2708;
}
else
{
@@ -5097,7 +5097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx0
srshl. */
- return 2706;
+ return 2710;
}
}
}
@@ -5109,7 +5109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx0
fmaxnm. */
- return 2485;
+ return 2489;
}
else
{
@@ -5117,7 +5117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx0
fmaxnm. */
- return 2487;
+ return 2491;
}
}
}
@@ -5134,7 +5134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx1
umax. */
- return 2809;
+ return 2813;
}
else
{
@@ -5142,7 +5142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx1
umax. */
- return 2811;
+ return 2815;
}
}
else
@@ -5153,7 +5153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx0xxxx1
fmin. */
- return 2489;
+ return 2493;
}
else
{
@@ -5161,7 +5161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx0xxxx1
fmin. */
- return 2491;
+ return 2495;
}
}
}
@@ -5177,7 +5177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx1
umin. */
- return 2813;
+ return 2817;
}
else
{
@@ -5185,7 +5185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx1
umin. */
- return 2815;
+ return 2819;
}
}
else
@@ -5196,7 +5196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx1
urshl. */
- return 2857;
+ return 2861;
}
else
{
@@ -5204,7 +5204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx1
urshl. */
- return 2859;
+ return 2863;
}
}
}
@@ -5216,7 +5216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx1
fminnm. */
- return 2493;
+ return 2497;
}
else
{
@@ -5224,7 +5224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx1
fminnm. */
- return 2495;
+ return 2499;
}
}
}
@@ -5241,7 +5241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001xxxxxxxxxx
sqdmulh. */
- return 2693;
+ return 2697;
}
else
{
@@ -5249,7 +5249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101xxxxxxxxxx
sqdmulh. */
- return 2695;
+ return 2699;
}
}
else
@@ -5260,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011xxxxxxxxxx
sqdmulh. */
- return 2694;
+ return 2698;
}
else
{
@@ -5268,7 +5268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111xxxxxxxxxx
sqdmulh. */
- return 2696;
+ return 2700;
}
}
}
@@ -5296,7 +5296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2713;
+ return 2717;
}
else
{
@@ -5304,7 +5304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2737;
+ return 2741;
}
}
else
@@ -5315,7 +5315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2729;
+ return 2733;
}
else
{
@@ -5323,7 +5323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2721;
+ return 2725;
}
}
}
@@ -5337,7 +5337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2745;
+ return 2749;
}
else
{
@@ -5345,7 +5345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2769;
+ return 2773;
}
}
else
@@ -5356,7 +5356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2761;
+ return 2765;
}
else
{
@@ -5364,7 +5364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2753;
+ return 2757;
}
}
}
@@ -5392,7 +5392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2714;
+ return 2718;
}
else
{
@@ -5400,7 +5400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2771;
+ return 2775;
}
}
else
@@ -5409,7 +5409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2738;
+ return 2742;
}
}
else
@@ -5420,7 +5420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2730;
+ return 2734;
}
else
{
@@ -5428,7 +5428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2722;
+ return 2726;
}
}
}
@@ -5442,7 +5442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2746;
+ return 2750;
}
else
{
@@ -5450,7 +5450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2770;
+ return 2774;
}
}
else
@@ -5461,7 +5461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2762;
+ return 2766;
}
else
{
@@ -5469,7 +5469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2754;
+ return 2758;
}
}
}
@@ -5511,7 +5511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2709;
+ return 2713;
}
else
{
@@ -5519,7 +5519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2710;
+ return 2714;
}
}
else
@@ -5530,7 +5530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2733;
+ return 2737;
}
else
{
@@ -5538,7 +5538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2734;
+ return 2738;
}
}
}
@@ -5552,7 +5552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2725;
+ return 2729;
}
else
{
@@ -5560,7 +5560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2726;
+ return 2730;
}
}
else
@@ -5571,7 +5571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2717;
+ return 2721;
}
else
{
@@ -5579,7 +5579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2718;
+ return 2722;
}
}
}
@@ -5596,7 +5596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2741;
+ return 2745;
}
else
{
@@ -5604,7 +5604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2742;
+ return 2746;
}
}
else
@@ -5615,7 +5615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2765;
+ return 2769;
}
else
{
@@ -5623,7 +5623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2766;
+ return 2770;
}
}
}
@@ -5637,7 +5637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2757;
+ return 2761;
}
else
{
@@ -5645,7 +5645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2758;
+ return 2762;
}
}
else
@@ -5656,7 +5656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2749;
+ return 2753;
}
else
{
@@ -5664,7 +5664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2750;
+ return 2754;
}
}
}
@@ -8066,7 +8066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2958;
+ return 2962;
}
else
{
@@ -8074,7 +8074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2966;
+ return 2970;
}
}
else
@@ -8085,7 +8085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2962;
+ return 2966;
}
else
{
@@ -8093,7 +8093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2969;
+ return 2973;
}
}
}
@@ -8131,7 +8131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 3018;
+ return 3022;
}
else
{
@@ -8139,7 +8139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3024;
+ return 3028;
}
}
else
@@ -8150,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3021;
+ return 3025;
}
else
{
@@ -8158,7 +8158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3027;
+ return 3031;
}
}
}
@@ -8172,7 +8172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3042;
+ return 3046;
}
else
{
@@ -8180,7 +8180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3048;
+ return 3052;
}
}
else
@@ -8191,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3045;
+ return 3049;
}
else
{
@@ -8199,7 +8199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3051;
+ return 3055;
}
}
}
@@ -8216,7 +8216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3030;
+ return 3034;
}
else
{
@@ -8224,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3036;
+ return 3040;
}
}
else
@@ -8235,7 +8235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3033;
+ return 3037;
}
else
{
@@ -8243,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3039;
+ return 3043;
}
}
}
@@ -8257,7 +8257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3054;
+ return 3058;
}
else
{
@@ -8265,7 +8265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3060;
+ return 3064;
}
}
else
@@ -8276,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3057;
+ return 3061;
}
else
{
@@ -8284,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3063;
+ return 3067;
}
}
}
@@ -8349,7 +8349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2959;
+ return 2963;
}
else
{
@@ -8357,7 +8357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2967;
+ return 2971;
}
}
else
@@ -8368,7 +8368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2963;
+ return 2967;
}
else
{
@@ -8376,7 +8376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2970;
+ return 2974;
}
}
}
@@ -8414,7 +8414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 3019;
+ return 3023;
}
else
{
@@ -8422,7 +8422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3025;
+ return 3029;
}
}
else
@@ -8433,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3022;
+ return 3026;
}
else
{
@@ -8441,7 +8441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3028;
+ return 3032;
}
}
}
@@ -8455,7 +8455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3043;
+ return 3047;
}
else
{
@@ -8463,7 +8463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3049;
+ return 3053;
}
}
else
@@ -8474,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3046;
+ return 3050;
}
else
{
@@ -8482,7 +8482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3052;
+ return 3056;
}
}
}
@@ -8499,7 +8499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3031;
+ return 3035;
}
else
{
@@ -8507,7 +8507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3037;
+ return 3041;
}
}
else
@@ -8518,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3034;
+ return 3038;
}
else
{
@@ -8526,7 +8526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3040;
+ return 3044;
}
}
}
@@ -8540,7 +8540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3055;
+ return 3059;
}
else
{
@@ -8548,7 +8548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3061;
+ return 3065;
}
}
else
@@ -8559,7 +8559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3058;
+ return 3062;
}
else
{
@@ -8567,7 +8567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3064;
+ return 3068;
}
}
}
@@ -8635,7 +8635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2961;
+ return 2965;
}
else
{
@@ -8643,7 +8643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2968;
+ return 2972;
}
}
else
@@ -8652,7 +8652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2965;
+ return 2969;
}
}
else
@@ -8663,7 +8663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2960;
+ return 2964;
}
else
{
@@ -8671,7 +8671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2964;
+ return 2968;
}
}
}
@@ -8733,7 +8733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 3020;
+ return 3024;
}
else
{
@@ -8741,7 +8741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3114;
+ return 3118;
}
}
else
@@ -8752,7 +8752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3026;
+ return 3030;
}
else
{
@@ -8760,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3116;
+ return 3120;
}
}
}
@@ -8774,7 +8774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3023;
+ return 3027;
}
else
{
@@ -8782,7 +8782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3115;
+ return 3119;
}
}
else
@@ -8791,7 +8791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3029;
+ return 3033;
}
}
}
@@ -8807,7 +8807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3044;
+ return 3048;
}
else
{
@@ -8815,7 +8815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3120;
+ return 3124;
}
}
else
@@ -8826,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3050;
+ return 3054;
}
else
{
@@ -8834,7 +8834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3122;
+ return 3126;
}
}
}
@@ -8848,7 +8848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3047;
+ return 3051;
}
else
{
@@ -8856,7 +8856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3121;
+ return 3125;
}
}
else
@@ -8865,7 +8865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3053;
+ return 3057;
}
}
}
@@ -8884,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3032;
+ return 3036;
}
else
{
@@ -8892,7 +8892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3117;
+ return 3121;
}
}
else
@@ -8903,7 +8903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3038;
+ return 3042;
}
else
{
@@ -8911,7 +8911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3119;
+ return 3123;
}
}
}
@@ -8925,7 +8925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3035;
+ return 3039;
}
else
{
@@ -8933,7 +8933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3118;
+ return 3122;
}
}
else
@@ -8942,7 +8942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3041;
+ return 3045;
}
}
}
@@ -8958,7 +8958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3056;
+ return 3060;
}
else
{
@@ -8966,7 +8966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3123;
+ return 3127;
}
}
else
@@ -8977,7 +8977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3062;
+ return 3066;
}
else
{
@@ -8985,7 +8985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3125;
+ return 3129;
}
}
}
@@ -8999,7 +8999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3059;
+ return 3063;
}
else
{
@@ -9007,7 +9007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3124;
+ return 3128;
}
}
else
@@ -9016,7 +9016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3065;
+ return 3069;
}
}
}
@@ -9389,7 +9389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3143;
+ return 3147;
}
else
{
@@ -9407,7 +9407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3146;
+ return 3150;
}
}
}
@@ -9487,7 +9487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2956;
+ return 2960;
}
else
{
@@ -9495,7 +9495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2957;
+ return 2961;
}
}
else
@@ -9602,7 +9602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3148;
+ return 3152;
}
}
}
@@ -9618,7 +9618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3145;
+ return 3149;
}
else
{
@@ -9663,7 +9663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2955;
+ return 2959;
}
else
{
@@ -9757,7 +9757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3147;
+ return 3151;
}
}
}
@@ -9887,7 +9887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3149;
+ return 3153;
}
}
}
@@ -9903,7 +9903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3144;
+ return 3148;
}
else
{
@@ -10745,7 +10745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2975;
+ return 2979;
}
}
}
@@ -10819,7 +10819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2976;
+ return 2980;
}
}
}
@@ -13493,7 +13493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2974;
+ return 2978;
}
}
}
@@ -15197,7 +15197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 3003;
+ return 3007;
}
}
else
@@ -15440,7 +15440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2979;
+ return 2983;
}
else
{
@@ -15448,7 +15448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2980;
+ return 2984;
}
}
else
@@ -15680,7 +15680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 3000;
+ return 3004;
}
else
{
@@ -15701,7 +15701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 3007;
+ return 3011;
}
else
{
@@ -15709,7 +15709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 3006;
+ return 3010;
}
}
else
@@ -15764,7 +15764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2999;
+ return 3003;
}
else
{
@@ -15776,7 +15776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 3005;
+ return 3009;
}
else
{
@@ -15784,7 +15784,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 3004;
+ return 3008;
}
}
else
@@ -15835,7 +15835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2983;
+ return 2987;
}
else
{
@@ -15843,7 +15843,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2984;
+ return 2988;
}
}
else
@@ -16097,11 +16097,33 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x11001x0111xxxxx101xxxxxxxxxxxxx
- st1h. */
- return 1914;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 011001x0111xxxxx101xx0xxxxxxxxxx
+ bfmlslb. */
+ return 2421;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 011001x0111xxxxx101xx1xxxxxxxxxx
+ bfmlslt. */
+ return 2423;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 111001x0111xxxxx101xxxxxxxxxxxxx
+ st1h. */
+ return 1914;
+ }
}
}
}
@@ -16163,11 +16185,33 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x11001x0111xxxxx011xxxxxxxxxxxxx
- st4h. */
- return 1948;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 10) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 011001x0111xxxxx011xx0xxxxxxxxxx
+ bfmlslb. */
+ return 2420;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 011001x0111xxxxx011xx1xxxxxxxxxx
+ bfmlslt. */
+ return 2422;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 111001x0111xxxxx011xxxxxxxxxxxxx
+ st4h. */
+ return 1948;
+ }
}
}
}
@@ -16202,7 +16246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2977;
+ return 2981;
}
else
{
@@ -16235,7 +16279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 3001;
+ return 3005;
}
else
{
@@ -16265,7 +16309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2978;
+ return 2982;
}
else
{
@@ -16394,7 +16438,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2987;
+ return 2991;
}
else
{
@@ -16404,7 +16448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2989;
+ return 2993;
}
else
{
@@ -16412,7 +16456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2991;
+ return 2995;
}
}
}
@@ -16424,7 +16468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2988;
+ return 2992;
}
else
{
@@ -16434,7 +16478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2990;
+ return 2994;
}
else
{
@@ -16442,7 +16486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2992;
+ return 2996;
}
}
}
@@ -17501,7 +17545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2971;
+ return 2975;
}
else
{
@@ -17509,7 +17553,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2973;
+ return 2977;
}
}
else
@@ -17518,7 +17562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2972;
+ return 2976;
}
}
}
@@ -19014,7 +19058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2981;
+ return 2985;
}
else
{
@@ -19022,7 +19066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2982;
+ return 2986;
}
}
}
@@ -19396,7 +19440,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2985;
+ return 2989;
}
else
{
@@ -19404,7 +19448,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2986;
+ return 2990;
}
}
}
@@ -19765,7 +19809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2883;
+ return 2887;
}
else
{
@@ -19773,7 +19817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2884;
+ return 2888;
}
}
else
@@ -19786,7 +19830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx0
whilege. */
- return 2420;
+ return 2424;
}
else
{
@@ -19794,7 +19838,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx1
whilegt. */
- return 2421;
+ return 2425;
}
}
else
@@ -19803,7 +19847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2624;
+ return 2628;
}
}
}
@@ -19817,7 +19861,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2886;
+ return 2890;
}
else
{
@@ -19825,7 +19869,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2885;
+ return 2889;
}
}
else
@@ -19838,7 +19882,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx0
whilehs. */
- return 2423;
+ return 2427;
}
else
{
@@ -19846,7 +19890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx1
whilehi. */
- return 2422;
+ return 2426;
}
}
else
@@ -19855,7 +19899,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2626;
+ return 2630;
}
}
}
@@ -19872,7 +19916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2890;
+ return 2894;
}
else
{
@@ -19880,7 +19924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2887;
+ return 2891;
}
}
else
@@ -19893,7 +19937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx0
whilelt. */
- return 2427;
+ return 2431;
}
else
{
@@ -19901,7 +19945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx1
whilele. */
- return 2424;
+ return 2428;
}
}
else
@@ -19910,7 +19954,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2625;
+ return 2629;
}
}
}
@@ -19924,7 +19968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2888;
+ return 2892;
}
else
{
@@ -19932,7 +19976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2889;
+ return 2893;
}
}
else
@@ -19943,7 +19987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx0
whilelo. */
- return 2425;
+ return 2429;
}
else
{
@@ -19951,7 +19995,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx1
whilels. */
- return 2426;
+ return 2430;
}
}
}
@@ -21058,7 +21102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 3002;
+ return 3006;
}
}
else
@@ -21717,7 +21761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2463;
+ return 2467;
}
}
else
@@ -22419,7 +22463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3138;
+ return 3142;
}
else
{
@@ -22999,7 +23043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3066;
+ return 3070;
}
else
{
@@ -23007,7 +23051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3068;
+ return 3072;
}
}
else
@@ -23018,7 +23062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3072;
+ return 3076;
}
else
{
@@ -23026,7 +23070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3074;
+ return 3078;
}
}
}
@@ -23040,7 +23084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3069;
+ return 3073;
}
else
{
@@ -23048,7 +23092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3071;
+ return 3075;
}
}
else
@@ -23059,7 +23103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3075;
+ return 3079;
}
else
{
@@ -23067,7 +23111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3077;
+ return 3081;
}
}
}
@@ -23084,7 +23128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3090;
+ return 3094;
}
else
{
@@ -23092,7 +23136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3092;
+ return 3096;
}
}
else
@@ -23103,7 +23147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3096;
+ return 3100;
}
else
{
@@ -23111,7 +23155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3098;
+ return 3102;
}
}
}
@@ -23125,7 +23169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3093;
+ return 3097;
}
else
{
@@ -23133,7 +23177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3095;
+ return 3099;
}
}
else
@@ -23144,7 +23188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3099;
+ return 3103;
}
else
{
@@ -23152,7 +23196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3101;
+ return 3105;
}
}
}
@@ -23172,7 +23216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3078;
+ return 3082;
}
else
{
@@ -23180,7 +23224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3080;
+ return 3084;
}
}
else
@@ -23191,7 +23235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3084;
+ return 3088;
}
else
{
@@ -23199,7 +23243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3086;
+ return 3090;
}
}
}
@@ -23213,7 +23257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3081;
+ return 3085;
}
else
{
@@ -23221,7 +23265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3083;
+ return 3087;
}
}
else
@@ -23232,7 +23276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3087;
+ return 3091;
}
else
{
@@ -23240,7 +23284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3089;
+ return 3093;
}
}
}
@@ -23257,7 +23301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3102;
+ return 3106;
}
else
{
@@ -23265,7 +23309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3104;
+ return 3108;
}
}
else
@@ -23276,7 +23320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3108;
+ return 3112;
}
else
{
@@ -23284,7 +23328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3110;
+ return 3114;
}
}
}
@@ -23298,7 +23342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3105;
+ return 3109;
}
else
{
@@ -23306,7 +23350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3107;
+ return 3111;
}
}
else
@@ -23317,7 +23361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3111;
+ return 3115;
}
else
{
@@ -23325,7 +23369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3113;
+ return 3117;
}
}
}
@@ -23359,7 +23403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3067;
+ return 3071;
}
else
{
@@ -23367,7 +23411,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3126;
+ return 3130;
}
}
else
@@ -23378,7 +23422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3073;
+ return 3077;
}
else
{
@@ -23386,7 +23430,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3128;
+ return 3132;
}
}
}
@@ -23400,7 +23444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3070;
+ return 3074;
}
else
{
@@ -23408,7 +23452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3127;
+ return 3131;
}
}
else
@@ -23417,7 +23461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3076;
+ return 3080;
}
}
}
@@ -23433,7 +23477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3091;
+ return 3095;
}
else
{
@@ -23441,7 +23485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3132;
+ return 3136;
}
}
else
@@ -23452,7 +23496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3097;
+ return 3101;
}
else
{
@@ -23460,7 +23504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3134;
+ return 3138;
}
}
}
@@ -23474,7 +23518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3094;
+ return 3098;
}
else
{
@@ -23482,7 +23526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3133;
+ return 3137;
}
}
else
@@ -23491,7 +23535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3100;
+ return 3104;
}
}
}
@@ -23510,7 +23554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3079;
+ return 3083;
}
else
{
@@ -23518,7 +23562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3129;
+ return 3133;
}
}
else
@@ -23529,7 +23573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3085;
+ return 3089;
}
else
{
@@ -23537,7 +23581,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3131;
+ return 3135;
}
}
}
@@ -23551,7 +23595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3082;
+ return 3086;
}
else
{
@@ -23559,7 +23603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3130;
+ return 3134;
}
}
else
@@ -23568,7 +23612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3088;
+ return 3092;
}
}
}
@@ -23584,7 +23628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3103;
+ return 3107;
}
else
{
@@ -23592,7 +23636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3135;
+ return 3139;
}
}
else
@@ -23603,7 +23647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3109;
+ return 3113;
}
else
{
@@ -23611,7 +23655,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3137;
+ return 3141;
}
}
}
@@ -23625,7 +23669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3106;
+ return 3110;
}
else
{
@@ -23633,7 +23677,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3136;
+ return 3140;
}
}
else
@@ -23642,7 +23686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3112;
+ return 3116;
}
}
}
@@ -23809,7 +23853,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2993;
+ return 2997;
}
}
}
@@ -23842,7 +23886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2919;
+ return 2923;
}
}
else
@@ -23916,7 +23960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2995;
+ return 2999;
}
}
}
@@ -23949,7 +23993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2996;
+ return 3000;
}
}
else
@@ -23996,7 +24040,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2926;
+ return 2930;
}
else
{
@@ -24004,7 +24048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2928;
+ return 2932;
}
}
else
@@ -24015,7 +24059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2930;
+ return 2934;
}
else
{
@@ -24029,7 +24073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2931;
+ return 2935;
}
else
{
@@ -24037,7 +24081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2924;
+ return 2928;
}
}
else
@@ -24046,7 +24090,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2933;
+ return 2937;
}
}
else
@@ -24059,7 +24103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2932;
+ return 2936;
}
else
{
@@ -24067,7 +24111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2937;
+ return 2941;
}
}
else
@@ -24076,7 +24120,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2934;
+ return 2938;
}
}
}
@@ -24257,7 +24301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2918;
+ return 2922;
}
}
else
@@ -24288,7 +24332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2994;
+ return 2998;
}
else
{
@@ -24307,7 +24351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 3010;
+ return 3014;
}
else
{
@@ -24317,7 +24361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 3008;
+ return 3012;
}
else
{
@@ -24327,7 +24371,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 3015;
+ return 3019;
}
else
{
@@ -24335,7 +24379,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 3014;
+ return 3018;
}
}
}
@@ -24919,7 +24963,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 3011;
+ return 3015;
}
else
{
@@ -24927,7 +24971,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 3012;
+ return 3016;
}
}
}
@@ -25245,7 +25289,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2929;
+ return 2933;
}
}
else
@@ -25856,7 +25900,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2922;
+ return 2926;
}
}
}
@@ -25908,7 +25952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2935;
+ return 2939;
}
}
}
@@ -26151,7 +26195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2925;
+ return 2929;
}
}
else
@@ -26227,7 +26271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2938;
+ return 2942;
}
}
else
@@ -27053,7 +27097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2923;
+ return 2927;
}
}
else
@@ -27085,7 +27129,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2936;
+ return 2940;
}
}
else
@@ -27325,7 +27369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2927;
+ return 2931;
}
}
else
@@ -27357,7 +27401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2941;
+ return 2945;
}
else
{
@@ -27365,7 +27409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2945;
+ return 2949;
}
}
}
@@ -27387,7 +27431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2942;
+ return 2946;
}
else
{
@@ -27395,7 +27439,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2946;
+ return 2950;
}
}
}
@@ -27434,7 +27478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2939;
+ return 2943;
}
else
{
@@ -27442,7 +27486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2943;
+ return 2947;
}
}
else
@@ -27464,7 +27508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2940;
+ return 2944;
}
else
{
@@ -27472,7 +27516,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2944;
+ return 2948;
}
}
else
@@ -29280,7 +29324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2947;
+ return 2951;
}
else
{
@@ -29288,7 +29332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2951;
+ return 2955;
}
}
else
@@ -29310,7 +29354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2948;
+ return 2952;
}
else
{
@@ -29318,7 +29362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2952;
+ return 2956;
}
}
else
@@ -29824,7 +29868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2949;
+ return 2953;
}
else
{
@@ -29832,7 +29876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2953;
+ return 2957;
}
}
}
@@ -29854,7 +29898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2950;
+ return 2954;
}
else
{
@@ -29862,7 +29906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2954;
+ return 2958;
}
}
}
@@ -29918,7 +29962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2921;
+ return 2925;
}
else
{
@@ -29926,7 +29970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2920;
+ return 2924;
}
}
}
@@ -30029,7 +30073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2998;
+ return 3002;
}
else
{
@@ -30037,7 +30081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2997;
+ return 3001;
}
}
else
@@ -30048,7 +30092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 3009;
+ return 3013;
}
else
{
@@ -30058,7 +30102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 3017;
+ return 3021;
}
else
{
@@ -30066,7 +30110,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 3016;
+ return 3020;
}
}
}
@@ -30557,22 +30601,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
+ case 2616: value = 2624; break; /* mov --> mova. */
+ case 2624: return NULL; /* mova --> NULL. */
case 2612: value = 2620; break; /* mov --> mova. */
case 2620: return NULL; /* mova --> NULL. */
- case 2608: value = 2616; break; /* mov --> mova. */
- case 2616: return NULL; /* mova --> NULL. */
+ case 2614: value = 2622; break; /* mov --> mova. */
+ case 2622: return NULL; /* mova --> NULL. */
case 2610: value = 2618; break; /* mov --> mova. */
case 2618: return NULL; /* mova --> NULL. */
- case 2606: value = 2614; break; /* mov --> mova. */
- case 2614: return NULL; /* mova --> NULL. */
+ case 2617: value = 2625; break; /* mov --> mova. */
+ case 2625: return NULL; /* mova --> NULL. */
case 2613: value = 2621; break; /* mov --> mova. */
case 2621: return NULL; /* mova --> NULL. */
- case 2609: value = 2617; break; /* mov --> mova. */
- case 2617: return NULL; /* mova --> NULL. */
+ case 2615: value = 2623; break; /* mov --> mova. */
+ case 2623: return NULL; /* mova --> NULL. */
case 2611: value = 2619; break; /* mov --> mova. */
case 2619: return NULL; /* mova --> NULL. */
- case 2607: value = 2615; break; /* mov --> mova. */
- case 2615: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -30594,11 +30638,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3139; break; /* addg --> smax. */
- case 3139: value = 3140; break; /* smax --> umax. */
- case 3140: value = 3141; break; /* umax --> smin. */
- case 3141: value = 3142; break; /* smin --> umin. */
- case 3142: return NULL; /* umin --> NULL. */
+ case 19: value = 3143; break; /* addg --> smax. */
+ case 3143: value = 3144; break; /* smax --> umax. */
+ case 3144: value = 3145; break; /* umax --> smin. */
+ case 3145: value = 3146; break; /* smin --> umin. */
+ case 3146: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30756,8 +30800,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 3013; break; /* fcvt --> bfcvt. */
- case 3013: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3017; break; /* fcvt --> bfcvt. */
+ case 3017: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index a99d2a4a039..6936c36ea8a 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2728,6 +2728,9 @@ static const aarch64_feature_set aarch64_feature_cssc =
#define SME2_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SME2, OPS, QUALS, \
F_STRICT | FLAGS, 0, TIED, NULL }
+#define SME2_INSNC(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,CONSTRAINTS,TIED) \
+ { NAME, OPCODE, MASK, CLASS, OP, SME2, OPS, QUALS, \
+ FLAGS | F_STRICT, CONSTRAINTS, TIED, NULL }
#define SME2_I16I64_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
{ NAME, OPCODE, MASK, CLASS, OP, SME2_I16I64, OPS, QUALS, \
F_STRICT | FLAGS, 0, TIED, NULL }
@@ -5357,6 +5360,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_PNd, SVE_PNg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
/* SME2 extensions to SVE2. */
+ SME2_INSNC ("bfmlslb", 0x64e06000, 0xffe0f400, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_11_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("bfmlslb", 0x64e0a000, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("bfmlslt", 0x64e06400, 0xffe0f400, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_11_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("bfmlslt", 0x64e0a400, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSN ("whilege", 0x25205010, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25205011, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25205811, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 27/31] aarch64: Add new SVE dot-product instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (25 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 26/31] aarch64: Add the SVE BFMLSL instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 28/31] aarch64: Add new SVE saturating conversion instructions Richard Sandiford
` (5 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds the SVE FDOT, SDOT and UDOT instructions,
which are available when FEAT_SME2 is implemented. The patch
also reorders the existing SVE_Zm3_22_INDEX to keep the
operands numerically sorted.
---
gas/config/tc-aarch64.c | 1 +
gas/testsuite/gas/aarch64/sve-invalid.l | 16 +-
.../gas/aarch64/sve2-sme2-4-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-4-invalid.l | 17 +
.../gas/aarch64/sve2-sme2-4-invalid.s | 15 +
.../gas/aarch64/sve2-sme2-4-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-4-noarch.l | 40 +
gas/testsuite/gas/aarch64/sve2-sme2-4.d | 54 +
gas/testsuite/gas/aarch64/sve2-sme2-4.s | 49 +
include/opcode/aarch64.h | 3 +-
opcodes/aarch64-asm-2.c | 69 +-
opcodes/aarch64-dis-2.c | 1673 +++++++++--------
opcodes/aarch64-opc-2.c | 3 +-
opcodes/aarch64-opc.c | 3 +
opcodes/aarch64-opc.h | 1 +
opcodes/aarch64-tbl.h | 15 +-
16 files changed, 1111 insertions(+), 854 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 781c87bbc41..5aa51400c03 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6732,6 +6732,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_Zm3_INDEX:
case AARCH64_OPND_SVE_Zm3_22_INDEX:
+ case AARCH64_OPND_SVE_Zm3_19_INDEX:
case AARCH64_OPND_SVE_Zm3_11_INDEX:
case AARCH64_OPND_SVE_Zm4_11_INDEX:
case AARCH64_OPND_SVE_Zm4_INDEX:
diff --git a/gas/testsuite/gas/aarch64/sve-invalid.l b/gas/testsuite/gas/aarch64/sve-invalid.l
index a02fbfe28ef..3dcb06341e5 100644
--- a/gas/testsuite/gas/aarch64/sve-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve-invalid.l
@@ -1155,14 +1155,10 @@
.*: Info: sdot z0\.d, z1\.h, z2\.h
.*: Error: operand mismatch -- `sdot z0\.h,z1\.h,z2\.h'
.*: Info: did you mean this\?
-.*: Info: sdot z0\.d, z1\.h, z2\.h
-.*: Info: other valid variant\(s\):
-.*: Info: sdot z0\.s, z1\.b, z2\.b
+.*: Info: sdot z0\.s, z1\.h, z2\.h
.*: Error: operand mismatch -- `sdot z0\.s,z1\.s,z2\.s'
.*: Info: did you mean this\?
-.*: Info: sdot z0\.s, z1\.b, z2\.b
-.*: Info: other valid variant\(s\):
-.*: Info: sdot z0\.d, z1\.h, z2\.h
+.*: Info: sdot z0\.s, z1\.h, z2\.h
.*: Error: operand mismatch -- `sdot z0\.d,z1\.d,z2\.d'
.*: Info: did you mean this\?
.*: Info: sdot z0\.d, z1\.h, z2\.h
@@ -1187,14 +1183,10 @@
.*: Info: udot z0\.d, z1\.h, z2\.h
.*: Error: operand mismatch -- `udot z0\.h,z1\.h,z2\.h'
.*: Info: did you mean this\?
-.*: Info: udot z0\.d, z1\.h, z2\.h
-.*: Info: other valid variant\(s\):
-.*: Info: udot z0\.s, z1\.b, z2\.b
+.*: Info: udot z0\.s, z1\.h, z2\.h
.*: Error: operand mismatch -- `udot z0\.s,z1\.s,z2\.s'
.*: Info: did you mean this\?
-.*: Info: udot z0\.s, z1\.b, z2\.b
-.*: Info: other valid variant\(s\):
-.*: Info: udot z0\.d, z1\.h, z2\.h
+.*: Info: udot z0\.s, z1\.h, z2\.h
.*: Error: operand mismatch -- `udot z0\.d,z1\.d,z2\.d'
.*: Info: did you mean this\?
.*: Info: udot z0\.d, z1\.h, z2\.h
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d
new file mode 100644
index 00000000000..c7d6255c81c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sve2-sme2-4-invalid.s
+#error_output: sve2-sme2-4-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l
new file mode 100644
index 00000000000..faa67b7b794
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l
@@ -0,0 +1,17 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `fdot 0,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fdot z0\.s,0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fdot z0\.s,z0\.h,0'
+[^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `fdot z0\.s,z0\.h,z8\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fdot z0\.s,z0\.h,z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fdot z0\.s,z0\.h,z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fdot z0\.h,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fdot z0\.s, z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `fdot z0\.d,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fdot z0\.s, z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' used as input at operand 2 -- `fdot z0\.s,z0\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `fdot z0\.s,z1\.h,z2\.h\[0\]'
+[^ :]+:[0-9]+: Warning: predicated instruction expected after `movprfx' -- `fdot z0\.s,z1\.h,z2\.h\[0\]'
+[^ :]+:[0-9]+: Warning: predicated instruction expected after `movprfx' -- `fdot z0\.s,z1\.h,z2\.h\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s
new file mode 100644
index 00000000000..61cc5717dd0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s
@@ -0,0 +1,15 @@
+ fdot 0, z0.h, z0.h[0]
+ fdot z0.s, 0, z0.h[0]
+ fdot z0.s, z0.h, 0
+
+ fdot z0.s, z0.h, z8.h[0]
+ fdot z0.s, z0.h, z0.h[-1]
+ fdot z0.s, z0.h, z0.h[4]
+ fdot z0.h, z0.h, z0.h[0]
+ fdot z0.d, z0.h, z0.h[0]
+
+ movprfx z0, z1; fdot z0.s, z0.h, z1.h[0]
+ movprfx z0, z1; fdot z0.s, z1.h, z0.h[0]
+ movprfx z3, z4; fdot z0.s, z1.h, z2.h[0]
+ movprfx z0.s, p0/m, z1.s; fdot z0.s, z1.h, z2.h[0]
+ movprfx z0.s, p0/z, z1.s; fdot z0.s, z1.h, z2.h[0]
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d
new file mode 100644
index 00000000000..1afb0c45801
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sve2-sme2-4.s
+#error_output: sve2-sme2-4-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l
new file mode 100644
index 00000000000..0eeae8bd345
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l
@@ -0,0 +1,40 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot Z0\.S,Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z31\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z7\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z1\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z31\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z14\.s,z26\.h,z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z1\.h,z2\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot Z0\.S,Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z31\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z7\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z1\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z31\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z14\.s,z26\.h,z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z1\.h,z2\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot Z0\.S,Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z31\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z7\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z1\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z31\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z14\.s,z26\.h,z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z1\.h,z2\.h'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4.d b/gas/testsuite/gas/aarch64/sve2-sme2-4.d
new file mode 100644
index 00000000000..b7bf3afbcad
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4.d
@@ -0,0 +1,54 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 64204000 fdot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 64204000 fdot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 6420401f fdot z31\.s, z0\.h, z0\.h\[0\]
+[^:]+: 642043e0 fdot z0\.s, z31\.h, z0\.h\[0\]
+[^:]+: 64274000 fdot z0\.s, z0\.h, z7\.h\[0\]
+[^:]+: 64384000 fdot z0\.s, z0\.h, z0\.h\[3\]
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 64214020 fdot z0\.s, z1\.h, z1\.h\[0\]
+[^:]+: 64208000 fdot z0\.s, z0\.h, z0\.h
+[^:]+: 6420801f fdot z31\.s, z0\.h, z0\.h
+[^:]+: 642083e0 fdot z0\.s, z31\.h, z0\.h
+[^:]+: 643f8000 fdot z0\.s, z0\.h, z31\.h
+[^:]+: 6429834e fdot z14\.s, z26\.h, z9\.h
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 64228020 fdot z0\.s, z1\.h, z2\.h
+[^:]+: 4480c800 sdot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480c800 sdot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480c81f sdot z31\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480cbe0 sdot z0\.s, z31\.h, z0\.h\[0\]
+[^:]+: 4487c800 sdot z0\.s, z0\.h, z7\.h\[0\]
+[^:]+: 4498c800 sdot z0\.s, z0\.h, z0\.h\[3\]
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 4481c820 sdot z0\.s, z1\.h, z1\.h\[0\]
+[^:]+: 4400c800 sdot z0\.s, z0\.h, z0\.h
+[^:]+: 4400c81f sdot z31\.s, z0\.h, z0\.h
+[^:]+: 4400cbe0 sdot z0\.s, z31\.h, z0\.h
+[^:]+: 441fc800 sdot z0\.s, z0\.h, z31\.h
+[^:]+: 4409cb4e sdot z14\.s, z26\.h, z9\.h
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 4402c820 sdot z0\.s, z1\.h, z2\.h
+[^:]+: 4480cc00 udot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480cc00 udot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480cc1f udot z31\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480cfe0 udot z0\.s, z31\.h, z0\.h\[0\]
+[^:]+: 4487cc00 udot z0\.s, z0\.h, z7\.h\[0\]
+[^:]+: 4498cc00 udot z0\.s, z0\.h, z0\.h\[3\]
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 4481cc20 udot z0\.s, z1\.h, z1\.h\[0\]
+[^:]+: 4400cc00 udot z0\.s, z0\.h, z0\.h
+[^:]+: 4400cc1f udot z31\.s, z0\.h, z0\.h
+[^:]+: 4400cfe0 udot z0\.s, z31\.h, z0\.h
+[^:]+: 441fcc00 udot z0\.s, z0\.h, z31\.h
+[^:]+: 4409cf4e udot z14\.s, z26\.h, z9\.h
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 4402cc20 udot z0\.s, z1\.h, z2\.h
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4.s b/gas/testsuite/gas/aarch64/sve2-sme2-4.s
new file mode 100644
index 00000000000..1f823238726
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4.s
@@ -0,0 +1,49 @@
+ fdot z0.s, z0.h, z0.h[0]
+ FDOT Z0.S, Z0.H, Z0.H[0]
+ fdot z31.s, z0.h, z0.h[0]
+ fdot z0.s, z31.h, z0.h[0]
+ fdot z0.s, z0.h, z7.h[0]
+ fdot z0.s, z0.h, z0.h[3]
+
+ movprfx z0, z1; fdot z0.s, z1.h, z1.h[0]
+
+ fdot z0.s, z0.h, z0.h
+ fdot z31.s, z0.h, z0.h
+ fdot z0.s, z31.h, z0.h
+ fdot z0.s, z0.h, z31.h
+ fdot z14.s, z26.h, z9.h
+
+ movprfx z0, z1; fdot z0.s, z1.h, z2.h
+
+ sdot z0.s, z0.h, z0.h[0]
+ SDOT Z0.S, Z0.H, Z0.H[0]
+ sdot z31.s, z0.h, z0.h[0]
+ sdot z0.s, z31.h, z0.h[0]
+ sdot z0.s, z0.h, z7.h[0]
+ sdot z0.s, z0.h, z0.h[3]
+
+ movprfx z0, z1; sdot z0.s, z1.h, z1.h[0]
+
+ sdot z0.s, z0.h, z0.h
+ sdot z31.s, z0.h, z0.h
+ sdot z0.s, z31.h, z0.h
+ sdot z0.s, z0.h, z31.h
+ sdot z14.s, z26.h, z9.h
+
+ movprfx z0, z1; sdot z0.s, z1.h, z2.h
+ udot z0.s, z0.h, z0.h[0]
+ UDOT Z0.S, Z0.H, Z0.H[0]
+ udot z31.s, z0.h, z0.h[0]
+ udot z0.s, z31.h, z0.h[0]
+ udot z0.s, z0.h, z7.h[0]
+ udot z0.s, z0.h, z0.h[3]
+
+ movprfx z0, z1; udot z0.s, z1.h, z1.h[0]
+
+ udot z0.s, z0.h, z0.h
+ udot z31.s, z0.h, z0.h
+ udot z0.s, z31.h, z0.h
+ udot z0.s, z0.h, z31.h
+ udot z14.s, z26.h, z9.h
+
+ movprfx z0, z1; udot z0.s, z1.h, z2.h
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index a4f1623d4ca..e179e484b9a 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -476,8 +476,9 @@ enum aarch64_opnd
AARCH64_OPND_SVE_Zm_5, /* SVE vector register in Zm, bits [9,5]. */
AARCH64_OPND_SVE_Zm_16, /* SVE vector register in Zm, bits [20,16]. */
AARCH64_OPND_SVE_Zm3_INDEX, /* z0-z7[0-3] in Zm, bits [20,16]. */
- AARCH64_OPND_SVE_Zm3_22_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 22. */
AARCH64_OPND_SVE_Zm3_11_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 11. */
+ AARCH64_OPND_SVE_Zm3_19_INDEX, /* z0-z7[0-3] in Zm3_INDEX plus bit 19. */
+ AARCH64_OPND_SVE_Zm3_22_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 22. */
AARCH64_OPND_SVE_Zm4_11_INDEX, /* z0-z15[0-3] in Zm plus bit 11. */
AARCH64_OPND_SVE_Zm4_INDEX, /* z0-z15[0-1] in Zm, bits [20,16]. */
AARCH64_OPND_SVE_Zn, /* SVE vector register in Zn. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 03d1c0e1221..1ea3da1aa21 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -665,15 +665,15 @@ aarch64_insert_operand (const aarch64_operand *self,
case 201:
case 202:
case 203:
- case 209:
- case 212:
- case 216:
- case 223:
+ case 210:
+ case 213:
+ case 217:
case 224:
- case 231:
+ case 225:
case 232:
case 233:
case 234:
+ case 235:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -685,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 270:
+ case 271:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -730,13 +730,13 @@ aarch64_insert_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 237:
- case 264:
+ case 238:
case 265:
- case 267:
- case 269:
- case 274:
+ case 266:
+ case 268:
+ case 270:
case 275:
+ case 276:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -805,8 +805,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 266:
- case 268:
+ case 267:
+ case 269:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
@@ -886,41 +886,41 @@ aarch64_insert_operand (const aarch64_operand *self,
case 184:
case 185:
case 186:
- case 250:
+ case 251:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
case 204:
case 205:
case 206:
case 207:
case 208:
+ case 209:
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
- case 210:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
case 211:
- case 213:
- case 230:
- return aarch64_ins_sve_reglist (self, info, code, inst, errors);
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
+ case 212:
case 214:
+ case 231:
+ return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 215:
- case 217:
+ case 216:
case 218:
case 219:
case 220:
- case 229:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 221:
+ case 230:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 222:
+ case 223:
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
- case 225:
- case 227:
- case 238:
- return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 226:
case 228:
+ case 239:
+ return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 227:
+ case 229:
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 235:
case 236:
- case 251:
+ case 237:
case 252:
case 253:
case 254:
@@ -933,26 +933,27 @@ aarch64_insert_operand (const aarch64_operand *self,
case 261:
case 262:
case 263:
+ case 264:
return aarch64_ins_simple_index (self, info, code, inst, errors);
- case 239:
case 240:
case 241:
case 242:
case 243:
case 244:
case 245:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 246:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 247:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 248:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 249:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 250:
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
- case 271:
case 272:
case 273:
+ case 274:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index a122e908630..f67f77f1783 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2465;
+ return 2471;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2466;
+ return 2472;
}
}
}
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2895;
+ return 2901;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2609;
+ return 2615;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2608;
+ return 2614;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2607;
+ return 2613;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2616;
+ return 2622;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2612;
+ return 2618;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2606;
+ return 2612;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2605;
+ return 2611;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2627;
+ return 2633;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2626;
+ return 2632;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2604;
+ return 2610;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2614;
+ return 2620;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2610;
+ return 2616;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2617;
+ return 2623;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2613;
+ return 2619;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2615;
+ return 2621;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2611;
+ return 2617;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2543;
+ return 2549;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2544;
+ return 2550;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2567;
+ return 2573;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2568;
+ return 2574;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2559;
+ return 2565;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2560;
+ return 2566;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2551;
+ return 2557;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2552;
+ return 2558;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2575;
+ return 2581;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2576;
+ return 2582;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2599;
+ return 2605;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2600;
+ return 2606;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2591;
+ return 2597;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2592;
+ return 2598;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2583;
+ return 2589;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2584;
+ return 2590;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2689;
+ return 2695;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2690;
+ return 2696;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2539;
+ return 2545;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2540;
+ return 2546;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2563;
+ return 2569;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2564;
+ return 2570;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2555;
+ return 2561;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2556;
+ return 2562;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2547;
+ return 2553;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2548;
+ return 2554;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2571;
+ return 2577;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2572;
+ return 2578;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2595;
+ return 2601;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2596;
+ return 2602;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2587;
+ return 2593;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2588;
+ return 2594;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2579;
+ return 2585;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2580;
+ return 2586;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2715;
+ return 2721;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2716;
+ return 2722;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2739;
+ return 2745;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2740;
+ return 2746;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2731;
+ return 2737;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2732;
+ return 2738;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2723;
+ return 2729;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2724;
+ return 2730;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2747;
+ return 2753;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2748;
+ return 2754;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2771;
+ return 2777;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2772;
+ return 2778;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2763;
+ return 2769;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2764;
+ return 2770;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2755;
+ return 2761;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2756;
+ return 2762;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2711;
+ return 2717;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2712;
+ return 2718;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2735;
+ return 2741;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2736;
+ return 2742;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2727;
+ return 2733;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2728;
+ return 2734;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2719;
+ return 2725;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2720;
+ return 2726;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2743;
+ return 2749;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2744;
+ return 2750;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2767;
+ return 2773;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2768;
+ return 2774;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2759;
+ return 2765;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2760;
+ return 2766;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2751;
+ return 2757;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2752;
+ return 2758;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2665;
+ return 2671;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2870;
+ return 2876;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2666;
+ return 2672;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2667;
+ return 2673;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2871;
+ return 2877;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2872;
+ return 2878;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2828;
+ return 2834;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2786;
+ return 2792;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2829;
+ return 2835;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2830;
+ return 2836;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2787;
+ return 2793;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2788;
+ return 2794;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2681;
+ return 2687;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2682;
+ return 2688;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2683;
+ return 2689;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2844;
+ return 2850;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2845;
+ return 2851;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2846;
+ return 2852;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2545;
+ return 2551;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2569;
+ return 2575;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2561;
+ return 2567;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2553;
+ return 2559;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2577;
+ return 2583;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2601;
+ return 2607;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2593;
+ return 2599;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2585;
+ return 2591;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2546;
+ return 2552;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2603;
+ return 2609;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2570;
+ return 2576;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2562;
+ return 2568;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2554;
+ return 2560;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2578;
+ return 2584;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2602;
+ return 2608;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2594;
+ return 2600;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2586;
+ return 2592;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2902;
+ return 2908;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2903;
+ return 2909;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2904;
+ return 2910;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2506;
+ return 2512;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2507;
+ return 2513;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2508;
+ return 2514;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2911;
+ return 2917;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2912;
+ return 2918;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2913;
+ return 2919;
}
}
}
@@ -1836,7 +1836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2448;
+ return 2454;
}
else
{
@@ -1846,7 +1846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2449;
+ return 2455;
}
else
{
@@ -1854,7 +1854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2450;
+ return 2456;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2905;
+ return 2911;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2906;
+ return 2912;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2907;
+ return 2913;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2520;
+ return 2526;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2521;
+ return 2527;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2522;
+ return 2528;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2852;
+ return 2858;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2914;
+ return 2920;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2915;
+ return 2921;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2916;
+ return 2922;
}
}
}
@@ -1988,7 +1988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2456;
+ return 2462;
}
else
{
@@ -1998,7 +1998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2457;
+ return 2463;
}
else
{
@@ -2006,7 +2006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2458;
+ return 2464;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2853;
+ return 2859;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2541;
+ return 2547;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2565;
+ return 2571;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2557;
+ return 2563;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2549;
+ return 2555;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2500;
+ return 2506;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2635;
+ return 2641;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2794;
+ return 2800;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2641;
+ return 2647;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2514;
+ return 2520;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2800;
+ return 2806;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2881;
+ return 2887;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2806;
+ return 2812;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2542;
+ return 2548;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2566;
+ return 2572;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2558;
+ return 2564;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2550;
+ return 2556;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2501;
+ return 2507;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2636;
+ return 2642;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2795;
+ return 2801;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2642;
+ return 2648;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2515;
+ return 2521;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2801;
+ return 2807;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2882;
+ return 2888;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2807;
+ return 2813;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2573;
+ return 2579;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2597;
+ return 2603;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2589;
+ return 2595;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2581;
+ return 2587;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2538;
+ return 2544;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2478;
+ return 2484;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2864;
+ return 2870;
}
}
else
@@ -2375,7 +2375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx011xxx
bfvdot. */
- return 2464;
+ return 2470;
}
else
{
@@ -2383,7 +2383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx011xxx
bfdot. */
- return 2442;
+ return 2448;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2782;
+ return 2788;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2574;
+ return 2580;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2598;
+ return 2604;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2590;
+ return 2596;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2582;
+ return 2588;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2479;
+ return 2485;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2878;
+ return 2884;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2865;
+ return 2871;
}
}
}
@@ -2480,7 +2480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx011xxx
bfdot. */
- return 2443;
+ return 2449;
}
else
{
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2793;
+ return 2799;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2783;
+ return 2789;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2918;
+ return 2924;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2919;
+ return 2925;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2657;
+ return 2663;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2658;
+ return 2664;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2659;
+ return 2665;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2900;
+ return 2906;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2901;
+ return 2907;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2908;
+ return 2914;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2673;
+ return 2679;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2674;
+ return 2680;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2675;
+ return 2681;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2920;
+ return 2926;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2921;
+ return 2927;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2820;
+ return 2826;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2821;
+ return 2827;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2822;
+ return 2828;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2909;
+ return 2915;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2910;
+ return 2916;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2917;
+ return 2923;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2836;
+ return 2842;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2837;
+ return 2843;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2838;
+ return 2844;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2669;
+ return 2675;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2670;
+ return 2676;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2671;
+ return 2677;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2672;
+ return 2678;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2874;
+ return 2880;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2875;
+ return 2881;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2876;
+ return 2882;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2877;
+ return 2883;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2480;
+ return 2486;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2481;
+ return 2487;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2482;
+ return 2488;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2483;
+ return 2489;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2510;
+ return 2516;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2511;
+ return 2517;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2512;
+ return 2518;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2513;
+ return 2519;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2661;
+ return 2667;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2662;
+ return 2668;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2663;
+ return 2669;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2664;
+ return 2670;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2502;
+ return 2508;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2503;
+ return 2509;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2504;
+ return 2510;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2505;
+ return 2511;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2668;
+ return 2674;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2873;
+ return 2879;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2643;
+ return 2649;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2644;
+ return 2650;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2645;
+ return 2651;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2646;
+ return 2652;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2509;
+ return 2515;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2660;
+ return 2666;
}
}
else
@@ -3166,7 +3166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2468;
+ return 2474;
}
else
{
@@ -3174,7 +3174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2469;
+ return 2475;
}
}
}
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2832;
+ return 2838;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2833;
+ return 2839;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2834;
+ return 2840;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2835;
+ return 2841;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2789;
+ return 2795;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2790;
+ return 2796;
}
}
}
@@ -3259,7 +3259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx10xxx
bfdot. */
- return 2444;
+ return 2450;
}
else
{
@@ -3267,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx10xxx
bfdot. */
- return 2445;
+ return 2451;
}
}
else
@@ -3278,7 +3278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx10xxx
bfdot. */
- return 2446;
+ return 2452;
}
else
{
@@ -3286,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx10xxx
bfdot. */
- return 2447;
+ return 2453;
}
}
}
@@ -3305,7 +3305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2452;
+ return 2458;
}
else
{
@@ -3313,7 +3313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2453;
+ return 2459;
}
}
else
@@ -3324,7 +3324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2454;
+ return 2460;
}
else
{
@@ -3332,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2455;
+ return 2461;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2824;
+ return 2830;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2825;
+ return 2831;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2826;
+ return 2832;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2827;
+ return 2833;
}
}
}
@@ -3388,7 +3388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx10xxx
add. */
- return 2434;
+ return 2440;
}
else
{
@@ -3396,7 +3396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx10xxx
add. */
- return 2435;
+ return 2441;
}
}
else
@@ -3407,7 +3407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx10xxx
add. */
- return 2436;
+ return 2442;
}
else
{
@@ -3415,7 +3415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx10xxx
add. */
- return 2437;
+ return 2443;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2831;
+ return 2837;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2808;
+ return 2814;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2809;
+ return 2815;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2810;
+ return 2816;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2811;
+ return 2817;
}
}
}
@@ -3485,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2451;
+ return 2457;
}
else
{
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2823;
+ return 2829;
}
}
else
@@ -3504,7 +3504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx10xxx
add. */
- return 2432;
+ return 2438;
}
else
{
@@ -3512,7 +3512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx10xxx
add. */
- return 2433;
+ return 2439;
}
}
}
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2685;
+ return 2691;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2686;
+ return 2692;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2687;
+ return 2693;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2688;
+ return 2694;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2524;
+ return 2530;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2525;
+ return 2531;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2526;
+ return 2532;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2527;
+ return 2533;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2677;
+ return 2683;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2678;
+ return 2684;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2679;
+ return 2685;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2680;
+ return 2686;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2516;
+ return 2522;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2517;
+ return 2523;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2518;
+ return 2524;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2519;
+ return 2525;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2684;
+ return 2690;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2866;
+ return 2872;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2867;
+ return 2873;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2868;
+ return 2874;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2869;
+ return 2875;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2637;
+ return 2643;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2638;
+ return 2644;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2639;
+ return 2645;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2640;
+ return 2646;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2523;
+ return 2529;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2676;
+ return 2682;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2536;
+ return 2542;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2537;
+ return 2543;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2848;
+ return 2854;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2849;
+ return 2855;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2850;
+ return 2856;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2851;
+ return 2857;
}
}
}
@@ -3896,7 +3896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2460;
+ return 2466;
}
else
{
@@ -3904,7 +3904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2461;
+ return 2467;
}
}
else
@@ -3915,7 +3915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2462;
+ return 2468;
}
else
{
@@ -3923,7 +3923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2463;
+ return 2469;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2840;
+ return 2846;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2841;
+ return 2847;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2842;
+ return 2848;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2843;
+ return 2849;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2778;
+ return 2784;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2779;
+ return 2785;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2780;
+ return 2786;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2781;
+ return 2787;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2847;
+ return 2853;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2784;
+ return 2790;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2785;
+ return 2791;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2802;
+ return 2808;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2803;
+ return 2809;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2804;
+ return 2810;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2805;
+ return 2811;
}
}
}
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2459;
+ return 2465;
}
else
{
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2839;
+ return 2845;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2776;
+ return 2782;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2777;
+ return 2783;
}
}
}
@@ -4145,7 +4145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0100xxxxxxxxxxxxx
sel. */
- return 2647;
+ return 2653;
}
else
{
@@ -4153,7 +4153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1100xxxxxxxxxxxxx
sel. */
- return 2648;
+ return 2654;
}
}
else
@@ -4170,7 +4170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110000xxxxxxxxx0
fclamp. */
- return 2470;
+ return 2476;
}
else
{
@@ -4178,7 +4178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110100xxxxxxxxx0
zip. */
- return 2896;
+ return 2902;
}
}
else
@@ -4187,7 +4187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x00xxxxxxxxx1
uzp. */
- return 2883;
+ return 2889;
}
}
else
@@ -4198,7 +4198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110010xxxxxxxxxx
fclamp. */
- return 2471;
+ return 2477;
}
else
{
@@ -4210,7 +4210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx00xxxxx
sqrshr. */
- return 2702;
+ return 2708;
}
else
{
@@ -4218,7 +4218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx10xxxxx
sqrshru. */
- return 2705;
+ return 2711;
}
}
else
@@ -4227,7 +4227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxxx1xxxxx
uqrshr. */
- return 2858;
+ return 2864;
}
}
}
@@ -4244,7 +4244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx0
sclamp. */
- return 2631;
+ return 2637;
}
else
{
@@ -4252,7 +4252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx1
uclamp. */
- return 2796;
+ return 2802;
}
}
else
@@ -4265,7 +4265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx0
zip. */
- return 2897;
+ return 2903;
}
else
{
@@ -4273,7 +4273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx1
uzp. */
- return 2884;
+ return 2890;
}
}
else
@@ -4286,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110xxxx110101xxxx0xxxxx
sqrshr. */
- return 2701;
+ return 2707;
}
else
{
@@ -4294,7 +4294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111xxxx110101xxxx0xxxxx
sqrshru. */
- return 2704;
+ return 2710;
}
}
else
@@ -4303,7 +4303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx110101xxxx1xxxxx
uqrshr. */
- return 2857;
+ return 2863;
}
}
}
@@ -4318,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx0
sclamp. */
- return 2632;
+ return 2638;
}
else
{
@@ -4326,7 +4326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx1
uclamp. */
- return 2797;
+ return 2803;
}
}
else
@@ -4339,7 +4339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx00xxxxx
sqrshrn. */
- return 2703;
+ return 2709;
}
else
{
@@ -4347,7 +4347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx10xxxxx
sqrshrun. */
- return 2706;
+ return 2712;
}
}
else
@@ -4356,7 +4356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxxx1xxxxx
uqrshrn. */
- return 2859;
+ return 2865;
}
}
}
@@ -4383,7 +4383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx0
smax. */
- return 2649;
+ return 2655;
}
else
{
@@ -4393,7 +4393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100001xx0xxxx0
fmax. */
- return 2484;
+ return 2490;
}
else
{
@@ -4401,7 +4401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100011xx0xxxx0
add. */
- return 2438;
+ return 2444;
}
}
}
@@ -4415,7 +4415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx0
smin. */
- return 2653;
+ return 2659;
}
else
{
@@ -4423,7 +4423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx0
srshl. */
- return 2707;
+ return 2713;
}
}
else
@@ -4432,7 +4432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx0
fmaxnm. */
- return 2488;
+ return 2494;
}
}
}
@@ -4446,7 +4446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2812;
+ return 2818;
}
else
{
@@ -4454,7 +4454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx0xxxx1
fmin. */
- return 2492;
+ return 2498;
}
}
else
@@ -4467,7 +4467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx1
umin. */
- return 2816;
+ return 2822;
}
else
{
@@ -4475,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx1
urshl. */
- return 2860;
+ return 2866;
}
}
else
@@ -4484,7 +4484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx1
fminnm. */
- return 2496;
+ return 2502;
}
}
}
@@ -4507,7 +4507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01x0000111000xxxx0xxxxx
fcvt. */
- return 2472;
+ return 2478;
}
else
{
@@ -4515,7 +4515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11x0000111000xxxx0xxxxx
bfcvt. */
- return 2440;
+ return 2446;
}
}
else
@@ -4526,7 +4526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101000111000xxxx0xxxxx
frintn. */
- return 2532;
+ return 2538;
}
else
{
@@ -4534,7 +4534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111000111000xxxx0xxxxx
frintn. */
- return 2533;
+ return 2539;
}
}
}
@@ -4546,7 +4546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x100111000xxxx0xxxxx
frinta. */
- return 2528;
+ return 2534;
}
else
{
@@ -4554,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x100111000xxxx0xxxxx
frinta. */
- return 2529;
+ return 2535;
}
}
}
@@ -4570,7 +4570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100010111000xxxx0xxxxx
scvtf. */
- return 2633;
+ return 2639;
}
else
{
@@ -4578,7 +4578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110010111000xxxx0xxxxx
scvtf. */
- return 2634;
+ return 2640;
}
}
else
@@ -4589,7 +4589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101010111000xxxx0xxxxx
frintm. */
- return 2530;
+ return 2536;
}
else
{
@@ -4597,7 +4597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111010111000xxxx0xxxxx
frintm. */
- return 2531;
+ return 2537;
}
}
}
@@ -4609,7 +4609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx0x
zip. */
- return 2898;
+ return 2904;
}
else
{
@@ -4617,7 +4617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx1x
uzp. */
- return 2885;
+ return 2891;
}
}
}
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxx00111000xxxx1xxxxx
fcvtn. */
- return 2473;
+ return 2479;
}
else
{
@@ -4640,7 +4640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxx00111000xxxx1xxxxx
bfcvtn. */
- return 2441;
+ return 2447;
}
}
else
@@ -4651,7 +4651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx10111000xxxx1xxxxx
ucvtf. */
- return 2798;
+ return 2804;
}
else
{
@@ -4659,7 +4659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx10111000xxxx1xxxxx
ucvtf. */
- return 2799;
+ return 2805;
}
}
}
@@ -4682,7 +4682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100001111000xxxx0xxxx0
fcvtzs. */
- return 2474;
+ return 2480;
}
else
{
@@ -4690,7 +4690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110001111000xxxx0xxxx0
fcvtzs. */
- return 2475;
+ return 2481;
}
}
else
@@ -4701,7 +4701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101001111000xxxx0xxxx0
frintp. */
- return 2534;
+ return 2540;
}
else
{
@@ -4709,7 +4709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111001111000xxxx0xxxx0
frintp. */
- return 2535;
+ return 2541;
}
}
}
@@ -4721,7 +4721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x001111000xxxx1xxxx0
fcvtzu. */
- return 2476;
+ return 2482;
}
else
{
@@ -4729,7 +4729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x001111000xxxx1xxxx0
fcvtzu. */
- return 2477;
+ return 2483;
}
}
}
@@ -4741,7 +4741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x101111000xxxxxxxxx0
sunpk. */
- return 2791;
+ return 2797;
}
else
{
@@ -4749,7 +4749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x101111000xxxxxxxxx0
sunpk. */
- return 2792;
+ return 2798;
}
}
}
@@ -4761,7 +4761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx01111000xxxxxxxxx1
uunpk. */
- return 2879;
+ return 2885;
}
else
{
@@ -4769,7 +4769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx01111000xxxxxxxxx1
uunpk. */
- return 2880;
+ return 2886;
}
}
}
@@ -4787,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010x011111000xxxx0xxxxx
sqcvt. */
- return 2691;
+ return 2697;
}
else
{
@@ -4795,7 +4795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110x011111000xxxx0xxxxx
sqcvtu. */
- return 2694;
+ return 2700;
}
}
else
@@ -4808,7 +4808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx00xxxxx
sqcvt. */
- return 2692;
+ return 2698;
}
else
{
@@ -4816,7 +4816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx00xxxxx
sqcvtu. */
- return 2695;
+ return 2701;
}
}
else
@@ -4827,7 +4827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx10xxxxx
sqcvtn. */
- return 2693;
+ return 2699;
}
else
{
@@ -4835,7 +4835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx10xxxxx
sqcvtun. */
- return 2696;
+ return 2702;
}
}
}
@@ -4848,7 +4848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx0x
zip. */
- return 2899;
+ return 2905;
}
else
{
@@ -4856,7 +4856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx1x
uzp. */
- return 2886;
+ return 2892;
}
}
}
@@ -4868,7 +4868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx11111000xxxx1xxxxx
uqcvt. */
- return 2854;
+ return 2860;
}
else
{
@@ -4878,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx01xxxxx
uqcvt. */
- return 2855;
+ return 2861;
}
else
{
@@ -4886,7 +4886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx11xxxxx
uqcvtn. */
- return 2856;
+ return 2862;
}
}
}
@@ -4906,7 +4906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2651;
+ return 2657;
}
else
{
@@ -4914,7 +4914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx0
fmax. */
- return 2486;
+ return 2492;
}
}
else
@@ -4927,7 +4927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx0
smin. */
- return 2655;
+ return 2661;
}
else
{
@@ -4935,7 +4935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx0
srshl. */
- return 2709;
+ return 2715;
}
}
else
@@ -4944,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx0
fmaxnm. */
- return 2490;
+ return 2496;
}
}
}
@@ -4958,7 +4958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2814;
+ return 2820;
}
else
{
@@ -4966,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx1
fmin. */
- return 2494;
+ return 2500;
}
}
else
@@ -4979,7 +4979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx1
umin. */
- return 2818;
+ return 2824;
}
else
{
@@ -4987,7 +4987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx1
urshl. */
- return 2862;
+ return 2868;
}
}
else
@@ -4996,7 +4996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx1
fminnm. */
- return 2498;
+ return 2504;
}
}
}
@@ -5016,7 +5016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2650;
+ return 2656;
}
else
{
@@ -5024,7 +5024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2652;
+ return 2658;
}
}
else
@@ -5037,7 +5037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101001xx0xxxx0
fmax. */
- return 2485;
+ return 2491;
}
else
{
@@ -5045,7 +5045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111001xx0xxxx0
fmax. */
- return 2487;
+ return 2493;
}
}
else
@@ -5054,7 +5054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1x1011xx0xxxx0
add. */
- return 2439;
+ return 2445;
}
}
}
@@ -5070,7 +5070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx0
smin. */
- return 2654;
+ return 2660;
}
else
{
@@ -5078,7 +5078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx0
smin. */
- return 2656;
+ return 2662;
}
}
else
@@ -5089,7 +5089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx0
srshl. */
- return 2708;
+ return 2714;
}
else
{
@@ -5097,7 +5097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx0
srshl. */
- return 2710;
+ return 2716;
}
}
}
@@ -5109,7 +5109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx0
fmaxnm. */
- return 2489;
+ return 2495;
}
else
{
@@ -5117,7 +5117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx0
fmaxnm. */
- return 2491;
+ return 2497;
}
}
}
@@ -5134,7 +5134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx1
umax. */
- return 2813;
+ return 2819;
}
else
{
@@ -5142,7 +5142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx1
umax. */
- return 2815;
+ return 2821;
}
}
else
@@ -5153,7 +5153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx0xxxx1
fmin. */
- return 2493;
+ return 2499;
}
else
{
@@ -5161,7 +5161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx0xxxx1
fmin. */
- return 2495;
+ return 2501;
}
}
}
@@ -5177,7 +5177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx1
umin. */
- return 2817;
+ return 2823;
}
else
{
@@ -5185,7 +5185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx1
umin. */
- return 2819;
+ return 2825;
}
}
else
@@ -5196,7 +5196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx1
urshl. */
- return 2861;
+ return 2867;
}
else
{
@@ -5204,7 +5204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx1
urshl. */
- return 2863;
+ return 2869;
}
}
}
@@ -5216,7 +5216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx1
fminnm. */
- return 2497;
+ return 2503;
}
else
{
@@ -5224,7 +5224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx1
fminnm. */
- return 2499;
+ return 2505;
}
}
}
@@ -5241,7 +5241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001xxxxxxxxxx
sqdmulh. */
- return 2697;
+ return 2703;
}
else
{
@@ -5249,7 +5249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101xxxxxxxxxx
sqdmulh. */
- return 2699;
+ return 2705;
}
}
else
@@ -5260,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011xxxxxxxxxx
sqdmulh. */
- return 2698;
+ return 2704;
}
else
{
@@ -5268,7 +5268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111xxxxxxxxxx
sqdmulh. */
- return 2700;
+ return 2706;
}
}
}
@@ -5296,7 +5296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2717;
+ return 2723;
}
else
{
@@ -5304,7 +5304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2741;
+ return 2747;
}
}
else
@@ -5315,7 +5315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2733;
+ return 2739;
}
else
{
@@ -5323,7 +5323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2725;
+ return 2731;
}
}
}
@@ -5337,7 +5337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2749;
+ return 2755;
}
else
{
@@ -5345,7 +5345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2773;
+ return 2779;
}
}
else
@@ -5356,7 +5356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2765;
+ return 2771;
}
else
{
@@ -5364,7 +5364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2757;
+ return 2763;
}
}
}
@@ -5392,7 +5392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2718;
+ return 2724;
}
else
{
@@ -5400,7 +5400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2775;
+ return 2781;
}
}
else
@@ -5409,7 +5409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2742;
+ return 2748;
}
}
else
@@ -5420,7 +5420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2734;
+ return 2740;
}
else
{
@@ -5428,7 +5428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2726;
+ return 2732;
}
}
}
@@ -5442,7 +5442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2750;
+ return 2756;
}
else
{
@@ -5450,7 +5450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2774;
+ return 2780;
}
}
else
@@ -5461,7 +5461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2766;
+ return 2772;
}
else
{
@@ -5469,7 +5469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2758;
+ return 2764;
}
}
}
@@ -5511,7 +5511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2713;
+ return 2719;
}
else
{
@@ -5519,7 +5519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2714;
+ return 2720;
}
}
else
@@ -5530,7 +5530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2737;
+ return 2743;
}
else
{
@@ -5538,7 +5538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2738;
+ return 2744;
}
}
}
@@ -5552,7 +5552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2729;
+ return 2735;
}
else
{
@@ -5560,7 +5560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2730;
+ return 2736;
}
}
else
@@ -5571,7 +5571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2721;
+ return 2727;
}
else
{
@@ -5579,7 +5579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2722;
+ return 2728;
}
}
}
@@ -5596,7 +5596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2745;
+ return 2751;
}
else
{
@@ -5604,7 +5604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2746;
+ return 2752;
}
}
else
@@ -5615,7 +5615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2769;
+ return 2775;
}
else
{
@@ -5623,7 +5623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2770;
+ return 2776;
}
}
}
@@ -5637,7 +5637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2761;
+ return 2767;
}
else
{
@@ -5645,7 +5645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2762;
+ return 2768;
}
}
else
@@ -5656,7 +5656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2753;
+ return 2759;
}
else
{
@@ -5664,7 +5664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2754;
+ return 2760;
}
}
}
@@ -8066,7 +8066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2962;
+ return 2968;
}
else
{
@@ -8074,7 +8074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2970;
+ return 2976;
}
}
else
@@ -8085,7 +8085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2966;
+ return 2972;
}
else
{
@@ -8093,7 +8093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2973;
+ return 2979;
}
}
}
@@ -8131,7 +8131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 3022;
+ return 3028;
}
else
{
@@ -8139,7 +8139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3028;
+ return 3034;
}
}
else
@@ -8150,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3025;
+ return 3031;
}
else
{
@@ -8158,7 +8158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3031;
+ return 3037;
}
}
}
@@ -8172,7 +8172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3046;
+ return 3052;
}
else
{
@@ -8180,7 +8180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3052;
+ return 3058;
}
}
else
@@ -8191,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3049;
+ return 3055;
}
else
{
@@ -8199,7 +8199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3055;
+ return 3061;
}
}
}
@@ -8216,7 +8216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3034;
+ return 3040;
}
else
{
@@ -8224,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3040;
+ return 3046;
}
}
else
@@ -8235,7 +8235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3037;
+ return 3043;
}
else
{
@@ -8243,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3043;
+ return 3049;
}
}
}
@@ -8257,7 +8257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3058;
+ return 3064;
}
else
{
@@ -8265,7 +8265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3064;
+ return 3070;
}
}
else
@@ -8276,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3061;
+ return 3067;
}
else
{
@@ -8284,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3067;
+ return 3073;
}
}
}
@@ -8349,7 +8349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2963;
+ return 2969;
}
else
{
@@ -8357,7 +8357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2971;
+ return 2977;
}
}
else
@@ -8368,7 +8368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2967;
+ return 2973;
}
else
{
@@ -8376,7 +8376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2974;
+ return 2980;
}
}
}
@@ -8414,7 +8414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 3023;
+ return 3029;
}
else
{
@@ -8422,7 +8422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3029;
+ return 3035;
}
}
else
@@ -8433,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3026;
+ return 3032;
}
else
{
@@ -8441,7 +8441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3032;
+ return 3038;
}
}
}
@@ -8455,7 +8455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3047;
+ return 3053;
}
else
{
@@ -8463,7 +8463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3053;
+ return 3059;
}
}
else
@@ -8474,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3050;
+ return 3056;
}
else
{
@@ -8482,7 +8482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3056;
+ return 3062;
}
}
}
@@ -8499,7 +8499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3035;
+ return 3041;
}
else
{
@@ -8507,7 +8507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3041;
+ return 3047;
}
}
else
@@ -8518,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3038;
+ return 3044;
}
else
{
@@ -8526,7 +8526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3044;
+ return 3050;
}
}
}
@@ -8540,7 +8540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3059;
+ return 3065;
}
else
{
@@ -8548,7 +8548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3065;
+ return 3071;
}
}
else
@@ -8559,7 +8559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3062;
+ return 3068;
}
else
{
@@ -8567,7 +8567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3068;
+ return 3074;
}
}
}
@@ -8635,7 +8635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2965;
+ return 2971;
}
else
{
@@ -8643,7 +8643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2972;
+ return 2978;
}
}
else
@@ -8652,7 +8652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2969;
+ return 2975;
}
}
else
@@ -8663,7 +8663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2964;
+ return 2970;
}
else
{
@@ -8671,7 +8671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2968;
+ return 2974;
}
}
}
@@ -8733,7 +8733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 3024;
+ return 3030;
}
else
{
@@ -8741,7 +8741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3118;
+ return 3124;
}
}
else
@@ -8752,7 +8752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3030;
+ return 3036;
}
else
{
@@ -8760,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3120;
+ return 3126;
}
}
}
@@ -8774,7 +8774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3027;
+ return 3033;
}
else
{
@@ -8782,7 +8782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3119;
+ return 3125;
}
}
else
@@ -8791,7 +8791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3033;
+ return 3039;
}
}
}
@@ -8807,7 +8807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3048;
+ return 3054;
}
else
{
@@ -8815,7 +8815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3124;
+ return 3130;
}
}
else
@@ -8826,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3054;
+ return 3060;
}
else
{
@@ -8834,7 +8834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3126;
+ return 3132;
}
}
}
@@ -8848,7 +8848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3051;
+ return 3057;
}
else
{
@@ -8856,7 +8856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3125;
+ return 3131;
}
}
else
@@ -8865,7 +8865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3057;
+ return 3063;
}
}
}
@@ -8884,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3036;
+ return 3042;
}
else
{
@@ -8892,7 +8892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3121;
+ return 3127;
}
}
else
@@ -8903,7 +8903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3042;
+ return 3048;
}
else
{
@@ -8911,7 +8911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3123;
+ return 3129;
}
}
}
@@ -8925,7 +8925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3039;
+ return 3045;
}
else
{
@@ -8933,7 +8933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3122;
+ return 3128;
}
}
else
@@ -8942,7 +8942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3045;
+ return 3051;
}
}
}
@@ -8958,7 +8958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3060;
+ return 3066;
}
else
{
@@ -8966,7 +8966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3127;
+ return 3133;
}
}
else
@@ -8977,7 +8977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3066;
+ return 3072;
}
else
{
@@ -8985,7 +8985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3129;
+ return 3135;
}
}
}
@@ -8999,7 +8999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3063;
+ return 3069;
}
else
{
@@ -9007,7 +9007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3128;
+ return 3134;
}
}
else
@@ -9016,7 +9016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3069;
+ return 3075;
}
}
}
@@ -9389,7 +9389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3147;
+ return 3153;
}
else
{
@@ -9407,7 +9407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3150;
+ return 3156;
}
}
}
@@ -9487,7 +9487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2960;
+ return 2966;
}
else
{
@@ -9495,7 +9495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2961;
+ return 2967;
}
}
else
@@ -9602,7 +9602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3152;
+ return 3158;
}
}
}
@@ -9618,7 +9618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3149;
+ return 3155;
}
else
{
@@ -9663,7 +9663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2959;
+ return 2965;
}
else
{
@@ -9757,7 +9757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3151;
+ return 3157;
}
}
}
@@ -9887,7 +9887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3153;
+ return 3159;
}
}
}
@@ -9903,7 +9903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3148;
+ return 3154;
}
else
{
@@ -10745,7 +10745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2979;
+ return 2985;
}
}
}
@@ -10819,7 +10819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2980;
+ return 2986;
}
}
}
@@ -12226,19 +12226,63 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 10) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x0xx0xxxxx110xx0xxxxxxxxxx
- sclamp. */
- return 2416;
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x0xx0xxxxx110x00xxxxxxxxxx
+ sclamp. */
+ return 2416;
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x00x0xxxxx110x10xxxxxxxxxx
+ sdot. */
+ return 2427;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x01x0xxxxx110x10xxxxxxxxxx
+ sdot. */
+ return 2426;
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x0xx0xxxxx110xx1xxxxxxxxxx
- uclamp. */
- return 2417;
+ if (((word >> 11) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x0xx0xxxxx110x01xxxxxxxxxx
+ uclamp. */
+ return 2417;
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x00x0xxxxx110x11xxxxxxxxxx
+ udot. */
+ return 2429;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x01x0xxxxx110x11xxxxxxxxxx
+ udot. */
+ return 2428;
+ }
+ }
}
}
else
@@ -13493,7 +13537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2978;
+ return 2984;
}
}
}
@@ -15197,7 +15241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 3007;
+ return 3013;
}
}
else
@@ -15440,7 +15484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2983;
+ return 2989;
}
else
{
@@ -15448,7 +15492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2984;
+ return 2990;
}
}
else
@@ -15633,11 +15677,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 23) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x11001x0001xxxxx010xxxxxxxxxxxxx
- st1b. */
- return 1885;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 011001x0001xxxxx010xxxxxxxxxxxxx
+ fdot. */
+ return 2424;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 111001x0001xxxxx010xxxxxxxxxxxxx
+ st1b. */
+ return 1885;
+ }
}
else
{
@@ -15680,7 +15735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 3004;
+ return 3010;
}
else
{
@@ -15701,7 +15756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 3011;
+ return 3017;
}
else
{
@@ -15709,7 +15764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 3010;
+ return 3016;
}
}
else
@@ -15728,33 +15783,44 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 10) & 0x1) == 0)
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x11001x0001xxxxx1x0xxxxxxxxxxxxx
+ fdot. */
+ return 2425;
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 011001x0x01xxxxx1x0xx0xxxxxxxxxx
- fmlalb. */
- return 2099;
+ if (((word >> 10) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 011001x0101xxxxx1x0xx0xxxxxxxxxx
+ fmlalb. */
+ return 2099;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 011001x0101xxxxx1x0xx1xxxxxxxxxx
+ fmlalt. */
+ return 2101;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 011001x0x01xxxxx1x0xx1xxxxxxxxxx
- fmlalt. */
- return 2101;
+ 111001x0101xxxxx1x0xxxxxxxxxxxxx
+ st1h. */
+ return 1905;
}
}
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 111001x0x01xxxxx1x0xxxxxxxxxxxxx
- st1h. */
- return 1905;
- }
}
else
{
@@ -15764,7 +15830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 3003;
+ return 3009;
}
else
{
@@ -15776,7 +15842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 3009;
+ return 3015;
}
else
{
@@ -15784,7 +15850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 3008;
+ return 3014;
}
}
else
@@ -15835,7 +15901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2987;
+ return 2993;
}
else
{
@@ -15843,7 +15909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2988;
+ return 2994;
}
}
else
@@ -16246,7 +16312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2981;
+ return 2987;
}
else
{
@@ -16279,7 +16345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 3005;
+ return 3011;
}
else
{
@@ -16309,7 +16375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2982;
+ return 2988;
}
else
{
@@ -16438,7 +16504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2991;
+ return 2997;
}
else
{
@@ -16448,7 +16514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2993;
+ return 2999;
}
else
{
@@ -16456,7 +16522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2995;
+ return 3001;
}
}
}
@@ -16468,7 +16534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2992;
+ return 2998;
}
else
{
@@ -16478,7 +16544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2994;
+ return 3000;
}
else
{
@@ -16486,7 +16552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2996;
+ return 3002;
}
}
}
@@ -17545,7 +17611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2975;
+ return 2981;
}
else
{
@@ -17553,7 +17619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2977;
+ return 2983;
}
}
else
@@ -17562,7 +17628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2976;
+ return 2982;
}
}
}
@@ -19058,7 +19124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2985;
+ return 2991;
}
else
{
@@ -19066,7 +19132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2986;
+ return 2992;
}
}
}
@@ -19440,7 +19506,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2989;
+ return 2995;
}
else
{
@@ -19448,7 +19514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2990;
+ return 2996;
}
}
}
@@ -19809,7 +19875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2887;
+ return 2893;
}
else
{
@@ -19817,7 +19883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2888;
+ return 2894;
}
}
else
@@ -19830,7 +19896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx0
whilege. */
- return 2424;
+ return 2430;
}
else
{
@@ -19838,7 +19904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx1
whilegt. */
- return 2425;
+ return 2431;
}
}
else
@@ -19847,7 +19913,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2628;
+ return 2634;
}
}
}
@@ -19861,7 +19927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2890;
+ return 2896;
}
else
{
@@ -19869,7 +19935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2889;
+ return 2895;
}
}
else
@@ -19882,7 +19948,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx0
whilehs. */
- return 2427;
+ return 2433;
}
else
{
@@ -19890,7 +19956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx1
whilehi. */
- return 2426;
+ return 2432;
}
}
else
@@ -19899,7 +19965,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2630;
+ return 2636;
}
}
}
@@ -19916,7 +19982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2894;
+ return 2900;
}
else
{
@@ -19924,7 +19990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2891;
+ return 2897;
}
}
else
@@ -19937,7 +20003,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx0
whilelt. */
- return 2431;
+ return 2437;
}
else
{
@@ -19945,7 +20011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx1
whilele. */
- return 2428;
+ return 2434;
}
}
else
@@ -19954,7 +20020,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2629;
+ return 2635;
}
}
}
@@ -19968,7 +20034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2892;
+ return 2898;
}
else
{
@@ -19976,7 +20042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2893;
+ return 2899;
}
}
else
@@ -19987,7 +20053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx0
whilelo. */
- return 2429;
+ return 2435;
}
else
{
@@ -19995,7 +20061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx1
whilels. */
- return 2430;
+ return 2436;
}
}
}
@@ -21102,7 +21168,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 3006;
+ return 3012;
}
}
else
@@ -21761,7 +21827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2467;
+ return 2473;
}
}
else
@@ -22463,7 +22529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3142;
+ return 3148;
}
else
{
@@ -23043,7 +23109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3070;
+ return 3076;
}
else
{
@@ -23051,7 +23117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3072;
+ return 3078;
}
}
else
@@ -23062,7 +23128,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3076;
+ return 3082;
}
else
{
@@ -23070,7 +23136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3078;
+ return 3084;
}
}
}
@@ -23084,7 +23150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3073;
+ return 3079;
}
else
{
@@ -23092,7 +23158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3075;
+ return 3081;
}
}
else
@@ -23103,7 +23169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3079;
+ return 3085;
}
else
{
@@ -23111,7 +23177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3081;
+ return 3087;
}
}
}
@@ -23128,7 +23194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3094;
+ return 3100;
}
else
{
@@ -23136,7 +23202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3096;
+ return 3102;
}
}
else
@@ -23147,7 +23213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3100;
+ return 3106;
}
else
{
@@ -23155,7 +23221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3102;
+ return 3108;
}
}
}
@@ -23169,7 +23235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3097;
+ return 3103;
}
else
{
@@ -23177,7 +23243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3099;
+ return 3105;
}
}
else
@@ -23188,7 +23254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3103;
+ return 3109;
}
else
{
@@ -23196,7 +23262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3105;
+ return 3111;
}
}
}
@@ -23216,7 +23282,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3082;
+ return 3088;
}
else
{
@@ -23224,7 +23290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3084;
+ return 3090;
}
}
else
@@ -23235,7 +23301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3088;
+ return 3094;
}
else
{
@@ -23243,7 +23309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3090;
+ return 3096;
}
}
}
@@ -23257,7 +23323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3085;
+ return 3091;
}
else
{
@@ -23265,7 +23331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3087;
+ return 3093;
}
}
else
@@ -23276,7 +23342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3091;
+ return 3097;
}
else
{
@@ -23284,7 +23350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3093;
+ return 3099;
}
}
}
@@ -23301,7 +23367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3106;
+ return 3112;
}
else
{
@@ -23309,7 +23375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3108;
+ return 3114;
}
}
else
@@ -23320,7 +23386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3112;
+ return 3118;
}
else
{
@@ -23328,7 +23394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3114;
+ return 3120;
}
}
}
@@ -23342,7 +23408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3109;
+ return 3115;
}
else
{
@@ -23350,7 +23416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3111;
+ return 3117;
}
}
else
@@ -23361,7 +23427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3115;
+ return 3121;
}
else
{
@@ -23369,7 +23435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3117;
+ return 3123;
}
}
}
@@ -23403,7 +23469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3071;
+ return 3077;
}
else
{
@@ -23411,7 +23477,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3130;
+ return 3136;
}
}
else
@@ -23422,7 +23488,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3077;
+ return 3083;
}
else
{
@@ -23430,7 +23496,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3132;
+ return 3138;
}
}
}
@@ -23444,7 +23510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3074;
+ return 3080;
}
else
{
@@ -23452,7 +23518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3131;
+ return 3137;
}
}
else
@@ -23461,7 +23527,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3080;
+ return 3086;
}
}
}
@@ -23477,7 +23543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3095;
+ return 3101;
}
else
{
@@ -23485,7 +23551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3136;
+ return 3142;
}
}
else
@@ -23496,7 +23562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3101;
+ return 3107;
}
else
{
@@ -23504,7 +23570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3138;
+ return 3144;
}
}
}
@@ -23518,7 +23584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3098;
+ return 3104;
}
else
{
@@ -23526,7 +23592,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3137;
+ return 3143;
}
}
else
@@ -23535,7 +23601,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3104;
+ return 3110;
}
}
}
@@ -23554,7 +23620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3083;
+ return 3089;
}
else
{
@@ -23562,7 +23628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3133;
+ return 3139;
}
}
else
@@ -23573,7 +23639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3089;
+ return 3095;
}
else
{
@@ -23581,7 +23647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3135;
+ return 3141;
}
}
}
@@ -23595,7 +23661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3086;
+ return 3092;
}
else
{
@@ -23603,7 +23669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3134;
+ return 3140;
}
}
else
@@ -23612,7 +23678,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3092;
+ return 3098;
}
}
}
@@ -23628,7 +23694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3107;
+ return 3113;
}
else
{
@@ -23636,7 +23702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3139;
+ return 3145;
}
}
else
@@ -23647,7 +23713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3113;
+ return 3119;
}
else
{
@@ -23655,7 +23721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3141;
+ return 3147;
}
}
}
@@ -23669,7 +23735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3110;
+ return 3116;
}
else
{
@@ -23677,7 +23743,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3140;
+ return 3146;
}
}
else
@@ -23686,7 +23752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3116;
+ return 3122;
}
}
}
@@ -23853,7 +23919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2997;
+ return 3003;
}
}
}
@@ -23886,7 +23952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2923;
+ return 2929;
}
}
else
@@ -23960,7 +24026,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2999;
+ return 3005;
}
}
}
@@ -23993,7 +24059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 3000;
+ return 3006;
}
}
else
@@ -24040,7 +24106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2930;
+ return 2936;
}
else
{
@@ -24048,7 +24114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2932;
+ return 2938;
}
}
else
@@ -24059,7 +24125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2934;
+ return 2940;
}
else
{
@@ -24073,7 +24139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2935;
+ return 2941;
}
else
{
@@ -24081,7 +24147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2928;
+ return 2934;
}
}
else
@@ -24090,7 +24156,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2937;
+ return 2943;
}
}
else
@@ -24103,7 +24169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2936;
+ return 2942;
}
else
{
@@ -24111,7 +24177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2941;
+ return 2947;
}
}
else
@@ -24120,7 +24186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2938;
+ return 2944;
}
}
}
@@ -24301,7 +24367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2922;
+ return 2928;
}
}
else
@@ -24332,7 +24398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2998;
+ return 3004;
}
else
{
@@ -24351,7 +24417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 3014;
+ return 3020;
}
else
{
@@ -24361,7 +24427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 3012;
+ return 3018;
}
else
{
@@ -24371,7 +24437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 3019;
+ return 3025;
}
else
{
@@ -24379,7 +24445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 3018;
+ return 3024;
}
}
}
@@ -24963,7 +25029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 3015;
+ return 3021;
}
else
{
@@ -24971,7 +25037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 3016;
+ return 3022;
}
}
}
@@ -25289,7 +25355,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2933;
+ return 2939;
}
}
else
@@ -25900,7 +25966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2926;
+ return 2932;
}
}
}
@@ -25952,7 +26018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2939;
+ return 2945;
}
}
}
@@ -26195,7 +26261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2929;
+ return 2935;
}
}
else
@@ -26271,7 +26337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2942;
+ return 2948;
}
}
else
@@ -27097,7 +27163,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2927;
+ return 2933;
}
}
else
@@ -27129,7 +27195,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2940;
+ return 2946;
}
}
else
@@ -27369,7 +27435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2931;
+ return 2937;
}
}
else
@@ -27401,7 +27467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2945;
+ return 2951;
}
else
{
@@ -27409,7 +27475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2949;
+ return 2955;
}
}
}
@@ -27431,7 +27497,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2946;
+ return 2952;
}
else
{
@@ -27439,7 +27505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2950;
+ return 2956;
}
}
}
@@ -27478,7 +27544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2943;
+ return 2949;
}
else
{
@@ -27486,7 +27552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2947;
+ return 2953;
}
}
else
@@ -27508,7 +27574,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2944;
+ return 2950;
}
else
{
@@ -27516,7 +27582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2948;
+ return 2954;
}
}
else
@@ -29324,7 +29390,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2951;
+ return 2957;
}
else
{
@@ -29332,7 +29398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2955;
+ return 2961;
}
}
else
@@ -29354,7 +29420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2952;
+ return 2958;
}
else
{
@@ -29362,7 +29428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2956;
+ return 2962;
}
}
else
@@ -29868,7 +29934,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2953;
+ return 2959;
}
else
{
@@ -29876,7 +29942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2957;
+ return 2963;
}
}
}
@@ -29898,7 +29964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2954;
+ return 2960;
}
else
{
@@ -29906,7 +29972,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2958;
+ return 2964;
}
}
}
@@ -29962,7 +30028,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2925;
+ return 2931;
}
else
{
@@ -29970,7 +30036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2924;
+ return 2930;
}
}
}
@@ -30073,7 +30139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 3002;
+ return 3008;
}
else
{
@@ -30081,7 +30147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 3001;
+ return 3007;
}
}
else
@@ -30092,7 +30158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 3013;
+ return 3019;
}
else
{
@@ -30102,7 +30168,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 3021;
+ return 3027;
}
else
{
@@ -30110,7 +30176,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 3020;
+ return 3026;
}
}
}
@@ -30601,22 +30667,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
+ case 2622: value = 2630; break; /* mov --> mova. */
+ case 2630: return NULL; /* mova --> NULL. */
+ case 2618: value = 2626; break; /* mov --> mova. */
+ case 2626: return NULL; /* mova --> NULL. */
+ case 2620: value = 2628; break; /* mov --> mova. */
+ case 2628: return NULL; /* mova --> NULL. */
case 2616: value = 2624; break; /* mov --> mova. */
case 2624: return NULL; /* mova --> NULL. */
- case 2612: value = 2620; break; /* mov --> mova. */
- case 2620: return NULL; /* mova --> NULL. */
- case 2614: value = 2622; break; /* mov --> mova. */
- case 2622: return NULL; /* mova --> NULL. */
- case 2610: value = 2618; break; /* mov --> mova. */
- case 2618: return NULL; /* mova --> NULL. */
+ case 2623: value = 2631; break; /* mov --> mova. */
+ case 2631: return NULL; /* mova --> NULL. */
+ case 2619: value = 2627; break; /* mov --> mova. */
+ case 2627: return NULL; /* mova --> NULL. */
+ case 2621: value = 2629; break; /* mov --> mova. */
+ case 2629: return NULL; /* mova --> NULL. */
case 2617: value = 2625; break; /* mov --> mova. */
case 2625: return NULL; /* mova --> NULL. */
- case 2613: value = 2621; break; /* mov --> mova. */
- case 2621: return NULL; /* mova --> NULL. */
- case 2615: value = 2623; break; /* mov --> mova. */
- case 2623: return NULL; /* mova --> NULL. */
- case 2611: value = 2619; break; /* mov --> mova. */
- case 2619: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -30638,11 +30704,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3143; break; /* addg --> smax. */
- case 3143: value = 3144; break; /* smax --> umax. */
- case 3144: value = 3145; break; /* umax --> smin. */
- case 3145: value = 3146; break; /* smin --> umin. */
- case 3146: return NULL; /* umin --> NULL. */
+ case 19: value = 3149; break; /* addg --> smax. */
+ case 3149: value = 3150; break; /* smax --> umax. */
+ case 3150: value = 3151; break; /* umax --> smin. */
+ case 3151: value = 3152; break; /* smin --> umin. */
+ case 3152: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30800,8 +30866,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 3017; break; /* fcvt --> bfcvt. */
- case 3017: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3023; break; /* fcvt --> bfcvt. */
+ case 3023: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -31306,15 +31372,15 @@ aarch64_extract_operand (const aarch64_operand *self,
case 201:
case 202:
case 203:
- case 209:
- case 212:
- case 216:
- case 223:
+ case 210:
+ case 213:
+ case 217:
case 224:
- case 231:
+ case 225:
case 232:
case 233:
case 234:
+ case 235:
return aarch64_ext_regno (self, info, code, inst, errors);
case 10:
return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -31330,7 +31396,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 270:
+ case 271:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -31376,13 +31442,13 @@ aarch64_extract_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 237:
- case 264:
+ case 238:
case 265:
- case 267:
- case 269:
- case 274:
+ case 266:
+ case 268:
+ case 270:
case 275:
+ case 276:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -31453,8 +31519,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
case 108:
- case 266:
- case 268:
+ case 267:
+ case 269:
return aarch64_ext_none (self, info, code, inst, errors);
case 109:
return aarch64_ext_hint (self, info, code, inst, errors);
@@ -31534,41 +31600,41 @@ aarch64_extract_operand (const aarch64_operand *self,
case 184:
case 185:
case 186:
- case 250:
+ case 251:
return aarch64_ext_sve_shrimm (self, info, code, inst, errors);
case 204:
case 205:
case 206:
case 207:
case 208:
+ case 209:
return aarch64_ext_sve_quad_index (self, info, code, inst, errors);
- case 210:
- return aarch64_ext_sve_index (self, info, code, inst, errors);
case 211:
- case 213:
- case 230:
- return aarch64_ext_sve_reglist (self, info, code, inst, errors);
+ return aarch64_ext_sve_index (self, info, code, inst, errors);
+ case 212:
case 214:
+ case 231:
+ return aarch64_ext_sve_reglist (self, info, code, inst, errors);
case 215:
- case 217:
+ case 216:
case 218:
case 219:
case 220:
- case 229:
- return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 221:
+ case 230:
+ return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 222:
+ case 223:
return aarch64_ext_sve_strided_reglist (self, info, code, inst, errors);
- case 225:
- case 227:
- case 238:
- return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
case 226:
case 228:
+ case 239:
+ return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 227:
+ case 229:
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 235:
case 236:
- case 251:
+ case 237:
case 252:
case 253:
case 254:
@@ -31581,26 +31647,27 @@ aarch64_extract_operand (const aarch64_operand *self,
case 261:
case 262:
case 263:
+ case 264:
return aarch64_ext_simple_index (self, info, code, inst, errors);
- case 239:
case 240:
case 241:
case 242:
case 243:
case 244:
case 245:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 246:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 247:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 248:
- return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 249:
+ return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 250:
return aarch64_ext_plain_shrimm (self, info, code, inst, errors);
- case 271:
case 272:
case 273:
+ case 274:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index ae707ef82c9..978f045cb3b 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -229,8 +229,9 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm_5", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zm_5}, "an SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm_16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zm_16}, "an SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm3_INDEX", 3 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zm_16}, "an indexed SVE vector register"},
- {AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm3_22_INDEX", 3 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_i3h, FLD_SVE_Zm_16}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm3_11_INDEX", 3 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_i3h2, FLD_SVE_i3l, FLD_SVE_imm3}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm3_19_INDEX", 3 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm2_19, FLD_SVE_imm3}, "an indexed SVE vector register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm3_22_INDEX", 3 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_i3h, FLD_SVE_Zm_16}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm4_11_INDEX", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_i2h, FLD_SVE_i3l, FLD_SVE_imm4}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zm4_INDEX", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zm_16}, "an indexed SVE vector register"},
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn}, "an SVE vector register"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 810548a93bd..b97195e65aa 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -332,6 +332,7 @@ const aarch64_field fields[] =
{ 10, 2 }, /* imm2_10: 2-bit immediate, bits [11:10] */
{ 15, 2 }, /* imm2_15: 2-bit immediate, bits [16:15] */
{ 16, 2 }, /* imm2_16: 2-bit immediate, bits [17:16] */
+ { 19, 2 }, /* imm2_19: 2-bit immediate, bits [20:19] */
{ 0, 3 }, /* imm3_0: general immediate in bits [2:0]. */
{ 5, 3 }, /* imm3_5: general immediate in bits [7:5]. */
{ 10, 3 }, /* imm3_10: in add/sub extended reg instructions. */
@@ -1735,6 +1736,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
{
case AARCH64_OPND_SVE_Zm3_INDEX:
case AARCH64_OPND_SVE_Zm3_22_INDEX:
+ case AARCH64_OPND_SVE_Zm3_19_INDEX:
case AARCH64_OPND_SVE_Zm3_11_INDEX:
case AARCH64_OPND_SVE_Zm4_11_INDEX:
case AARCH64_OPND_SVE_Zm4_INDEX:
@@ -3977,6 +3979,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_SVE_Zm3_INDEX:
case AARCH64_OPND_SVE_Zm3_22_INDEX:
+ case AARCH64_OPND_SVE_Zm3_19_INDEX:
case AARCH64_OPND_SVE_Zm3_11_INDEX:
case AARCH64_OPND_SVE_Zm4_11_INDEX:
case AARCH64_OPND_SVE_Zm4_INDEX:
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 698b00d7805..129b00da065 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -153,6 +153,7 @@ enum aarch64_field_kind
FLD_imm2_10,
FLD_imm2_15,
FLD_imm2_16,
+ FLD_imm2_19,
FLD_imm3_0,
FLD_imm3_5,
FLD_imm3_10,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 6936c36ea8a..65ece2086f5 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5364,6 +5364,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSNC ("bfmlslb", 0x64e0a000, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("bfmlslt", 0x64e06400, 0xffe0f400, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_11_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("bfmlslt", 0x64e0a400, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("fdot", 0x64204000, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_19_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("fdot", 0x64208000, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("sdot", 0x4480c800, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_19_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("sdot", 0x4400c800, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("udot", 0x4480cc00, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_19_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("udot", 0x4400cc00, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSN ("whilege", 0x25205010, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25205011, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25205811, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
@@ -6486,12 +6492,15 @@ const struct aarch64_opcode aarch64_opcode_table[] =
Y(SVE_REG, sve_quad_index, "SVE_Zm3_INDEX", \
3 << OPD_F_OD_LSB, F(FLD_SVE_Zm_16), \
"an indexed SVE vector register") \
- Y(SVE_REG, sve_quad_index, "SVE_Zm3_22_INDEX", \
- 3 << OPD_F_OD_LSB, F(FLD_SVE_i3h, FLD_SVE_Zm_16), \
- "an indexed SVE vector register") \
Y(SVE_REG, sve_quad_index, "SVE_Zm3_11_INDEX", \
3 << OPD_F_OD_LSB, F(FLD_SVE_i3h2, FLD_SVE_i3l, FLD_SVE_imm3), \
"an indexed SVE vector register") \
+ Y(SVE_REG, sve_quad_index, "SVE_Zm3_19_INDEX", \
+ 3 << OPD_F_OD_LSB, F(FLD_imm2_19, FLD_SVE_imm3), \
+ "an indexed SVE vector register") \
+ Y(SVE_REG, sve_quad_index, "SVE_Zm3_22_INDEX", \
+ 3 << OPD_F_OD_LSB, F(FLD_SVE_i3h, FLD_SVE_Zm_16), \
+ "an indexed SVE vector register") \
Y(SVE_REG, sve_quad_index, "SVE_Zm4_11_INDEX", \
4 << OPD_F_OD_LSB, F(FLD_SVE_i2h, FLD_SVE_i3l, FLD_SVE_imm4), \
"an indexed SVE vector register") \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 28/31] aarch64: Add new SVE saturating conversion instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (26 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 27/31] aarch64: Add new SVE dot-product instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 29/31] aarch64: Add new SVE shift instructions Richard Sandiford
` (4 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds the SVE SQCVTN, SQCVTUN and UQCVTN instructions,
which are available when FEAT_SME2 is implemented.
---
.../gas/aarch64/sve2-sme2-5-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-5-invalid.l | 27 +
.../gas/aarch64/sve2-sme2-5-invalid.s | 12 +
.../gas/aarch64/sve2-sme2-5-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-5-noarch.l | 13 +
gas/testsuite/gas/aarch64/sve2-sme2-5.d | 21 +
gas/testsuite/gas/aarch64/sve2-sme2-5.s | 14 +
opcodes/aarch64-dis-2.c | 1537 +++++++++--------
opcodes/aarch64-tbl.h | 3 +
9 files changed, 881 insertions(+), 752 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5.s
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.d
new file mode 100644
index 00000000000..190f2c89a28
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sve2-sme2-5-invalid.s
+#error_output: sve2-sme2-5-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l
new file mode 100644
index 00000000000..e08001c8ec6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l
@@ -0,0 +1,27 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvtn z0\.h,0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z1\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtun z0\.h,{z0\.s-z2\.s}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtn z0\.h,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.s,{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvtun z0\.b, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvtun z0\.h, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvtn z0\.b, {z0\.s-z3\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvtn z0\.h, {z0\.d-z3\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.b,{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvtun z0\.b, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvtun z0\.h, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqcvtn z0\.h, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqcvtn z0\.b, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqcvtn z0\.h,{z2\.s-z3\.s}'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.s
new file mode 100644
index 00000000000..d2d6e3caac8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.s
@@ -0,0 +1,12 @@
+ sqcvtn 0, { z0.s - z1.s }
+ sqcvtn z0.h, 0
+
+ sqcvtn z0.h, { z1.s - z2.s }
+ sqcvtun z0.h, { z0.s - z2.s }
+ sqcvtn z0.h, { z0.s - z3.s }
+ sqcvtun z0.s, { z0.s - z3.s }
+ sqcvtn z0.s, { z0.h - z3.h }
+ sqcvtun z0.b, { z0.h - z1.h }
+ sqcvtn z0.s, { z0.d - z1.d }
+
+ movprfx z0, z4; sqcvtn z0.h, { z2.s - z3.s }
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.d
new file mode 100644
index 00000000000..3d09a371a90
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sve2-sme2-5.s
+#error_output: sve2-sme2-5-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l
new file mode 100644
index 00000000000..de50d040c21
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l
@@ -0,0 +1,13 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z14\.h,{z20\.s-z21\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z26\.h,{z14\.s-z15\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z29\.h,{z6\.s-z7\.s}'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5.d b/gas/testsuite/gas/aarch64/sve2-sme2-5.d
new file mode 100644
index 00000000000..a1e5dc19a1c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5.d
@@ -0,0 +1,21 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 45314000 sqcvtn z0\.h, {z0\.s-z1\.s}
+[^:]+: 4531401f sqcvtn z31\.h, {z0\.s-z1\.s}
+[^:]+: 453143c0 sqcvtn z0\.h, {z30\.s-z31\.s}
+[^:]+: 4531428e sqcvtn z14\.h, {z20\.s-z21\.s}
+[^:]+: 45315000 sqcvtun z0\.h, {z0\.s-z1\.s}
+[^:]+: 4531501f sqcvtun z31\.h, {z0\.s-z1\.s}
+[^:]+: 453153c0 sqcvtun z0\.h, {z30\.s-z31\.s}
+[^:]+: 453151da sqcvtun z26\.h, {z14\.s-z15\.s}
+[^:]+: 45314800 uqcvtn z0\.h, {z0\.s-z1\.s}
+[^:]+: 4531481f uqcvtn z31\.h, {z0\.s-z1\.s}
+[^:]+: 45314bc0 uqcvtn z0\.h, {z30\.s-z31\.s}
+[^:]+: 453148dd uqcvtn z29\.h, {z6\.s-z7\.s}
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5.s b/gas/testsuite/gas/aarch64/sve2-sme2-5.s
new file mode 100644
index 00000000000..a42f5a29736
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-5.s
@@ -0,0 +1,14 @@
+ sqcvtn z0.h, { z0.s - z1.s }
+ sqcvtn z31.h, { z0.s - z1.s }
+ sqcvtn z0.h, { z30.s - z31.s }
+ sqcvtn z14.h, { z20.s - z21.s }
+
+ sqcvtun z0.h, { z0.s - z1.s }
+ sqcvtun z31.h, { z0.s - z1.s }
+ sqcvtun z0.h, { z30.s - z31.s }
+ sqcvtun z26.h, { z14.s - z15.s }
+
+ uqcvtn z0.h, { z0.s - z1.s }
+ uqcvtn z31.h, { z0.s - z1.s }
+ uqcvtn z0.h, { z30.s - z31.s }
+ uqcvtn z29.h, { z6.s - z7.s }
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index f67f77f1783..dfea29de74c 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2471;
+ return 2474;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2472;
+ return 2475;
}
}
}
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2901;
+ return 2904;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2615;
+ return 2618;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2614;
+ return 2617;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2613;
+ return 2616;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2622;
+ return 2625;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2618;
+ return 2621;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2612;
+ return 2615;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2611;
+ return 2614;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2633;
+ return 2636;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2632;
+ return 2635;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2610;
+ return 2613;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2620;
+ return 2623;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2616;
+ return 2619;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2623;
+ return 2626;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2619;
+ return 2622;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2621;
+ return 2624;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2617;
+ return 2620;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2549;
+ return 2552;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2550;
+ return 2553;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2573;
+ return 2576;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2574;
+ return 2577;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2565;
+ return 2568;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2566;
+ return 2569;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2557;
+ return 2560;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2558;
+ return 2561;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2581;
+ return 2584;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2582;
+ return 2585;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2605;
+ return 2608;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2606;
+ return 2609;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2597;
+ return 2600;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2598;
+ return 2601;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2589;
+ return 2592;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2590;
+ return 2593;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2695;
+ return 2698;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2696;
+ return 2699;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2545;
+ return 2548;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2546;
+ return 2549;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2569;
+ return 2572;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2570;
+ return 2573;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2561;
+ return 2564;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2562;
+ return 2565;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2553;
+ return 2556;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2554;
+ return 2557;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2577;
+ return 2580;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2578;
+ return 2581;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2601;
+ return 2604;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2602;
+ return 2605;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2593;
+ return 2596;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2594;
+ return 2597;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2585;
+ return 2588;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2586;
+ return 2589;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2721;
+ return 2724;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2722;
+ return 2725;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2745;
+ return 2748;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2746;
+ return 2749;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2737;
+ return 2740;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2738;
+ return 2741;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2729;
+ return 2732;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2730;
+ return 2733;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2753;
+ return 2756;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2754;
+ return 2757;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2777;
+ return 2780;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2778;
+ return 2781;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2769;
+ return 2772;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2770;
+ return 2773;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2761;
+ return 2764;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2762;
+ return 2765;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2717;
+ return 2720;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2718;
+ return 2721;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2741;
+ return 2744;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2742;
+ return 2745;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2733;
+ return 2736;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2734;
+ return 2737;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2725;
+ return 2728;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2726;
+ return 2729;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2749;
+ return 2752;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2750;
+ return 2753;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2773;
+ return 2776;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2774;
+ return 2777;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2765;
+ return 2768;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2766;
+ return 2769;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2757;
+ return 2760;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2758;
+ return 2761;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2671;
+ return 2674;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2876;
+ return 2879;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2672;
+ return 2675;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2673;
+ return 2676;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2877;
+ return 2880;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2878;
+ return 2881;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2834;
+ return 2837;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2792;
+ return 2795;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2835;
+ return 2838;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2836;
+ return 2839;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2793;
+ return 2796;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2794;
+ return 2797;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2687;
+ return 2690;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2688;
+ return 2691;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2689;
+ return 2692;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2850;
+ return 2853;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2851;
+ return 2854;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2852;
+ return 2855;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2551;
+ return 2554;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2575;
+ return 2578;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2567;
+ return 2570;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2559;
+ return 2562;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2583;
+ return 2586;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2607;
+ return 2610;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2599;
+ return 2602;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2591;
+ return 2594;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2552;
+ return 2555;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2609;
+ return 2612;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2576;
+ return 2579;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2568;
+ return 2571;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2560;
+ return 2563;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2584;
+ return 2587;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2608;
+ return 2611;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2600;
+ return 2603;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2592;
+ return 2595;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2908;
+ return 2911;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2909;
+ return 2912;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2910;
+ return 2913;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2512;
+ return 2515;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2513;
+ return 2516;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2514;
+ return 2517;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2917;
+ return 2920;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2918;
+ return 2921;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2919;
+ return 2922;
}
}
}
@@ -1836,7 +1836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2454;
+ return 2457;
}
else
{
@@ -1846,7 +1846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2455;
+ return 2458;
}
else
{
@@ -1854,7 +1854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2456;
+ return 2459;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2911;
+ return 2914;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2912;
+ return 2915;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2913;
+ return 2916;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2526;
+ return 2529;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2527;
+ return 2530;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2528;
+ return 2531;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2858;
+ return 2861;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2920;
+ return 2923;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2921;
+ return 2924;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2922;
+ return 2925;
}
}
}
@@ -1988,7 +1988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2462;
+ return 2465;
}
else
{
@@ -1998,7 +1998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2463;
+ return 2466;
}
else
{
@@ -2006,7 +2006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2464;
+ return 2467;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2859;
+ return 2862;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2547;
+ return 2550;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2571;
+ return 2574;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2563;
+ return 2566;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2555;
+ return 2558;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2506;
+ return 2509;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2641;
+ return 2644;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2800;
+ return 2803;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2647;
+ return 2650;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2520;
+ return 2523;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2806;
+ return 2809;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2887;
+ return 2890;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2812;
+ return 2815;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2548;
+ return 2551;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2572;
+ return 2575;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2564;
+ return 2567;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2556;
+ return 2559;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2507;
+ return 2510;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2642;
+ return 2645;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2801;
+ return 2804;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2648;
+ return 2651;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2521;
+ return 2524;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2807;
+ return 2810;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2888;
+ return 2891;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2813;
+ return 2816;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2579;
+ return 2582;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2603;
+ return 2606;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2595;
+ return 2598;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2587;
+ return 2590;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2544;
+ return 2547;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2484;
+ return 2487;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2870;
+ return 2873;
}
}
else
@@ -2375,7 +2375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx011xxx
bfvdot. */
- return 2470;
+ return 2473;
}
else
{
@@ -2383,7 +2383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx011xxx
bfdot. */
- return 2448;
+ return 2451;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2788;
+ return 2791;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2580;
+ return 2583;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2604;
+ return 2607;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2596;
+ return 2599;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2588;
+ return 2591;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2485;
+ return 2488;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2884;
+ return 2887;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2871;
+ return 2874;
}
}
}
@@ -2480,7 +2480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx011xxx
bfdot. */
- return 2449;
+ return 2452;
}
else
{
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2799;
+ return 2802;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2789;
+ return 2792;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2924;
+ return 2927;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2925;
+ return 2928;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2663;
+ return 2666;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2664;
+ return 2667;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2665;
+ return 2668;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2906;
+ return 2909;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2907;
+ return 2910;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2914;
+ return 2917;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2679;
+ return 2682;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2680;
+ return 2683;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2681;
+ return 2684;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2926;
+ return 2929;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2927;
+ return 2930;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2826;
+ return 2829;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2827;
+ return 2830;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2828;
+ return 2831;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2915;
+ return 2918;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2916;
+ return 2919;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2923;
+ return 2926;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2842;
+ return 2845;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2843;
+ return 2846;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2844;
+ return 2847;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2675;
+ return 2678;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2676;
+ return 2679;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2677;
+ return 2680;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2678;
+ return 2681;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2880;
+ return 2883;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2881;
+ return 2884;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2882;
+ return 2885;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2883;
+ return 2886;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2486;
+ return 2489;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2487;
+ return 2490;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2488;
+ return 2491;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2489;
+ return 2492;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2516;
+ return 2519;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2517;
+ return 2520;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2518;
+ return 2521;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2519;
+ return 2522;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2667;
+ return 2670;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2668;
+ return 2671;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2669;
+ return 2672;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2670;
+ return 2673;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2508;
+ return 2511;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2509;
+ return 2512;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2510;
+ return 2513;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2511;
+ return 2514;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2674;
+ return 2677;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2879;
+ return 2882;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2649;
+ return 2652;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2650;
+ return 2653;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2651;
+ return 2654;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2652;
+ return 2655;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2515;
+ return 2518;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2666;
+ return 2669;
}
}
else
@@ -3166,7 +3166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2474;
+ return 2477;
}
else
{
@@ -3174,7 +3174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2475;
+ return 2478;
}
}
}
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2838;
+ return 2841;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2839;
+ return 2842;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2840;
+ return 2843;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2841;
+ return 2844;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2795;
+ return 2798;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2796;
+ return 2799;
}
}
}
@@ -3259,7 +3259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx10xxx
bfdot. */
- return 2450;
+ return 2453;
}
else
{
@@ -3267,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx10xxx
bfdot. */
- return 2451;
+ return 2454;
}
}
else
@@ -3278,7 +3278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx10xxx
bfdot. */
- return 2452;
+ return 2455;
}
else
{
@@ -3286,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx10xxx
bfdot. */
- return 2453;
+ return 2456;
}
}
}
@@ -3305,7 +3305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2458;
+ return 2461;
}
else
{
@@ -3313,7 +3313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2459;
+ return 2462;
}
}
else
@@ -3324,7 +3324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2460;
+ return 2463;
}
else
{
@@ -3332,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2461;
+ return 2464;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2830;
+ return 2833;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2831;
+ return 2834;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2832;
+ return 2835;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2833;
+ return 2836;
}
}
}
@@ -3388,7 +3388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx10xxx
add. */
- return 2440;
+ return 2443;
}
else
{
@@ -3396,7 +3396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx10xxx
add. */
- return 2441;
+ return 2444;
}
}
else
@@ -3407,7 +3407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx10xxx
add. */
- return 2442;
+ return 2445;
}
else
{
@@ -3415,7 +3415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx10xxx
add. */
- return 2443;
+ return 2446;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2837;
+ return 2840;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2814;
+ return 2817;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2815;
+ return 2818;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2816;
+ return 2819;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2817;
+ return 2820;
}
}
}
@@ -3485,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2457;
+ return 2460;
}
else
{
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2829;
+ return 2832;
}
}
else
@@ -3504,7 +3504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx10xxx
add. */
- return 2438;
+ return 2441;
}
else
{
@@ -3512,7 +3512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx10xxx
add. */
- return 2439;
+ return 2442;
}
}
}
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2691;
+ return 2694;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2692;
+ return 2695;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2693;
+ return 2696;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2694;
+ return 2697;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2530;
+ return 2533;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2531;
+ return 2534;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2532;
+ return 2535;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2533;
+ return 2536;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2683;
+ return 2686;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2684;
+ return 2687;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2685;
+ return 2688;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2686;
+ return 2689;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2522;
+ return 2525;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2523;
+ return 2526;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2524;
+ return 2527;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2525;
+ return 2528;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2690;
+ return 2693;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2872;
+ return 2875;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2873;
+ return 2876;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2874;
+ return 2877;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2875;
+ return 2878;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2643;
+ return 2646;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2644;
+ return 2647;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2645;
+ return 2648;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2646;
+ return 2649;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2529;
+ return 2532;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2682;
+ return 2685;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2542;
+ return 2545;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2543;
+ return 2546;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2854;
+ return 2857;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2855;
+ return 2858;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2856;
+ return 2859;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2857;
+ return 2860;
}
}
}
@@ -3896,7 +3896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2466;
+ return 2469;
}
else
{
@@ -3904,7 +3904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2467;
+ return 2470;
}
}
else
@@ -3915,7 +3915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2468;
+ return 2471;
}
else
{
@@ -3923,7 +3923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2469;
+ return 2472;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2846;
+ return 2849;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2847;
+ return 2850;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2848;
+ return 2851;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2849;
+ return 2852;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2784;
+ return 2787;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2785;
+ return 2788;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2786;
+ return 2789;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2787;
+ return 2790;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2853;
+ return 2856;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2790;
+ return 2793;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2791;
+ return 2794;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2808;
+ return 2811;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2809;
+ return 2812;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2810;
+ return 2813;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2811;
+ return 2814;
}
}
}
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2465;
+ return 2468;
}
else
{
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2845;
+ return 2848;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2782;
+ return 2785;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2783;
+ return 2786;
}
}
}
@@ -4145,7 +4145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0100xxxxxxxxxxxxx
sel. */
- return 2653;
+ return 2656;
}
else
{
@@ -4153,7 +4153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1100xxxxxxxxxxxxx
sel. */
- return 2654;
+ return 2657;
}
}
else
@@ -4170,7 +4170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110000xxxxxxxxx0
fclamp. */
- return 2476;
+ return 2479;
}
else
{
@@ -4178,7 +4178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110100xxxxxxxxx0
zip. */
- return 2902;
+ return 2905;
}
}
else
@@ -4187,7 +4187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x00xxxxxxxxx1
uzp. */
- return 2889;
+ return 2892;
}
}
else
@@ -4198,7 +4198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110010xxxxxxxxxx
fclamp. */
- return 2477;
+ return 2480;
}
else
{
@@ -4210,7 +4210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx00xxxxx
sqrshr. */
- return 2708;
+ return 2711;
}
else
{
@@ -4218,7 +4218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx10xxxxx
sqrshru. */
- return 2711;
+ return 2714;
}
}
else
@@ -4227,7 +4227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxxx1xxxxx
uqrshr. */
- return 2864;
+ return 2867;
}
}
}
@@ -4244,7 +4244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx0
sclamp. */
- return 2637;
+ return 2640;
}
else
{
@@ -4252,7 +4252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx1
uclamp. */
- return 2802;
+ return 2805;
}
}
else
@@ -4265,7 +4265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx0
zip. */
- return 2903;
+ return 2906;
}
else
{
@@ -4273,7 +4273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx1
uzp. */
- return 2890;
+ return 2893;
}
}
else
@@ -4286,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110xxxx110101xxxx0xxxxx
sqrshr. */
- return 2707;
+ return 2710;
}
else
{
@@ -4294,7 +4294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111xxxx110101xxxx0xxxxx
sqrshru. */
- return 2710;
+ return 2713;
}
}
else
@@ -4303,7 +4303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx110101xxxx1xxxxx
uqrshr. */
- return 2863;
+ return 2866;
}
}
}
@@ -4318,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx0
sclamp. */
- return 2638;
+ return 2641;
}
else
{
@@ -4326,7 +4326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx1
uclamp. */
- return 2803;
+ return 2806;
}
}
else
@@ -4339,7 +4339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx00xxxxx
sqrshrn. */
- return 2709;
+ return 2712;
}
else
{
@@ -4347,7 +4347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx10xxxxx
sqrshrun. */
- return 2712;
+ return 2715;
}
}
else
@@ -4356,7 +4356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxxx1xxxxx
uqrshrn. */
- return 2865;
+ return 2868;
}
}
}
@@ -4383,7 +4383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx0
smax. */
- return 2655;
+ return 2658;
}
else
{
@@ -4393,7 +4393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100001xx0xxxx0
fmax. */
- return 2490;
+ return 2493;
}
else
{
@@ -4401,7 +4401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100011xx0xxxx0
add. */
- return 2444;
+ return 2447;
}
}
}
@@ -4415,7 +4415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx0
smin. */
- return 2659;
+ return 2662;
}
else
{
@@ -4423,7 +4423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx0
srshl. */
- return 2713;
+ return 2716;
}
}
else
@@ -4432,7 +4432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx0
fmaxnm. */
- return 2494;
+ return 2497;
}
}
}
@@ -4446,7 +4446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2818;
+ return 2821;
}
else
{
@@ -4454,7 +4454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx0xxxx1
fmin. */
- return 2498;
+ return 2501;
}
}
else
@@ -4467,7 +4467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx1
umin. */
- return 2822;
+ return 2825;
}
else
{
@@ -4475,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx1
urshl. */
- return 2866;
+ return 2869;
}
}
else
@@ -4484,7 +4484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx1
fminnm. */
- return 2502;
+ return 2505;
}
}
}
@@ -4507,7 +4507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01x0000111000xxxx0xxxxx
fcvt. */
- return 2478;
+ return 2481;
}
else
{
@@ -4515,7 +4515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11x0000111000xxxx0xxxxx
bfcvt. */
- return 2446;
+ return 2449;
}
}
else
@@ -4526,7 +4526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101000111000xxxx0xxxxx
frintn. */
- return 2538;
+ return 2541;
}
else
{
@@ -4534,7 +4534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111000111000xxxx0xxxxx
frintn. */
- return 2539;
+ return 2542;
}
}
}
@@ -4546,7 +4546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x100111000xxxx0xxxxx
frinta. */
- return 2534;
+ return 2537;
}
else
{
@@ -4554,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x100111000xxxx0xxxxx
frinta. */
- return 2535;
+ return 2538;
}
}
}
@@ -4570,7 +4570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100010111000xxxx0xxxxx
scvtf. */
- return 2639;
+ return 2642;
}
else
{
@@ -4578,7 +4578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110010111000xxxx0xxxxx
scvtf. */
- return 2640;
+ return 2643;
}
}
else
@@ -4589,7 +4589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101010111000xxxx0xxxxx
frintm. */
- return 2536;
+ return 2539;
}
else
{
@@ -4597,7 +4597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111010111000xxxx0xxxxx
frintm. */
- return 2537;
+ return 2540;
}
}
}
@@ -4609,7 +4609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx0x
zip. */
- return 2904;
+ return 2907;
}
else
{
@@ -4617,7 +4617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx1x
uzp. */
- return 2891;
+ return 2894;
}
}
}
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxx00111000xxxx1xxxxx
fcvtn. */
- return 2479;
+ return 2482;
}
else
{
@@ -4640,7 +4640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxx00111000xxxx1xxxxx
bfcvtn. */
- return 2447;
+ return 2450;
}
}
else
@@ -4651,7 +4651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx10111000xxxx1xxxxx
ucvtf. */
- return 2804;
+ return 2807;
}
else
{
@@ -4659,7 +4659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx10111000xxxx1xxxxx
ucvtf. */
- return 2805;
+ return 2808;
}
}
}
@@ -4682,7 +4682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100001111000xxxx0xxxx0
fcvtzs. */
- return 2480;
+ return 2483;
}
else
{
@@ -4690,7 +4690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110001111000xxxx0xxxx0
fcvtzs. */
- return 2481;
+ return 2484;
}
}
else
@@ -4701,7 +4701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101001111000xxxx0xxxx0
frintp. */
- return 2540;
+ return 2543;
}
else
{
@@ -4709,7 +4709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111001111000xxxx0xxxx0
frintp. */
- return 2541;
+ return 2544;
}
}
}
@@ -4721,7 +4721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x001111000xxxx1xxxx0
fcvtzu. */
- return 2482;
+ return 2485;
}
else
{
@@ -4729,7 +4729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x001111000xxxx1xxxx0
fcvtzu. */
- return 2483;
+ return 2486;
}
}
}
@@ -4741,7 +4741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x101111000xxxxxxxxx0
sunpk. */
- return 2797;
+ return 2800;
}
else
{
@@ -4749,7 +4749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x101111000xxxxxxxxx0
sunpk. */
- return 2798;
+ return 2801;
}
}
}
@@ -4761,7 +4761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx01111000xxxxxxxxx1
uunpk. */
- return 2885;
+ return 2888;
}
else
{
@@ -4769,7 +4769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx01111000xxxxxxxxx1
uunpk. */
- return 2886;
+ return 2889;
}
}
}
@@ -4787,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010x011111000xxxx0xxxxx
sqcvt. */
- return 2697;
+ return 2700;
}
else
{
@@ -4795,7 +4795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110x011111000xxxx0xxxxx
sqcvtu. */
- return 2700;
+ return 2703;
}
}
else
@@ -4808,7 +4808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx00xxxxx
sqcvt. */
- return 2698;
+ return 2701;
}
else
{
@@ -4816,7 +4816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx00xxxxx
sqcvtu. */
- return 2701;
+ return 2704;
}
}
else
@@ -4827,7 +4827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx10xxxxx
sqcvtn. */
- return 2699;
+ return 2702;
}
else
{
@@ -4835,7 +4835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx10xxxxx
sqcvtun. */
- return 2702;
+ return 2705;
}
}
}
@@ -4848,7 +4848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx0x
zip. */
- return 2905;
+ return 2908;
}
else
{
@@ -4856,7 +4856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx1x
uzp. */
- return 2892;
+ return 2895;
}
}
}
@@ -4868,7 +4868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx11111000xxxx1xxxxx
uqcvt. */
- return 2860;
+ return 2863;
}
else
{
@@ -4878,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx01xxxxx
uqcvt. */
- return 2861;
+ return 2864;
}
else
{
@@ -4886,7 +4886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx11xxxxx
uqcvtn. */
- return 2862;
+ return 2865;
}
}
}
@@ -4906,7 +4906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2657;
+ return 2660;
}
else
{
@@ -4914,7 +4914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx0
fmax. */
- return 2492;
+ return 2495;
}
}
else
@@ -4927,7 +4927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx0
smin. */
- return 2661;
+ return 2664;
}
else
{
@@ -4935,7 +4935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx0
srshl. */
- return 2715;
+ return 2718;
}
}
else
@@ -4944,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx0
fmaxnm. */
- return 2496;
+ return 2499;
}
}
}
@@ -4958,7 +4958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2820;
+ return 2823;
}
else
{
@@ -4966,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx1
fmin. */
- return 2500;
+ return 2503;
}
}
else
@@ -4979,7 +4979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx1
umin. */
- return 2824;
+ return 2827;
}
else
{
@@ -4987,7 +4987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx1
urshl. */
- return 2868;
+ return 2871;
}
}
else
@@ -4996,7 +4996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx1
fminnm. */
- return 2504;
+ return 2507;
}
}
}
@@ -5016,7 +5016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2656;
+ return 2659;
}
else
{
@@ -5024,7 +5024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2658;
+ return 2661;
}
}
else
@@ -5037,7 +5037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101001xx0xxxx0
fmax. */
- return 2491;
+ return 2494;
}
else
{
@@ -5045,7 +5045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111001xx0xxxx0
fmax. */
- return 2493;
+ return 2496;
}
}
else
@@ -5054,7 +5054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1x1011xx0xxxx0
add. */
- return 2445;
+ return 2448;
}
}
}
@@ -5070,7 +5070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx0
smin. */
- return 2660;
+ return 2663;
}
else
{
@@ -5078,7 +5078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx0
smin. */
- return 2662;
+ return 2665;
}
}
else
@@ -5089,7 +5089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx0
srshl. */
- return 2714;
+ return 2717;
}
else
{
@@ -5097,7 +5097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx0
srshl. */
- return 2716;
+ return 2719;
}
}
}
@@ -5109,7 +5109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx0
fmaxnm. */
- return 2495;
+ return 2498;
}
else
{
@@ -5117,7 +5117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx0
fmaxnm. */
- return 2497;
+ return 2500;
}
}
}
@@ -5134,7 +5134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx1
umax. */
- return 2819;
+ return 2822;
}
else
{
@@ -5142,7 +5142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx1
umax. */
- return 2821;
+ return 2824;
}
}
else
@@ -5153,7 +5153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx0xxxx1
fmin. */
- return 2499;
+ return 2502;
}
else
{
@@ -5161,7 +5161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx0xxxx1
fmin. */
- return 2501;
+ return 2504;
}
}
}
@@ -5177,7 +5177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx1
umin. */
- return 2823;
+ return 2826;
}
else
{
@@ -5185,7 +5185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx1
umin. */
- return 2825;
+ return 2828;
}
}
else
@@ -5196,7 +5196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx1
urshl. */
- return 2867;
+ return 2870;
}
else
{
@@ -5204,7 +5204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx1
urshl. */
- return 2869;
+ return 2872;
}
}
}
@@ -5216,7 +5216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx1
fminnm. */
- return 2503;
+ return 2506;
}
else
{
@@ -5224,7 +5224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx1
fminnm. */
- return 2505;
+ return 2508;
}
}
}
@@ -5241,7 +5241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001xxxxxxxxxx
sqdmulh. */
- return 2703;
+ return 2706;
}
else
{
@@ -5249,7 +5249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101xxxxxxxxxx
sqdmulh. */
- return 2705;
+ return 2708;
}
}
else
@@ -5260,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011xxxxxxxxxx
sqdmulh. */
- return 2704;
+ return 2707;
}
else
{
@@ -5268,7 +5268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111xxxxxxxxxx
sqdmulh. */
- return 2706;
+ return 2709;
}
}
}
@@ -5296,7 +5296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2723;
+ return 2726;
}
else
{
@@ -5304,7 +5304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2747;
+ return 2750;
}
}
else
@@ -5315,7 +5315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2739;
+ return 2742;
}
else
{
@@ -5323,7 +5323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2731;
+ return 2734;
}
}
}
@@ -5337,7 +5337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2755;
+ return 2758;
}
else
{
@@ -5345,7 +5345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2779;
+ return 2782;
}
}
else
@@ -5356,7 +5356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2771;
+ return 2774;
}
else
{
@@ -5364,7 +5364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2763;
+ return 2766;
}
}
}
@@ -5392,7 +5392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2724;
+ return 2727;
}
else
{
@@ -5400,7 +5400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2781;
+ return 2784;
}
}
else
@@ -5409,7 +5409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2748;
+ return 2751;
}
}
else
@@ -5420,7 +5420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2740;
+ return 2743;
}
else
{
@@ -5428,7 +5428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2732;
+ return 2735;
}
}
}
@@ -5442,7 +5442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2756;
+ return 2759;
}
else
{
@@ -5450,7 +5450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2780;
+ return 2783;
}
}
else
@@ -5461,7 +5461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2772;
+ return 2775;
}
else
{
@@ -5469,7 +5469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2764;
+ return 2767;
}
}
}
@@ -5511,7 +5511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2719;
+ return 2722;
}
else
{
@@ -5519,7 +5519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2720;
+ return 2723;
}
}
else
@@ -5530,7 +5530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2743;
+ return 2746;
}
else
{
@@ -5538,7 +5538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2744;
+ return 2747;
}
}
}
@@ -5552,7 +5552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2735;
+ return 2738;
}
else
{
@@ -5560,7 +5560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2736;
+ return 2739;
}
}
else
@@ -5571,7 +5571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2727;
+ return 2730;
}
else
{
@@ -5579,7 +5579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2728;
+ return 2731;
}
}
}
@@ -5596,7 +5596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2751;
+ return 2754;
}
else
{
@@ -5604,7 +5604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2752;
+ return 2755;
}
}
else
@@ -5615,7 +5615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2775;
+ return 2778;
}
else
{
@@ -5623,7 +5623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2776;
+ return 2779;
}
}
}
@@ -5637,7 +5637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2767;
+ return 2770;
}
else
{
@@ -5645,7 +5645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2768;
+ return 2771;
}
}
else
@@ -5656,7 +5656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2759;
+ return 2762;
}
else
{
@@ -5664,7 +5664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2760;
+ return 2763;
}
}
}
@@ -8066,7 +8066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2968;
+ return 2971;
}
else
{
@@ -8074,7 +8074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2976;
+ return 2979;
}
}
else
@@ -8085,7 +8085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2972;
+ return 2975;
}
else
{
@@ -8093,7 +8093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2979;
+ return 2982;
}
}
}
@@ -8131,7 +8131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 3028;
+ return 3031;
}
else
{
@@ -8139,7 +8139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3034;
+ return 3037;
}
}
else
@@ -8150,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3031;
+ return 3034;
}
else
{
@@ -8158,7 +8158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3037;
+ return 3040;
}
}
}
@@ -8172,7 +8172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3052;
+ return 3055;
}
else
{
@@ -8180,7 +8180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3058;
+ return 3061;
}
}
else
@@ -8191,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3055;
+ return 3058;
}
else
{
@@ -8199,7 +8199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3061;
+ return 3064;
}
}
}
@@ -8216,7 +8216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3040;
+ return 3043;
}
else
{
@@ -8224,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3046;
+ return 3049;
}
}
else
@@ -8235,7 +8235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3043;
+ return 3046;
}
else
{
@@ -8243,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3049;
+ return 3052;
}
}
}
@@ -8257,7 +8257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3064;
+ return 3067;
}
else
{
@@ -8265,7 +8265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3070;
+ return 3073;
}
}
else
@@ -8276,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3067;
+ return 3070;
}
else
{
@@ -8284,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3073;
+ return 3076;
}
}
}
@@ -8349,7 +8349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2969;
+ return 2972;
}
else
{
@@ -8357,7 +8357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2977;
+ return 2980;
}
}
else
@@ -8368,7 +8368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2973;
+ return 2976;
}
else
{
@@ -8376,7 +8376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2980;
+ return 2983;
}
}
}
@@ -8414,7 +8414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 3029;
+ return 3032;
}
else
{
@@ -8422,7 +8422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3035;
+ return 3038;
}
}
else
@@ -8433,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3032;
+ return 3035;
}
else
{
@@ -8441,7 +8441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3038;
+ return 3041;
}
}
}
@@ -8455,7 +8455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3053;
+ return 3056;
}
else
{
@@ -8463,7 +8463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3059;
+ return 3062;
}
}
else
@@ -8474,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3056;
+ return 3059;
}
else
{
@@ -8482,7 +8482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3062;
+ return 3065;
}
}
}
@@ -8499,7 +8499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3041;
+ return 3044;
}
else
{
@@ -8507,7 +8507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3047;
+ return 3050;
}
}
else
@@ -8518,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3044;
+ return 3047;
}
else
{
@@ -8526,7 +8526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3050;
+ return 3053;
}
}
}
@@ -8540,7 +8540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3065;
+ return 3068;
}
else
{
@@ -8548,7 +8548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3071;
+ return 3074;
}
}
else
@@ -8559,7 +8559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3068;
+ return 3071;
}
else
{
@@ -8567,7 +8567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3074;
+ return 3077;
}
}
}
@@ -8635,7 +8635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2971;
+ return 2974;
}
else
{
@@ -8643,7 +8643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2978;
+ return 2981;
}
}
else
@@ -8652,7 +8652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2975;
+ return 2978;
}
}
else
@@ -8663,7 +8663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2970;
+ return 2973;
}
else
{
@@ -8671,7 +8671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2974;
+ return 2977;
}
}
}
@@ -8733,7 +8733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 3030;
+ return 3033;
}
else
{
@@ -8741,7 +8741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3124;
+ return 3127;
}
}
else
@@ -8752,7 +8752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3036;
+ return 3039;
}
else
{
@@ -8760,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3126;
+ return 3129;
}
}
}
@@ -8774,7 +8774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3033;
+ return 3036;
}
else
{
@@ -8782,7 +8782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3125;
+ return 3128;
}
}
else
@@ -8791,7 +8791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3039;
+ return 3042;
}
}
}
@@ -8807,7 +8807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3054;
+ return 3057;
}
else
{
@@ -8815,7 +8815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3130;
+ return 3133;
}
}
else
@@ -8826,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3060;
+ return 3063;
}
else
{
@@ -8834,7 +8834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3132;
+ return 3135;
}
}
}
@@ -8848,7 +8848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3057;
+ return 3060;
}
else
{
@@ -8856,7 +8856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3131;
+ return 3134;
}
}
else
@@ -8865,7 +8865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3063;
+ return 3066;
}
}
}
@@ -8884,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3042;
+ return 3045;
}
else
{
@@ -8892,7 +8892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3127;
+ return 3130;
}
}
else
@@ -8903,7 +8903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3048;
+ return 3051;
}
else
{
@@ -8911,7 +8911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3129;
+ return 3132;
}
}
}
@@ -8925,7 +8925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3045;
+ return 3048;
}
else
{
@@ -8933,7 +8933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3128;
+ return 3131;
}
}
else
@@ -8942,7 +8942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3051;
+ return 3054;
}
}
}
@@ -8958,7 +8958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3066;
+ return 3069;
}
else
{
@@ -8966,7 +8966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3133;
+ return 3136;
}
}
else
@@ -8977,7 +8977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3072;
+ return 3075;
}
else
{
@@ -8985,7 +8985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3135;
+ return 3138;
}
}
}
@@ -8999,7 +8999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3069;
+ return 3072;
}
else
{
@@ -9007,7 +9007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3134;
+ return 3137;
}
}
else
@@ -9016,7 +9016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3075;
+ return 3078;
}
}
}
@@ -9389,7 +9389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3153;
+ return 3156;
}
else
{
@@ -9407,7 +9407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3156;
+ return 3159;
}
}
}
@@ -9487,7 +9487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2966;
+ return 2969;
}
else
{
@@ -9495,7 +9495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2967;
+ return 2970;
}
}
else
@@ -9602,7 +9602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3158;
+ return 3161;
}
}
}
@@ -9618,7 +9618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3155;
+ return 3158;
}
else
{
@@ -9663,7 +9663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2965;
+ return 2968;
}
else
{
@@ -9757,7 +9757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3157;
+ return 3160;
}
}
}
@@ -9887,7 +9887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3159;
+ return 3162;
}
}
}
@@ -9903,7 +9903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3154;
+ return 3157;
}
else
{
@@ -10745,7 +10745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2985;
+ return 2988;
}
}
}
@@ -10819,7 +10819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2986;
+ return 2989;
}
}
}
@@ -12272,7 +12272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x0xxxxx110x11xxxxxxxxxx
udot. */
- return 2429;
+ return 2431;
}
else
{
@@ -12280,7 +12280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx110x11xxxxxxxxxx
udot. */
- return 2428;
+ return 2430;
}
}
}
@@ -13537,7 +13537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2984;
+ return 2987;
}
}
}
@@ -15241,7 +15241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 3013;
+ return 3016;
}
}
else
@@ -15484,7 +15484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2989;
+ return 2992;
}
else
{
@@ -15492,7 +15492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2990;
+ return 2993;
}
}
else
@@ -15735,7 +15735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 3010;
+ return 3013;
}
else
{
@@ -15756,7 +15756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 3017;
+ return 3020;
}
else
{
@@ -15764,7 +15764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 3016;
+ return 3019;
}
}
else
@@ -15830,7 +15830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 3009;
+ return 3012;
}
else
{
@@ -15842,7 +15842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 3015;
+ return 3018;
}
else
{
@@ -15850,7 +15850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 3014;
+ return 3017;
}
}
else
@@ -15901,7 +15901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2993;
+ return 2996;
}
else
{
@@ -15909,7 +15909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2994;
+ return 2997;
}
}
else
@@ -16312,7 +16312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2987;
+ return 2990;
}
else
{
@@ -16345,7 +16345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 3011;
+ return 3014;
}
else
{
@@ -16375,7 +16375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2988;
+ return 2991;
}
else
{
@@ -16504,7 +16504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2997;
+ return 3000;
}
else
{
@@ -16514,7 +16514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2999;
+ return 3002;
}
else
{
@@ -16522,7 +16522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 3001;
+ return 3004;
}
}
}
@@ -16534,7 +16534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2998;
+ return 3001;
}
else
{
@@ -16544,7 +16544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 3000;
+ return 3003;
}
else
{
@@ -16552,7 +16552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 3002;
+ return 3005;
}
}
}
@@ -17611,7 +17611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2981;
+ return 2984;
}
else
{
@@ -17619,7 +17619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2983;
+ return 2986;
}
}
else
@@ -17628,7 +17628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2982;
+ return 2985;
}
}
}
@@ -17838,30 +17838,63 @@ aarch64_opcode_lookup_1 (uint32_t word)
if (((word >> 11) & 0x1) == 0)
{
if (((word >> 12) & 0x1) == 0)
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxx0010000xxxxxxxxxx
+ sqxtnb. */
+ return 2240;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxx1010000xxxxxxxxxx
+ sqcvtn. */
+ return 2428;
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxx0010100xxxxxxxxxx
+ sqxtunb. */
+ return 2242;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxx1010100xxxxxxxxxx
+ sqcvtun. */
+ return 2429;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 16) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 010001x10x1xxxxx010000xxxxxxxxxx
- sqxtnb. */
- return 2240;
+ 010001x10x1xxxx0010x10xxxxxxxxxx
+ uqxtnb. */
+ return 2317;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 010001x10x1xxxxx010100xxxxxxxxxx
- sqxtunb. */
- return 2242;
+ 010001x10x1xxxx1010x10xxxxxxxxxx
+ uqcvtn. */
+ return 2432;
}
}
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x10x1xxxxx010x10xxxxxxxxxx
- uqxtnb. */
- return 2317;
- }
}
else
{
@@ -19124,7 +19157,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2991;
+ return 2994;
}
else
{
@@ -19132,7 +19165,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2992;
+ return 2995;
}
}
}
@@ -19506,7 +19539,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2995;
+ return 2998;
}
else
{
@@ -19514,7 +19547,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2996;
+ return 2999;
}
}
}
@@ -19875,7 +19908,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2893;
+ return 2896;
}
else
{
@@ -19883,7 +19916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2894;
+ return 2897;
}
}
else
@@ -19896,7 +19929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx0
whilege. */
- return 2430;
+ return 2433;
}
else
{
@@ -19904,7 +19937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx1
whilegt. */
- return 2431;
+ return 2434;
}
}
else
@@ -19913,7 +19946,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2634;
+ return 2637;
}
}
}
@@ -19927,7 +19960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2896;
+ return 2899;
}
else
{
@@ -19935,7 +19968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2895;
+ return 2898;
}
}
else
@@ -19948,7 +19981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx0
whilehs. */
- return 2433;
+ return 2436;
}
else
{
@@ -19956,7 +19989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx1
whilehi. */
- return 2432;
+ return 2435;
}
}
else
@@ -19965,7 +19998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2636;
+ return 2639;
}
}
}
@@ -19982,7 +20015,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2900;
+ return 2903;
}
else
{
@@ -19990,7 +20023,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2897;
+ return 2900;
}
}
else
@@ -20003,7 +20036,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx0
whilelt. */
- return 2437;
+ return 2440;
}
else
{
@@ -20011,7 +20044,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx1
whilele. */
- return 2434;
+ return 2437;
}
}
else
@@ -20020,7 +20053,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2635;
+ return 2638;
}
}
}
@@ -20034,7 +20067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2898;
+ return 2901;
}
else
{
@@ -20042,7 +20075,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2899;
+ return 2902;
}
}
else
@@ -20053,7 +20086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx0
whilelo. */
- return 2435;
+ return 2438;
}
else
{
@@ -20061,7 +20094,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx1
whilels. */
- return 2436;
+ return 2439;
}
}
}
@@ -21168,7 +21201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 3012;
+ return 3015;
}
}
else
@@ -21827,7 +21860,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2473;
+ return 2476;
}
}
else
@@ -22529,7 +22562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3148;
+ return 3151;
}
else
{
@@ -23109,7 +23142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3076;
+ return 3079;
}
else
{
@@ -23117,7 +23150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3078;
+ return 3081;
}
}
else
@@ -23128,7 +23161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3082;
+ return 3085;
}
else
{
@@ -23136,7 +23169,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3084;
+ return 3087;
}
}
}
@@ -23150,7 +23183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3079;
+ return 3082;
}
else
{
@@ -23158,7 +23191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3081;
+ return 3084;
}
}
else
@@ -23169,7 +23202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3085;
+ return 3088;
}
else
{
@@ -23177,7 +23210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3087;
+ return 3090;
}
}
}
@@ -23194,7 +23227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3100;
+ return 3103;
}
else
{
@@ -23202,7 +23235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3102;
+ return 3105;
}
}
else
@@ -23213,7 +23246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3106;
+ return 3109;
}
else
{
@@ -23221,7 +23254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3108;
+ return 3111;
}
}
}
@@ -23235,7 +23268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3103;
+ return 3106;
}
else
{
@@ -23243,7 +23276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3105;
+ return 3108;
}
}
else
@@ -23254,7 +23287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3109;
+ return 3112;
}
else
{
@@ -23262,7 +23295,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3111;
+ return 3114;
}
}
}
@@ -23282,7 +23315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3088;
+ return 3091;
}
else
{
@@ -23290,7 +23323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3090;
+ return 3093;
}
}
else
@@ -23301,7 +23334,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3094;
+ return 3097;
}
else
{
@@ -23309,7 +23342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3096;
+ return 3099;
}
}
}
@@ -23323,7 +23356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3091;
+ return 3094;
}
else
{
@@ -23331,7 +23364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3093;
+ return 3096;
}
}
else
@@ -23342,7 +23375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3097;
+ return 3100;
}
else
{
@@ -23350,7 +23383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3099;
+ return 3102;
}
}
}
@@ -23367,7 +23400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3112;
+ return 3115;
}
else
{
@@ -23375,7 +23408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3114;
+ return 3117;
}
}
else
@@ -23386,7 +23419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3118;
+ return 3121;
}
else
{
@@ -23394,7 +23427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3120;
+ return 3123;
}
}
}
@@ -23408,7 +23441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3115;
+ return 3118;
}
else
{
@@ -23416,7 +23449,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3117;
+ return 3120;
}
}
else
@@ -23427,7 +23460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3121;
+ return 3124;
}
else
{
@@ -23435,7 +23468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3123;
+ return 3126;
}
}
}
@@ -23469,7 +23502,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3077;
+ return 3080;
}
else
{
@@ -23477,7 +23510,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3136;
+ return 3139;
}
}
else
@@ -23488,7 +23521,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3083;
+ return 3086;
}
else
{
@@ -23496,7 +23529,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3138;
+ return 3141;
}
}
}
@@ -23510,7 +23543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3080;
+ return 3083;
}
else
{
@@ -23518,7 +23551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3137;
+ return 3140;
}
}
else
@@ -23527,7 +23560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3086;
+ return 3089;
}
}
}
@@ -23543,7 +23576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3101;
+ return 3104;
}
else
{
@@ -23551,7 +23584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3142;
+ return 3145;
}
}
else
@@ -23562,7 +23595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3107;
+ return 3110;
}
else
{
@@ -23570,7 +23603,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3144;
+ return 3147;
}
}
}
@@ -23584,7 +23617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3104;
+ return 3107;
}
else
{
@@ -23592,7 +23625,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3143;
+ return 3146;
}
}
else
@@ -23601,7 +23634,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3110;
+ return 3113;
}
}
}
@@ -23620,7 +23653,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3089;
+ return 3092;
}
else
{
@@ -23628,7 +23661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3139;
+ return 3142;
}
}
else
@@ -23639,7 +23672,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3095;
+ return 3098;
}
else
{
@@ -23647,7 +23680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3141;
+ return 3144;
}
}
}
@@ -23661,7 +23694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3092;
+ return 3095;
}
else
{
@@ -23669,7 +23702,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3140;
+ return 3143;
}
}
else
@@ -23678,7 +23711,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3098;
+ return 3101;
}
}
}
@@ -23694,7 +23727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3113;
+ return 3116;
}
else
{
@@ -23702,7 +23735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3145;
+ return 3148;
}
}
else
@@ -23713,7 +23746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3119;
+ return 3122;
}
else
{
@@ -23721,7 +23754,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3147;
+ return 3150;
}
}
}
@@ -23735,7 +23768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3116;
+ return 3119;
}
else
{
@@ -23743,7 +23776,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3146;
+ return 3149;
}
}
else
@@ -23752,7 +23785,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3122;
+ return 3125;
}
}
}
@@ -23919,7 +23952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 3003;
+ return 3006;
}
}
}
@@ -23952,7 +23985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2929;
+ return 2932;
}
}
else
@@ -24026,7 +24059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 3005;
+ return 3008;
}
}
}
@@ -24059,7 +24092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 3006;
+ return 3009;
}
}
else
@@ -24106,7 +24139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2936;
+ return 2939;
}
else
{
@@ -24114,7 +24147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2938;
+ return 2941;
}
}
else
@@ -24125,7 +24158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2940;
+ return 2943;
}
else
{
@@ -24139,7 +24172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2941;
+ return 2944;
}
else
{
@@ -24147,7 +24180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2934;
+ return 2937;
}
}
else
@@ -24156,7 +24189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2943;
+ return 2946;
}
}
else
@@ -24169,7 +24202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2942;
+ return 2945;
}
else
{
@@ -24177,7 +24210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2947;
+ return 2950;
}
}
else
@@ -24186,7 +24219,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2944;
+ return 2947;
}
}
}
@@ -24367,7 +24400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2928;
+ return 2931;
}
}
else
@@ -24398,7 +24431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 3004;
+ return 3007;
}
else
{
@@ -24417,7 +24450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 3020;
+ return 3023;
}
else
{
@@ -24427,7 +24460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 3018;
+ return 3021;
}
else
{
@@ -24437,7 +24470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 3025;
+ return 3028;
}
else
{
@@ -24445,7 +24478,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 3024;
+ return 3027;
}
}
}
@@ -25029,7 +25062,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 3021;
+ return 3024;
}
else
{
@@ -25037,7 +25070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 3022;
+ return 3025;
}
}
}
@@ -25355,7 +25388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2939;
+ return 2942;
}
}
else
@@ -25966,7 +25999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2932;
+ return 2935;
}
}
}
@@ -26018,7 +26051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2945;
+ return 2948;
}
}
}
@@ -26261,7 +26294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2935;
+ return 2938;
}
}
else
@@ -26337,7 +26370,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2948;
+ return 2951;
}
}
else
@@ -27163,7 +27196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2933;
+ return 2936;
}
}
else
@@ -27195,7 +27228,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2946;
+ return 2949;
}
}
else
@@ -27435,7 +27468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2937;
+ return 2940;
}
}
else
@@ -27467,7 +27500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2951;
+ return 2954;
}
else
{
@@ -27475,7 +27508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2955;
+ return 2958;
}
}
}
@@ -27497,7 +27530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2952;
+ return 2955;
}
else
{
@@ -27505,7 +27538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2956;
+ return 2959;
}
}
}
@@ -27544,7 +27577,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2949;
+ return 2952;
}
else
{
@@ -27552,7 +27585,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2953;
+ return 2956;
}
}
else
@@ -27574,7 +27607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2950;
+ return 2953;
}
else
{
@@ -27582,7 +27615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2954;
+ return 2957;
}
}
else
@@ -29390,7 +29423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2957;
+ return 2960;
}
else
{
@@ -29398,7 +29431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2961;
+ return 2964;
}
}
else
@@ -29420,7 +29453,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2958;
+ return 2961;
}
else
{
@@ -29428,7 +29461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2962;
+ return 2965;
}
}
else
@@ -29934,7 +29967,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2959;
+ return 2962;
}
else
{
@@ -29942,7 +29975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2963;
+ return 2966;
}
}
}
@@ -29964,7 +29997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2960;
+ return 2963;
}
else
{
@@ -29972,7 +30005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2964;
+ return 2967;
}
}
}
@@ -30028,7 +30061,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2931;
+ return 2934;
}
else
{
@@ -30036,7 +30069,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2930;
+ return 2933;
}
}
}
@@ -30139,7 +30172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 3008;
+ return 3011;
}
else
{
@@ -30147,7 +30180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 3007;
+ return 3010;
}
}
else
@@ -30158,7 +30191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 3019;
+ return 3022;
}
else
{
@@ -30168,7 +30201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 3027;
+ return 3030;
}
else
{
@@ -30176,7 +30209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 3026;
+ return 3029;
}
}
}
@@ -30667,22 +30700,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2622: value = 2630; break; /* mov --> mova. */
- case 2630: return NULL; /* mova --> NULL. */
- case 2618: value = 2626; break; /* mov --> mova. */
- case 2626: return NULL; /* mova --> NULL. */
- case 2620: value = 2628; break; /* mov --> mova. */
- case 2628: return NULL; /* mova --> NULL. */
- case 2616: value = 2624; break; /* mov --> mova. */
- case 2624: return NULL; /* mova --> NULL. */
+ case 2625: value = 2633; break; /* mov --> mova. */
+ case 2633: return NULL; /* mova --> NULL. */
+ case 2621: value = 2629; break; /* mov --> mova. */
+ case 2629: return NULL; /* mova --> NULL. */
case 2623: value = 2631; break; /* mov --> mova. */
case 2631: return NULL; /* mova --> NULL. */
case 2619: value = 2627; break; /* mov --> mova. */
case 2627: return NULL; /* mova --> NULL. */
- case 2621: value = 2629; break; /* mov --> mova. */
- case 2629: return NULL; /* mova --> NULL. */
- case 2617: value = 2625; break; /* mov --> mova. */
- case 2625: return NULL; /* mova --> NULL. */
+ case 2626: value = 2634; break; /* mov --> mova. */
+ case 2634: return NULL; /* mova --> NULL. */
+ case 2622: value = 2630; break; /* mov --> mova. */
+ case 2630: return NULL; /* mova --> NULL. */
+ case 2624: value = 2632; break; /* mov --> mova. */
+ case 2632: return NULL; /* mova --> NULL. */
+ case 2620: value = 2628; break; /* mov --> mova. */
+ case 2628: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -30704,11 +30737,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3149; break; /* addg --> smax. */
- case 3149: value = 3150; break; /* smax --> umax. */
- case 3150: value = 3151; break; /* umax --> smin. */
- case 3151: value = 3152; break; /* smin --> umin. */
- case 3152: return NULL; /* umin --> NULL. */
+ case 19: value = 3152; break; /* addg --> smax. */
+ case 3152: value = 3153; break; /* smax --> umax. */
+ case 3153: value = 3154; break; /* umax --> smin. */
+ case 3154: value = 3155; break; /* smin --> umin. */
+ case 3155: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30866,8 +30899,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 3023; break; /* fcvt --> bfcvt. */
- case 3023: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3026; break; /* fcvt --> bfcvt. */
+ case 3026: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 65ece2086f5..aef29d610ca 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5368,8 +5368,11 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSNC ("fdot", 0x64208000, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("sdot", 0x4480c800, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_19_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("sdot", 0x4400c800, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSN ("sqcvtn", 0x45314000, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
+ SME2_INSN ("sqcvtun", 0x45315000, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
SME2_INSNC ("udot", 0x4480cc00, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_19_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("udot", 0x4400cc00, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSN ("uqcvtn", 0x45314800, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
SME2_INSN ("whilege", 0x25205010, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25205011, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25205811, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 29/31] aarch64: Add new SVE shift instructions
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (27 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 28/31] aarch64: Add new SVE saturating conversion instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 30/31] aarch64: Add the SVE FCLAMP instruction Richard Sandiford
` (3 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds the new SVE SQRSHRN, SQRSHRUN and UQRSHRN
instructions.
---
.../gas/aarch64/sve2-sme2-6-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-6-invalid.l | 20 +
.../gas/aarch64/sve2-sme2-6-invalid.s | 14 +
.../gas/aarch64/sve2-sme2-6-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-6-noarch.l | 16 +
gas/testsuite/gas/aarch64/sve2-sme2-6.d | 24 +
gas/testsuite/gas/aarch64/sve2-sme2-6.s | 17 +
opcodes/aarch64-dis-2.c | 1779 +++++++++--------
opcodes/aarch64-tbl.h | 3 +
9 files changed, 1006 insertions(+), 873 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6.s
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d
new file mode 100644
index 00000000000..a40a5441616
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sve2-sme2-6-invalid.s
+#error_output: sve2-sme2-6-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l
new file mode 100644
index 00000000000..0f7021050a6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l
@@ -0,0 +1,20 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshrn z0\.h,0,#1'
+[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.h,{z1\.s-z2\.s},#1'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{z0\.s-z2\.s},#1'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{z0\.s-z3\.s},#1'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},#0'
+[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},#17'
+[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},x0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.h-z1\.h},#1'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z1\.s}, #1
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z1\.d}, #1
+[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.s,{z0\.d-z1\.d},#1'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z1\.d}, #1
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z1\.s}, #1
+[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqrshrn z0\.h,{z2\.s-z3\.s},#1'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s
new file mode 100644
index 00000000000..9c6f5ae6dda
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s
@@ -0,0 +1,14 @@
+ sqrshrn 0, { z0.s - z1.s }, #1
+ sqrshrn z0.h, 0, #1
+
+ sqrshrn z0.h, { z1.s - z2.s }, #1
+ sqrshrn z0.h, { z0.s - z2.s }, #1
+ sqrshrn z0.h, { z0.s - z3.s }, #1
+ sqrshrn z0.h, { z0.s - z1.s }, #0
+ sqrshrn z0.h, { z0.s - z1.s }, #17
+ sqrshrn z0.h, { z0.s - z1.s }, x0
+
+ sqrshrn z0.b, { z0.h - z1.h }, #1
+ sqrshrn z0.s, { z0.d - z1.d }, #1
+
+ movprfx z0, z4; sqrshrn z0.h, { z2.s - z3.s }, #1
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d
new file mode 100644
index 00000000000..1e1c03be090
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sve2-sme2-6.s
+#error_output: sve2-sme2-6-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l
new file mode 100644
index 00000000000..07f95d9d44d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l
@@ -0,0 +1,16 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z30\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.s-z1\.s},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z1\.h,{z26\.s-z27\.s},#14'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z30\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z0\.s-z1\.s},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z15\.h,{z6\.s-z7\.s},#9'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{z0\.s-z1\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z30\.s-z31\.s},#1'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.s-z1\.s},#16'
+[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z18\.h,{z2\.s-z3\.s},#6'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6.d b/gas/testsuite/gas/aarch64/sve2-sme2-6.d
new file mode 100644
index 00000000000..0d6f7c1eb3c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6.d
@@ -0,0 +1,24 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 45bf2800 sqrshrn z0\.h, {z0\.s-z1\.s}, #1
+[^:]+: 45bf281f sqrshrn z31\.h, {z0\.s-z1\.s}, #1
+[^:]+: 45bf2bc0 sqrshrn z0\.h, {z30\.s-z31\.s}, #1
+[^:]+: 45b02800 sqrshrn z0\.h, {z0\.s-z1\.s}, #16
+[^:]+: 45b22b41 sqrshrn z1\.h, {z26\.s-z27\.s}, #14
+[^:]+: 45bf0800 sqrshrun z0\.h, {z0\.s-z1\.s}, #1
+[^:]+: 45bf081f sqrshrun z31\.h, {z0\.s-z1\.s}, #1
+[^:]+: 45bf0bc0 sqrshrun z0\.h, {z30\.s-z31\.s}, #1
+[^:]+: 45b00800 sqrshrun z0\.h, {z0\.s-z1\.s}, #16
+[^:]+: 45b708cf sqrshrun z15\.h, {z6\.s-z7\.s}, #9
+[^:]+: 45bf3800 uqrshrn z0\.h, {z0\.s-z1\.s}, #1
+[^:]+: 45bf381f uqrshrn z31\.h, {z0\.s-z1\.s}, #1
+[^:]+: 45bf3bc0 uqrshrn z0\.h, {z30\.s-z31\.s}, #1
+[^:]+: 45b03800 uqrshrn z0\.h, {z0\.s-z1\.s}, #16
+[^:]+: 45ba3852 uqrshrn z18\.h, {z2\.s-z3\.s}, #6
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6.s b/gas/testsuite/gas/aarch64/sve2-sme2-6.s
new file mode 100644
index 00000000000..4e894dfeb66
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-6.s
@@ -0,0 +1,17 @@
+ sqrshrn z0.h, { z0.s - z1.s }, #1
+ sqrshrn z31.h, { z0.s - z1.s }, #1
+ sqrshrn z0.h, { z30.s - z31.s }, #1
+ sqrshrn z0.h, { z0.s - z1.s }, #16
+ sqrshrn z1.h, { z26.s - z27.s }, #14
+
+ sqrshrun z0.h, { z0.s - z1.s }, #1
+ sqrshrun z31.h, { z0.s - z1.s }, #1
+ sqrshrun z0.h, { z30.s - z31.s }, #1
+ sqrshrun z0.h, { z0.s - z1.s }, #16
+ sqrshrun z15.h, { z6.s - z7.s }, #9
+
+ uqrshrn z0.h, { z0.s - z1.s }, #1
+ uqrshrn z31.h, { z0.s - z1.s }, #1
+ uqrshrn z0.h, { z30.s - z31.s }, #1
+ uqrshrn z0.h, { z0.s - z1.s }, #16
+ uqrshrn z18.h, { z2.s - z3.s }, #6
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index dfea29de74c..1559066d090 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2474;
+ return 2477;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2475;
+ return 2478;
}
}
}
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2904;
+ return 2907;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2618;
+ return 2621;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2617;
+ return 2620;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2616;
+ return 2619;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2625;
+ return 2628;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2621;
+ return 2624;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2615;
+ return 2618;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2614;
+ return 2617;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2636;
+ return 2639;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2635;
+ return 2638;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2613;
+ return 2616;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2623;
+ return 2626;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2619;
+ return 2622;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2626;
+ return 2629;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2622;
+ return 2625;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2624;
+ return 2627;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2620;
+ return 2623;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2552;
+ return 2555;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2553;
+ return 2556;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2576;
+ return 2579;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2577;
+ return 2580;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2568;
+ return 2571;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2569;
+ return 2572;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2560;
+ return 2563;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2561;
+ return 2564;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2584;
+ return 2587;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2585;
+ return 2588;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2608;
+ return 2611;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2609;
+ return 2612;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2600;
+ return 2603;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2601;
+ return 2604;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2592;
+ return 2595;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2593;
+ return 2596;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2698;
+ return 2701;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2699;
+ return 2702;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2548;
+ return 2551;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2549;
+ return 2552;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2572;
+ return 2575;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2573;
+ return 2576;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2564;
+ return 2567;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2565;
+ return 2568;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2556;
+ return 2559;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2557;
+ return 2560;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2580;
+ return 2583;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2581;
+ return 2584;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2604;
+ return 2607;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2605;
+ return 2608;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2596;
+ return 2599;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2597;
+ return 2600;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2588;
+ return 2591;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2589;
+ return 2592;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2724;
+ return 2727;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2725;
+ return 2728;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2748;
+ return 2751;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2749;
+ return 2752;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2740;
+ return 2743;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2741;
+ return 2744;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2732;
+ return 2735;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2733;
+ return 2736;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2756;
+ return 2759;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2757;
+ return 2760;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2780;
+ return 2783;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2781;
+ return 2784;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2772;
+ return 2775;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2773;
+ return 2776;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2764;
+ return 2767;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2765;
+ return 2768;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2720;
+ return 2723;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2721;
+ return 2724;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2744;
+ return 2747;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2745;
+ return 2748;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2736;
+ return 2739;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2737;
+ return 2740;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2728;
+ return 2731;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2729;
+ return 2732;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2752;
+ return 2755;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2753;
+ return 2756;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2776;
+ return 2779;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2777;
+ return 2780;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2768;
+ return 2771;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2769;
+ return 2772;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2760;
+ return 2763;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2761;
+ return 2764;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2674;
+ return 2677;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2879;
+ return 2882;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2675;
+ return 2678;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2676;
+ return 2679;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2880;
+ return 2883;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2881;
+ return 2884;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2837;
+ return 2840;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2795;
+ return 2798;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2838;
+ return 2841;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2839;
+ return 2842;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2796;
+ return 2799;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2797;
+ return 2800;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2690;
+ return 2693;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2691;
+ return 2694;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2692;
+ return 2695;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2853;
+ return 2856;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2854;
+ return 2857;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2855;
+ return 2858;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2554;
+ return 2557;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2578;
+ return 2581;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2570;
+ return 2573;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2562;
+ return 2565;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2586;
+ return 2589;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2610;
+ return 2613;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2602;
+ return 2605;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2594;
+ return 2597;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2555;
+ return 2558;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2612;
+ return 2615;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2579;
+ return 2582;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2571;
+ return 2574;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2563;
+ return 2566;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2587;
+ return 2590;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2611;
+ return 2614;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2603;
+ return 2606;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2595;
+ return 2598;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2911;
+ return 2914;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2912;
+ return 2915;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2913;
+ return 2916;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2515;
+ return 2518;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2516;
+ return 2519;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2517;
+ return 2520;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2920;
+ return 2923;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2921;
+ return 2924;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2922;
+ return 2925;
}
}
}
@@ -1836,7 +1836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2457;
+ return 2460;
}
else
{
@@ -1846,7 +1846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2458;
+ return 2461;
}
else
{
@@ -1854,7 +1854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2459;
+ return 2462;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2914;
+ return 2917;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2915;
+ return 2918;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2916;
+ return 2919;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2529;
+ return 2532;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2530;
+ return 2533;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2531;
+ return 2534;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2861;
+ return 2864;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2923;
+ return 2926;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2924;
+ return 2927;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2925;
+ return 2928;
}
}
}
@@ -1988,7 +1988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2465;
+ return 2468;
}
else
{
@@ -1998,7 +1998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2466;
+ return 2469;
}
else
{
@@ -2006,7 +2006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2467;
+ return 2470;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2862;
+ return 2865;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2550;
+ return 2553;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2574;
+ return 2577;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2566;
+ return 2569;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2558;
+ return 2561;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2509;
+ return 2512;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2644;
+ return 2647;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2803;
+ return 2806;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2650;
+ return 2653;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2523;
+ return 2526;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2809;
+ return 2812;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2890;
+ return 2893;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2815;
+ return 2818;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2551;
+ return 2554;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2575;
+ return 2578;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2567;
+ return 2570;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2559;
+ return 2562;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2510;
+ return 2513;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2645;
+ return 2648;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2804;
+ return 2807;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2651;
+ return 2654;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2524;
+ return 2527;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2810;
+ return 2813;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2891;
+ return 2894;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2816;
+ return 2819;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2582;
+ return 2585;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2606;
+ return 2609;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2598;
+ return 2601;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2590;
+ return 2593;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2547;
+ return 2550;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2487;
+ return 2490;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2873;
+ return 2876;
}
}
else
@@ -2375,7 +2375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx011xxx
bfvdot. */
- return 2473;
+ return 2476;
}
else
{
@@ -2383,7 +2383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx011xxx
bfdot. */
- return 2451;
+ return 2454;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2791;
+ return 2794;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2583;
+ return 2586;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2607;
+ return 2610;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2599;
+ return 2602;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2591;
+ return 2594;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2488;
+ return 2491;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2887;
+ return 2890;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2874;
+ return 2877;
}
}
}
@@ -2480,7 +2480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx011xxx
bfdot. */
- return 2452;
+ return 2455;
}
else
{
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2802;
+ return 2805;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2792;
+ return 2795;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2927;
+ return 2930;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2928;
+ return 2931;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2666;
+ return 2669;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2667;
+ return 2670;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2668;
+ return 2671;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2909;
+ return 2912;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2910;
+ return 2913;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2917;
+ return 2920;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2682;
+ return 2685;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2683;
+ return 2686;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2684;
+ return 2687;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2929;
+ return 2932;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2930;
+ return 2933;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2829;
+ return 2832;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2830;
+ return 2833;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2831;
+ return 2834;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2918;
+ return 2921;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2919;
+ return 2922;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2926;
+ return 2929;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2845;
+ return 2848;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2846;
+ return 2849;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2847;
+ return 2850;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2678;
+ return 2681;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2679;
+ return 2682;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2680;
+ return 2683;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2681;
+ return 2684;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2883;
+ return 2886;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2884;
+ return 2887;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2885;
+ return 2888;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2886;
+ return 2889;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2489;
+ return 2492;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2490;
+ return 2493;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2491;
+ return 2494;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2492;
+ return 2495;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2519;
+ return 2522;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2520;
+ return 2523;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2521;
+ return 2524;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2522;
+ return 2525;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2670;
+ return 2673;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2671;
+ return 2674;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2672;
+ return 2675;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2673;
+ return 2676;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2511;
+ return 2514;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2512;
+ return 2515;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2513;
+ return 2516;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2514;
+ return 2517;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2677;
+ return 2680;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2882;
+ return 2885;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2652;
+ return 2655;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2653;
+ return 2656;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2654;
+ return 2657;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2655;
+ return 2658;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2518;
+ return 2521;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2669;
+ return 2672;
}
}
else
@@ -3166,7 +3166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2477;
+ return 2480;
}
else
{
@@ -3174,7 +3174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2478;
+ return 2481;
}
}
}
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2841;
+ return 2844;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2842;
+ return 2845;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2843;
+ return 2846;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2844;
+ return 2847;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2798;
+ return 2801;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2799;
+ return 2802;
}
}
}
@@ -3259,7 +3259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx10xxx
bfdot. */
- return 2453;
+ return 2456;
}
else
{
@@ -3267,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx10xxx
bfdot. */
- return 2454;
+ return 2457;
}
}
else
@@ -3278,7 +3278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx10xxx
bfdot. */
- return 2455;
+ return 2458;
}
else
{
@@ -3286,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx10xxx
bfdot. */
- return 2456;
+ return 2459;
}
}
}
@@ -3305,7 +3305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2461;
+ return 2464;
}
else
{
@@ -3313,7 +3313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2462;
+ return 2465;
}
}
else
@@ -3324,7 +3324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2463;
+ return 2466;
}
else
{
@@ -3332,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2464;
+ return 2467;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2833;
+ return 2836;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2834;
+ return 2837;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2835;
+ return 2838;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2836;
+ return 2839;
}
}
}
@@ -3388,7 +3388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx10xxx
add. */
- return 2443;
+ return 2446;
}
else
{
@@ -3396,7 +3396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx10xxx
add. */
- return 2444;
+ return 2447;
}
}
else
@@ -3407,7 +3407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx10xxx
add. */
- return 2445;
+ return 2448;
}
else
{
@@ -3415,7 +3415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx10xxx
add. */
- return 2446;
+ return 2449;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2840;
+ return 2843;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2817;
+ return 2820;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2818;
+ return 2821;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2819;
+ return 2822;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2820;
+ return 2823;
}
}
}
@@ -3485,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2460;
+ return 2463;
}
else
{
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2832;
+ return 2835;
}
}
else
@@ -3504,7 +3504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx10xxx
add. */
- return 2441;
+ return 2444;
}
else
{
@@ -3512,7 +3512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx10xxx
add. */
- return 2442;
+ return 2445;
}
}
}
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2694;
+ return 2697;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2695;
+ return 2698;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2696;
+ return 2699;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2697;
+ return 2700;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2533;
+ return 2536;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2534;
+ return 2537;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2535;
+ return 2538;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2536;
+ return 2539;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2686;
+ return 2689;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2687;
+ return 2690;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2688;
+ return 2691;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2689;
+ return 2692;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2525;
+ return 2528;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2526;
+ return 2529;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2527;
+ return 2530;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2528;
+ return 2531;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2693;
+ return 2696;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2875;
+ return 2878;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2876;
+ return 2879;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2877;
+ return 2880;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2878;
+ return 2881;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2646;
+ return 2649;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2647;
+ return 2650;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2648;
+ return 2651;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2649;
+ return 2652;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2532;
+ return 2535;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2685;
+ return 2688;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2545;
+ return 2548;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2546;
+ return 2549;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2857;
+ return 2860;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2858;
+ return 2861;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2859;
+ return 2862;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2860;
+ return 2863;
}
}
}
@@ -3896,7 +3896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2469;
+ return 2472;
}
else
{
@@ -3904,7 +3904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2470;
+ return 2473;
}
}
else
@@ -3915,7 +3915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2471;
+ return 2474;
}
else
{
@@ -3923,7 +3923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2472;
+ return 2475;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2849;
+ return 2852;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2850;
+ return 2853;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2851;
+ return 2854;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2852;
+ return 2855;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2787;
+ return 2790;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2788;
+ return 2791;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2789;
+ return 2792;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2790;
+ return 2793;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2856;
+ return 2859;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2793;
+ return 2796;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2794;
+ return 2797;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2811;
+ return 2814;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2812;
+ return 2815;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2813;
+ return 2816;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2814;
+ return 2817;
}
}
}
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2468;
+ return 2471;
}
else
{
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2848;
+ return 2851;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2785;
+ return 2788;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2786;
+ return 2789;
}
}
}
@@ -4145,7 +4145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0100xxxxxxxxxxxxx
sel. */
- return 2656;
+ return 2659;
}
else
{
@@ -4153,7 +4153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1100xxxxxxxxxxxxx
sel. */
- return 2657;
+ return 2660;
}
}
else
@@ -4170,7 +4170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110000xxxxxxxxx0
fclamp. */
- return 2479;
+ return 2482;
}
else
{
@@ -4178,7 +4178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110100xxxxxxxxx0
zip. */
- return 2905;
+ return 2908;
}
}
else
@@ -4187,7 +4187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x00xxxxxxxxx1
uzp. */
- return 2892;
+ return 2895;
}
}
else
@@ -4198,7 +4198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110010xxxxxxxxxx
fclamp. */
- return 2480;
+ return 2483;
}
else
{
@@ -4210,7 +4210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx00xxxxx
sqrshr. */
- return 2711;
+ return 2714;
}
else
{
@@ -4218,7 +4218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx10xxxxx
sqrshru. */
- return 2714;
+ return 2717;
}
}
else
@@ -4227,7 +4227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxxx1xxxxx
uqrshr. */
- return 2867;
+ return 2870;
}
}
}
@@ -4244,7 +4244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx0
sclamp. */
- return 2640;
+ return 2643;
}
else
{
@@ -4252,7 +4252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx1
uclamp. */
- return 2805;
+ return 2808;
}
}
else
@@ -4265,7 +4265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx0
zip. */
- return 2906;
+ return 2909;
}
else
{
@@ -4273,7 +4273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx1
uzp. */
- return 2893;
+ return 2896;
}
}
else
@@ -4286,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110xxxx110101xxxx0xxxxx
sqrshr. */
- return 2710;
+ return 2713;
}
else
{
@@ -4294,7 +4294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111xxxx110101xxxx0xxxxx
sqrshru. */
- return 2713;
+ return 2716;
}
}
else
@@ -4303,7 +4303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx110101xxxx1xxxxx
uqrshr. */
- return 2866;
+ return 2869;
}
}
}
@@ -4318,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx0
sclamp. */
- return 2641;
+ return 2644;
}
else
{
@@ -4326,7 +4326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx1
uclamp. */
- return 2806;
+ return 2809;
}
}
else
@@ -4339,7 +4339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx00xxxxx
sqrshrn. */
- return 2712;
+ return 2715;
}
else
{
@@ -4347,7 +4347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx10xxxxx
sqrshrun. */
- return 2715;
+ return 2718;
}
}
else
@@ -4356,7 +4356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxxx1xxxxx
uqrshrn. */
- return 2868;
+ return 2871;
}
}
}
@@ -4383,7 +4383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx0
smax. */
- return 2658;
+ return 2661;
}
else
{
@@ -4393,7 +4393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100001xx0xxxx0
fmax. */
- return 2493;
+ return 2496;
}
else
{
@@ -4401,7 +4401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100011xx0xxxx0
add. */
- return 2447;
+ return 2450;
}
}
}
@@ -4415,7 +4415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx0
smin. */
- return 2662;
+ return 2665;
}
else
{
@@ -4423,7 +4423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx0
srshl. */
- return 2716;
+ return 2719;
}
}
else
@@ -4432,7 +4432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx0
fmaxnm. */
- return 2497;
+ return 2500;
}
}
}
@@ -4446,7 +4446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2821;
+ return 2824;
}
else
{
@@ -4454,7 +4454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx0xxxx1
fmin. */
- return 2501;
+ return 2504;
}
}
else
@@ -4467,7 +4467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx1
umin. */
- return 2825;
+ return 2828;
}
else
{
@@ -4475,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx1
urshl. */
- return 2869;
+ return 2872;
}
}
else
@@ -4484,7 +4484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx1
fminnm. */
- return 2505;
+ return 2508;
}
}
}
@@ -4507,7 +4507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01x0000111000xxxx0xxxxx
fcvt. */
- return 2481;
+ return 2484;
}
else
{
@@ -4515,7 +4515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11x0000111000xxxx0xxxxx
bfcvt. */
- return 2449;
+ return 2452;
}
}
else
@@ -4526,7 +4526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101000111000xxxx0xxxxx
frintn. */
- return 2541;
+ return 2544;
}
else
{
@@ -4534,7 +4534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111000111000xxxx0xxxxx
frintn. */
- return 2542;
+ return 2545;
}
}
}
@@ -4546,7 +4546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x100111000xxxx0xxxxx
frinta. */
- return 2537;
+ return 2540;
}
else
{
@@ -4554,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x100111000xxxx0xxxxx
frinta. */
- return 2538;
+ return 2541;
}
}
}
@@ -4570,7 +4570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100010111000xxxx0xxxxx
scvtf. */
- return 2642;
+ return 2645;
}
else
{
@@ -4578,7 +4578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110010111000xxxx0xxxxx
scvtf. */
- return 2643;
+ return 2646;
}
}
else
@@ -4589,7 +4589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101010111000xxxx0xxxxx
frintm. */
- return 2539;
+ return 2542;
}
else
{
@@ -4597,7 +4597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111010111000xxxx0xxxxx
frintm. */
- return 2540;
+ return 2543;
}
}
}
@@ -4609,7 +4609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx0x
zip. */
- return 2907;
+ return 2910;
}
else
{
@@ -4617,7 +4617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx1x
uzp. */
- return 2894;
+ return 2897;
}
}
}
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxx00111000xxxx1xxxxx
fcvtn. */
- return 2482;
+ return 2485;
}
else
{
@@ -4640,7 +4640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxx00111000xxxx1xxxxx
bfcvtn. */
- return 2450;
+ return 2453;
}
}
else
@@ -4651,7 +4651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx10111000xxxx1xxxxx
ucvtf. */
- return 2807;
+ return 2810;
}
else
{
@@ -4659,7 +4659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx10111000xxxx1xxxxx
ucvtf. */
- return 2808;
+ return 2811;
}
}
}
@@ -4682,7 +4682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100001111000xxxx0xxxx0
fcvtzs. */
- return 2483;
+ return 2486;
}
else
{
@@ -4690,7 +4690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110001111000xxxx0xxxx0
fcvtzs. */
- return 2484;
+ return 2487;
}
}
else
@@ -4701,7 +4701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101001111000xxxx0xxxx0
frintp. */
- return 2543;
+ return 2546;
}
else
{
@@ -4709,7 +4709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111001111000xxxx0xxxx0
frintp. */
- return 2544;
+ return 2547;
}
}
}
@@ -4721,7 +4721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x001111000xxxx1xxxx0
fcvtzu. */
- return 2485;
+ return 2488;
}
else
{
@@ -4729,7 +4729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x001111000xxxx1xxxx0
fcvtzu. */
- return 2486;
+ return 2489;
}
}
}
@@ -4741,7 +4741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x101111000xxxxxxxxx0
sunpk. */
- return 2800;
+ return 2803;
}
else
{
@@ -4749,7 +4749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x101111000xxxxxxxxx0
sunpk. */
- return 2801;
+ return 2804;
}
}
}
@@ -4761,7 +4761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx01111000xxxxxxxxx1
uunpk. */
- return 2888;
+ return 2891;
}
else
{
@@ -4769,7 +4769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx01111000xxxxxxxxx1
uunpk. */
- return 2889;
+ return 2892;
}
}
}
@@ -4787,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010x011111000xxxx0xxxxx
sqcvt. */
- return 2700;
+ return 2703;
}
else
{
@@ -4795,7 +4795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110x011111000xxxx0xxxxx
sqcvtu. */
- return 2703;
+ return 2706;
}
}
else
@@ -4808,7 +4808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx00xxxxx
sqcvt. */
- return 2701;
+ return 2704;
}
else
{
@@ -4816,7 +4816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx00xxxxx
sqcvtu. */
- return 2704;
+ return 2707;
}
}
else
@@ -4827,7 +4827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx10xxxxx
sqcvtn. */
- return 2702;
+ return 2705;
}
else
{
@@ -4835,7 +4835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx10xxxxx
sqcvtun. */
- return 2705;
+ return 2708;
}
}
}
@@ -4848,7 +4848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx0x
zip. */
- return 2908;
+ return 2911;
}
else
{
@@ -4856,7 +4856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx1x
uzp. */
- return 2895;
+ return 2898;
}
}
}
@@ -4868,7 +4868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx11111000xxxx1xxxxx
uqcvt. */
- return 2863;
+ return 2866;
}
else
{
@@ -4878,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx01xxxxx
uqcvt. */
- return 2864;
+ return 2867;
}
else
{
@@ -4886,7 +4886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx11xxxxx
uqcvtn. */
- return 2865;
+ return 2868;
}
}
}
@@ -4906,7 +4906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2660;
+ return 2663;
}
else
{
@@ -4914,7 +4914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx0
fmax. */
- return 2495;
+ return 2498;
}
}
else
@@ -4927,7 +4927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx0
smin. */
- return 2664;
+ return 2667;
}
else
{
@@ -4935,7 +4935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx0
srshl. */
- return 2718;
+ return 2721;
}
}
else
@@ -4944,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx0
fmaxnm. */
- return 2499;
+ return 2502;
}
}
}
@@ -4958,7 +4958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2823;
+ return 2826;
}
else
{
@@ -4966,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx1
fmin. */
- return 2503;
+ return 2506;
}
}
else
@@ -4979,7 +4979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx1
umin. */
- return 2827;
+ return 2830;
}
else
{
@@ -4987,7 +4987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx1
urshl. */
- return 2871;
+ return 2874;
}
}
else
@@ -4996,7 +4996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx1
fminnm. */
- return 2507;
+ return 2510;
}
}
}
@@ -5016,7 +5016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2659;
+ return 2662;
}
else
{
@@ -5024,7 +5024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2661;
+ return 2664;
}
}
else
@@ -5037,7 +5037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101001xx0xxxx0
fmax. */
- return 2494;
+ return 2497;
}
else
{
@@ -5045,7 +5045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111001xx0xxxx0
fmax. */
- return 2496;
+ return 2499;
}
}
else
@@ -5054,7 +5054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1x1011xx0xxxx0
add. */
- return 2448;
+ return 2451;
}
}
}
@@ -5070,7 +5070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx0
smin. */
- return 2663;
+ return 2666;
}
else
{
@@ -5078,7 +5078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx0
smin. */
- return 2665;
+ return 2668;
}
}
else
@@ -5089,7 +5089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx0
srshl. */
- return 2717;
+ return 2720;
}
else
{
@@ -5097,7 +5097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx0
srshl. */
- return 2719;
+ return 2722;
}
}
}
@@ -5109,7 +5109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx0
fmaxnm. */
- return 2498;
+ return 2501;
}
else
{
@@ -5117,7 +5117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx0
fmaxnm. */
- return 2500;
+ return 2503;
}
}
}
@@ -5134,7 +5134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx1
umax. */
- return 2822;
+ return 2825;
}
else
{
@@ -5142,7 +5142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx1
umax. */
- return 2824;
+ return 2827;
}
}
else
@@ -5153,7 +5153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx0xxxx1
fmin. */
- return 2502;
+ return 2505;
}
else
{
@@ -5161,7 +5161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx0xxxx1
fmin. */
- return 2504;
+ return 2507;
}
}
}
@@ -5177,7 +5177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx1
umin. */
- return 2826;
+ return 2829;
}
else
{
@@ -5185,7 +5185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx1
umin. */
- return 2828;
+ return 2831;
}
}
else
@@ -5196,7 +5196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx1
urshl. */
- return 2870;
+ return 2873;
}
else
{
@@ -5204,7 +5204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx1
urshl. */
- return 2872;
+ return 2875;
}
}
}
@@ -5216,7 +5216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx1
fminnm. */
- return 2506;
+ return 2509;
}
else
{
@@ -5224,7 +5224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx1
fminnm. */
- return 2508;
+ return 2511;
}
}
}
@@ -5241,7 +5241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001xxxxxxxxxx
sqdmulh. */
- return 2706;
+ return 2709;
}
else
{
@@ -5249,7 +5249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101xxxxxxxxxx
sqdmulh. */
- return 2708;
+ return 2711;
}
}
else
@@ -5260,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011xxxxxxxxxx
sqdmulh. */
- return 2707;
+ return 2710;
}
else
{
@@ -5268,7 +5268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111xxxxxxxxxx
sqdmulh. */
- return 2709;
+ return 2712;
}
}
}
@@ -5296,7 +5296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2726;
+ return 2729;
}
else
{
@@ -5304,7 +5304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2750;
+ return 2753;
}
}
else
@@ -5315,7 +5315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2742;
+ return 2745;
}
else
{
@@ -5323,7 +5323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2734;
+ return 2737;
}
}
}
@@ -5337,7 +5337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2758;
+ return 2761;
}
else
{
@@ -5345,7 +5345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2782;
+ return 2785;
}
}
else
@@ -5356,7 +5356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2774;
+ return 2777;
}
else
{
@@ -5364,7 +5364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2766;
+ return 2769;
}
}
}
@@ -5392,7 +5392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2727;
+ return 2730;
}
else
{
@@ -5400,7 +5400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2784;
+ return 2787;
}
}
else
@@ -5409,7 +5409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2751;
+ return 2754;
}
}
else
@@ -5420,7 +5420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2743;
+ return 2746;
}
else
{
@@ -5428,7 +5428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2735;
+ return 2738;
}
}
}
@@ -5442,7 +5442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2759;
+ return 2762;
}
else
{
@@ -5450,7 +5450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2783;
+ return 2786;
}
}
else
@@ -5461,7 +5461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2775;
+ return 2778;
}
else
{
@@ -5469,7 +5469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2767;
+ return 2770;
}
}
}
@@ -5511,7 +5511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2722;
+ return 2725;
}
else
{
@@ -5519,7 +5519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2723;
+ return 2726;
}
}
else
@@ -5530,7 +5530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2746;
+ return 2749;
}
else
{
@@ -5538,7 +5538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2747;
+ return 2750;
}
}
}
@@ -5552,7 +5552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2738;
+ return 2741;
}
else
{
@@ -5560,7 +5560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2739;
+ return 2742;
}
}
else
@@ -5571,7 +5571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2730;
+ return 2733;
}
else
{
@@ -5579,7 +5579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2731;
+ return 2734;
}
}
}
@@ -5596,7 +5596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2754;
+ return 2757;
}
else
{
@@ -5604,7 +5604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2755;
+ return 2758;
}
}
else
@@ -5615,7 +5615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2778;
+ return 2781;
}
else
{
@@ -5623,7 +5623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2779;
+ return 2782;
}
}
}
@@ -5637,7 +5637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2770;
+ return 2773;
}
else
{
@@ -5645,7 +5645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2771;
+ return 2774;
}
}
else
@@ -5656,7 +5656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2762;
+ return 2765;
}
else
{
@@ -5664,7 +5664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2763;
+ return 2766;
}
}
}
@@ -8066,7 +8066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2971;
+ return 2974;
}
else
{
@@ -8074,7 +8074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2979;
+ return 2982;
}
}
else
@@ -8085,7 +8085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2975;
+ return 2978;
}
else
{
@@ -8093,7 +8093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2982;
+ return 2985;
}
}
}
@@ -8131,7 +8131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 3031;
+ return 3034;
}
else
{
@@ -8139,7 +8139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3037;
+ return 3040;
}
}
else
@@ -8150,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3034;
+ return 3037;
}
else
{
@@ -8158,7 +8158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3040;
+ return 3043;
}
}
}
@@ -8172,7 +8172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3055;
+ return 3058;
}
else
{
@@ -8180,7 +8180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3061;
+ return 3064;
}
}
else
@@ -8191,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3058;
+ return 3061;
}
else
{
@@ -8199,7 +8199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3064;
+ return 3067;
}
}
}
@@ -8216,7 +8216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3043;
+ return 3046;
}
else
{
@@ -8224,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3049;
+ return 3052;
}
}
else
@@ -8235,7 +8235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3046;
+ return 3049;
}
else
{
@@ -8243,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3052;
+ return 3055;
}
}
}
@@ -8257,7 +8257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3067;
+ return 3070;
}
else
{
@@ -8265,7 +8265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3073;
+ return 3076;
}
}
else
@@ -8276,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3070;
+ return 3073;
}
else
{
@@ -8284,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3076;
+ return 3079;
}
}
}
@@ -8349,7 +8349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2972;
+ return 2975;
}
else
{
@@ -8357,7 +8357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2980;
+ return 2983;
}
}
else
@@ -8368,7 +8368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2976;
+ return 2979;
}
else
{
@@ -8376,7 +8376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2983;
+ return 2986;
}
}
}
@@ -8414,7 +8414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 3032;
+ return 3035;
}
else
{
@@ -8422,7 +8422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3038;
+ return 3041;
}
}
else
@@ -8433,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3035;
+ return 3038;
}
else
{
@@ -8441,7 +8441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3041;
+ return 3044;
}
}
}
@@ -8455,7 +8455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3056;
+ return 3059;
}
else
{
@@ -8463,7 +8463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3062;
+ return 3065;
}
}
else
@@ -8474,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3059;
+ return 3062;
}
else
{
@@ -8482,7 +8482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3065;
+ return 3068;
}
}
}
@@ -8499,7 +8499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3044;
+ return 3047;
}
else
{
@@ -8507,7 +8507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3050;
+ return 3053;
}
}
else
@@ -8518,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3047;
+ return 3050;
}
else
{
@@ -8526,7 +8526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3053;
+ return 3056;
}
}
}
@@ -8540,7 +8540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3068;
+ return 3071;
}
else
{
@@ -8548,7 +8548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3074;
+ return 3077;
}
}
else
@@ -8559,7 +8559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3071;
+ return 3074;
}
else
{
@@ -8567,7 +8567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3077;
+ return 3080;
}
}
}
@@ -8635,7 +8635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2974;
+ return 2977;
}
else
{
@@ -8643,7 +8643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2981;
+ return 2984;
}
}
else
@@ -8652,7 +8652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2978;
+ return 2981;
}
}
else
@@ -8663,7 +8663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2973;
+ return 2976;
}
else
{
@@ -8671,7 +8671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2977;
+ return 2980;
}
}
}
@@ -8733,7 +8733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 3033;
+ return 3036;
}
else
{
@@ -8741,7 +8741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3127;
+ return 3130;
}
}
else
@@ -8752,7 +8752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3039;
+ return 3042;
}
else
{
@@ -8760,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3129;
+ return 3132;
}
}
}
@@ -8774,7 +8774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3036;
+ return 3039;
}
else
{
@@ -8782,7 +8782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3128;
+ return 3131;
}
}
else
@@ -8791,7 +8791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3042;
+ return 3045;
}
}
}
@@ -8807,7 +8807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3057;
+ return 3060;
}
else
{
@@ -8815,7 +8815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3133;
+ return 3136;
}
}
else
@@ -8826,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3063;
+ return 3066;
}
else
{
@@ -8834,7 +8834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3135;
+ return 3138;
}
}
}
@@ -8848,7 +8848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3060;
+ return 3063;
}
else
{
@@ -8856,7 +8856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3134;
+ return 3137;
}
}
else
@@ -8865,7 +8865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3066;
+ return 3069;
}
}
}
@@ -8884,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3045;
+ return 3048;
}
else
{
@@ -8892,7 +8892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3130;
+ return 3133;
}
}
else
@@ -8903,7 +8903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3051;
+ return 3054;
}
else
{
@@ -8911,7 +8911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3132;
+ return 3135;
}
}
}
@@ -8925,7 +8925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3048;
+ return 3051;
}
else
{
@@ -8933,7 +8933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3131;
+ return 3134;
}
}
else
@@ -8942,7 +8942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3054;
+ return 3057;
}
}
}
@@ -8958,7 +8958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3069;
+ return 3072;
}
else
{
@@ -8966,7 +8966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3136;
+ return 3139;
}
}
else
@@ -8977,7 +8977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3075;
+ return 3078;
}
else
{
@@ -8985,7 +8985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3138;
+ return 3141;
}
}
}
@@ -8999,7 +8999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3072;
+ return 3075;
}
else
{
@@ -9007,7 +9007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3137;
+ return 3140;
}
}
else
@@ -9016,7 +9016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3078;
+ return 3081;
}
}
}
@@ -9389,7 +9389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3156;
+ return 3159;
}
else
{
@@ -9407,7 +9407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3159;
+ return 3162;
}
}
}
@@ -9487,7 +9487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2969;
+ return 2972;
}
else
{
@@ -9495,7 +9495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2970;
+ return 2973;
}
}
else
@@ -9602,7 +9602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3161;
+ return 3164;
}
}
}
@@ -9618,7 +9618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3158;
+ return 3161;
}
else
{
@@ -9663,7 +9663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2968;
+ return 2971;
}
else
{
@@ -9757,7 +9757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3160;
+ return 3163;
}
}
}
@@ -9887,7 +9887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3162;
+ return 3165;
}
}
}
@@ -9903,7 +9903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3157;
+ return 3160;
}
else
{
@@ -10745,7 +10745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2988;
+ return 2991;
}
}
}
@@ -10819,7 +10819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2989;
+ return 2992;
}
}
}
@@ -12272,7 +12272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x0xxxxx110x11xxxxxxxxxx
udot. */
- return 2431;
+ return 2433;
}
else
{
@@ -12280,7 +12280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx110x11xxxxxxxxxx
udot. */
- return 2430;
+ return 2432;
}
}
}
@@ -13537,7 +13537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2987;
+ return 2990;
}
}
}
@@ -15241,7 +15241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 3016;
+ return 3019;
}
}
else
@@ -15484,7 +15484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2992;
+ return 2995;
}
else
{
@@ -15492,7 +15492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2993;
+ return 2996;
}
}
else
@@ -15735,7 +15735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 3013;
+ return 3016;
}
else
{
@@ -15756,7 +15756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 3020;
+ return 3023;
}
else
{
@@ -15764,7 +15764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 3019;
+ return 3022;
}
}
else
@@ -15830,7 +15830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 3012;
+ return 3015;
}
else
{
@@ -15842,7 +15842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 3018;
+ return 3021;
}
else
{
@@ -15850,7 +15850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 3017;
+ return 3020;
}
}
else
@@ -15901,7 +15901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2996;
+ return 2999;
}
else
{
@@ -15909,7 +15909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2997;
+ return 3000;
}
}
else
@@ -16312,7 +16312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2990;
+ return 2993;
}
else
{
@@ -16345,7 +16345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 3014;
+ return 3017;
}
else
{
@@ -16375,7 +16375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2991;
+ return 2994;
}
else
{
@@ -16504,7 +16504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 3000;
+ return 3003;
}
else
{
@@ -16514,7 +16514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 3002;
+ return 3005;
}
else
{
@@ -16522,7 +16522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 3004;
+ return 3007;
}
}
}
@@ -16534,7 +16534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 3001;
+ return 3004;
}
else
{
@@ -16544,7 +16544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 3003;
+ return 3006;
}
else
{
@@ -16552,7 +16552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 3005;
+ return 3008;
}
}
}
@@ -17469,98 +17469,109 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 10) & 0x1) == 0)
+ if (((word >> 31) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx000000xxxxxxxxxx
- sqshrunb. */
- return 2236;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx000000xxxxxxxxxx
+ sqshrunb. */
+ return 2236;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx000100xxxxxxxxxx
+ shrnb. */
+ return 2154;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx000100xxxxxxxxxx
- shrnb. */
- return 2154;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx000010xxxxxxxxxx
+ sqrshrunb. */
+ return 2228;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx000110xxxxxxxxxx
+ rshrnb. */
+ return 2136;
+ }
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx000010xxxxxxxxxx
- sqrshrunb. */
- return 2228;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx000001xxxxxxxxxx
+ sqshrunt. */
+ return 2237;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx000101xxxxxxxxxx
+ shrnt. */
+ return 2155;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx000110xxxxxxxxxx
- rshrnb. */
- return 2136;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx000011xxxxxxxxxx
+ sqrshrunt. */
+ return 2229;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx000111xxxxxxxxxx
+ rshrnt. */
+ return 2137;
+ }
}
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx000001xxxxxxxxxx
- sqshrunt. */
- return 2237;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx000101xxxxxxxxxx
- shrnt. */
- return 2155;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx000011xxxxxxxxxx
- sqrshrunt. */
- return 2229;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx000111xxxxxxxxxx
- rshrnt. */
- return 2137;
- }
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 110001x10x1xxxxx000xxxxxxxxxxxxx
+ ld1sw. */
+ return 1600;
}
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- 110001x1xx1xxxxx000xxxxxxxxxxxxx
- ld1sw. */
- return 1600;
+ x10001x11x1xxxxx000xxxxxxxxxxxxx
+ sqrshrun. */
+ return 2431;
}
}
}
@@ -17611,7 +17622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2984;
+ return 2987;
}
else
{
@@ -17619,7 +17630,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2986;
+ return 2989;
}
}
else
@@ -17628,7 +17639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2985;
+ return 2988;
}
}
}
@@ -17892,7 +17903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxx1010x10xxxxxxxxxx
uqcvtn. */
- return 2432;
+ return 2434;
}
}
}
@@ -18214,98 +18225,120 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 10) & 0x1) == 0)
+ if (((word >> 31) & 0x1) == 0)
{
- if (((word >> 11) & 0x1) == 0)
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx001000xxxxxxxxxx
- sqshrnb. */
- return 2234;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx001000xxxxxxxxxx
+ sqshrnb. */
+ return 2234;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx001100xxxxxxxxxx
+ uqshrnb. */
+ return 2313;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx001100xxxxxxxxxx
- uqshrnb. */
- return 2313;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx001010xxxxxxxxxx
+ sqrshrnb. */
+ return 2226;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx001110xxxxxxxxxx
+ uqrshrnb. */
+ return 2308;
+ }
}
}
else
{
- if (((word >> 12) & 0x1) == 0)
+ if (((word >> 11) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx001010xxxxxxxxxx
- sqrshrnb. */
- return 2226;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx001001xxxxxxxxxx
+ sqshrnt. */
+ return 2235;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx001101xxxxxxxxxx
+ uqshrnt. */
+ return 2314;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx001110xxxxxxxxxx
- uqrshrnb. */
- return 2308;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx001011xxxxxxxxxx
+ sqrshrnt. */
+ return 2227;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 010001x10x1xxxxx001111xxxxxxxxxx
+ uqrshrnt. */
+ return 2309;
+ }
}
}
}
else
{
- if (((word >> 11) & 0x1) == 0)
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx001001xxxxxxxxxx
- sqshrnt. */
- return 2235;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx001101xxxxxxxxxx
- uqshrnt. */
- return 2314;
- }
- }
- else
- {
- if (((word >> 12) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx001011xxxxxxxxxx
- sqrshrnt. */
- return 2227;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 010001x1xx1xxxxx001111xxxxxxxxxx
- uqrshrnt. */
- return 2309;
- }
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ 110001x10x1xxxxx001xxxxxxxxxxxxx
+ ldff1sw. */
+ return 1701;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- 110001x1xx1xxxxx001xxxxxxxxxxxxx
- ldff1sw. */
- return 1701;
+ if (((word >> 12) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10001x11x1xxxxx0010xxxxxxxxxxxx
+ sqrshrn. */
+ return 2430;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x10001x11x1xxxxx0011xxxxxxxxxxxx
+ uqrshrn. */
+ return 2435;
+ }
}
}
}
@@ -19157,7 +19190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2994;
+ return 2997;
}
else
{
@@ -19165,7 +19198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2995;
+ return 2998;
}
}
}
@@ -19539,7 +19572,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2998;
+ return 3001;
}
else
{
@@ -19547,7 +19580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2999;
+ return 3002;
}
}
}
@@ -19908,7 +19941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2896;
+ return 2899;
}
else
{
@@ -19916,7 +19949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2897;
+ return 2900;
}
}
else
@@ -19929,7 +19962,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx0
whilege. */
- return 2433;
+ return 2436;
}
else
{
@@ -19937,7 +19970,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx1
whilegt. */
- return 2434;
+ return 2437;
}
}
else
@@ -19946,7 +19979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2637;
+ return 2640;
}
}
}
@@ -19960,7 +19993,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2899;
+ return 2902;
}
else
{
@@ -19968,7 +20001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2898;
+ return 2901;
}
}
else
@@ -19981,7 +20014,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx0
whilehs. */
- return 2436;
+ return 2439;
}
else
{
@@ -19989,7 +20022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx1
whilehi. */
- return 2435;
+ return 2438;
}
}
else
@@ -19998,7 +20031,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2639;
+ return 2642;
}
}
}
@@ -20015,7 +20048,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2903;
+ return 2906;
}
else
{
@@ -20023,7 +20056,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2900;
+ return 2903;
}
}
else
@@ -20036,7 +20069,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx0
whilelt. */
- return 2440;
+ return 2443;
}
else
{
@@ -20044,7 +20077,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx1
whilele. */
- return 2437;
+ return 2440;
}
}
else
@@ -20053,7 +20086,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2638;
+ return 2641;
}
}
}
@@ -20067,7 +20100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2901;
+ return 2904;
}
else
{
@@ -20075,7 +20108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2902;
+ return 2905;
}
}
else
@@ -20086,7 +20119,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx0
whilelo. */
- return 2438;
+ return 2441;
}
else
{
@@ -20094,7 +20127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx1
whilels. */
- return 2439;
+ return 2442;
}
}
}
@@ -21201,7 +21234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 3015;
+ return 3018;
}
}
else
@@ -21860,7 +21893,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2476;
+ return 2479;
}
}
else
@@ -22562,7 +22595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3151;
+ return 3154;
}
else
{
@@ -23142,7 +23175,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3079;
+ return 3082;
}
else
{
@@ -23150,7 +23183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3081;
+ return 3084;
}
}
else
@@ -23161,7 +23194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3085;
+ return 3088;
}
else
{
@@ -23169,7 +23202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3087;
+ return 3090;
}
}
}
@@ -23183,7 +23216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3082;
+ return 3085;
}
else
{
@@ -23191,7 +23224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3084;
+ return 3087;
}
}
else
@@ -23202,7 +23235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3088;
+ return 3091;
}
else
{
@@ -23210,7 +23243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3090;
+ return 3093;
}
}
}
@@ -23227,7 +23260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3103;
+ return 3106;
}
else
{
@@ -23235,7 +23268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3105;
+ return 3108;
}
}
else
@@ -23246,7 +23279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3109;
+ return 3112;
}
else
{
@@ -23254,7 +23287,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3111;
+ return 3114;
}
}
}
@@ -23268,7 +23301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3106;
+ return 3109;
}
else
{
@@ -23276,7 +23309,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3108;
+ return 3111;
}
}
else
@@ -23287,7 +23320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3112;
+ return 3115;
}
else
{
@@ -23295,7 +23328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3114;
+ return 3117;
}
}
}
@@ -23315,7 +23348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3091;
+ return 3094;
}
else
{
@@ -23323,7 +23356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3093;
+ return 3096;
}
}
else
@@ -23334,7 +23367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3097;
+ return 3100;
}
else
{
@@ -23342,7 +23375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3099;
+ return 3102;
}
}
}
@@ -23356,7 +23389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3094;
+ return 3097;
}
else
{
@@ -23364,7 +23397,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3096;
+ return 3099;
}
}
else
@@ -23375,7 +23408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3100;
+ return 3103;
}
else
{
@@ -23383,7 +23416,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3102;
+ return 3105;
}
}
}
@@ -23400,7 +23433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3115;
+ return 3118;
}
else
{
@@ -23408,7 +23441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3117;
+ return 3120;
}
}
else
@@ -23419,7 +23452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3121;
+ return 3124;
}
else
{
@@ -23427,7 +23460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3123;
+ return 3126;
}
}
}
@@ -23441,7 +23474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3118;
+ return 3121;
}
else
{
@@ -23449,7 +23482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3120;
+ return 3123;
}
}
else
@@ -23460,7 +23493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3124;
+ return 3127;
}
else
{
@@ -23468,7 +23501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3126;
+ return 3129;
}
}
}
@@ -23502,7 +23535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3080;
+ return 3083;
}
else
{
@@ -23510,7 +23543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3139;
+ return 3142;
}
}
else
@@ -23521,7 +23554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3086;
+ return 3089;
}
else
{
@@ -23529,7 +23562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3141;
+ return 3144;
}
}
}
@@ -23543,7 +23576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3083;
+ return 3086;
}
else
{
@@ -23551,7 +23584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3140;
+ return 3143;
}
}
else
@@ -23560,7 +23593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3089;
+ return 3092;
}
}
}
@@ -23576,7 +23609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3104;
+ return 3107;
}
else
{
@@ -23584,7 +23617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3145;
+ return 3148;
}
}
else
@@ -23595,7 +23628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3110;
+ return 3113;
}
else
{
@@ -23603,7 +23636,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3147;
+ return 3150;
}
}
}
@@ -23617,7 +23650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3107;
+ return 3110;
}
else
{
@@ -23625,7 +23658,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3146;
+ return 3149;
}
}
else
@@ -23634,7 +23667,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3113;
+ return 3116;
}
}
}
@@ -23653,7 +23686,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3092;
+ return 3095;
}
else
{
@@ -23661,7 +23694,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3142;
+ return 3145;
}
}
else
@@ -23672,7 +23705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3098;
+ return 3101;
}
else
{
@@ -23680,7 +23713,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3144;
+ return 3147;
}
}
}
@@ -23694,7 +23727,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3095;
+ return 3098;
}
else
{
@@ -23702,7 +23735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3143;
+ return 3146;
}
}
else
@@ -23711,7 +23744,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3101;
+ return 3104;
}
}
}
@@ -23727,7 +23760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3116;
+ return 3119;
}
else
{
@@ -23735,7 +23768,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3148;
+ return 3151;
}
}
else
@@ -23746,7 +23779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3122;
+ return 3125;
}
else
{
@@ -23754,7 +23787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3150;
+ return 3153;
}
}
}
@@ -23768,7 +23801,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3119;
+ return 3122;
}
else
{
@@ -23776,7 +23809,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3149;
+ return 3152;
}
}
else
@@ -23785,7 +23818,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3125;
+ return 3128;
}
}
}
@@ -23952,7 +23985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 3006;
+ return 3009;
}
}
}
@@ -23985,7 +24018,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2932;
+ return 2935;
}
}
else
@@ -24059,7 +24092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 3008;
+ return 3011;
}
}
}
@@ -24092,7 +24125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 3009;
+ return 3012;
}
}
else
@@ -24139,7 +24172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2939;
+ return 2942;
}
else
{
@@ -24147,7 +24180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2941;
+ return 2944;
}
}
else
@@ -24158,7 +24191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2943;
+ return 2946;
}
else
{
@@ -24172,7 +24205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2944;
+ return 2947;
}
else
{
@@ -24180,7 +24213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2937;
+ return 2940;
}
}
else
@@ -24189,7 +24222,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2946;
+ return 2949;
}
}
else
@@ -24202,7 +24235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2945;
+ return 2948;
}
else
{
@@ -24210,7 +24243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2950;
+ return 2953;
}
}
else
@@ -24219,7 +24252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2947;
+ return 2950;
}
}
}
@@ -24400,7 +24433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2931;
+ return 2934;
}
}
else
@@ -24431,7 +24464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 3007;
+ return 3010;
}
else
{
@@ -24450,7 +24483,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 3023;
+ return 3026;
}
else
{
@@ -24460,7 +24493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 3021;
+ return 3024;
}
else
{
@@ -24470,7 +24503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 3028;
+ return 3031;
}
else
{
@@ -24478,7 +24511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 3027;
+ return 3030;
}
}
}
@@ -25062,7 +25095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 3024;
+ return 3027;
}
else
{
@@ -25070,7 +25103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 3025;
+ return 3028;
}
}
}
@@ -25388,7 +25421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2942;
+ return 2945;
}
}
else
@@ -25999,7 +26032,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2935;
+ return 2938;
}
}
}
@@ -26051,7 +26084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2948;
+ return 2951;
}
}
}
@@ -26294,7 +26327,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2938;
+ return 2941;
}
}
else
@@ -26370,7 +26403,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2951;
+ return 2954;
}
}
else
@@ -27196,7 +27229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2936;
+ return 2939;
}
}
else
@@ -27228,7 +27261,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2949;
+ return 2952;
}
}
else
@@ -27468,7 +27501,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2940;
+ return 2943;
}
}
else
@@ -27500,7 +27533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2954;
+ return 2957;
}
else
{
@@ -27508,7 +27541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2958;
+ return 2961;
}
}
}
@@ -27530,7 +27563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2955;
+ return 2958;
}
else
{
@@ -27538,7 +27571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2959;
+ return 2962;
}
}
}
@@ -27577,7 +27610,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2952;
+ return 2955;
}
else
{
@@ -27585,7 +27618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2956;
+ return 2959;
}
}
else
@@ -27607,7 +27640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2953;
+ return 2956;
}
else
{
@@ -27615,7 +27648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2957;
+ return 2960;
}
}
else
@@ -29423,7 +29456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2960;
+ return 2963;
}
else
{
@@ -29431,7 +29464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2964;
+ return 2967;
}
}
else
@@ -29453,7 +29486,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2961;
+ return 2964;
}
else
{
@@ -29461,7 +29494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2965;
+ return 2968;
}
}
else
@@ -29967,7 +30000,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2962;
+ return 2965;
}
else
{
@@ -29975,7 +30008,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2966;
+ return 2969;
}
}
}
@@ -29997,7 +30030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2963;
+ return 2966;
}
else
{
@@ -30005,7 +30038,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2967;
+ return 2970;
}
}
}
@@ -30061,7 +30094,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2934;
+ return 2937;
}
else
{
@@ -30069,7 +30102,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2933;
+ return 2936;
}
}
}
@@ -30172,7 +30205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 3011;
+ return 3014;
}
else
{
@@ -30180,7 +30213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 3010;
+ return 3013;
}
}
else
@@ -30191,7 +30224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 3022;
+ return 3025;
}
else
{
@@ -30201,7 +30234,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 3030;
+ return 3033;
}
else
{
@@ -30209,7 +30242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 3029;
+ return 3032;
}
}
}
@@ -30700,22 +30733,22 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2625: value = 2633; break; /* mov --> mova. */
- case 2633: return NULL; /* mova --> NULL. */
- case 2621: value = 2629; break; /* mov --> mova. */
- case 2629: return NULL; /* mova --> NULL. */
- case 2623: value = 2631; break; /* mov --> mova. */
- case 2631: return NULL; /* mova --> NULL. */
- case 2619: value = 2627; break; /* mov --> mova. */
- case 2627: return NULL; /* mova --> NULL. */
+ case 2628: value = 2636; break; /* mov --> mova. */
+ case 2636: return NULL; /* mova --> NULL. */
+ case 2624: value = 2632; break; /* mov --> mova. */
+ case 2632: return NULL; /* mova --> NULL. */
case 2626: value = 2634; break; /* mov --> mova. */
case 2634: return NULL; /* mova --> NULL. */
case 2622: value = 2630; break; /* mov --> mova. */
case 2630: return NULL; /* mova --> NULL. */
- case 2624: value = 2632; break; /* mov --> mova. */
- case 2632: return NULL; /* mova --> NULL. */
- case 2620: value = 2628; break; /* mov --> mova. */
- case 2628: return NULL; /* mova --> NULL. */
+ case 2629: value = 2637; break; /* mov --> mova. */
+ case 2637: return NULL; /* mova --> NULL. */
+ case 2625: value = 2633; break; /* mov --> mova. */
+ case 2633: return NULL; /* mova --> NULL. */
+ case 2627: value = 2635; break; /* mov --> mova. */
+ case 2635: return NULL; /* mova --> NULL. */
+ case 2623: value = 2631; break; /* mov --> mova. */
+ case 2631: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -30737,11 +30770,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3152; break; /* addg --> smax. */
- case 3152: value = 3153; break; /* smax --> umax. */
- case 3153: value = 3154; break; /* umax --> smin. */
- case 3154: value = 3155; break; /* smin --> umin. */
- case 3155: return NULL; /* umin --> NULL. */
+ case 19: value = 3155; break; /* addg --> smax. */
+ case 3155: value = 3156; break; /* smax --> umax. */
+ case 3156: value = 3157; break; /* umax --> smin. */
+ case 3157: value = 3158; break; /* smin --> umin. */
+ case 3158: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30899,8 +30932,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 3026; break; /* fcvt --> bfcvt. */
- case 3026: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3029; break; /* fcvt --> bfcvt. */
+ case 3029: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index aef29d610ca..265aaa7e4ba 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5370,9 +5370,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSNC ("sdot", 0x4400c800, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSN ("sqcvtn", 0x45314000, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
SME2_INSN ("sqcvtun", 0x45315000, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
+ SME2_INSN ("sqrshrn", 0x45b02800, 0xfff0fc20, sme_misc, 0, OP3 (SVE_Zd, SME_Znx2, SME_SHRIMM4), OP_SVE_HSU, 0, 0),
+ SME2_INSN ("sqrshrun", 0x45b00800, 0xfff0fc20, sme_misc, 0, OP3 (SVE_Zd, SME_Znx2, SME_SHRIMM4), OP_SVE_HSU, 0, 0),
SME2_INSNC ("udot", 0x4480cc00, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_19_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("udot", 0x4400cc00, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSN ("uqcvtn", 0x45314800, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
+ SME2_INSN ("uqrshrn", 0x45b03800, 0xfff0fc20, sme_misc, 0, OP3 (SVE_Zd, SME_Znx2, SME_SHRIMM4), OP_SVE_HSU, 0, 0),
SME2_INSN ("whilege", 0x25205010, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
SME2_INSN ("whilegt", 0x25205011, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
SME2_INSN ("whilehi", 0x25205811, 0xff20fc11, sme_size_22, 0, OP3 (SME_Pdx2, Rn, Rm), OP_SVE_VXX_BHSD, 0, 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 30/31] aarch64: Add the SVE FCLAMP instruction
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (28 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 29/31] aarch64: Add new SVE shift instructions Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-03-30 10:26 ` [PATCH 31/31] aarch64: Add the RPRFM instruction Richard Sandiford
` (2 subsequent siblings)
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
---
gas/testsuite/gas/aarch64/sme2-22-invalid.l | 2 +-
.../gas/aarch64/sve2-sme2-7-invalid.d | 3 +
.../gas/aarch64/sve2-sme2-7-invalid.l | 29 +
.../gas/aarch64/sve2-sme2-7-invalid.s | 9 +
.../gas/aarch64/sve2-sme2-7-noarch.d | 3 +
.../gas/aarch64/sve2-sme2-7-noarch.l | 16 +
gas/testsuite/gas/aarch64/sve2-sme2-7.d | 24 +
gas/testsuite/gas/aarch64/sve2-sme2-7.s | 17 +
opcodes/aarch64-dis-2.c | 1529 +++++++++--------
opcodes/aarch64-tbl.h | 1 +
10 files changed, 873 insertions(+), 760 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7.d
create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7.s
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.l b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
index 85251cd1fee..6f799c1c329 100644
--- a/gas/testsuite/gas/aarch64/sme2-22-invalid.l
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
@@ -1,5 +1,5 @@
[^ :]+: Assembler messages:
-[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `fclamp 0,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fclamp 0,z0\.h,z0\.h'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp {z0\.h-z1\.h},0,z0\.h'
[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp {z0\.h-z1\.h},z0\.h,0'
[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z1\.b},z0\.b,z0\.b'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d
new file mode 100644
index 00000000000..3a759aac14f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sve2-sme2-7-invalid.s
+#error_output: sve2-sme2-7-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
new file mode 100644
index 00000000000..69e7ac8ec41
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
@@ -0,0 +1,29 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fclamp 0,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp z0\.h,0,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp z0\.h,z0\.h,0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.b,z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp z0\.h, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp z0\.s, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp z0\.d, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp z0\.h,{z0\.h,z0\.h}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp z0\.h, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp z0\.s, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp z0\.d, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.h,z0\.s,z0\.h'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp z0\.h, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp z0\.s, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp z0\.d, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.h,z0\.h,z0\.s'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp z0\.h, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp z0\.s, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp z0\.d, z0\.d, z0\.d
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s
new file mode 100644
index 00000000000..79f21d35385
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s
@@ -0,0 +1,9 @@
+ fclamp 0, z0.h, z0.h
+ fclamp z0.h, 0, z0.h
+ fclamp z0.h, z0.h, 0
+
+ fclamp z0.b, z0.b, z0.b
+ fclamp z0.h, { z0.h, z0.h }
+ fclamp z0.s, z0.h, z0.h
+ fclamp z0.h, z0.s, z0.h
+ fclamp z0.h, z0.h, z0.s
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d
new file mode 100644
index 00000000000..59ca2dee133
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sve2-sme2-7.s
+#error_output: sve2-sme2-7-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l
new file mode 100644
index 00000000000..d22ea21d70a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l
@@ -0,0 +1,16 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.h,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z31\.h,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.h,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.h,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z9\.h,z22\.h,z21\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.s,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z31\.s,z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.s,z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.s,z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z25\.s,z5\.s,z1\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.d,z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z31\.d,z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.d,z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z0\.d,z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp z3\.d,z30\.d,z28\.d'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7.d b/gas/testsuite/gas/aarch64/sve2-sme2-7.d
new file mode 100644
index 00000000000..2741ad57b04
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7.d
@@ -0,0 +1,24 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 64602400 fclamp z0\.h, z0\.h, z0\.h
+[^:]+: 6460241f fclamp z31\.h, z0\.h, z0\.h
+[^:]+: 646027e0 fclamp z0\.h, z31\.h, z0\.h
+[^:]+: 647f2400 fclamp z0\.h, z0\.h, z31\.h
+[^:]+: 647526c9 fclamp z9\.h, z22\.h, z21\.h
+[^:]+: 64a02400 fclamp z0\.s, z0\.s, z0\.s
+[^:]+: 64a0241f fclamp z31\.s, z0\.s, z0\.s
+[^:]+: 64a027e0 fclamp z0\.s, z31\.s, z0\.s
+[^:]+: 64bf2400 fclamp z0\.s, z0\.s, z31\.s
+[^:]+: 64a124b9 fclamp z25\.s, z5\.s, z1\.s
+[^:]+: 64e02400 fclamp z0\.d, z0\.d, z0\.d
+[^:]+: 64e0241f fclamp z31\.d, z0\.d, z0\.d
+[^:]+: 64e027e0 fclamp z0\.d, z31\.d, z0\.d
+[^:]+: 64ff2400 fclamp z0\.d, z0\.d, z31\.d
+[^:]+: 64fc27c3 fclamp z3\.d, z30\.d, z28\.d
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7.s b/gas/testsuite/gas/aarch64/sve2-sme2-7.s
new file mode 100644
index 00000000000..0403307e422
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-7.s
@@ -0,0 +1,17 @@
+ fclamp z0.h, z0.h, z0.h
+ fclamp z31.h, z0.h, z0.h
+ fclamp z0.h, z31.h, z0.h
+ fclamp z0.h, z0.h, z31.h
+ fclamp z9.h, z22.h, z21.h
+
+ fclamp z0.s, z0.s, z0.s
+ fclamp z31.s, z0.s, z0.s
+ fclamp z0.s, z31.s, z0.s
+ fclamp z0.s, z0.s, z31.s
+ fclamp z25.s, z5.s, z1.s
+
+ fclamp z0.d, z0.d, z0.d
+ fclamp z31.d, z0.d, z0.d
+ fclamp z0.d, z31.d, z0.d
+ fclamp z0.d, z0.d, z31.d
+ fclamp z3.d, z30.d, z28.d
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 1559066d090..5530a385bab 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2477;
+ return 2478;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2478;
+ return 2479;
}
}
}
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2907;
+ return 2908;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2621;
+ return 2622;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2620;
+ return 2621;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2619;
+ return 2620;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2628;
+ return 2629;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2624;
+ return 2625;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2618;
+ return 2619;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2617;
+ return 2618;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2639;
+ return 2640;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2638;
+ return 2639;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2616;
+ return 2617;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2626;
+ return 2627;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2622;
+ return 2623;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2629;
+ return 2630;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2625;
+ return 2626;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2627;
+ return 2628;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2623;
+ return 2624;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2555;
+ return 2556;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2556;
+ return 2557;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2579;
+ return 2580;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2580;
+ return 2581;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2571;
+ return 2572;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2572;
+ return 2573;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2563;
+ return 2564;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2564;
+ return 2565;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2587;
+ return 2588;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2588;
+ return 2589;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2611;
+ return 2612;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2612;
+ return 2613;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2603;
+ return 2604;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2604;
+ return 2605;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2595;
+ return 2596;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2596;
+ return 2597;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2701;
+ return 2702;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2702;
+ return 2703;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2551;
+ return 2552;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2552;
+ return 2553;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2575;
+ return 2576;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2576;
+ return 2577;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2567;
+ return 2568;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2568;
+ return 2569;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2559;
+ return 2560;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2560;
+ return 2561;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2583;
+ return 2584;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2584;
+ return 2585;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2607;
+ return 2608;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2608;
+ return 2609;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2599;
+ return 2600;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2600;
+ return 2601;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2591;
+ return 2592;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2592;
+ return 2593;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2727;
+ return 2728;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2728;
+ return 2729;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2751;
+ return 2752;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2752;
+ return 2753;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2743;
+ return 2744;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2744;
+ return 2745;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2735;
+ return 2736;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2736;
+ return 2737;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2759;
+ return 2760;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2760;
+ return 2761;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2783;
+ return 2784;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2784;
+ return 2785;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2775;
+ return 2776;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2776;
+ return 2777;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2767;
+ return 2768;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2768;
+ return 2769;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2723;
+ return 2724;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2724;
+ return 2725;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2747;
+ return 2748;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2748;
+ return 2749;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2739;
+ return 2740;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2740;
+ return 2741;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2731;
+ return 2732;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2732;
+ return 2733;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2755;
+ return 2756;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2756;
+ return 2757;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2779;
+ return 2780;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2780;
+ return 2781;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2771;
+ return 2772;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2772;
+ return 2773;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2763;
+ return 2764;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2764;
+ return 2765;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2677;
+ return 2678;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2882;
+ return 2883;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2678;
+ return 2679;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2679;
+ return 2680;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2883;
+ return 2884;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2884;
+ return 2885;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2840;
+ return 2841;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2798;
+ return 2799;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2841;
+ return 2842;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2842;
+ return 2843;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2799;
+ return 2800;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2800;
+ return 2801;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2693;
+ return 2694;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2694;
+ return 2695;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2695;
+ return 2696;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2856;
+ return 2857;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2857;
+ return 2858;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2858;
+ return 2859;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2557;
+ return 2558;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2581;
+ return 2582;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2573;
+ return 2574;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2565;
+ return 2566;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2589;
+ return 2590;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2613;
+ return 2614;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2605;
+ return 2606;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2597;
+ return 2598;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2558;
+ return 2559;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2615;
+ return 2616;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2582;
+ return 2583;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2574;
+ return 2575;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2566;
+ return 2567;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2590;
+ return 2591;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2614;
+ return 2615;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2606;
+ return 2607;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2598;
+ return 2599;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2914;
+ return 2915;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2915;
+ return 2916;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2916;
+ return 2917;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2518;
+ return 2519;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2519;
+ return 2520;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2520;
+ return 2521;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2923;
+ return 2924;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2924;
+ return 2925;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2925;
+ return 2926;
}
}
}
@@ -1836,7 +1836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2460;
+ return 2461;
}
else
{
@@ -1846,7 +1846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2461;
+ return 2462;
}
else
{
@@ -1854,7 +1854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2462;
+ return 2463;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2917;
+ return 2918;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2918;
+ return 2919;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2919;
+ return 2920;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2532;
+ return 2533;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2533;
+ return 2534;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2534;
+ return 2535;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2864;
+ return 2865;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2926;
+ return 2927;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2927;
+ return 2928;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2928;
+ return 2929;
}
}
}
@@ -1988,7 +1988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2468;
+ return 2469;
}
else
{
@@ -1998,7 +1998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2469;
+ return 2470;
}
else
{
@@ -2006,7 +2006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2470;
+ return 2471;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2865;
+ return 2866;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2553;
+ return 2554;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2577;
+ return 2578;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2569;
+ return 2570;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2561;
+ return 2562;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2512;
+ return 2513;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2647;
+ return 2648;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2806;
+ return 2807;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2653;
+ return 2654;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2526;
+ return 2527;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2812;
+ return 2813;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2893;
+ return 2894;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2818;
+ return 2819;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2554;
+ return 2555;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2578;
+ return 2579;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2570;
+ return 2571;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2562;
+ return 2563;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2513;
+ return 2514;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2648;
+ return 2649;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2807;
+ return 2808;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2654;
+ return 2655;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2527;
+ return 2528;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2813;
+ return 2814;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2894;
+ return 2895;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2819;
+ return 2820;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2585;
+ return 2586;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2609;
+ return 2610;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2601;
+ return 2602;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2593;
+ return 2594;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2550;
+ return 2551;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2490;
+ return 2491;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2876;
+ return 2877;
}
}
else
@@ -2375,7 +2375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx011xxx
bfvdot. */
- return 2476;
+ return 2477;
}
else
{
@@ -2383,7 +2383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx011xxx
bfdot. */
- return 2454;
+ return 2455;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2794;
+ return 2795;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2586;
+ return 2587;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2610;
+ return 2611;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2602;
+ return 2603;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2594;
+ return 2595;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2491;
+ return 2492;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2890;
+ return 2891;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2877;
+ return 2878;
}
}
}
@@ -2480,7 +2480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx011xxx
bfdot. */
- return 2455;
+ return 2456;
}
else
{
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2805;
+ return 2806;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2795;
+ return 2796;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2930;
+ return 2931;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2931;
+ return 2932;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2669;
+ return 2670;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2670;
+ return 2671;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2671;
+ return 2672;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2912;
+ return 2913;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2913;
+ return 2914;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2920;
+ return 2921;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2685;
+ return 2686;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2686;
+ return 2687;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2687;
+ return 2688;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2932;
+ return 2933;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2933;
+ return 2934;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2832;
+ return 2833;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2833;
+ return 2834;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2834;
+ return 2835;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2921;
+ return 2922;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2922;
+ return 2923;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2929;
+ return 2930;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2848;
+ return 2849;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2849;
+ return 2850;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2850;
+ return 2851;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2681;
+ return 2682;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2682;
+ return 2683;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2683;
+ return 2684;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2684;
+ return 2685;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2886;
+ return 2887;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2887;
+ return 2888;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2888;
+ return 2889;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2889;
+ return 2890;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2492;
+ return 2493;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2493;
+ return 2494;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2494;
+ return 2495;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2495;
+ return 2496;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2522;
+ return 2523;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2523;
+ return 2524;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2524;
+ return 2525;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2525;
+ return 2526;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2673;
+ return 2674;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2674;
+ return 2675;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2675;
+ return 2676;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2676;
+ return 2677;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2514;
+ return 2515;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2515;
+ return 2516;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2516;
+ return 2517;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2517;
+ return 2518;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2680;
+ return 2681;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2885;
+ return 2886;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2655;
+ return 2656;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2656;
+ return 2657;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2657;
+ return 2658;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2658;
+ return 2659;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2521;
+ return 2522;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2672;
+ return 2673;
}
}
else
@@ -3166,7 +3166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2480;
+ return 2481;
}
else
{
@@ -3174,7 +3174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2481;
+ return 2482;
}
}
}
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2844;
+ return 2845;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2845;
+ return 2846;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2846;
+ return 2847;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2847;
+ return 2848;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2801;
+ return 2802;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2802;
+ return 2803;
}
}
}
@@ -3259,7 +3259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx10xxx
bfdot. */
- return 2456;
+ return 2457;
}
else
{
@@ -3267,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx10xxx
bfdot. */
- return 2457;
+ return 2458;
}
}
else
@@ -3278,7 +3278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx10xxx
bfdot. */
- return 2458;
+ return 2459;
}
else
{
@@ -3286,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx10xxx
bfdot. */
- return 2459;
+ return 2460;
}
}
}
@@ -3305,7 +3305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2464;
+ return 2465;
}
else
{
@@ -3313,7 +3313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2465;
+ return 2466;
}
}
else
@@ -3324,7 +3324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2466;
+ return 2467;
}
else
{
@@ -3332,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2467;
+ return 2468;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2836;
+ return 2837;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2837;
+ return 2838;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2838;
+ return 2839;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2839;
+ return 2840;
}
}
}
@@ -3388,7 +3388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx10xxx
add. */
- return 2446;
+ return 2447;
}
else
{
@@ -3396,7 +3396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx10xxx
add. */
- return 2447;
+ return 2448;
}
}
else
@@ -3407,7 +3407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx10xxx
add. */
- return 2448;
+ return 2449;
}
else
{
@@ -3415,7 +3415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx10xxx
add. */
- return 2449;
+ return 2450;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2843;
+ return 2844;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2820;
+ return 2821;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2821;
+ return 2822;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2822;
+ return 2823;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2823;
+ return 2824;
}
}
}
@@ -3485,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2463;
+ return 2464;
}
else
{
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2835;
+ return 2836;
}
}
else
@@ -3504,7 +3504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx10xxx
add. */
- return 2444;
+ return 2445;
}
else
{
@@ -3512,7 +3512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx10xxx
add. */
- return 2445;
+ return 2446;
}
}
}
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2697;
+ return 2698;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2698;
+ return 2699;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2699;
+ return 2700;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2700;
+ return 2701;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2536;
+ return 2537;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2537;
+ return 2538;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2538;
+ return 2539;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2539;
+ return 2540;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2689;
+ return 2690;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2690;
+ return 2691;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2691;
+ return 2692;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2692;
+ return 2693;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2528;
+ return 2529;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2529;
+ return 2530;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2530;
+ return 2531;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2531;
+ return 2532;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2696;
+ return 2697;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2878;
+ return 2879;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2879;
+ return 2880;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2880;
+ return 2881;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2881;
+ return 2882;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2649;
+ return 2650;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2650;
+ return 2651;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2651;
+ return 2652;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2652;
+ return 2653;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2535;
+ return 2536;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2688;
+ return 2689;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2548;
+ return 2549;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2549;
+ return 2550;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2860;
+ return 2861;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2861;
+ return 2862;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2862;
+ return 2863;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2863;
+ return 2864;
}
}
}
@@ -3896,7 +3896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2472;
+ return 2473;
}
else
{
@@ -3904,7 +3904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2473;
+ return 2474;
}
}
else
@@ -3915,7 +3915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2474;
+ return 2475;
}
else
{
@@ -3923,7 +3923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2475;
+ return 2476;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2852;
+ return 2853;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2853;
+ return 2854;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2854;
+ return 2855;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2855;
+ return 2856;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2790;
+ return 2791;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2791;
+ return 2792;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2792;
+ return 2793;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2793;
+ return 2794;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2859;
+ return 2860;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2796;
+ return 2797;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2797;
+ return 2798;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2814;
+ return 2815;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2815;
+ return 2816;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2816;
+ return 2817;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2817;
+ return 2818;
}
}
}
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2471;
+ return 2472;
}
else
{
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2851;
+ return 2852;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2788;
+ return 2789;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2789;
+ return 2790;
}
}
}
@@ -4145,7 +4145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0100xxxxxxxxxxxxx
sel. */
- return 2659;
+ return 2660;
}
else
{
@@ -4153,7 +4153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1100xxxxxxxxxxxxx
sel. */
- return 2660;
+ return 2661;
}
}
else
@@ -4170,7 +4170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110000xxxxxxxxx0
fclamp. */
- return 2482;
+ return 2483;
}
else
{
@@ -4178,7 +4178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110100xxxxxxxxx0
zip. */
- return 2908;
+ return 2909;
}
}
else
@@ -4187,7 +4187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x00xxxxxxxxx1
uzp. */
- return 2895;
+ return 2896;
}
}
else
@@ -4198,7 +4198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110010xxxxxxxxxx
fclamp. */
- return 2483;
+ return 2484;
}
else
{
@@ -4210,7 +4210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx00xxxxx
sqrshr. */
- return 2714;
+ return 2715;
}
else
{
@@ -4218,7 +4218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx10xxxxx
sqrshru. */
- return 2717;
+ return 2718;
}
}
else
@@ -4227,7 +4227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxxx1xxxxx
uqrshr. */
- return 2870;
+ return 2871;
}
}
}
@@ -4244,7 +4244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx0
sclamp. */
- return 2643;
+ return 2644;
}
else
{
@@ -4252,7 +4252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx1
uclamp. */
- return 2808;
+ return 2809;
}
}
else
@@ -4265,7 +4265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx0
zip. */
- return 2909;
+ return 2910;
}
else
{
@@ -4273,7 +4273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx1
uzp. */
- return 2896;
+ return 2897;
}
}
else
@@ -4286,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110xxxx110101xxxx0xxxxx
sqrshr. */
- return 2713;
+ return 2714;
}
else
{
@@ -4294,7 +4294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111xxxx110101xxxx0xxxxx
sqrshru. */
- return 2716;
+ return 2717;
}
}
else
@@ -4303,7 +4303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx110101xxxx1xxxxx
uqrshr. */
- return 2869;
+ return 2870;
}
}
}
@@ -4318,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx0
sclamp. */
- return 2644;
+ return 2645;
}
else
{
@@ -4326,7 +4326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx1
uclamp. */
- return 2809;
+ return 2810;
}
}
else
@@ -4339,7 +4339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx00xxxxx
sqrshrn. */
- return 2715;
+ return 2716;
}
else
{
@@ -4347,7 +4347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx10xxxxx
sqrshrun. */
- return 2718;
+ return 2719;
}
}
else
@@ -4356,7 +4356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxxx1xxxxx
uqrshrn. */
- return 2871;
+ return 2872;
}
}
}
@@ -4383,7 +4383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx0
smax. */
- return 2661;
+ return 2662;
}
else
{
@@ -4393,7 +4393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100001xx0xxxx0
fmax. */
- return 2496;
+ return 2497;
}
else
{
@@ -4401,7 +4401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100011xx0xxxx0
add. */
- return 2450;
+ return 2451;
}
}
}
@@ -4415,7 +4415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx0
smin. */
- return 2665;
+ return 2666;
}
else
{
@@ -4423,7 +4423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx0
srshl. */
- return 2719;
+ return 2720;
}
}
else
@@ -4432,7 +4432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx0
fmaxnm. */
- return 2500;
+ return 2501;
}
}
}
@@ -4446,7 +4446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2824;
+ return 2825;
}
else
{
@@ -4454,7 +4454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx0xxxx1
fmin. */
- return 2504;
+ return 2505;
}
}
else
@@ -4467,7 +4467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx1
umin. */
- return 2828;
+ return 2829;
}
else
{
@@ -4475,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx1
urshl. */
- return 2872;
+ return 2873;
}
}
else
@@ -4484,7 +4484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx1
fminnm. */
- return 2508;
+ return 2509;
}
}
}
@@ -4507,7 +4507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01x0000111000xxxx0xxxxx
fcvt. */
- return 2484;
+ return 2485;
}
else
{
@@ -4515,7 +4515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11x0000111000xxxx0xxxxx
bfcvt. */
- return 2452;
+ return 2453;
}
}
else
@@ -4526,7 +4526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101000111000xxxx0xxxxx
frintn. */
- return 2544;
+ return 2545;
}
else
{
@@ -4534,7 +4534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111000111000xxxx0xxxxx
frintn. */
- return 2545;
+ return 2546;
}
}
}
@@ -4546,7 +4546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x100111000xxxx0xxxxx
frinta. */
- return 2540;
+ return 2541;
}
else
{
@@ -4554,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x100111000xxxx0xxxxx
frinta. */
- return 2541;
+ return 2542;
}
}
}
@@ -4570,7 +4570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100010111000xxxx0xxxxx
scvtf. */
- return 2645;
+ return 2646;
}
else
{
@@ -4578,7 +4578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110010111000xxxx0xxxxx
scvtf. */
- return 2646;
+ return 2647;
}
}
else
@@ -4589,7 +4589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101010111000xxxx0xxxxx
frintm. */
- return 2542;
+ return 2543;
}
else
{
@@ -4597,7 +4597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111010111000xxxx0xxxxx
frintm. */
- return 2543;
+ return 2544;
}
}
}
@@ -4609,7 +4609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx0x
zip. */
- return 2910;
+ return 2911;
}
else
{
@@ -4617,7 +4617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx1x
uzp. */
- return 2897;
+ return 2898;
}
}
}
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxx00111000xxxx1xxxxx
fcvtn. */
- return 2485;
+ return 2486;
}
else
{
@@ -4640,7 +4640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxx00111000xxxx1xxxxx
bfcvtn. */
- return 2453;
+ return 2454;
}
}
else
@@ -4651,7 +4651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx10111000xxxx1xxxxx
ucvtf. */
- return 2810;
+ return 2811;
}
else
{
@@ -4659,7 +4659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx10111000xxxx1xxxxx
ucvtf. */
- return 2811;
+ return 2812;
}
}
}
@@ -4682,7 +4682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100001111000xxxx0xxxx0
fcvtzs. */
- return 2486;
+ return 2487;
}
else
{
@@ -4690,7 +4690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110001111000xxxx0xxxx0
fcvtzs. */
- return 2487;
+ return 2488;
}
}
else
@@ -4701,7 +4701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101001111000xxxx0xxxx0
frintp. */
- return 2546;
+ return 2547;
}
else
{
@@ -4709,7 +4709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111001111000xxxx0xxxx0
frintp. */
- return 2547;
+ return 2548;
}
}
}
@@ -4721,7 +4721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x001111000xxxx1xxxx0
fcvtzu. */
- return 2488;
+ return 2489;
}
else
{
@@ -4729,7 +4729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x001111000xxxx1xxxx0
fcvtzu. */
- return 2489;
+ return 2490;
}
}
}
@@ -4741,7 +4741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x101111000xxxxxxxxx0
sunpk. */
- return 2803;
+ return 2804;
}
else
{
@@ -4749,7 +4749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x101111000xxxxxxxxx0
sunpk. */
- return 2804;
+ return 2805;
}
}
}
@@ -4761,7 +4761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx01111000xxxxxxxxx1
uunpk. */
- return 2891;
+ return 2892;
}
else
{
@@ -4769,7 +4769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx01111000xxxxxxxxx1
uunpk. */
- return 2892;
+ return 2893;
}
}
}
@@ -4787,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010x011111000xxxx0xxxxx
sqcvt. */
- return 2703;
+ return 2704;
}
else
{
@@ -4795,7 +4795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110x011111000xxxx0xxxxx
sqcvtu. */
- return 2706;
+ return 2707;
}
}
else
@@ -4808,7 +4808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx00xxxxx
sqcvt. */
- return 2704;
+ return 2705;
}
else
{
@@ -4816,7 +4816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx00xxxxx
sqcvtu. */
- return 2707;
+ return 2708;
}
}
else
@@ -4827,7 +4827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx10xxxxx
sqcvtn. */
- return 2705;
+ return 2706;
}
else
{
@@ -4835,7 +4835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx10xxxxx
sqcvtun. */
- return 2708;
+ return 2709;
}
}
}
@@ -4848,7 +4848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx0x
zip. */
- return 2911;
+ return 2912;
}
else
{
@@ -4856,7 +4856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx1x
uzp. */
- return 2898;
+ return 2899;
}
}
}
@@ -4868,7 +4868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx11111000xxxx1xxxxx
uqcvt. */
- return 2866;
+ return 2867;
}
else
{
@@ -4878,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx01xxxxx
uqcvt. */
- return 2867;
+ return 2868;
}
else
{
@@ -4886,7 +4886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx11xxxxx
uqcvtn. */
- return 2868;
+ return 2869;
}
}
}
@@ -4906,7 +4906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2663;
+ return 2664;
}
else
{
@@ -4914,7 +4914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx0
fmax. */
- return 2498;
+ return 2499;
}
}
else
@@ -4927,7 +4927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx0
smin. */
- return 2667;
+ return 2668;
}
else
{
@@ -4935,7 +4935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx0
srshl. */
- return 2721;
+ return 2722;
}
}
else
@@ -4944,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx0
fmaxnm. */
- return 2502;
+ return 2503;
}
}
}
@@ -4958,7 +4958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2826;
+ return 2827;
}
else
{
@@ -4966,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx1
fmin. */
- return 2506;
+ return 2507;
}
}
else
@@ -4979,7 +4979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx1
umin. */
- return 2830;
+ return 2831;
}
else
{
@@ -4987,7 +4987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx1
urshl. */
- return 2874;
+ return 2875;
}
}
else
@@ -4996,7 +4996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx1
fminnm. */
- return 2510;
+ return 2511;
}
}
}
@@ -5016,7 +5016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2662;
+ return 2663;
}
else
{
@@ -5024,7 +5024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2664;
+ return 2665;
}
}
else
@@ -5037,7 +5037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101001xx0xxxx0
fmax. */
- return 2497;
+ return 2498;
}
else
{
@@ -5045,7 +5045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111001xx0xxxx0
fmax. */
- return 2499;
+ return 2500;
}
}
else
@@ -5054,7 +5054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1x1011xx0xxxx0
add. */
- return 2451;
+ return 2452;
}
}
}
@@ -5070,7 +5070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx0
smin. */
- return 2666;
+ return 2667;
}
else
{
@@ -5078,7 +5078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx0
smin. */
- return 2668;
+ return 2669;
}
}
else
@@ -5089,7 +5089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx0
srshl. */
- return 2720;
+ return 2721;
}
else
{
@@ -5097,7 +5097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx0
srshl. */
- return 2722;
+ return 2723;
}
}
}
@@ -5109,7 +5109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx0
fmaxnm. */
- return 2501;
+ return 2502;
}
else
{
@@ -5117,7 +5117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx0
fmaxnm. */
- return 2503;
+ return 2504;
}
}
}
@@ -5134,7 +5134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx1
umax. */
- return 2825;
+ return 2826;
}
else
{
@@ -5142,7 +5142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx1
umax. */
- return 2827;
+ return 2828;
}
}
else
@@ -5153,7 +5153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx0xxxx1
fmin. */
- return 2505;
+ return 2506;
}
else
{
@@ -5161,7 +5161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx0xxxx1
fmin. */
- return 2507;
+ return 2508;
}
}
}
@@ -5177,7 +5177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx1
umin. */
- return 2829;
+ return 2830;
}
else
{
@@ -5185,7 +5185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx1
umin. */
- return 2831;
+ return 2832;
}
}
else
@@ -5196,7 +5196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx1
urshl. */
- return 2873;
+ return 2874;
}
else
{
@@ -5204,7 +5204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx1
urshl. */
- return 2875;
+ return 2876;
}
}
}
@@ -5216,7 +5216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx1
fminnm. */
- return 2509;
+ return 2510;
}
else
{
@@ -5224,7 +5224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx1
fminnm. */
- return 2511;
+ return 2512;
}
}
}
@@ -5241,7 +5241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001xxxxxxxxxx
sqdmulh. */
- return 2709;
+ return 2710;
}
else
{
@@ -5249,7 +5249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101xxxxxxxxxx
sqdmulh. */
- return 2711;
+ return 2712;
}
}
else
@@ -5260,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011xxxxxxxxxx
sqdmulh. */
- return 2710;
+ return 2711;
}
else
{
@@ -5268,7 +5268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111xxxxxxxxxx
sqdmulh. */
- return 2712;
+ return 2713;
}
}
}
@@ -5296,7 +5296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2729;
+ return 2730;
}
else
{
@@ -5304,7 +5304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2753;
+ return 2754;
}
}
else
@@ -5315,7 +5315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2745;
+ return 2746;
}
else
{
@@ -5323,7 +5323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2737;
+ return 2738;
}
}
}
@@ -5337,7 +5337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2761;
+ return 2762;
}
else
{
@@ -5345,7 +5345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2785;
+ return 2786;
}
}
else
@@ -5356,7 +5356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2777;
+ return 2778;
}
else
{
@@ -5364,7 +5364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2769;
+ return 2770;
}
}
}
@@ -5392,7 +5392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2730;
+ return 2731;
}
else
{
@@ -5400,7 +5400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2787;
+ return 2788;
}
}
else
@@ -5409,7 +5409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2754;
+ return 2755;
}
}
else
@@ -5420,7 +5420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2746;
+ return 2747;
}
else
{
@@ -5428,7 +5428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2738;
+ return 2739;
}
}
}
@@ -5442,7 +5442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2762;
+ return 2763;
}
else
{
@@ -5450,7 +5450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2786;
+ return 2787;
}
}
else
@@ -5461,7 +5461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2778;
+ return 2779;
}
else
{
@@ -5469,7 +5469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2770;
+ return 2771;
}
}
}
@@ -5511,7 +5511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2725;
+ return 2726;
}
else
{
@@ -5519,7 +5519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2726;
+ return 2727;
}
}
else
@@ -5530,7 +5530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2749;
+ return 2750;
}
else
{
@@ -5538,7 +5538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2750;
+ return 2751;
}
}
}
@@ -5552,7 +5552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2741;
+ return 2742;
}
else
{
@@ -5560,7 +5560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2742;
+ return 2743;
}
}
else
@@ -5571,7 +5571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2733;
+ return 2734;
}
else
{
@@ -5579,7 +5579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2734;
+ return 2735;
}
}
}
@@ -5596,7 +5596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2757;
+ return 2758;
}
else
{
@@ -5604,7 +5604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2758;
+ return 2759;
}
}
else
@@ -5615,7 +5615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2781;
+ return 2782;
}
else
{
@@ -5623,7 +5623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2782;
+ return 2783;
}
}
}
@@ -5637,7 +5637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2773;
+ return 2774;
}
else
{
@@ -5645,7 +5645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2774;
+ return 2775;
}
}
else
@@ -5656,7 +5656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2765;
+ return 2766;
}
else
{
@@ -5664,7 +5664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2766;
+ return 2767;
}
}
}
@@ -8066,7 +8066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2974;
+ return 2975;
}
else
{
@@ -8074,7 +8074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2982;
+ return 2983;
}
}
else
@@ -8085,7 +8085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2978;
+ return 2979;
}
else
{
@@ -8093,7 +8093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2985;
+ return 2986;
}
}
}
@@ -8131,7 +8131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 3034;
+ return 3035;
}
else
{
@@ -8139,7 +8139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3040;
+ return 3041;
}
}
else
@@ -8150,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3037;
+ return 3038;
}
else
{
@@ -8158,7 +8158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3043;
+ return 3044;
}
}
}
@@ -8172,7 +8172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3058;
+ return 3059;
}
else
{
@@ -8180,7 +8180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3064;
+ return 3065;
}
}
else
@@ -8191,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3061;
+ return 3062;
}
else
{
@@ -8199,7 +8199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3067;
+ return 3068;
}
}
}
@@ -8216,7 +8216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3046;
+ return 3047;
}
else
{
@@ -8224,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3052;
+ return 3053;
}
}
else
@@ -8235,7 +8235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3049;
+ return 3050;
}
else
{
@@ -8243,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3055;
+ return 3056;
}
}
}
@@ -8257,7 +8257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3070;
+ return 3071;
}
else
{
@@ -8265,7 +8265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3076;
+ return 3077;
}
}
else
@@ -8276,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3073;
+ return 3074;
}
else
{
@@ -8284,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3079;
+ return 3080;
}
}
}
@@ -8349,7 +8349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2975;
+ return 2976;
}
else
{
@@ -8357,7 +8357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2983;
+ return 2984;
}
}
else
@@ -8368,7 +8368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2979;
+ return 2980;
}
else
{
@@ -8376,7 +8376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2986;
+ return 2987;
}
}
}
@@ -8414,7 +8414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 3035;
+ return 3036;
}
else
{
@@ -8422,7 +8422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3041;
+ return 3042;
}
}
else
@@ -8433,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3038;
+ return 3039;
}
else
{
@@ -8441,7 +8441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3044;
+ return 3045;
}
}
}
@@ -8455,7 +8455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3059;
+ return 3060;
}
else
{
@@ -8463,7 +8463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3065;
+ return 3066;
}
}
else
@@ -8474,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3062;
+ return 3063;
}
else
{
@@ -8482,7 +8482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3068;
+ return 3069;
}
}
}
@@ -8499,7 +8499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3047;
+ return 3048;
}
else
{
@@ -8507,7 +8507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3053;
+ return 3054;
}
}
else
@@ -8518,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3050;
+ return 3051;
}
else
{
@@ -8526,7 +8526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3056;
+ return 3057;
}
}
}
@@ -8540,7 +8540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3071;
+ return 3072;
}
else
{
@@ -8548,7 +8548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3077;
+ return 3078;
}
}
else
@@ -8559,7 +8559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3074;
+ return 3075;
}
else
{
@@ -8567,7 +8567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3080;
+ return 3081;
}
}
}
@@ -8635,7 +8635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2977;
+ return 2978;
}
else
{
@@ -8643,7 +8643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2984;
+ return 2985;
}
}
else
@@ -8652,7 +8652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2981;
+ return 2982;
}
}
else
@@ -8663,7 +8663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2976;
+ return 2977;
}
else
{
@@ -8671,7 +8671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2980;
+ return 2981;
}
}
}
@@ -8733,7 +8733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 3036;
+ return 3037;
}
else
{
@@ -8741,7 +8741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3130;
+ return 3131;
}
}
else
@@ -8752,7 +8752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3042;
+ return 3043;
}
else
{
@@ -8760,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3132;
+ return 3133;
}
}
}
@@ -8774,7 +8774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3039;
+ return 3040;
}
else
{
@@ -8782,7 +8782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3131;
+ return 3132;
}
}
else
@@ -8791,7 +8791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3045;
+ return 3046;
}
}
}
@@ -8807,7 +8807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3060;
+ return 3061;
}
else
{
@@ -8815,7 +8815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3136;
+ return 3137;
}
}
else
@@ -8826,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3066;
+ return 3067;
}
else
{
@@ -8834,7 +8834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3138;
+ return 3139;
}
}
}
@@ -8848,7 +8848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3063;
+ return 3064;
}
else
{
@@ -8856,7 +8856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3137;
+ return 3138;
}
}
else
@@ -8865,7 +8865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3069;
+ return 3070;
}
}
}
@@ -8884,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3048;
+ return 3049;
}
else
{
@@ -8892,7 +8892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3133;
+ return 3134;
}
}
else
@@ -8903,7 +8903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3054;
+ return 3055;
}
else
{
@@ -8911,7 +8911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3135;
+ return 3136;
}
}
}
@@ -8925,7 +8925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3051;
+ return 3052;
}
else
{
@@ -8933,7 +8933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3134;
+ return 3135;
}
}
else
@@ -8942,7 +8942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3057;
+ return 3058;
}
}
}
@@ -8958,7 +8958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3072;
+ return 3073;
}
else
{
@@ -8966,7 +8966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3139;
+ return 3140;
}
}
else
@@ -8977,7 +8977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3078;
+ return 3079;
}
else
{
@@ -8985,7 +8985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3141;
+ return 3142;
}
}
}
@@ -8999,7 +8999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3075;
+ return 3076;
}
else
{
@@ -9007,7 +9007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3140;
+ return 3141;
}
}
else
@@ -9016,7 +9016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3081;
+ return 3082;
}
}
}
@@ -9389,7 +9389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3159;
+ return 3160;
}
else
{
@@ -9407,7 +9407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3162;
+ return 3163;
}
}
}
@@ -9487,7 +9487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2972;
+ return 2973;
}
else
{
@@ -9495,7 +9495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2973;
+ return 2974;
}
}
else
@@ -9602,7 +9602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3164;
+ return 3165;
}
}
}
@@ -9618,7 +9618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3161;
+ return 3162;
}
else
{
@@ -9663,7 +9663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2971;
+ return 2972;
}
else
{
@@ -9757,7 +9757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3163;
+ return 3164;
}
}
}
@@ -9887,7 +9887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3165;
+ return 3166;
}
}
}
@@ -9903,7 +9903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3160;
+ return 3161;
}
else
{
@@ -10745,7 +10745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2991;
+ return 2992;
}
}
}
@@ -10819,7 +10819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2992;
+ return 2993;
}
}
}
@@ -12242,7 +12242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x0xxxxx110x10xxxxxxxxxx
sdot. */
- return 2427;
+ return 2428;
}
else
{
@@ -12250,7 +12250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx110x10xxxxxxxxxx
sdot. */
- return 2426;
+ return 2427;
}
}
}
@@ -12272,7 +12272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x0xxxxx110x11xxxxxxxxxx
udot. */
- return 2433;
+ return 2434;
}
else
{
@@ -12280,7 +12280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx110x11xxxxxxxxxx
udot. */
- return 2432;
+ return 2433;
}
}
}
@@ -13537,7 +13537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2990;
+ return 2991;
}
}
}
@@ -15241,7 +15241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 3019;
+ return 3020;
}
}
else
@@ -15484,7 +15484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2995;
+ return 2996;
}
else
{
@@ -15492,7 +15492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2996;
+ return 2997;
}
}
else
@@ -15735,7 +15735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 3016;
+ return 3017;
}
else
{
@@ -15756,7 +15756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 3023;
+ return 3024;
}
else
{
@@ -15764,7 +15764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 3022;
+ return 3023;
}
}
else
@@ -15830,7 +15830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 3015;
+ return 3016;
}
else
{
@@ -15842,7 +15842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 3021;
+ return 3022;
}
else
{
@@ -15850,7 +15850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 3020;
+ return 3021;
}
}
else
@@ -15901,7 +15901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2999;
+ return 3000;
}
else
{
@@ -15909,7 +15909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 3000;
+ return 3001;
}
}
else
@@ -16091,33 +16091,44 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 15) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x11001x00x1xxxxx001xxxxxxxxxxxxx
- fmul. */
- return 1467;
- }
- else
+ if (((word >> 10) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- x11001x0101xxxxx001xxxxxxxxxxxxx
+ x11001x00x1xxxxx001xx0xxxxxxxxxx
fmul. */
- return 1468;
+ return 1467;
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x11001x0111xxxxx001xxxxxxxxxxxxx
- fmul. */
- return 1469;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x11001x0101xxxxx001xx0xxxxxxxxxx
+ fmul. */
+ return 1468;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x11001x0111xxxxx001xx0xxxxxxxxxx
+ fmul. */
+ return 1469;
+ }
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x11001x0xx1xxxxx001xx1xxxxxxxxxx
+ fclamp. */
+ return 2426;
+ }
}
else
{
@@ -16312,7 +16323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2993;
+ return 2994;
}
else
{
@@ -16345,7 +16356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 3017;
+ return 3018;
}
else
{
@@ -16375,7 +16386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2994;
+ return 2995;
}
else
{
@@ -16504,7 +16515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 3003;
+ return 3004;
}
else
{
@@ -16514,7 +16525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 3005;
+ return 3006;
}
else
{
@@ -16522,7 +16533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 3007;
+ return 3008;
}
}
}
@@ -16534,7 +16545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 3004;
+ return 3005;
}
else
{
@@ -16544,7 +16555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 3006;
+ return 3007;
}
else
{
@@ -16552,7 +16563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 3008;
+ return 3009;
}
}
}
@@ -17571,7 +17582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x11x1xxxxx000xxxxxxxxxxxxx
sqrshrun. */
- return 2431;
+ return 2432;
}
}
}
@@ -17622,7 +17633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2987;
+ return 2988;
}
else
{
@@ -17630,7 +17641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2989;
+ return 2990;
}
}
else
@@ -17639,7 +17650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2988;
+ return 2989;
}
}
}
@@ -17864,7 +17875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxx1010000xxxxxxxxxx
sqcvtn. */
- return 2428;
+ return 2429;
}
}
else
@@ -17883,7 +17894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxx1010100xxxxxxxxxx
sqcvtun. */
- return 2429;
+ return 2430;
}
}
}
@@ -17903,7 +17914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxx1010x10xxxxxxxxxx
uqcvtn. */
- return 2434;
+ return 2435;
}
}
}
@@ -18329,7 +18340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x11x1xxxxx0010xxxxxxxxxxxx
sqrshrn. */
- return 2430;
+ return 2431;
}
else
{
@@ -18337,7 +18348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x11x1xxxxx0011xxxxxxxxxxxx
uqrshrn. */
- return 2435;
+ return 2436;
}
}
}
@@ -19190,7 +19201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2997;
+ return 2998;
}
else
{
@@ -19198,7 +19209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2998;
+ return 2999;
}
}
}
@@ -19572,7 +19583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 3001;
+ return 3002;
}
else
{
@@ -19580,7 +19591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 3002;
+ return 3003;
}
}
}
@@ -19941,7 +19952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2899;
+ return 2900;
}
else
{
@@ -19949,7 +19960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2900;
+ return 2901;
}
}
else
@@ -19962,7 +19973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx0
whilege. */
- return 2436;
+ return 2437;
}
else
{
@@ -19970,7 +19981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx1
whilegt. */
- return 2437;
+ return 2438;
}
}
else
@@ -19979,7 +19990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2640;
+ return 2641;
}
}
}
@@ -19993,7 +20004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2902;
+ return 2903;
}
else
{
@@ -20001,7 +20012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2901;
+ return 2902;
}
}
else
@@ -20014,7 +20025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx0
whilehs. */
- return 2439;
+ return 2440;
}
else
{
@@ -20022,7 +20033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx1
whilehi. */
- return 2438;
+ return 2439;
}
}
else
@@ -20031,7 +20042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2642;
+ return 2643;
}
}
}
@@ -20048,7 +20059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2906;
+ return 2907;
}
else
{
@@ -20056,7 +20067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2903;
+ return 2904;
}
}
else
@@ -20069,7 +20080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx0
whilelt. */
- return 2443;
+ return 2444;
}
else
{
@@ -20077,7 +20088,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx1
whilele. */
- return 2440;
+ return 2441;
}
}
else
@@ -20086,7 +20097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2641;
+ return 2642;
}
}
}
@@ -20100,7 +20111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2904;
+ return 2905;
}
else
{
@@ -20108,7 +20119,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2905;
+ return 2906;
}
}
else
@@ -20119,7 +20130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx0
whilelo. */
- return 2441;
+ return 2442;
}
else
{
@@ -20127,7 +20138,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx1
whilels. */
- return 2442;
+ return 2443;
}
}
}
@@ -21234,7 +21245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 3018;
+ return 3019;
}
}
else
@@ -21893,7 +21904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2479;
+ return 2480;
}
}
else
@@ -22595,7 +22606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3154;
+ return 3155;
}
else
{
@@ -23175,7 +23186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3082;
+ return 3083;
}
else
{
@@ -23183,7 +23194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3084;
+ return 3085;
}
}
else
@@ -23194,7 +23205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3088;
+ return 3089;
}
else
{
@@ -23202,7 +23213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3090;
+ return 3091;
}
}
}
@@ -23216,7 +23227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3085;
+ return 3086;
}
else
{
@@ -23224,7 +23235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3087;
+ return 3088;
}
}
else
@@ -23235,7 +23246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3091;
+ return 3092;
}
else
{
@@ -23243,7 +23254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3093;
+ return 3094;
}
}
}
@@ -23260,7 +23271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3106;
+ return 3107;
}
else
{
@@ -23268,7 +23279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3108;
+ return 3109;
}
}
else
@@ -23279,7 +23290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3112;
+ return 3113;
}
else
{
@@ -23287,7 +23298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3114;
+ return 3115;
}
}
}
@@ -23301,7 +23312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3109;
+ return 3110;
}
else
{
@@ -23309,7 +23320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3111;
+ return 3112;
}
}
else
@@ -23320,7 +23331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3115;
+ return 3116;
}
else
{
@@ -23328,7 +23339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3117;
+ return 3118;
}
}
}
@@ -23348,7 +23359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3094;
+ return 3095;
}
else
{
@@ -23356,7 +23367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3096;
+ return 3097;
}
}
else
@@ -23367,7 +23378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3100;
+ return 3101;
}
else
{
@@ -23375,7 +23386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3102;
+ return 3103;
}
}
}
@@ -23389,7 +23400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3097;
+ return 3098;
}
else
{
@@ -23397,7 +23408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3099;
+ return 3100;
}
}
else
@@ -23408,7 +23419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3103;
+ return 3104;
}
else
{
@@ -23416,7 +23427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3105;
+ return 3106;
}
}
}
@@ -23433,7 +23444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3118;
+ return 3119;
}
else
{
@@ -23441,7 +23452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3120;
+ return 3121;
}
}
else
@@ -23452,7 +23463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3124;
+ return 3125;
}
else
{
@@ -23460,7 +23471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3126;
+ return 3127;
}
}
}
@@ -23474,7 +23485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3121;
+ return 3122;
}
else
{
@@ -23482,7 +23493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3123;
+ return 3124;
}
}
else
@@ -23493,7 +23504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3127;
+ return 3128;
}
else
{
@@ -23501,7 +23512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3129;
+ return 3130;
}
}
}
@@ -23535,7 +23546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3083;
+ return 3084;
}
else
{
@@ -23543,7 +23554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3142;
+ return 3143;
}
}
else
@@ -23554,7 +23565,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3089;
+ return 3090;
}
else
{
@@ -23562,7 +23573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3144;
+ return 3145;
}
}
}
@@ -23576,7 +23587,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3086;
+ return 3087;
}
else
{
@@ -23584,7 +23595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3143;
+ return 3144;
}
}
else
@@ -23593,7 +23604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3092;
+ return 3093;
}
}
}
@@ -23609,7 +23620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3107;
+ return 3108;
}
else
{
@@ -23617,7 +23628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3148;
+ return 3149;
}
}
else
@@ -23628,7 +23639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3113;
+ return 3114;
}
else
{
@@ -23636,7 +23647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3150;
+ return 3151;
}
}
}
@@ -23650,7 +23661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3110;
+ return 3111;
}
else
{
@@ -23658,7 +23669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3149;
+ return 3150;
}
}
else
@@ -23667,7 +23678,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3116;
+ return 3117;
}
}
}
@@ -23686,7 +23697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3095;
+ return 3096;
}
else
{
@@ -23694,7 +23705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3145;
+ return 3146;
}
}
else
@@ -23705,7 +23716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3101;
+ return 3102;
}
else
{
@@ -23713,7 +23724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3147;
+ return 3148;
}
}
}
@@ -23727,7 +23738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3098;
+ return 3099;
}
else
{
@@ -23735,7 +23746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3146;
+ return 3147;
}
}
else
@@ -23744,7 +23755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3104;
+ return 3105;
}
}
}
@@ -23760,7 +23771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3119;
+ return 3120;
}
else
{
@@ -23768,7 +23779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3151;
+ return 3152;
}
}
else
@@ -23779,7 +23790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3125;
+ return 3126;
}
else
{
@@ -23787,7 +23798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3153;
+ return 3154;
}
}
}
@@ -23801,7 +23812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3122;
+ return 3123;
}
else
{
@@ -23809,7 +23820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3152;
+ return 3153;
}
}
else
@@ -23818,7 +23829,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3128;
+ return 3129;
}
}
}
@@ -23985,7 +23996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 3009;
+ return 3010;
}
}
}
@@ -24018,7 +24029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2935;
+ return 2936;
}
}
else
@@ -24092,7 +24103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 3011;
+ return 3012;
}
}
}
@@ -24125,7 +24136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 3012;
+ return 3013;
}
}
else
@@ -24172,7 +24183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2942;
+ return 2943;
}
else
{
@@ -24180,7 +24191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2944;
+ return 2945;
}
}
else
@@ -24191,7 +24202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2946;
+ return 2947;
}
else
{
@@ -24205,7 +24216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2947;
+ return 2948;
}
else
{
@@ -24213,7 +24224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2940;
+ return 2941;
}
}
else
@@ -24222,7 +24233,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2949;
+ return 2950;
}
}
else
@@ -24235,7 +24246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2948;
+ return 2949;
}
else
{
@@ -24243,7 +24254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2953;
+ return 2954;
}
}
else
@@ -24252,7 +24263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2950;
+ return 2951;
}
}
}
@@ -24433,7 +24444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2934;
+ return 2935;
}
}
else
@@ -24464,7 +24475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 3010;
+ return 3011;
}
else
{
@@ -24483,7 +24494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 3026;
+ return 3027;
}
else
{
@@ -24493,7 +24504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 3024;
+ return 3025;
}
else
{
@@ -24503,7 +24514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 3031;
+ return 3032;
}
else
{
@@ -24511,7 +24522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 3030;
+ return 3031;
}
}
}
@@ -25095,7 +25106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 3027;
+ return 3028;
}
else
{
@@ -25103,7 +25114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 3028;
+ return 3029;
}
}
}
@@ -25421,7 +25432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2945;
+ return 2946;
}
}
else
@@ -26032,7 +26043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2938;
+ return 2939;
}
}
}
@@ -26084,7 +26095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2951;
+ return 2952;
}
}
}
@@ -26327,7 +26338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2941;
+ return 2942;
}
}
else
@@ -26403,7 +26414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2954;
+ return 2955;
}
}
else
@@ -27229,7 +27240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2939;
+ return 2940;
}
}
else
@@ -27261,7 +27272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2952;
+ return 2953;
}
}
else
@@ -27501,7 +27512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2943;
+ return 2944;
}
}
else
@@ -27533,7 +27544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2957;
+ return 2958;
}
else
{
@@ -27541,7 +27552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2961;
+ return 2962;
}
}
}
@@ -27563,7 +27574,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2958;
+ return 2959;
}
else
{
@@ -27571,7 +27582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2962;
+ return 2963;
}
}
}
@@ -27610,7 +27621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2955;
+ return 2956;
}
else
{
@@ -27618,7 +27629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2959;
+ return 2960;
}
}
else
@@ -27640,7 +27651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2956;
+ return 2957;
}
else
{
@@ -27648,7 +27659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2960;
+ return 2961;
}
}
else
@@ -29456,7 +29467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2963;
+ return 2964;
}
else
{
@@ -29464,7 +29475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2967;
+ return 2968;
}
}
else
@@ -29486,7 +29497,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2964;
+ return 2965;
}
else
{
@@ -29494,7 +29505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2968;
+ return 2969;
}
}
else
@@ -30000,7 +30011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2965;
+ return 2966;
}
else
{
@@ -30008,7 +30019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2969;
+ return 2970;
}
}
}
@@ -30030,7 +30041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2966;
+ return 2967;
}
else
{
@@ -30038,7 +30049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2970;
+ return 2971;
}
}
}
@@ -30094,7 +30105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2937;
+ return 2938;
}
else
{
@@ -30102,7 +30113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2936;
+ return 2937;
}
}
}
@@ -30205,7 +30216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 3014;
+ return 3015;
}
else
{
@@ -30213,7 +30224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 3013;
+ return 3014;
}
}
else
@@ -30224,7 +30235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 3025;
+ return 3026;
}
else
{
@@ -30234,7 +30245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 3033;
+ return 3034;
}
else
{
@@ -30242,7 +30253,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 3032;
+ return 3033;
}
}
}
@@ -30733,14 +30744,6 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2628: value = 2636; break; /* mov --> mova. */
- case 2636: return NULL; /* mova --> NULL. */
- case 2624: value = 2632; break; /* mov --> mova. */
- case 2632: return NULL; /* mova --> NULL. */
- case 2626: value = 2634; break; /* mov --> mova. */
- case 2634: return NULL; /* mova --> NULL. */
- case 2622: value = 2630; break; /* mov --> mova. */
- case 2630: return NULL; /* mova --> NULL. */
case 2629: value = 2637; break; /* mov --> mova. */
case 2637: return NULL; /* mova --> NULL. */
case 2625: value = 2633; break; /* mov --> mova. */
@@ -30749,6 +30752,14 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2635: return NULL; /* mova --> NULL. */
case 2623: value = 2631; break; /* mov --> mova. */
case 2631: return NULL; /* mova --> NULL. */
+ case 2630: value = 2638; break; /* mov --> mova. */
+ case 2638: return NULL; /* mova --> NULL. */
+ case 2626: value = 2634; break; /* mov --> mova. */
+ case 2634: return NULL; /* mova --> NULL. */
+ case 2628: value = 2636; break; /* mov --> mova. */
+ case 2636: return NULL; /* mova --> NULL. */
+ case 2624: value = 2632; break; /* mov --> mova. */
+ case 2632: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -30770,11 +30781,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3155; break; /* addg --> smax. */
- case 3155: value = 3156; break; /* smax --> umax. */
- case 3156: value = 3157; break; /* umax --> smin. */
- case 3157: value = 3158; break; /* smin --> umin. */
- case 3158: return NULL; /* umin --> NULL. */
+ case 19: value = 3156; break; /* addg --> smax. */
+ case 3156: value = 3157; break; /* smax --> umax. */
+ case 3157: value = 3158; break; /* umax --> smin. */
+ case 3158: value = 3159; break; /* smin --> umin. */
+ case 3159: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30932,8 +30943,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 3029; break; /* fcvt --> bfcvt. */
- case 3029: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3030; break; /* fcvt --> bfcvt. */
+ case 3030: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 265aaa7e4ba..2b813123d4a 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5366,6 +5366,7 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME2_INSNC ("bfmlslt", 0x64e0a400, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("fdot", 0x64204000, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_19_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("fdot", 0x64208000, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
+ SME2_INSNC ("fclamp", 0x64202400, 0xff20fc00, sme_size_22_hsd, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_HSD, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("sdot", 0x4480c800, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_19_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("sdot", 0x4400c800, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSN ("sqcvtn", 0x45314000, 0xfffffc20, sve_misc, 0, OP2 (SVE_Zd, SME_Znx2), OP_SVE_HS, 0, 0),
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* [PATCH 31/31] aarch64: Add the RPRFM instruction
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (29 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 30/31] aarch64: Add the SVE FCLAMP instruction Richard Sandiford
@ 2023-03-30 10:26 ` Richard Sandiford
2023-04-02 9:35 ` [PATCH 00/31] aarch64: Add SME2 support Jan Beulich
2023-04-03 7:16 ` Jan Beulich
32 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-03-30 10:26 UTC (permalink / raw)
To: binutils; +Cc: Richard Sandiford
This patch adds the RPRFM (range prefetch) instruction.
It was introduced as part of SME2, but it belongs to the
prefetch hint space and so doesn't require any specific
ISA flags.
The aarch64_rprfmop_array initialiser (deliberately) only
fills in the leading non-null elements.
---
gas/config/tc-aarch64.c | 5 +
gas/testsuite/gas/aarch64/rprfm-1-invalid.d | 3 +
gas/testsuite/gas/aarch64/rprfm-1-invalid.l | 11 +
gas/testsuite/gas/aarch64/rprfm-1-invalid.s | 9 +
gas/testsuite/gas/aarch64/rprfm-1.d | 83 +
gas/testsuite/gas/aarch64/rprfm-1.s | 74 +
gas/testsuite/gas/aarch64/system.d | 2 +-
include/opcode/aarch64.h | 2 +
opcodes/aarch64-asm-2.c | 137 +-
opcodes/aarch64-dis-2.c | 1637 ++++++++++---------
opcodes/aarch64-opc-2.c | 1 +
opcodes/aarch64-opc.c | 23 +
opcodes/aarch64-opc.h | 1 +
opcodes/aarch64-tbl.h | 11 +
14 files changed, 1113 insertions(+), 886 deletions(-)
create mode 100644 gas/testsuite/gas/aarch64/rprfm-1-invalid.d
create mode 100644 gas/testsuite/gas/aarch64/rprfm-1-invalid.l
create mode 100644 gas/testsuite/gas/aarch64/rprfm-1-invalid.s
create mode 100644 gas/testsuite/gas/aarch64/rprfm-1.d
create mode 100644 gas/testsuite/gas/aarch64/rprfm-1.s
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 5aa51400c03..747cf37d4b8 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -7773,6 +7773,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
inst.base.operands[i].prfop = aarch64_prfops + val;
break;
+ case AARCH64_OPND_RPRFMOP:
+ po_enum_or_fail (aarch64_rprfmop_array);
+ info->imm.value = val;
+ break;
+
case AARCH64_OPND_BARRIER_PSB:
val = parse_barrier_psb (&str, &(info->hint_option));
if (val == PARSE_FAIL)
diff --git a/gas/testsuite/gas/aarch64/rprfm-1-invalid.d b/gas/testsuite/gas/aarch64/rprfm-1-invalid.d
new file mode 100644
index 00000000000..c2e8e15ae2d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rprfm-1-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: rprfm-1-invalid.s
+#error_output: rprfm-1-invalid.l
diff --git a/gas/testsuite/gas/aarch64/rprfm-1-invalid.l b/gas/testsuite/gas/aarch64/rprfm-1-invalid.l
new file mode 100644
index 00000000000..0bd14c2efcb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rprfm-1-invalid.l
@@ -0,0 +1,11 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `rprfm pldkeep,0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `rprfm pldkeep,x0,0'
+[^ :]+:[0-9]+: Error: operand 1 must be a range prefetch operation specifier -- `rprfm pldl1keep,x0,\[x0\]'
+[^ :]+:[0-9]+: Error: operand 1 must be a range prefetch operation specifier -- `rprfm #-1,x0,\[x0\]'
+[^ :]+:[0-9]+: Error: operand 1 must be a range prefetch operation specifier -- `rprfm #64,x0,\[x0\]'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `rprfm #1,sp,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `rprfm #1,w0,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: rprfm pstkeep, x0, \[x0\]
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `rprfm #1,x0,\[xzr\]'
diff --git a/gas/testsuite/gas/aarch64/rprfm-1-invalid.s b/gas/testsuite/gas/aarch64/rprfm-1-invalid.s
new file mode 100644
index 00000000000..80cb3b814e7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rprfm-1-invalid.s
@@ -0,0 +1,9 @@
+ rprfm pldkeep, 0, [x0]
+ rprfm pldkeep, x0, 0
+
+ rprfm pldl1keep, x0, [x0]
+ rprfm #-1, x0, [x0]
+ rprfm #64, x0, [x0]
+ rprfm #1, sp, [x0]
+ rprfm #1, w0, [x0]
+ rprfm #1, x0, [xzr]
diff --git a/gas/testsuite/gas/aarch64/rprfm-1.d b/gas/testsuite/gas/aarch64/rprfm-1.d
new file mode 100644
index 00000000000..c2dc0c0c30f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rprfm-1.d
@@ -0,0 +1,83 @@
+#as: -march=armv8-a
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: f8a04818 rprfm pldkeep, x0, \[x0\]
+[^:]+: f8a0481c rprfm pldstrm, x0, \[x0\]
+[^:]+: f8a04819 rprfm pstkeep, x0, \[x0\]
+[^:]+: f8a0481d rprfm pststrm, x0, \[x0\]
+[^:]+: f8a04818 rprfm pldkeep, x0, \[x0\]
+[^:]+: f8a04819 rprfm pstkeep, x0, \[x0\]
+[^:]+: f8a0481a rprfm #2, x0, \[x0\]
+[^:]+: f8a0481b rprfm #3, x0, \[x0\]
+[^:]+: f8a0481c rprfm pldstrm, x0, \[x0\]
+[^:]+: f8a0481d rprfm pststrm, x0, \[x0\]
+[^:]+: f8a0481e rprfm #6, x0, \[x0\]
+[^:]+: f8a0481f rprfm #7, x0, \[x0\]
+[^:]+: f8a05818 rprfm #8, x0, \[x0\]
+[^:]+: f8a05819 rprfm #9, x0, \[x0\]
+[^:]+: f8a0581a rprfm #10, x0, \[x0\]
+[^:]+: f8a0581b rprfm #11, x0, \[x0\]
+[^:]+: f8a0581c rprfm #12, x0, \[x0\]
+[^:]+: f8a0581d rprfm #13, x0, \[x0\]
+[^:]+: f8a0581e rprfm #14, x0, \[x0\]
+[^:]+: f8a0581f rprfm #15, x0, \[x0\]
+[^:]+: f8a06818 rprfm #16, x0, \[x0\]
+[^:]+: f8a06819 rprfm #17, x0, \[x0\]
+[^:]+: f8a0681a rprfm #18, x0, \[x0\]
+[^:]+: f8a0681b rprfm #19, x0, \[x0\]
+[^:]+: f8a0681c rprfm #20, x0, \[x0\]
+[^:]+: f8a0681d rprfm #21, x0, \[x0\]
+[^:]+: f8a0681e rprfm #22, x0, \[x0\]
+[^:]+: f8a0681f rprfm #23, x0, \[x0\]
+[^:]+: f8a07818 rprfm #24, x0, \[x0\]
+[^:]+: f8a07819 rprfm #25, x0, \[x0\]
+[^:]+: f8a0781a rprfm #26, x0, \[x0\]
+[^:]+: f8a0781b rprfm #27, x0, \[x0\]
+[^:]+: f8a0781c rprfm #28, x0, \[x0\]
+[^:]+: f8a0781d rprfm #29, x0, \[x0\]
+[^:]+: f8a0781e rprfm #30, x0, \[x0\]
+[^:]+: f8a0781f rprfm #31, x0, \[x0\]
+[^:]+: f8a0c818 rprfm #32, x0, \[x0\]
+[^:]+: f8a0c819 rprfm #33, x0, \[x0\]
+[^:]+: f8a0c81a rprfm #34, x0, \[x0\]
+[^:]+: f8a0c81b rprfm #35, x0, \[x0\]
+[^:]+: f8a0c81c rprfm #36, x0, \[x0\]
+[^:]+: f8a0c81d rprfm #37, x0, \[x0\]
+[^:]+: f8a0c81e rprfm #38, x0, \[x0\]
+[^:]+: f8a0c81f rprfm #39, x0, \[x0\]
+[^:]+: f8a0d818 rprfm #40, x0, \[x0\]
+[^:]+: f8a0d818 rprfm #40, x0, \[x0\]
+[^:]+: f8a0d819 rprfm #41, x0, \[x0\]
+[^:]+: f8a0d81a rprfm #42, x0, \[x0\]
+[^:]+: f8a0d81b rprfm #43, x0, \[x0\]
+[^:]+: f8a0d81c rprfm #44, x0, \[x0\]
+[^:]+: f8a0d81d rprfm #45, x0, \[x0\]
+[^:]+: f8a0d81e rprfm #46, x0, \[x0\]
+[^:]+: f8a0d81f rprfm #47, x0, \[x0\]
+[^:]+: f8a0e818 rprfm #48, x0, \[x0\]
+[^:]+: f8a0e819 rprfm #49, x0, \[x0\]
+[^:]+: f8a0e81a rprfm #50, x0, \[x0\]
+[^:]+: f8a0e81b rprfm #51, x0, \[x0\]
+[^:]+: f8a0e81c rprfm #52, x0, \[x0\]
+[^:]+: f8a0e81d rprfm #53, x0, \[x0\]
+[^:]+: f8a0e81e rprfm #54, x0, \[x0\]
+[^:]+: f8a0e81f rprfm #55, x0, \[x0\]
+[^:]+: f8a0f818 rprfm #56, x0, \[x0\]
+[^:]+: f8a0f819 rprfm #57, x0, \[x0\]
+[^:]+: f8a0f81a rprfm #58, x0, \[x0\]
+[^:]+: f8a0f81b rprfm #59, x0, \[x0\]
+[^:]+: f8a0f81c rprfm #60, x0, \[x0\]
+[^:]+: f8a0f81d rprfm #61, x0, \[x0\]
+[^:]+: f8a0f81e rprfm #62, x0, \[x0\]
+[^:]+: f8a0f81f rprfm #63, x0, \[x0\]
+[^:]+: f8be4818 rprfm pldkeep, x30, \[x0\]
+[^:]+: f8bf4818 rprfm pldkeep, xzr, \[x0\]
+[^:]+: f8a04bd8 rprfm pldkeep, x0, \[x30\]
+[^:]+: f8a04bf8 rprfm pldkeep, x0, \[sp\]
+[^:]+: f8b5cb7f rprfm #39, x21, \[x27\]
diff --git a/gas/testsuite/gas/aarch64/rprfm-1.s b/gas/testsuite/gas/aarch64/rprfm-1.s
new file mode 100644
index 00000000000..0f03dcbf048
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rprfm-1.s
@@ -0,0 +1,74 @@
+ rprfm pldkeep, x0, [x0]
+ rprfm pldstrm, x0, [x0]
+ rprfm pstkeep, x0, [x0]
+ rprfm pststrm, x0, [x0]
+ rprfm #0, x0, [x0]
+ rprfm #1, x0, [x0]
+ rprfm #2, x0, [x0]
+ rprfm #3, x0, [x0]
+ rprfm #4, x0, [x0]
+ rprfm #5, x0, [x0]
+ rprfm #6, x0, [x0]
+ rprfm #7, x0, [x0]
+ rprfm #8, x0, [x0]
+ rprfm #9, x0, [x0]
+ rprfm #10, x0, [x0]
+ rprfm #11, x0, [x0]
+ rprfm #12, x0, [x0]
+ rprfm #13, x0, [x0]
+ rprfm #14, x0, [x0]
+ rprfm #15, x0, [x0]
+ rprfm #16, x0, [x0]
+ rprfm #17, x0, [x0]
+ rprfm #18, x0, [x0]
+ rprfm #19, x0, [x0]
+ rprfm #20, x0, [x0]
+ rprfm #21, x0, [x0]
+ rprfm #22, x0, [x0]
+ rprfm #23, x0, [x0]
+ rprfm #24, x0, [x0]
+ rprfm #25, x0, [x0]
+ rprfm #26, x0, [x0]
+ rprfm #27, x0, [x0]
+ rprfm #28, x0, [x0]
+ rprfm #29, x0, [x0]
+ rprfm #30, x0, [x0]
+ rprfm #31, x0, [x0]
+ rprfm #32, x0, [x0]
+ rprfm #33, x0, [x0]
+ rprfm #34, x0, [x0]
+ rprfm #35, x0, [x0]
+ rprfm #36, x0, [x0]
+ rprfm #37, x0, [x0]
+ rprfm #38, x0, [x0]
+ rprfm #39, x0, [x0]
+ rprfm #40, x0, [x0]
+ rprfm #40, x0, [x0]
+ rprfm #41, x0, [x0]
+ rprfm #42, x0, [x0]
+ rprfm #43, x0, [x0]
+ rprfm #44, x0, [x0]
+ rprfm #45, x0, [x0]
+ rprfm #46, x0, [x0]
+ rprfm #47, x0, [x0]
+ rprfm #48, x0, [x0]
+ rprfm #49, x0, [x0]
+ rprfm #50, x0, [x0]
+ rprfm #51, x0, [x0]
+ rprfm #52, x0, [x0]
+ rprfm #53, x0, [x0]
+ rprfm #54, x0, [x0]
+ rprfm #55, x0, [x0]
+ rprfm #56, x0, [x0]
+ rprfm #57, x0, [x0]
+ rprfm #58, x0, [x0]
+ rprfm #59, x0, [x0]
+ rprfm #60, x0, [x0]
+ rprfm #61, x0, [x0]
+ rprfm #62, x0, [x0]
+ rprfm #63, x0, [x0]
+ rprfm #0, x30, [x0]
+ rprfm #0, xzr, [x0]
+ rprfm #0, x0, [x30]
+ rprfm #0, x0, [sp]
+ rprfm #39, x21, [x27]
diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
index 7e4bafbf1ff..6e993ec9e59 100644
--- a/gas/testsuite/gas/aarch64/system.d
+++ b/gas/testsuite/gas/aarch64/system.d
@@ -371,4 +371,4 @@ Disassembly of section \.text:
.*: f9800c74 prfm pstl3keep, \[x3, #24\]
.*: f9800c75 prfm pstl3strm, \[x3, #24\]
.*: f8a04817 prfm #0x17, \[x0, w0, uxtw\]
-.*: f8a04818 \.inst 0xf8a04818 ; undefined
+.*: f8a04818 rprfm pldkeep, x0, \[x0\]
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index e179e484b9a..01c8ca18bf3 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -371,6 +371,7 @@ enum aarch64_opnd
AARCH64_OPND_BARRIER_DSB_NXS, /* Barrier operand for DSB nXS variant. */
AARCH64_OPND_BARRIER_ISB, /* Barrier operand for ISB. */
AARCH64_OPND_PRFOP, /* Prefetch operation. */
+ AARCH64_OPND_RPRFMOP, /* Range prefetch operation. */
AARCH64_OPND_BARRIER_PSB, /* Barrier operand for PSB. */
AARCH64_OPND_BTI_TARGET, /* BTI {<target>}. */
AARCH64_OPND_SVE_ADDR_RI_S4x16, /* SVE [<Xn|SP>, #<simm4>*16]. */
@@ -1600,6 +1601,7 @@ aarch64_verbose (const char *, ...) __attribute__ ((format (printf, 1, 2)));
extern const char *const aarch64_sve_pattern_array[32];
extern const char *const aarch64_sve_prfop_array[16];
+extern const char *const aarch64_rprfmop_array[64];
extern const char *const aarch64_sme_vlxn_array[2];
#ifdef __cplusplus
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 1ea3da1aa21..9425a2710b1 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -642,7 +642,6 @@ aarch64_insert_operand (const aarch64_operand *self,
case 29:
case 30:
case 31:
- case 167:
case 168:
case 169:
case 170:
@@ -656,7 +655,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 178:
case 179:
case 180:
- case 195:
+ case 181:
case 196:
case 197:
case 198:
@@ -665,15 +664,16 @@ aarch64_insert_operand (const aarch64_operand *self,
case 201:
case 202:
case 203:
- case 210:
- case 213:
- case 217:
- case 224:
+ case 204:
+ case 211:
+ case 214:
+ case 218:
case 225:
- case 232:
+ case 226:
case 233:
case 234:
case 235:
+ case 236:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -685,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 271:
+ case 272:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -720,9 +720,9 @@ aarch64_insert_operand (const aarch64_operand *self,
case 82:
case 83:
case 84:
- case 164:
- case 166:
- case 187:
+ case 108:
+ case 165:
+ case 167:
case 188:
case 189:
case 190:
@@ -730,13 +730,14 @@ aarch64_insert_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 238:
- case 265:
+ case 195:
+ case 239:
case 266:
- case 268:
- case 270:
- case 275:
+ case 267:
+ case 269:
+ case 271:
case 276:
+ case 277:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -746,10 +747,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 48:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
case 52:
- case 154:
+ case 155:
return aarch64_ins_fpimm (self, info, code, inst, errors);
case 70:
- case 162:
+ case 163:
return aarch64_ins_limm (self, info, code, inst, errors);
case 71:
return aarch64_ins_aimm (self, info, code, inst, errors);
@@ -759,11 +760,11 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_fbits (self, info, code, inst, errors);
case 75:
case 76:
- case 159:
+ case 160:
return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
case 77:
- case 158:
- case 160:
+ case 159:
+ case 161:
return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
case 78:
case 79:
@@ -804,30 +805,29 @@ aarch64_insert_operand (const aarch64_operand *self,
return aarch64_ins_barrier_dsb_nxs (self, info, code, inst, errors);
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
- case 108:
- case 267:
- case 269:
- return aarch64_ins_none (self, info, code, inst, errors);
case 109:
- return aarch64_ins_hint (self, info, code, inst, errors);
+ case 268:
+ case 270:
+ return aarch64_ins_none (self, info, code, inst, errors);
case 110:
+ return aarch64_ins_hint (self, info, code, inst, errors);
case 111:
- return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
case 112:
+ return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
case 113:
case 114:
case 115:
- return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 116:
- return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 117:
- return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 118:
+ return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
case 119:
case 120:
case 121:
- return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 122:
+ return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
case 123:
case 124:
case 125:
@@ -842,8 +842,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 134:
case 135:
case 136:
- return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 137:
+ return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
case 138:
case 139:
case 140:
@@ -851,77 +851,77 @@ aarch64_insert_operand (const aarch64_operand *self,
case 142:
case 143:
case 144:
- return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 145:
+ return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
case 146:
case 147:
case 148:
- return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 149:
- return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
case 150:
- return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
case 151:
- return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 152:
- return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
case 153:
+ return aarch64_ins_sve_aimm (self, info, code, inst, errors);
+ case 154:
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
- case 155:
- return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
case 156:
- return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+ return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
case 157:
+ return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
+ case 158:
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
- case 161:
+ case 162:
return aarch64_ins_inv_limm (self, info, code, inst, errors);
- case 163:
+ case 164:
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
- case 165:
+ case 166:
return aarch64_ins_sve_scale (self, info, code, inst, errors);
- case 181:
case 182:
case 183:
- return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 184:
+ return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
case 185:
case 186:
- case 251:
+ case 187:
+ case 252:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
- case 204:
case 205:
case 206:
case 207:
case 208:
case 209:
+ case 210:
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
- case 211:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
case 212:
- case 214:
- case 231:
- return aarch64_ins_sve_reglist (self, info, code, inst, errors);
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
+ case 213:
case 215:
+ case 232:
+ return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 216:
- case 218:
+ case 217:
case 219:
case 220:
case 221:
- case 230:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 222:
+ case 231:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 223:
+ case 224:
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
- case 226:
- case 228:
- case 239:
- return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 227:
case 229:
+ case 240:
+ return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 228:
+ case 230:
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 236:
case 237:
- case 252:
+ case 238:
case 253:
case 254:
case 255:
@@ -934,26 +934,27 @@ aarch64_insert_operand (const aarch64_operand *self,
case 262:
case 263:
case 264:
+ case 265:
return aarch64_ins_simple_index (self, info, code, inst, errors);
- case 240:
case 241:
case 242:
case 243:
case 244:
case 245:
case 246:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 247:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 248:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 249:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 250:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 251:
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
- case 272:
case 273:
case 274:
+ case 275:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 5530a385bab..768f622d55b 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2478;
+ return 2479;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2479;
+ return 2480;
}
}
}
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2908;
+ return 2909;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2622;
+ return 2623;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2621;
+ return 2622;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2620;
+ return 2621;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2629;
+ return 2630;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2625;
+ return 2626;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2619;
+ return 2620;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2618;
+ return 2619;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2640;
+ return 2641;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2639;
+ return 2640;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2617;
+ return 2618;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2627;
+ return 2628;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2623;
+ return 2624;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2630;
+ return 2631;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2626;
+ return 2627;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2628;
+ return 2629;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2624;
+ return 2625;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2556;
+ return 2557;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2557;
+ return 2558;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2580;
+ return 2581;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2581;
+ return 2582;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2572;
+ return 2573;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2573;
+ return 2574;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2564;
+ return 2565;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2565;
+ return 2566;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2588;
+ return 2589;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2589;
+ return 2590;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2612;
+ return 2613;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2613;
+ return 2614;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2604;
+ return 2605;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2605;
+ return 2606;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2596;
+ return 2597;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2597;
+ return 2598;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2702;
+ return 2703;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2703;
+ return 2704;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2552;
+ return 2553;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2553;
+ return 2554;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2576;
+ return 2577;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2577;
+ return 2578;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2568;
+ return 2569;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2569;
+ return 2570;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2560;
+ return 2561;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2561;
+ return 2562;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2584;
+ return 2585;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2585;
+ return 2586;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2608;
+ return 2609;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2609;
+ return 2610;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2600;
+ return 2601;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2601;
+ return 2602;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2592;
+ return 2593;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2593;
+ return 2594;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2728;
+ return 2729;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2729;
+ return 2730;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2752;
+ return 2753;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2753;
+ return 2754;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2744;
+ return 2745;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2745;
+ return 2746;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2736;
+ return 2737;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2737;
+ return 2738;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2760;
+ return 2761;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2761;
+ return 2762;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2784;
+ return 2785;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2785;
+ return 2786;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2776;
+ return 2777;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2777;
+ return 2778;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2768;
+ return 2769;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2769;
+ return 2770;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2724;
+ return 2725;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2725;
+ return 2726;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2748;
+ return 2749;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2749;
+ return 2750;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2740;
+ return 2741;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2741;
+ return 2742;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2732;
+ return 2733;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2733;
+ return 2734;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2756;
+ return 2757;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2757;
+ return 2758;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2780;
+ return 2781;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2781;
+ return 2782;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2772;
+ return 2773;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2773;
+ return 2774;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2764;
+ return 2765;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2765;
+ return 2766;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2678;
+ return 2679;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2883;
+ return 2884;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2679;
+ return 2680;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2680;
+ return 2681;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2884;
+ return 2885;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2885;
+ return 2886;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2841;
+ return 2842;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2799;
+ return 2800;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2842;
+ return 2843;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2843;
+ return 2844;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2800;
+ return 2801;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2801;
+ return 2802;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2694;
+ return 2695;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2695;
+ return 2696;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2696;
+ return 2697;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2857;
+ return 2858;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2858;
+ return 2859;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2859;
+ return 2860;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2558;
+ return 2559;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2582;
+ return 2583;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2574;
+ return 2575;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2566;
+ return 2567;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2590;
+ return 2591;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2614;
+ return 2615;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2606;
+ return 2607;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2598;
+ return 2599;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2559;
+ return 2560;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2616;
+ return 2617;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2583;
+ return 2584;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2575;
+ return 2576;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2567;
+ return 2568;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2591;
+ return 2592;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2615;
+ return 2616;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2607;
+ return 2608;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2599;
+ return 2600;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2915;
+ return 2916;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2916;
+ return 2917;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2917;
+ return 2918;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2519;
+ return 2520;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2520;
+ return 2521;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2521;
+ return 2522;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2924;
+ return 2925;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2925;
+ return 2926;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2926;
+ return 2927;
}
}
}
@@ -1836,7 +1836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2461;
+ return 2462;
}
else
{
@@ -1846,7 +1846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx10xxx
bfmlal. */
- return 2462;
+ return 2463;
}
else
{
@@ -1854,7 +1854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx10xxx
bfmlal. */
- return 2463;
+ return 2464;
}
}
}
@@ -1884,7 +1884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx01xxx
smlsll. */
- return 2918;
+ return 2919;
}
else
{
@@ -1894,7 +1894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx01xxx
smlsll. */
- return 2919;
+ return 2920;
}
else
{
@@ -1902,7 +1902,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx01xxx
smlsll. */
- return 2920;
+ return 2921;
}
}
}
@@ -1914,7 +1914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx01xxx
fmlsl. */
- return 2533;
+ return 2534;
}
else
{
@@ -1924,7 +1924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx01xxx
fmlsl. */
- return 2534;
+ return 2535;
}
else
{
@@ -1932,7 +1932,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx01xxx
fmlsl. */
- return 2535;
+ return 2536;
}
}
}
@@ -1943,7 +1943,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx01xxx
umopa. */
- return 2865;
+ return 2866;
}
}
else
@@ -1958,7 +1958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx0xxxxxxx11xxx
umlsll. */
- return 2927;
+ return 2928;
}
else
{
@@ -1968,7 +1968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx0xxxxxxx11xxx
umlsll. */
- return 2928;
+ return 2929;
}
else
{
@@ -1976,7 +1976,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx0xxxxxxx11xxx
umlsll. */
- return 2929;
+ return 2930;
}
}
}
@@ -1988,7 +1988,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011000xxxxxxx1xxxxxxx11xxx
bfmlsl. */
- return 2469;
+ return 2470;
}
else
{
@@ -1998,7 +1998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx0xx1xxxxxxx11xxx
bfmlsl. */
- return 2470;
+ return 2471;
}
else
{
@@ -2006,7 +2006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011001xxxx1xx1xxxxxxx11xxx
bfmlsl. */
- return 2471;
+ return 2472;
}
}
}
@@ -2017,7 +2017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001100xxxxxxxxxxxxxxxx11xxx
umops. */
- return 2866;
+ return 2867;
}
}
}
@@ -2041,7 +2041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx0xxx
ld1b. */
- return 2554;
+ return 2555;
}
else
{
@@ -2049,7 +2049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx0xxx
ld1w. */
- return 2578;
+ return 2579;
}
}
else
@@ -2060,7 +2060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx0xxx
ld1h. */
- return 2570;
+ return 2571;
}
else
{
@@ -2068,7 +2068,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx0xxx
ld1d. */
- return 2562;
+ return 2563;
}
}
}
@@ -2084,7 +2084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx000xxx
fmla. */
- return 2513;
+ return 2514;
}
else
{
@@ -2092,7 +2092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx000xxx
sdot. */
- return 2648;
+ return 2649;
}
}
else
@@ -2103,7 +2103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx100xxx
svdot. */
- return 2807;
+ return 2808;
}
else
{
@@ -2111,7 +2111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx100xxx
sdot. */
- return 2654;
+ return 2655;
}
}
}
@@ -2125,7 +2125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx010xxx
fmls. */
- return 2527;
+ return 2528;
}
else
{
@@ -2133,7 +2133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx010xxx
udot. */
- return 2813;
+ return 2814;
}
}
else
@@ -2144,7 +2144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx110xxx
uvdot. */
- return 2894;
+ return 2895;
}
else
{
@@ -2152,7 +2152,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx110xxx
udot. */
- return 2819;
+ return 2820;
}
}
}
@@ -2170,7 +2170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx0xxx
ld1b. */
- return 2555;
+ return 2556;
}
else
{
@@ -2178,7 +2178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx0xxx
ld1w. */
- return 2579;
+ return 2580;
}
}
else
@@ -2189,7 +2189,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx0xxx
ld1h. */
- return 2571;
+ return 2572;
}
else
{
@@ -2197,7 +2197,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx0xxx
ld1d. */
- return 2563;
+ return 2564;
}
}
}
@@ -2213,7 +2213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx000xxx
fmla. */
- return 2514;
+ return 2515;
}
else
{
@@ -2221,7 +2221,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx000xxx
sdot. */
- return 2649;
+ return 2650;
}
}
else
@@ -2232,7 +2232,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx100xxx
svdot. */
- return 2808;
+ return 2809;
}
else
{
@@ -2240,7 +2240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx100xxx
sdot. */
- return 2655;
+ return 2656;
}
}
}
@@ -2254,7 +2254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx010xxx
fmls. */
- return 2528;
+ return 2529;
}
else
{
@@ -2262,7 +2262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx010xxx
udot. */
- return 2814;
+ return 2815;
}
}
else
@@ -2273,7 +2273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx110xxx
uvdot. */
- return 2895;
+ return 2896;
}
else
{
@@ -2281,7 +2281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx110xxx
udot. */
- return 2820;
+ return 2821;
}
}
}
@@ -2302,7 +2302,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2586;
+ return 2587;
}
else
{
@@ -2310,7 +2310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2610;
+ return 2611;
}
}
else
@@ -2321,7 +2321,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2602;
+ return 2603;
}
else
{
@@ -2329,7 +2329,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2594;
+ return 2595;
}
}
}
@@ -2345,7 +2345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx001xxx
fvdot. */
- return 2551;
+ return 2552;
}
else
{
@@ -2353,7 +2353,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx001xxx
fdot. */
- return 2491;
+ return 2492;
}
}
else
@@ -2362,7 +2362,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx101xxx
usdot. */
- return 2877;
+ return 2878;
}
}
else
@@ -2375,7 +2375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx0xxxxxx011xxx
bfvdot. */
- return 2477;
+ return 2478;
}
else
{
@@ -2383,7 +2383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xx1xxxxxx011xxx
bfdot. */
- return 2455;
+ return 2456;
}
}
else
@@ -2392,7 +2392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx0xxxxxxxxx111xxx
sudot. */
- return 2795;
+ return 2796;
}
}
}
@@ -2409,7 +2409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2587;
+ return 2588;
}
else
{
@@ -2417,7 +2417,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2611;
+ return 2612;
}
}
else
@@ -2428,7 +2428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2603;
+ return 2604;
}
else
{
@@ -2436,7 +2436,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010100xxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2595;
+ return 2596;
}
}
}
@@ -2450,7 +2450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx001xxx
fdot. */
- return 2492;
+ return 2493;
}
else
{
@@ -2460,7 +2460,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx101xxx
usvdot. */
- return 2891;
+ return 2892;
}
else
{
@@ -2468,7 +2468,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx101xxx
usdot. */
- return 2878;
+ return 2879;
}
}
}
@@ -2480,7 +2480,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xxxxxxxxx011xxx
bfdot. */
- return 2456;
+ return 2457;
}
else
{
@@ -2490,7 +2490,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx0xxxxxx111xxx
suvdot. */
- return 2806;
+ return 2807;
}
else
{
@@ -2498,7 +2498,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000010101xxxx1xx1xxxxxx111xxx
sudot. */
- return 2796;
+ return 2797;
}
}
}
@@ -2522,7 +2522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx00xxx
fmla. */
- return 2931;
+ return 2932;
}
else
{
@@ -2530,7 +2530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx00xxx
fmla. */
- return 2932;
+ return 2933;
}
}
else
@@ -2541,7 +2541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx00xxx
smlal. */
- return 2670;
+ return 2671;
}
else
{
@@ -2551,7 +2551,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx00xxx
smlal. */
- return 2671;
+ return 2672;
}
else
{
@@ -2559,7 +2559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx00xxx
smlal. */
- return 2672;
+ return 2673;
}
}
}
@@ -2576,7 +2576,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx00xxxxxx01xxx
sdot. */
- return 2913;
+ return 2914;
}
else
{
@@ -2584,7 +2584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx00xxxxxx01xxx
sdot. */
- return 2914;
+ return 2915;
}
}
else
@@ -2593,7 +2593,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxxxxx01xxxxxx01xxx
svdot. */
- return 2921;
+ return 2922;
}
}
else
@@ -2604,7 +2604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx01xxx
smlsl. */
- return 2686;
+ return 2687;
}
else
{
@@ -2614,7 +2614,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx01xxx
smlsl. */
- return 2687;
+ return 2688;
}
else
{
@@ -2622,7 +2622,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx01xxx
smlsl. */
- return 2688;
+ return 2689;
}
}
}
@@ -2662,7 +2662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx0xx0xxxxxxx10xxx
fmls. */
- return 2933;
+ return 2934;
}
else
{
@@ -2670,7 +2670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx000001110xxxxx1xx0xxxxxxx10xxx
fmls. */
- return 2934;
+ return 2935;
}
}
else
@@ -2681,7 +2681,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011100xxxxxxx1xxxxxxx10xxx
umlal. */
- return 2833;
+ return 2834;
}
else
{
@@ -2691,7 +2691,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx0xx1xxxxxxx10xxx
umlal. */
- return 2834;
+ return 2835;
}
else
{
@@ -2699,7 +2699,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000011101xxxx1xx1xxxxxxx10xxx
umlal. */
- return 2835;
+ return 2836;
}
}
}
@@ -2725,7 +2725,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx0xx00xxxxxx11xxx
udot. */
- return 2922;
+ return 2923;
}
else
{
@@ -2733,7 +2733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxx1xx00xxxxxx11xxx
udot. */
- return 2923;
+ return 2924;
}
}
else
@@ -2742,7 +2742,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx00001110xxxxxxxx01xxxxxx11xxx
uvdot. */
- return 2930;
+ return 2931;
}
}
else
@@ -2753,7 +2753,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011100xxxxxxx1xxxxxxx11xxx
umlsl. */
- return 2849;
+ return 2850;
}
else
{
@@ -2763,7 +2763,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx0xx1xxxxxxx11xxx
umlsl. */
- return 2850;
+ return 2851;
}
else
{
@@ -2771,7 +2771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx000011101xxxx1xx1xxxxxxx11xxx
umlsl. */
- return 2851;
+ return 2852;
}
}
}
@@ -2827,7 +2827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx000xx
smlall. */
- return 2682;
+ return 2683;
}
else
{
@@ -2835,7 +2835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx000xx
smlall. */
- return 2683;
+ return 2684;
}
}
else
@@ -2846,7 +2846,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx000xx
smlall. */
- return 2684;
+ return 2685;
}
else
{
@@ -2854,7 +2854,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx000xx
smlall. */
- return 2685;
+ return 2686;
}
}
}
@@ -2868,7 +2868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx001xx
usmlall. */
- return 2887;
+ return 2888;
}
else
{
@@ -2876,7 +2876,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx001xx
usmlall. */
- return 2888;
+ return 2889;
}
}
else
@@ -2887,7 +2887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx001xx
usmlall. */
- return 2889;
+ return 2890;
}
else
{
@@ -2895,7 +2895,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx001xx
usmlall. */
- return 2890;
+ return 2891;
}
}
}
@@ -2910,7 +2910,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx00xxx
fdot. */
- return 2493;
+ return 2494;
}
else
{
@@ -2918,7 +2918,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx00xxx
fdot. */
- return 2494;
+ return 2495;
}
}
else
@@ -2929,7 +2929,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx00xxx
fdot. */
- return 2495;
+ return 2496;
}
else
{
@@ -2937,7 +2937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx00xxx
fdot. */
- return 2496;
+ return 2497;
}
}
}
@@ -2956,7 +2956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx00xxx
fmlal. */
- return 2523;
+ return 2524;
}
else
{
@@ -2964,7 +2964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx00xxx
fmlal. */
- return 2524;
+ return 2525;
}
}
else
@@ -2975,7 +2975,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx00xxx
fmlal. */
- return 2525;
+ return 2526;
}
else
{
@@ -2983,7 +2983,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx00xxx
fmlal. */
- return 2526;
+ return 2527;
}
}
}
@@ -2997,7 +2997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx00xxx
smlal. */
- return 2674;
+ return 2675;
}
else
{
@@ -3005,7 +3005,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx00xxx
smlal. */
- return 2675;
+ return 2676;
}
}
else
@@ -3016,7 +3016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx00xxx
smlal. */
- return 2676;
+ return 2677;
}
else
{
@@ -3024,7 +3024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx00xxx
smlal. */
- return 2677;
+ return 2678;
}
}
}
@@ -3039,7 +3039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx00xxx
fmla. */
- return 2515;
+ return 2516;
}
else
{
@@ -3047,7 +3047,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx00xxx
fmla. */
- return 2516;
+ return 2517;
}
}
else
@@ -3058,7 +3058,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx00xxx
fmla. */
- return 2517;
+ return 2518;
}
else
{
@@ -3066,7 +3066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx00xxx
fmla. */
- return 2518;
+ return 2519;
}
}
}
@@ -3084,7 +3084,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx000xx
smlall. */
- return 2681;
+ return 2682;
}
else
{
@@ -3092,7 +3092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx001xx
usmlall. */
- return 2886;
+ return 2887;
}
}
else
@@ -3105,7 +3105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx00xxx
sdot. */
- return 2656;
+ return 2657;
}
else
{
@@ -3113,7 +3113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx00xxx
sdot. */
- return 2657;
+ return 2658;
}
}
else
@@ -3124,7 +3124,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx00xxx
sdot. */
- return 2658;
+ return 2659;
}
else
{
@@ -3132,7 +3132,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx00xxx
sdot. */
- return 2659;
+ return 2660;
}
}
}
@@ -3147,7 +3147,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx00xxx
fmlal. */
- return 2522;
+ return 2523;
}
else
{
@@ -3155,7 +3155,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx00xxx
smlal. */
- return 2673;
+ return 2674;
}
}
else
@@ -3166,7 +3166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx00xxx
fadd. */
- return 2481;
+ return 2482;
}
else
{
@@ -3174,7 +3174,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx00xxx
fadd. */
- return 2482;
+ return 2483;
}
}
}
@@ -3198,7 +3198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx000xxxxx100xx
umlall. */
- return 2845;
+ return 2846;
}
else
{
@@ -3206,7 +3206,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx000xxxxx100xx
umlall. */
- return 2846;
+ return 2847;
}
}
else
@@ -3217,7 +3217,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx000xxxxx100xx
umlall. */
- return 2847;
+ return 2848;
}
else
{
@@ -3225,7 +3225,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx000xxxxx100xx
umlall. */
- return 2848;
+ return 2849;
}
}
}
@@ -3237,7 +3237,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xxxx0xx000xxxxx101xx
sumlall. */
- return 2802;
+ return 2803;
}
else
{
@@ -3245,7 +3245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xxxx0xx000xxxxx101xx
sumlall. */
- return 2803;
+ return 2804;
}
}
}
@@ -3259,7 +3259,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx100xxxxx10xxx
bfdot. */
- return 2457;
+ return 2458;
}
else
{
@@ -3267,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx100xxxxx10xxx
bfdot. */
- return 2458;
+ return 2459;
}
}
else
@@ -3278,7 +3278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx100xxxxx10xxx
bfdot. */
- return 2459;
+ return 2460;
}
else
{
@@ -3286,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx100xxxxx10xxx
bfdot. */
- return 2460;
+ return 2461;
}
}
}
@@ -3305,7 +3305,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2465;
+ return 2466;
}
else
{
@@ -3313,7 +3313,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx10xxx
bfmlal. */
- return 2466;
+ return 2467;
}
}
else
@@ -3324,7 +3324,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx10xxx
bfmlal. */
- return 2467;
+ return 2468;
}
else
{
@@ -3332,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx10xxx
bfmlal. */
- return 2468;
+ return 2469;
}
}
}
@@ -3346,7 +3346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx10xxx
umlal. */
- return 2837;
+ return 2838;
}
else
{
@@ -3354,7 +3354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx10xxx
umlal. */
- return 2838;
+ return 2839;
}
}
else
@@ -3365,7 +3365,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx10xxx
umlal. */
- return 2839;
+ return 2840;
}
else
{
@@ -3373,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx10xxx
umlal. */
- return 2840;
+ return 2841;
}
}
}
@@ -3388,7 +3388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx10xxx
add. */
- return 2447;
+ return 2448;
}
else
{
@@ -3396,7 +3396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx10xxx
add. */
- return 2448;
+ return 2449;
}
}
else
@@ -3407,7 +3407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx10xxx
add. */
- return 2449;
+ return 2450;
}
else
{
@@ -3415,7 +3415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx10xxx
add. */
- return 2450;
+ return 2451;
}
}
}
@@ -3431,7 +3431,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx10xxx
umlall. */
- return 2844;
+ return 2845;
}
else
{
@@ -3443,7 +3443,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx101xxxxx10xxx
udot. */
- return 2821;
+ return 2822;
}
else
{
@@ -3451,7 +3451,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx101xxxxx10xxx
udot. */
- return 2822;
+ return 2823;
}
}
else
@@ -3462,7 +3462,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx101xxxxx10xxx
udot. */
- return 2823;
+ return 2824;
}
else
{
@@ -3470,7 +3470,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx101xxxxx10xxx
udot. */
- return 2824;
+ return 2825;
}
}
}
@@ -3485,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx10xxx
bfmlal. */
- return 2464;
+ return 2465;
}
else
{
@@ -3493,7 +3493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx10xxx
umlal. */
- return 2836;
+ return 2837;
}
}
else
@@ -3504,7 +3504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx10xxx
add. */
- return 2445;
+ return 2446;
}
else
{
@@ -3512,7 +3512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx10xxx
add. */
- return 2446;
+ return 2447;
}
}
}
@@ -3535,7 +3535,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2698;
+ return 2699;
}
else
{
@@ -3543,7 +3543,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx01xxx
smlsll. */
- return 2699;
+ return 2700;
}
}
else
@@ -3554,7 +3554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx01xxx
smlsll. */
- return 2700;
+ return 2701;
}
else
{
@@ -3562,7 +3562,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx01xxx
smlsll. */
- return 2701;
+ return 2702;
}
}
}
@@ -3580,7 +3580,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2537;
+ return 2538;
}
else
{
@@ -3588,7 +3588,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx01xxx
fmlsl. */
- return 2538;
+ return 2539;
}
}
else
@@ -3599,7 +3599,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx01xxx
fmlsl. */
- return 2539;
+ return 2540;
}
else
{
@@ -3607,7 +3607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx01xxx
fmlsl. */
- return 2540;
+ return 2541;
}
}
}
@@ -3621,7 +3621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx01xxx
smlsl. */
- return 2690;
+ return 2691;
}
else
{
@@ -3629,7 +3629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx01xxx
smlsl. */
- return 2691;
+ return 2692;
}
}
else
@@ -3640,7 +3640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx01xxx
smlsl. */
- return 2692;
+ return 2693;
}
else
{
@@ -3648,7 +3648,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx01xxx
smlsl. */
- return 2693;
+ return 2694;
}
}
}
@@ -3663,7 +3663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx01xxx
fmls. */
- return 2529;
+ return 2530;
}
else
{
@@ -3671,7 +3671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx01xxx
fmls. */
- return 2530;
+ return 2531;
}
}
else
@@ -3682,7 +3682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx01xxx
fmls. */
- return 2531;
+ return 2532;
}
else
{
@@ -3690,7 +3690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx01xxx
fmls. */
- return 2532;
+ return 2533;
}
}
}
@@ -3706,7 +3706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx01xxx
smlsll. */
- return 2697;
+ return 2698;
}
else
{
@@ -3720,7 +3720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx101xxxxx01xxx
usdot. */
- return 2879;
+ return 2880;
}
else
{
@@ -3728,7 +3728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx101xxxxx01xxx
usdot. */
- return 2880;
+ return 2881;
}
}
else
@@ -3739,7 +3739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx101xxxxx01xxx
usdot. */
- return 2881;
+ return 2882;
}
else
{
@@ -3747,7 +3747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx101xxxxx01xxx
usdot. */
- return 2882;
+ return 2883;
}
}
}
@@ -3761,7 +3761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx01xxx
sdot. */
- return 2650;
+ return 2651;
}
else
{
@@ -3769,7 +3769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx01xxx
sdot. */
- return 2651;
+ return 2652;
}
}
else
@@ -3780,7 +3780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx01xxx
sdot. */
- return 2652;
+ return 2653;
}
else
{
@@ -3788,7 +3788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx01xxx
sdot. */
- return 2653;
+ return 2654;
}
}
}
@@ -3804,7 +3804,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx01xxx
fmlsl. */
- return 2536;
+ return 2537;
}
else
{
@@ -3812,7 +3812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx01xxx
smlsl. */
- return 2689;
+ return 2690;
}
}
else
@@ -3823,7 +3823,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx01xxx
fsub. */
- return 2549;
+ return 2550;
}
else
{
@@ -3831,7 +3831,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx01xxx
fsub. */
- return 2550;
+ return 2551;
}
}
}
@@ -3851,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2861;
+ return 2862;
}
else
{
@@ -3859,7 +3859,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xxx00xxxxx11xxx
umlsll. */
- return 2862;
+ return 2863;
}
}
else
@@ -3870,7 +3870,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xxx00xxxxx11xxx
umlsll. */
- return 2863;
+ return 2864;
}
else
{
@@ -3878,7 +3878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xxx00xxxxx11xxx
umlsll. */
- return 2864;
+ return 2865;
}
}
}
@@ -3896,7 +3896,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010010xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2473;
+ return 2474;
}
else
{
@@ -3904,7 +3904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010011xxxx0xx010xxxxx11xxx
bfmlsl. */
- return 2474;
+ return 2475;
}
}
else
@@ -3915,7 +3915,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx00xx010xxxxx11xxx
bfmlsl. */
- return 2475;
+ return 2476;
}
else
{
@@ -3923,7 +3923,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001101xxxx10xx010xxxxx11xxx
bfmlsl. */
- return 2476;
+ return 2477;
}
}
}
@@ -3937,7 +3937,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx010xxxxx11xxx
umlsl. */
- return 2853;
+ return 2854;
}
else
{
@@ -3945,7 +3945,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx010xxxxx11xxx
umlsl. */
- return 2854;
+ return 2855;
}
}
else
@@ -3956,7 +3956,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx010xxxxx11xxx
umlsl. */
- return 2855;
+ return 2856;
}
else
{
@@ -3964,7 +3964,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx010xxxxx11xxx
umlsl. */
- return 2856;
+ return 2857;
}
}
}
@@ -3979,7 +3979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x10xxxx0xx110xxxxx11xxx
sub. */
- return 2791;
+ return 2792;
}
else
{
@@ -3987,7 +3987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010x11xxxx0xx110xxxxx11xxx
sub. */
- return 2792;
+ return 2793;
}
}
else
@@ -3998,7 +3998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx00xx110xxxxx11xxx
sub. */
- return 2793;
+ return 2794;
}
else
{
@@ -4006,7 +4006,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011x1xxxx10xx110xxxxx11xxx
sub. */
- return 2794;
+ return 2795;
}
}
}
@@ -4022,7 +4022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx0xx001xxxxx11xxx
umlsll. */
- return 2860;
+ return 2861;
}
else
{
@@ -4034,7 +4034,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010xxxx0xx101xxxxx11xxx
sudot. */
- return 2797;
+ return 2798;
}
else
{
@@ -4042,7 +4042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011xxxx0xx101xxxxx11xxx
sudot. */
- return 2798;
+ return 2799;
}
}
else
@@ -4055,7 +4055,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010110xxxx0xx101xxxxx11xxx
udot. */
- return 2815;
+ return 2816;
}
else
{
@@ -4063,7 +4063,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000010111xxxx0xx101xxxxx11xxx
udot. */
- return 2816;
+ return 2817;
}
}
else
@@ -4074,7 +4074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx00xx101xxxxx11xxx
udot. */
- return 2817;
+ return 2818;
}
else
{
@@ -4082,7 +4082,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001111xxxx10xx101xxxxx11xxx
udot. */
- return 2818;
+ return 2819;
}
}
}
@@ -4098,7 +4098,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx0xx011xxxxx11xxx
bfmlsl. */
- return 2472;
+ return 2473;
}
else
{
@@ -4106,7 +4106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx0xx011xxxxx11xxx
umlsl. */
- return 2852;
+ return 2853;
}
}
else
@@ -4117,7 +4117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx00xx111xxxxx11xxx
sub. */
- return 2789;
+ return 2790;
}
else
{
@@ -4125,7 +4125,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx10xx111xxxxx11xxx
sub. */
- return 2790;
+ return 2791;
}
}
}
@@ -4145,7 +4145,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx0100xxxxxxxxxxxxx
sel. */
- return 2660;
+ return 2661;
}
else
{
@@ -4153,7 +4153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxx1100xxxxxxxxxxxxx
sel. */
- return 2661;
+ return 2662;
}
}
else
@@ -4170,7 +4170,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110000xxxxxxxxx0
fclamp. */
- return 2483;
+ return 2484;
}
else
{
@@ -4178,7 +4178,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110100xxxxxxxxx0
zip. */
- return 2909;
+ return 2910;
}
}
else
@@ -4187,7 +4187,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110x00xxxxxxxxx1
uzp. */
- return 2896;
+ return 2897;
}
}
else
@@ -4198,7 +4198,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110010xxxxxxxxxx
fclamp. */
- return 2484;
+ return 2485;
}
else
{
@@ -4210,7 +4210,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx00xxxxx
sqrshr. */
- return 2715;
+ return 2716;
}
else
{
@@ -4218,7 +4218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxx10xxxxx
sqrshru. */
- return 2718;
+ return 2719;
}
}
else
@@ -4227,7 +4227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110110xxxx1xxxxx
uqrshr. */
- return 2871;
+ return 2872;
}
}
}
@@ -4244,7 +4244,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx0
sclamp. */
- return 2644;
+ return 2645;
}
else
{
@@ -4252,7 +4252,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110001xxxxxxxxx1
uclamp. */
- return 2809;
+ return 2810;
}
}
else
@@ -4265,7 +4265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx0
zip. */
- return 2910;
+ return 2911;
}
else
{
@@ -4273,7 +4273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxxxx110101xxxxxxxxx1
uzp. */
- return 2897;
+ return 2898;
}
}
else
@@ -4286,7 +4286,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110xxxx110101xxxx0xxxxx
sqrshr. */
- return 2714;
+ return 2715;
}
else
{
@@ -4294,7 +4294,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111xxxx110101xxxx0xxxxx
sqrshru. */
- return 2717;
+ return 2718;
}
}
else
@@ -4303,7 +4303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxxxx110101xxxx1xxxxx
uqrshr. */
- return 2870;
+ return 2871;
}
}
}
@@ -4318,7 +4318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx0
sclamp. */
- return 2645;
+ return 2646;
}
else
{
@@ -4326,7 +4326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110011xxxxxxxxx1
uclamp. */
- return 2810;
+ return 2811;
}
}
else
@@ -4339,7 +4339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx00xxxxx
sqrshrn. */
- return 2716;
+ return 2717;
}
else
{
@@ -4347,7 +4347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxx10xxxxx
sqrshrun. */
- return 2719;
+ return 2720;
}
}
else
@@ -4356,7 +4356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx110111xxxx1xxxxx
uqrshrn. */
- return 2872;
+ return 2873;
}
}
}
@@ -4383,7 +4383,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx0
smax. */
- return 2662;
+ return 2663;
}
else
{
@@ -4393,7 +4393,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100001xx0xxxx0
fmax. */
- return 2497;
+ return 2498;
}
else
{
@@ -4401,7 +4401,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100011xx0xxxx0
add. */
- return 2451;
+ return 2452;
}
}
}
@@ -4415,7 +4415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx0
smin. */
- return 2666;
+ return 2667;
}
else
{
@@ -4423,7 +4423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx0
srshl. */
- return 2720;
+ return 2721;
}
}
else
@@ -4432,7 +4432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx0
fmaxnm. */
- return 2501;
+ return 2502;
}
}
}
@@ -4446,7 +4446,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x0xx0xxxx1
umax. */
- return 2825;
+ return 2826;
}
else
{
@@ -4454,7 +4454,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx0xxxx1
fmin. */
- return 2505;
+ return 2506;
}
}
else
@@ -4467,7 +4467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100000xx1xxxx1
umin. */
- return 2829;
+ return 2830;
}
else
{
@@ -4475,7 +4475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx10100010xx1xxxx1
urshl. */
- return 2873;
+ return 2874;
}
}
else
@@ -4484,7 +4484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx101000x1xx1xxxx1
fminnm. */
- return 2509;
+ return 2510;
}
}
}
@@ -4507,7 +4507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01x0000111000xxxx0xxxxx
fcvt. */
- return 2485;
+ return 2486;
}
else
{
@@ -4515,7 +4515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11x0000111000xxxx0xxxxx
bfcvt. */
- return 2453;
+ return 2454;
}
}
else
@@ -4526,7 +4526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101000111000xxxx0xxxxx
frintn. */
- return 2545;
+ return 2546;
}
else
{
@@ -4534,7 +4534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111000111000xxxx0xxxxx
frintn. */
- return 2546;
+ return 2547;
}
}
}
@@ -4546,7 +4546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x100111000xxxx0xxxxx
frinta. */
- return 2541;
+ return 2542;
}
else
{
@@ -4554,7 +4554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x100111000xxxx0xxxxx
frinta. */
- return 2542;
+ return 2543;
}
}
}
@@ -4570,7 +4570,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100010111000xxxx0xxxxx
scvtf. */
- return 2646;
+ return 2647;
}
else
{
@@ -4578,7 +4578,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110010111000xxxx0xxxxx
scvtf. */
- return 2647;
+ return 2648;
}
}
else
@@ -4589,7 +4589,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101010111000xxxx0xxxxx
frintm. */
- return 2543;
+ return 2544;
}
else
{
@@ -4597,7 +4597,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111010111000xxxx0xxxxx
frintm. */
- return 2544;
+ return 2545;
}
}
}
@@ -4609,7 +4609,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx0x
zip. */
- return 2911;
+ return 2912;
}
else
{
@@ -4617,7 +4617,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx110111000xxxx0xxx1x
uzp. */
- return 2898;
+ return 2899;
}
}
}
@@ -4632,7 +4632,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x01xxx00111000xxxx1xxxxx
fcvtn. */
- return 2486;
+ return 2487;
}
else
{
@@ -4640,7 +4640,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x11xxx00111000xxxx1xxxxx
bfcvtn. */
- return 2454;
+ return 2455;
}
}
else
@@ -4651,7 +4651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx10111000xxxx1xxxxx
ucvtf. */
- return 2811;
+ return 2812;
}
else
{
@@ -4659,7 +4659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx10111000xxxx1xxxxx
ucvtf. */
- return 2812;
+ return 2813;
}
}
}
@@ -4682,7 +4682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx100001111000xxxx0xxxx0
fcvtzs. */
- return 2487;
+ return 2488;
}
else
{
@@ -4690,7 +4690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx110001111000xxxx0xxxx0
fcvtzs. */
- return 2488;
+ return 2489;
}
}
else
@@ -4701,7 +4701,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx101001111000xxxx0xxxx0
frintp. */
- return 2547;
+ return 2548;
}
else
{
@@ -4709,7 +4709,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx111001111000xxxx0xxxx0
frintp. */
- return 2548;
+ return 2549;
}
}
}
@@ -4721,7 +4721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x001111000xxxx1xxxx0
fcvtzu. */
- return 2489;
+ return 2490;
}
else
{
@@ -4729,7 +4729,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x001111000xxxx1xxxx0
fcvtzu. */
- return 2490;
+ return 2491;
}
}
}
@@ -4741,7 +4741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10x101111000xxxxxxxxx0
sunpk. */
- return 2804;
+ return 2805;
}
else
{
@@ -4749,7 +4749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11x101111000xxxxxxxxx0
sunpk. */
- return 2805;
+ return 2806;
}
}
}
@@ -4761,7 +4761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx01111000xxxxxxxxx1
uunpk. */
- return 2892;
+ return 2893;
}
else
{
@@ -4769,7 +4769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx01111000xxxxxxxxx1
uunpk. */
- return 2893;
+ return 2894;
}
}
}
@@ -4787,7 +4787,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x010x011111000xxxx0xxxxx
sqcvt. */
- return 2704;
+ return 2705;
}
else
{
@@ -4795,7 +4795,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x110x011111000xxxx0xxxxx
sqcvtu. */
- return 2707;
+ return 2708;
}
}
else
@@ -4808,7 +4808,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx00xxxxx
sqcvt. */
- return 2705;
+ return 2706;
}
else
{
@@ -4816,7 +4816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx00xxxxx
sqcvtu. */
- return 2708;
+ return 2709;
}
}
else
@@ -4827,7 +4827,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x011x011111000xxx10xxxxx
sqcvtn. */
- return 2706;
+ return 2707;
}
else
{
@@ -4835,7 +4835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001x111x011111000xxx10xxxxx
sqcvtun. */
- return 2709;
+ return 2710;
}
}
}
@@ -4848,7 +4848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx0x
zip. */
- return 2912;
+ return 2913;
}
else
{
@@ -4856,7 +4856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xx111111000xxxx0xxx1x
uzp. */
- return 2899;
+ return 2900;
}
}
}
@@ -4868,7 +4868,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx10xx11111000xxxx1xxxxx
uqcvt. */
- return 2867;
+ return 2868;
}
else
{
@@ -4878,7 +4878,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx01xxxxx
uqcvt. */
- return 2868;
+ return 2869;
}
else
{
@@ -4886,7 +4886,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx11xx11111000xxx11xxxxx
uqcvtn. */
- return 2869;
+ return 2870;
}
}
}
@@ -4906,7 +4906,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx0
smax. */
- return 2664;
+ return 2665;
}
else
{
@@ -4914,7 +4914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx0
fmax. */
- return 2499;
+ return 2500;
}
}
else
@@ -4927,7 +4927,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx0
smin. */
- return 2668;
+ return 2669;
}
else
{
@@ -4935,7 +4935,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx0
srshl. */
- return 2722;
+ return 2723;
}
}
else
@@ -4944,7 +4944,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx0
fmaxnm. */
- return 2503;
+ return 2504;
}
}
}
@@ -4958,7 +4958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x0xx0xxxx1
umax. */
- return 2827;
+ return 2828;
}
else
{
@@ -4966,7 +4966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx0xxxx1
fmin. */
- return 2507;
+ return 2508;
}
}
else
@@ -4979,7 +4979,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110000xx1xxxx1
umin. */
- return 2831;
+ return 2832;
}
else
{
@@ -4987,7 +4987,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x110010xx1xxxx1
urshl. */
- return 2875;
+ return 2876;
}
}
else
@@ -4996,7 +4996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1100x1xx1xxxx1
fminnm. */
- return 2511;
+ return 2512;
}
}
}
@@ -5016,7 +5016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx0
smax. */
- return 2663;
+ return 2664;
}
else
{
@@ -5024,7 +5024,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx0
smax. */
- return 2665;
+ return 2666;
}
}
else
@@ -5037,7 +5037,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101001xx0xxxx0
fmax. */
- return 2498;
+ return 2499;
}
else
{
@@ -5045,7 +5045,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111001xx0xxxx0
fmax. */
- return 2500;
+ return 2501;
}
}
else
@@ -5054,7 +5054,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1x1011xx0xxxx0
add. */
- return 2452;
+ return 2453;
}
}
}
@@ -5070,7 +5070,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx0
smin. */
- return 2667;
+ return 2668;
}
else
{
@@ -5078,7 +5078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx0
smin. */
- return 2669;
+ return 2670;
}
}
else
@@ -5089,7 +5089,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx0
srshl. */
- return 2721;
+ return 2722;
}
else
{
@@ -5097,7 +5097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx0
srshl. */
- return 2723;
+ return 2724;
}
}
}
@@ -5109,7 +5109,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx0
fmaxnm. */
- return 2502;
+ return 2503;
}
else
{
@@ -5117,7 +5117,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx0
fmaxnm. */
- return 2504;
+ return 2505;
}
}
}
@@ -5134,7 +5134,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x0xx0xxxx1
umax. */
- return 2826;
+ return 2827;
}
else
{
@@ -5142,7 +5142,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x0xx0xxxx1
umax. */
- return 2828;
+ return 2829;
}
}
else
@@ -5153,7 +5153,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx0xxxx1
fmin. */
- return 2506;
+ return 2507;
}
else
{
@@ -5161,7 +5161,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx0xxxx1
fmin. */
- return 2508;
+ return 2509;
}
}
}
@@ -5177,7 +5177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101000xx1xxxx1
umin. */
- return 2830;
+ return 2831;
}
else
{
@@ -5185,7 +5185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111000xx1xxxx1
umin. */
- return 2832;
+ return 2833;
}
}
else
@@ -5196,7 +5196,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x101010xx1xxxx1
urshl. */
- return 2874;
+ return 2875;
}
else
{
@@ -5204,7 +5204,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x111010xx1xxxx1
urshl. */
- return 2876;
+ return 2877;
}
}
}
@@ -5216,7 +5216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1010x1xx1xxxx1
fminnm. */
- return 2510;
+ return 2511;
}
else
{
@@ -5224,7 +5224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1110x1xx1xxxx1
fminnm. */
- return 2512;
+ return 2513;
}
}
}
@@ -5241,7 +5241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1001xxxxxxxxxx
sqdmulh. */
- return 2710;
+ return 2711;
}
else
{
@@ -5249,7 +5249,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1101xxxxxxxxxx
sqdmulh. */
- return 2712;
+ return 2713;
}
}
else
@@ -5260,7 +5260,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1011xxxxxxxxxx
sqdmulh. */
- return 2711;
+ return 2712;
}
else
{
@@ -5268,7 +5268,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000001xx1xxxxx1x1111xxxxxxxxxx
sqdmulh. */
- return 2713;
+ return 2714;
}
}
}
@@ -5296,7 +5296,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2730;
+ return 2731;
}
else
{
@@ -5304,7 +5304,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2754;
+ return 2755;
}
}
else
@@ -5315,7 +5315,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2746;
+ return 2747;
}
else
{
@@ -5323,7 +5323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2738;
+ return 2739;
}
}
}
@@ -5337,7 +5337,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2762;
+ return 2763;
}
else
{
@@ -5345,7 +5345,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2786;
+ return 2787;
}
}
else
@@ -5356,7 +5356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2778;
+ return 2779;
}
else
{
@@ -5364,7 +5364,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2770;
+ return 2771;
}
}
}
@@ -5392,7 +5392,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001001xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2731;
+ return 2732;
}
else
{
@@ -5400,7 +5400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001001xxxxx100xxxxxxxxx0xxx
str. */
- return 2788;
+ return 2789;
}
}
else
@@ -5409,7 +5409,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2755;
+ return 2756;
}
}
else
@@ -5420,7 +5420,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2747;
+ return 2748;
}
else
{
@@ -5428,7 +5428,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2739;
+ return 2740;
}
}
}
@@ -5442,7 +5442,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2763;
+ return 2764;
}
else
{
@@ -5450,7 +5450,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2787;
+ return 2788;
}
}
else
@@ -5461,7 +5461,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2779;
+ return 2780;
}
else
{
@@ -5469,7 +5469,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001001xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2771;
+ return 2772;
}
}
}
@@ -5511,7 +5511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx0xxx
st1b. */
- return 2726;
+ return 2727;
}
else
{
@@ -5519,7 +5519,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx0xxx
st1b. */
- return 2727;
+ return 2728;
}
}
else
@@ -5530,7 +5530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx0xxx
st1w. */
- return 2750;
+ return 2751;
}
else
{
@@ -5538,7 +5538,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx0xxx
st1w. */
- return 2751;
+ return 2752;
}
}
}
@@ -5552,7 +5552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx0xxx
st1h. */
- return 2742;
+ return 2743;
}
else
{
@@ -5560,7 +5560,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx0xxx
st1h. */
- return 2743;
+ return 2744;
}
}
else
@@ -5571,7 +5571,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx0xxx
st1d. */
- return 2734;
+ return 2735;
}
else
{
@@ -5579,7 +5579,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx0xxx
st1d. */
- return 2735;
+ return 2736;
}
}
}
@@ -5596,7 +5596,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx000xxxxxxxxx1xxx
stnt1b. */
- return 2758;
+ return 2759;
}
else
{
@@ -5604,7 +5604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx100xxxxxxxxx1xxx
stnt1b. */
- return 2759;
+ return 2760;
}
}
else
@@ -5615,7 +5615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx010xxxxxxxxx1xxx
stnt1w. */
- return 2782;
+ return 2783;
}
else
{
@@ -5623,7 +5623,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx110xxxxxxxxx1xxx
stnt1w. */
- return 2783;
+ return 2784;
}
}
}
@@ -5637,7 +5637,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx001xxxxxxxxx1xxx
stnt1h. */
- return 2774;
+ return 2775;
}
else
{
@@ -5645,7 +5645,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx101xxxxxxxxx1xxx
stnt1h. */
- return 2775;
+ return 2776;
}
}
else
@@ -5656,7 +5656,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx011xxxxxxxxx1xxx
stnt1d. */
- return 2766;
+ return 2767;
}
else
{
@@ -5664,7 +5664,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001011xxxxx111xxxxxxxxx1xxx
stnt1d. */
- return 2767;
+ return 2768;
}
}
}
@@ -8066,7 +8066,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2975;
+ return 2976;
}
else
{
@@ -8074,7 +8074,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2983;
+ return 2984;
}
}
else
@@ -8085,7 +8085,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2979;
+ return 2980;
}
else
{
@@ -8093,7 +8093,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2986;
+ return 2987;
}
}
}
@@ -8131,7 +8131,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0000x1xxxxxxxxxx
cpyfp. */
- return 3035;
+ return 3036;
}
else
{
@@ -8139,7 +8139,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1000x1xxxxxxxxxx
cpyfprn. */
- return 3041;
+ return 3042;
}
}
else
@@ -8150,7 +8150,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0100x1xxxxxxxxxx
cpyfpwn. */
- return 3038;
+ return 3039;
}
else
{
@@ -8158,7 +8158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1100x1xxxxxxxxxx
cpyfpn. */
- return 3044;
+ return 3045;
}
}
}
@@ -8172,7 +8172,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0010x1xxxxxxxxxx
cpyfprt. */
- return 3059;
+ return 3060;
}
else
{
@@ -8180,7 +8180,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1010x1xxxxxxxxxx
cpyfprtrn. */
- return 3065;
+ return 3066;
}
}
else
@@ -8191,7 +8191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0110x1xxxxxxxxxx
cpyfprtwn. */
- return 3062;
+ return 3063;
}
else
{
@@ -8199,7 +8199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1110x1xxxxxxxxxx
cpyfprtn. */
- return 3068;
+ return 3069;
}
}
}
@@ -8216,7 +8216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0001x1xxxxxxxxxx
cpyfpwt. */
- return 3047;
+ return 3048;
}
else
{
@@ -8224,7 +8224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1001x1xxxxxxxxxx
cpyfpwtrn. */
- return 3053;
+ return 3054;
}
}
else
@@ -8235,7 +8235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0101x1xxxxxxxxxx
cpyfpwtwn. */
- return 3050;
+ return 3051;
}
else
{
@@ -8243,7 +8243,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1101x1xxxxxxxxxx
cpyfpwtn. */
- return 3056;
+ return 3057;
}
}
}
@@ -8257,7 +8257,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0011x1xxxxxxxxxx
cpyfpt. */
- return 3071;
+ return 3072;
}
else
{
@@ -8265,7 +8265,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1011x1xxxxxxxxxx
cpyfptrn. */
- return 3077;
+ return 3078;
}
}
else
@@ -8276,7 +8276,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx0111x1xxxxxxxxxx
cpyfptwn. */
- return 3074;
+ return 3075;
}
else
{
@@ -8284,7 +8284,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001000xxxxx1111x1xxxxxxxxxx
cpyfptn. */
- return 3080;
+ return 3081;
}
}
}
@@ -8349,7 +8349,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2976;
+ return 2977;
}
else
{
@@ -8357,7 +8357,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2984;
+ return 2985;
}
}
else
@@ -8368,7 +8368,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2980;
+ return 2981;
}
else
{
@@ -8376,7 +8376,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2987;
+ return 2988;
}
}
}
@@ -8414,7 +8414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0000x1xxxxxxxxxx
cpyfm. */
- return 3036;
+ return 3037;
}
else
{
@@ -8422,7 +8422,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1000x1xxxxxxxxxx
cpyfmrn. */
- return 3042;
+ return 3043;
}
}
else
@@ -8433,7 +8433,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0100x1xxxxxxxxxx
cpyfmwn. */
- return 3039;
+ return 3040;
}
else
{
@@ -8441,7 +8441,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1100x1xxxxxxxxxx
cpyfmn. */
- return 3045;
+ return 3046;
}
}
}
@@ -8455,7 +8455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0010x1xxxxxxxxxx
cpyfmrt. */
- return 3060;
+ return 3061;
}
else
{
@@ -8463,7 +8463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1010x1xxxxxxxxxx
cpyfmrtrn. */
- return 3066;
+ return 3067;
}
}
else
@@ -8474,7 +8474,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0110x1xxxxxxxxxx
cpyfmrtwn. */
- return 3063;
+ return 3064;
}
else
{
@@ -8482,7 +8482,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1110x1xxxxxxxxxx
cpyfmrtn. */
- return 3069;
+ return 3070;
}
}
}
@@ -8499,7 +8499,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0001x1xxxxxxxxxx
cpyfmwt. */
- return 3048;
+ return 3049;
}
else
{
@@ -8507,7 +8507,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1001x1xxxxxxxxxx
cpyfmwtrn. */
- return 3054;
+ return 3055;
}
}
else
@@ -8518,7 +8518,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0101x1xxxxxxxxxx
cpyfmwtwn. */
- return 3051;
+ return 3052;
}
else
{
@@ -8526,7 +8526,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1101x1xxxxxxxxxx
cpyfmwtn. */
- return 3057;
+ return 3058;
}
}
}
@@ -8540,7 +8540,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0011x1xxxxxxxxxx
cpyfmt. */
- return 3072;
+ return 3073;
}
else
{
@@ -8548,7 +8548,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1011x1xxxxxxxxxx
cpyfmtrn. */
- return 3078;
+ return 3079;
}
}
else
@@ -8559,7 +8559,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx0111x1xxxxxxxxxx
cpyfmtwn. */
- return 3075;
+ return 3076;
}
else
{
@@ -8567,7 +8567,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001010xxxxx1111x1xxxxxxxxxx
cpyfmtn. */
- return 3081;
+ return 3082;
}
}
}
@@ -8635,7 +8635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2978;
+ return 2979;
}
else
{
@@ -8643,7 +8643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2985;
+ return 2986;
}
}
else
@@ -8652,7 +8652,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2982;
+ return 2983;
}
}
else
@@ -8663,7 +8663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2977;
+ return 2978;
}
else
{
@@ -8671,7 +8671,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2981;
+ return 2982;
}
}
}
@@ -8733,7 +8733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0000x1xxxxxxxxxx
cpyfe. */
- return 3037;
+ return 3038;
}
else
{
@@ -8741,7 +8741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0000x1xxxxxxxxxx
setp. */
- return 3131;
+ return 3132;
}
}
else
@@ -8752,7 +8752,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1000x1xxxxxxxxxx
cpyfern. */
- return 3043;
+ return 3044;
}
else
{
@@ -8760,7 +8760,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1000x1xxxxxxxxxx
sete. */
- return 3133;
+ return 3134;
}
}
}
@@ -8774,7 +8774,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0100x1xxxxxxxxxx
cpyfewn. */
- return 3040;
+ return 3041;
}
else
{
@@ -8782,7 +8782,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0100x1xxxxxxxxxx
setm. */
- return 3132;
+ return 3133;
}
}
else
@@ -8791,7 +8791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1100x1xxxxxxxxxx
cpyfen. */
- return 3046;
+ return 3047;
}
}
}
@@ -8807,7 +8807,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0010x1xxxxxxxxxx
cpyfert. */
- return 3061;
+ return 3062;
}
else
{
@@ -8815,7 +8815,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0010x1xxxxxxxxxx
setpn. */
- return 3137;
+ return 3138;
}
}
else
@@ -8826,7 +8826,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1010x1xxxxxxxxxx
cpyfertrn. */
- return 3067;
+ return 3068;
}
else
{
@@ -8834,7 +8834,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1010x1xxxxxxxxxx
seten. */
- return 3139;
+ return 3140;
}
}
}
@@ -8848,7 +8848,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0110x1xxxxxxxxxx
cpyfertwn. */
- return 3064;
+ return 3065;
}
else
{
@@ -8856,7 +8856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0110x1xxxxxxxxxx
setmn. */
- return 3138;
+ return 3139;
}
}
else
@@ -8865,7 +8865,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1110x1xxxxxxxxxx
cpyfertn. */
- return 3070;
+ return 3071;
}
}
}
@@ -8884,7 +8884,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0001x1xxxxxxxxxx
cpyfewt. */
- return 3049;
+ return 3050;
}
else
{
@@ -8892,7 +8892,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0001x1xxxxxxxxxx
setpt. */
- return 3134;
+ return 3135;
}
}
else
@@ -8903,7 +8903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1001x1xxxxxxxxxx
cpyfewtrn. */
- return 3055;
+ return 3056;
}
else
{
@@ -8911,7 +8911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1001x1xxxxxxxxxx
setet. */
- return 3136;
+ return 3137;
}
}
}
@@ -8925,7 +8925,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0101x1xxxxxxxxxx
cpyfewtwn. */
- return 3052;
+ return 3053;
}
else
{
@@ -8933,7 +8933,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0101x1xxxxxxxxxx
setmt. */
- return 3135;
+ return 3136;
}
}
else
@@ -8942,7 +8942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1101x1xxxxxxxxxx
cpyfewtn. */
- return 3058;
+ return 3059;
}
}
}
@@ -8958,7 +8958,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0011x1xxxxxxxxxx
cpyfet. */
- return 3073;
+ return 3074;
}
else
{
@@ -8966,7 +8966,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0011x1xxxxxxxxxx
setptn. */
- return 3140;
+ return 3141;
}
}
else
@@ -8977,7 +8977,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx1011x1xxxxxxxxxx
cpyfetrn. */
- return 3079;
+ return 3080;
}
else
{
@@ -8985,7 +8985,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx1011x1xxxxxxxxxx
setetn. */
- return 3142;
+ return 3143;
}
}
}
@@ -8999,7 +8999,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001100xxxxx0111x1xxxxxxxxxx
cpyfetwn. */
- return 3076;
+ return 3077;
}
else
{
@@ -9007,7 +9007,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011001110xxxxx0111x1xxxxxxxxxx
setmtn. */
- return 3141;
+ return 3142;
}
}
else
@@ -9016,7 +9016,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0110011x0xxxxx1111x1xxxxxxxxxx
cpyfetn. */
- return 3082;
+ return 3083;
}
}
}
@@ -9389,7 +9389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1x11010110xxxx0x01000xxxxxxxxxx
abs. */
- return 3160;
+ return 3161;
}
else
{
@@ -9407,7 +9407,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11000xxxxxxxxxx
smax. */
- return 3163;
+ return 3164;
}
}
}
@@ -9487,7 +9487,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2973;
+ return 2974;
}
else
{
@@ -9495,7 +9495,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2974;
+ return 2975;
}
}
else
@@ -9602,7 +9602,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxxxx11010xxxxxxxxxx
smin. */
- return 3165;
+ return 3166;
}
}
}
@@ -9618,7 +9618,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010110xxxx0x00110xxxxxxxxxx
ctz. */
- return 3162;
+ return 3163;
}
else
{
@@ -9663,7 +9663,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2972;
+ return 2973;
}
else
{
@@ -9757,7 +9757,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x10xxxxxx11001xxxxxxxxxx
umax. */
- return 3164;
+ return 3165;
}
}
}
@@ -9887,7 +9887,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxxxx11011xxxxxxxxxx
umin. */
- return 3166;
+ return 3167;
}
}
}
@@ -9903,7 +9903,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010xx0xxxx0x00111xxxxxxxxxx
cnt. */
- return 3161;
+ return 3162;
}
else
{
@@ -10745,7 +10745,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2992;
+ return 2993;
}
}
}
@@ -10819,7 +10819,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2993;
+ return 2994;
}
}
}
@@ -12242,7 +12242,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x0xxxxx110x10xxxxxxxxxx
sdot. */
- return 2428;
+ return 2429;
}
else
{
@@ -12250,7 +12250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx110x10xxxxxxxxxx
sdot. */
- return 2427;
+ return 2428;
}
}
}
@@ -12272,7 +12272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x00x0xxxxx110x11xxxxxxxxxx
udot. */
- return 2434;
+ return 2435;
}
else
{
@@ -12280,7 +12280,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x0xxxxx110x11xxxxxxxxxx
udot. */
- return 2433;
+ return 2434;
}
}
}
@@ -13537,7 +13537,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2991;
+ return 2992;
}
}
}
@@ -15241,7 +15241,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 3020;
+ return 3021;
}
}
else
@@ -15484,7 +15484,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2996;
+ return 2997;
}
else
{
@@ -15492,7 +15492,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2997;
+ return 2998;
}
}
else
@@ -15683,7 +15683,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0001xxxxx010xxxxxxxxxxxxx
fdot. */
- return 2424;
+ return 2425;
}
else
{
@@ -15735,7 +15735,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 3017;
+ return 3018;
}
else
{
@@ -15756,7 +15756,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 3024;
+ return 3025;
}
else
{
@@ -15764,7 +15764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 3023;
+ return 3024;
}
}
else
@@ -15789,7 +15789,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0001xxxxx1x0xxxxxxxxxxxxx
fdot. */
- return 2425;
+ return 2426;
}
else
{
@@ -15830,7 +15830,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 3016;
+ return 3017;
}
else
{
@@ -15842,7 +15842,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 3022;
+ return 3023;
}
else
{
@@ -15850,7 +15850,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 3021;
+ return 3022;
}
}
else
@@ -15901,7 +15901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 3000;
+ return 3001;
}
else
{
@@ -15909,7 +15909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 3001;
+ return 3002;
}
}
else
@@ -16127,7 +16127,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0xx1xxxxx001xx1xxxxxxxxxx
fclamp. */
- return 2426;
+ return 2427;
}
}
else
@@ -16182,7 +16182,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx101xx0xxxxxxxxxx
bfmlslb. */
- return 2421;
+ return 2422;
}
else
{
@@ -16190,7 +16190,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx101xx1xxxxxxxxxx
bfmlslt. */
- return 2423;
+ return 2424;
}
}
else
@@ -16270,7 +16270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx011xx0xxxxxxxxxx
bfmlslb. */
- return 2420;
+ return 2421;
}
else
{
@@ -16278,7 +16278,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx011xx1xxxxxxxxxx
bfmlslt. */
- return 2422;
+ return 2423;
}
}
else
@@ -16323,7 +16323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2994;
+ return 2995;
}
else
{
@@ -16356,7 +16356,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 3018;
+ return 3019;
}
else
{
@@ -16386,7 +16386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2995;
+ return 2996;
}
else
{
@@ -16515,7 +16515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 3004;
+ return 3005;
}
else
{
@@ -16525,7 +16525,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 3006;
+ return 3007;
}
else
{
@@ -16533,7 +16533,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 3008;
+ return 3009;
}
}
}
@@ -16545,7 +16545,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 3005;
+ return 3006;
}
else
{
@@ -16555,7 +16555,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 3007;
+ return 3008;
}
else
{
@@ -16563,7 +16563,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 3009;
+ return 3010;
}
}
}
@@ -17582,7 +17582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x11x1xxxxx000xxxxxxxxxxxxx
sqrshrun. */
- return 2432;
+ return 2433;
}
}
}
@@ -17633,7 +17633,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2988;
+ return 2989;
}
else
{
@@ -17641,7 +17641,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2990;
+ return 2991;
}
}
else
@@ -17650,7 +17650,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2989;
+ return 2990;
}
}
}
@@ -17875,7 +17875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxx1010000xxxxxxxxxx
sqcvtn. */
- return 2429;
+ return 2430;
}
}
else
@@ -17894,7 +17894,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxx1010100xxxxxxxxxx
sqcvtun. */
- return 2430;
+ return 2431;
}
}
}
@@ -17914,7 +17914,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x10x1xxxx1010x10xxxxxxxxxx
uqcvtn. */
- return 2435;
+ return 2436;
}
}
}
@@ -18340,7 +18340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x11x1xxxxx0010xxxxxxxxxxxx
sqrshrn. */
- return 2431;
+ return 2432;
}
else
{
@@ -18348,7 +18348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10001x11x1xxxxx0011xxxxxxxxxxxx
uqrshrn. */
- return 2436;
+ return 2437;
}
}
}
@@ -19201,7 +19201,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2998;
+ return 2999;
}
else
{
@@ -19209,7 +19209,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2999;
+ return 3000;
}
}
}
@@ -19583,7 +19583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 3002;
+ return 3003;
}
else
{
@@ -19591,7 +19591,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 3003;
+ return 3004;
}
}
}
@@ -19952,7 +19952,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx10xxx
whilege. */
- return 2900;
+ return 2901;
}
else
{
@@ -19960,7 +19960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x000xxxxx11xxx
whilegt. */
- return 2901;
+ return 2902;
}
}
else
@@ -19973,7 +19973,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx0
whilege. */
- return 2437;
+ return 2438;
}
else
{
@@ -19981,7 +19981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010100xxxxx1xxx1
whilegt. */
- return 2438;
+ return 2439;
}
}
else
@@ -19990,7 +19990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011100xxxxx1xxxx
pext. */
- return 2641;
+ return 2642;
}
}
}
@@ -20004,7 +20004,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx10xxx
whilehs. */
- return 2903;
+ return 2904;
}
else
{
@@ -20012,7 +20012,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x010xxxxx11xxx
whilehi. */
- return 2902;
+ return 2903;
}
}
else
@@ -20025,7 +20025,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx0
whilehs. */
- return 2440;
+ return 2441;
}
else
{
@@ -20033,7 +20033,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010110xxxxx1xxx1
whilehi. */
- return 2439;
+ return 2440;
}
}
else
@@ -20042,7 +20042,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011110xxxxx1xxxx
ptrue. */
- return 2643;
+ return 2644;
}
}
}
@@ -20059,7 +20059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx10xxx
whilelt. */
- return 2907;
+ return 2908;
}
else
{
@@ -20067,7 +20067,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x001xxxxx11xxx
whilele. */
- return 2904;
+ return 2905;
}
}
else
@@ -20080,7 +20080,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx0
whilelt. */
- return 2444;
+ return 2445;
}
else
{
@@ -20088,7 +20088,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx010101xxxxx1xxx1
whilele. */
- return 2441;
+ return 2442;
}
}
else
@@ -20097,7 +20097,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx011101xxxxx1xxxx
pext. */
- return 2642;
+ return 2643;
}
}
}
@@ -20111,7 +20111,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx10xxx
whilelo. */
- return 2905;
+ return 2906;
}
else
{
@@ -20119,7 +20119,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x011xxxxx11xxx
whilels. */
- return 2906;
+ return 2907;
}
}
else
@@ -20130,7 +20130,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx0
whilelo. */
- return 2442;
+ return 2443;
}
else
{
@@ -20138,7 +20138,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx1xxxxx01x111xxxxx1xxx1
whilels. */
- return 2443;
+ return 2444;
}
}
}
@@ -21245,7 +21245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 3019;
+ return 3020;
}
}
else
@@ -21904,7 +21904,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
001001x1xx10xxxx10xxxx1xxxxxxxxx
cntp. */
- return 2480;
+ return 2481;
}
}
else
@@ -22606,7 +22606,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1010100xxxxxxxxxxxxxxxxxxx1xxxx
bc.c. */
- return 3155;
+ return 3156;
}
else
{
@@ -23186,7 +23186,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0000xxxxxxxxxxxx
cpyp. */
- return 3083;
+ return 3084;
}
else
{
@@ -23194,7 +23194,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0000xxxxxxxxxxxx
cpye. */
- return 3085;
+ return 3086;
}
}
else
@@ -23205,7 +23205,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1000xxxxxxxxxxxx
cpyprn. */
- return 3089;
+ return 3090;
}
else
{
@@ -23213,7 +23213,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1000xxxxxxxxxxxx
cpyern. */
- return 3091;
+ return 3092;
}
}
}
@@ -23227,7 +23227,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0100xxxxxxxxxxxx
cpypwn. */
- return 3086;
+ return 3087;
}
else
{
@@ -23235,7 +23235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0100xxxxxxxxxxxx
cpyewn. */
- return 3088;
+ return 3089;
}
}
else
@@ -23246,7 +23246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1100xxxxxxxxxxxx
cpypn. */
- return 3092;
+ return 3093;
}
else
{
@@ -23254,7 +23254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1100xxxxxxxxxxxx
cpyen. */
- return 3094;
+ return 3095;
}
}
}
@@ -23271,7 +23271,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0010xxxxxxxxxxxx
cpyprt. */
- return 3107;
+ return 3108;
}
else
{
@@ -23279,7 +23279,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0010xxxxxxxxxxxx
cpyert. */
- return 3109;
+ return 3110;
}
}
else
@@ -23290,7 +23290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1010xxxxxxxxxxxx
cpyprtrn. */
- return 3113;
+ return 3114;
}
else
{
@@ -23298,7 +23298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1010xxxxxxxxxxxx
cpyertrn. */
- return 3115;
+ return 3116;
}
}
}
@@ -23312,7 +23312,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0110xxxxxxxxxxxx
cpyprtwn. */
- return 3110;
+ return 3111;
}
else
{
@@ -23320,7 +23320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0110xxxxxxxxxxxx
cpyertwn. */
- return 3112;
+ return 3113;
}
}
else
@@ -23331,7 +23331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1110xxxxxxxxxxxx
cpyprtn. */
- return 3116;
+ return 3117;
}
else
{
@@ -23339,7 +23339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1110xxxxxxxxxxxx
cpyertn. */
- return 3118;
+ return 3119;
}
}
}
@@ -23359,7 +23359,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0001xxxxxxxxxxxx
cpypwt. */
- return 3095;
+ return 3096;
}
else
{
@@ -23367,7 +23367,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0001xxxxxxxxxxxx
cpyewt. */
- return 3097;
+ return 3098;
}
}
else
@@ -23378,7 +23378,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1001xxxxxxxxxxxx
cpypwtrn. */
- return 3101;
+ return 3102;
}
else
{
@@ -23386,7 +23386,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1001xxxxxxxxxxxx
cpyewtrn. */
- return 3103;
+ return 3104;
}
}
}
@@ -23400,7 +23400,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0101xxxxxxxxxxxx
cpypwtwn. */
- return 3098;
+ return 3099;
}
else
{
@@ -23408,7 +23408,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0101xxxxxxxxxxxx
cpyewtwn. */
- return 3100;
+ return 3101;
}
}
else
@@ -23419,7 +23419,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1101xxxxxxxxxxxx
cpypwtn. */
- return 3104;
+ return 3105;
}
else
{
@@ -23427,7 +23427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1101xxxxxxxxxxxx
cpyewtn. */
- return 3106;
+ return 3107;
}
}
}
@@ -23444,7 +23444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0011xxxxxxxxxxxx
cpypt. */
- return 3119;
+ return 3120;
}
else
{
@@ -23452,7 +23452,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0011xxxxxxxxxxxx
cpyet. */
- return 3121;
+ return 3122;
}
}
else
@@ -23463,7 +23463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1011xxxxxxxxxxxx
cpyptrn. */
- return 3125;
+ return 3126;
}
else
{
@@ -23471,7 +23471,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1011xxxxxxxxxxxx
cpyetrn. */
- return 3127;
+ return 3128;
}
}
}
@@ -23485,7 +23485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx0111xxxxxxxxxxxx
cpyptwn. */
- return 3122;
+ return 3123;
}
else
{
@@ -23493,7 +23493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx0111xxxxxxxxxxxx
cpyetwn. */
- return 3124;
+ return 3125;
}
}
else
@@ -23504,7 +23504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110100xxxxxx1111xxxxxxxxxxxx
cpyptn. */
- return 3128;
+ return 3129;
}
else
{
@@ -23512,7 +23512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110110xxxxxx1111xxxxxxxxxxxx
cpyetn. */
- return 3130;
+ return 3131;
}
}
}
@@ -23546,7 +23546,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0000xxxxxxxxxxxx
cpym. */
- return 3084;
+ return 3085;
}
else
{
@@ -23554,7 +23554,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0000xxxxxxxxxxxx
setgp. */
- return 3143;
+ return 3144;
}
}
else
@@ -23565,7 +23565,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1000xxxxxxxxxxxx
cpymrn. */
- return 3090;
+ return 3091;
}
else
{
@@ -23573,7 +23573,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1000xxxxxxxxxxxx
setge. */
- return 3145;
+ return 3146;
}
}
}
@@ -23587,7 +23587,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0100xxxxxxxxxxxx
cpymwn. */
- return 3087;
+ return 3088;
}
else
{
@@ -23595,7 +23595,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0100xxxxxxxxxxxx
setgm. */
- return 3144;
+ return 3145;
}
}
else
@@ -23604,7 +23604,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1100xxxxxxxxxxxx
cpymn. */
- return 3093;
+ return 3094;
}
}
}
@@ -23620,7 +23620,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0010xxxxxxxxxxxx
cpymrt. */
- return 3108;
+ return 3109;
}
else
{
@@ -23628,7 +23628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0010xxxxxxxxxxxx
setgpn. */
- return 3149;
+ return 3150;
}
}
else
@@ -23639,7 +23639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1010xxxxxxxxxxxx
cpymrtrn. */
- return 3114;
+ return 3115;
}
else
{
@@ -23647,7 +23647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1010xxxxxxxxxxxx
setgen. */
- return 3151;
+ return 3152;
}
}
}
@@ -23661,7 +23661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0110xxxxxxxxxxxx
cpymrtwn. */
- return 3111;
+ return 3112;
}
else
{
@@ -23669,7 +23669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0110xxxxxxxxxxxx
setgmn. */
- return 3150;
+ return 3151;
}
}
else
@@ -23678,7 +23678,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1110xxxxxxxxxxxx
cpymrtn. */
- return 3117;
+ return 3118;
}
}
}
@@ -23697,7 +23697,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0001xxxxxxxxxxxx
cpymwt. */
- return 3096;
+ return 3097;
}
else
{
@@ -23705,7 +23705,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0001xxxxxxxxxxxx
setgpt. */
- return 3146;
+ return 3147;
}
}
else
@@ -23716,7 +23716,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1001xxxxxxxxxxxx
cpymwtrn. */
- return 3102;
+ return 3103;
}
else
{
@@ -23724,7 +23724,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1001xxxxxxxxxxxx
setget. */
- return 3148;
+ return 3149;
}
}
}
@@ -23738,7 +23738,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0101xxxxxxxxxxxx
cpymwtwn. */
- return 3099;
+ return 3100;
}
else
{
@@ -23746,7 +23746,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0101xxxxxxxxxxxx
setgmt. */
- return 3147;
+ return 3148;
}
}
else
@@ -23755,7 +23755,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1101xxxxxxxxxxxx
cpymwtn. */
- return 3105;
+ return 3106;
}
}
}
@@ -23771,7 +23771,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0011xxxxxxxxxxxx
cpymt. */
- return 3120;
+ return 3121;
}
else
{
@@ -23779,7 +23779,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0011xxxxxxxxxxxx
setgptn. */
- return 3152;
+ return 3153;
}
}
else
@@ -23790,7 +23790,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx1011xxxxxxxxxxxx
cpymtrn. */
- return 3126;
+ return 3127;
}
else
{
@@ -23798,7 +23798,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx1011xxxxxxxxxxxx
setgetn. */
- return 3154;
+ return 3155;
}
}
}
@@ -23812,7 +23812,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110101xxxxxx0111xxxxxxxxxxxx
cpymtwn. */
- return 3123;
+ return 3124;
}
else
{
@@ -23820,7 +23820,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx01110111xxxxxx0111xxxxxxxxxxxx
setgmtn. */
- return 3153;
+ return 3154;
}
}
else
@@ -23829,7 +23829,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx011101x1xxxxxx1111xxxxxxxxxxxx
cpymtn. */
- return 3129;
+ return 3130;
}
}
}
@@ -23996,7 +23996,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 3010;
+ return 3011;
}
}
}
@@ -24029,7 +24029,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2936;
+ return 2937;
}
}
else
@@ -24103,7 +24103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 3012;
+ return 3013;
}
}
}
@@ -24136,7 +24136,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 3013;
+ return 3014;
}
}
else
@@ -24183,7 +24183,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2943;
+ return 2944;
}
else
{
@@ -24191,7 +24191,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2945;
+ return 2946;
}
}
else
@@ -24202,7 +24202,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2947;
+ return 2948;
}
else
{
@@ -24216,7 +24216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2948;
+ return 2949;
}
else
{
@@ -24224,7 +24224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2941;
+ return 2942;
}
}
else
@@ -24233,7 +24233,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2950;
+ return 2951;
}
}
else
@@ -24246,7 +24246,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2949;
+ return 2950;
}
else
{
@@ -24254,7 +24254,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2954;
+ return 2955;
}
}
else
@@ -24263,7 +24263,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2951;
+ return 2952;
}
}
}
@@ -24444,7 +24444,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2935;
+ return 2936;
}
}
else
@@ -24475,7 +24475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 3011;
+ return 3012;
}
else
{
@@ -24494,7 +24494,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 3027;
+ return 3028;
}
else
{
@@ -24504,7 +24504,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 3025;
+ return 3026;
}
else
{
@@ -24514,7 +24514,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 3032;
+ return 3033;
}
else
{
@@ -24522,7 +24522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 3031;
+ return 3032;
}
}
}
@@ -25106,7 +25106,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 3028;
+ return 3029;
}
else
{
@@ -25114,7 +25114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 3029;
+ return 3030;
}
}
}
@@ -25432,7 +25432,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2946;
+ return 2947;
}
}
else
@@ -26043,7 +26043,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2939;
+ return 2940;
}
}
}
@@ -26095,7 +26095,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2952;
+ return 2953;
}
}
}
@@ -26338,7 +26338,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2942;
+ return 2943;
}
}
else
@@ -26414,7 +26414,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2955;
+ return 2956;
}
}
else
@@ -27240,7 +27240,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2940;
+ return 2941;
}
}
else
@@ -27272,7 +27272,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2953;
+ return 2954;
}
}
else
@@ -27512,7 +27512,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2944;
+ return 2945;
}
}
else
@@ -27544,7 +27544,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2958;
+ return 2959;
}
else
{
@@ -27552,7 +27552,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2962;
+ return 2963;
}
}
}
@@ -27574,7 +27574,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2959;
+ return 2960;
}
else
{
@@ -27582,7 +27582,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2963;
+ return 2964;
}
}
}
@@ -27621,7 +27621,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2956;
+ return 2957;
}
else
{
@@ -27629,7 +27629,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2960;
+ return 2961;
}
}
else
@@ -27651,7 +27651,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2957;
+ return 2958;
}
else
{
@@ -27659,7 +27659,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2961;
+ return 2962;
}
}
else
@@ -29467,7 +29467,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2964;
+ return 2965;
}
else
{
@@ -29475,7 +29475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2968;
+ return 2969;
}
}
else
@@ -29497,7 +29497,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2965;
+ return 2966;
}
else
{
@@ -29505,7 +29505,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2969;
+ return 2970;
}
}
else
@@ -30011,7 +30011,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2966;
+ return 2967;
}
else
{
@@ -30019,7 +30019,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2970;
+ return 2971;
}
}
}
@@ -30041,7 +30041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2967;
+ return 2968;
}
else
{
@@ -30049,7 +30049,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2971;
+ return 2972;
}
}
}
@@ -30105,7 +30105,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2938;
+ return 2939;
}
else
{
@@ -30113,7 +30113,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2937;
+ return 2938;
}
}
}
@@ -30216,7 +30216,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 3015;
+ return 3016;
}
else
{
@@ -30224,7 +30224,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 3014;
+ return 3015;
}
}
else
@@ -30235,7 +30235,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 3026;
+ return 3027;
}
else
{
@@ -30245,7 +30245,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 3034;
+ return 3035;
}
else
{
@@ -30253,7 +30253,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 3033;
+ return 3034;
}
}
}
@@ -30744,14 +30744,6 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2391: return NULL; /* mova --> NULL. */
case 2388: value = 2390; break; /* mov --> mova. */
case 2390: return NULL; /* mova --> NULL. */
- case 2629: value = 2637; break; /* mov --> mova. */
- case 2637: return NULL; /* mova --> NULL. */
- case 2625: value = 2633; break; /* mov --> mova. */
- case 2633: return NULL; /* mova --> NULL. */
- case 2627: value = 2635; break; /* mov --> mova. */
- case 2635: return NULL; /* mova --> NULL. */
- case 2623: value = 2631; break; /* mov --> mova. */
- case 2631: return NULL; /* mova --> NULL. */
case 2630: value = 2638; break; /* mov --> mova. */
case 2638: return NULL; /* mova --> NULL. */
case 2626: value = 2634; break; /* mov --> mova. */
@@ -30760,6 +30752,14 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2636: return NULL; /* mova --> NULL. */
case 2624: value = 2632; break; /* mov --> mova. */
case 2632: return NULL; /* mova --> NULL. */
+ case 2631: value = 2639; break; /* mov --> mova. */
+ case 2639: return NULL; /* mova --> NULL. */
+ case 2627: value = 2635; break; /* mov --> mova. */
+ case 2635: return NULL; /* mova --> NULL. */
+ case 2629: value = 2637; break; /* mov --> mova. */
+ case 2637: return NULL; /* mova --> NULL. */
+ case 2625: value = 2633; break; /* mov --> mova. */
+ case 2633: return NULL; /* mova --> NULL. */
case 2393: value = 2398; break; /* ld1b --> ld1b. */
case 2398: return NULL; /* ld1b --> NULL. */
case 2395: value = 2400; break; /* ld1w --> ld1w. */
@@ -30781,11 +30781,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 2407: value = 2412; break; /* st1q --> st1q. */
case 2412: return NULL; /* st1q --> NULL. */
case 12: value = 19; break; /* add --> addg. */
- case 19: value = 3156; break; /* addg --> smax. */
- case 3156: value = 3157; break; /* smax --> umax. */
- case 3157: value = 3158; break; /* umax --> smin. */
- case 3158: value = 3159; break; /* smin --> umin. */
- case 3159: return NULL; /* umin --> NULL. */
+ case 19: value = 3157; break; /* addg --> smax. */
+ case 3157: value = 3158; break; /* smax --> umax. */
+ case 3158: value = 3159; break; /* umax --> smin. */
+ case 3159: value = 3160; break; /* smin --> umin. */
+ case 3160: return NULL; /* umin --> NULL. */
case 16: value = 20; break; /* sub --> subg. */
case 20: return NULL; /* subg --> NULL. */
case 971: value = 975; break; /* stnp --> stp. */
@@ -30794,6 +30794,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 970: return NULL; /* stllrh --> NULL. */
case 972: value = 976; break; /* ldnp --> ldp. */
case 976: return NULL; /* ldp --> NULL. */
+ case 912: value = 2420; break; /* prfm --> rprfm. */
+ case 2420: return NULL; /* rprfm --> NULL. */
case 1642: value = 1643; break; /* ldff1b --> ldff1b. */
case 1643: return NULL; /* ldff1b --> NULL. */
case 1698: value = 1699; break; /* ldff1sw --> ldff1sw. */
@@ -30943,8 +30945,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 3030; break; /* fcvt --> bfcvt. */
- case 3030: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 3031; break; /* fcvt --> bfcvt. */
+ case 3031: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -31426,7 +31428,6 @@ aarch64_extract_operand (const aarch64_operand *self,
case 29:
case 30:
case 31:
- case 167:
case 168:
case 169:
case 170:
@@ -31440,7 +31441,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 178:
case 179:
case 180:
- case 195:
+ case 181:
case 196:
case 197:
case 198:
@@ -31449,15 +31450,16 @@ aarch64_extract_operand (const aarch64_operand *self,
case 201:
case 202:
case 203:
- case 210:
- case 213:
- case 217:
- case 224:
+ case 204:
+ case 211:
+ case 214:
+ case 218:
case 225:
- case 232:
+ case 226:
case 233:
case 234:
case 235:
+ case 236:
return aarch64_ext_regno (self, info, code, inst, errors);
case 10:
return aarch64_ext_regrt_sysins (self, info, code, inst, errors);
@@ -31473,7 +31475,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 271:
+ case 272:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -31509,9 +31511,9 @@ aarch64_extract_operand (const aarch64_operand *self,
case 82:
case 83:
case 84:
- case 164:
- case 166:
- case 187:
+ case 108:
+ case 165:
+ case 167:
case 188:
case 189:
case 190:
@@ -31519,13 +31521,14 @@ aarch64_extract_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 238:
- case 265:
+ case 195:
+ case 239:
case 266:
- case 268:
- case 270:
- case 275:
+ case 267:
+ case 269:
+ case 271:
case 276:
+ case 277:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -31537,10 +31540,10 @@ aarch64_extract_operand (const aarch64_operand *self,
case 49:
return aarch64_ext_shll_imm (self, info, code, inst, errors);
case 52:
- case 154:
+ case 155:
return aarch64_ext_fpimm (self, info, code, inst, errors);
case 70:
- case 162:
+ case 163:
return aarch64_ext_limm (self, info, code, inst, errors);
case 71:
return aarch64_ext_aimm (self, info, code, inst, errors);
@@ -31550,11 +31553,11 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_fbits (self, info, code, inst, errors);
case 75:
case 76:
- case 159:
+ case 160:
return aarch64_ext_imm_rotate2 (self, info, code, inst, errors);
case 77:
- case 158:
- case 160:
+ case 159:
+ case 161:
return aarch64_ext_imm_rotate1 (self, info, code, inst, errors);
case 78:
case 79:
@@ -31595,30 +31598,29 @@ aarch64_extract_operand (const aarch64_operand *self,
return aarch64_ext_barrier_dsb_nxs (self, info, code, inst, errors);
case 107:
return aarch64_ext_prfop (self, info, code, inst, errors);
- case 108:
- case 267:
- case 269:
- return aarch64_ext_none (self, info, code, inst, errors);
case 109:
- return aarch64_ext_hint (self, info, code, inst, errors);
+ case 268:
+ case 270:
+ return aarch64_ext_none (self, info, code, inst, errors);
case 110:
+ return aarch64_ext_hint (self, info, code, inst, errors);
case 111:
- return aarch64_ext_sve_addr_ri_s4 (self, info, code, inst, errors);
case 112:
+ return aarch64_ext_sve_addr_ri_s4 (self, info, code, inst, errors);
case 113:
case 114:
case 115:
- return aarch64_ext_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 116:
- return aarch64_ext_sve_addr_ri_s6xvl (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_ri_s4xvl (self, info, code, inst, errors);
case 117:
- return aarch64_ext_sve_addr_ri_s9xvl (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_ri_s6xvl (self, info, code, inst, errors);
case 118:
+ return aarch64_ext_sve_addr_ri_s9xvl (self, info, code, inst, errors);
case 119:
case 120:
case 121:
- return aarch64_ext_sve_addr_ri_u6 (self, info, code, inst, errors);
case 122:
+ return aarch64_ext_sve_addr_ri_u6 (self, info, code, inst, errors);
case 123:
case 124:
case 125:
@@ -31633,8 +31635,8 @@ aarch64_extract_operand (const aarch64_operand *self,
case 134:
case 135:
case 136:
- return aarch64_ext_sve_addr_rr_lsl (self, info, code, inst, errors);
case 137:
+ return aarch64_ext_sve_addr_rr_lsl (self, info, code, inst, errors);
case 138:
case 139:
case 140:
@@ -31642,77 +31644,77 @@ aarch64_extract_operand (const aarch64_operand *self,
case 142:
case 143:
case 144:
- return aarch64_ext_sve_addr_rz_xtw (self, info, code, inst, errors);
case 145:
+ return aarch64_ext_sve_addr_rz_xtw (self, info, code, inst, errors);
case 146:
case 147:
case 148:
- return aarch64_ext_sve_addr_zi_u5 (self, info, code, inst, errors);
case 149:
- return aarch64_ext_sve_addr_zz_lsl (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_zi_u5 (self, info, code, inst, errors);
case 150:
- return aarch64_ext_sve_addr_zz_sxtw (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_zz_lsl (self, info, code, inst, errors);
case 151:
- return aarch64_ext_sve_addr_zz_uxtw (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_zz_sxtw (self, info, code, inst, errors);
case 152:
- return aarch64_ext_sve_aimm (self, info, code, inst, errors);
+ return aarch64_ext_sve_addr_zz_uxtw (self, info, code, inst, errors);
case 153:
+ return aarch64_ext_sve_aimm (self, info, code, inst, errors);
+ case 154:
return aarch64_ext_sve_asimm (self, info, code, inst, errors);
- case 155:
- return aarch64_ext_sve_float_half_one (self, info, code, inst, errors);
case 156:
- return aarch64_ext_sve_float_half_two (self, info, code, inst, errors);
+ return aarch64_ext_sve_float_half_one (self, info, code, inst, errors);
case 157:
+ return aarch64_ext_sve_float_half_two (self, info, code, inst, errors);
+ case 158:
return aarch64_ext_sve_float_zero_one (self, info, code, inst, errors);
- case 161:
+ case 162:
return aarch64_ext_inv_limm (self, info, code, inst, errors);
- case 163:
+ case 164:
return aarch64_ext_sve_limm_mov (self, info, code, inst, errors);
- case 165:
+ case 166:
return aarch64_ext_sve_scale (self, info, code, inst, errors);
- case 181:
case 182:
case 183:
- return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
case 184:
+ return aarch64_ext_sve_shlimm (self, info, code, inst, errors);
case 185:
case 186:
- case 251:
+ case 187:
+ case 252:
return aarch64_ext_sve_shrimm (self, info, code, inst, errors);
- case 204:
case 205:
case 206:
case 207:
case 208:
case 209:
+ case 210:
return aarch64_ext_sve_quad_index (self, info, code, inst, errors);
- case 211:
- return aarch64_ext_sve_index (self, info, code, inst, errors);
case 212:
- case 214:
- case 231:
- return aarch64_ext_sve_reglist (self, info, code, inst, errors);
+ return aarch64_ext_sve_index (self, info, code, inst, errors);
+ case 213:
case 215:
+ case 232:
+ return aarch64_ext_sve_reglist (self, info, code, inst, errors);
case 216:
- case 218:
+ case 217:
case 219:
case 220:
case 221:
- case 230:
- return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 222:
+ case 231:
+ return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors);
case 223:
+ case 224:
return aarch64_ext_sve_strided_reglist (self, info, code, inst, errors);
- case 226:
- case 228:
- case 239:
- return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
case 227:
case 229:
+ case 240:
+ return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 228:
+ case 230:
return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 236:
case 237:
- case 252:
+ case 238:
case 253:
case 254:
case 255:
@@ -31725,26 +31727,27 @@ aarch64_extract_operand (const aarch64_operand *self,
case 262:
case 263:
case 264:
+ case 265:
return aarch64_ext_simple_index (self, info, code, inst, errors);
- case 240:
case 241:
case 242:
case 243:
case 244:
case 245:
case 246:
- return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 247:
- return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ext_sme_za_array (self, info, code, inst, errors);
case 248:
- return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 249:
- return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ext_sme_sm_za (self, info, code, inst, errors);
case 250:
+ return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 251:
return aarch64_ext_plain_shrimm (self, info, code, inst, errors);
- case 272:
case 273:
case 274:
+ case 275:
return aarch64_ext_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 978f045cb3b..8c2c884fb51 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -132,6 +132,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_DSB_NXS", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the DSB nXS option qualifier name SY, ISH, NSH, OSH or an optional 5-bit unsigned immediate"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_ISB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the ISB option name SY or an optional 4-bit unsigned immediate"},
{AARCH64_OPND_CLASS_SYSTEM, "PRFOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a prefetch operation specifier"},
+ {AARCH64_OPND_CLASS_SYSTEM, "RPRFMOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm1_15, FLD_imm2_12, FLD_imm3_0}, "a range prefetch operation specifier"},
{AARCH64_OPND_CLASS_SYSTEM, "BARRIER_PSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the PSB/TSB option name CSYNC"},
{AARCH64_OPND_CLASS_SYSTEM, "BTI", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "BTI targets j/c/jc"},
{AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4x16", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by 16"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index b97195e65aa..ba2aa8a6c13 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -99,6 +99,17 @@ const char *const aarch64_sve_prfop_array[16] = {
0
};
+/* The enumeration strings associated with each value of a 6-bit RPRFM
+ operation. */
+const char *const aarch64_rprfmop_array[64] = {
+ "pldkeep",
+ "pstkeep",
+ 0,
+ 0,
+ "pldstrm",
+ "pststrm"
+};
+
/* Vector length multiples for a predicate-as-counter operand. Used in things
like AARCH64_OPND_SME_VLxN_10. */
const char *const aarch64_sme_vlxn_array[2] = {
@@ -330,6 +341,7 @@ const aarch64_field fields[] =
{ 1, 2 }, /* imm2_1: general immediate in bits [2:1]. */
{ 8, 2 }, /* imm2_8: general immediate in bits [9:8]. */
{ 10, 2 }, /* imm2_10: 2-bit immediate, bits [11:10] */
+ { 12, 2 }, /* imm2_12: 2-bit immediate, bits [13:12] */
{ 15, 2 }, /* imm2_15: 2-bit immediate, bits [16:15] */
{ 16, 2 }, /* imm2_16: 2-bit immediate, bits [17:16] */
{ 19, 2 }, /* imm2_19: 2-bit immediate, bits [20:19] */
@@ -4584,6 +4596,17 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
opnd->prfop->value));
break;
+ case AARCH64_OPND_RPRFMOP:
+ enum_value = opnd->imm.value;
+ if (enum_value < ARRAY_SIZE (aarch64_rprfmop_array)
+ && aarch64_rprfmop_array[enum_value])
+ snprintf (buf, size, "%s",
+ style_reg (styler, aarch64_rprfmop_array[enum_value]));
+ else
+ snprintf (buf, size, "%s",
+ style_imm (styler, "#%" PRIi64, opnd->imm.value));
+ break;
+
case AARCH64_OPND_BARRIER_PSB:
snprintf (buf, size, "%s", style_sub_mnem (styler, "csync"));
break;
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 129b00da065..32e4da2bbb6 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -151,6 +151,7 @@ enum aarch64_field_kind
FLD_imm2_1,
FLD_imm2_8,
FLD_imm2_10,
+ FLD_imm2_12,
FLD_imm2_15,
FLD_imm2_16,
FLD_imm2_19,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 2b813123d4a..2f8b19f2c7a 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -1779,6 +1779,10 @@
{ \
QLF2(NIL,X), \
}
+#define OP_SVE_UXU \
+{ \
+ QLF3(NIL,X,NIL), \
+}
#define OP_SVE_VMR_BHSD \
{ \
QLF3(S_B,P_M,W), \
@@ -5359,6 +5363,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_Pd, SVE_Pg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_PNd, SVE_PNg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0),
+ /* Added in SME2, but part of the prefetch hint space and available
+ without special command-line flags. */
+ CORE_INSN ("rprfm", 0xf8a04818, 0xffe04c18, sme_misc, 0, OP3 (RPRFMOP, Rm, SIMD_ADDR_SIMPLE), OP_SVE_UXU, 0),
+
/* SME2 extensions to SVE2. */
SME2_INSNC ("bfmlslb", 0x64e06000, 0xffe0f400, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm3_11_INDEX), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
SME2_INSNC ("bfmlslb", 0x64e0a000, 0xffe0fc00, sve_misc, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SHH, 0, C_SCAN_MOVPRFX, 0),
@@ -6269,6 +6277,9 @@ const struct aarch64_opcode aarch64_opcode_table[] =
"the ISB option name SY or an optional 4-bit unsigned immediate") \
Y(SYSTEM, prfop, "PRFOP", 0, F(), \
"a prefetch operation specifier") \
+ Y(SYSTEM, imm, "RPRFMOP", 0, \
+ F(FLD_imm1_15, FLD_imm2_12, FLD_imm3_0), \
+ "a range prefetch operation specifier") \
Y(SYSTEM, none, "BARRIER_PSB", 0, F (), \
"the PSB/TSB option name CSYNC") \
Y(SYSTEM, hint, "BTI", 0, F (), \
--
2.25.1
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/31] aarch64: Add SME2 support
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (30 preceding siblings ...)
2023-03-30 10:26 ` [PATCH 31/31] aarch64: Add the RPRFM instruction Richard Sandiford
@ 2023-04-02 9:35 ` Jan Beulich
2023-04-03 8:05 ` Richard Sandiford
2023-04-03 7:16 ` Jan Beulich
32 siblings, 1 reply; 40+ messages in thread
From: Jan Beulich @ 2023-04-02 9:35 UTC (permalink / raw)
To: Richard Sandiford; +Cc: binutils
On 30.03.2023 12:26, Richard Sandiford via Binutils wrote:
> Richard Sandiford (31):
> aarch64: Add +sme2
> aarch64: Add a _10 suffix to FLD_imm3
> aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
> aarch64: Add support for vgx2 and vgx4
> aarch64; Add support for vector offset ranges
> aarch64: Add support for predicate-as-counter registers
> aarch64: Add the SME2 MOVA instructions
> aarch64: Add the SME2 multivector LD1 and ST1 instructions
Less than a 3rd of the patches in this series have made it to my mailbox
(and the list archives), so commenting on e.g. the one above is difficult.
Nevertheless - according to the documentation LD1x (scalar plus immediate,
consecutive registers) and their LDNT1x, ST1x, and STNT1x counterparts
are (unlike the strided forms) SVE2.1 insns, not SME2 ones (IOW it looks
as if the use of SME2_INSN() there is wrong, unless the documentation is
categorizing these incorrectly).
Jan
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/31] aarch64: Add SME2 support
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
` (31 preceding siblings ...)
2023-04-02 9:35 ` [PATCH 00/31] aarch64: Add SME2 support Jan Beulich
@ 2023-04-03 7:16 ` Jan Beulich
2023-04-03 8:13 ` Richard Sandiford
32 siblings, 1 reply; 40+ messages in thread
From: Jan Beulich @ 2023-04-03 7:16 UTC (permalink / raw)
To: Richard Sandiford; +Cc: binutils
On 30.03.2023 12:26, Richard Sandiford via Binutils wrote:
> This series of patches adds SME2 support to the AArch64 backend.
> Details on SME2 are available here:
>
> https://developer.arm.com/documentation/ddi0602/2022-12/SME-Instructions
>
> Tested on aarch64-linux-gnu, and via automatic cross-checking
> against the architecture description and the LLVM implementation.
>
> I've pushed the series under GWP, but I'm more than happy
> to update/adjust/fix based on post-commit review, so please
> let me know if you spot anything you think should be changed.
>
> Thanks,
> Richard
>
>
> Richard Sandiford (31):
> aarch64: Add +sme2
> aarch64: Add a _10 suffix to FLD_imm3
> aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
> aarch64: Add support for vgx2 and vgx4
> aarch64; Add support for vector offset ranges
> aarch64: Add support for predicate-as-counter registers
Shouldn't the (alias) insn forms added here all use SME2_INSN()? It
doesn't seem to make sense to permit them with ".arch_extension sme".
Jan
> aarch64: Add the SME2 MOVA instructions
> aarch64: Add the SME2 multivector LD1 and ST1 instructions
> aarch64: Add the SME2 predicate-related instructions
> aarch64: Add the SME2 ZT0 instructions
> aarch64: Add the SME2 ADD and SUB instructions
> aarch64: Add the SME2 maximum/minimum instructions
> aarch64: Add the SME2 FMLA and FMLS instructions
> aarch64: Add the SME2 MLAL and MLSL instructions
> aarch64: Add the SME2 MLALL and MLSLL instructions
> aarch64: Add the SME2 dot-product instructions
> aarch64: Add the SME2 vertical dot-product instructions
> aarch64: Add the SME2 MOPA and MOPS instructions
> aarch64: Add the SME2 CLAMP instructions
> aarch64: Add the SME2 FP<->int conversion instructions
> aarch64: Add the SME2 FP<->FP conversion instructions
> aarch64: Add the SME2 saturating conversion instructions
> aarch64: Add the SME2 shift instructions
> aarch64: Add the SME2 UNPK instructions
> aarch64: Add the SME2 UZP and ZIP instructions
> aarch64: Add the SVE BFMLSL instructions
> aarch64: Add new SVE dot-product instructions
> aarch64: Add new SVE saturating conversion instructions
> aarch64: Add new SVE shift instructions
> aarch64: Add the SVE FCLAMP instruction
> aarch64: Add the RPRFM instruction
>
> gas/NEWS | 2 +
> gas/config/tc-aarch64.c | 307 +-
> gas/doc/c-aarch64.texi | 2 +
> gas/testsuite/gas/aarch64/illegal-sve2.l | 28 +-
> gas/testsuite/gas/aarch64/legacy_reg_names.l | 2 +-
> gas/testsuite/gas/aarch64/rprfm-1-invalid.d | 3 +
> gas/testsuite/gas/aarch64/rprfm-1-invalid.l | 11 +
> gas/testsuite/gas/aarch64/rprfm-1-invalid.s | 9 +
> gas/testsuite/gas/aarch64/rprfm-1.d | 83 +
> gas/testsuite/gas/aarch64/rprfm-1.s | 74 +
> gas/testsuite/gas/aarch64/sme-2-illegal.l | 16 +
> gas/testsuite/gas/aarch64/sme-2-illegal.s | 11 +
> gas/testsuite/gas/aarch64/sme-3-illegal.l | 13 +-
> gas/testsuite/gas/aarch64/sme-3-illegal.s | 6 +
> gas/testsuite/gas/aarch64/sme-4-illegal.l | 6 +-
> gas/testsuite/gas/aarch64/sme-5-illegal.l | 10 +
> gas/testsuite/gas/aarch64/sme-5-illegal.s | 9 +
> gas/testsuite/gas/aarch64/sme-6-illegal.l | 10 +
> gas/testsuite/gas/aarch64/sme-6-illegal.s | 9 +
> gas/testsuite/gas/aarch64/sme-7-illegal.l | 20 +
> gas/testsuite/gas/aarch64/sme-7-illegal.s | 17 +
> gas/testsuite/gas/aarch64/sme-9-illegal.l | 19 +
> gas/testsuite/gas/aarch64/sme-9-illegal.s | 10 +
> gas/testsuite/gas/aarch64/sme-9.d | 4 +-
> gas/testsuite/gas/aarch64/sme2-1-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-1-invalid.l | 327 +
> gas/testsuite/gas/aarch64/sme2-1-invalid.s | 323 +
> gas/testsuite/gas/aarch64/sme2-1-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-1-noarch.l | 289 +
> gas/testsuite/gas/aarch64/sme2-1.d | 305 +
> gas/testsuite/gas/aarch64/sme2-1.s | 338 +
> gas/testsuite/gas/aarch64/sme2-10-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-10-invalid.l | 67 +
> gas/testsuite/gas/aarch64/sme2-10-invalid.s | 50 +
> gas/testsuite/gas/aarch64/sme2-10-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-10-noarch.l | 641 ++
> gas/testsuite/gas/aarch64/sme2-10.d | 649 ++
> gas/testsuite/gas/aarch64/sme2-10.s | 799 ++
> gas/testsuite/gas/aarch64/sme2-11-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-11-invalid.l | 101 +
> gas/testsuite/gas/aarch64/sme2-11-invalid.s | 91 +
> gas/testsuite/gas/aarch64/sme2-11-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-11-noarch.l | 117 +
> gas/testsuite/gas/aarch64/sme2-11.d | 125 +
> gas/testsuite/gas/aarch64/sme2-11.s | 127 +
> gas/testsuite/gas/aarch64/sme2-12-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-12-invalid.l | 155 +
> gas/testsuite/gas/aarch64/sme2-12-invalid.s | 136 +
> gas/testsuite/gas/aarch64/sme2-12-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-12-noarch.l | 571 +
> gas/testsuite/gas/aarch64/sme2-12.d | 579 +
> gas/testsuite/gas/aarch64/sme2-12.s | 633 ++
> gas/testsuite/gas/aarch64/sme2-13-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-13-invalid.l | 80 +
> gas/testsuite/gas/aarch64/sme2-13-invalid.s | 83 +
> gas/testsuite/gas/aarch64/sme2-13-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-13-noarch.l | 253 +
> gas/testsuite/gas/aarch64/sme2-13.d | 261 +
> gas/testsuite/gas/aarch64/sme2-13.s | 283 +
> gas/testsuite/gas/aarch64/sme2-14-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-14-invalid.l | 7 +
> gas/testsuite/gas/aarch64/sme2-14-invalid.s | 7 +
> gas/testsuite/gas/aarch64/sme2-14-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-14-noarch.l | 107 +
> gas/testsuite/gas/aarch64/sme2-14.d | 115 +
> gas/testsuite/gas/aarch64/sme2-14.s | 118 +
> gas/testsuite/gas/aarch64/sme2-15-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-15-invalid.l | 97 +
> gas/testsuite/gas/aarch64/sme2-15-invalid.s | 87 +
> gas/testsuite/gas/aarch64/sme2-15-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-15-noarch.l | 187 +
> gas/testsuite/gas/aarch64/sme2-15.d | 195 +
> gas/testsuite/gas/aarch64/sme2-15.s | 203 +
> gas/testsuite/gas/aarch64/sme2-16-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-16-invalid.l | 97 +
> gas/testsuite/gas/aarch64/sme2-16-invalid.s | 87 +
> gas/testsuite/gas/aarch64/sme2-16-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-16-noarch.l | 249 +
> gas/testsuite/gas/aarch64/sme2-16.d | 257 +
> gas/testsuite/gas/aarch64/sme2-16.s | 271 +
> gas/testsuite/gas/aarch64/sme2-17-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-17-invalid.l | 20 +
> gas/testsuite/gas/aarch64/sme2-17-invalid.s | 12 +
> gas/testsuite/gas/aarch64/sme2-17-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-17-noarch.l | 45 +
> gas/testsuite/gas/aarch64/sme2-17.d | 53 +
> gas/testsuite/gas/aarch64/sme2-17.s | 47 +
> gas/testsuite/gas/aarch64/sme2-18-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-18-invalid.l | 21 +
> gas/testsuite/gas/aarch64/sme2-18-invalid.s | 20 +
> gas/testsuite/gas/aarch64/sme2-18-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-18-noarch.l | 21 +
> gas/testsuite/gas/aarch64/sme2-18.d | 29 +
> gas/testsuite/gas/aarch64/sme2-18.s | 21 +
> gas/testsuite/gas/aarch64/sme2-19-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-19-invalid.l | 36 +
> gas/testsuite/gas/aarch64/sme2-19-invalid.s | 36 +
> gas/testsuite/gas/aarch64/sme2-19-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-19-noarch.l | 41 +
> gas/testsuite/gas/aarch64/sme2-19.d | 49 +
> gas/testsuite/gas/aarch64/sme2-19.s | 43 +
> gas/testsuite/gas/aarch64/sme2-2-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-2-invalid.l | 229 +
> gas/testsuite/gas/aarch64/sme2-2-invalid.s | 205 +
> gas/testsuite/gas/aarch64/sme2-2-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-2-noarch.l | 481 +
> gas/testsuite/gas/aarch64/sme2-2.d | 489 +
> gas/testsuite/gas/aarch64/sme2-2.s | 511 +
> gas/testsuite/gas/aarch64/sme2-20-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-20-invalid.l | 27 +
> gas/testsuite/gas/aarch64/sme2-20-invalid.s | 23 +
> gas/testsuite/gas/aarch64/sme2-20-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-20-noarch.l | 21 +
> gas/testsuite/gas/aarch64/sme2-20.d | 29 +
> gas/testsuite/gas/aarch64/sme2-20.s | 21 +
> gas/testsuite/gas/aarch64/sme2-21-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-21-invalid.l | 18 +
> gas/testsuite/gas/aarch64/sme2-21-invalid.s | 12 +
> gas/testsuite/gas/aarch64/sme2-21-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-21-noarch.l | 43 +
> gas/testsuite/gas/aarch64/sme2-21.d | 51 +
> gas/testsuite/gas/aarch64/sme2-21.s | 47 +
> gas/testsuite/gas/aarch64/sme2-22-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-22-invalid.l | 27 +
> gas/testsuite/gas/aarch64/sme2-22-invalid.s | 13 +
> gas/testsuite/gas/aarch64/sme2-22-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-22-noarch.l | 111 +
> gas/testsuite/gas/aarch64/sme2-22.d | 119 +
> gas/testsuite/gas/aarch64/sme2-22.s | 131 +
> gas/testsuite/gas/aarch64/sme2-23-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-23-invalid.l | 14 +
> gas/testsuite/gas/aarch64/sme2-23-invalid.s | 8 +
> gas/testsuite/gas/aarch64/sme2-23-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-23-noarch.l | 65 +
> gas/testsuite/gas/aarch64/sme2-23.d | 73 +
> gas/testsuite/gas/aarch64/sme2-23.s | 79 +
> gas/testsuite/gas/aarch64/sme2-24-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-24-invalid.l | 22 +
> gas/testsuite/gas/aarch64/sme2-24-invalid.s | 13 +
> gas/testsuite/gas/aarch64/sme2-24-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-24-noarch.l | 17 +
> gas/testsuite/gas/aarch64/sme2-24.d | 25 +
> gas/testsuite/gas/aarch64/sme2-24.s | 19 +
> gas/testsuite/gas/aarch64/sme2-25-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-25-invalid.l | 48 +
> gas/testsuite/gas/aarch64/sme2-25-invalid.s | 28 +
> gas/testsuite/gas/aarch64/sme2-25-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-25-noarch.l | 37 +
> gas/testsuite/gas/aarch64/sme2-25.d | 45 +
> gas/testsuite/gas/aarch64/sme2-25.s | 44 +
> gas/testsuite/gas/aarch64/sme2-26-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-26-invalid.l | 13 +
> gas/testsuite/gas/aarch64/sme2-26-invalid.s | 14 +
> gas/testsuite/gas/aarch64/sme2-26-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-26-noarch.l | 25 +
> gas/testsuite/gas/aarch64/sme2-26.d | 33 +
> gas/testsuite/gas/aarch64/sme2-26.s | 29 +
> gas/testsuite/gas/aarch64/sme2-27-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-27-invalid.l | 31 +
> gas/testsuite/gas/aarch64/sme2-27-invalid.s | 25 +
> gas/testsuite/gas/aarch64/sme2-27-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-27-noarch.l | 50 +
> gas/testsuite/gas/aarch64/sme2-27.d | 62 +
> gas/testsuite/gas/aarch64/sme2-27.s | 71 +
> gas/testsuite/gas/aarch64/sme2-28-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-28-invalid.l | 19 +
> gas/testsuite/gas/aarch64/sme2-28-invalid.s | 11 +
> gas/testsuite/gas/aarch64/sme2-28-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-28-noarch.l | 26 +
> gas/testsuite/gas/aarch64/sme2-28.d | 34 +
> gas/testsuite/gas/aarch64/sme2-28.s | 29 +
> gas/testsuite/gas/aarch64/sme2-29-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-29-invalid.l | 39 +
> gas/testsuite/gas/aarch64/sme2-29-invalid.s | 14 +
> gas/testsuite/gas/aarch64/sme2-29-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-29-noarch.l | 37 +
> gas/testsuite/gas/aarch64/sme2-29.d | 45 +
> gas/testsuite/gas/aarch64/sme2-29.s | 47 +
> gas/testsuite/gas/aarch64/sme2-3-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-3-invalid.l | 75 +
> gas/testsuite/gas/aarch64/sme2-3-invalid.s | 62 +
> gas/testsuite/gas/aarch64/sme2-3-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-3-noarch.l | 481 +
> gas/testsuite/gas/aarch64/sme2-3.d | 489 +
> gas/testsuite/gas/aarch64/sme2-3.s | 511 +
> gas/testsuite/gas/aarch64/sme2-30-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-30-invalid.l | 29 +
> gas/testsuite/gas/aarch64/sme2-30-invalid.s | 18 +
> gas/testsuite/gas/aarch64/sme2-30-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-30-noarch.l | 91 +
> gas/testsuite/gas/aarch64/sme2-30.d | 99 +
> gas/testsuite/gas/aarch64/sme2-30.s | 109 +
> gas/testsuite/gas/aarch64/sme2-4-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-4-invalid.l | 75 +
> gas/testsuite/gas/aarch64/sme2-4-invalid.s | 62 +
> gas/testsuite/gas/aarch64/sme2-4-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-4-noarch.l | 481 +
> gas/testsuite/gas/aarch64/sme2-4.d | 489 +
> gas/testsuite/gas/aarch64/sme2-4.s | 511 +
> gas/testsuite/gas/aarch64/sme2-5-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-5-invalid.l | 75 +
> gas/testsuite/gas/aarch64/sme2-5-invalid.s | 62 +
> gas/testsuite/gas/aarch64/sme2-5-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-5-noarch.l | 481 +
> gas/testsuite/gas/aarch64/sme2-5.d | 489 +
> gas/testsuite/gas/aarch64/sme2-5.s | 511 +
> gas/testsuite/gas/aarch64/sme2-6-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-6-invalid.l | 139 +
> gas/testsuite/gas/aarch64/sme2-6-invalid.s | 92 +
> gas/testsuite/gas/aarch64/sme2-6-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-6-noarch.l | 145 +
> gas/testsuite/gas/aarch64/sme2-6.d | 153 +
> gas/testsuite/gas/aarch64/sme2-6.s | 164 +
> gas/testsuite/gas/aarch64/sme2-7-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-7-invalid.l | 20 +
> gas/testsuite/gas/aarch64/sme2-7-invalid.s | 14 +
> gas/testsuite/gas/aarch64/sme2-7-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-7-noarch.l | 321 +
> gas/testsuite/gas/aarch64/sme2-7.d | 329 +
> gas/testsuite/gas/aarch64/sme2-7.s | 351 +
> gas/testsuite/gas/aarch64/sme2-8-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-8-invalid.l | 208 +
> gas/testsuite/gas/aarch64/sme2-8-invalid.s | 116 +
> gas/testsuite/gas/aarch64/sme2-8-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-8-noarch.l | 104 +
> gas/testsuite/gas/aarch64/sme2-8.d | 112 +
> gas/testsuite/gas/aarch64/sme2-8.s | 124 +
> gas/testsuite/gas/aarch64/sme2-9-invalid.d | 3 +
> gas/testsuite/gas/aarch64/sme2-9-invalid.l | 179 +
> gas/testsuite/gas/aarch64/sme2-9-invalid.s | 128 +
> gas/testsuite/gas/aarch64/sme2-9-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sme2-9-noarch.l | 177 +
> gas/testsuite/gas/aarch64/sme2-9.d | 185 +
> gas/testsuite/gas/aarch64/sme2-9.s | 199 +
> .../gas/aarch64/sme2-f64f64-1-invalid.d | 3 +
> .../gas/aarch64/sme2-f64f64-1-invalid.l | 27 +
> .../gas/aarch64/sme2-f64f64-1-invalid.s | 20 +
> .../gas/aarch64/sme2-f64f64-1-noarch.d | 3 +
> .../gas/aarch64/sme2-f64f64-1-noarch.l | 33 +
> gas/testsuite/gas/aarch64/sme2-f64f64-1.d | 41 +
> gas/testsuite/gas/aarch64/sme2-f64f64-1.s | 35 +
> .../gas/aarch64/sme2-f64f64-2-invalid.d | 3 +
> .../gas/aarch64/sme2-f64f64-2-invalid.l | 98 +
> .../gas/aarch64/sme2-f64f64-2-invalid.s | 87 +
> .../gas/aarch64/sme2-f64f64-2-noarch.d | 3 +
> .../gas/aarch64/sme2-f64f64-2-noarch.l | 117 +
> gas/testsuite/gas/aarch64/sme2-f64f64-2.d | 125 +
> gas/testsuite/gas/aarch64/sme2-f64f64-2.s | 127 +
> .../gas/aarch64/sme2-i16i64-1-invalid.d | 3 +
> .../gas/aarch64/sme2-i16i64-1-invalid.l | 111 +
> .../gas/aarch64/sme2-i16i64-1-invalid.s | 86 +
> .../gas/aarch64/sme2-i16i64-1-noarch.d | 3 +
> .../gas/aarch64/sme2-i16i64-1-noarch.l | 57 +
> gas/testsuite/gas/aarch64/sme2-i16i64-1.d | 65 +
> gas/testsuite/gas/aarch64/sme2-i16i64-1.s | 61 +
> .../gas/aarch64/sme2-i16i64-2-invalid.d | 3 +
> .../gas/aarch64/sme2-i16i64-2-invalid.l | 95 +
> .../gas/aarch64/sme2-i16i64-2-invalid.s | 88 +
> .../gas/aarch64/sme2-i16i64-2-noarch.d | 3 +
> .../gas/aarch64/sme2-i16i64-2-noarch.l | 253 +
> gas/testsuite/gas/aarch64/sme2-i16i64-2.d | 261 +
> gas/testsuite/gas/aarch64/sme2-i16i64-2.s | 283 +
> .../gas/aarch64/sme2-i16i64-3-invalid.d | 3 +
> .../gas/aarch64/sme2-i16i64-3-invalid.l | 19 +
> .../gas/aarch64/sme2-i16i64-3-invalid.s | 12 +
> .../gas/aarch64/sme2-i16i64-3-noarch.d | 3 +
> .../gas/aarch64/sme2-i16i64-3-noarch.l | 125 +
> gas/testsuite/gas/aarch64/sme2-i16i64-3.d | 133 +
> gas/testsuite/gas/aarch64/sme2-i16i64-3.s | 135 +
> .../gas/aarch64/sme2-i16i64-4-invalid.d | 3 +
> .../gas/aarch64/sme2-i16i64-4-invalid.l | 11 +
> .../gas/aarch64/sme2-i16i64-4-invalid.s | 12 +
> .../gas/aarch64/sme2-i16i64-4-noarch.d | 3 +
> .../gas/aarch64/sme2-i16i64-4-noarch.l | 21 +
> gas/testsuite/gas/aarch64/sme2-i16i64-4.d | 29 +
> gas/testsuite/gas/aarch64/sme2-i16i64-4.s | 21 +
> gas/testsuite/gas/aarch64/sve-invalid.l | 24 +-
> gas/testsuite/gas/aarch64/sve-invalid.s | 1 +
> .../gas/aarch64/sve-sme2-1-invalid.d | 3 +
> .../gas/aarch64/sve-sme2-1-invalid.l | 51 +
> .../gas/aarch64/sve-sme2-1-invalid.s | 25 +
> gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d | 3 +
> gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l | 25 +
> gas/testsuite/gas/aarch64/sve-sme2-1.d | 33 +
> gas/testsuite/gas/aarch64/sve-sme2-1.s | 27 +
> .../gas/aarch64/sve2-sme2-1-invalid.d | 3 +
> .../gas/aarch64/sve2-sme2-1-invalid.l | 12 +
> .../gas/aarch64/sve2-sme2-1-invalid.s | 12 +
> .../gas/aarch64/sve2-sme2-1-noarch.d | 3 +
> .../gas/aarch64/sve2-sme2-1-noarch.l | 33 +
> gas/testsuite/gas/aarch64/sve2-sme2-1.d | 41 +
> gas/testsuite/gas/aarch64/sve2-sme2-1.s | 35 +
> .../gas/aarch64/sve2-sme2-2-invalid.d | 3 +
> .../gas/aarch64/sve2-sme2-2-invalid.l | 25 +
> .../gas/aarch64/sve2-sme2-2-invalid.s | 12 +
> .../gas/aarch64/sve2-sme2-2-noarch.d | 3 +
> .../gas/aarch64/sve2-sme2-2-noarch.l | 257 +
> gas/testsuite/gas/aarch64/sve2-sme2-2.d | 265 +
> gas/testsuite/gas/aarch64/sve2-sme2-2.s | 287 +
> .../gas/aarch64/sve2-sme2-3-invalid.d | 3 +
> .../gas/aarch64/sve2-sme2-3-invalid.l | 17 +
> .../gas/aarch64/sve2-sme2-3-invalid.s | 15 +
> .../gas/aarch64/sve2-sme2-3-noarch.d | 3 +
> .../gas/aarch64/sve2-sme2-3-noarch.l | 29 +
> gas/testsuite/gas/aarch64/sve2-sme2-3.d | 41 +
> gas/testsuite/gas/aarch64/sve2-sme2-3.s | 35 +
> .../gas/aarch64/sve2-sme2-4-invalid.d | 3 +
> .../gas/aarch64/sve2-sme2-4-invalid.l | 17 +
> .../gas/aarch64/sve2-sme2-4-invalid.s | 15 +
> .../gas/aarch64/sve2-sme2-4-noarch.d | 3 +
> .../gas/aarch64/sve2-sme2-4-noarch.l | 40 +
> gas/testsuite/gas/aarch64/sve2-sme2-4.d | 54 +
> gas/testsuite/gas/aarch64/sve2-sme2-4.s | 49 +
> .../gas/aarch64/sve2-sme2-5-invalid.d | 3 +
> .../gas/aarch64/sve2-sme2-5-invalid.l | 27 +
> .../gas/aarch64/sve2-sme2-5-invalid.s | 12 +
> .../gas/aarch64/sve2-sme2-5-noarch.d | 3 +
> .../gas/aarch64/sve2-sme2-5-noarch.l | 13 +
> gas/testsuite/gas/aarch64/sve2-sme2-5.d | 21 +
> gas/testsuite/gas/aarch64/sve2-sme2-5.s | 14 +
> .../gas/aarch64/sve2-sme2-6-invalid.d | 3 +
> .../gas/aarch64/sve2-sme2-6-invalid.l | 20 +
> .../gas/aarch64/sve2-sme2-6-invalid.s | 14 +
> .../gas/aarch64/sve2-sme2-6-noarch.d | 3 +
> .../gas/aarch64/sve2-sme2-6-noarch.l | 16 +
> gas/testsuite/gas/aarch64/sve2-sme2-6.d | 24 +
> gas/testsuite/gas/aarch64/sve2-sme2-6.s | 17 +
> .../gas/aarch64/sve2-sme2-7-invalid.d | 3 +
> .../gas/aarch64/sve2-sme2-7-invalid.l | 29 +
> .../gas/aarch64/sve2-sme2-7-invalid.s | 9 +
> .../gas/aarch64/sve2-sme2-7-noarch.d | 3 +
> .../gas/aarch64/sve2-sme2-7-noarch.l | 16 +
> gas/testsuite/gas/aarch64/sve2-sme2-7.d | 24 +
> gas/testsuite/gas/aarch64/sve2-sme2-7.s | 17 +
> gas/testsuite/gas/aarch64/system.d | 2 +-
> include/opcode/aarch64.h | 107 +-
> opcodes/aarch64-asm-2.c | 350 +-
> opcodes/aarch64-asm.c | 153 +-
> opcodes/aarch64-asm.h | 5 +
> opcodes/aarch64-dis-2.c | 9561 +++++++++++++----
> opcodes/aarch64-dis.c | 171 +-
> opcodes/aarch64-dis.h | 5 +
> opcodes/aarch64-opc-2.c | 69 +-
> opcodes/aarch64-opc.c | 526 +-
> opcodes/aarch64-opc.h | 54 +-
> opcodes/aarch64-tbl.h | 742 +-
> 346 files changed, 36993 insertions(+), 2255 deletions(-)
> create mode 100644 gas/testsuite/gas/aarch64/rprfm-1-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/rprfm-1-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/rprfm-1-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/rprfm-1.d
> create mode 100644 gas/testsuite/gas/aarch64/rprfm-1.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-1-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-1-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-1-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-1-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-1-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-1.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-1.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-10-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-10-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-10-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-10-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-10-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-10.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-10.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-11-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-11-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-11-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-11-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-11-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-11.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-11.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-12-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-12-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-12-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-12-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-12-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-12.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-12.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-13-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-13-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-13-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-13-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-13-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-13.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-13.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-14-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-14-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-14-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-14-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-14-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-14.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-14.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-15-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-15-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-15-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-15.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-15.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-16-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-16-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-16-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-16.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-16.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-17-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-17-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-17-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-17.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-17.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-18-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-18-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-18-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-18-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-18-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-18.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-18.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-19-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-19-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-19-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-19-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-19-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-19.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-19.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-2-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-2-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-2-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-2-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-2-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-2.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-2.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-20-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-20-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-20-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-20-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-20-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-20.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-20.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-21-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-21-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-21-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-21-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-21-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-21.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-21.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-22-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-22-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-22-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-22-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-22-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-22.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-22.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-23-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-23-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-23-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-23-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-23-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-23.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-23.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-24-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-24-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-24-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-24-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-24-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-24.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-24.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-25-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-25-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-25-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-25-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-25-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-25.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-25.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-26-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-26-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-26-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-26-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-26-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-26.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-26.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-27-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-27-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-27-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-27-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-27-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-27.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-27.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-28-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-28-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-28-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-28-noarch.d
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-28.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-28.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-29-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-29-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-29-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-29-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-29-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-29.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-29.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-3-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-3-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-3-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-3-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-3-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-3.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-3.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-30-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-30-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-30-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-30-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-30-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-30.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-30.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-4-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-4-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-4-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-4-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-4-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-4.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-4.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-5-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-5-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-5-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-5-noarch.d
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-5.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-5.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-6-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-6-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-6-invalid.s
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-6.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-6.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-7-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-7-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-7-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-7-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-7-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-7.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-7.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-8-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-8-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-8-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-8-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-8-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-8.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-8.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-9-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-9-invalid.l
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-9.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-9.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.d
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-1.d
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.d
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-f64f64-2.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-1.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-2.d
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.d
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> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-3.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4.d
> create mode 100644 gas/testsuite/gas/aarch64/sme2-i16i64-4.s
> create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1.d
> create mode 100644 gas/testsuite/gas/aarch64/sve-sme2-1.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-1.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-2.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-3.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-5.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-6.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.s
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7-noarch.l
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7.d
> create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-7.s
>
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/31] aarch64: Add SME2 support
2023-04-02 9:35 ` [PATCH 00/31] aarch64: Add SME2 support Jan Beulich
@ 2023-04-03 8:05 ` Richard Sandiford
2023-04-03 8:14 ` Jan Beulich
0 siblings, 1 reply; 40+ messages in thread
From: Richard Sandiford @ 2023-04-03 8:05 UTC (permalink / raw)
To: Jan Beulich; +Cc: binutils
Jan Beulich <jbeulich@suse.com> writes:
> On 30.03.2023 12:26, Richard Sandiford via Binutils wrote:
>> Richard Sandiford (31):
>> aarch64: Add +sme2
>> aarch64: Add a _10 suffix to FLD_imm3
>> aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
>> aarch64: Add support for vgx2 and vgx4
>> aarch64; Add support for vector offset ranges
>> aarch64: Add support for predicate-as-counter registers
>> aarch64: Add the SME2 MOVA instructions
>> aarch64: Add the SME2 multivector LD1 and ST1 instructions
>
> Less than a 3rd of the patches in this series have made it to my mailbox
> (and the list archives), so commenting on e.g. the one above is difficult.
Yeah, they got held up in moderation due to the size.
> Nevertheless - according to the documentation LD1x (scalar plus immediate,
> consecutive registers) and their LDNT1x, ST1x, and STNT1x counterparts
> are (unlike the strided forms) SVE2.1 insns, not SME2 ones (IOW it looks
> as if the use of SME2_INSN() there is wrong, unless the documentation is
> categorizing these incorrectly).
They're both (but we haven't added SVE2p1 to binutils yet).
E.g. see the pseudocode in:
https://developer.arm.com/documentation/ddi0602/2022-12/SVE-Instructions/LD1B--scalar-plus-immediate--consecutive-registers---Contiguous-load-of-bytes-to-multiple-consecutive-vectors--immediate-index--?lang=en
where the condition is:
if !HaveSME2() && !HaveSVE2p1() then UNDEFINED;
Chronologically, SME2 predates SVE2p1.
Thanks,
Richard
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/31] aarch64: Add SME2 support
2023-04-03 7:16 ` Jan Beulich
@ 2023-04-03 8:13 ` Richard Sandiford
0 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-04-03 8:13 UTC (permalink / raw)
To: Jan Beulich; +Cc: binutils
Jan Beulich <jbeulich@suse.com> writes:
> On 30.03.2023 12:26, Richard Sandiford via Binutils wrote:
>> This series of patches adds SME2 support to the AArch64 backend.
>> Details on SME2 are available here:
>>
>> https://developer.arm.com/documentation/ddi0602/2022-12/SME-Instructions
>>
>> Tested on aarch64-linux-gnu, and via automatic cross-checking
>> against the architecture description and the LLVM implementation.
>>
>> I've pushed the series under GWP, but I'm more than happy
>> to update/adjust/fix based on post-commit review, so please
>> let me know if you spot anything you think should be changed.
>>
>> Thanks,
>> Richard
>>
>>
>> Richard Sandiford (31):
>> aarch64: Add +sme2
>> aarch64: Add a _10 suffix to FLD_imm3
>> aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
>> aarch64: Add support for vgx2 and vgx4
>> aarch64; Add support for vector offset ranges
>> aarch64: Add support for predicate-as-counter registers
>
> Shouldn't the (alias) insn forms added here all use SME2_INSN()? It
> doesn't seem to make sense to permit them with ".arch_extension sme".
That's deliberate (and it's deliberate for the SVE instructions
like PFALSE too). The base requirements in the table come from
the underlying architectural requirements. In this case, the
instructions are unchanged, and so the FEAT_* requirements are
the same. Accepting predicate-as-counter registers is just a
syntactic convenience.
It's true that, without SME2 (or SVE2p1) you might not be able to do
much with the predicate-as-counter registers except move, load and store
them. But that doesn't make those operations invalid (and so something
that the assembler must reject).
Thanks,
Richard
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/31] aarch64: Add SME2 support
2023-04-03 8:05 ` Richard Sandiford
@ 2023-04-03 8:14 ` Jan Beulich
2023-04-03 8:27 ` Richard Sandiford
0 siblings, 1 reply; 40+ messages in thread
From: Jan Beulich @ 2023-04-03 8:14 UTC (permalink / raw)
To: richard.sandiford; +Cc: binutils
On 03.04.2023 10:05, Richard Sandiford wrote:
> Jan Beulich <jbeulich@suse.com> writes:
>> On 30.03.2023 12:26, Richard Sandiford via Binutils wrote:
>>> Richard Sandiford (31):
>>> aarch64: Add +sme2
>>> aarch64: Add a _10 suffix to FLD_imm3
>>> aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
>>> aarch64: Add support for vgx2 and vgx4
>>> aarch64; Add support for vector offset ranges
>>> aarch64: Add support for predicate-as-counter registers
>>> aarch64: Add the SME2 MOVA instructions
>>> aarch64: Add the SME2 multivector LD1 and ST1 instructions
>>
>> Less than a 3rd of the patches in this series have made it to my mailbox
>> (and the list archives), so commenting on e.g. the one above is difficult.
>
> Yeah, they got held up in moderation due to the size.
>
>> Nevertheless - according to the documentation LD1x (scalar plus immediate,
>> consecutive registers) and their LDNT1x, ST1x, and STNT1x counterparts
>> are (unlike the strided forms) SVE2.1 insns, not SME2 ones (IOW it looks
>> as if the use of SME2_INSN() there is wrong, unless the documentation is
>> categorizing these incorrectly).
>
> They're both (but we haven't added SVE2p1 to binutils yet).
> E.g. see the pseudocode in:
>
> https://developer.arm.com/documentation/ddi0602/2022-12/SVE-Instructions/LD1B--scalar-plus-immediate--consecutive-registers---Contiguous-load-of-bytes-to-multiple-consecutive-vectors--immediate-index--?lang=en
>
> where the condition is:
>
> if !HaveSME2() && !HaveSVE2p1() then UNDEFINED;
>
> Chronologically, SME2 predates SVE2p1.
Yet aiui dependency-wise, like SVE2 is a prereq to SME, SVE2.1 is going
to be viewed as a prereq to SVE2.1? In which case enabling SVE2.1 alone
ought to be sufficient to use these insns? Which would mean all of these
(there are quite a few more) would need touching again.
Jan
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/31] aarch64: Add SME2 support
2023-04-03 8:14 ` Jan Beulich
@ 2023-04-03 8:27 ` Richard Sandiford
2023-04-03 8:37 ` Jan Beulich
0 siblings, 1 reply; 40+ messages in thread
From: Richard Sandiford @ 2023-04-03 8:27 UTC (permalink / raw)
To: Jan Beulich; +Cc: binutils
Jan Beulich <jbeulich@suse.com> writes:
> On 03.04.2023 10:05, Richard Sandiford wrote:
>> Jan Beulich <jbeulich@suse.com> writes:
>>> On 30.03.2023 12:26, Richard Sandiford via Binutils wrote:
>>>> Richard Sandiford (31):
>>>> aarch64: Add +sme2
>>>> aarch64: Add a _10 suffix to FLD_imm3
>>>> aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
>>>> aarch64: Add support for vgx2 and vgx4
>>>> aarch64; Add support for vector offset ranges
>>>> aarch64: Add support for predicate-as-counter registers
>>>> aarch64: Add the SME2 MOVA instructions
>>>> aarch64: Add the SME2 multivector LD1 and ST1 instructions
>>>
>>> Less than a 3rd of the patches in this series have made it to my mailbox
>>> (and the list archives), so commenting on e.g. the one above is difficult.
>>
>> Yeah, they got held up in moderation due to the size.
>>
>>> Nevertheless - according to the documentation LD1x (scalar plus immediate,
>>> consecutive registers) and their LDNT1x, ST1x, and STNT1x counterparts
>>> are (unlike the strided forms) SVE2.1 insns, not SME2 ones (IOW it looks
>>> as if the use of SME2_INSN() there is wrong, unless the documentation is
>>> categorizing these incorrectly).
>>
>> They're both (but we haven't added SVE2p1 to binutils yet).
>> E.g. see the pseudocode in:
>>
>> https://developer.arm.com/documentation/ddi0602/2022-12/SVE-Instructions/LD1B--scalar-plus-immediate--consecutive-registers---Contiguous-load-of-bytes-to-multiple-consecutive-vectors--immediate-index--?lang=en
>>
>> where the condition is:
>>
>> if !HaveSME2() && !HaveSVE2p1() then UNDEFINED;
>>
>> Chronologically, SME2 predates SVE2p1.
>
> Yet aiui dependency-wise, like SVE2 is a prereq to SME, SVE2.1 is going
> to be viewed as a prereq to SVE2.1?
Do you mean SVE2p1 being a prereq to SME2? If so, no. FEAT_SME2
&& !FEAT_SVE2p1 is a valid combination, and in that case, these
instructions will only be available in streaming mode. The way the
pseudo expresses this is:
if HaveSVE2p1() then CheckSVEEnabled(); else CheckStreamingSVEEnabled();
> In which case enabling SVE2.1 alone
> ought to be sufficient to use these insns? Which would mean all of these
> (there are quite a few more) would need touching again.
When SVE2p1 is added, we'll need to make these instructions available
whenever SVE2p1 or SME2 is enabled. It didn't seem worth preempting that
by adding SVE2p1 stuff in this series, not least because it wouldn't be
testable. But it should be a simple enough change.
Thanks,
Richard
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/31] aarch64: Add SME2 support
2023-04-03 8:27 ` Richard Sandiford
@ 2023-04-03 8:37 ` Jan Beulich
2023-04-03 9:31 ` Richard Sandiford
0 siblings, 1 reply; 40+ messages in thread
From: Jan Beulich @ 2023-04-03 8:37 UTC (permalink / raw)
To: binutils, richard.sandiford
On 03.04.2023 10:27, Richard Sandiford wrote:
> Jan Beulich <jbeulich@suse.com> writes:
>> On 03.04.2023 10:05, Richard Sandiford wrote:
>>> Jan Beulich <jbeulich@suse.com> writes:
>>>> On 30.03.2023 12:26, Richard Sandiford via Binutils wrote:
>>>>> Richard Sandiford (31):
>>>>> aarch64: Add +sme2
>>>>> aarch64: Add a _10 suffix to FLD_imm3
>>>>> aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
>>>>> aarch64: Add support for vgx2 and vgx4
>>>>> aarch64; Add support for vector offset ranges
>>>>> aarch64: Add support for predicate-as-counter registers
>>>>> aarch64: Add the SME2 MOVA instructions
>>>>> aarch64: Add the SME2 multivector LD1 and ST1 instructions
>>>>
>>>> Less than a 3rd of the patches in this series have made it to my mailbox
>>>> (and the list archives), so commenting on e.g. the one above is difficult.
>>>
>>> Yeah, they got held up in moderation due to the size.
>>>
>>>> Nevertheless - according to the documentation LD1x (scalar plus immediate,
>>>> consecutive registers) and their LDNT1x, ST1x, and STNT1x counterparts
>>>> are (unlike the strided forms) SVE2.1 insns, not SME2 ones (IOW it looks
>>>> as if the use of SME2_INSN() there is wrong, unless the documentation is
>>>> categorizing these incorrectly).
>>>
>>> They're both (but we haven't added SVE2p1 to binutils yet).
>>> E.g. see the pseudocode in:
>>>
>>> https://developer.arm.com/documentation/ddi0602/2022-12/SVE-Instructions/LD1B--scalar-plus-immediate--consecutive-registers---Contiguous-load-of-bytes-to-multiple-consecutive-vectors--immediate-index--?lang=en
>>>
>>> where the condition is:
>>>
>>> if !HaveSME2() && !HaveSVE2p1() then UNDEFINED;
>>>
>>> Chronologically, SME2 predates SVE2p1.
>>
>> Yet aiui dependency-wise, like SVE2 is a prereq to SME, SVE2.1 is going
>> to be viewed as a prereq to SVE2.1?
>
> Do you mean SVE2p1 being a prereq to SME2? If so, no. FEAT_SME2
> && !FEAT_SVE2p1 is a valid combination, and in that case, these
> instructions will only be available in streaming mode. The way the
> pseudo expresses this is:
>
> if HaveSVE2p1() then CheckSVEEnabled(); else CheckStreamingSVEEnabled();
That's different from the SME <-> SVE2 relationship then? Or is that
dependency wrong in tc-aarch64.c:aarch64_features[]?
Jan
^ permalink raw reply [flat|nested] 40+ messages in thread
* Re: [PATCH 00/31] aarch64: Add SME2 support
2023-04-03 8:37 ` Jan Beulich
@ 2023-04-03 9:31 ` Richard Sandiford
0 siblings, 0 replies; 40+ messages in thread
From: Richard Sandiford @ 2023-04-03 9:31 UTC (permalink / raw)
To: Jan Beulich; +Cc: binutils
Jan Beulich <jbeulich@suse.com> writes:
> On 03.04.2023 10:27, Richard Sandiford wrote:
>> Jan Beulich <jbeulich@suse.com> writes:
>>> On 03.04.2023 10:05, Richard Sandiford wrote:
>>>> Jan Beulich <jbeulich@suse.com> writes:
>>>>> On 30.03.2023 12:26, Richard Sandiford via Binutils wrote:
>>>>>> Richard Sandiford (31):
>>>>>> aarch64: Add +sme2
>>>>>> aarch64: Add a _10 suffix to FLD_imm3
>>>>>> aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array
>>>>>> aarch64: Add support for vgx2 and vgx4
>>>>>> aarch64; Add support for vector offset ranges
>>>>>> aarch64: Add support for predicate-as-counter registers
>>>>>> aarch64: Add the SME2 MOVA instructions
>>>>>> aarch64: Add the SME2 multivector LD1 and ST1 instructions
>>>>>
>>>>> Less than a 3rd of the patches in this series have made it to my mailbox
>>>>> (and the list archives), so commenting on e.g. the one above is difficult.
>>>>
>>>> Yeah, they got held up in moderation due to the size.
>>>>
>>>>> Nevertheless - according to the documentation LD1x (scalar plus immediate,
>>>>> consecutive registers) and their LDNT1x, ST1x, and STNT1x counterparts
>>>>> are (unlike the strided forms) SVE2.1 insns, not SME2 ones (IOW it looks
>>>>> as if the use of SME2_INSN() there is wrong, unless the documentation is
>>>>> categorizing these incorrectly).
>>>>
>>>> They're both (but we haven't added SVE2p1 to binutils yet).
>>>> E.g. see the pseudocode in:
>>>>
>>>> https://developer.arm.com/documentation/ddi0602/2022-12/SVE-Instructions/LD1B--scalar-plus-immediate--consecutive-registers---Contiguous-load-of-bytes-to-multiple-consecutive-vectors--immediate-index--?lang=en
>>>>
>>>> where the condition is:
>>>>
>>>> if !HaveSME2() && !HaveSVE2p1() then UNDEFINED;
>>>>
>>>> Chronologically, SME2 predates SVE2p1.
>>>
>>> Yet aiui dependency-wise, like SVE2 is a prereq to SME, SVE2.1 is going
>>> to be viewed as a prereq to SVE2.1?
>>
>> Do you mean SVE2p1 being a prereq to SME2? If so, no. FEAT_SME2
>> && !FEAT_SVE2p1 is a valid combination, and in that case, these
>> instructions will only be available in streaming mode. The way the
>> pseudo expresses this is:
>>
>> if HaveSVE2p1() then CheckSVEEnabled(); else CheckStreamingSVEEnabled();
>
> That's different from the SME <-> SVE2 relationship then? Or is that
> dependency wrong in tc-aarch64.c:aarch64_features[]?
Yeah, it's a different relationship from SME <-> SVE2. For one thing,
SVE2p1 includes things that SME2 doesn't, such as:
https://developer.arm.com/documentation/ddi0602/2022-12/SVE-Instructions/ADDQV--Unsigned-add-reduction-of-quadword-vector-segments-?lang=en
FEAT_SME && !FEAT_SVE is architecturally valid, but we took the decision
not to support it for tools. The rule that +sme implies +sve2 is therefore
a software requirement rather than an ISA requirement.
Thanks,
Richard
^ permalink raw reply [flat|nested] 40+ messages in thread
end of thread, other threads:[~2023-04-03 9:31 UTC | newest]
Thread overview: 40+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-30 10:26 [PATCH 00/31] aarch64: Add SME2 support Richard Sandiford
2023-03-30 10:26 ` [PATCH 01/31] aarch64: Add +sme2 Richard Sandiford
2023-03-30 10:26 ` [PATCH 02/31] aarch64: Add a _10 suffix to FLD_imm3 Richard Sandiford
2023-03-30 10:26 ` [PATCH 03/31] aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array Richard Sandiford
2023-03-30 10:26 ` [PATCH 04/31] aarch64: Add support for vgx2 and vgx4 Richard Sandiford
2023-03-30 10:26 ` [PATCH 05/31] aarch64; Add support for vector offset ranges Richard Sandiford
2023-03-30 10:26 ` [PATCH 06/31] aarch64: Add support for predicate-as-counter registers Richard Sandiford
2023-03-30 10:26 ` [PATCH 07/31] aarch64: Add the SME2 MOVA instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 08/31] aarch64: Add the SME2 multivector LD1 and ST1 instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 09/31] aarch64: Add the SME2 predicate-related instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 10/31] aarch64: Add the SME2 ZT0 instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 11/31] aarch64: Add the SME2 ADD and SUB instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 12/31] aarch64: Add the SME2 maximum/minimum instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 13/31] aarch64: Add the SME2 FMLA and FMLS instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 14/31] aarch64: Add the SME2 MLAL and MLSL instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 15/31] aarch64: Add the SME2 MLALL and MLSLL instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 16/31] aarch64: Add the SME2 dot-product instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 17/31] aarch64: Add the SME2 vertical " Richard Sandiford
2023-03-30 10:26 ` [PATCH 18/31] aarch64: Add the SME2 MOPA and MOPS instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 19/31] aarch64: Add the SME2 CLAMP instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 20/31] aarch64: Add the SME2 FP<->int conversion instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 21/31] aarch64: Add the SME2 FP<->FP " Richard Sandiford
2023-03-30 10:26 ` [PATCH 22/31] aarch64: Add the SME2 saturating " Richard Sandiford
2023-03-30 10:26 ` [PATCH 23/31] aarch64: Add the SME2 shift instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 24/31] aarch64: Add the SME2 UNPK instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 25/31] aarch64: Add the SME2 UZP and ZIP instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 26/31] aarch64: Add the SVE BFMLSL instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 27/31] aarch64: Add new SVE dot-product instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 28/31] aarch64: Add new SVE saturating conversion instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 29/31] aarch64: Add new SVE shift instructions Richard Sandiford
2023-03-30 10:26 ` [PATCH 30/31] aarch64: Add the SVE FCLAMP instruction Richard Sandiford
2023-03-30 10:26 ` [PATCH 31/31] aarch64: Add the RPRFM instruction Richard Sandiford
2023-04-02 9:35 ` [PATCH 00/31] aarch64: Add SME2 support Jan Beulich
2023-04-03 8:05 ` Richard Sandiford
2023-04-03 8:14 ` Jan Beulich
2023-04-03 8:27 ` Richard Sandiford
2023-04-03 8:37 ` Jan Beulich
2023-04-03 9:31 ` Richard Sandiford
2023-04-03 7:16 ` Jan Beulich
2023-04-03 8:13 ` Richard Sandiford
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