* [PATCH] opcodes/riscv: style csr names as registers
@ 2022-10-03 10:13 Andrew Burgess
2022-10-03 10:52 ` Tsukasa OI
2022-10-04 1:10 ` Nelson Chu
0 siblings, 2 replies; 4+ messages in thread
From: Andrew Burgess @ 2022-10-03 10:13 UTC (permalink / raw)
To: binutils; +Cc: Andrew Burgess
While reviewing another patch I noticed that RISC-V CSR names are
given the text style, not the register style. This patch fixes this
mistake.
---
opcodes/riscv-dis.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 6ac69490b78..031c19334fa 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -547,7 +547,8 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
}
if (riscv_csr_hash[csr] != NULL)
- print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]);
+ print (info->stream, dis_style_register, "%s",
+ riscv_csr_hash[csr]);
else
print (info->stream, dis_style_text, "0x%x", csr);
break;
--
2.25.4
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] opcodes/riscv: style csr names as registers
2022-10-03 10:13 [PATCH] opcodes/riscv: style csr names as registers Andrew Burgess
@ 2022-10-03 10:52 ` Tsukasa OI
2022-10-04 1:10 ` Nelson Chu
1 sibling, 0 replies; 4+ messages in thread
From: Tsukasa OI @ 2022-10-03 10:52 UTC (permalink / raw)
To: Andrew Burgess, binutils
On 2022/10/03 19:13, Andrew Burgess via Binutils wrote:
> While reviewing another patch I noticed that RISC-V CSR names are
> given the text style, not the register style. This patch fixes this
> mistake.
LGTM, from the author of "another patch".
I felt it's not obvious as the rest and did not include in the first
batch of my patchset. But I can definitely say that it is worth
discussing about it and I agree with the change.
Thanks,
Tsukasa
> ---
> opcodes/riscv-dis.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index 6ac69490b78..031c19334fa 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -547,7 +547,8 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
> }
>
> if (riscv_csr_hash[csr] != NULL)
> - print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]);
> + print (info->stream, dis_style_register, "%s",
> + riscv_csr_hash[csr]);
> else
> print (info->stream, dis_style_text, "0x%x", csr);
> break;
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] opcodes/riscv: style csr names as registers
2022-10-03 10:13 [PATCH] opcodes/riscv: style csr names as registers Andrew Burgess
2022-10-03 10:52 ` Tsukasa OI
@ 2022-10-04 1:10 ` Nelson Chu
2022-10-04 8:53 ` Andrew Burgess
1 sibling, 1 reply; 4+ messages in thread
From: Nelson Chu @ 2022-10-04 1:10 UTC (permalink / raw)
To: Andrew Burgess; +Cc: binutils
Please commit, thanks.
Nelson
On Mon, Oct 3, 2022 at 6:14 PM Andrew Burgess via Binutils
<binutils@sourceware.org> wrote:
>
> While reviewing another patch I noticed that RISC-V CSR names are
> given the text style, not the register style. This patch fixes this
> mistake.
> ---
> opcodes/riscv-dis.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index 6ac69490b78..031c19334fa 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -547,7 +547,8 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
> }
>
> if (riscv_csr_hash[csr] != NULL)
> - print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]);
> + print (info->stream, dis_style_register, "%s",
> + riscv_csr_hash[csr]);
> else
> print (info->stream, dis_style_text, "0x%x", csr);
> break;
> --
> 2.25.4
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] opcodes/riscv: style csr names as registers
2022-10-04 1:10 ` Nelson Chu
@ 2022-10-04 8:53 ` Andrew Burgess
0 siblings, 0 replies; 4+ messages in thread
From: Andrew Burgess @ 2022-10-04 8:53 UTC (permalink / raw)
To: Nelson Chu; +Cc: binutils
Nelson Chu <nelson@rivosinc.com> writes:
> Please commit, thanks.
>
Pushed.
Thanks,
Andrew
> Nelson
>
> On Mon, Oct 3, 2022 at 6:14 PM Andrew Burgess via Binutils
> <binutils@sourceware.org> wrote:
>>
>> While reviewing another patch I noticed that RISC-V CSR names are
>> given the text style, not the register style. This patch fixes this
>> mistake.
>> ---
>> opcodes/riscv-dis.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
>> index 6ac69490b78..031c19334fa 100644
>> --- a/opcodes/riscv-dis.c
>> +++ b/opcodes/riscv-dis.c
>> @@ -547,7 +547,8 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
>> }
>>
>> if (riscv_csr_hash[csr] != NULL)
>> - print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]);
>> + print (info->stream, dis_style_register, "%s",
>> + riscv_csr_hash[csr]);
>> else
>> print (info->stream, dis_style_text, "0x%x", csr);
>> break;
>> --
>> 2.25.4
>>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-10-04 8:53 UTC | newest]
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2022-10-03 10:13 [PATCH] opcodes/riscv: style csr names as registers Andrew Burgess
2022-10-03 10:52 ` Tsukasa OI
2022-10-04 1:10 ` Nelson Chu
2022-10-04 8:53 ` Andrew Burgess
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