From: "Jiang, Haochen" <haochen.jiang@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>, Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: RE: [PATCH 3/5] x86: support AVX10.1/512
Date: Mon, 28 Aug 2023 02:34:55 +0000 [thread overview]
Message-ID: <SA1PR11MB594638FF2EA5A05EFD6F837CECE0A@SA1PR11MB5946.namprd11.prod.outlook.com> (raw)
In-Reply-To: <da4836a1-dd11-5803-1af4-37d5bf7bc299@suse.com>
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, August 25, 2023 8:47 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Jiang, Haochen <haochen.jiang@intel.com>
> Subject: [PATCH 3/5] x86: support AVX10.1/512
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -1762,22 +1762,28 @@ vpgatherq<dq>, 0x6691, AVX2, Modrm|Vex12
> vpgatherqd, 0x6691, AVX2,
> Modrm|Vex256|Space0F38|VexVVVV|VexW0|SwapSources|NoSuf|VecSIB256,
> { RegXMM, Dword|Unspecified|BaseIndex, RegXMM }
> vpgatherqq, 0x6691, AVX2,
> Modrm|Vex256|Space0F38|VexVVVV|VexW1|SwapSources|NoSuf|VecSIB256,
> { RegYMM, Qword|Unspecified|BaseIndex, RegYMM }
>
> +// AVX10 is somewhat special wrt VAES and VPCLMULQDQ: The latter two imply
> +// 256-bit VEX encodings, but surely the 128-bit forms are also supported.
> +// Short of making AES a prereq of VAES (and PCLMULQDQ for VPCLMULQDQ) in
> +// i386-gen, add otherwise redundant secondary templates here.
> +<avx10:cpu, $avx:AVX|, $avx10:AVX512F|V>
> +
Should it be AVX512VL instead of AVX512F here? I am not sure if elsewhere in as will
help check AVX512VL for EVEX encoding xmm register usage.
Thx,
Haochen
next prev parent reply other threads:[~2023-08-28 2:35 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-25 12:43 [PATCH 0/5] x86: AVX10.1 (alternative attempt) Jan Beulich
2023-08-25 12:44 ` [PATCH 1/5] x86: correct source used for two non-AVX512 VEXWIG tests Jan Beulich
2023-08-25 12:45 ` [PATCH 2/5] x86: rename CpuPCLMUL Jan Beulich
2023-08-25 12:46 ` [PATCH 3/5] x86: support AVX10.1/512 Jan Beulich
2023-08-28 2:34 ` Jiang, Haochen [this message]
2023-08-28 6:45 ` Jan Beulich
2023-08-28 6:59 ` Jiang, Haochen
2023-08-28 7:09 ` Jan Beulich
2023-08-29 16:18 ` H.J. Lu
2023-08-30 1:10 ` Jiang, Haochen
2023-08-30 7:47 ` Jan Beulich
2023-08-30 15:28 ` H.J. Lu
2023-09-01 8:41 ` Jan Beulich
2023-09-01 8:52 ` Jiang, Haochen
2023-09-01 9:57 ` Jan Beulich
2023-09-05 7:04 ` Jiang, Haochen
2023-09-05 7:25 ` Jan Beulich
2023-08-25 12:47 ` [PATCH 4/5] x86: unindent most of set_cpu_arch() Jan Beulich
2023-08-25 12:47 ` [PATCH 5/5] x86: support AVX10.1 vector size restrictions Jan Beulich
2023-08-29 16:26 ` H.J. Lu
2023-08-30 7:57 ` Jan Beulich
2023-08-30 15:25 ` H.J. Lu
2023-08-30 16:16 ` Jan Beulich
2023-08-30 18:00 ` H.J. Lu
2023-08-31 5:56 ` Jiang, Haochen
2023-08-31 7:18 ` Jan Beulich
2023-09-01 6:21 ` Jiang, Haochen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=SA1PR11MB594638FF2EA5A05EFD6F837CECE0A@SA1PR11MB5946.namprd11.prod.outlook.com \
--to=haochen.jiang@intel.com \
--cc=JBeulich@suse.com \
--cc=binutils@sourceware.org \
--cc=hjl.tools@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).