From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Nelson Chu <nelson@rivosinc.com>
Subject: [PATCH v2 0/7] RISC-V/gas: insn operand parsing
Date: Fri, 10 Mar 2023 10:23:55 +0100 [thread overview]
Message-ID: <ba68222c-7de6-280d-e98e-503e3c27addc@suse.com> (raw)
(v1 series was "re-work register named symbols avoidance logic")
This addresses some of the anomalies I've observed. There continue to
be questions towards consistent overall behavior - see remarks in the
individual patches.
An assembler with the full series in place was used in a gcc 12.2.0
testsuite run (cross build on x86, so no execution tests), resulting
in no new test failures (there were a number of pre-existing ones,
though).
1: minor effort reduction in relocation specifier parsing
2: drop "percent_op" parameter from my_getOpcodeExpression()
3: avoid redundant and misleading/wrong error messages
4: don't recognize bogus relocations
5: relax post-relocation-operator separator expectation
6: test for expected / no unexpected symbols
7: adjust logic to avoid register name symbols
Jan
next reply other threads:[~2023-03-10 9:24 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-10 9:23 Jan Beulich [this message]
2023-03-10 9:25 ` [PATCH v2 1/7] RISC-V: minor effort reduction in relocation specifier parsing Jan Beulich
2023-03-10 11:24 ` Jan Beulich
2023-03-10 9:26 ` [PATCH v2 2/7] RISC-V: drop "percent_op" parameter from my_getOpcodeExpression() Jan Beulich
2023-03-10 9:26 ` [PATCH v2 3/7] RISC-V: avoid redundant and misleading/wrong error messages Jan Beulich
2023-03-10 9:27 ` [PATCH v2 4/7] RISC-V: don't recognize bogus relocations Jan Beulich
2023-03-10 9:27 ` [PATCH v2 5/7] RISC-V: relax post-relocation-operator separator expectation Jan Beulich
2023-04-25 8:13 ` Nelson Chu
2023-04-25 8:37 ` Andreas Schwab
2023-04-25 8:44 ` Nelson Chu
2023-04-25 8:52 ` Jan Beulich
2023-04-28 1:29 ` Nelson Chu
2023-04-28 6:05 ` Jan Beulich
2023-04-28 8:03 ` Fangrui Song
2023-05-11 11:27 ` Jan Beulich
2023-03-10 9:27 ` [PATCH v2 6/7] RISC-V: test for expected / no unexpected symbols Jan Beulich
2023-03-10 9:28 ` [PATCH v2 7/7] RISC-V: adjust logic to avoid register name symbols Jan Beulich
2023-04-25 8:40 ` [PATCH v2 0/7] RISC-V/gas: insn operand parsing Nelson Chu
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