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From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Andrew Waterman <andrew@sifive.com>,
	Jim Wilson <jim.wilson.gcc@gmail.com>,
	Nelson Chu <nelson@rivosinc.com>
Subject: [PATCH v2 1/7] RISC-V: minor effort reduction in relocation specifier parsing
Date: Fri, 10 Mar 2023 10:25:27 +0100	[thread overview]
Message-ID: <f1892080-b6fe-a164-73bb-91cd88302e0f@suse.com> (raw)
In-Reply-To: <ba68222c-7de6-280d-e98e-503e3c27addc@suse.com>

The sole caller of parse_relocation() has already checked for the %
prefix, so there's no need to check for it again in the strncasecmp()
and there's also no reason to make the involved string literals longer
than necessary.
---
v2: New.

--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -2135,34 +2135,34 @@ macro (struct riscv_cl_insn *ip, express
 
 static const struct percent_op_match percent_op_utype[] =
 {
-  {"%tprel_hi", BFD_RELOC_RISCV_TPREL_HI20},
-  {"%pcrel_hi", BFD_RELOC_RISCV_PCREL_HI20},
-  {"%got_pcrel_hi", BFD_RELOC_RISCV_GOT_HI20},
-  {"%tls_ie_pcrel_hi", BFD_RELOC_RISCV_TLS_GOT_HI20},
-  {"%tls_gd_pcrel_hi", BFD_RELOC_RISCV_TLS_GD_HI20},
-  {"%hi", BFD_RELOC_RISCV_HI20},
+  {"tprel_hi", BFD_RELOC_RISCV_TPREL_HI20},
+  {"pcrel_hi", BFD_RELOC_RISCV_PCREL_HI20},
+  {"got_pcrel_hi", BFD_RELOC_RISCV_GOT_HI20},
+  {"tls_ie_pcrel_hi", BFD_RELOC_RISCV_TLS_GOT_HI20},
+  {"tls_gd_pcrel_hi", BFD_RELOC_RISCV_TLS_GD_HI20},
+  {"hi", BFD_RELOC_RISCV_HI20},
   {0, 0}
 };
 
 static const struct percent_op_match percent_op_itype[] =
 {
-  {"%lo", BFD_RELOC_RISCV_LO12_I},
-  {"%tprel_lo", BFD_RELOC_RISCV_TPREL_LO12_I},
-  {"%pcrel_lo", BFD_RELOC_RISCV_PCREL_LO12_I},
+  {"lo", BFD_RELOC_RISCV_LO12_I},
+  {"tprel_lo", BFD_RELOC_RISCV_TPREL_LO12_I},
+  {"pcrel_lo", BFD_RELOC_RISCV_PCREL_LO12_I},
   {0, 0}
 };
 
 static const struct percent_op_match percent_op_stype[] =
 {
-  {"%lo", BFD_RELOC_RISCV_LO12_S},
-  {"%tprel_lo", BFD_RELOC_RISCV_TPREL_LO12_S},
-  {"%pcrel_lo", BFD_RELOC_RISCV_PCREL_LO12_S},
+  {"lo", BFD_RELOC_RISCV_LO12_S},
+  {"tprel_lo", BFD_RELOC_RISCV_TPREL_LO12_S},
+  {"pcrel_lo", BFD_RELOC_RISCV_PCREL_LO12_S},
   {0, 0}
 };
 
 static const struct percent_op_match percent_op_rtype[] =
 {
-  {"%tprel_add", BFD_RELOC_RISCV_TPREL_ADD},
+  {"tprel_add", BFD_RELOC_RISCV_TPREL_ADD},
   {0, 0}
 };
 
@@ -2180,14 +2180,14 @@ parse_relocation (char **str, bfd_reloc_
 		  const struct percent_op_match *percent_op)
 {
   for ( ; percent_op->str; percent_op++)
-    if (strncasecmp (*str, percent_op->str, strlen (percent_op->str)) == 0)
+    if (strncasecmp (*str + 1, percent_op->str, strlen (percent_op->str)) == 0)
       {
-	int len = strlen (percent_op->str);
+	size_t len = 1 + strlen (percent_op->str);
 
 	if (!ISSPACE ((*str)[len]) && (*str)[len] != '(')
 	  continue;
 
-	*str += strlen (percent_op->str);
+	*str += len;
 	*reloc = percent_op->reloc;
 
 	/* Check whether the output BFD supports this relocation.


  reply	other threads:[~2023-03-10  9:25 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-10  9:23 [PATCH v2 0/7] RISC-V/gas: insn operand parsing Jan Beulich
2023-03-10  9:25 ` Jan Beulich [this message]
2023-03-10 11:24   ` [PATCH v2 1/7] RISC-V: minor effort reduction in relocation specifier parsing Jan Beulich
2023-03-10  9:26 ` [PATCH v2 2/7] RISC-V: drop "percent_op" parameter from my_getOpcodeExpression() Jan Beulich
2023-03-10  9:26 ` [PATCH v2 3/7] RISC-V: avoid redundant and misleading/wrong error messages Jan Beulich
2023-03-10  9:27 ` [PATCH v2 4/7] RISC-V: don't recognize bogus relocations Jan Beulich
2023-03-10  9:27 ` [PATCH v2 5/7] RISC-V: relax post-relocation-operator separator expectation Jan Beulich
2023-04-25  8:13   ` Nelson Chu
2023-04-25  8:37   ` Andreas Schwab
2023-04-25  8:44     ` Nelson Chu
2023-04-25  8:52       ` Jan Beulich
2023-04-28  1:29         ` Nelson Chu
2023-04-28  6:05           ` Jan Beulich
2023-04-28  8:03             ` Fangrui Song
2023-05-11 11:27     ` Jan Beulich
2023-03-10  9:27 ` [PATCH v2 6/7] RISC-V: test for expected / no unexpected symbols Jan Beulich
2023-03-10  9:28 ` [PATCH v2 7/7] RISC-V: adjust logic to avoid register name symbols Jan Beulich
2023-04-25  8:40 ` [PATCH v2 0/7] RISC-V/gas: insn operand parsing Nelson Chu

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