* [PATCH 1/3] MIPS: Fix test failure with FPXX GCC
@ 2021-03-08 4:30 YunQiang Su
2021-03-08 4:30 ` [PATCH 2/3] MIPS: default output r6 object if configured to r6 YunQiang Su
` (2 more replies)
0 siblings, 3 replies; 33+ messages in thread
From: YunQiang Su @ 2021-03-08 4:30 UTC (permalink / raw)
To: jiaxun.yang, macro; +Cc: binutils, syq, YunQiang Su
GCC can be configured as FPXX default, which requires MIPS II.
This make `as' (default to MIPS I) fails to run some test.
To fix this, we pass -mfp32 option to GCC.
ChangeLog:
2021-03-08 YunQiang Su <yunqiang.su@cipunited.com>
* ld/testsuite/ld-elf/elf.exp: Set "-mfp32" CFLAGS for mips32
* ld/testsuite/ld-elf/shared.exp: Likewise
* ld/testsuite/ld-elf/tls.exp: Likewise
* ld/testsuite/ld-elfvers/vers.exp: Likewise
---
ld/testsuite/ld-elf/elf.exp | 8 ++++++++
ld/testsuite/ld-elf/shared.exp | 5 +++++
ld/testsuite/ld-elf/tls.exp | 12 ++++++++++++
ld/testsuite/ld-elfvers/vers.exp | 7 +++++++
4 files changed, 32 insertions(+)
diff --git a/ld/testsuite/ld-elf/elf.exp b/ld/testsuite/ld-elf/elf.exp
index e98bffc0c5..37d49faa3c 100644
--- a/ld/testsuite/ld-elf/elf.exp
+++ b/ld/testsuite/ld-elf/elf.exp
@@ -421,6 +421,13 @@ run_cc_link_tests [list \
] \
]
+set old_cflags $CFLAGS
+if { [istarget "mips-*-*"]
+ || [istarget "mipsel-*-*"] } {
+ # the default target of as is MIPS I, which has no ldc1/sdc1
+ # the gcc may be set as fpxx/fp64 default, which require mips2+
+ append CFLAGS " -mfp32"
+}
run_ld_link_tests [list \
[list \
"Build pr26391-5.o" \
@@ -446,6 +453,7 @@ run_ld_link_tests [list \
"-ffunction-sections" \
] \
]
+set CFLAGS $old_cflags
run_ld_link_exec_tests [list \
[list \
diff --git a/ld/testsuite/ld-elf/shared.exp b/ld/testsuite/ld-elf/shared.exp
index 6bf49785a5..ef67e3b8e2 100644
--- a/ld/testsuite/ld-elf/shared.exp
+++ b/ld/testsuite/ld-elf/shared.exp
@@ -941,6 +941,10 @@ run_cc_link_tests [list \
] \
]
+set old_CFLAGS $CFLAGS
+if { [istarget "mips-*-*"] || [istarget "mipsel-*-*"] } {
+ append CFLAGS " -mfp32"
+}
run_ld_link_tests [list \
[list \
"pr22269-1 (static pie undefined weak)" \
@@ -953,6 +957,7 @@ run_ld_link_tests [list \
"-fPIE -O2 $NOSANITIZE_CFLAGS" \
] \
]
+set CFLAGS $old_CFLAGS
set run_tests [list \
[list "Run normal with libfoo.so" \
diff --git a/ld/testsuite/ld-elf/tls.exp b/ld/testsuite/ld-elf/tls.exp
index 1351a274cc..dfa3f50ecb 100644
--- a/ld/testsuite/ld-elf/tls.exp
+++ b/ld/testsuite/ld-elf/tls.exp
@@ -39,6 +39,15 @@ if [istarget "sparc*-*-*"] {
append AFLAGS_PIC " -K PIC -Av9"
}
+set old_CFLAGS $CFLAGS
+set old_ASFLAGS $ASFLAGS
+if [istarget "mips*-*"] {
+ # FIXME: gcc's bug, it always generate `rdhwr'
+ # even for target that has no such instrcution
+ append CFLAGS " -mfp32 -mips32r2 -mabi=32"
+ append ASFLAGS " -mips32r2"
+}
+
run_ld_link_tests [list \
[list \
"Build pr22263-1" \
@@ -51,3 +60,6 @@ run_ld_link_tests [list \
"-fPIE -O2 $NOSANITIZE_CFLAGS" \
] \
]
+
+set CFLAGS $old_CFLAGS
+set ASFLAGS $old_ASFLAGS
diff --git a/ld/testsuite/ld-elfvers/vers.exp b/ld/testsuite/ld-elfvers/vers.exp
index 8a1383fe84..63127a46d2 100644
--- a/ld/testsuite/ld-elfvers/vers.exp
+++ b/ld/testsuite/ld-elfvers/vers.exp
@@ -777,6 +777,11 @@ if { [istarget x86_64-*-linux*] \
set pic "no"
}
+set old_CFLAGS $CFLAGS
+if { [istarget "mips-*-*"] || [istarget "mipsel-*-*"] } {
+ append CFLAGS " -mfp32"
+}
+
#
# Basic test - build a library with versioned symbols.
#
@@ -1006,3 +1011,5 @@ build_vers_lib_pic "vers31" vers31.c vers31 "" vers31.map vers31.ver vers31.dsym
# Test #32 -- linker --defsym
build_vers_lib_pic "vers32a" vers32a.c vers32a "" vers32.map vers32a.ver vers32a.dsym ""
build_vers_lib_pic_flags "vers32b" vers32b.c vers32b "vers32a.so" vers32.map vers32b.ver vers32b.dsym "" "--defsym foo=0"
+
+set CFLAGS $old_CFLAGS
--
2.20.1
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH 2/3] MIPS: default output r6 object if configured to r6
2021-03-08 4:30 [PATCH 1/3] MIPS: Fix test failure with FPXX GCC YunQiang Su
@ 2021-03-08 4:30 ` YunQiang Su
2023-02-23 11:11 ` [PATCH] MIPS: support specify isa level when configure YunQiang Su
2021-03-08 4:30 ` [PATCH 3/3] MIPS: Fix testcase for MIPSr6 YunQiang Su
2021-03-19 5:47 ` 回复: [PATCH 1/3] MIPS: Fix test failure with FPXX GCC yunqiang.su
2 siblings, 1 reply; 33+ messages in thread
From: YunQiang Su @ 2021-03-08 4:30 UTC (permalink / raw)
To: jiaxun.yang, macro; +Cc: binutils, syq, YunQiang Su
From: YunQiang Su <ysu@wavecomp.com>
currently we find 2 usecases with problem:
1. mipsisa32r6el-linux-gnu-ld -r -b binary xx.dat -o xx.o
the output will be MIPS I, while we expect MIPS32r6.
2. mipsisa32r6el-linux-gnu-as -march=from-abi xx.s
the output will be MIPS I, while we expect MIPS32r6.
We found this problem when we build glib2.0, which use ld directly
to generate object file from data files.
ChangeLog:
2021-03-08 YunQiang Su <yunqiang.su@cipunited.com>
PR MIPS/25494
* bfd/config.bfd: set mips_default_r6 for mipsisa32/64r6
* bfd/configure: Regenerate.
* bfd/configure.ac: Define MIPS_DEFAULT_R6 for MIPSr6
* bfd/elfxx-mips.c (mips_set_isa_flags):
set isa flag to R6 if MIPS_DEFAULT_R6
* gas/config.in: Define MIPS_DEFAULT_R6
* gas/config/tc-mips.c (macro_build):
(mips_parse_cpu): set isa flag to R6 if MIPS_DEFAULT_R6
* gas/configure: Regenerate.
* gas/configure.ac: Define MIPS_DEFAULT_R6 for MIPSr6
* ld/testsuite/ld-mips-elf/mips-elf.exp: add New test.
* ld/testsuite/ld-mips-elf/convert-data-to-obj.dd: New test.
---
bfd/config.bfd | 5 +++++
bfd/configure | 1 +
bfd/configure.ac | 1 +
bfd/elfxx-mips.c | 6 ++++++
gas/config.in | 3 +++
gas/config/tc-mips.c | 19 +++++++++++++------
gas/configure | 13 +++++++++++++
gas/configure.ac | 10 ++++++++++
.../ld-mips-elf/convert-data-to-obj.dd | 5 +++++
ld/testsuite/ld-mips-elf/mips-elf.exp | 11 +++++++++++
10 files changed, 68 insertions(+), 6 deletions(-)
create mode 100644 ld/testsuite/ld-mips-elf/convert-data-to-obj.dd
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 9434fd6c7e..b99e126eee 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1432,6 +1432,11 @@ case "${targ_defvec} ${targ_selvecs}" in
want64=true
;;
esac
+case "${targ}" in
+ mipsisa32r6* | mipsisa64r6*)
+ mips_default_r6=true
+ ;;
+esac
case "${host64}${want64}" in
*true*)
diff --git a/bfd/configure b/bfd/configure
index accd39cc59..6817d0f018 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -14697,6 +14697,7 @@ do
TDEFINES="$TDEFINES $targ_cflags"
fi
done
+test -n "${mips_default_r6}" && TDEFINES="$TDEFINES -DMIPS_DEFAULT_R6=1"
# This processing still needs to be done if we're to decide properly whether
diff --git a/bfd/configure.ac b/bfd/configure.ac
index e9a07b8ff0..c0e0d1d682 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -382,6 +382,7 @@ do
TDEFINES="$TDEFINES $targ_cflags"
fi
done
+test -n "${mips_default_r6}" && TDEFINES="$TDEFINES -DMIPS_DEFAULT_R6=1"
AC_SUBST(TDEFINES)
# This processing still needs to be done if we're to decide properly whether
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 86e15b61ed..00f4745472 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -12220,9 +12220,15 @@ mips_set_isa_flags (bfd *abfd)
{
default:
if (ABI_N32_P (abfd) || ABI_64_P (abfd))
+#ifdef MIPS_DEFAULT_R6
+ val = E_MIPS_ARCH_64R6;
+ else
+ val = E_MIPS_ARCH_32R6;
+#else
val = E_MIPS_ARCH_3;
else
val = E_MIPS_ARCH_1;
+#endif
break;
case bfd_mach_mips3000:
diff --git a/gas/config.in b/gas/config.in
index bd125047d5..0e4ec1a2ac 100644
--- a/gas/config.in
+++ b/gas/config.in
@@ -213,6 +213,9 @@
/* Choose a default ABI for MIPS targets. */
#undef MIPS_DEFAULT_ABI
+/* Generate code for MIPSr6 by default on MIPS targets. */
+#undef MIPS_DEFAULT_R6
+
/* Define value for nds32_arch_name */
#undef NDS32_DEFAULT_ARCH_NAME
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 538b69710f..d2b1749e60 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -9081,7 +9081,7 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
|| *r == BFD_RELOC_HI16_S
|| *r == BFD_RELOC_LO16
|| *r == BFD_RELOC_MIPS_GOT_OFST
- || (mips_opts.micromips
+ || ((mips_opts.micromips || ISA_IS_R6 (mips_opts.isa))
&& (*r == BFD_RELOC_16
|| *r == BFD_RELOC_MIPS_GOT16
|| *r == BFD_RELOC_MIPS_CALL16
@@ -20229,6 +20229,13 @@ static const struct mips_cpu_info *
mips_parse_cpu (const char *option, const char *cpu_string)
{
const struct mips_cpu_info *p;
+#if MIPS_DEFAULT_R6
+ int default_isa32 = ISA_MIPS32R6;
+ int default_isa64 = ISA_MIPS64R6;
+#else
+ int default_isa32 = ISA_MIPS1;
+ int default_isa64 = ISA_MIPS3;
+#endif
/* 'from-abi' selects the most compatible architecture for the given
ABI: MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs. For the
@@ -20243,18 +20250,18 @@ mips_parse_cpu (const char *option, const char *cpu_string)
if (strcasecmp (cpu_string, "from-abi") == 0)
{
if (ABI_NEEDS_32BIT_REGS (mips_abi))
- return mips_cpu_info_from_isa (ISA_MIPS1);
+ return mips_cpu_info_from_isa (default_isa32);
if (ABI_NEEDS_64BIT_REGS (mips_abi))
- return mips_cpu_info_from_isa (ISA_MIPS3);
+ return mips_cpu_info_from_isa (default_isa64);
if (file_mips_opts.gp >= 0)
return mips_cpu_info_from_isa (file_mips_opts.gp == 32
- ? ISA_MIPS1 : ISA_MIPS3);
+ ? default_isa32 : default_isa64);
return mips_cpu_info_from_isa (MIPS_DEFAULT_64BIT
- ? ISA_MIPS3
- : ISA_MIPS1);
+ ? default_isa64
+ : default_isa32);
}
/* 'default' has traditionally been a no-op. Probably not very useful. */
diff --git a/gas/configure b/gas/configure
index 5965f2bc24..7c66b76469 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12850,6 +12850,14 @@ _ACEOF
mips_default_abi=NO_ABI
;;
esac
+ case ${target} in
+ mipsisa32r6* | mipsisa64r6*)
+ mips_default_r6=1
+ ;;
+ *)
+ mips_default_r6=0
+ ;;
+ esac
cat >>confdefs.h <<_ACEOF
#define MIPS_CPU_STRING_DEFAULT "$mips_cpu"
@@ -12870,6 +12878,11 @@ cat >>confdefs.h <<_ACEOF
#define MIPS_DEFAULT_ABI $mips_default_abi
_ACEOF
+
+cat >>confdefs.h <<_ACEOF
+#define MIPS_DEFAULT_R6 $mips_default_r6
+_ACEOF
+
;;
esac
diff --git a/gas/configure.ac b/gas/configure.ac
index 6a96bb70d7..a279feca23 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -398,6 +398,14 @@ changequote([,])dnl
mips_default_abi=NO_ABI
;;
esac
+ case ${target} in
+ mipsisa32r6* | mipsisa64r6*)
+ mips_default_r6=1
+ ;;
+ *)
+ mips_default_r6=0
+ ;;
+ esac
AC_DEFINE_UNQUOTED(MIPS_CPU_STRING_DEFAULT, "$mips_cpu",
[Default CPU for MIPS targets. ])
AC_DEFINE_UNQUOTED(USE_E_MIPS_ABI_O32, $use_e_mips_abi_o32,
@@ -406,6 +414,8 @@ changequote([,])dnl
[Generate 64-bit code by default on MIPS targets. ])
AC_DEFINE_UNQUOTED(MIPS_DEFAULT_ABI, $mips_default_abi,
[Choose a default ABI for MIPS targets. ])
+ AC_DEFINE_UNQUOTED(MIPS_DEFAULT_R6, $mips_default_r6,
+ [Choose default ISA as r6 by default. ])
;;
esac
diff --git a/ld/testsuite/ld-mips-elf/convert-data-to-obj.dd b/ld/testsuite/ld-mips-elf/convert-data-to-obj.dd
new file mode 100644
index 0000000000..03cfe9f80c
--- /dev/null
+++ b/ld/testsuite/ld-mips-elf/convert-data-to-obj.dd
@@ -0,0 +1,5 @@
+
+.*: +file format .*mips.*
+architecture: mips:isa..r6, flags 0x000.*:
+HAS_SYMS.*
+start address 0x.*
diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp
index 958eac261e..1eb9dd271f 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -137,6 +137,7 @@ set has_abi(eabi) [expr [istarget *-*-elf] \
set irix [expr [istarget *-*-irix*]]
set linux_gnu [expr [istarget mips*-*-linux*]]
set embedded_elf [expr [istarget mips*-*-elf]]
+set is_r6 [expr [istarget mipsisa*r6*-*]]
# Set defaults.
set abi_asflags(o32) ""
@@ -766,6 +767,16 @@ if {$linux_gnu} {
run_ld_link_tests $eh_frame5_test
}
+if {$is_r6} {
+ run_ld_link_tests {
+ {"Convert data to object (MIPSr6)"
+ "-r -b binary config.log tmpdir/config.log.o" ""
+ "" {}
+ {{objdump -f convert-data-to-obj.dd}}
+ "config.log.o"}
+ }
+}
+
if {$embedded_elf} {
run_dump_test "compact-eh1"
run_dump_test "compact-eh2"
--
2.20.1
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH 3/3] MIPS: Fix testcase for MIPSr6
2021-03-08 4:30 [PATCH 1/3] MIPS: Fix test failure with FPXX GCC YunQiang Su
2021-03-08 4:30 ` [PATCH 2/3] MIPS: default output r6 object if configured to r6 YunQiang Su
@ 2021-03-08 4:30 ` YunQiang Su
2021-03-19 5:47 ` 回复: [PATCH 1/3] MIPS: Fix test failure with FPXX GCC yunqiang.su
2 siblings, 0 replies; 33+ messages in thread
From: YunQiang Su @ 2021-03-08 4:30 UTC (permalink / raw)
To: jiaxun.yang, macro; +Cc: binutils, syq, YunQiang Su
From: YunQiang Su <ysu@wavecomp.com>
The major changes include:
1. disable microMIPS and MIPS16 for r6
2. FP64 only support for 32r6, so Tag_GNU_MIPS_ABI_FP changes
3. Encoding for jr changed: 03e00008 -> 03e00009
4. Some insn removed: jalx, eva, lwl, addi
5. MIPSr6 supports NAN2008 only, so drop lagacy nan tests
ChangeLog:
2021-03-08 YunQiang Su <yunqiang.su@cipunited.com>
* binutils/testsuite/binutils-all/mips/global-local-symtab-final-n32.d:
remove -mips3, since it conflicts with -march=from-abi for r6.
* binutils/testsuite/binutils-all/mips/global-local-symtab-final-n64.d: Likewise
* binutils/testsuite/binutils-all/mips/global-local-symtab-n32.d: Likewise
* binutils/testsuite/binutils-all/mips/global-local-symtab-n32t.d: Likewise
* binutils/testsuite/binutils-all/mips/global-local-symtab-n64.d: Likewise
* binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32.d: Likewise
* binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32t.d: Likewise
* binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64.d: Likewise
* binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64t.d: Likewise
* binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d: R6 encoding changes
* binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d: Likewise
* binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d: Likewise
* binutils/testsuite/binutils-all/mips/mips.exp: disable mips16 for r6
* gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d: r6 support FP64 only
* gas/testsuite/gas/mips/branch-section-1.d: r6 encoding changes
* gas/testsuite/gas/mips/branch-section-3.d: Likewise
* gas/testsuite/gas/mips/branch-weak-1.d: Likewise
* gas/testsuite/gas/mips/elf-rel.s: r6 removes addi
* gas/testsuite/gas/mips/elfel-rel.d: Likewise
* gas/testsuite/gas/mips/mips.exp: Disable some tests for r6
* gas/testsuite/gas/mips/mipsr6@beq.d: New test for R6.
* gas/testsuite/gas/mips/mipsr6@cache.d: Likewise
* gas/testsuite/gas/mips/mipsr6@hwr-names.d: Likewise
* gas/testsuite/gas/mips/mipsr6@mips32.d: Likewise
* gas/testsuite/gas/mips/mipsr6@pref.d: Likewise
* gas/testsuite/gas/mips/option-pic-1.d: r6 encoding changes
* ld/testsuite/ld-mips-elf/attr-gnu-4-01.d: r6 support FP64 only
* ld/testsuite/ld-mips-elf/attr-gnu-4-11.d: Likewise
* ld/testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise
* ld/testsuite/ld-mips-elf/attr-gnu-8-00.d: Likewise
* ld/testsuite/ld-mips-elf/attr-gnu-8-01.d: Likewise
* ld/testsuite/ld-mips-elf/attr-gnu-8-02.d: Likewise
* ld/testsuite/ld-mips-elf/attr-gnu-8-10.d: Likewise
* ld/testsuite/ld-mips-elf/attr-gnu-8-11.d: Likewise
* ld/testsuite/ld-mips-elf/attr-gnu-8-20.d: Likewise
* ld/testsuite/ld-mips-elf/attr-gnu-8-22.d: Likewise
* ld/testsuite/ld-mips-elf/emit-relocs-1.d: r6 encoding changes
* ld/testsuite/ld-mips-elf/export-class-call16-n32.dd: Likewise
* ld/testsuite/ld-mips-elf/export-class-call16-n64.dd: Likewise
* ld/testsuite/ld-mips-elf/export-class-call16-o32.dd: Likewise
* ld/testsuite/ld-mips-elf/gp-disp-sym.s: r6 removes addi
* ld/testsuite/ld-mips-elf/jalr3.dd: r6 encoding changes
* ld/testsuite/ld-mips-elf/jalr4.dd: Likewise
* ld/testsuite/ld-mips-elf/mips-elf.exp:
use var abi_as64flags instead of hardcoded -mips3
disable test not suitable for r6
* ld/testsuite/ld-mips-elf/n64-plt-1.dd: r6 encoding changes
* ld/testsuite/ld-mips-elf/n64-plt-4.dd: Likewise
* ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d: Likewise
---
.../mips/global-local-symtab-final-n32.d | 2 +-
.../mips/global-local-symtab-final-n64.d | 2 +-
.../mips/global-local-symtab-n32.d | 2 +-
.../mips/global-local-symtab-n32t.d | 2 +-
.../mips/global-local-symtab-n64.d | 2 +-
.../mips/global-local-symtab-sort-n32.d | 2 +-
.../mips/global-local-symtab-sort-n32t.d | 2 +-
.../mips/global-local-symtab-sort-n64.d | 2 +-
.../mips/global-local-symtab-sort-n64t.d | 2 +-
.../binutils-all/mips/mips-xpa-virt-1.d | 8 +-
.../binutils-all/mips/mips-xpa-virt-2.d | 4 +-
.../binutils-all/mips/mips-xpa-virt-3.d | 4 +-
binutils/testsuite/binutils-all/mips/mips.exp | 4 +
gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d | 2 +-
gas/testsuite/gas/mips/branch-section-1.d | 2 +-
gas/testsuite/gas/mips/branch-section-3.d | 2 +-
gas/testsuite/gas/mips/branch-weak-1.d | 2 +-
gas/testsuite/gas/mips/elf-rel.s | 36 +-
gas/testsuite/gas/mips/elfel-rel.d | 12 +-
gas/testsuite/gas/mips/mips.exp | 969 ++++++++++--------
gas/testsuite/gas/mips/mipsr6@beq.d | 2 +-
gas/testsuite/gas/mips/mipsr6@cache.d | 2 +-
gas/testsuite/gas/mips/mipsr6@hwr-names.d | 2 +-
gas/testsuite/gas/mips/mipsr6@mips32.d | 4 +-
gas/testsuite/gas/mips/mipsr6@pref.d | 2 +-
gas/testsuite/gas/mips/option-pic-1.d | 2 +-
ld/testsuite/ld-mips-elf/attr-gnu-4-01.d | 1 +
ld/testsuite/ld-mips-elf/attr-gnu-4-11.d | 1 +
ld/testsuite/ld-mips-elf/attr-gnu-4-41.d | 1 +
ld/testsuite/ld-mips-elf/attr-gnu-8-00.d | 2 +-
ld/testsuite/ld-mips-elf/attr-gnu-8-01.d | 2 +-
ld/testsuite/ld-mips-elf/attr-gnu-8-02.d | 2 +-
ld/testsuite/ld-mips-elf/attr-gnu-8-10.d | 2 +-
ld/testsuite/ld-mips-elf/attr-gnu-8-11.d | 2 +-
ld/testsuite/ld-mips-elf/attr-gnu-8-20.d | 2 +-
ld/testsuite/ld-mips-elf/attr-gnu-8-22.d | 2 +-
ld/testsuite/ld-mips-elf/emit-relocs-1.d | 2 +-
.../ld-mips-elf/export-class-call16-n32.dd | 8 +-
.../ld-mips-elf/export-class-call16-n64.dd | 8 +-
.../ld-mips-elf/export-class-call16-o32.dd | 8 +-
ld/testsuite/ld-mips-elf/gp-disp-sym.s | 2 +-
ld/testsuite/ld-mips-elf/jalr3.dd | 2 +-
ld/testsuite/ld-mips-elf/jalr4.dd | 8 +-
ld/testsuite/ld-mips-elf/mips-elf.exp | 309 +++---
ld/testsuite/ld-mips-elf/n64-plt-1.dd | 2 +-
ld/testsuite/ld-mips-elf/n64-plt-4.dd | 2 +-
ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d | 2 +-
47 files changed, 782 insertions(+), 665 deletions(-)
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-final-n32.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-final-n32.d
index 0623ddc7b2..1ae6f88fe0 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-final-n32.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-final-n32.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS symbol table sort and section symbol names (fully linked) (n32)
-#as: -n32 -mno-pdr -mips3
+#as: -n32 -mno-pdr
#ld: -e 0 -T ../../../../ld/testsuite/ld-mips-elf/global-local-symtab.ld
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -s
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-final-n64.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-final-n64.d
index eaee0081fb..6ec2f4cac3 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-final-n64.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-final-n64.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS symbol table sort and section symbol names (fully linked) (n64)
-#as: -64 -mno-pdr -mips3
+#as: -64 -mno-pdr
#ld: -e 0 -T ../../../../ld/testsuite/ld-mips-elf/global-local-symtab.ld
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -s
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-n32.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-n32.d
index ef48105afd..fb6f9f1df1 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-n32.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-n32.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS global/local symbol table split (n32)
-#as: -n32 -mno-pdr -mips3
+#as: -n32 -mno-pdr
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -S
#source: ../../../../gas/testsuite/gas/mips/global-local-symtab.s
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-n32t.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-n32t.d
index b44891f067..d6348fa29e 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-n32t.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-n32t.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS global/local symbol table split (n32)
-#as: -n32 -mno-pdr -mips3
+#as: -n32 -mno-pdr
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -S
#source: ../../../../gas/testsuite/gas/mips/global-local-symtab.s
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-n64.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-n64.d
index a170d74ce5..f54ac01118 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-n64.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-n64.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS global/local symbol table split (n64)
-#as: -64 -mno-pdr -mips3
+#as: -64 -mno-pdr
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -SW
#source: ../../../../gas/testsuite/gas/mips/global-local-symtab.s
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32.d
index 818d7919d4..d9e24b8e67 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS symbol table sort and section symbol names (relocatable) (n32)
-#as: -n32 -mno-pdr -mips3
+#as: -n32 -mno-pdr
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -s
#source: ../../../../gas/testsuite/gas/mips/global-local-symtab.s
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32t.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32t.d
index a6f6548c77..5e8837fd81 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32t.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n32t.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS symbol table sort and section symbol names (relocatable) (n32)
-#as: -n32 -mno-pdr -mips3
+#as: -n32 -mno-pdr
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -s
#source: ../../../../gas/testsuite/gas/mips/global-local-symtab.s
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64.d
index dcb5c23c7d..13e3f33a82 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS symbol table sort and section symbol names (relocatable) (n64)
-#as: -64 -mno-pdr -mips3
+#as: -64 -mno-pdr
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -s
#source: ../../../../gas/testsuite/gas/mips/global-local-symtab.s
diff --git a/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64t.d b/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64t.d
index e38f78909a..8db5a2e2f0 100644
--- a/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64t.d
+++ b/binutils/testsuite/binutils-all/mips/global-local-symtab-sort-n64t.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#DUMPPROG: readelf
#name: MIPS symbol table sort and section symbol names (relocatable) (n64)
-#as: -64 -mno-pdr -mips3
+#as: -64 -mno-pdr
#objcopy: -j .data -j .symtab -j .strtab -j .shstrtab
#readelf: -s
#source: ../../../../gas/testsuite/gas/mips/global-local-symtab.s
diff --git a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d
index 1bb38ac0c4..0202fd5a98 100644
--- a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d
+++ b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d
@@ -6,8 +6,8 @@
.*: +file format .*mips.*
Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 40020800 mfc0 v0,c0_random
-[0-9a-f]+ <[^>]*> 40420800 cfc0 v0,c0_random
-[0-9a-f]+ <[^>]*> 40620800 0x40620800
-[0-9a-f]+ <[^>]*> 40620c00 0x40620c00
+[0-9a-f]+ <[^>]*> 40020800 (mfc0|mfhc0) v0,c0_random
+[0-9a-f]+ <[^>]*> 40420800 (cfc0|mfhc0) v0,c0_random
+[0-9a-f]+ <[^>]*> 40620800 (0x40620800|mfgc0[\t ]+v0,c0_random)
+[0-9a-f]+ <[^>]*> 40620c00 (0x40620c00|mfhgc0[\t ]+v0,c0_random)
\.\.\.
diff --git a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d
index 58bd5fa9bf..311fa34ed2 100644
--- a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d
+++ b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d
@@ -8,6 +8,6 @@
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 40020800 mfc0 v0,c0_random
[0-9a-f]+ <[^>]*> 40420800 mfhc0 v0,c0_random
-[0-9a-f]+ <[^>]*> 40620800 0x40620800
-[0-9a-f]+ <[^>]*> 40620c00 0x40620c00
+[0-9a-f]+ <[^>]*> 40620800 (0x40620800|mfgc0[\t ]+v0,c0_random)
+[0-9a-f]+ <[^>]*> 40620c00 (0x40620c00|mfhgc0[\t ]+v0,c0_random)
\.\.\.
diff --git a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d
index f42f7d71ae..23878fb452 100644
--- a/binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d
+++ b/binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d
@@ -7,7 +7,7 @@
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 40020800 mfc0 v0,c0_random
-[0-9a-f]+ <[^>]*> 40420800 cfc0 v0,c0_random
+[0-9a-f]+ <[^>]*> 40420800 (cfc0|mfhc0) v0,c0_random
[0-9a-f]+ <[^>]*> 40620800 mfgc0 v0,c0_random
-[0-9a-f]+ <[^>]*> 40620c00 0x40620c00
+[0-9a-f]+ <[^>]*> 40620c00 (0x40620c00|mfhgc0[\t ]+v0,c0_random)
\.\.\.
diff --git a/binutils/testsuite/binutils-all/mips/mips.exp b/binutils/testsuite/binutils-all/mips/mips.exp
index bcda9bf901..687c57b791 100644
--- a/binutils/testsuite/binutils-all/mips/mips.exp
+++ b/binutils/testsuite/binutils-all/mips/mips.exp
@@ -219,6 +219,7 @@ if {[istarget *-*-openbsd*] } {
set irixemul 1
}
set tmips [expr $irixemul ? {""} : {"t"}]
+set is_r6 [expr [istarget mipsisa*r6*-*]]
run_dump_test_o32 "mips-ase-1"
run_dump_test_o32 "mips-ase-2"
@@ -227,6 +228,8 @@ run_dump_test "mips-xpa-virt-1"
run_dump_test "mips-xpa-virt-2"
run_dump_test "mips-xpa-virt-3"
run_dump_test "mips-xpa-virt-4"
+
+if { !$is_r6 } {
run_dump_test_o32 "mixed-mips16" noarch
run_dump_test_o32 "mixed-micromips" noarch
run_dump_test "mixed-mips16-micromips"
@@ -238,6 +241,7 @@ run_dump_test_o32 "mips16-extend-insn" noarch
run_dump_test_o32 "mips16e2-extend-insn" noarch
run_dump_test_o32 "mips16-alias" noarch
run_dump_test_o32 "mips16-noalias" noarch
+}
run_dump_test_o32 "mips-note-2"
run_dump_test_n32 "mips-note-2-n32"
diff --git a/gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d b/gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d
index 97fc8bf3f4..4a42b844a6 100644
--- a/gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d
+++ b/gas/testsuite/gas/mips/attr-gnu-abi-msa-1.d
@@ -4,7 +4,7 @@
Attribute Section: gnu
File Attributes
- Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+ Tag_GNU_MIPS_ABI_FP: Hard float \((double precision|32-bit CPU, 64-bit FPU)\)
Tag_GNU_MIPS_ABI_MSA: 128-bit MSA
#...
diff --git a/gas/testsuite/gas/mips/branch-section-1.d b/gas/testsuite/gas/mips/branch-section-1.d
index 7782d0c075..08c678d27e 100644
--- a/gas/testsuite/gas/mips/branch-section-1.d
+++ b/gas/testsuite/gas/mips/branch-section-1.d
@@ -12,6 +12,6 @@ Disassembly of section \.text:
\.\.\.
Disassembly of section \.init:
-[0-9a-f]+ <[^>]*> 03e00008 jr ra
+[0-9a-f]+ <[^>]*> 03e0000[89] jr ra
[0-9a-f]+ <[^>]*> 00000000 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-section-3.d b/gas/testsuite/gas/mips/branch-section-3.d
index b10fcde731..8276316553 100644
--- a/gas/testsuite/gas/mips/branch-section-3.d
+++ b/gas/testsuite/gas/mips/branch-section-3.d
@@ -13,6 +13,6 @@ Disassembly of section \.text:
\.\.\.
Disassembly of section \.init:
-[0-9a-f]+ <[^>]*> 03e00008 jr ra
+[0-9a-f]+ <[^>]*> 03e0000[89] jr ra
[0-9a-f]+ <[^>]*> 00000000 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-weak-1.d b/gas/testsuite/gas/mips/branch-weak-1.d
index 859a2ca69f..349b5d96c8 100644
--- a/gas/testsuite/gas/mips/branch-weak-1.d
+++ b/gas/testsuite/gas/mips/branch-weak-1.d
@@ -10,6 +10,6 @@ Disassembly of section \.text:
[ ]*[0-9a-f]+: R_MIPS_PC16 bar
[0-9a-f]+ <[^>]*> 00000000 nop
\.\.\.
-[0-9a-f]+ <[^>]*> 03e00008 jr ra
+[0-9a-f]+ <[^>]*> 03e0000[89] jr ra
[0-9a-f]+ <[^>]*> 00000000 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/elf-rel.s b/gas/testsuite/gas/mips/elf-rel.s
index 873bc5fd86..06c67a659b 100644
--- a/gas/testsuite/gas/mips/elf-rel.s
+++ b/gas/testsuite/gas/mips/elf-rel.s
@@ -12,12 +12,12 @@ l2 = l0+49150
lui $at,%hi(l0-4)
lui $at,%hi(l1+0x8000)
l1:
- addi $at,$at,%lo(l1)
- addi $at,$at,%lo(l1+0x10004)
- addi $at,$at,%lo(l1+0x10000)
- addi $at,$at,%lo(l1+4)
- addi $at,$at,%lo(l1+0x8000)
- addi $at,$at,%lo(l0-4)
+ addiu $at,$at,%lo(l1)
+ addiu $at,$at,%lo(l1+0x10004)
+ addiu $at,$at,%lo(l1+0x10000)
+ addiu $at,$at,%lo(l1+4)
+ addiu $at,$at,%lo(l1+0x8000)
+ addiu $at,$at,%lo(l0-4)
lui $at,%hi(l2)
lui $at,%hi(l2+4)
@@ -25,12 +25,12 @@ l1:
lui $at,%hi(l2+0x10004)
lui $at,%hi(l2-4)
lui $at,%hi(l2+0x8000)
- addi $at,$at,%lo(l2)
- addi $at,$at,%lo(l2+4)
- addi $at,$at,%lo(l2+0x10000)
- addi $at,$at,%lo(l2+0x10004)
- addi $at,$at,%lo(l2+0x8000)
- addi $at,$at,%lo(l2-4)
+ addiu $at,$at,%lo(l2)
+ addiu $at,$at,%lo(l2+4)
+ addiu $at,$at,%lo(l2+0x10000)
+ addiu $at,$at,%lo(l2+0x10004)
+ addiu $at,$at,%lo(l2+0x8000)
+ addiu $at,$at,%lo(l2-4)
lui $at,%hi((l2))
lui $at,%hi(((l2+4)))
@@ -38,9 +38,9 @@ l1:
lui $at,%hi(((((l2+0x10004)))))
lui $at,%hi((((((l2-4))))))
lui $at,%hi(((((((l2+0x8000)))))))
- addi $at,$at,%lo((l2))
- addi $at,$at,%lo(((l2+4)))
- addi $at,$at,%lo((((l2+0x10000))))
- addi $at,$at,%lo(((((l2+0x10004)))))
- addi $at,$at,%lo((((((l2+0x8000))))))
- addi $at,$at,%lo(((((((l2-4)))))))
+ addiu $at,$at,%lo((l2))
+ addiu $at,$at,%lo(((l2+4)))
+ addiu $at,$at,%lo((((l2+0x10000))))
+ addiu $at,$at,%lo(((((l2+0x10004)))))
+ addiu $at,$at,%lo((((((l2+0x8000))))))
+ addiu $at,$at,%lo(((((((l2-4)))))))
diff --git a/gas/testsuite/gas/mips/elfel-rel.d b/gas/testsuite/gas/mips/elfel-rel.d
index bac44edbef..c6b2b10cee 100644
--- a/gas/testsuite/gas/mips/elfel-rel.d
+++ b/gas/testsuite/gas/mips/elfel-rel.d
@@ -49,12 +49,12 @@ OFFSET [ ]+ TYPE VALUE
Contents of section \.text:
0000 0000013c 0000013c 0100013c 0100013c .*
- 0010 0000013c 0100013c 18002120 1c002120 .*
- 0020 18002120 1c002120 18802120 fcff2120 .*
+ 0010 0000013c 0100013c 18002124 1c002124 .*
+ 0020 18002124 1c002124 18802124 fcff2124 .*
0030 0100013c 0100013c 0200013c 0200013c .*
- 0040 0100013c 0100013c febf2120 02c02120 .*
- 0050 febf2120 02c02120 fe3f2120 fabf2120 .*
+ 0040 0100013c 0100013c febf2124 02c02124 .*
+ 0050 febf2124 02c02124 fe3f2124 fabf2124 .*
0060 0100013c 0100013c 0200013c 0200013c .*
- 0070 0100013c 0100013c febf2120 02c02120 .*
- 0080 febf2120 02c02120 fe3f2120 fabf2120 .*
+ 0070 0100013c 0100013c febf2124 02c02124 .*
+ 0080 febf2124 02c02124 fe3f2124 fabf2124 .*
#pass
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index d021f05a12..895f556650 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -560,6 +560,7 @@ if { [istarget mips*-*-vxworks*] } {
set has_newabi [expr [istarget *-*-irix6*] || [istarget mips*-*-linux*] \
|| [istarget mips*-sde-elf*] || [istarget mips*-mti-elf*] \
|| [istarget mips*-img-elf*]]
+ set is_r6 [expr [istarget mipsisa*r6*-*]]
if { [istarget "mips*-*-*linux*"]
|| [istarget "mips*-sde-elf*"]
@@ -620,101 +621,105 @@ if { [istarget mips*-*-vxworks*] } {
# close below 4096 as this is the default obstack size limit that
# we use and some space will have been already consumed. The exact
# amount depends on the host's programming model.
- for { set count 960 } { $count <= 1024 } { incr count } {
- run_list_test "branch-swap-2" "--defsym count=$count" \
- "MIPS branch swapping ($count)"
+ #FIXME: currently R6 cannot work with microMIPS
+ if { !$is_r6 } {
+ for { set count 960 } { $count <= 1024 } { incr count } {
+ run_list_test "branch-swap-2" "--defsym count=$count" \
+ "MIPS branch swapping ($count)"
+ }
}
run_dump_test_arches "branch-swap-3" [mips_arch_list_all]
run_dump_test_arches "branch-swap-4" [mips_arch_list_all]
run_dump_test "branch-section-1"
- run_dump_test "branch-section-2"
- run_dump_test "branch-section-3"
- run_dump_test "branch-section-4"
- run_dump_test "branch-extern-1"
- run_dump_test "branch-extern-2"
- run_dump_test "branch-extern-3"
- run_dump_test "branch-extern-4"
run_dump_test "branch-weak-1"
- run_dump_test "branch-weak-2"
- run_dump_test "branch-weak-3"
- run_dump_test "branch-weak-4"
- run_dump_test "branch-weak-5"
- run_dump_test "branch-weak-6"
- run_dump_test "branch-weak-7"
- run_dump_test "branch-local-1"
- run_dump_test "branch-local-2"
- run_dump_test "branch-local-ignore-2"
- run_dump_test "branch-local-3"
- run_dump_test "branch-local-ignore-3"
- run_dump_test "branch-local-4"
- run_dump_test "branch-local-5"
- run_dump_test "branch-local-ignore-5"
- run_dump_test "branch-local-6"
- run_dump_test "branch-local-ignore-6"
- run_dump_test "branch-local-7"
- if $has_newabi {
- run_dump_test "branch-local-n32-1"
- run_dump_test "branch-local-n32-2"
- run_dump_test "branch-local-ignore-n32-2"
- run_dump_test "branch-local-n32-3"
- run_dump_test "branch-local-ignore-n32-3"
- run_dump_test "branch-local-n32-4"
- run_dump_test "branch-local-n32-5"
- run_dump_test "branch-local-ignore-n32-5"
- run_dump_test "branch-local-n32-6"
- run_dump_test "branch-local-ignore-n32-6"
- run_dump_test "branch-local-n32-7"
- run_dump_test "branch-local-n64-1"
- run_dump_test "branch-local-n64-2"
- run_dump_test "branch-local-ignore-n64-2"
- run_dump_test "branch-local-n64-3"
- run_dump_test "branch-local-ignore-n64-3"
- run_dump_test "branch-local-n64-4"
- run_dump_test "branch-local-n64-5"
- run_dump_test "branch-local-ignore-n64-5"
- run_dump_test "branch-local-n64-6"
- run_dump_test "branch-local-ignore-n64-6"
- run_dump_test "branch-local-n64-7"
- }
- run_dump_test "branch-addend"
- run_dump_test "branch-addend-micromips"
- if $has_newabi {
- run_dump_test "branch-addend-n32"
- run_dump_test "branch-addend-micromips-n32"
- run_dump_test "branch-addend-n64"
- run_dump_test "branch-addend-micromips-n64"
- }
- run_dump_test "branch-absolute"
- run_dump_test "branch-absolute-addend"
- if $has_newabi {
- run_dump_test "branch-absolute-n32"
- run_dump_test "branch-absolute-addend-n32"
- run_dump_test "branch-absolute-n64"
- run_dump_test "branch-absolute-addend-n64"
+ if { !$is_r6 } {
+ run_dump_test "branch-section-2"
+ run_dump_test "branch-section-3"
+ run_dump_test "branch-section-4"
+ run_dump_test "branch-extern-1"
+ run_dump_test "branch-extern-2"
+ run_dump_test "branch-extern-3"
+ run_dump_test "branch-extern-4"
+ run_dump_test "branch-weak-2"
+ run_dump_test "branch-weak-3"
+ run_dump_test "branch-weak-4"
+ run_dump_test "branch-weak-5"
+ run_dump_test "branch-weak-6"
+ run_dump_test "branch-weak-7"
+ run_dump_test "branch-local-1"
+ run_dump_test "branch-local-2"
+ run_dump_test "branch-local-ignore-2"
+ run_dump_test "branch-local-3"
+ run_dump_test "branch-local-ignore-3"
+ run_dump_test "branch-local-4"
+ run_dump_test "branch-local-5"
+ run_dump_test "branch-local-ignore-5"
+ run_dump_test "branch-local-6"
+ run_dump_test "branch-local-ignore-6"
+ run_dump_test "branch-local-7"
+ if $has_newabi {
+ run_dump_test "branch-local-n32-1"
+ run_dump_test "branch-local-n32-2"
+ run_dump_test "branch-local-ignore-n32-2"
+ run_dump_test "branch-local-n32-3"
+ run_dump_test "branch-local-ignore-n32-3"
+ run_dump_test "branch-local-n32-4"
+ run_dump_test "branch-local-n32-5"
+ run_dump_test "branch-local-ignore-n32-5"
+ run_dump_test "branch-local-n32-6"
+ run_dump_test "branch-local-ignore-n32-6"
+ run_dump_test "branch-local-n32-7"
+ run_dump_test "branch-local-n64-1"
+ run_dump_test "branch-local-n64-2"
+ run_dump_test "branch-local-ignore-n64-2"
+ run_dump_test "branch-local-n64-3"
+ run_dump_test "branch-local-ignore-n64-3"
+ run_dump_test "branch-local-n64-4"
+ run_dump_test "branch-local-n64-5"
+ run_dump_test "branch-local-ignore-n64-5"
+ run_dump_test "branch-local-n64-6"
+ run_dump_test "branch-local-ignore-n64-6"
+ run_dump_test "branch-local-n64-7"
+ }
+ run_dump_test "branch-addend"
+ run_dump_test "branch-addend-micromips"
+ if $has_newabi {
+ run_dump_test "branch-addend-n32"
+ run_dump_test "branch-addend-micromips-n32"
+ run_dump_test "branch-addend-n64"
+ run_dump_test "branch-addend-micromips-n64"
+ }
+ run_dump_test "branch-absolute"
+ run_dump_test "branch-absolute-addend"
+ if $has_newabi {
+ run_dump_test "branch-absolute-n32"
+ run_dump_test "branch-absolute-addend-n32"
+ run_dump_test "branch-absolute-n64"
+ run_dump_test "branch-absolute-addend-n64"
+ }
+
+ run_dump_test "compact-eh-eb-1"
+ run_dump_test "compact-eh-eb-2"
+ run_dump_test "compact-eh-eb-3"
+ run_dump_test "compact-eh-eb-4"
+ run_dump_test "compact-eh-eb-5"
+ run_dump_test "compact-eh-eb-6"
+ run_dump_test "compact-eh-eb-7"
+ run_dump_test "compact-eh-el-1"
+ run_dump_test "compact-eh-el-2"
+ run_dump_test "compact-eh-el-3"
+ run_dump_test "compact-eh-el-4"
+ run_dump_test "compact-eh-el-5"
+ run_dump_test "compact-eh-el-6"
+ run_dump_test "compact-eh-el-7"
+ run_list_test "compact-eh-err1"
+ run_list_test "compact-eh-err2"
}
run_dump_test_arches "nal-1" [mips_arch_list_matching mips1 !micromips]
run_dump_test_arches "nal-2" [mips_arch_list_matching mips1 !micromips]
-
- run_dump_test "compact-eh-eb-1"
- run_dump_test "compact-eh-eb-2"
- run_dump_test "compact-eh-eb-3"
- run_dump_test "compact-eh-eb-4"
- run_dump_test "compact-eh-eb-5"
- run_dump_test "compact-eh-eb-6"
- run_dump_test "compact-eh-eb-7"
- run_dump_test "compact-eh-el-1"
- run_dump_test "compact-eh-el-2"
- run_dump_test "compact-eh-el-3"
- run_dump_test "compact-eh-el-4"
- run_dump_test "compact-eh-el-5"
- run_dump_test "compact-eh-el-6"
- run_dump_test "compact-eh-el-7"
- run_list_test "compact-eh-err1"
- run_list_test "compact-eh-err2"
-
run_dump_test "div"
if { !$addr32 && $has_newabi } {
@@ -736,39 +741,41 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "fix-rm7000-2" \
[mips_arch_list_matching mips3 !singlefloat \
!mips64r6]
- run_dump_test_arches "24k-branch-delay-1" \
+ if { !$is_r6 } {
+ run_dump_test_arches "24k-branch-delay-1" \
[mips_arch_list_matching mips1]
- run_dump_test_arches "24k-triple-stores-1" \
+ run_dump_test_arches "24k-triple-stores-1" \
[mips_arch_list_matching fpisa5 !octeon]
- run_dump_test_arches "24k-triple-stores-2" \
+ run_dump_test_arches "24k-triple-stores-2" \
[mips_arch_list_matching mips2]
- run_dump_test_arches "24k-triple-stores-2-llsc" \
+ run_dump_test_arches "24k-triple-stores-2-llsc" \
[mips_arch_list_matching mips2 !nollsc]
- run_dump_test_arches "24k-triple-stores-3" \
+ run_dump_test_arches "24k-triple-stores-3" \
[mips_arch_list_matching mips2]
- run_dump_test_arches "24k-triple-stores-4" \
+ run_dump_test_arches "24k-triple-stores-4" \
[mips_arch_list_matching mips2 !singlefloat]
- run_dump_test_arches "24k-triple-stores-5" \
+ run_dump_test_arches "24k-triple-stores-5" \
[mips_arch_list_matching mips1]
- run_dump_test_arches "24k-triple-stores-6" \
+ run_dump_test_arches "24k-triple-stores-6" \
[mips_arch_list_matching mips2 !singlefloat]
- run_dump_test_arches "24k-triple-stores-7" \
+ run_dump_test_arches "24k-triple-stores-7" \
[mips_arch_list_matching mips2 !singlefloat]
- run_dump_test_arches "24k-triple-stores-8" \
+ run_dump_test_arches "24k-triple-stores-8" \
[mips_arch_list_matching mips1]
- run_dump_test_arches "24k-triple-stores-9" \
+ run_dump_test_arches "24k-triple-stores-9" \
[mips_arch_list_matching mips1]
- run_dump_test_arches "24k-triple-stores-10" \
+ run_dump_test_arches "24k-triple-stores-10" \
[mips_arch_list_matching mips1]
- run_dump_test_arches "24k-triple-stores-11" \
+ run_dump_test_arches "24k-triple-stores-11" \
[mips_arch_list_matching mips1]
- run_dump_test_arches "jal-svr4pic${imips}" \
+ run_dump_test_arches "jal-svr4pic${imips}" \
[mips_arch_list_matching mips1]
- run_dump_test_arches "jal-svr4pic-noreorder${imips}" \
+ run_dump_test_arches "jal-svr4pic-noreorder${imips}" \
[mips_arch_list_matching mips1]
- run_dump_test_arches "jal-svr4pic-local${imips}" \
+ run_dump_test_arches "jal-svr4pic-local${imips}" \
[mips_arch_list_matching mips1]
+ }
if $has_newabi {
run_dump_test_arches "jal-svr4pic-local-n32" \
[mips_arch_list_matching mips3]
@@ -905,118 +912,136 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "uld2-eb" [mips_arch_list_matching mips3 !mips32r6]
run_dump_test_arches "uld2-el" [mips_arch_list_matching mips3 !mips32r6]
- run_dump_test_arches "mips16" [mips_arch_list_matching mips16-64]
- if { $has_newabi } {
- run_dump_test_arches "mips16-64" \
+ if { !$is_r6 } {
+ run_dump_test_arches "mips16" [mips_arch_list_matching mips16-64]
+ if { $has_newabi } {
+ run_dump_test_arches "mips16-64" \
[mips_arch_list_matching mips16-64]
- }
- run_dump_test_arches "mips16-macro" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-macro-t" \
+ }
+ run_dump_test_arches "mips16-macro" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-macro-t" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-macro-e" \
+ run_dump_test_arches "mips16-macro-e" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-insn-t" \
+ run_dump_test_arches "mips16-insn-t" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-insn-e" \
+ run_dump_test_arches "mips16-insn-e" \
[mips_arch_list_matching mips16-32]
- # Check MIPS16e extensions
- run_dump_test_arches "mips16e" [mips_arch_list_matching mips16e-32]
- run_dump_test_arches "mips16e-64" [mips_arch_list_matching mips16e-32]
- # Check MIPS16e2 extensions.
- run_dump_test_arches "mips16e2" [mips_arch_list_matching mips16e2-32]
- run_dump_test_arches "mips16e2-mt" [mips_arch_list_matching mips16e2-32]
- # Check MIPS16 ISA subset disassembly
- run_dump_test_arches "mips16-sub" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16e-sub" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16e-64-sub" \
+ # Check MIPS16e extensions
+ run_dump_test_arches "mips16e" [mips_arch_list_matching mips16e-32]
+ run_dump_test_arches "mips16e-64" [mips_arch_list_matching mips16e-32]
+ # Check MIPS16e2 extensions.
+ run_dump_test_arches "mips16e2" [mips_arch_list_matching mips16e2-32]
+ run_dump_test_arches "mips16e2-mt" [mips_arch_list_matching mips16e2-32]
+ # Check MIPS16 ISA subset disassembly
+ run_dump_test_arches "mips16-sub" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16e-sub" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16e-64-sub" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16e2-sub" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16e2-mt-sub" \
+ run_dump_test_arches "mips16e2-sub" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16e2-mt-sub" \
[mips_arch_list_matching mips16-32]
- # Check jalx handling
- run_dump_test "mips16-jalx"
- run_dump_test "mips-jalx"
- run_dump_test "mips-jalx-2"
- run_dump_test "jalx-imm"
- run_dump_test "jalx-addend"
- run_dump_test "jalx-local"
- if $has_newabi {
- run_dump_test "jalx-imm-n32"
- run_dump_test "jalx-addend-n32"
- run_dump_test "jalx-local-n32"
- run_dump_test "jalx-imm-n64"
- run_dump_test "jalx-addend-n64"
- run_dump_test "jalx-local-n64"
- }
-
- run_list_test "unaligned-jump-1" "-32" \
+ # Check jalx handling
+ run_dump_test "mips16-jalx"
+ run_dump_test "mips-jalx"
+ run_dump_test "mips-jalx-2"
+ run_dump_test "jalx-imm"
+ run_dump_test "jalx-addend"
+ run_dump_test "jalx-local"
+ if $has_newabi {
+ run_dump_test "jalx-imm-n32"
+ run_dump_test "jalx-addend-n32"
+ run_dump_test "jalx-local-n32"
+ run_dump_test "jalx-imm-n64"
+ run_dump_test "jalx-addend-n64"
+ run_dump_test "jalx-local-n64"
+ }
+ }
+
+ if { !$is_r6 } {
+ run_list_test "unaligned-jump-1" "-32" \
"MIPS jump to unaligned symbol 1"
- run_list_test "unaligned-jump-2" "-32" \
+ run_list_test "unaligned-jump-2" "-32" \
"MIPS jump to unaligned symbol 2"
- if $has_newabi {
- run_dump_test "unaligned-jump-3"
- }
- run_list_test "unaligned-jump-mips16-1" "-32" \
+ if $has_newabi {
+ run_dump_test "unaligned-jump-3"
+ }
+ run_list_test "unaligned-jump-mips16-1" "-32" \
"MIPS16 jump to unaligned symbol 1"
- run_list_test "unaligned-jump-mips16-2" "-32" \
+ run_list_test "unaligned-jump-mips16-2" "-32" \
"MIPS16 jump to unaligned symbol 2"
- if $has_newabi {
- run_dump_test "unaligned-jump-mips16-3"
- }
- run_list_test "unaligned-jump-micromips-1" "-32" \
+ if $has_newabi {
+ run_dump_test "unaligned-jump-mips16-3"
+ }
+ run_list_test "unaligned-jump-micromips-1" "-32" \
"microMIPS jump to unaligned symbol 1"
- run_list_test "unaligned-jump-micromips-2" "-32" \
+ run_list_test "unaligned-jump-micromips-2" "-32" \
"microMIPS jump to unaligned symbol 2"
- if $has_newabi {
- run_dump_test "unaligned-jump-micromips-3"
+ if $has_newabi {
+ run_dump_test "unaligned-jump-micromips-3"
+ }
}
- run_list_test "unaligned-branch-1" "-32" \
+ if { !$is_r6 } {
+ run_list_test "unaligned-branch-1" "-32" \
"MIPS branch to unaligned symbol 1"
- run_list_test "unaligned-branch-2" "-32" \
+ run_list_test "unaligned-branch-2" "-32" \
"MIPS branch to unaligned symbol 2"
- if $has_newabi {
- run_dump_test "unaligned-branch-3"
}
- run_list_test "unaligned-branch-r6-1" "-32" \
+ if { !$is_r6 } {
+ if $has_newabi {
+ run_dump_test "unaligned-branch-3"
+ }
+ }
+ if { !$is_r6 } {
+ run_list_test "unaligned-branch-r6-1" "-32" \
"MIPSr6 branch to unaligned symbol 1"
+ }
run_list_test "unaligned-branch-r6-2" "-32 -mips64r6" \
"MIPSr6 branch to unaligned symbol 2"
- run_list_test "unaligned-branch-r6-3" "-32" \
+ if { !$is_r6 } {
+ run_list_test "unaligned-branch-r6-3" "-32" \
"MIPSr6 branch to unaligned symbol 3"
+ }
run_list_test "unaligned-branch-r6-4" "-32 -mips64r6" \
"MIPSr6 branch to unaligned symbol 4"
if $has_newabi {
- run_dump_test "unaligned-branch-r6-5"
+ if { !$is_r6 } {
+ run_dump_test "unaligned-branch-r6-5"
+ }
run_dump_test "unaligned-branch-r6-6"
}
- run_list_test "unaligned-branch-mips16-1" "-32" \
+ if { !$is_r6 } {
+ run_list_test "unaligned-branch-mips16-1" "-32" \
"MIPS16 branch to unaligned symbol 1"
- run_list_test "unaligned-branch-mips16-2" "-32" \
+ run_list_test "unaligned-branch-mips16-2" "-32" \
"MIPS16 branch to unaligned symbol 2"
- if $has_newabi {
- run_dump_test "unaligned-branch-mips16-3"
- }
- run_list_test "unaligned-branch-micromips-1" "-32" \
+ if $has_newabi {
+ run_dump_test "unaligned-branch-mips16-3"
+ }
+ run_list_test "unaligned-branch-micromips-1" "-32" \
"microMIPS branch to unaligned symbol 1"
- run_list_test "unaligned-branch-micromips-2" "-32" \
+ run_list_test "unaligned-branch-micromips-2" "-32" \
"microMIPS branch to unaligned symbol 2"
- if $has_newabi {
- run_dump_test "unaligned-branch-micromips-3"
+ if $has_newabi {
+ run_dump_test "unaligned-branch-micromips-3"
+ }
}
# Check MIPS16 HI16/LO16 relocations
- run_dump_test "mips16-hilo"
- run_dump_test "mips16e2-hilo"
- if $has_newabi {
- run_dump_test "mips16-hilo-n32"
- run_dump_test "mips16e2-hilo-n32"
+ if { !$is_r6 } {
+ run_dump_test "mips16-hilo"
+ run_dump_test "mips16e2-hilo"
+ if $has_newabi {
+ run_dump_test "mips16-hilo-n32"
+ run_dump_test "mips16e2-hilo-n32"
+ }
+ run_dump_test "mips16-hilo-match"
+ run_dump_test "mips16-reloc-error"
+ run_dump_test "mips16e2-reloc-error"
+ run_dump_test "mips16-reg-error"
+ run_dump_test "mips16e2-imm-error"
}
- run_dump_test "mips16-hilo-match"
- run_dump_test "mips16-reloc-error"
- run_dump_test "mips16e2-reloc-error"
- run_dump_test "mips16-reg-error"
- run_dump_test "mips16e2-imm-error"
run_dump_test "delay"
run_dump_test "nodelay"
@@ -1047,7 +1072,7 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "mips32-sf32" "-32 -msoft-float" \
[mips_arch_list_matching mips32]
run_dump_test_arches "mips32-cp2" [mips_arch_list_matching mips32 \
- !octeon]
+ !octeon !mips32r6]
run_dump_test_arches "mips32r2" [mips_arch_list_matching mips32r2]
run_dump_test_arches "mips32r2-cp2" [mips_arch_list_matching mips32r2 \
@@ -1070,9 +1095,12 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "mips64r2" [mips_arch_list_matching mips64r2]
run_list_test_arches "mips64r2-ill" [mips_arch_list_matching mips64r2]
- run_dump_test "set-arch"
+ if { !$is_r6 } {
+ # r6 add some "R_MIPS_PC16"
+ run_dump_test "set-arch"
+ }
- if { !$addr32 } {
+ if { !$addr32 && !$is_r6 } {
run_dump_test "mips64-mips3d"
if { $has_newabi } {
run_dump_test_arches "mips64-mips3d-incl" \
@@ -1102,9 +1130,11 @@ if { [istarget mips*-*-vxworks*] } {
[mips_arch_list_matching mips64r2 \
!micromips !mips32r6]
- run_dump_test_arches "eva" [mips_arch_list_matching mips32r2 !octeon]
+ run_dump_test_arches "eva" [mips_arch_list_matching mips32r2 !octeon !mips32r6]
- run_list_test "illegal" "-32"
+ if { !$is_r6 } {
+ run_list_test "illegal" "-32"
+ }
run_list_test "baddata1" "-32"
run_list_test "jalr" ""
@@ -1142,13 +1172,15 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "elf_arch_mips64r6"
# Verify that ASE markings are handled properly.
- run_dump_test "elf_ase_mips16"
- run_dump_test "elf_ase_mips16-2"
- run_dump_test "elf_ase_mips16e2"
- run_dump_test "elf_ase_mips16e2-2"
+ if { !$is_r6 } {
+ run_dump_test "elf_ase_mips16"
+ run_dump_test "elf_ase_mips16-2"
+ run_dump_test "elf_ase_mips16e2"
+ run_dump_test "elf_ase_mips16e2-2"
- run_dump_test "elf_ase_micromips"
- run_dump_test "elf_ase_micromips-2"
+ run_dump_test "elf_ase_micromips"
+ run_dump_test "elf_ase_micromips-2"
+ }
# Verify that machine markings are handled properly.
run_dump_test "elf_mach_5900"
@@ -1174,34 +1206,44 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "elf-rel4" [mips_arch_list_matching gpr64 !mips16-32]
run_dump_test "e32-rel4"
run_dump_test "elf-rel5"
- run_dump_test "elf-rel6"
- if $has_newabi {
- run_dump_test "elf-rel6-n32"
- run_dump_test "elf-rel6-n64"
+ if { !$is_r6 } {
+ run_dump_test "elf-rel6"
+ if $has_newabi {
+ run_dump_test "elf-rel6-n32"
+ run_dump_test "elf-rel6-n64"
+ }
}
run_dump_test "elf-rel7"
run_dump_test "elf-rel8"
- run_dump_test "elf-rel8-mips16"
+ if { !$is_r6 } {
+ run_dump_test "elf-rel8-mips16"
+ }
run_dump_test "elf-rel9"
- run_dump_test "elf-rel9-mips16"
- run_dump_test "elf-rel9-mips16e2"
+ if { !$is_r6 } {
+ run_dump_test "elf-rel9-mips16"
+ run_dump_test "elf-rel9-mips16e2"
+ }
if $has_newabi {
run_dump_test "elf-rel10"
run_dump_test "elf-rel11"
}
run_dump_test "elf-rel12"
run_dump_test "elf-rel13"
- run_dump_test "elf-rel13-mips16"
+ if { !$is_r6 } {
+ run_dump_test "elf-rel13-mips16"
+ }
run_dump_test "elf-rel14"
if $has_newabi {
run_dump_test "elf-rel15"
run_dump_test "elf-rel16"
- run_dump_test "elf-rel-got-n32"
- run_dump_test "elf-rel-xgot-n32"
- run_dump_test "elf-rel-got-n64"
- run_dump_test "elf-rel-xgot-n64"
+ if { !$is_r6 } {
+ run_dump_test "elf-rel-got-n32"
+ run_dump_test "elf-rel-xgot-n32"
+ run_dump_test "elf-rel-got-n64"
+ run_dump_test "elf-rel-xgot-n64"
+ }
}
run_dump_test "elf-rel17"
if $has_newabi {
@@ -1226,21 +1268,25 @@ if { [istarget mips*-*-vxworks*] } {
if $has_newabi {
run_dump_test "elf-rel28-n32"
- run_dump_test "elf-rel28-micromips-n32"
run_dump_test "elf-rel28-n64"
- run_dump_test "elf-rel28-micromips-n64"
- run_dump_test "elf-rel28-lldscd-n32"
- run_dump_test "elf-rel28-lldscd-micromips-n32"
- run_dump_test "elf-rel28-lldscd-n64"
- run_dump_test "elf-rel28-lldscd-micromips-n64"
+ if { !$is_r6 } {
+ run_dump_test "elf-rel28-micromips-n32"
+ run_dump_test "elf-rel28-micromips-n64"
+ run_dump_test "elf-rel28-lldscd-n32"
+ run_dump_test "elf-rel28-lldscd-micromips-n32"
+ run_dump_test "elf-rel28-lldscd-n64"
+ run_dump_test "elf-rel28-lldscd-micromips-n64"
+ }
run_dump_test_arches "elf-rel29" [mips_arch_list_matching mips3]
}
run_list_test_arches "elf-rel30" "-32" [mips_arch_list_all]
- run_dump_test "comdat-reloc"
+ if { !$is_r6 } {
+ run_dump_test "comdat-reloc"
- run_dump_test "${tmips}mips${el}16-e"
- run_dump_test "${tmips}mips${el}16-f"
+ run_dump_test "${tmips}mips${el}16-e"
+ run_dump_test "${tmips}mips${el}16-f"
+ }
run_dump_test "elf-consthilo"
run_dump_test "expr1"
@@ -1279,15 +1325,19 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "loc-swap-2" [mips_arch_list_all]
run_dump_test_arches "loc-swap-3" [mips_arch_list_all]
- run_dump_test "nan-legacy-1"
- run_dump_test "nan-legacy-2"
- run_dump_test "nan-legacy-3"
- run_dump_test "nan-legacy-4"
- run_dump_test "nan-legacy-5"
+ if { !$is_r6 } {
+ run_dump_test "nan-legacy-1"
+ run_dump_test "nan-legacy-2"
+ run_dump_test "nan-legacy-3"
+ run_dump_test "nan-legacy-4"
+ run_dump_test "nan-legacy-5"
+ }
run_dump_test "nan-2008-1"
run_dump_test "nan-2008-2"
- run_dump_test "nan-2008-3"
+ if { !$is_r6 } {
+ run_dump_test "nan-2008-3"
+ }
run_dump_test "nan-2008-4"
run_list_test "nan-error-1"
@@ -1366,7 +1416,9 @@ if { [istarget mips*-*-vxworks*] } {
if $has_newabi {
run_dump_test "ldstla-n64"
run_dump_test "ldstla-n64-shared"
- run_dump_test "ldstla-n64-sym32"
+ if { !$is_r6 } {
+ run_dump_test "ldstla-n64-sym32"
+ }
}
run_dump_test "macro-warn-1"
@@ -1389,32 +1441,34 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "at-1"
run_list_test "at-2" "-32 -mips1" "MIPS at-2"
- run_dump_test "loongson-2e"
- run_dump_test "loongson-2f"
- run_dump_test "loongson-2f-2"
- run_dump_test "loongson-2f-3"
+ if { !$is_r6 } {
+ run_dump_test "loongson-2e"
+ run_dump_test "loongson-2f"
+ run_dump_test "loongson-2f-2"
+ run_dump_test "loongson-2f-3"
- run_dump_test "loongson-3a"
- run_dump_test "loongson-3a-2"
- run_dump_test "loongson-3a-3"
+ run_dump_test "loongson-3a"
+ run_dump_test "loongson-3a-2"
+ run_dump_test "loongson-3a-3"
- run_dump_test "loongson-2f-mmi"
- run_dump_test "loongson-3a-mmi"
+ run_dump_test "loongson-2f-mmi"
+ run_dump_test "loongson-3a-mmi"
- run_dump_test_arches "loongson-cam" [mips_arch_list_matching gs464]
- run_dump_test_arches "loongson-ext2" [mips_arch_list_matching gs464]
+ run_dump_test_arches "loongson-cam" [mips_arch_list_matching gs464]
+ run_dump_test_arches "loongson-ext2" [mips_arch_list_matching gs464]
- if { $has_newabi } {
- run_dump_test_arches "octeon" [mips_arch_list_matching octeon]
- }
- run_dump_test_arches "octeon-saa-saad" [mips_arch_list_matching octeonp]
- run_list_test_arches "octeon-ill" [mips_arch_list_matching octeon]
- if { $has_newabi } {
- run_dump_test_arches "octeon-pref" \
- [mips_arch_list_matching octeon]
+ if { $has_newabi } {
+ run_dump_test_arches "octeon" [mips_arch_list_matching octeon]
+ }
+ run_dump_test_arches "octeon-saa-saad" [mips_arch_list_matching octeonp]
+ run_list_test_arches "octeon-ill" [mips_arch_list_matching octeon]
+ if { $has_newabi } {
+ run_dump_test_arches "octeon-pref" \
+ [mips_arch_list_matching octeon]
+ }
+ run_dump_test_arches "octeon2" [mips_arch_list_matching octeon2]
+ run_dump_test_arches "octeon3" [mips_arch_list_matching octeon3]
}
- run_dump_test_arches "octeon2" [mips_arch_list_matching octeon2]
- run_dump_test_arches "octeon3" [mips_arch_list_matching octeon3]
run_dump_test "smartmips"
run_dump_test_arches "mips32-dsp" [mips_arch_list_matching mips32r2 \
@@ -1435,34 +1489,35 @@ if { [istarget mips*-*-vxworks*] } {
[mips_arch_list_matching mips1 !micromips] \
[mips_arch_list_matching mips16-32]]]
- run_dump_test "mips16-dwarf2"
- if $has_newabi {
- run_dump_test "mips16-dwarf2-n32"
+ if { !$is_r6 } {
+ run_dump_test "mips16-dwarf2"
+ if $has_newabi {
+ run_dump_test "mips16-dwarf2-n32"
+ }
+ run_dump_test "mips16-stabs"
+
+ run_dump_test "mips16e-jrc"
+ run_dump_test "mips16e2-lui"
+ run_dump_test "mips16e2-mt-err"
+ run_dump_test "mips16e2-copy"
+ run_dump_test "mips16e2-copy-err"
+
+ run_dump_test "mips16-intermix"
+ run_dump_test "mips16-extend"
+ run_dump_test "mips16-extend-swap"
+ run_dump_test "mips16-sprel-swap"
+ run_dump_test "mips16-sdrasp"
+ run_dump_test "mips16-insn-length-noargs"
+
+ run_dump_test "mips16-branch-unextended-1"
+ run_dump_test "mips16-branch-unextended-2"
+ run_dump_test "mips16-relax-unextended-1"
+ run_dump_test "mips16-relax-unextended-2"
+ run_dump_test "mips16-jal-t"
+ run_dump_test "mips16-jal-e"
+
+ run_dump_test_arches "mips16-asmacro" [mips_arch_list_matching mips16-32]
}
- run_dump_test "mips16-stabs"
-
- run_dump_test "mips16e-jrc"
- run_dump_test "mips16e2-lui"
- run_dump_test "mips16e2-mt-err"
- run_dump_test "mips16e2-copy"
- run_dump_test "mips16e2-copy-err"
-
- run_dump_test "mips16-intermix"
- run_dump_test "mips16-extend"
- run_dump_test "mips16-extend-swap"
- run_dump_test "mips16-sprel-swap"
- run_dump_test "mips16-sdrasp"
- run_dump_test "mips16-insn-length-noargs"
-
- run_dump_test "mips16-branch-unextended-1"
- run_dump_test "mips16-branch-unextended-2"
- run_dump_test "mips16-relax-unextended-1"
- run_dump_test "mips16-relax-unextended-2"
- run_dump_test "mips16-jal-t"
- run_dump_test "mips16-jal-e"
-
- run_dump_test_arches "mips16-asmacro" [mips_arch_list_matching mips16-32]
-
run_dump_test "vxworks1"
run_dump_test "vxworks1-xgot"
run_dump_test "vxworks1-el"
@@ -1470,11 +1525,13 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "noreorder"
run_dump_test "align"
- run_dump_test "align2"
- run_dump_test "align2-el"
+ if { !$is_r6 } {
+ run_dump_test "align2"
+ run_dump_test "align2-el"
+ run_dump_test "insn-opts"
+ }
run_dump_test "align3"
run_dump_test "odd-float"
- run_dump_test "insn-opts"
run_list_test_arches "mips-macro-ill-sfp" "-32 -msingle-float" \
[mips_arch_list_matching mips2]
@@ -1488,7 +1545,9 @@ if { [istarget mips*-*-vxworks*] } {
"-32 -msingle-float -mdouble-float" \
[mips_arch_list_matching mips1 !singlefloat]
- run_dump_test "mips16-vis-1"
+ if { !$is_r6 } {
+ run_dump_test "mips16-vis-1"
+ }
run_dump_test "call-nonpic-1"
run_dump_test "mips32-sync"
run_dump_test_arches "mips32r2-sync" [lsort -dictionary -unique [concat \
@@ -1519,33 +1578,35 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "reginfo-2-n32"
}
- run_dump_test "micromips"
- run_dump_test "micromips-trap"
- run_dump_test "micromips-compact"
- run_dump_test "micromips-insn32"
- run_dump_test "micromips-noinsn32"
- run_list_test "micromips" "-mips32r2 -32 -mfp64 -minsn32" \
- "microMIPS for MIPS32r2 (instructions invalid in insn32 mode)"
- run_list_test "micromips-size-0" \
- "-32 -march=mips64 -mmicromips" "microMIPS instruction size 0"
- run_dump_test "micromips-size-1"
- run_dump_test "micromips-branch-relax"
- run_dump_test "micromips-branch-relax-pic${imips}"
- run_dump_test "micromips-branch-relax-insn32"
- run_dump_test "micromips-branch-relax-insn32-pic${imips}"
- run_dump_test "micromips-branch-delay"
- run_dump_test "micromips-warn-branch-delay"
- run_dump_test "micromips-warn-branch-delay-1"
- run_dump_test "micromips-branch-absolute"
- run_dump_test "micromips-branch-absolute-addend"
- if $has_newabi {
- run_dump_test "micromips-branch-absolute-n32"
- run_dump_test "micromips-branch-absolute-addend-n32"
- run_dump_test "micromips-branch-absolute-n64"
- run_dump_test "micromips-branch-absolute-addend-n64"
+ if { !$is_r6 } {
+ run_dump_test "micromips"
+ run_dump_test "micromips-trap"
+ run_dump_test "micromips-compact"
+ run_dump_test "micromips-insn32"
+ run_dump_test "micromips-noinsn32"
+ run_list_test "micromips" "-mips32r2 -32 -mfp64 -minsn32" \
+ "microMIPS for MIPS32r2 (instructions invalid in insn32 mode)"
+ run_list_test "micromips-size-0" \
+ "-32 -march=mips64 -mmicromips" "microMIPS instruction size 0"
+ run_dump_test "micromips-size-1"
+ run_dump_test "micromips-branch-relax"
+ run_dump_test "micromips-branch-relax-pic${imips}"
+ run_dump_test "micromips-branch-relax-insn32"
+ run_dump_test "micromips-branch-relax-insn32-pic${imips}"
+ run_dump_test "micromips-branch-delay"
+ run_dump_test "micromips-warn-branch-delay"
+ run_dump_test "micromips-warn-branch-delay-1"
+ run_dump_test "micromips-branch-absolute"
+ run_dump_test "micromips-branch-absolute-addend"
+ if $has_newabi {
+ run_dump_test "micromips-branch-absolute-n32"
+ run_dump_test "micromips-branch-absolute-addend-n32"
+ run_dump_test "micromips-branch-absolute-n64"
+ run_dump_test "micromips-branch-absolute-addend-n64"
+ }
+ run_dump_test "micromips-b16"
+ run_list_test "micromips-ill"
}
- run_dump_test "micromips-b16"
- run_list_test "micromips-ill"
run_dump_test_arches "mcu" [mips_arch_list_matching mips32r2 \
!octeon]
@@ -1599,7 +1660,9 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "ulh-reloc" [mips_arch_list_matching mips2 !mips32r6]
run_dump_test "l_d-reloc"
- run_list_test "bltzal"
+ if { !$is_r6 } {
+ run_list_test "bltzal"
+ }
run_dump_test_arches "msa" [mips_arch_list_matching mips32r2]
if { $has_newabi } {
@@ -1622,185 +1685,189 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "pcrel-4-64"
}
- run_dump_test "pcrel-reloc-1"
+ if { !$is_r6 } {
+ run_dump_test "pcrel-reloc-1"
+ run_dump_test "pcrel-reloc-2"
+ run_dump_test "pcrel-reloc-3"
+ run_dump_test "pcrel-reloc-4"
+ run_dump_test "pcrel-reloc-5"
+ run_dump_test "pcrel-reloc-6"
+ run_list_test "pcrel-reloc-6" "-32 --defsym offset=4" \
+ "MIPS local PC-relative relocations 6b"
+ }
run_dump_test "pcrel-reloc-1-r6"
- run_dump_test "pcrel-reloc-2"
run_dump_test "pcrel-reloc-2-r6"
- run_dump_test "pcrel-reloc-3"
run_dump_test "pcrel-reloc-3-r6"
- run_dump_test "pcrel-reloc-4"
run_dump_test "pcrel-reloc-4-r6"
- run_dump_test "pcrel-reloc-5"
run_dump_test "pcrel-reloc-5-r6"
- run_dump_test "pcrel-reloc-6"
- run_list_test "pcrel-reloc-6" "-32 --defsym offset=4" \
- "MIPS local PC-relative relocations 6b"
-
- run_dump_test_arches "mips16-pcrel-0" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-1" [mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-2" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-3" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-4" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-5" [mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-pic-0" \
+
+ if { !$is_r6 } {
+ run_dump_test_arches "mips16-pcrel-0" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-1" [mips_arch_list_matching mips16-64]
+ run_dump_test_arches "mips16-pcrel-2" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-3" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-4" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-5" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16-pcrel-pic-0" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-pic-1" \
+ run_dump_test_arches "mips16-pcrel-pic-1" \
[mips_arch_list_matching mips16-64]
- if $has_newabi {
- run_dump_test_arches "mips16-pcrel-n32-0" \
+ if $has_newabi {
+ run_dump_test_arches "mips16-pcrel-n32-0" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-n32-1" \
+ run_dump_test_arches "mips16-pcrel-n32-1" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-n64-sym32-0" \
+ run_dump_test_arches "mips16-pcrel-n64-sym32-0" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-n64-sym32-1" \
+ run_dump_test_arches "mips16-pcrel-n64-sym32-1" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-n64-0" \
+ run_dump_test_arches "mips16-pcrel-n64-0" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-n64-1" \
+ run_dump_test_arches "mips16-pcrel-n64-1" \
[mips_arch_list_matching mips16-64]
- }
- run_dump_test_arches "mips16-pcrel-delay-0" \
+ }
+ run_dump_test_arches "mips16-pcrel-delay-0" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-delay-1" \
+ run_dump_test_arches "mips16-pcrel-delay-1" \
[mips_arch_list_matching mips16-32]
- run_dump_test "mips16-pcrel-relax-0"
- run_dump_test "mips16-pcrel-relax-1"
- run_dump_test "mips16-pcrel-relax-2"
- run_dump_test "mips16-pcrel-relax-3"
- run_dump_test_arches "mips16-pcrel-reloc-0" \
+ run_dump_test "mips16-pcrel-relax-0"
+ run_dump_test "mips16-pcrel-relax-1"
+ run_dump_test "mips16-pcrel-relax-2"
+ run_dump_test "mips16-pcrel-relax-3"
+ run_dump_test_arches "mips16-pcrel-reloc-0" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-reloc-1" \
+ run_dump_test_arches "mips16-pcrel-reloc-1" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-reloc-2" \
+ run_dump_test_arches "mips16-pcrel-reloc-2" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-reloc-3" \
+ run_dump_test_arches "mips16-pcrel-reloc-3" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-reloc-4" \
+ run_dump_test_arches "mips16-pcrel-reloc-4" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-reloc-5" \
+ run_dump_test_arches "mips16-pcrel-reloc-5" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-reloc-6" \
+ run_dump_test_arches "mips16-pcrel-reloc-6" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-reloc-7" \
+ run_dump_test_arches "mips16-pcrel-reloc-7" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-0" \
+ run_dump_test_arches "mips16-pcrel-addend-0" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-addend-1" \
+ run_dump_test_arches "mips16-pcrel-addend-1" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-addend-2" \
+ run_dump_test_arches "mips16-pcrel-addend-2" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-addend-3" \
+ run_dump_test_arches "mips16-pcrel-addend-3" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-addend-4" \
+ run_dump_test_arches "mips16-pcrel-addend-4" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-5" \
+ run_dump_test_arches "mips16-pcrel-addend-5" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-6" \
+ run_dump_test_arches "mips16-pcrel-addend-6" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-7" \
+ run_dump_test_arches "mips16-pcrel-addend-7" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-8" \
+ run_dump_test_arches "mips16-pcrel-addend-8" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-addend-9" \
+ run_dump_test_arches "mips16-pcrel-addend-9" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-pic-8" \
+ run_dump_test_arches "mips16-pcrel-addend-pic-8" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-addend-pic-9" \
+ run_dump_test_arches "mips16-pcrel-addend-pic-9" \
[mips_arch_list_matching mips16-64]
- if $has_newabi {
- run_dump_test_arches "mips16-pcrel-addend-n32-8" \
+ if $has_newabi {
+ run_dump_test_arches "mips16-pcrel-addend-n32-8" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-n32-9" \
+ run_dump_test_arches "mips16-pcrel-addend-n32-9" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-n64-sym32-8" \
+ run_dump_test_arches "mips16-pcrel-addend-n64-sym32-8" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-n64-sym32-9" \
+ run_dump_test_arches "mips16-pcrel-addend-n64-sym32-9" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-n64-8" \
+ run_dump_test_arches "mips16-pcrel-addend-n64-8" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-addend-n64-9" \
+ run_dump_test_arches "mips16-pcrel-addend-n64-9" \
[mips_arch_list_matching mips16-64]
- }
- run_dump_test_arches "mips16-pcrel-absolute" \
+ }
+ run_dump_test_arches "mips16-pcrel-absolute" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-absolute-1" \
+ run_dump_test_arches "mips16-pcrel-absolute-1" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-absolute-2" \
+ run_dump_test_arches "mips16-pcrel-absolute-2" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-3" \
+ run_dump_test_arches "mips16-pcrel-absolute-3" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-4" \
+ run_dump_test_arches "mips16-pcrel-absolute-4" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-absolute-5" \
+ run_dump_test_arches "mips16-pcrel-absolute-5" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-absolute-6" \
+ run_dump_test_arches "mips16-pcrel-absolute-6" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-7" \
+ run_dump_test_arches "mips16-pcrel-absolute-7" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-pic-4" \
+ run_dump_test_arches "mips16-pcrel-absolute-pic-4" \
[mips_arch_list_matching mips16-32]
- run_dump_test_arches "mips16-pcrel-absolute-pic-6" \
+ run_dump_test_arches "mips16-pcrel-absolute-pic-6" \
[mips_arch_list_matching mips16-64]
- if $has_newabi {
- run_dump_test_arches "mips16-pcrel-absolute-n32-4" \
+ if $has_newabi {
+ run_dump_test_arches "mips16-pcrel-absolute-n32-4" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-n32-6" \
+ run_dump_test_arches "mips16-pcrel-absolute-n32-6" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-n64-4" \
+ run_dump_test_arches "mips16-pcrel-absolute-n64-4" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-n64-6" \
+ run_dump_test_arches "mips16-pcrel-absolute-n64-6" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-n64-sym32-4" \
+ run_dump_test_arches "mips16-pcrel-absolute-n64-sym32-4" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-n64-sym32-6" \
+ run_dump_test_arches "mips16-pcrel-absolute-n64-sym32-6" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-pic-n32-4" \
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n32-4" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-pic-n32-6" \
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n32-6" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-pic-n64-4" \
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n64-4" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-pic-n64-6" \
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n64-6" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-pic-n64-sym32-4" \
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n64-sym32-4" \
[mips_arch_list_matching mips16-64]
- run_dump_test_arches "mips16-pcrel-absolute-pic-n64-sym32-6" \
+ run_dump_test_arches "mips16-pcrel-absolute-pic-n64-sym32-6" \
[mips_arch_list_matching mips16-64]
+ }
+ run_dump_test "mips16-branch-reloc-0"
+ run_dump_test "mips16-branch-reloc-1"
+ run_dump_test "mips16-branch-reloc-2"
+ run_dump_test "mips16-branch-reloc-3"
+ run_dump_test "mips16-branch-reloc-4"
+ run_dump_test "mips16-branch-reloc-5"
+ run_dump_test "mips16-branch-addend-0"
+ run_dump_test "mips16-branch-addend-1"
+ run_dump_test "mips16-branch-addend-2"
+ run_dump_test "mips16-branch-addend-3"
+ run_dump_test "mips16-branch-addend-4"
+ run_dump_test "mips16-branch-addend-5"
+ run_dump_test "mips16-branch-absolute"
+ run_dump_test "mips16-branch-absolute-1"
+ run_dump_test "mips16-branch-absolute-2"
+ run_dump_test "mips16-branch-absolute-addend"
+ run_dump_test "mips16-branch-absolute-addend-1"
+ if $has_newabi {
+ run_dump_test "mips16-branch-absolute-n32"
+ run_dump_test "mips16-branch-absolute-n32-1"
+ run_dump_test "mips16-branch-absolute-n32-2"
+ run_dump_test "mips16-branch-absolute-addend-n32"
+ run_dump_test "mips16-branch-absolute-addend-n32-1"
+ run_dump_test "mips16-branch-absolute-n64"
+ run_dump_test "mips16-branch-absolute-n64-1"
+ run_dump_test "mips16-branch-absolute-n64-2"
+ run_dump_test "mips16-branch-absolute-addend-n64"
+ run_dump_test "mips16-branch-absolute-addend-n64-1"
+ }
+ run_dump_test "mips16-absolute-reloc-0"
+ run_dump_test "mips16-absolute-reloc-1"
+ run_dump_test "mips16-absolute-reloc-2"
+ run_dump_test "mips16-absolute-reloc-3"
}
- run_dump_test "mips16-branch-reloc-0"
- run_dump_test "mips16-branch-reloc-1"
- run_dump_test "mips16-branch-reloc-2"
- run_dump_test "mips16-branch-reloc-3"
- run_dump_test "mips16-branch-reloc-4"
- run_dump_test "mips16-branch-reloc-5"
- run_dump_test "mips16-branch-addend-0"
- run_dump_test "mips16-branch-addend-1"
- run_dump_test "mips16-branch-addend-2"
- run_dump_test "mips16-branch-addend-3"
- run_dump_test "mips16-branch-addend-4"
- run_dump_test "mips16-branch-addend-5"
- run_dump_test "mips16-branch-absolute"
- run_dump_test "mips16-branch-absolute-1"
- run_dump_test "mips16-branch-absolute-2"
- run_dump_test "mips16-branch-absolute-addend"
- run_dump_test "mips16-branch-absolute-addend-1"
- if $has_newabi {
- run_dump_test "mips16-branch-absolute-n32"
- run_dump_test "mips16-branch-absolute-n32-1"
- run_dump_test "mips16-branch-absolute-n32-2"
- run_dump_test "mips16-branch-absolute-addend-n32"
- run_dump_test "mips16-branch-absolute-addend-n32-1"
- run_dump_test "mips16-branch-absolute-n64"
- run_dump_test "mips16-branch-absolute-n64-1"
- run_dump_test "mips16-branch-absolute-n64-2"
- run_dump_test "mips16-branch-absolute-addend-n64"
- run_dump_test "mips16-branch-absolute-addend-n64-1"
- }
- run_dump_test "mips16-absolute-reloc-0"
- run_dump_test "mips16-absolute-reloc-1"
- run_dump_test "mips16-absolute-reloc-2"
- run_dump_test "mips16-absolute-reloc-3"
run_dump_test_arches "attr-gnu-4-0" "-32" \
[mips_arch_list_matching mips1]
@@ -1924,7 +1991,7 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "attr-gnu-4-3" "-64" \
[mips_arch_list_matching mips3]
}
-
+
run_list_test_arches "attr-gnu-4-4" "-32 -mfp32" \
[mips_arch_list_matching mips1 !mips32r6]
run_list_test_arches "attr-gnu-4-4" "-32 -mfpxx" \
@@ -1993,30 +2060,35 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "attr-gnu-4-7" "-32 -mfp64 -mno-odd-spreg" \
[mips_arch_list_matching mips32r2]
- run_dump_test "attr-gnu-abi-fp-1"
+ if { !$is_r6 } {
+ run_dump_test "attr-gnu-abi-fp-1"
+ }
run_dump_test "attr-gnu-abi-msa-1"
run_dump_test "module-override"
run_dump_test "module-defer-warn1"
- run_list_test "module-defer-warn2" "-32"
+ ## mips32r2 or above support FP64, so no "Error: `fp=64' used with a 32-bit fpu"
+ run_list_test "module-defer-warn2" "-32 -mips32"
- foreach testopt [list -mfp32 -mfpxx -mfp64 "-mfp64-noodd" \
- -msingle-float -msoft-float] {
- foreach cmdopt [list -mfp32 -mfpxx -mfp64 "-mfp64 -mno-odd-spreg" \
- -msingle-float -msoft-float] {
- run_dump_test "module${testopt}" \
- [list [list as $cmdopt] [list name ($cmdopt)]]
- }
+ if { !$is_r6 } {
+ foreach testopt [list -mfp32 -mfpxx -mfp64 "-mfp64-noodd" \
+ -msingle-float -msoft-float] {
+ foreach cmdopt [list -mfp32 -mfpxx -mfp64 "-mfp64 -mno-odd-spreg" \
+ -msingle-float -msoft-float] {
+ run_dump_test "module${testopt}" \
+ [list [list as $cmdopt] [list name ($cmdopt)]]
+ }
+ }
+ run_dump_test "module-set-mfpxx"
}
- run_dump_test "module-set-mfpxx"
run_list_test_arches "fpxx-oddfpreg" "-32 -mfpxx" \
- [mips_arch_list_matching mips2 !singlefloat]
+ [mips_arch_list_matching mips2 !singlefloat !mips32r6]
run_list_test_arches "fpxx-oddfpreg" "-32 -mfpxx -mno-odd-spreg" \
- [mips_arch_list_matching mips2 !singlefloat]
+ [mips_arch_list_matching mips2 !singlefloat !mips32r6]
run_dump_test_arches "fpxx-oddfpreg" \
- [mips_arch_list_matching oddspreg]
- run_dump_test_arches "odd-spreg" "-mfp32" [mips_arch_list_matching oddspreg]
+ [mips_arch_list_matching oddspreg !mips32r6]
+ run_dump_test_arches "odd-spreg" "-mfp32" [mips_arch_list_matching oddspreg !mips32r6]
run_dump_test_arches "odd-spreg" "-mfpxx" [mips_arch_list_matching oddspreg]
run_dump_test_arches "odd-spreg" "-mfp64" [mips_arch_list_matching mips32r2]
run_dump_test_arches "no-odd-spreg" "-mfp32" [mips_arch_list_matching mips1 \
@@ -2035,13 +2107,15 @@ if { [istarget mips*-*-vxworks*] } {
"MIPS invalid PIC option in VxWorks PIC"
run_list_test "option-pic-vxworks-2" "-mvxworks-pic" \
"MIPS invalid switch to SVR4 PIC from VxWorks PIC"
- run_dump_test "option-pic-relax-0"
- run_dump_test "option-pic-relax-1"
- run_dump_test "option-pic-relax-2"
- run_dump_test "option-pic-relax-3"
- run_dump_test "option-pic-relax-3a"
- run_dump_test "option-pic-relax-4"
- run_dump_test "option-pic-relax-5"
+ if { !$is_r6 } {
+ run_dump_test "option-pic-relax-0"
+ run_dump_test "option-pic-relax-1"
+ run_dump_test "option-pic-relax-2"
+ run_dump_test "option-pic-relax-3"
+ run_dump_test "option-pic-relax-3a"
+ run_dump_test "option-pic-relax-4"
+ run_dump_test "option-pic-relax-5"
+ }
run_dump_test_arches "isa-override-1" "" [mips_arch_list_matching mips1]
run_dump_test_arches "isa-override-2" "" [mips_arch_list_matching mips1]
@@ -2050,18 +2124,20 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "debug-label-end-2"
run_dump_test "debug-label-end-3"
- run_dump_test "org-1"
- run_dump_test "org-2"
- run_dump_test "org-3"
- run_dump_test "org-4"
- run_dump_test "org-5"
- run_dump_test "org-6"
- run_dump_test "org-7"
- run_dump_test "org-8"
- run_dump_test "org-9"
- run_dump_test "org-10"
- run_dump_test "org-11"
- run_dump_test "org-12"
+ if { !$is_r6 } {
+ run_dump_test "org-1"
+ run_dump_test "org-2"
+ run_dump_test "org-3"
+ run_dump_test "org-4"
+ run_dump_test "org-5"
+ run_dump_test "org-6"
+ run_dump_test "org-7"
+ run_dump_test "org-8"
+ run_dump_test "org-9"
+ run_dump_test "org-10"
+ run_dump_test "org-11"
+ run_dump_test "org-12"
+ }
run_dump_test_arches "stabs-symbol-type" [mips_arch_list_all]
@@ -2091,8 +2167,9 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arch "llpscp-64" "" mips64r6
run_dump_test "pr14798${imips}"
- run_dump_test "insn-isa-mode"
- run_dump_test "insn-isa-mode"
+ if { !$is_r6 } {
+ run_dump_test "insn-isa-mode"
+ }
run_dump_test "global-local-symtab-o32${tmips}"
run_dump_test "global-local-symtab-sort-o32${tmips}"
if $has_newabi {
diff --git a/gas/testsuite/gas/mips/mipsr6@beq.d b/gas/testsuite/gas/mips/mipsr6@beq.d
index d6fc670445..c73109164c 100644
--- a/gas/testsuite/gas/mips/mipsr6@beq.d
+++ b/gas/testsuite/gas/mips/mipsr6@beq.d
@@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses -mmips:4000
#name: MIPS beq
-#as: -32
+#as: -32 --defsym r6=1
#source: beq.s
# Test the beq macro.
diff --git a/gas/testsuite/gas/mips/mipsr6@cache.d b/gas/testsuite/gas/mips/mipsr6@cache.d
index 803f5de05f..ca6e06066e 100644
--- a/gas/testsuite/gas/mips/mipsr6@cache.d
+++ b/gas/testsuite/gas/mips/mipsr6@cache.d
@@ -1,7 +1,7 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS CACHE instruction
#source: cache.s
-#as: -32
+#as: -32 --defsym r6=1
# Check MIPS CACHE instruction assembly.
diff --git a/gas/testsuite/gas/mips/mipsr6@hwr-names.d b/gas/testsuite/gas/mips/mipsr6@hwr-names.d
index e44a120c38..3c1473fd88 100644
--- a/gas/testsuite/gas/mips/mipsr6@hwr-names.d
+++ b/gas/testsuite/gas/mips/mipsr6@hwr-names.d
@@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa32r6 -M gpr-names=numeric,hwr-names=mips32r6
#name: MIPS HWR disassembly (mips32r6)
-#as: -32
+#as: -32 --defsym r6=1
#source: hwr-names.s
# Check objdump's handling of -M hwr-names=foo options.
diff --git a/gas/testsuite/gas/mips/mipsr6@mips32.d b/gas/testsuite/gas/mips/mipsr6@mips32.d
index e7af216b49..b909880cd5 100644
--- a/gas/testsuite/gas/mips/mipsr6@mips32.d
+++ b/gas/testsuite/gas/mips/mipsr6@mips32.d
@@ -1,7 +1,7 @@
#objdump: -dr --prefix-addresses --show-raw-insn
-#name: MIPS MIPS32 instructions
-#as: -32
#source: mips32.s
+#name: MIPS MIPS32 instructions
+#as: -32 --defsym r6=1
# Check MIPS32 instruction assembly
diff --git a/gas/testsuite/gas/mips/mipsr6@pref.d b/gas/testsuite/gas/mips/mipsr6@pref.d
index a6446655a9..389b03334a 100644
--- a/gas/testsuite/gas/mips/mipsr6@pref.d
+++ b/gas/testsuite/gas/mips/mipsr6@pref.d
@@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS PREF instruction
-#as: -32 --defsym tpref=1
+#as: -32 --defsym tpref=1 --defsym r6=1
#source: cache.s
# Check MIPS PREF instruction assembly.
diff --git a/gas/testsuite/gas/mips/option-pic-1.d b/gas/testsuite/gas/mips/option-pic-1.d
index da32af6a6c..612414ae75 100644
--- a/gas/testsuite/gas/mips/option-pic-1.d
+++ b/gas/testsuite/gas/mips/option-pic-1.d
@@ -13,6 +13,6 @@ Disassembly of section \.text:
[ ]*[0-9a-f]+: R_MIPS_LO16 bar
[0-9a-f]+ <[^>]*> 8f820000 lw v0,0\(gp\)
[ ]*[0-9a-f]+: R_MIPS_GOT16 bar
-[0-9a-f]+ <[^>]*> 03e00008 jr ra
+[0-9a-f]+ <[^>]*> 03e0000[89] jr ra
[0-9a-f]+ <[^>]*> 00000000 nop
\.\.\.
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d
index 24d051d5c4..2993d6d0b6 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-01.d
@@ -2,6 +2,7 @@
#source: attr-gnu-4-1.s
#ld: -r
#readelf: -A
+#xfail: mipsisa32r6*-*-* mipsisa64r6*-*-*
Attribute Section: gnu
File Attributes
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d
index ce94a818eb..a76da49fad 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-11.d
@@ -2,6 +2,7 @@
#source: attr-gnu-4-1.s
#ld: -r
#readelf: -A
+#xfail: mipsisa32r6*-*-* mipsisa64r6*-*-*
Attribute Section: gnu
File Attributes
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d b/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d
index 49f2137e0e..acebbeb7d2 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-4-41.d
@@ -1,6 +1,7 @@
#source: attr-gnu-4-4.s -W
#source: attr-gnu-4-1.s
#ld: -r
+#xfail: mipsisa32r6*-*-* mipsisa64r6*-*-*
#error: \A[^\n]*: [^\n]* linking -mfp32 module with previous -mfp64 modules\n
#error: [^\n]*: warning: .* uses -mips32r2 -mfp64 \(12 callee-saved\) \(set by .*\), .* uses -mdouble-float\n
#error: [^\n]*: failed to merge target specific data of file [^\n]*\.o\Z
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-8-00.d b/ld/testsuite/ld-mips-elf/attr-gnu-8-00.d
index 2f8e5f0925..34f766bae5 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-8-00.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-8-00.d
@@ -5,5 +5,5 @@
Attribute Section: gnu
File Attributes
- Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+ Tag_GNU_MIPS_ABI_FP: Hard float \((double precision|32-bit CPU, 64-bit FPU)\)
#pass
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-8-01.d b/ld/testsuite/ld-mips-elf/attr-gnu-8-01.d
index e2cda3341e..26a835f979 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-8-01.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-8-01.d
@@ -5,6 +5,6 @@
Attribute Section: gnu
File Attributes
- Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+ Tag_GNU_MIPS_ABI_FP: Hard float \((double precision|32-bit CPU, 64-bit FPU)\)
Tag_GNU_MIPS_ABI_MSA: 128-bit MSA
#pass
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-8-02.d b/ld/testsuite/ld-mips-elf/attr-gnu-8-02.d
index 54b196fa38..aee5d4cf57 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-8-02.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-8-02.d
@@ -5,6 +5,6 @@
Attribute Section: gnu
File Attributes
- Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+ Tag_GNU_MIPS_ABI_FP: Hard float \((double precision|32-bit CPU, 64-bit FPU)\)
Tag_GNU_MIPS_ABI_MSA: \?\?\? \(2\)
#pass
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-8-10.d b/ld/testsuite/ld-mips-elf/attr-gnu-8-10.d
index f7c512beeb..de9ac3009a 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-8-10.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-8-10.d
@@ -5,6 +5,6 @@
Attribute Section: gnu
File Attributes
- Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+ Tag_GNU_MIPS_ABI_FP: Hard float \((double precision|32-bit CPU, 64-bit FPU)\)
Tag_GNU_MIPS_ABI_MSA: 128-bit MSA
#pass
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-8-11.d b/ld/testsuite/ld-mips-elf/attr-gnu-8-11.d
index be87af4bd1..c07721c426 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-8-11.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-8-11.d
@@ -5,6 +5,6 @@
Attribute Section: gnu
File Attributes
- Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+ Tag_GNU_MIPS_ABI_FP: Hard float \((double precision|32-bit CPU, 64-bit FPU)\)
Tag_GNU_MIPS_ABI_MSA: 128-bit MSA
#pass
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-8-20.d b/ld/testsuite/ld-mips-elf/attr-gnu-8-20.d
index 05f4da064a..47de4c7763 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-8-20.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-8-20.d
@@ -5,6 +5,6 @@
Attribute Section: gnu
File Attributes
- Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+ Tag_GNU_MIPS_ABI_FP: Hard float \((double precision|32-bit CPU, 64-bit FPU)\)
Tag_GNU_MIPS_ABI_MSA: \?\?\? \(2\)
#pass
diff --git a/ld/testsuite/ld-mips-elf/attr-gnu-8-22.d b/ld/testsuite/ld-mips-elf/attr-gnu-8-22.d
index 908ce4f00a..ba267ebdd3 100644
--- a/ld/testsuite/ld-mips-elf/attr-gnu-8-22.d
+++ b/ld/testsuite/ld-mips-elf/attr-gnu-8-22.d
@@ -5,6 +5,6 @@
Attribute Section: gnu
File Attributes
- Tag_GNU_MIPS_ABI_FP: Hard float \(double precision\)
+ Tag_GNU_MIPS_ABI_FP: Hard float \((double precision|32-bit CPU, 64-bit FPU)\)
Tag_GNU_MIPS_ABI_MSA: \?\?\? \(2\)
#pass
diff --git a/ld/testsuite/ld-mips-elf/emit-relocs-1.d b/ld/testsuite/ld-mips-elf/emit-relocs-1.d
index 86305d314c..d305752aad 100644
--- a/ld/testsuite/ld-mips-elf/emit-relocs-1.d
+++ b/ld/testsuite/ld-mips-elf/emit-relocs-1.d
@@ -23,7 +23,7 @@ OFFSET TYPE VALUE *
Contents of section \.text:
- 80000 03e00008 00000000 00000000 00000000 .*
+ 80000 03e0000[89] 00000000 00000000 00000000 .*
Contents of section \.merge1:
80400 666c7574 74657200 flutter.*
Contents of section \.merge2:
diff --git a/ld/testsuite/ld-mips-elf/export-class-call16-n32.dd b/ld/testsuite/ld-mips-elf/export-class-call16-n32.dd
index a033972a9d..011089a56b 100644
--- a/ld/testsuite/ld-mips-elf/export-class-call16-n32.dd
+++ b/ld/testsuite/ld-mips-elf/export-class-call16-n32.dd
@@ -21,21 +21,21 @@ Disassembly of section \.text:
12340038: 00000000 nop
1234003c: dfbc0000 ld gp,0\(sp\)
12340040: dfbf0008 ld ra,8\(sp\)
-12340044: 03e00008 jr ra
+12340044: 03e0000[89] jr ra
12340048: 27bd0010 addiu sp,sp,16
\.\.\.
12340060 <protected_foo>:
-12340060: 03e00008 jr ra
+12340060: 03e0000[89] jr ra
12340064: 00000000 nop
\.\.\.
12340070 <hidden_foo>:
-12340070: 03e00008 jr ra
+12340070: 03e0000[89] jr ra
12340074: 00000000 nop
\.\.\.
12340080 <internal_foo>:
-12340080: 03e00008 jr ra
+12340080: 03e0000[89] jr ra
12340084: 00000000 nop
\.\.\.
diff --git a/ld/testsuite/ld-mips-elf/export-class-call16-n64.dd b/ld/testsuite/ld-mips-elf/export-class-call16-n64.dd
index 7b481aaa01..1694500b52 100644
--- a/ld/testsuite/ld-mips-elf/export-class-call16-n64.dd
+++ b/ld/testsuite/ld-mips-elf/export-class-call16-n64.dd
@@ -21,21 +21,21 @@ Disassembly of section \.text:
123456789abc0038: 00000000 nop
123456789abc003c: dfbc0000 ld gp,0\(sp\)
123456789abc0040: dfbf0008 ld ra,8\(sp\)
-123456789abc0044: 03e00008 jr ra
+123456789abc0044: 03e0000[89] jr ra
123456789abc0048: 67bd0010 daddiu sp,sp,16
\.\.\.
123456789abc0060 <protected_foo>:
-123456789abc0060: 03e00008 jr ra
+123456789abc0060: 03e0000[89] jr ra
123456789abc0064: 00000000 nop
\.\.\.
123456789abc0070 <hidden_foo>:
-123456789abc0070: 03e00008 jr ra
+123456789abc0070: 03e0000[89] jr ra
123456789abc0074: 00000000 nop
\.\.\.
123456789abc0080 <internal_foo>:
-123456789abc0080: 03e00008 jr ra
+123456789abc0080: 03e0000[89] jr ra
123456789abc0084: 00000000 nop
\.\.\.
diff --git a/ld/testsuite/ld-mips-elf/export-class-call16-o32.dd b/ld/testsuite/ld-mips-elf/export-class-call16-o32.dd
index 616af2fe0c..2ea8be6229 100644
--- a/ld/testsuite/ld-mips-elf/export-class-call16-o32.dd
+++ b/ld/testsuite/ld-mips-elf/export-class-call16-o32.dd
@@ -23,21 +23,21 @@ Disassembly of section \.text:
12340040: 00000000 nop
12340044: 8fbc0000 lw gp,0\(sp\)
12340048: 8fbf0004 lw ra,4\(sp\)
-1234004c: 03e00008 jr ra
+1234004c: 03e0000[89] jr ra
12340050: 27bd0008 addiu sp,sp,8
\.\.\.
12340060 <protected_foo>:
-12340060: 03e00008 jr ra
+12340060: 03e0000[89] jr ra
12340064: 00000000 nop
\.\.\.
12340070 <hidden_foo>:
-12340070: 03e00008 jr ra
+12340070: 03e0000[89] jr ra
12340074: 00000000 nop
\.\.\.
12340080 <internal_foo>:
-12340080: 03e00008 jr ra
+12340080: 03e0000[89] jr ra
12340084: 00000000 nop
\.\.\.
diff --git a/ld/testsuite/ld-mips-elf/gp-disp-sym.s b/ld/testsuite/ld-mips-elf/gp-disp-sym.s
index c6380ba1fb..3b06e717f5 100644
--- a/ld/testsuite/ld-mips-elf/gp-disp-sym.s
+++ b/ld/testsuite/ld-mips-elf/gp-disp-sym.s
@@ -2,4 +2,4 @@
.text
foo:
lui $t0, %hi(_gp_disp)
- addi $t0, $t0, %lo(_gp_disp)
+ addiu $t0, $t0, %lo(_gp_disp)
diff --git a/ld/testsuite/ld-mips-elf/jalr3.dd b/ld/testsuite/ld-mips-elf/jalr3.dd
index 6b6d484120..5c9d83fdfd 100644
--- a/ld/testsuite/ld-mips-elf/jalr3.dd
+++ b/ld/testsuite/ld-mips-elf/jalr3.dd
@@ -9,6 +9,6 @@ Disassembly of section \.text:
c: 00000000 nop
0+000010 <\$bar>:
- 10: 03e00008 jr ra
+ 10: 03e0000[89] jr ra
14: 00000000 nop
\.\.\.
diff --git a/ld/testsuite/ld-mips-elf/jalr4.dd b/ld/testsuite/ld-mips-elf/jalr4.dd
index 56ee0940b7..207a10283b 100644
--- a/ld/testsuite/ld-mips-elf/jalr4.dd
+++ b/ld/testsuite/ld-mips-elf/jalr4.dd
@@ -9,15 +9,15 @@ Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 0320f809 jalr t9
[0-9a-f]+ <[^>]*> 00000000 nop
-[0-9a-f]+ <[^>]*> 03200009 jalr zero,t9
+[0-9a-f]+ <[^>]*> 03200009 (jalr zero,t9|jr t9)
[0-9a-f]+ <[^>]*> 00000000 nop
-[0-9a-f]+ <[^>]*> 03200008 jr t9
+[0-9a-f]+ <[^>]*> 0320000[89] jr t9
[0-9a-f]+ <[^>]*> 00000000 nop
[0-9a-f]+ <[^>]*> 0320f809 jalr t9
[0-9a-f]+ <[^>]*> 00000000 nop
-[0-9a-f]+ <[^>]*> 03200009 jalr zero,t9
+[0-9a-f]+ <[^>]*> 03200009 (jalr zero,t9|jr t9)
[0-9a-f]+ <[^>]*> 00000000 nop
-[0-9a-f]+ <[^>]*> 03200008 jr t9
+[0-9a-f]+ <[^>]*> 0320000[89] jr t9
[0-9a-f]+ <[^>]*> 00000000 nop
\.\.\.
\.\.\.
diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp
index 1eb9dd271f..4c1a487053 100644
--- a/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -149,10 +149,18 @@ set abi_ldflags(n32) ""
set abi_ldflags(n64) ""
set abi_ldflags(eabi) ""
+if { $has_abi(o32) && $is_r6 } {
+ set abi_as64flags "-mips64r6"
+} elseif { $has_abi(o32) && !$is_r6 } {
+ set abi_as64flags "-mips3"
+} else {
+ set abi_as64flags ""
+}
+
# Override as needed.
if {[istarget *-*-openbsd*] } {
set irixemul 0
-} elseif { [istarget mips64*-*-linux*] } {
+} elseif { [istarget mips*64*-*-linux*] } {
if [istarget *el-*-*] {
set abi_asflags(o32) -32
set abi_ldflags(o32) -melf32ltsmip
@@ -251,7 +259,7 @@ if {[istarget *-*-openbsd*] } {
}
set tmips [expr $irixemul ? {""} : {"t"}]
-if { $linux_gnu } {
+if { $linux_gnu && !$is_r6 } {
run_ld_link_tests [list \
[list "Dummy shared library for MIPS16 PIC test 1" \
"-shared -melf32btsmip" "" \
@@ -301,66 +309,71 @@ if { $linux_gnu } {
}
# Check MIPS16 markings being passed through link.
-run_dump_test "mips16-1"
+if { !$is_r6 } {
+ run_dump_test "mips16-1"
+}
# MIPS branch offset final link checking.
run_dump_test "branch-misc-1"
run_dump_test "branch-misc-2"
-run_dump_test_o32 "branch-absolute"
-run_dump_test_o32 "branch-absolute-addend"
-run_dump_test_n32 "branch-absolute-n32"
-run_dump_test_n32 "branch-absolute-addend-n32"
-run_dump_test_n64 "branch-absolute-n64"
-run_dump_test_n64 "branch-absolute-addend-n64"
-
-run_dump_test_o32 "mips16-pcrel-0"
-run_dump_test_o32 "mips16-pcrel-1" noarch
-run_dump_test_o32 "mips16e2-pcrel-0" noarch
-run_dump_test_o32 "mips16e2-pcrel-1" noarch
-run_dump_test_o32 "mips16-pcrel-addend-2"
-run_dump_test_o32 "mips16-pcrel-addend-6"
-run_dump_test_o32 "mips16e2-pcrel-addend-2" noarch
-run_dump_test_o32 "mips16e2-pcrel-addend-6" noarch
-run_dump_test_n32 "mips16-pcrel-n32-0"
-run_dump_test_n32 "mips16-pcrel-n32-1"
-run_dump_test_n64 "mips16-pcrel-n64-sym32-0"
-run_dump_test_n64 "mips16-pcrel-n64-sym32-1"
-run_dump_test_n32 "mips16e2-pcrel-n32-0" noarch
-run_dump_test_n32 "mips16e2-pcrel-n32-1" noarch
-run_dump_test_n64 "mips16e2-pcrel-n64-sym32-0" noarch
-run_dump_test_n64 "mips16e2-pcrel-n64-sym32-1" noarch
-
-run_dump_test_o32 "mips16-branch-2"
-run_dump_test_o32 "mips16-branch-3"
-run_dump_test_o32 "mips16-branch-addend-2"
-run_dump_test_o32 "mips16-branch-addend-3"
-run_dump_test_o32 "mips16-branch-absolute"
-run_dump_test_o32 "mips16-branch-absolute-1"
-run_dump_test_o32 "mips16-branch-absolute-2"
-run_dump_test_o32 "mips16-branch-absolute-addend"
-run_dump_test_o32 "mips16-branch-absolute-addend-1"
-run_dump_test_n32 "mips16-branch-absolute-n32"
-run_dump_test_n32 "mips16-branch-absolute-n32-1"
-run_dump_test_n32 "mips16-branch-absolute-n32-2"
-run_dump_test_n32 "mips16-branch-absolute-addend-n32"
-run_dump_test_n32 "mips16-branch-absolute-addend-n32-1"
-run_dump_test_n64 "mips16-branch-absolute-n64"
-run_dump_test_n64 "mips16-branch-absolute-n64-1"
-run_dump_test_n64 "mips16-branch-absolute-n64-2"
-run_dump_test_n64 "mips16-branch-absolute-addend-n64"
-run_dump_test_n64 "mips16-branch-absolute-addend-n64-1"
-
-run_dump_test_o32 "micromips-branch-absolute"
-run_dump_test_o32 "micromips-branch-absolute-addend"
-run_dump_test_n32 "micromips-branch-absolute-n32"
-run_dump_test_n32 "micromips-branch-absolute-addend-n32"
-run_dump_test_n64 "micromips-branch-absolute-n64"
-run_dump_test_n64 "micromips-branch-absolute-addend-n64"
-
-# Jalx test
-run_dump_test "jalx-1"
-if { $linux_gnu } {
+if { !$is_r6 } {
+ run_dump_test_o32 "branch-absolute"
+ run_dump_test_o32 "branch-absolute-addend"
+ run_dump_test_n32 "branch-absolute-n32"
+ run_dump_test_n32 "branch-absolute-addend-n32"
+ run_dump_test_n64 "branch-absolute-n64"
+ run_dump_test_n64 "branch-absolute-addend-n64"
+
+ run_dump_test_o32 "mips16-pcrel-0"
+ run_dump_test_o32 "mips16-pcrel-1" noarch
+ run_dump_test_o32 "mips16e2-pcrel-0" noarch
+ run_dump_test_o32 "mips16e2-pcrel-1" noarch
+ run_dump_test_o32 "mips16-pcrel-addend-2"
+ run_dump_test_o32 "mips16-pcrel-addend-6"
+ run_dump_test_o32 "mips16e2-pcrel-addend-2" noarch
+ run_dump_test_o32 "mips16e2-pcrel-addend-6" noarch
+ run_dump_test_n32 "mips16-pcrel-n32-0"
+ run_dump_test_n32 "mips16-pcrel-n32-1"
+ run_dump_test_n64 "mips16-pcrel-n64-sym32-0"
+ run_dump_test_n64 "mips16-pcrel-n64-sym32-1"
+ run_dump_test_n32 "mips16e2-pcrel-n32-0" noarch
+ run_dump_test_n32 "mips16e2-pcrel-n32-1" noarch
+ run_dump_test_n64 "mips16e2-pcrel-n64-sym32-0" noarch
+ run_dump_test_n64 "mips16e2-pcrel-n64-sym32-1" noarch
+
+ run_dump_test_o32 "mips16-branch-2"
+ run_dump_test_o32 "mips16-branch-3"
+ run_dump_test_o32 "mips16-branch-addend-2"
+ run_dump_test_o32 "mips16-branch-addend-3"
+ run_dump_test_o32 "mips16-branch-absolute"
+ run_dump_test_o32 "mips16-branch-absolute-1"
+ run_dump_test_o32 "mips16-branch-absolute-2"
+ run_dump_test_o32 "mips16-branch-absolute-addend"
+ run_dump_test_o32 "mips16-branch-absolute-addend-1"
+ run_dump_test_n32 "mips16-branch-absolute-n32"
+ run_dump_test_n32 "mips16-branch-absolute-n32-1"
+ run_dump_test_n32 "mips16-branch-absolute-n32-2"
+ run_dump_test_n32 "mips16-branch-absolute-addend-n32"
+ run_dump_test_n32 "mips16-branch-absolute-addend-n32-1"
+ run_dump_test_n64 "mips16-branch-absolute-n64"
+ run_dump_test_n64 "mips16-branch-absolute-n64-1"
+ run_dump_test_n64 "mips16-branch-absolute-n64-2"
+ run_dump_test_n64 "mips16-branch-absolute-addend-n64"
+ run_dump_test_n64 "mips16-branch-absolute-addend-n64-1"
+
+ run_dump_test_o32 "micromips-branch-absolute"
+ run_dump_test_o32 "micromips-branch-absolute-addend"
+ run_dump_test_n32 "micromips-branch-absolute-n32"
+ run_dump_test_n32 "micromips-branch-absolute-addend-n32"
+ run_dump_test_n64 "micromips-branch-absolute-n64"
+ run_dump_test_n64 "micromips-branch-absolute-addend-n64"
+
+ # Jalx test
+ run_dump_test "jalx-1"
+}
+
+if { $linux_gnu && !$is_r6 } {
run_ld_link_tests [list \
[list "Dummy shared library for JALX test 2" \
"-shared -nostdlib -melf32btsmip" "" \
@@ -382,69 +395,75 @@ if { $linux_gnu } {
"jalx-2"]]
}
-run_dump_test_o32 "jalx-addend"
-run_dump_test_o32 "jalx-local"
-run_dump_test_o32 "bal-jalx-addend"
-run_dump_test_o32 "bal-jalx-addend-micromips"
-run_dump_test_o32 "bal-jalx-local"
-run_dump_test_o32 "bal-jalx-local-micromips"
-run_dump_test_o32 "bal-jalx-pic"
-run_dump_test_o32 "bal-jalx-pic-micromips"
-run_dump_test_o32 "bal-jalx-pic-ignore"
-run_dump_test_o32 "bal-jalx-pic-ignore-micromips"
-run_dump_test_n32 "jalx-addend-n32"
-run_dump_test_n32 "jalx-local-n32"
-run_dump_test_n32 "bal-jalx-addend-n32"
-run_dump_test_n32 "bal-jalx-addend-micromips-n32"
-run_dump_test_n32 "bal-jalx-local-n32"
-run_dump_test_n32 "bal-jalx-local-micromips-n32"
-run_dump_test_n32 "bal-jalx-pic-n32"
-run_dump_test_n32 "bal-jalx-pic-micromips-n32"
-run_dump_test_n32 "bal-jalx-pic-ignore-n32"
-run_dump_test_n32 "bal-jalx-pic-ignore-micromips-n32"
-run_dump_test_n64 "jalx-addend-n64"
-run_dump_test_n64 "jalx-local-n64"
-run_dump_test_n64 "bal-jalx-addend-n64"
-run_dump_test_n64 "bal-jalx-addend-micromips-n64"
-run_dump_test_n64 "bal-jalx-local-n64"
-run_dump_test_n64 "bal-jalx-local-micromips-n64"
-run_dump_test_n64 "bal-jalx-pic-n64"
-run_dump_test_n64 "bal-jalx-pic-micromips-n64"
-run_dump_test_n64 "bal-jalx-pic-ignore-n64"
-run_dump_test_n64 "bal-jalx-pic-ignore-micromips-n64"
-
-run_dump_test "unaligned-jalx-0" [list [list ld $abi_ldflags(o32)]]
-run_dump_test "unaligned-jalx-1" [list [list ld $abi_ldflags(o32)]]
-run_dump_test "unaligned-jalx-2" [list [list ld $abi_ldflags(o32)]]
-run_dump_test "unaligned-jalx-3" [list [list ld $abi_ldflags(o32)]]
-run_dump_test "unaligned-jalx-mips16-0" [list [list ld $abi_ldflags(o32)]]
-run_dump_test "unaligned-jalx-mips16-1" [list [list ld $abi_ldflags(o32)]]
-run_dump_test "unaligned-jalx-micromips-0" [list [list ld $abi_ldflags(o32)]]
-run_dump_test "unaligned-jalx-micromips-1" [list [list ld $abi_ldflags(o32)]]
-
-run_dump_test_n32 "unaligned-jalx-addend-0"
-run_dump_test_n32 "unaligned-jalx-addend-1"
-run_dump_test_n32 "unaligned-jalx-addend-2"
-run_dump_test_n32 "unaligned-jalx-addend-3"
-run_dump_test_n32 "unaligned-jalx-addend-mips16-0"
-run_dump_test_n32 "unaligned-jalx-addend-mips16-1"
-run_dump_test_n32 "unaligned-jalx-addend-micromips-0"
-run_dump_test_n32 "unaligned-jalx-addend-micromips-1"
+if { !$is_r6 } {
+ run_dump_test_o32 "jalx-addend"
+ run_dump_test_o32 "jalx-local"
+ run_dump_test_o32 "bal-jalx-addend"
+ run_dump_test_o32 "bal-jalx-addend-micromips"
+ run_dump_test_o32 "bal-jalx-local"
+ run_dump_test_o32 "bal-jalx-local-micromips"
+ run_dump_test_o32 "bal-jalx-pic"
+ run_dump_test_o32 "bal-jalx-pic-micromips"
+ run_dump_test_o32 "bal-jalx-pic-ignore"
+ run_dump_test_o32 "bal-jalx-pic-ignore-micromips"
+ run_dump_test_n32 "jalx-addend-n32"
+ run_dump_test_n32 "jalx-local-n32"
+ run_dump_test_n32 "bal-jalx-addend-n32"
+ run_dump_test_n32 "bal-jalx-addend-micromips-n32"
+ run_dump_test_n32 "bal-jalx-local-n32"
+ run_dump_test_n32 "bal-jalx-local-micromips-n32"
+ run_dump_test_n32 "bal-jalx-pic-n32"
+ run_dump_test_n32 "bal-jalx-pic-micromips-n32"
+ run_dump_test_n32 "bal-jalx-pic-ignore-n32"
+ run_dump_test_n32 "bal-jalx-pic-ignore-micromips-n32"
+ run_dump_test_n64 "jalx-addend-n64"
+ run_dump_test_n64 "jalx-local-n64"
+ run_dump_test_n64 "bal-jalx-addend-n64"
+ run_dump_test_n64 "bal-jalx-addend-micromips-n64"
+ run_dump_test_n64 "bal-jalx-local-n64"
+ run_dump_test_n64 "bal-jalx-local-micromips-n64"
+ run_dump_test_n64 "bal-jalx-pic-n64"
+ run_dump_test_n64 "bal-jalx-pic-micromips-n64"
+ run_dump_test_n64 "bal-jalx-pic-ignore-n64"
+ run_dump_test_n64 "bal-jalx-pic-ignore-micromips-n64"
+
+ run_dump_test "unaligned-jalx-0" [list [list ld $abi_ldflags(o32)]]
+ run_dump_test "unaligned-jalx-1" [list [list ld $abi_ldflags(o32)]]
+ run_dump_test "unaligned-jalx-2" [list [list ld $abi_ldflags(o32)]]
+ run_dump_test "unaligned-jalx-3" [list [list ld $abi_ldflags(o32)]]
+ run_dump_test "unaligned-jalx-mips16-0" [list [list ld $abi_ldflags(o32)]]
+ run_dump_test "unaligned-jalx-mips16-1" [list [list ld $abi_ldflags(o32)]]
+ run_dump_test "unaligned-jalx-micromips-0" [list [list ld $abi_ldflags(o32)]]
+ run_dump_test "unaligned-jalx-micromips-1" [list [list ld $abi_ldflags(o32)]]
+
+ run_dump_test_n32 "unaligned-jalx-addend-0"
+ run_dump_test_n32 "unaligned-jalx-addend-1"
+ run_dump_test_n32 "unaligned-jalx-addend-2"
+ run_dump_test_n32 "unaligned-jalx-addend-3"
+ run_dump_test_n32 "unaligned-jalx-addend-mips16-0"
+ run_dump_test_n32 "unaligned-jalx-addend-mips16-1"
+ run_dump_test_n32 "unaligned-jalx-addend-micromips-0"
+ run_dump_test_n32 "unaligned-jalx-addend-micromips-1"
+}
run_dump_test_o32 "unaligned-branch" noarch
-run_dump_test_n32 "unaligned-branch-2"
-run_dump_test_n32 "unaligned-branch-ignore-2"
-run_dump_test_n32 "unaligned-branch-r6-1"
-run_dump_test_n32 "unaligned-branch-ignore-r6-1"
+if { !$is_r6 } {
+ run_dump_test_n32 "unaligned-branch-2"
+ run_dump_test_n32 "unaligned-branch-ignore-2"
+ run_dump_test_n32 "unaligned-branch-r6-1"
+ run_dump_test_n32 "unaligned-branch-ignore-r6-1"
+}
run_dump_test_n32 "unaligned-branch-r6-2" noarch
-run_dump_test_n32 "unaligned-branch-mips16"
-run_dump_test_n32 "unaligned-branch-ignore-mips16"
-run_dump_test_n32 "unaligned-branch-micromips"
-run_dump_test_n32 "unaligned-branch-ignore-micromips"
-run_dump_test_n32 "unaligned-jump"
-run_dump_test_n32 "unaligned-jump-mips16"
-run_dump_test_n32 "unaligned-jump-micromips"
+if { !$is_r6 } {
+ run_dump_test_n32 "unaligned-branch-mips16"
+ run_dump_test_n32 "unaligned-branch-ignore-mips16"
+ run_dump_test_n32 "unaligned-branch-micromips"
+ run_dump_test_n32 "unaligned-branch-ignore-micromips"
+ run_dump_test_n32 "unaligned-jump"
+ run_dump_test_n32 "unaligned-jump-mips16"
+ run_dump_test_n32 "unaligned-jump-micromips"
+}
run_dump_test_o32 "unaligned-lwpc-0" noarch
run_dump_test_o32 "unaligned-lwpc-1" noarch
@@ -478,8 +497,10 @@ if { $embedded_elf } {
run_dump_test_n32 "elf-rel-got-n32-embed" {{as -EB} {ld -EB}}
run_dump_test_n32 "elf-rel-xgot-n32-embed" {{as -EB} {ld -EB}}
} else {
- run_dump_test_n32 "elf-rel-got-n32" {{as -EB} {ld -EB}}
- run_dump_test_n32 "elf-rel-xgot-n32" {{as -EB} {ld -EB}}
+ if { !$is_r6 } {
+ run_dump_test_n32 "elf-rel-got-n32" {{as -EB} {ld -EB}}
+ run_dump_test_n32 "elf-rel-xgot-n32" {{as -EB} {ld -EB}}
+ }
}
if { $irix } {
run_dump_test_n64 "elf-rel-got-n64-irix"
@@ -488,8 +509,10 @@ if { $irix } {
run_dump_test_n64 "elf-rel-got-n64-embed" {{as -EB} {ld -EB}}
run_dump_test_n64 "elf-rel-xgot-n64-embed" {{as -EB} {ld -EB}}
} else {
- run_dump_test_n64 "elf-rel-got-n64" {{as -EB} {ld -EB}}
- run_dump_test_n64 "elf-rel-xgot-n64" {{as -EB} {ld -EB}}
+ if { !$is_r6 } {
+ run_dump_test_n64 "elf-rel-got-n64" {{as -EB} {ld -EB}}
+ run_dump_test_n64 "elf-rel-xgot-n64" {{as -EB} {ld -EB}}
+ }
}
run_dump_test_n32 "relax-jalr-n32" {{as -EB} {ld -EB}}
@@ -714,7 +737,9 @@ run_dump_test_o32 "reloc-2" [list [list objdump [expr { [istarget *el-*-*] \
? "--endian=little" \
: "--endian=big" }]]]
run_dump_test "reloc-merge-lo16"
-run_dump_test "reloc-3"
+if { !$is_r6 } {
+ run_dump_test "reloc-3"
+}
run_dump_test_n32 "reloc-3-n32" noarch
run_dump_test "reloc-4"
run_dump_test "reloc-5"
@@ -804,10 +829,12 @@ run_dump_test_n64 "undefweak-overflow" [list [list name (n64)]]
run_dump_test_n32 "jalbal" noarch
-run_dump_test "mode-change-error-1"
+if { !$is_r6 } {
+ run_dump_test "mode-change-error-1"
run_dump_test_o32 "mips16-hilo"
run_dump_test_n32 "mips16-hilo-n32"
+}
if { $linux_gnu } {
run_dump_test_n32 "textrel-1"
@@ -869,7 +896,7 @@ run_dump_test_n32 "emit-relocs-1" {{as -EB} {ld -EB}}
run_dump_test "hash1"
run_dump_test "hash2"
-if { $linux_gnu && $has_abi(o32) } {
+if { $linux_gnu && $has_abi(o32) && !$is_r6 } {
# The number of symbols that are always included in the symbol table
# for these tests.
# the null symbol entry
@@ -1120,10 +1147,12 @@ run_dump_test_o32 "abiflags-strip8-ph"
run_dump_test_o32 "abiflags-strip9-ph"
run_dump_test_o32 "abiflags-strip10-ph"
-run_dump_test "nan-legacy"
+if { !$is_r6 } {
+ run_dump_test "nan-legacy"
+ run_dump_test "nan-mixed-1"
+ run_dump_test "nan-mixed-2"
+}
run_dump_test "nan-2008"
-run_dump_test "nan-mixed-1"
-run_dump_test "nan-mixed-2"
if { $linux_gnu && $has_abi(o32) } {
run_ld_link_tests {
@@ -1147,7 +1176,9 @@ if { $linux_gnu } {
}
# MIPS16 and microMIPS interlinking test.
-run_dump_test "mips16-and-micromips"
+if { !$is_r6 } {
+ run_dump_test "mips16-and-micromips"
+}
set abis {}
if $has_abi(o32) {
@@ -1175,7 +1206,7 @@ if [check_shared_lib_support] {
"$abi_ldflags($abi) -shared -Ttext $loadaddr\
-T export-class-call16.ld" \
"" \
- "$abi_asflags($abi) -mips3 -KPIC" \
+ "$abi_asflags($abi) $abi_as64flags -KPIC" \
[list export-class-call16-${abi}.s export-class-call16-def.s] \
[list \
"objdump -d export-class-call16-${suff}.dd" \
@@ -1309,7 +1340,7 @@ if { $linux_gnu && $has_abi(o32) } {
o32 109 1 umips-word compressed-plt-1e.s
}
-if { $linux_gnu && $has_abi(n32) } {
+if { $linux_gnu && $has_abi(n32) && !$is_r6 } {
build_mips_plt_lib n32
run_mips_plt_test "n32 PLTs for mixed MIPS and MIPS16" \
n32 109 0 mips16
@@ -1390,7 +1421,7 @@ if { $linux_gnu && $has_abi(o32) } {
}
# PR ld/21334 GOT relocation in static binary test.
-if { $has_abi(o32) } {
+if { $has_abi(o32) && !$is_r6 } {
run_ld_link_tests [list \
[list \
"PR ld/21334 MIPS GOT16 relocation in static binary" \
@@ -1406,7 +1437,7 @@ run_dump_test_o32 "lsi-4010-isa" noarch
# PIC branch relaxation with offset tests. We need to use our version
# of `prune_warnings' to get rid of GAS branch relaxation noise.
-if { $has_abi(o32) } {
+if { $has_abi(o32) && !$is_r6 } {
rename prune_warnings mips_old_prune_warnings
proc prune_warnings { msg } {
set msg1 "Assembler messages:"
@@ -1593,7 +1624,7 @@ proc run_mips_undefweak_test { name abi args } {
}
}
-if $has_abi(o32) {
+if { $has_abi(o32) && !$is_r6 } {
run_mips_undefweak_test "SVR4 executable" \
o32
run_mips_undefweak_test "SVR4 executable (hidden)" \
@@ -1633,7 +1664,7 @@ if $has_abi(o32) {
run_mips_undefweak_test "shared library (microMIPS, large GOT, hidden)" \
o32 dso umips xgot hidden
}
-if $has_abi(n32) {
+if { $has_abi(n32) && !$is_r6 } {
run_mips_undefweak_test "shared library (n32)" \
n32 dso
run_mips_undefweak_test "shared library (n32, hidden)" \
@@ -1643,7 +1674,7 @@ if $has_abi(n32) {
run_mips_undefweak_test "shared library (n32, microMIPS, hidden)" \
n32 dso umips hidden
}
-if $has_abi(n64) {
+if { $has_abi(n64) && !$is_r6 } {
run_mips_undefweak_test "shared library (n64)" \
n64 dso
run_mips_undefweak_test "shared library (n64, hidden)" \
@@ -1661,13 +1692,15 @@ run_dump_test "pic-reloc-2"
run_dump_test "pic-reloc-3"
run_dump_test "pic-reloc-4"
run_dump_test_o32 "pic-reloc-5"
-run_dump_test_o32 "pic-reloc-5" [list [list name (microMIPS)] \
+if { !$is_r6 } {
+ run_dump_test_o32 "pic-reloc-5" [list [list name (microMIPS)] \
[list as "-mmicromips"]]
-run_dump_test_o32 "pic-reloc-6"
-run_dump_test_n64 "pic-reloc-7"
-run_dump_test_n64 "pic-reloc-7" [list [list name (microMIPS)] \
+ run_dump_test_o32 "pic-reloc-6"
+ run_dump_test_n64 "pic-reloc-7" [list [list name (microMIPS)] \
[list as "-mmicromips"]]
+}
+run_dump_test_n64 "pic-reloc-7"
run_dump_test_o32 "reloc-pcrel-r6"
# Global/local symbol table split tests.
diff --git a/ld/testsuite/ld-mips-elf/n64-plt-1.dd b/ld/testsuite/ld-mips-elf/n64-plt-1.dd
index 4c24a9a16c..51d654a343 100644
--- a/ld/testsuite/ld-mips-elf/n64-plt-1.dd
+++ b/ld/testsuite/ld-mips-elf/n64-plt-1.dd
@@ -15,7 +15,7 @@ Disassembly of section \.plt:
00000000100002a0 <bar@plt>:
100002a0: 3c0f7fff lui t3,0x7fff
100002a4: ddf97ff8 ld t9,32760\(t3\)
- 100002a8: 03200008 jr t9
+ 100002a8: 0320000[89] jr t9
100002ac: 25f87ff8 addiu t8,t3,32760
Disassembly of section \.text:
diff --git a/ld/testsuite/ld-mips-elf/n64-plt-4.dd b/ld/testsuite/ld-mips-elf/n64-plt-4.dd
index 01c5025615..71fee33c4e 100644
--- a/ld/testsuite/ld-mips-elf/n64-plt-4.dd
+++ b/ld/testsuite/ld-mips-elf/n64-plt-4.dd
@@ -15,7 +15,7 @@ ffffffff1000029c: 2718fffe addiu t8,t8,-2
ffffffff100002a0 <bar@plt>:
ffffffff100002a0: 3c0f8000 lui t3,0x8000
ffffffff100002a4: ddf98010 ld t9,-32752\(t3\)
-ffffffff100002a8: 03200008 jr t9
+ffffffff100002a8: 0320000[89] jr t9
ffffffff100002ac: 25f88010 addiu t8,t3,-32752
Disassembly of section \.text:
diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d b/ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d
index 3baf22851a..e3cc14ec79 100644
--- a/ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d
+++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-2.d
@@ -17,6 +17,6 @@ Disassembly of section \.text:
4101c: 27391020 addiu t9,t9,4128
00041020 <foo2>:
- 41020: 03e00008 jr ra
+ 41020: 03e0000[89] jr ra
41024: 00000000 nop
\.\.\.
--
2.20.1
^ permalink raw reply [flat|nested] 33+ messages in thread
* 回复: [PATCH 1/3] MIPS: Fix test failure with FPXX GCC
2021-03-08 4:30 [PATCH 1/3] MIPS: Fix test failure with FPXX GCC YunQiang Su
2021-03-08 4:30 ` [PATCH 2/3] MIPS: default output r6 object if configured to r6 YunQiang Su
2021-03-08 4:30 ` [PATCH 3/3] MIPS: Fix testcase for MIPSr6 YunQiang Su
@ 2021-03-19 5:47 ` yunqiang.su
2 siblings, 0 replies; 33+ messages in thread
From: yunqiang.su @ 2021-03-19 5:47 UTC (permalink / raw)
To: jiaxun.yang, macro; +Cc: binutils, syq
Ping...
> GCC can be configured as FPXX default, which requires MIPS II.
> This make `as' (default to MIPS I) fails to run some test.
>
> To fix this, we pass -mfp32 option to GCC.
>
> ChangeLog:
> 2021-03-08 YunQiang Su <yunqiang.su@cipunited.com>
> * ld/testsuite/ld-elf/elf.exp: Set "-mfp32" CFLAGS for mips32
> * ld/testsuite/ld-elf/shared.exp: Likewise
> * ld/testsuite/ld-elf/tls.exp: Likewise
> * ld/testsuite/ld-elfvers/vers.exp: Likewise
> ---
> ld/testsuite/ld-elf/elf.exp | 8 ++++++++
> ld/testsuite/ld-elf/shared.exp | 5 +++++
> ld/testsuite/ld-elf/tls.exp | 12 ++++++++++++
> ld/testsuite/ld-elfvers/vers.exp | 7 +++++++
> 4 files changed, 32 insertions(+)
>
> diff --git a/ld/testsuite/ld-elf/elf.exp b/ld/testsuite/ld-elf/elf.exp
index
> e98bffc0c5..37d49faa3c 100644
> --- a/ld/testsuite/ld-elf/elf.exp
> +++ b/ld/testsuite/ld-elf/elf.exp
> @@ -421,6 +421,13 @@ run_cc_link_tests [list \
> ] \
> ]
>
> +set old_cflags $CFLAGS
> +if { [istarget "mips-*-*"]
> + || [istarget "mipsel-*-*"] } {
> + # the default target of as is MIPS I, which has no ldc1/sdc1
> + # the gcc may be set as fpxx/fp64 default, which require mips2+
> + append CFLAGS " -mfp32"
> +}
> run_ld_link_tests [list \
> [list \
> "Build pr26391-5.o" \
> @@ -446,6 +453,7 @@ run_ld_link_tests [list \
> "-ffunction-sections" \
> ] \
> ]
> +set CFLAGS $old_cflags
>
> run_ld_link_exec_tests [list \
> [list \
> diff --git a/ld/testsuite/ld-elf/shared.exp
b/ld/testsuite/ld-elf/shared.exp
> index 6bf49785a5..ef67e3b8e2 100644
> --- a/ld/testsuite/ld-elf/shared.exp
> +++ b/ld/testsuite/ld-elf/shared.exp
> @@ -941,6 +941,10 @@ run_cc_link_tests [list \
> ] \
> ]
>
> +set old_CFLAGS $CFLAGS
> +if { [istarget "mips-*-*"] || [istarget "mipsel-*-*"] } {
> + append CFLAGS " -mfp32"
> +}
> run_ld_link_tests [list \
> [list \
> "pr22269-1 (static pie undefined weak)" \ @@ -953,6 +957,7 @@
> run_ld_link_tests [list \
> "-fPIE -O2 $NOSANITIZE_CFLAGS" \
> ] \
> ]
> +set CFLAGS $old_CFLAGS
>
> set run_tests [list \
> [list "Run normal with libfoo.so" \ diff --git
a/ld/testsuite/ld-elf/tls.exp
> b/ld/testsuite/ld-elf/tls.exp index 1351a274cc..dfa3f50ecb 100644
> --- a/ld/testsuite/ld-elf/tls.exp
> +++ b/ld/testsuite/ld-elf/tls.exp
> @@ -39,6 +39,15 @@ if [istarget "sparc*-*-*"] {
> append AFLAGS_PIC " -K PIC -Av9"
> }
>
> +set old_CFLAGS $CFLAGS
> +set old_ASFLAGS $ASFLAGS
> +if [istarget "mips*-*"] {
> + # FIXME: gcc's bug, it always generate `rdhwr'
> + # even for target that has no such instrcution
> + append CFLAGS " -mfp32 -mips32r2 -mabi=32"
> + append ASFLAGS " -mips32r2"
> +}
> +
> run_ld_link_tests [list \
> [list \
> "Build pr22263-1" \
> @@ -51,3 +60,6 @@ run_ld_link_tests [list \
> "-fPIE -O2 $NOSANITIZE_CFLAGS" \
> ] \
> ]
> +
> +set CFLAGS $old_CFLAGS
> +set ASFLAGS $old_ASFLAGS
> diff --git a/ld/testsuite/ld-elfvers/vers.exp
b/ld/testsuite/ld-elfvers/vers.exp
> index 8a1383fe84..63127a46d2 100644
> --- a/ld/testsuite/ld-elfvers/vers.exp
> +++ b/ld/testsuite/ld-elfvers/vers.exp
> @@ -777,6 +777,11 @@ if { [istarget x86_64-*-linux*] \
> set pic "no"
> }
>
> +set old_CFLAGS $CFLAGS
> +if { [istarget "mips-*-*"] || [istarget "mipsel-*-*"] } {
> + append CFLAGS " -mfp32"
> +}
> +
> #
> # Basic test - build a library with versioned symbols.
> #
> @@ -1006,3 +1011,5 @@ build_vers_lib_pic "vers31" vers31.c vers31 ""
> vers31.map vers31.ver vers31.dsym # Test #32 -- linker --defsym
> build_vers_lib_pic "vers32a" vers32a.c vers32a "" vers32.map vers32a.ver
> vers32a.dsym ""
> build_vers_lib_pic_flags "vers32b" vers32b.c vers32b "vers32a.so"
> vers32.map vers32b.ver vers32b.dsym "" "--defsym foo=0"
> +
> +set CFLAGS $old_CFLAGS
> --
> 2.20.1
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH] MIPS: support specify isa level when configure
2021-03-08 4:30 ` [PATCH 2/3] MIPS: default output r6 object if configured to r6 YunQiang Su
@ 2023-02-23 11:11 ` YunQiang Su
2023-03-30 16:53 ` Richard Sandiford
2023-04-03 11:06 ` [PATCH v2] MIPS: the default output fellows triple and with-arch YunQiang Su
0 siblings, 2 replies; 33+ messages in thread
From: YunQiang Su @ 2023-02-23 11:11 UTC (permalink / raw)
To: binutils; +Cc: syq, macro, xry111, richard.sandiford, jiaxun.yang, YunQiang Su
PR 25494.
1. Add mipsisa[32,64][,rN] support.
the output of gas and ld will fellow this isa level.
> ld -r -b binary xx.dat -o xx.o
> as -march=from-abi xx.s
2. Support --with-arch=isa_level build option.
If this option is used, the default isa_level for gas and ld
will change.
---
bfd/Makefile.in | 1 +
bfd/config.bfd | 70 ++++++++++++++++++-
bfd/configure | 14 ++++
bfd/configure.ac | 11 +++
bfd/elfxx-mips.c | 61 +++++++++++++++-
.../binutils-all/mips/mips-note-2-n32.d | 1 +
gas/config/tc-mips.c | 70 +++++++++++++++++--
gas/configure | 20 +++++-
gas/configure.ac | 18 ++++-
gold/configure.tgt | 14 ++++
ld/configure.tgt | 12 +++-
11 files changed, 279 insertions(+), 13 deletions(-)
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index 82aa96f30e5..7b7b262d64e 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -332,6 +332,7 @@ CPPFLAGS = @CPPFLAGS@
CYGPATH_W = @CYGPATH_W@
DATADIRNAME = @DATADIRNAME@
DEBUGDIR = @DEBUGDIR@
+DEFAULT_ARCH = @DEFAULT_ARCH@
DEFS = @DEFS@
DEPDIR = @DEPDIR@
DSYMUTIL = @DSYMUTIL@
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 0b0f7d50602..cea93016105 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -227,6 +227,62 @@ z8k*) targ_archs=bfd_z8k_arch ;;
*) targ_archs=bfd_${targ_cpu}_arch ;;
esac
+# Build option --with-arch. Only MIPS supports it now.
+case "${targ}" in
+ mips*)
+ case "${DEFAULT_ARCH}" in
+ "")
+ case "${targ}" in
+ mipsisa64r6*)
+ DEFAULT_ARCH=mips64r6
+ ;;
+ mipsisa64r5*)
+ DEFAULT_ARCH=mips64r5
+ ;;
+ mipsisa64r3*)
+ DEFAULT_ARCH=mips64r3
+ ;;
+ mipsisa64r2*)
+ DEFAULT_ARCH=mips64r2
+ ;;
+ mipsisa64*)
+ DEFAULT_ARCH=mips64
+ ;;
+ mipsisa32r6*)
+ DEFAULT_ARCH=mips32r6
+ ;;
+ mipsisa32r5*)
+ DEFAULT_ARCH=mips32r5
+ ;;
+ mipsisa32r3*)
+ DEFAULT_ARCH=mips32r3
+ ;;
+ mipsisa32r2*)
+ DEFAULT_ARCH=mips32r2
+ ;;
+ mipsisa32*)
+ DEFAULT_ARCH=mips32
+ ;;
+ *)
+ ;;
+ esac
+ ;;
+ mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
+ mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
+ ;;
+ *)
+ echo "The arch name doesn't exits: ${DEFAULT_ARCH}" >&2
+ exit -1
+ ;;
+ esac
+ ;;
+ *)
+ if test x"${DEFAULT_ARCH}" != x""; then
+ echo "The value of option --with-arch is ignored for this arch: ${DEFAULT_ARCH}" >&2
+ fi
+ DEFAULT_ARCH=
+ ;;
+esac
# WHEN ADDING ENTRIES TO THIS MATRIX:
# Make sure that the left side always has two dashes. Otherwise you
@@ -941,11 +997,21 @@ case "${targ}" in
targ_defvec=mips_elf32_be_vec
targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
;;
- mips64*el-*-linux*)
+ mips*64*el-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_le_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
+ want64=true
+ ;;
+ mips*64*-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_be_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
+ want64=true
+ ;;
+ mips*64*el-*-linux*)
targ_defvec=mips_elf32_ntrad_le_vec
targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
;;
- mips64*-*-linux*)
+ mips*64*-*-linux*)
targ_defvec=mips_elf32_ntrad_be_vec
targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
;;
diff --git a/bfd/configure b/bfd/configure
index 41d280ef461..a92d2d2251d 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -695,6 +695,7 @@ WARN_CFLAGS
REPORT_BUGS_TEXI
REPORT_BUGS_TO
PKGVERSION
+DEFAULT_ARCH
DEBUGDIR
ENABLE_BFD_64_BIT_FALSE
ENABLE_BFD_64_BIT_TRUE
@@ -12033,6 +12034,15 @@ fi
+DEFAULT_ARCH=
+
+# Check whether --with-arch was given.
+if test "${with_arch+set}" = set; then :
+ withval=$with_arch; DEFAULT_ARCH="${withval}"
+fi
+
+
+
# Check whether --with-pkgversion was given.
@@ -13775,6 +13785,10 @@ do
fi
done
+if test -n "$DEFAULT_ARCH"; then
+ TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
+fi
+
# This processing still needs to be done if we're to decide properly whether
# 64-bit support needs to be compiled in. Currently, it will be included if
diff --git a/bfd/configure.ac b/bfd/configure.ac
index f044616f4d9..570a5e8bb7d 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -168,6 +168,13 @@ AC_ARG_WITH(separate-debug-dir,
[DEBUGDIR="${withval}"])
AC_SUBST(DEBUGDIR)
+DEFAULT_ARCH=
+AC_ARG_WITH(arch,
+ AS_HELP_STRING([--with-arch=ARCH],
+ [Set the default arch for bfd [[default=]]]),
+[DEFAULT_ARCH="${withval}"])
+AC_SUBST(DEFAULT_ARCH)
+
ACX_PKGVERSION([GNU Binutils])
ACX_BUGURL([https://sourceware.org/bugzilla/])
@@ -341,6 +348,10 @@ do
TDEFINES="$TDEFINES $targ_cflags"
fi
done
+
+if test -n "$DEFAULT_ARCH"; then
+ TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
+fi
AC_SUBST(TDEFINES)
# This processing still needs to be done if we're to decide properly whether
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index e9fb61ff9e7..338e7fdd0d6 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -47,6 +47,15 @@
#include "hashtab.h"
+/* A table describing all ISA and its 32bit and 64bit version for best matching */
+struct mips_eflags_32_64
+{
+ const char *name;
+ flagword e_mips_arch;
+ flagword e_mips_arch32;
+ flagword e_mips_arch64;
+};
+
/* Types of TLS GOT entry. */
enum mips_got_tls_type {
GOT_TLS_NONE,
@@ -1306,6 +1315,28 @@ bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr)
#define TP_OFFSET 0x7000
#define DTP_OFFSET 0x8000
+/* A table describing all ISA and its 32bit and 64bit version for best matching */
+__attribute__ ((unused))
+static const struct mips_eflags_32_64 mips_eflags_32_64_table[] =
+{
+ { "mips1", E_MIPS_ARCH_1, E_MIPS_ARCH_1, E_MIPS_ARCH_3},
+ { "mips2", E_MIPS_ARCH_2, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
+ { "mips3", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
+ { "mips4", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_4},
+ { "mips5", E_MIPS_ARCH_5, E_MIPS_ARCH_2, E_MIPS_ARCH_5},
+ { "mips32", E_MIPS_ARCH_32, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
+ { "mips32r2", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips32r3", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips32r5", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips32r6", E_MIPS_ARCH_32R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
+ { "mips64", E_MIPS_ARCH_64, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
+ { "mips64r2", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips64r3", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips64r5", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips64r6", E_MIPS_ARCH_64R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
+ { NULL, 0, 0, 0 }
+};
+
static bfd_vma
dtprel_base (struct bfd_link_info *info)
{
@@ -12283,6 +12314,30 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd,
}
+/* Get the E_MIPA_ARCH_?? value for the DEFAULT_ARCH
+ The value of bits can be 32/64 or 0 (guess from DEFAULT_ARCH)
+ */
+static flagword mips_get_default_arch_eflags(int bits)
+{
+#ifdef DEFAULT_ARCH
+ int i;
+
+ for (i = 0; mips_eflags_32_64_table[i].name; i++)
+ if (strcasecmp (mips_eflags_32_64_table[i].name, DEFAULT_ARCH) != 0)
+ continue;
+ else if (bits == 32)
+ return mips_eflags_32_64_table[i].e_mips_arch32;
+ else if (bits == 64)
+ return mips_eflags_32_64_table[i].e_mips_arch64;
+ else if (bits == 0)
+ return mips_eflags_32_64_table[i].e_mips_arch;
+#endif
+
+ if (bits == 64)
+ return E_MIPS_ARCH_3;
+ return E_MIPS_ARCH_1;
+}
+
/* Set ABFD's EF_MIPS_ARCH and EF_MIPS_MACH flags. */
static void
@@ -12294,9 +12349,11 @@ mips_set_isa_flags (bfd *abfd)
{
default:
if (ABI_N32_P (abfd) || ABI_64_P (abfd))
- val = E_MIPS_ARCH_3;
+ val = mips_get_default_arch_eflags(64);
+ else if (ABI_O32_P (abfd))
+ val = mips_get_default_arch_eflags(32);
else
- val = E_MIPS_ARCH_1;
+ val = mips_get_default_arch_eflags(0);
break;
case bfd_mach_mips3000:
diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
index c2a581858ed..5e24e7a115e 100644
--- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
+++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
@@ -1,4 +1,5 @@
#PROG: objcopy
+#as: -n32
#readelf: --notes --wide
#objcopy: --merge-notes
#name: MIPS merge notes section (n32)
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index e911aaa904a..c906471eb92 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1422,6 +1422,15 @@ static int relaxed_micromips_16bit_branch_length (fragS *, asection *, int);
static int relaxed_micromips_32bit_branch_length (fragS *, asection *, int);
static void file_mips_check_options (void);
+/* A table describing all ISA and its 32bit and 64bit version for best matching */
+
+struct mips_isa_32_64
+{
+ int isa;
+ int isa_32;
+ int isa_64;
+};
+
/* Table and functions used to map between CPU/ISA names, and
ISA levels, and CPU numbers. */
@@ -1439,6 +1448,7 @@ struct mips_cpu_info
static const struct mips_cpu_info *mips_parse_cpu (const char *, const char *);
static const struct mips_cpu_info *mips_cpu_info_from_isa (int);
static const struct mips_cpu_info *mips_cpu_info_from_arch (int);
+static int mips_cpu_isa_32_64(int isa, int bits);
\f
/* Command-line options. */
const char *md_shortopts = "O::g::G:";
@@ -19979,6 +19989,28 @@ s_mips_mask (int reg_type)
}
}
+
+/* A table describing all ISA and its 32bit and 64bit version for best matching */
+static const struct mips_isa_32_64 mips_isa_32_64_table[] =
+{
+ { ISA_MIPS1, ISA_MIPS1, ISA_MIPS3 },
+ { ISA_MIPS2, ISA_MIPS2, ISA_MIPS3 },
+ { ISA_MIPS3, ISA_MIPS2, ISA_MIPS3 },
+ { ISA_MIPS4, ISA_MIPS2, ISA_MIPS4 },
+ { ISA_MIPS5, ISA_MIPS2, ISA_MIPS5 },
+ { ISA_MIPS32, ISA_MIPS32, ISA_MIPS64 },
+ { ISA_MIPS32R2, ISA_MIPS32R2, ISA_MIPS64R2 },
+ { ISA_MIPS32R3, ISA_MIPS32R3, ISA_MIPS64R3 },
+ { ISA_MIPS32R5, ISA_MIPS32R5, ISA_MIPS64R5 },
+ { ISA_MIPS32R6, ISA_MIPS32R6, ISA_MIPS64R6 },
+ { ISA_MIPS64, ISA_MIPS32, ISA_MIPS64 },
+ { ISA_MIPS64R2, ISA_MIPS32R2, ISA_MIPS64R2 },
+ { ISA_MIPS64R3, ISA_MIPS32R3, ISA_MIPS64R3 },
+ { ISA_MIPS64R5, ISA_MIPS32R5, ISA_MIPS64R5 },
+ { ISA_MIPS64R6, ISA_MIPS32R6, ISA_MIPS64R6 },
+ { 0, 0, 0 }
+};
+
/* A table describing all the processors gas knows about. Names are
matched in the order listed.
@@ -20223,6 +20255,9 @@ static const struct mips_cpu_info *
mips_parse_cpu (const char *option, const char *cpu_string)
{
const struct mips_cpu_info *p;
+ const struct mips_cpu_info *default_cpu;
+ int default_isa32 = ISA_MIPS1;
+ int default_isa64 = ISA_MIPS3;
/* 'from-abi' selects the most compatible architecture for the given
ABI: MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs. For the
@@ -20236,19 +20271,26 @@ mips_parse_cpu (const char *option, const char *cpu_string)
'mips64', just as we did in the days before 'from-abi'. */
if (strcasecmp (cpu_string, "from-abi") == 0)
{
+ for (default_cpu = mips_cpu_info_table; default_cpu->name != 0; default_cpu++)
+ if (mips_matching_cpu_name_p (default_cpu->name, MIPS_CPU_STRING_DEFAULT))
+ {
+ default_isa32 = mips_cpu_isa_32_64 (default_cpu->isa, 32);
+ default_isa64 = mips_cpu_isa_32_64 (default_cpu->isa, 64);
+ break;
+ }
if (ABI_NEEDS_32BIT_REGS (mips_abi))
- return mips_cpu_info_from_isa (ISA_MIPS1);
+ return mips_cpu_info_from_isa (default_isa32);
if (ABI_NEEDS_64BIT_REGS (mips_abi))
- return mips_cpu_info_from_isa (ISA_MIPS3);
+ return mips_cpu_info_from_isa (default_isa64);
if (file_mips_opts.gp >= 0)
return mips_cpu_info_from_isa (file_mips_opts.gp == 32
- ? ISA_MIPS1 : ISA_MIPS3);
+ ? default_isa32 : default_isa64);
return mips_cpu_info_from_isa (MIPS_DEFAULT_64BIT
- ? ISA_MIPS3
- : ISA_MIPS1);
+ ? default_isa64
+ : default_isa32);
}
/* 'default' has traditionally been a no-op. Probably not very useful. */
@@ -20263,6 +20305,24 @@ mips_parse_cpu (const char *option, const char *cpu_string)
return 0;
}
+/* Return the best matching 32bit/64bit ISA of a ISA, according the table
+ mips_isa_32_64_table */
+static int
+mips_cpu_isa_32_64(int isa, int bits)
+{
+ int i;
+
+ for (i = 0; mips_isa_32_64_table[i].isa != 0; i++)
+ if (isa != mips_isa_32_64_table[i].isa)
+ continue;
+ else if (bits == 32)
+ return mips_isa_32_64_table[i].isa_32;
+ else if (bits == 64)
+ return mips_isa_32_64_table[i].isa_64;
+
+ return 0;
+}
+
/* Return the canonical processor information for ISA (a member of the
ISA_MIPS* enumeration). */
diff --git a/gas/configure b/gas/configure
index b56836998ef..11b0a56bbd4 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12201,6 +12201,21 @@ _ACEOF
as_fn_error $? "$target_cpu isn't a supported MIPS CPU name" "$LINENO" 5
;;
esac
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
+$as_echo_n "checking for default configuration of --with-arch... " >&6; }
+ if test "x${with_arch}" != x; then
+ case ${with_arch} in
+ mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
+ mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
+ mips_cpu=${with_arch}
+ ;;
+ *)
+ as_fn_error $? "This kind of arch name does *NOT* exist!" "$LINENO" 5
+ ;;
+ esac
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
+$as_echo "$with_arch" >&6; }
# See whether it's appropriate to set E_MIPS_ABI_O32 for o32
# binaries. It's a GNU extension that some OSes don't understand.
case ${target} in
@@ -12223,7 +12238,10 @@ _ACEOF
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gas/configure.ac b/gas/configure.ac
index 6a68fd7c4e6..a126a3fda5d 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -370,6 +370,19 @@ changequote([,])dnl
AC_MSG_ERROR($target_cpu isn't a supported MIPS CPU name)
;;
esac
+ AC_MSG_CHECKING(for default configuration of --with-arch)
+ if test "x${with_arch}" != x; then
+ case ${with_arch} in
+ mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
+ mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
+ mips_cpu=${with_arch}
+ ;;
+ *)
+ AC_MSG_ERROR(This kind of arch name does *NOT* exist!)
+ ;;
+ esac
+ fi
+ AC_MSG_RESULT($with_arch)
# See whether it's appropriate to set E_MIPS_ABI_O32 for o32
# binaries. It's a GNU extension that some OSes don't understand.
case ${target} in
@@ -392,7 +405,10 @@ changequote([,])dnl
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gold/configure.tgt b/gold/configure.tgt
index 4b54e08d27f..ef47ce079f1 100644
--- a/gold/configure.tgt
+++ b/gold/configure.tgt
@@ -153,6 +153,13 @@ aarch64*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*el*-*-*|mips*64*le*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS_RS3_LE
+ targ_size=64
+ targ_big_endian=false
+ targ_extra_big_endian=true
+ ;;
mips*el*-*-*|mips*le*-*-*)
targ_obj=mips
targ_machine=EM_MIPS_RS3_LE
@@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS
+ targ_size=64
+ targ_big_endian=true
+ targ_extra_big_endian=false
+ ;;
mips*-*-*)
targ_obj=mips
targ_machine=EM_MIPS
diff --git a/ld/configure.tgt b/ld/configure.tgt
index efd43095844..5ccaca37f16 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -577,11 +577,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
;;
mips*-*-windiss) targ_emul=elf32mipswindiss
;;
-mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
+mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
targ_extra_libpath=$targ_extra_emuls
;;
-mips64*-*-linux-*) targ_emul=elf32btsmipn32
+mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*-*-linux-*) targ_emul=elf32btsmipn32
targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
targ_extra_libpath=$targ_extra_emuls
;;
--
2.30.2
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH] MIPS: support specify isa level when configure
2023-02-23 11:11 ` [PATCH] MIPS: support specify isa level when configure YunQiang Su
@ 2023-03-30 16:53 ` Richard Sandiford
2023-04-03 11:06 ` [PATCH v2] MIPS: the default output fellows triple and with-arch YunQiang Su
1 sibling, 0 replies; 33+ messages in thread
From: Richard Sandiford @ 2023-03-30 16:53 UTC (permalink / raw)
To: YunQiang Su; +Cc: binutils, syq, macro, xry111, jiaxun.yang
Sorry for the slow reply, been away several weeks recently.
YunQiang Su <yunqiang.su@cipunited.com> writes:
> PR 25494.
>
> 1. Add mipsisa[32,64][,rN] support.
> the output of gas and ld will fellow this isa level.
> > ld -r -b binary xx.dat -o xx.o
> > as -march=from-abi xx.s
> 2. Support --with-arch=isa_level build option.
> If this option is used, the default isa_level for gas and ld
> will change.
I'm no longer a stakeholder, so I shouldn't have a say, but: I disagree
with Maciej's comment in the PR. Since r6 is incompatible (both ways)
with r2 and earlier, the choice between "r2 and earlier" and r6 is an
ABI one and deserves to be reflected in the target triplet. In what
I understood to be good practice (back when I was involved with MIPS):
- --with-abi=X selects the default ABI, but X should be an ABI that is
normally built for the target triple.
- --with-arch=X selects the default architecture, but X should be extension
of the architecture normally selected by the target triplet (for the
default ABI, as modified by --with-abi).
Redundantly specifying the default choice is OK too of course (and a no-op).
So I think keying off the mipsisa32/64r6 in the target triple would
be best, and that would work with good uses of --with-arch.
E.g. with --with-arch=mips2, there is no reason why ld should produce
mips2 binaries by default even when no code has been linked in.
I think the current default makes sense for --with-arch=mips2.
It might still be useful to support --with-arch for MIPS. If we do,
it could be localised to GAS, like it is for nds32 and riscv.
To me, the fact that we need bfd/ changes for --with-arch is an
indication that --with-arch is doing too much work.
Thanks,
Richard
> ---
> bfd/Makefile.in | 1 +
> bfd/config.bfd | 70 ++++++++++++++++++-
> bfd/configure | 14 ++++
> bfd/configure.ac | 11 +++
> bfd/elfxx-mips.c | 61 +++++++++++++++-
> .../binutils-all/mips/mips-note-2-n32.d | 1 +
> gas/config/tc-mips.c | 70 +++++++++++++++++--
> gas/configure | 20 +++++-
> gas/configure.ac | 18 ++++-
> gold/configure.tgt | 14 ++++
> ld/configure.tgt | 12 +++-
> 11 files changed, 279 insertions(+), 13 deletions(-)
>
> diff --git a/bfd/Makefile.in b/bfd/Makefile.in
> index 82aa96f30e5..7b7b262d64e 100644
> --- a/bfd/Makefile.in
> +++ b/bfd/Makefile.in
> @@ -332,6 +332,7 @@ CPPFLAGS = @CPPFLAGS@
> CYGPATH_W = @CYGPATH_W@
> DATADIRNAME = @DATADIRNAME@
> DEBUGDIR = @DEBUGDIR@
> +DEFAULT_ARCH = @DEFAULT_ARCH@
> DEFS = @DEFS@
> DEPDIR = @DEPDIR@
> DSYMUTIL = @DSYMUTIL@
> diff --git a/bfd/config.bfd b/bfd/config.bfd
> index 0b0f7d50602..cea93016105 100644
> --- a/bfd/config.bfd
> +++ b/bfd/config.bfd
> @@ -227,6 +227,62 @@ z8k*) targ_archs=bfd_z8k_arch ;;
> *) targ_archs=bfd_${targ_cpu}_arch ;;
> esac
>
> +# Build option --with-arch. Only MIPS supports it now.
> +case "${targ}" in
> + mips*)
> + case "${DEFAULT_ARCH}" in
> + "")
> + case "${targ}" in
> + mipsisa64r6*)
> + DEFAULT_ARCH=mips64r6
> + ;;
> + mipsisa64r5*)
> + DEFAULT_ARCH=mips64r5
> + ;;
> + mipsisa64r3*)
> + DEFAULT_ARCH=mips64r3
> + ;;
> + mipsisa64r2*)
> + DEFAULT_ARCH=mips64r2
> + ;;
> + mipsisa64*)
> + DEFAULT_ARCH=mips64
> + ;;
> + mipsisa32r6*)
> + DEFAULT_ARCH=mips32r6
> + ;;
> + mipsisa32r5*)
> + DEFAULT_ARCH=mips32r5
> + ;;
> + mipsisa32r3*)
> + DEFAULT_ARCH=mips32r3
> + ;;
> + mipsisa32r2*)
> + DEFAULT_ARCH=mips32r2
> + ;;
> + mipsisa32*)
> + DEFAULT_ARCH=mips32
> + ;;
> + *)
> + ;;
> + esac
> + ;;
> + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
> + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
> + ;;
> + *)
> + echo "The arch name doesn't exits: ${DEFAULT_ARCH}" >&2
> + exit -1
> + ;;
> + esac
> + ;;
> + *)
> + if test x"${DEFAULT_ARCH}" != x""; then
> + echo "The value of option --with-arch is ignored for this arch: ${DEFAULT_ARCH}" >&2
> + fi
> + DEFAULT_ARCH=
> + ;;
> +esac
>
> # WHEN ADDING ENTRIES TO THIS MATRIX:
> # Make sure that the left side always has two dashes. Otherwise you
> @@ -941,11 +997,21 @@ case "${targ}" in
> targ_defvec=mips_elf32_be_vec
> targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
> ;;
> - mips64*el-*-linux*)
> + mips*64*el-*-linux*-gnuabi64)
> + targ_defvec=mips_elf64_trad_le_vec
> + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
> + want64=true
> + ;;
> + mips*64*-*-linux*-gnuabi64)
> + targ_defvec=mips_elf64_trad_be_vec
> + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
> + want64=true
> + ;;
> + mips*64*el-*-linux*)
> targ_defvec=mips_elf32_ntrad_le_vec
> targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
> ;;
> - mips64*-*-linux*)
> + mips*64*-*-linux*)
> targ_defvec=mips_elf32_ntrad_be_vec
> targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
> ;;
> diff --git a/bfd/configure b/bfd/configure
> index 41d280ef461..a92d2d2251d 100755
> --- a/bfd/configure
> +++ b/bfd/configure
> @@ -695,6 +695,7 @@ WARN_CFLAGS
> REPORT_BUGS_TEXI
> REPORT_BUGS_TO
> PKGVERSION
> +DEFAULT_ARCH
> DEBUGDIR
> ENABLE_BFD_64_BIT_FALSE
> ENABLE_BFD_64_BIT_TRUE
> @@ -12033,6 +12034,15 @@ fi
>
>
>
> +DEFAULT_ARCH=
> +
> +# Check whether --with-arch was given.
> +if test "${with_arch+set}" = set; then :
> + withval=$with_arch; DEFAULT_ARCH="${withval}"
> +fi
> +
> +
> +
>
>
> # Check whether --with-pkgversion was given.
> @@ -13775,6 +13785,10 @@ do
> fi
> done
>
> +if test -n "$DEFAULT_ARCH"; then
> + TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
> +fi
> +
>
> # This processing still needs to be done if we're to decide properly whether
> # 64-bit support needs to be compiled in. Currently, it will be included if
> diff --git a/bfd/configure.ac b/bfd/configure.ac
> index f044616f4d9..570a5e8bb7d 100644
> --- a/bfd/configure.ac
> +++ b/bfd/configure.ac
> @@ -168,6 +168,13 @@ AC_ARG_WITH(separate-debug-dir,
> [DEBUGDIR="${withval}"])
> AC_SUBST(DEBUGDIR)
>
> +DEFAULT_ARCH=
> +AC_ARG_WITH(arch,
> + AS_HELP_STRING([--with-arch=ARCH],
> + [Set the default arch for bfd [[default=]]]),
> +[DEFAULT_ARCH="${withval}"])
> +AC_SUBST(DEFAULT_ARCH)
> +
> ACX_PKGVERSION([GNU Binutils])
> ACX_BUGURL([https://sourceware.org/bugzilla/])
>
> @@ -341,6 +348,10 @@ do
> TDEFINES="$TDEFINES $targ_cflags"
> fi
> done
> +
> +if test -n "$DEFAULT_ARCH"; then
> + TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
> +fi
> AC_SUBST(TDEFINES)
>
> # This processing still needs to be done if we're to decide properly whether
> diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
> index e9fb61ff9e7..338e7fdd0d6 100644
> --- a/bfd/elfxx-mips.c
> +++ b/bfd/elfxx-mips.c
> @@ -47,6 +47,15 @@
>
> #include "hashtab.h"
>
> +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> +struct mips_eflags_32_64
> +{
> + const char *name;
> + flagword e_mips_arch;
> + flagword e_mips_arch32;
> + flagword e_mips_arch64;
> +};
> +
> /* Types of TLS GOT entry. */
> enum mips_got_tls_type {
> GOT_TLS_NONE,
> @@ -1306,6 +1315,28 @@ bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr)
> #define TP_OFFSET 0x7000
> #define DTP_OFFSET 0x8000
>
> +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> +__attribute__ ((unused))
> +static const struct mips_eflags_32_64 mips_eflags_32_64_table[] =
> +{
> + { "mips1", E_MIPS_ARCH_1, E_MIPS_ARCH_1, E_MIPS_ARCH_3},
> + { "mips2", E_MIPS_ARCH_2, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
> + { "mips3", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
> + { "mips4", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_4},
> + { "mips5", E_MIPS_ARCH_5, E_MIPS_ARCH_2, E_MIPS_ARCH_5},
> + { "mips32", E_MIPS_ARCH_32, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
> + { "mips32r2", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips32r3", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips32r5", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips32r6", E_MIPS_ARCH_32R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
> + { "mips64", E_MIPS_ARCH_64, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
> + { "mips64r2", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips64r3", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips64r5", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips64r6", E_MIPS_ARCH_64R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
> + { NULL, 0, 0, 0 }
> +};
> +
> static bfd_vma
> dtprel_base (struct bfd_link_info *info)
> {
> @@ -12283,6 +12314,30 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd,
> }
>
>
> +/* Get the E_MIPA_ARCH_?? value for the DEFAULT_ARCH
> + The value of bits can be 32/64 or 0 (guess from DEFAULT_ARCH)
> + */
> +static flagword mips_get_default_arch_eflags(int bits)
> +{
> +#ifdef DEFAULT_ARCH
> + int i;
> +
> + for (i = 0; mips_eflags_32_64_table[i].name; i++)
> + if (strcasecmp (mips_eflags_32_64_table[i].name, DEFAULT_ARCH) != 0)
> + continue;
> + else if (bits == 32)
> + return mips_eflags_32_64_table[i].e_mips_arch32;
> + else if (bits == 64)
> + return mips_eflags_32_64_table[i].e_mips_arch64;
> + else if (bits == 0)
> + return mips_eflags_32_64_table[i].e_mips_arch;
> +#endif
> +
> + if (bits == 64)
> + return E_MIPS_ARCH_3;
> + return E_MIPS_ARCH_1;
> +}
> +
> /* Set ABFD's EF_MIPS_ARCH and EF_MIPS_MACH flags. */
>
> static void
> @@ -12294,9 +12349,11 @@ mips_set_isa_flags (bfd *abfd)
> {
> default:
> if (ABI_N32_P (abfd) || ABI_64_P (abfd))
> - val = E_MIPS_ARCH_3;
> + val = mips_get_default_arch_eflags(64);
> + else if (ABI_O32_P (abfd))
> + val = mips_get_default_arch_eflags(32);
> else
> - val = E_MIPS_ARCH_1;
> + val = mips_get_default_arch_eflags(0);
> break;
>
> case bfd_mach_mips3000:
> diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> index c2a581858ed..5e24e7a115e 100644
> --- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> +++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> @@ -1,4 +1,5 @@
> #PROG: objcopy
> +#as: -n32
> #readelf: --notes --wide
> #objcopy: --merge-notes
> #name: MIPS merge notes section (n32)
> diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
> index e911aaa904a..c906471eb92 100644
> --- a/gas/config/tc-mips.c
> +++ b/gas/config/tc-mips.c
> @@ -1422,6 +1422,15 @@ static int relaxed_micromips_16bit_branch_length (fragS *, asection *, int);
> static int relaxed_micromips_32bit_branch_length (fragS *, asection *, int);
> static void file_mips_check_options (void);
>
> +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> +
> +struct mips_isa_32_64
> +{
> + int isa;
> + int isa_32;
> + int isa_64;
> +};
> +
> /* Table and functions used to map between CPU/ISA names, and
> ISA levels, and CPU numbers. */
>
> @@ -1439,6 +1448,7 @@ struct mips_cpu_info
> static const struct mips_cpu_info *mips_parse_cpu (const char *, const char *);
> static const struct mips_cpu_info *mips_cpu_info_from_isa (int);
> static const struct mips_cpu_info *mips_cpu_info_from_arch (int);
> +static int mips_cpu_isa_32_64(int isa, int bits);
> \f
> /* Command-line options. */
> const char *md_shortopts = "O::g::G:";
> @@ -19979,6 +19989,28 @@ s_mips_mask (int reg_type)
> }
> }
>
> +
> +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> +static const struct mips_isa_32_64 mips_isa_32_64_table[] =
> +{
> + { ISA_MIPS1, ISA_MIPS1, ISA_MIPS3 },
> + { ISA_MIPS2, ISA_MIPS2, ISA_MIPS3 },
> + { ISA_MIPS3, ISA_MIPS2, ISA_MIPS3 },
> + { ISA_MIPS4, ISA_MIPS2, ISA_MIPS4 },
> + { ISA_MIPS5, ISA_MIPS2, ISA_MIPS5 },
> + { ISA_MIPS32, ISA_MIPS32, ISA_MIPS64 },
> + { ISA_MIPS32R2, ISA_MIPS32R2, ISA_MIPS64R2 },
> + { ISA_MIPS32R3, ISA_MIPS32R3, ISA_MIPS64R3 },
> + { ISA_MIPS32R5, ISA_MIPS32R5, ISA_MIPS64R5 },
> + { ISA_MIPS32R6, ISA_MIPS32R6, ISA_MIPS64R6 },
> + { ISA_MIPS64, ISA_MIPS32, ISA_MIPS64 },
> + { ISA_MIPS64R2, ISA_MIPS32R2, ISA_MIPS64R2 },
> + { ISA_MIPS64R3, ISA_MIPS32R3, ISA_MIPS64R3 },
> + { ISA_MIPS64R5, ISA_MIPS32R5, ISA_MIPS64R5 },
> + { ISA_MIPS64R6, ISA_MIPS32R6, ISA_MIPS64R6 },
> + { 0, 0, 0 }
> +};
> +
> /* A table describing all the processors gas knows about. Names are
> matched in the order listed.
>
> @@ -20223,6 +20255,9 @@ static const struct mips_cpu_info *
> mips_parse_cpu (const char *option, const char *cpu_string)
> {
> const struct mips_cpu_info *p;
> + const struct mips_cpu_info *default_cpu;
> + int default_isa32 = ISA_MIPS1;
> + int default_isa64 = ISA_MIPS3;
>
> /* 'from-abi' selects the most compatible architecture for the given
> ABI: MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs. For the
> @@ -20236,19 +20271,26 @@ mips_parse_cpu (const char *option, const char *cpu_string)
> 'mips64', just as we did in the days before 'from-abi'. */
> if (strcasecmp (cpu_string, "from-abi") == 0)
> {
> + for (default_cpu = mips_cpu_info_table; default_cpu->name != 0; default_cpu++)
> + if (mips_matching_cpu_name_p (default_cpu->name, MIPS_CPU_STRING_DEFAULT))
> + {
> + default_isa32 = mips_cpu_isa_32_64 (default_cpu->isa, 32);
> + default_isa64 = mips_cpu_isa_32_64 (default_cpu->isa, 64);
> + break;
> + }
> if (ABI_NEEDS_32BIT_REGS (mips_abi))
> - return mips_cpu_info_from_isa (ISA_MIPS1);
> + return mips_cpu_info_from_isa (default_isa32);
>
> if (ABI_NEEDS_64BIT_REGS (mips_abi))
> - return mips_cpu_info_from_isa (ISA_MIPS3);
> + return mips_cpu_info_from_isa (default_isa64);
>
> if (file_mips_opts.gp >= 0)
> return mips_cpu_info_from_isa (file_mips_opts.gp == 32
> - ? ISA_MIPS1 : ISA_MIPS3);
> + ? default_isa32 : default_isa64);
>
> return mips_cpu_info_from_isa (MIPS_DEFAULT_64BIT
> - ? ISA_MIPS3
> - : ISA_MIPS1);
> + ? default_isa64
> + : default_isa32);
> }
>
> /* 'default' has traditionally been a no-op. Probably not very useful. */
> @@ -20263,6 +20305,24 @@ mips_parse_cpu (const char *option, const char *cpu_string)
> return 0;
> }
>
> +/* Return the best matching 32bit/64bit ISA of a ISA, according the table
> + mips_isa_32_64_table */
> +static int
> +mips_cpu_isa_32_64(int isa, int bits)
> +{
> + int i;
> +
> + for (i = 0; mips_isa_32_64_table[i].isa != 0; i++)
> + if (isa != mips_isa_32_64_table[i].isa)
> + continue;
> + else if (bits == 32)
> + return mips_isa_32_64_table[i].isa_32;
> + else if (bits == 64)
> + return mips_isa_32_64_table[i].isa_64;
> +
> + return 0;
> +}
> +
> /* Return the canonical processor information for ISA (a member of the
> ISA_MIPS* enumeration). */
>
> diff --git a/gas/configure b/gas/configure
> index b56836998ef..11b0a56bbd4 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -12201,6 +12201,21 @@ _ACEOF
> as_fn_error $? "$target_cpu isn't a supported MIPS CPU name" "$LINENO" 5
> ;;
> esac
> + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
> +$as_echo_n "checking for default configuration of --with-arch... " >&6; }
> + if test "x${with_arch}" != x; then
> + case ${with_arch} in
> + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
> + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
> + mips_cpu=${with_arch}
> + ;;
> + *)
> + as_fn_error $? "This kind of arch name does *NOT* exist!" "$LINENO" 5
> + ;;
> + esac
> + fi
> + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
> +$as_echo "$with_arch" >&6; }
> # See whether it's appropriate to set E_MIPS_ABI_O32 for o32
> # binaries. It's a GNU extension that some OSes don't understand.
> case ${target} in
> @@ -12223,7 +12238,10 @@ _ACEOF
> esac
> # Decide which ABI to target by default.
> case ${target} in
> - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> + mips*64*-linux-gnuabi64)
> + mips_default_abi=N64_ABI
> + ;;
> + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> mips_default_abi=N32_ABI
> ;;
> diff --git a/gas/configure.ac b/gas/configure.ac
> index 6a68fd7c4e6..a126a3fda5d 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -370,6 +370,19 @@ changequote([,])dnl
> AC_MSG_ERROR($target_cpu isn't a supported MIPS CPU name)
> ;;
> esac
> + AC_MSG_CHECKING(for default configuration of --with-arch)
> + if test "x${with_arch}" != x; then
> + case ${with_arch} in
> + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
> + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
> + mips_cpu=${with_arch}
> + ;;
> + *)
> + AC_MSG_ERROR(This kind of arch name does *NOT* exist!)
> + ;;
> + esac
> + fi
> + AC_MSG_RESULT($with_arch)
> # See whether it's appropriate to set E_MIPS_ABI_O32 for o32
> # binaries. It's a GNU extension that some OSes don't understand.
> case ${target} in
> @@ -392,7 +405,10 @@ changequote([,])dnl
> esac
> # Decide which ABI to target by default.
> case ${target} in
> - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> + mips*64*-linux-gnuabi64)
> + mips_default_abi=N64_ABI
> + ;;
> + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> mips_default_abi=N32_ABI
> ;;
> diff --git a/gold/configure.tgt b/gold/configure.tgt
> index 4b54e08d27f..ef47ce079f1 100644
> --- a/gold/configure.tgt
> +++ b/gold/configure.tgt
> @@ -153,6 +153,13 @@ aarch64*-*)
> targ_big_endian=false
> targ_extra_big_endian=true
> ;;
> +mips*64*el*-*-*|mips*64*le*-*-*)
> + targ_obj=mips
> + targ_machine=EM_MIPS_RS3_LE
> + targ_size=64
> + targ_big_endian=false
> + targ_extra_big_endian=true
> + ;;
> mips*el*-*-*|mips*le*-*-*)
> targ_obj=mips
> targ_machine=EM_MIPS_RS3_LE
> @@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
> targ_big_endian=false
> targ_extra_big_endian=true
> ;;
> +mips*64*-*-*)
> + targ_obj=mips
> + targ_machine=EM_MIPS
> + targ_size=64
> + targ_big_endian=true
> + targ_extra_big_endian=false
> + ;;
> mips*-*-*)
> targ_obj=mips
> targ_machine=EM_MIPS
> diff --git a/ld/configure.tgt b/ld/configure.tgt
> index efd43095844..5ccaca37f16 100644
> --- a/ld/configure.tgt
> +++ b/ld/configure.tgt
> @@ -577,11 +577,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
> ;;
> mips*-*-windiss) targ_emul=elf32mipswindiss
> ;;
> -mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
> +mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
> + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
> + targ_extra_libpath=$targ_extra_emuls
> + ;;
> +mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
> targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
> targ_extra_libpath=$targ_extra_emuls
> ;;
> -mips64*-*-linux-*) targ_emul=elf32btsmipn32
> +mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
> + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
> + targ_extra_libpath=$targ_extra_emuls
> + ;;
> +mips*64*-*-linux-*) targ_emul=elf32btsmipn32
> targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
> targ_extra_libpath=$targ_extra_emuls
> ;;
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH v2] MIPS: the default output fellows triple and with-arch
2023-02-23 11:11 ` [PATCH] MIPS: support specify isa level when configure YunQiang Su
2023-03-30 16:53 ` Richard Sandiford
@ 2023-04-03 11:06 ` YunQiang Su
2023-04-03 12:40 ` Richard Sandiford
2023-04-14 7:20 ` [PATCH v3] MIPS: the default output fellows triple YunQiang Su
1 sibling, 2 replies; 33+ messages in thread
From: YunQiang Su @ 2023-04-03 11:06 UTC (permalink / raw)
To: binutils
Cc: syq, macro, xry111, richard.sandiford, jiaxun.yang, amodra, YunQiang Su
PR 25494.
1. as fellows the isa level in triple of target
and the --with-arch buildtime option:
> as -march=from-abi xx.s
> as xx.s
2. ld fellows the isa level in triple of target
> ld -r -b binary xx.dat -o xx.o
---
bfd/Makefile.in | 1 +
bfd/config.bfd | 48 ++++++++++++-
bfd/configure | 5 ++
bfd/configure.ac | 4 ++
bfd/elfxx-mips.c | 61 +++++++++++++++-
.../binutils-all/mips/mips-note-2-n32.d | 1 +
gas/config/tc-mips.c | 70 +++++++++++++++++--
gas/configure | 20 +++++-
gas/configure.ac | 18 ++++-
gold/configure.tgt | 14 ++++
ld/configure.tgt | 12 +++-
11 files changed, 241 insertions(+), 13 deletions(-)
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index 82aa96f30e5..7b7b262d64e 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -332,6 +332,7 @@ CPPFLAGS = @CPPFLAGS@
CYGPATH_W = @CYGPATH_W@
DATADIRNAME = @DATADIRNAME@
DEBUGDIR = @DEBUGDIR@
+DEFAULT_ARCH = @DEFAULT_ARCH@
DEFS = @DEFS@
DEPDIR = @DEPDIR@
DSYMUTIL = @DSYMUTIL@
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 7af481048db..f5f3b08e50b 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -227,6 +227,40 @@ z8k*) targ_archs=bfd_z8k_arch ;;
*) targ_archs=bfd_${targ_cpu}_arch ;;
esac
+case "${targ}" in
+ mipsisa64r6*)
+ DEFAULT_ARCH=mips64r6
+ ;;
+ mipsisa64r5*)
+ DEFAULT_ARCH=mips64r5
+ ;;
+ mipsisa64r3*)
+ DEFAULT_ARCH=mips64r3
+ ;;
+ mipsisa64r2*)
+ DEFAULT_ARCH=mips64r2
+ ;;
+ mipsisa64*)
+ DEFAULT_ARCH=mips64
+ ;;
+ mipsisa32r6*)
+ DEFAULT_ARCH=mips32r6
+ ;;
+ mipsisa32r5*)
+ DEFAULT_ARCH=mips32r5
+ ;;
+ mipsisa32r3*)
+ DEFAULT_ARCH=mips32r3
+ ;;
+ mipsisa32r2*)
+ DEFAULT_ARCH=mips32r2
+ ;;
+ mipsisa32*)
+ DEFAULT_ARCH=mips32
+ ;;
+ *)
+ ;;
+esac
# WHEN ADDING ENTRIES TO THIS MATRIX:
# Make sure that the left side always has two dashes. Otherwise you
@@ -941,11 +975,21 @@ case "${targ}" in
targ_defvec=mips_elf32_be_vec
targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
;;
- mips64*el-*-linux*)
+ mips*64*el-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_le_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
+ want64=true
+ ;;
+ mips*64*-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_be_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
+ want64=true
+ ;;
+ mips*64*el-*-linux*)
targ_defvec=mips_elf32_ntrad_le_vec
targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
;;
- mips64*-*-linux*)
+ mips*64*-*-linux*)
targ_defvec=mips_elf32_ntrad_be_vec
targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
;;
diff --git a/bfd/configure b/bfd/configure
index 41d280ef461..3fc9aa6fdc2 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -695,6 +695,7 @@ WARN_CFLAGS
REPORT_BUGS_TEXI
REPORT_BUGS_TO
PKGVERSION
+DEFAULT_ARCH
DEBUGDIR
ENABLE_BFD_64_BIT_FALSE
ENABLE_BFD_64_BIT_TRUE
@@ -13775,6 +13776,10 @@ do
fi
done
+if test -n "$DEFAULT_ARCH"; then
+ TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
+fi
+
# This processing still needs to be done if we're to decide properly whether
# 64-bit support needs to be compiled in. Currently, it will be included if
diff --git a/bfd/configure.ac b/bfd/configure.ac
index f044616f4d9..b432d7cf10f 100644
--- a/bfd/configure.ac
+++ b/bfd/configure.ac
@@ -341,6 +341,10 @@ do
TDEFINES="$TDEFINES $targ_cflags"
fi
done
+
+if test -n "$DEFAULT_ARCH"; then
+ TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
+fi
AC_SUBST(TDEFINES)
# This processing still needs to be done if we're to decide properly whether
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index d34a755807b..61f00981bfc 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -47,6 +47,15 @@
#include "hashtab.h"
+/* A table describing all ISA and its 32bit and 64bit version for best matching */
+struct mips_eflags_32_64
+{
+ const char *name;
+ flagword e_mips_arch;
+ flagword e_mips_arch32;
+ flagword e_mips_arch64;
+};
+
/* Types of TLS GOT entry. */
enum mips_got_tls_type {
GOT_TLS_NONE,
@@ -1306,6 +1315,28 @@ bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr)
#define TP_OFFSET 0x7000
#define DTP_OFFSET 0x8000
+/* A table describing all ISA and its 32bit and 64bit version for best matching */
+__attribute__ ((unused))
+static const struct mips_eflags_32_64 mips_eflags_32_64_table[] =
+{
+ { "mips1", E_MIPS_ARCH_1, E_MIPS_ARCH_1, E_MIPS_ARCH_3},
+ { "mips2", E_MIPS_ARCH_2, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
+ { "mips3", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
+ { "mips4", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_4},
+ { "mips5", E_MIPS_ARCH_5, E_MIPS_ARCH_2, E_MIPS_ARCH_5},
+ { "mips32", E_MIPS_ARCH_32, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
+ { "mips32r2", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips32r3", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips32r5", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips32r6", E_MIPS_ARCH_32R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
+ { "mips64", E_MIPS_ARCH_64, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
+ { "mips64r2", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips64r3", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips64r5", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
+ { "mips64r6", E_MIPS_ARCH_64R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
+ { NULL, 0, 0, 0 }
+};
+
static bfd_vma
dtprel_base (struct bfd_link_info *info)
{
@@ -12316,6 +12347,30 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd,
}
+/* Get the E_MIPA_ARCH_?? value for the DEFAULT_ARCH
+ The value of bits can be 32/64 or 0 (guess from DEFAULT_ARCH)
+ */
+static flagword mips_get_default_arch_eflags(int bits)
+{
+#ifdef DEFAULT_ARCH
+ int i;
+
+ for (i = 0; mips_eflags_32_64_table[i].name; i++)
+ if (strcasecmp (mips_eflags_32_64_table[i].name, DEFAULT_ARCH) != 0)
+ continue;
+ else if (bits == 32)
+ return mips_eflags_32_64_table[i].e_mips_arch32;
+ else if (bits == 64)
+ return mips_eflags_32_64_table[i].e_mips_arch64;
+ else if (bits == 0)
+ return mips_eflags_32_64_table[i].e_mips_arch;
+#endif
+
+ if (bits == 64)
+ return E_MIPS_ARCH_3;
+ return E_MIPS_ARCH_1;
+}
+
/* Set ABFD's EF_MIPS_ARCH and EF_MIPS_MACH flags. */
static void
@@ -12327,9 +12382,11 @@ mips_set_isa_flags (bfd *abfd)
{
default:
if (ABI_N32_P (abfd) || ABI_64_P (abfd))
- val = E_MIPS_ARCH_3;
+ val = mips_get_default_arch_eflags(64);
+ else if (ABI_O32_P (abfd))
+ val = mips_get_default_arch_eflags(32);
else
- val = E_MIPS_ARCH_1;
+ val = mips_get_default_arch_eflags(0);
break;
case bfd_mach_mips3000:
diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
index c2a581858ed..5e24e7a115e 100644
--- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
+++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
@@ -1,4 +1,5 @@
#PROG: objcopy
+#as: -n32
#readelf: --notes --wide
#objcopy: --merge-notes
#name: MIPS merge notes section (n32)
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index e911aaa904a..c906471eb92 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1422,6 +1422,15 @@ static int relaxed_micromips_16bit_branch_length (fragS *, asection *, int);
static int relaxed_micromips_32bit_branch_length (fragS *, asection *, int);
static void file_mips_check_options (void);
+/* A table describing all ISA and its 32bit and 64bit version for best matching */
+
+struct mips_isa_32_64
+{
+ int isa;
+ int isa_32;
+ int isa_64;
+};
+
/* Table and functions used to map between CPU/ISA names, and
ISA levels, and CPU numbers. */
@@ -1439,6 +1448,7 @@ struct mips_cpu_info
static const struct mips_cpu_info *mips_parse_cpu (const char *, const char *);
static const struct mips_cpu_info *mips_cpu_info_from_isa (int);
static const struct mips_cpu_info *mips_cpu_info_from_arch (int);
+static int mips_cpu_isa_32_64(int isa, int bits);
\f
/* Command-line options. */
const char *md_shortopts = "O::g::G:";
@@ -19979,6 +19989,28 @@ s_mips_mask (int reg_type)
}
}
+
+/* A table describing all ISA and its 32bit and 64bit version for best matching */
+static const struct mips_isa_32_64 mips_isa_32_64_table[] =
+{
+ { ISA_MIPS1, ISA_MIPS1, ISA_MIPS3 },
+ { ISA_MIPS2, ISA_MIPS2, ISA_MIPS3 },
+ { ISA_MIPS3, ISA_MIPS2, ISA_MIPS3 },
+ { ISA_MIPS4, ISA_MIPS2, ISA_MIPS4 },
+ { ISA_MIPS5, ISA_MIPS2, ISA_MIPS5 },
+ { ISA_MIPS32, ISA_MIPS32, ISA_MIPS64 },
+ { ISA_MIPS32R2, ISA_MIPS32R2, ISA_MIPS64R2 },
+ { ISA_MIPS32R3, ISA_MIPS32R3, ISA_MIPS64R3 },
+ { ISA_MIPS32R5, ISA_MIPS32R5, ISA_MIPS64R5 },
+ { ISA_MIPS32R6, ISA_MIPS32R6, ISA_MIPS64R6 },
+ { ISA_MIPS64, ISA_MIPS32, ISA_MIPS64 },
+ { ISA_MIPS64R2, ISA_MIPS32R2, ISA_MIPS64R2 },
+ { ISA_MIPS64R3, ISA_MIPS32R3, ISA_MIPS64R3 },
+ { ISA_MIPS64R5, ISA_MIPS32R5, ISA_MIPS64R5 },
+ { ISA_MIPS64R6, ISA_MIPS32R6, ISA_MIPS64R6 },
+ { 0, 0, 0 }
+};
+
/* A table describing all the processors gas knows about. Names are
matched in the order listed.
@@ -20223,6 +20255,9 @@ static const struct mips_cpu_info *
mips_parse_cpu (const char *option, const char *cpu_string)
{
const struct mips_cpu_info *p;
+ const struct mips_cpu_info *default_cpu;
+ int default_isa32 = ISA_MIPS1;
+ int default_isa64 = ISA_MIPS3;
/* 'from-abi' selects the most compatible architecture for the given
ABI: MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs. For the
@@ -20236,19 +20271,26 @@ mips_parse_cpu (const char *option, const char *cpu_string)
'mips64', just as we did in the days before 'from-abi'. */
if (strcasecmp (cpu_string, "from-abi") == 0)
{
+ for (default_cpu = mips_cpu_info_table; default_cpu->name != 0; default_cpu++)
+ if (mips_matching_cpu_name_p (default_cpu->name, MIPS_CPU_STRING_DEFAULT))
+ {
+ default_isa32 = mips_cpu_isa_32_64 (default_cpu->isa, 32);
+ default_isa64 = mips_cpu_isa_32_64 (default_cpu->isa, 64);
+ break;
+ }
if (ABI_NEEDS_32BIT_REGS (mips_abi))
- return mips_cpu_info_from_isa (ISA_MIPS1);
+ return mips_cpu_info_from_isa (default_isa32);
if (ABI_NEEDS_64BIT_REGS (mips_abi))
- return mips_cpu_info_from_isa (ISA_MIPS3);
+ return mips_cpu_info_from_isa (default_isa64);
if (file_mips_opts.gp >= 0)
return mips_cpu_info_from_isa (file_mips_opts.gp == 32
- ? ISA_MIPS1 : ISA_MIPS3);
+ ? default_isa32 : default_isa64);
return mips_cpu_info_from_isa (MIPS_DEFAULT_64BIT
- ? ISA_MIPS3
- : ISA_MIPS1);
+ ? default_isa64
+ : default_isa32);
}
/* 'default' has traditionally been a no-op. Probably not very useful. */
@@ -20263,6 +20305,24 @@ mips_parse_cpu (const char *option, const char *cpu_string)
return 0;
}
+/* Return the best matching 32bit/64bit ISA of a ISA, according the table
+ mips_isa_32_64_table */
+static int
+mips_cpu_isa_32_64(int isa, int bits)
+{
+ int i;
+
+ for (i = 0; mips_isa_32_64_table[i].isa != 0; i++)
+ if (isa != mips_isa_32_64_table[i].isa)
+ continue;
+ else if (bits == 32)
+ return mips_isa_32_64_table[i].isa_32;
+ else if (bits == 64)
+ return mips_isa_32_64_table[i].isa_64;
+
+ return 0;
+}
+
/* Return the canonical processor information for ISA (a member of the
ISA_MIPS* enumeration). */
diff --git a/gas/configure b/gas/configure
index b56836998ef..11b0a56bbd4 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12201,6 +12201,21 @@ _ACEOF
as_fn_error $? "$target_cpu isn't a supported MIPS CPU name" "$LINENO" 5
;;
esac
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
+$as_echo_n "checking for default configuration of --with-arch... " >&6; }
+ if test "x${with_arch}" != x; then
+ case ${with_arch} in
+ mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
+ mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
+ mips_cpu=${with_arch}
+ ;;
+ *)
+ as_fn_error $? "This kind of arch name does *NOT* exist!" "$LINENO" 5
+ ;;
+ esac
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
+$as_echo "$with_arch" >&6; }
# See whether it's appropriate to set E_MIPS_ABI_O32 for o32
# binaries. It's a GNU extension that some OSes don't understand.
case ${target} in
@@ -12223,7 +12238,10 @@ _ACEOF
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gas/configure.ac b/gas/configure.ac
index 6a68fd7c4e6..a126a3fda5d 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -370,6 +370,19 @@ changequote([,])dnl
AC_MSG_ERROR($target_cpu isn't a supported MIPS CPU name)
;;
esac
+ AC_MSG_CHECKING(for default configuration of --with-arch)
+ if test "x${with_arch}" != x; then
+ case ${with_arch} in
+ mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
+ mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
+ mips_cpu=${with_arch}
+ ;;
+ *)
+ AC_MSG_ERROR(This kind of arch name does *NOT* exist!)
+ ;;
+ esac
+ fi
+ AC_MSG_RESULT($with_arch)
# See whether it's appropriate to set E_MIPS_ABI_O32 for o32
# binaries. It's a GNU extension that some OSes don't understand.
case ${target} in
@@ -392,7 +405,10 @@ changequote([,])dnl
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gold/configure.tgt b/gold/configure.tgt
index 4b54e08d27f..ef47ce079f1 100644
--- a/gold/configure.tgt
+++ b/gold/configure.tgt
@@ -153,6 +153,13 @@ aarch64*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*el*-*-*|mips*64*le*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS_RS3_LE
+ targ_size=64
+ targ_big_endian=false
+ targ_extra_big_endian=true
+ ;;
mips*el*-*-*|mips*le*-*-*)
targ_obj=mips
targ_machine=EM_MIPS_RS3_LE
@@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS
+ targ_size=64
+ targ_big_endian=true
+ targ_extra_big_endian=false
+ ;;
mips*-*-*)
targ_obj=mips
targ_machine=EM_MIPS
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 34c9d67c365..4a71f679e29 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
;;
mips*-*-windiss) targ_emul=elf32mipswindiss
;;
-mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
+mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
targ_extra_libpath=$targ_extra_emuls
;;
-mips64*-*-linux-*) targ_emul=elf32btsmipn32
+mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*-*-linux-*) targ_emul=elf32btsmipn32
targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
targ_extra_libpath=$targ_extra_emuls
;;
--
2.30.2
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v2] MIPS: the default output fellows triple and with-arch
2023-04-03 11:06 ` [PATCH v2] MIPS: the default output fellows triple and with-arch YunQiang Su
@ 2023-04-03 12:40 ` Richard Sandiford
2023-04-10 7:01 ` YunQiang Su
2023-04-14 7:20 ` [PATCH v3] MIPS: the default output fellows triple YunQiang Su
1 sibling, 1 reply; 33+ messages in thread
From: Richard Sandiford @ 2023-04-03 12:40 UTC (permalink / raw)
To: YunQiang Su; +Cc: binutils, syq, macro, xry111, jiaxun.yang, amodra
YunQiang Su <yunqiang.su@cipunited.com> writes:
> PR 25494.
>
> 1. as fellows the isa level in triple of target
> and the --with-arch buildtime option:
> > as -march=from-abi xx.s
> > as xx.s
> 2. ld fellows the isa level in triple of target
> > ld -r -b binary xx.dat -o xx.o
> ---
> bfd/Makefile.in | 1 +
> bfd/config.bfd | 48 ++++++++++++-
> bfd/configure | 5 ++
> bfd/configure.ac | 4 ++
> bfd/elfxx-mips.c | 61 +++++++++++++++-
> .../binutils-all/mips/mips-note-2-n32.d | 1 +
> gas/config/tc-mips.c | 70 +++++++++++++++++--
> gas/configure | 20 +++++-
> gas/configure.ac | 18 ++++-
> gold/configure.tgt | 14 ++++
> ld/configure.tgt | 12 +++-
> 11 files changed, 241 insertions(+), 13 deletions(-)
>
> diff --git a/bfd/Makefile.in b/bfd/Makefile.in
> index 82aa96f30e5..7b7b262d64e 100644
> --- a/bfd/Makefile.in
> +++ b/bfd/Makefile.in
> @@ -332,6 +332,7 @@ CPPFLAGS = @CPPFLAGS@
> CYGPATH_W = @CYGPATH_W@
> DATADIRNAME = @DATADIRNAME@
> DEBUGDIR = @DEBUGDIR@
> +DEFAULT_ARCH = @DEFAULT_ARCH@
> DEFS = @DEFS@
> DEPDIR = @DEPDIR@
> DSYMUTIL = @DSYMUTIL@
> diff --git a/bfd/config.bfd b/bfd/config.bfd
> index 7af481048db..f5f3b08e50b 100644
> --- a/bfd/config.bfd
> +++ b/bfd/config.bfd
> @@ -227,6 +227,40 @@ z8k*) targ_archs=bfd_z8k_arch ;;
> *) targ_archs=bfd_${targ_cpu}_arch ;;
> esac
>
> +case "${targ}" in
> + mipsisa64r6*)
> + DEFAULT_ARCH=mips64r6
> + ;;
> + mipsisa64r5*)
> + DEFAULT_ARCH=mips64r5
> + ;;
> + mipsisa64r3*)
> + DEFAULT_ARCH=mips64r3
> + ;;
> + mipsisa64r2*)
> + DEFAULT_ARCH=mips64r2
> + ;;
> + mipsisa64*)
> + DEFAULT_ARCH=mips64
> + ;;
> + mipsisa32r6*)
> + DEFAULT_ARCH=mips32r6
> + ;;
> + mipsisa32r5*)
> + DEFAULT_ARCH=mips32r5
> + ;;
> + mipsisa32r3*)
> + DEFAULT_ARCH=mips32r3
> + ;;
> + mipsisa32r2*)
> + DEFAULT_ARCH=mips32r2
> + ;;
> + mipsisa32*)
> + DEFAULT_ARCH=mips32
> + ;;
> + *)
> + ;;
> +esac
>
> # WHEN ADDING ENTRIES TO THIS MATRIX:
> # Make sure that the left side always has two dashes. Otherwise you
> @@ -941,11 +975,21 @@ case "${targ}" in
> targ_defvec=mips_elf32_be_vec
> targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
> ;;
> - mips64*el-*-linux*)
> + mips*64*el-*-linux*-gnuabi64)
> + targ_defvec=mips_elf64_trad_le_vec
> + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
> + want64=true
> + ;;
> + mips*64*-*-linux*-gnuabi64)
> + targ_defvec=mips_elf64_trad_be_vec
> + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
> + want64=true
> + ;;
> + mips*64*el-*-linux*)
> targ_defvec=mips_elf32_ntrad_le_vec
> targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
> ;;
> - mips64*-*-linux*)
> + mips*64*-*-linux*)
> targ_defvec=mips_elf32_ntrad_be_vec
> targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
> ;;
> diff --git a/bfd/configure b/bfd/configure
> index 41d280ef461..3fc9aa6fdc2 100755
> --- a/bfd/configure
> +++ b/bfd/configure
> @@ -695,6 +695,7 @@ WARN_CFLAGS
> REPORT_BUGS_TEXI
> REPORT_BUGS_TO
> PKGVERSION
> +DEFAULT_ARCH
> DEBUGDIR
> ENABLE_BFD_64_BIT_FALSE
> ENABLE_BFD_64_BIT_TRUE
> @@ -13775,6 +13776,10 @@ do
> fi
> done
>
> +if test -n "$DEFAULT_ARCH"; then
> + TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
> +fi
> +
>
> # This processing still needs to be done if we're to decide properly whether
> # 64-bit support needs to be compiled in. Currently, it will be included if
> diff --git a/bfd/configure.ac b/bfd/configure.ac
> index f044616f4d9..b432d7cf10f 100644
> --- a/bfd/configure.ac
> +++ b/bfd/configure.ac
> @@ -341,6 +341,10 @@ do
> TDEFINES="$TDEFINES $targ_cflags"
> fi
> done
> +
> +if test -n "$DEFAULT_ARCH"; then
> + TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
> +fi
> AC_SUBST(TDEFINES)
>
> # This processing still needs to be done if we're to decide properly whether
> diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
> index d34a755807b..61f00981bfc 100644
> --- a/bfd/elfxx-mips.c
> +++ b/bfd/elfxx-mips.c
> @@ -47,6 +47,15 @@
>
> #include "hashtab.h"
>
> +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> +struct mips_eflags_32_64
> +{
> + const char *name;
> + flagword e_mips_arch;
> + flagword e_mips_arch32;
> + flagword e_mips_arch64;
> +};
> +
> /* Types of TLS GOT entry. */
> enum mips_got_tls_type {
> GOT_TLS_NONE,
> @@ -1306,6 +1315,28 @@ bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr)
> #define TP_OFFSET 0x7000
> #define DTP_OFFSET 0x8000
>
> +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> +__attribute__ ((unused))
> +static const struct mips_eflags_32_64 mips_eflags_32_64_table[] =
> +{
> + { "mips1", E_MIPS_ARCH_1, E_MIPS_ARCH_1, E_MIPS_ARCH_3},
> + { "mips2", E_MIPS_ARCH_2, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
> + { "mips3", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
> + { "mips4", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_4},
> + { "mips5", E_MIPS_ARCH_5, E_MIPS_ARCH_2, E_MIPS_ARCH_5},
> + { "mips32", E_MIPS_ARCH_32, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
> + { "mips32r2", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips32r3", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips32r5", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips32r6", E_MIPS_ARCH_32R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
> + { "mips64", E_MIPS_ARCH_64, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
> + { "mips64r2", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips64r3", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips64r5", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> + { "mips64r6", E_MIPS_ARCH_64R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
> + { NULL, 0, 0, 0 }
> +};
> +
> static bfd_vma
> dtprel_base (struct bfd_link_info *info)
> {
> @@ -12316,6 +12347,30 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd,
> }
>
>
> +/* Get the E_MIPA_ARCH_?? value for the DEFAULT_ARCH
> + The value of bits can be 32/64 or 0 (guess from DEFAULT_ARCH)
> + */
> +static flagword mips_get_default_arch_eflags(int bits)
> +{
> +#ifdef DEFAULT_ARCH
> + int i;
> +
> + for (i = 0; mips_eflags_32_64_table[i].name; i++)
> + if (strcasecmp (mips_eflags_32_64_table[i].name, DEFAULT_ARCH) != 0)
> + continue;
> + else if (bits == 32)
> + return mips_eflags_32_64_table[i].e_mips_arch32;
> + else if (bits == 64)
> + return mips_eflags_32_64_table[i].e_mips_arch64;
> + else if (bits == 0)
> + return mips_eflags_32_64_table[i].e_mips_arch;
> +#endif
> +
> + if (bits == 64)
> + return E_MIPS_ARCH_3;
> + return E_MIPS_ARCH_1;
> +}
> +
> /* Set ABFD's EF_MIPS_ARCH and EF_MIPS_MACH flags. */
>
> static void
One of my points in the previous review was that I don't think we should
change the behaviour for mipsisa32/64r2 and earlier (unless there's
a specific reason that I'm missing). Starting out at the minimum
MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs seems like the
correct behaviour, with the architecture being bumped once code is
linked in.
E.g. I don't see any reason in principle why mipsisa64-elf-ld should
behave differently from mips64-elf-ld for the same set of input objects.
If all the input objects are MIPS III then the output should be too.
Similarly, I think -march=from-abi should select MIPS I/III even
for mipsisa64-elf. That matches the GCC documentation:
The special value @samp{from-abi} selects the
most compatible architecture for the selected ABI (that is,
@samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@.
AIUI, the motivation for the change is that mipsisa32/64r6 is not
compatible with r2 and earlier, and so defaulting to MIPS I or MIPS III
isn't correct. I think that makes r6 architectures a new base architecture
for MIPS 32/64 r6 and above. E.g. if there was an r7 that was backwards-
compatible with r6, r7 should IMO use r6 as the default here, just like
MIPS IV toolchains use MIPS III as the default for 64-bit ABIs.
E.g. maybe we could have a MIPSR6_TOOLCHAIN_P that is true for
toolchains that are for r6+. Then select:
MIPSR6_TOOLCHAIN_P ? E_MIPS_ARCH_64R6 : E_MIPS_ARCH_3
and
MIPSR6_TOOLCHAIN_P ? E_MIPS_ARCH_32R6 : E_MIPS_ARCH_1
I can see the argument for changing -march=from-abi for r6+ too,
but we should try to keep the GCC and GAS handling compatible.
Thanks,
Richard
> @@ -12327,9 +12382,11 @@ mips_set_isa_flags (bfd *abfd)
> {
> default:
> if (ABI_N32_P (abfd) || ABI_64_P (abfd))
> - val = E_MIPS_ARCH_3;
> + val = mips_get_default_arch_eflags(64);
> + else if (ABI_O32_P (abfd))
> + val = mips_get_default_arch_eflags(32);
> else
> - val = E_MIPS_ARCH_1;
> + val = mips_get_default_arch_eflags(0);
> break;
>
> case bfd_mach_mips3000:
> diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> index c2a581858ed..5e24e7a115e 100644
> --- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> +++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> @@ -1,4 +1,5 @@
> #PROG: objcopy
> +#as: -n32
> #readelf: --notes --wide
> #objcopy: --merge-notes
> #name: MIPS merge notes section (n32)
> diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
> index e911aaa904a..c906471eb92 100644
> --- a/gas/config/tc-mips.c
> +++ b/gas/config/tc-mips.c
> @@ -1422,6 +1422,15 @@ static int relaxed_micromips_16bit_branch_length (fragS *, asection *, int);
> static int relaxed_micromips_32bit_branch_length (fragS *, asection *, int);
> static void file_mips_check_options (void);
>
> +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> +
> +struct mips_isa_32_64
> +{
> + int isa;
> + int isa_32;
> + int isa_64;
> +};
> +
> /* Table and functions used to map between CPU/ISA names, and
> ISA levels, and CPU numbers. */
>
> @@ -1439,6 +1448,7 @@ struct mips_cpu_info
> static const struct mips_cpu_info *mips_parse_cpu (const char *, const char *);
> static const struct mips_cpu_info *mips_cpu_info_from_isa (int);
> static const struct mips_cpu_info *mips_cpu_info_from_arch (int);
> +static int mips_cpu_isa_32_64(int isa, int bits);
> \f
> /* Command-line options. */
> const char *md_shortopts = "O::g::G:";
> @@ -19979,6 +19989,28 @@ s_mips_mask (int reg_type)
> }
> }
>
> +
> +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> +static const struct mips_isa_32_64 mips_isa_32_64_table[] =
> +{
> + { ISA_MIPS1, ISA_MIPS1, ISA_MIPS3 },
> + { ISA_MIPS2, ISA_MIPS2, ISA_MIPS3 },
> + { ISA_MIPS3, ISA_MIPS2, ISA_MIPS3 },
> + { ISA_MIPS4, ISA_MIPS2, ISA_MIPS4 },
> + { ISA_MIPS5, ISA_MIPS2, ISA_MIPS5 },
> + { ISA_MIPS32, ISA_MIPS32, ISA_MIPS64 },
> + { ISA_MIPS32R2, ISA_MIPS32R2, ISA_MIPS64R2 },
> + { ISA_MIPS32R3, ISA_MIPS32R3, ISA_MIPS64R3 },
> + { ISA_MIPS32R5, ISA_MIPS32R5, ISA_MIPS64R5 },
> + { ISA_MIPS32R6, ISA_MIPS32R6, ISA_MIPS64R6 },
> + { ISA_MIPS64, ISA_MIPS32, ISA_MIPS64 },
> + { ISA_MIPS64R2, ISA_MIPS32R2, ISA_MIPS64R2 },
> + { ISA_MIPS64R3, ISA_MIPS32R3, ISA_MIPS64R3 },
> + { ISA_MIPS64R5, ISA_MIPS32R5, ISA_MIPS64R5 },
> + { ISA_MIPS64R6, ISA_MIPS32R6, ISA_MIPS64R6 },
> + { 0, 0, 0 }
> +};
> +
> /* A table describing all the processors gas knows about. Names are
> matched in the order listed.
>
> @@ -20223,6 +20255,9 @@ static const struct mips_cpu_info *
> mips_parse_cpu (const char *option, const char *cpu_string)
> {
> const struct mips_cpu_info *p;
> + const struct mips_cpu_info *default_cpu;
> + int default_isa32 = ISA_MIPS1;
> + int default_isa64 = ISA_MIPS3;
>
> /* 'from-abi' selects the most compatible architecture for the given
> ABI: MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs. For the
> @@ -20236,19 +20271,26 @@ mips_parse_cpu (const char *option, const char *cpu_string)
> 'mips64', just as we did in the days before 'from-abi'. */
> if (strcasecmp (cpu_string, "from-abi") == 0)
> {
> + for (default_cpu = mips_cpu_info_table; default_cpu->name != 0; default_cpu++)
> + if (mips_matching_cpu_name_p (default_cpu->name, MIPS_CPU_STRING_DEFAULT))
> + {
> + default_isa32 = mips_cpu_isa_32_64 (default_cpu->isa, 32);
> + default_isa64 = mips_cpu_isa_32_64 (default_cpu->isa, 64);
> + break;
> + }
> if (ABI_NEEDS_32BIT_REGS (mips_abi))
> - return mips_cpu_info_from_isa (ISA_MIPS1);
> + return mips_cpu_info_from_isa (default_isa32);
>
> if (ABI_NEEDS_64BIT_REGS (mips_abi))
> - return mips_cpu_info_from_isa (ISA_MIPS3);
> + return mips_cpu_info_from_isa (default_isa64);
>
> if (file_mips_opts.gp >= 0)
> return mips_cpu_info_from_isa (file_mips_opts.gp == 32
> - ? ISA_MIPS1 : ISA_MIPS3);
> + ? default_isa32 : default_isa64);
>
> return mips_cpu_info_from_isa (MIPS_DEFAULT_64BIT
> - ? ISA_MIPS3
> - : ISA_MIPS1);
> + ? default_isa64
> + : default_isa32);
> }
>
> /* 'default' has traditionally been a no-op. Probably not very useful. */
> @@ -20263,6 +20305,24 @@ mips_parse_cpu (const char *option, const char *cpu_string)
> return 0;
> }
>
> +/* Return the best matching 32bit/64bit ISA of a ISA, according the table
> + mips_isa_32_64_table */
> +static int
> +mips_cpu_isa_32_64(int isa, int bits)
> +{
> + int i;
> +
> + for (i = 0; mips_isa_32_64_table[i].isa != 0; i++)
> + if (isa != mips_isa_32_64_table[i].isa)
> + continue;
> + else if (bits == 32)
> + return mips_isa_32_64_table[i].isa_32;
> + else if (bits == 64)
> + return mips_isa_32_64_table[i].isa_64;
> +
> + return 0;
> +}
> +
> /* Return the canonical processor information for ISA (a member of the
> ISA_MIPS* enumeration). */
>
> diff --git a/gas/configure b/gas/configure
> index b56836998ef..11b0a56bbd4 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -12201,6 +12201,21 @@ _ACEOF
> as_fn_error $? "$target_cpu isn't a supported MIPS CPU name" "$LINENO" 5
> ;;
> esac
> + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
> +$as_echo_n "checking for default configuration of --with-arch... " >&6; }
> + if test "x${with_arch}" != x; then
> + case ${with_arch} in
> + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
> + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
> + mips_cpu=${with_arch}
> + ;;
> + *)
> + as_fn_error $? "This kind of arch name does *NOT* exist!" "$LINENO" 5
> + ;;
> + esac
> + fi
> + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
> +$as_echo "$with_arch" >&6; }
> # See whether it's appropriate to set E_MIPS_ABI_O32 for o32
> # binaries. It's a GNU extension that some OSes don't understand.
> case ${target} in
> @@ -12223,7 +12238,10 @@ _ACEOF
> esac
> # Decide which ABI to target by default.
> case ${target} in
> - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> + mips*64*-linux-gnuabi64)
> + mips_default_abi=N64_ABI
> + ;;
> + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> mips_default_abi=N32_ABI
> ;;
> diff --git a/gas/configure.ac b/gas/configure.ac
> index 6a68fd7c4e6..a126a3fda5d 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -370,6 +370,19 @@ changequote([,])dnl
> AC_MSG_ERROR($target_cpu isn't a supported MIPS CPU name)
> ;;
> esac
> + AC_MSG_CHECKING(for default configuration of --with-arch)
> + if test "x${with_arch}" != x; then
> + case ${with_arch} in
> + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
> + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
> + mips_cpu=${with_arch}
> + ;;
> + *)
> + AC_MSG_ERROR(This kind of arch name does *NOT* exist!)
> + ;;
> + esac
> + fi
> + AC_MSG_RESULT($with_arch)
> # See whether it's appropriate to set E_MIPS_ABI_O32 for o32
> # binaries. It's a GNU extension that some OSes don't understand.
> case ${target} in
> @@ -392,7 +405,10 @@ changequote([,])dnl
> esac
> # Decide which ABI to target by default.
> case ${target} in
> - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> + mips*64*-linux-gnuabi64)
> + mips_default_abi=N64_ABI
> + ;;
> + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> mips_default_abi=N32_ABI
> ;;
> diff --git a/gold/configure.tgt b/gold/configure.tgt
> index 4b54e08d27f..ef47ce079f1 100644
> --- a/gold/configure.tgt
> +++ b/gold/configure.tgt
> @@ -153,6 +153,13 @@ aarch64*-*)
> targ_big_endian=false
> targ_extra_big_endian=true
> ;;
> +mips*64*el*-*-*|mips*64*le*-*-*)
> + targ_obj=mips
> + targ_machine=EM_MIPS_RS3_LE
> + targ_size=64
> + targ_big_endian=false
> + targ_extra_big_endian=true
> + ;;
> mips*el*-*-*|mips*le*-*-*)
> targ_obj=mips
> targ_machine=EM_MIPS_RS3_LE
> @@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
> targ_big_endian=false
> targ_extra_big_endian=true
> ;;
> +mips*64*-*-*)
> + targ_obj=mips
> + targ_machine=EM_MIPS
> + targ_size=64
> + targ_big_endian=true
> + targ_extra_big_endian=false
> + ;;
> mips*-*-*)
> targ_obj=mips
> targ_machine=EM_MIPS
> diff --git a/ld/configure.tgt b/ld/configure.tgt
> index 34c9d67c365..4a71f679e29 100644
> --- a/ld/configure.tgt
> +++ b/ld/configure.tgt
> @@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
> ;;
> mips*-*-windiss) targ_emul=elf32mipswindiss
> ;;
> -mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
> +mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
> + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
> + targ_extra_libpath=$targ_extra_emuls
> + ;;
> +mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
> targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
> targ_extra_libpath=$targ_extra_emuls
> ;;
> -mips64*-*-linux-*) targ_emul=elf32btsmipn32
> +mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
> + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
> + targ_extra_libpath=$targ_extra_emuls
> + ;;
> +mips*64*-*-linux-*) targ_emul=elf32btsmipn32
> targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
> targ_extra_libpath=$targ_extra_emuls
> ;;
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v2] MIPS: the default output fellows triple and with-arch
2023-04-03 12:40 ` Richard Sandiford
@ 2023-04-10 7:01 ` YunQiang Su
0 siblings, 0 replies; 33+ messages in thread
From: YunQiang Su @ 2023-04-10 7:01 UTC (permalink / raw)
To: Richard Sandiford, YunQiang Su, binutils, syq, macro, xry111,
jiaxun.yang, amodra
https://sourceware.org/bugzilla/attachment.cgi?id=12247
It sounds like my earliest patch...
Richard Sandiford via Binutils <binutils@sourceware.org> 于2023年4月3日周一 20:40写道：
>
> YunQiang Su <yunqiang.su@cipunited.com> writes:
> > PR 25494.
> >
> > 1. as fellows the isa level in triple of target
> > and the --with-arch buildtime option:
> > > as -march=from-abi xx.s
> > > as xx.s
> > 2. ld fellows the isa level in triple of target
> > > ld -r -b binary xx.dat -o xx.o
> > ---
> > bfd/Makefile.in | 1 +
> > bfd/config.bfd | 48 ++++++++++++-
> > bfd/configure | 5 ++
> > bfd/configure.ac | 4 ++
> > bfd/elfxx-mips.c | 61 +++++++++++++++-
> > .../binutils-all/mips/mips-note-2-n32.d | 1 +
> > gas/config/tc-mips.c | 70 +++++++++++++++++--
> > gas/configure | 20 +++++-
> > gas/configure.ac | 18 ++++-
> > gold/configure.tgt | 14 ++++
> > ld/configure.tgt | 12 +++-
> > 11 files changed, 241 insertions(+), 13 deletions(-)
> >
> > diff --git a/bfd/Makefile.in b/bfd/Makefile.in
> > index 82aa96f30e5..7b7b262d64e 100644
> > --- a/bfd/Makefile.in
> > +++ b/bfd/Makefile.in
> > @@ -332,6 +332,7 @@ CPPFLAGS = @CPPFLAGS@
> > CYGPATH_W = @CYGPATH_W@
> > DATADIRNAME = @DATADIRNAME@
> > DEBUGDIR = @DEBUGDIR@
> > +DEFAULT_ARCH = @DEFAULT_ARCH@
> > DEFS = @DEFS@
> > DEPDIR = @DEPDIR@
> > DSYMUTIL = @DSYMUTIL@
> > diff --git a/bfd/config.bfd b/bfd/config.bfd
> > index 7af481048db..f5f3b08e50b 100644
> > --- a/bfd/config.bfd
> > +++ b/bfd/config.bfd
> > @@ -227,6 +227,40 @@ z8k*) targ_archs=bfd_z8k_arch ;;
> > *) targ_archs=bfd_${targ_cpu}_arch ;;
> > esac
> >
> > +case "${targ}" in
> > + mipsisa64r6*)
> > + DEFAULT_ARCH=mips64r6
> > + ;;
> > + mipsisa64r5*)
> > + DEFAULT_ARCH=mips64r5
> > + ;;
> > + mipsisa64r3*)
> > + DEFAULT_ARCH=mips64r3
> > + ;;
> > + mipsisa64r2*)
> > + DEFAULT_ARCH=mips64r2
> > + ;;
> > + mipsisa64*)
> > + DEFAULT_ARCH=mips64
> > + ;;
> > + mipsisa32r6*)
> > + DEFAULT_ARCH=mips32r6
> > + ;;
> > + mipsisa32r5*)
> > + DEFAULT_ARCH=mips32r5
> > + ;;
> > + mipsisa32r3*)
> > + DEFAULT_ARCH=mips32r3
> > + ;;
> > + mipsisa32r2*)
> > + DEFAULT_ARCH=mips32r2
> > + ;;
> > + mipsisa32*)
> > + DEFAULT_ARCH=mips32
> > + ;;
> > + *)
> > + ;;
> > +esac
> >
> > # WHEN ADDING ENTRIES TO THIS MATRIX:
> > # Make sure that the left side always has two dashes. Otherwise you
> > @@ -941,11 +975,21 @@ case "${targ}" in
> > targ_defvec=mips_elf32_be_vec
> > targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
> > ;;
> > - mips64*el-*-linux*)
> > + mips*64*el-*-linux*-gnuabi64)
> > + targ_defvec=mips_elf64_trad_le_vec
> > + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
> > + want64=true
> > + ;;
> > + mips*64*-*-linux*-gnuabi64)
> > + targ_defvec=mips_elf64_trad_be_vec
> > + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
> > + want64=true
> > + ;;
> > + mips*64*el-*-linux*)
> > targ_defvec=mips_elf32_ntrad_le_vec
> > targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
> > ;;
> > - mips64*-*-linux*)
> > + mips*64*-*-linux*)
> > targ_defvec=mips_elf32_ntrad_be_vec
> > targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
> > ;;
> > diff --git a/bfd/configure b/bfd/configure
> > index 41d280ef461..3fc9aa6fdc2 100755
> > --- a/bfd/configure
> > +++ b/bfd/configure
> > @@ -695,6 +695,7 @@ WARN_CFLAGS
> > REPORT_BUGS_TEXI
> > REPORT_BUGS_TO
> > PKGVERSION
> > +DEFAULT_ARCH
> > DEBUGDIR
> > ENABLE_BFD_64_BIT_FALSE
> > ENABLE_BFD_64_BIT_TRUE
> > @@ -13775,6 +13776,10 @@ do
> > fi
> > done
> >
> > +if test -n "$DEFAULT_ARCH"; then
> > + TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
> > +fi
> > +
> >
> > # This processing still needs to be done if we're to decide properly whether
> > # 64-bit support needs to be compiled in. Currently, it will be included if
> > diff --git a/bfd/configure.ac b/bfd/configure.ac
> > index f044616f4d9..b432d7cf10f 100644
> > --- a/bfd/configure.ac
> > +++ b/bfd/configure.ac
> > @@ -341,6 +341,10 @@ do
> > TDEFINES="$TDEFINES $targ_cflags"
> > fi
> > done
> > +
> > +if test -n "$DEFAULT_ARCH"; then
> > + TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\""
> > +fi
> > AC_SUBST(TDEFINES)
> >
> > # This processing still needs to be done if we're to decide properly whether
> > diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
> > index d34a755807b..61f00981bfc 100644
> > --- a/bfd/elfxx-mips.c
> > +++ b/bfd/elfxx-mips.c
> > @@ -47,6 +47,15 @@
> >
> > #include "hashtab.h"
> >
> > +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> > +struct mips_eflags_32_64
> > +{
> > + const char *name;
> > + flagword e_mips_arch;
> > + flagword e_mips_arch32;
> > + flagword e_mips_arch64;
> > +};
> > +
> > /* Types of TLS GOT entry. */
> > enum mips_got_tls_type {
> > GOT_TLS_NONE,
> > @@ -1306,6 +1315,28 @@ bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr)
> > #define TP_OFFSET 0x7000
> > #define DTP_OFFSET 0x8000
> >
> > +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> > +__attribute__ ((unused))
> > +static const struct mips_eflags_32_64 mips_eflags_32_64_table[] =
> > +{
> > + { "mips1", E_MIPS_ARCH_1, E_MIPS_ARCH_1, E_MIPS_ARCH_3},
> > + { "mips2", E_MIPS_ARCH_2, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
> > + { "mips3", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_3},
> > + { "mips4", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_4},
> > + { "mips5", E_MIPS_ARCH_5, E_MIPS_ARCH_2, E_MIPS_ARCH_5},
> > + { "mips32", E_MIPS_ARCH_32, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
> > + { "mips32r2", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> > + { "mips32r3", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> > + { "mips32r5", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> > + { "mips32r6", E_MIPS_ARCH_32R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
> > + { "mips64", E_MIPS_ARCH_64, E_MIPS_ARCH_32, E_MIPS_ARCH_64},
> > + { "mips64r2", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> > + { "mips64r3", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> > + { "mips64r5", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2},
> > + { "mips64r6", E_MIPS_ARCH_64R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6},
> > + { NULL, 0, 0, 0 }
> > +};
> > +
> > static bfd_vma
> > dtprel_base (struct bfd_link_info *info)
> > {
> > @@ -12316,6 +12347,30 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd,
> > }
> >
> >
> > +/* Get the E_MIPA_ARCH_?? value for the DEFAULT_ARCH
> > + The value of bits can be 32/64 or 0 (guess from DEFAULT_ARCH)
> > + */
> > +static flagword mips_get_default_arch_eflags(int bits)
> > +{
> > +#ifdef DEFAULT_ARCH
> > + int i;
> > +
> > + for (i = 0; mips_eflags_32_64_table[i].name; i++)
> > + if (strcasecmp (mips_eflags_32_64_table[i].name, DEFAULT_ARCH) != 0)
> > + continue;
> > + else if (bits == 32)
> > + return mips_eflags_32_64_table[i].e_mips_arch32;
> > + else if (bits == 64)
> > + return mips_eflags_32_64_table[i].e_mips_arch64;
> > + else if (bits == 0)
> > + return mips_eflags_32_64_table[i].e_mips_arch;
> > +#endif
> > +
> > + if (bits == 64)
> > + return E_MIPS_ARCH_3;
> > + return E_MIPS_ARCH_1;
> > +}
> > +
> > /* Set ABFD's EF_MIPS_ARCH and EF_MIPS_MACH flags. */
> >
> > static void
>
> One of my points in the previous review was that I don't think we should
> change the behaviour for mipsisa32/64r2 and earlier (unless there's
> a specific reason that I'm missing). Starting out at the minimum
> MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs seems like the
> correct behaviour, with the architecture being bumped once code is
> linked in.
>
> E.g. I don't see any reason in principle why mipsisa64-elf-ld should
> behave differently from mips64-elf-ld for the same set of input objects.
> If all the input objects are MIPS III then the output should be too.
> Similarly, I think -march=from-abi should select MIPS I/III even
> for mipsisa64-elf. That matches the GCC documentation:
>
> The special value @samp{from-abi} selects the
> most compatible architecture for the selected ABI (that is,
> @samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@.
>
> AIUI, the motivation for the change is that mipsisa32/64r6 is not
> compatible with r2 and earlier, and so defaulting to MIPS I or MIPS III
> isn't correct. I think that makes r6 architectures a new base architecture
> for MIPS 32/64 r6 and above. E.g. if there was an r7 that was backwards-
> compatible with r6, r7 should IMO use r6 as the default here, just like
> MIPS IV toolchains use MIPS III as the default for 64-bit ABIs.
>
> E.g. maybe we could have a MIPSR6_TOOLCHAIN_P that is true for
> toolchains that are for r6+. Then select:
>
> MIPSR6_TOOLCHAIN_P ? E_MIPS_ARCH_64R6 : E_MIPS_ARCH_3
>
> and
>
> MIPSR6_TOOLCHAIN_P ? E_MIPS_ARCH_32R6 : E_MIPS_ARCH_1
>
> I can see the argument for changing -march=from-abi for r6+ too,
> but we should try to keep the GCC and GAS handling compatible.
>
> Thanks,
> Richard
>
> > @@ -12327,9 +12382,11 @@ mips_set_isa_flags (bfd *abfd)
> > {
> > default:
> > if (ABI_N32_P (abfd) || ABI_64_P (abfd))
> > - val = E_MIPS_ARCH_3;
> > + val = mips_get_default_arch_eflags(64);
> > + else if (ABI_O32_P (abfd))
> > + val = mips_get_default_arch_eflags(32);
> > else
> > - val = E_MIPS_ARCH_1;
> > + val = mips_get_default_arch_eflags(0);
> > break;
> >
> > case bfd_mach_mips3000:
> > diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> > index c2a581858ed..5e24e7a115e 100644
> > --- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> > +++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> > @@ -1,4 +1,5 @@
> > #PROG: objcopy
> > +#as: -n32
> > #readelf: --notes --wide
> > #objcopy: --merge-notes
> > #name: MIPS merge notes section (n32)
> > diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
> > index e911aaa904a..c906471eb92 100644
> > --- a/gas/config/tc-mips.c
> > +++ b/gas/config/tc-mips.c
> > @@ -1422,6 +1422,15 @@ static int relaxed_micromips_16bit_branch_length (fragS *, asection *, int);
> > static int relaxed_micromips_32bit_branch_length (fragS *, asection *, int);
> > static void file_mips_check_options (void);
> >
> > +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> > +
> > +struct mips_isa_32_64
> > +{
> > + int isa;
> > + int isa_32;
> > + int isa_64;
> > +};
> > +
> > /* Table and functions used to map between CPU/ISA names, and
> > ISA levels, and CPU numbers. */
> >
> > @@ -1439,6 +1448,7 @@ struct mips_cpu_info
> > static const struct mips_cpu_info *mips_parse_cpu (const char *, const char *);
> > static const struct mips_cpu_info *mips_cpu_info_from_isa (int);
> > static const struct mips_cpu_info *mips_cpu_info_from_arch (int);
> > +static int mips_cpu_isa_32_64(int isa, int bits);
> >
> > /* Command-line options. */
> > const char *md_shortopts = "O::g::G:";
> > @@ -19979,6 +19989,28 @@ s_mips_mask (int reg_type)
> > }
> > }
> >
> > +
> > +/* A table describing all ISA and its 32bit and 64bit version for best matching */
> > +static const struct mips_isa_32_64 mips_isa_32_64_table[] =
> > +{
> > + { ISA_MIPS1, ISA_MIPS1, ISA_MIPS3 },
> > + { ISA_MIPS2, ISA_MIPS2, ISA_MIPS3 },
> > + { ISA_MIPS3, ISA_MIPS2, ISA_MIPS3 },
> > + { ISA_MIPS4, ISA_MIPS2, ISA_MIPS4 },
> > + { ISA_MIPS5, ISA_MIPS2, ISA_MIPS5 },
> > + { ISA_MIPS32, ISA_MIPS32, ISA_MIPS64 },
> > + { ISA_MIPS32R2, ISA_MIPS32R2, ISA_MIPS64R2 },
> > + { ISA_MIPS32R3, ISA_MIPS32R3, ISA_MIPS64R3 },
> > + { ISA_MIPS32R5, ISA_MIPS32R5, ISA_MIPS64R5 },
> > + { ISA_MIPS32R6, ISA_MIPS32R6, ISA_MIPS64R6 },
> > + { ISA_MIPS64, ISA_MIPS32, ISA_MIPS64 },
> > + { ISA_MIPS64R2, ISA_MIPS32R2, ISA_MIPS64R2 },
> > + { ISA_MIPS64R3, ISA_MIPS32R3, ISA_MIPS64R3 },
> > + { ISA_MIPS64R5, ISA_MIPS32R5, ISA_MIPS64R5 },
> > + { ISA_MIPS64R6, ISA_MIPS32R6, ISA_MIPS64R6 },
> > + { 0, 0, 0 }
> > +};
> > +
> > /* A table describing all the processors gas knows about. Names are
> > matched in the order listed.
> >
> > @@ -20223,6 +20255,9 @@ static const struct mips_cpu_info *
> > mips_parse_cpu (const char *option, const char *cpu_string)
> > {
> > const struct mips_cpu_info *p;
> > + const struct mips_cpu_info *default_cpu;
> > + int default_isa32 = ISA_MIPS1;
> > + int default_isa64 = ISA_MIPS3;
> >
> > /* 'from-abi' selects the most compatible architecture for the given
> > ABI: MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs. For the
> > @@ -20236,19 +20271,26 @@ mips_parse_cpu (const char *option, const char *cpu_string)
> > 'mips64', just as we did in the days before 'from-abi'. */
> > if (strcasecmp (cpu_string, "from-abi") == 0)
> > {
> > + for (default_cpu = mips_cpu_info_table; default_cpu->name != 0; default_cpu++)
> > + if (mips_matching_cpu_name_p (default_cpu->name, MIPS_CPU_STRING_DEFAULT))
> > + {
> > + default_isa32 = mips_cpu_isa_32_64 (default_cpu->isa, 32);
> > + default_isa64 = mips_cpu_isa_32_64 (default_cpu->isa, 64);
> > + break;
> > + }
> > if (ABI_NEEDS_32BIT_REGS (mips_abi))
> > - return mips_cpu_info_from_isa (ISA_MIPS1);
> > + return mips_cpu_info_from_isa (default_isa32);
> >
> > if (ABI_NEEDS_64BIT_REGS (mips_abi))
> > - return mips_cpu_info_from_isa (ISA_MIPS3);
> > + return mips_cpu_info_from_isa (default_isa64);
> >
> > if (file_mips_opts.gp >= 0)
> > return mips_cpu_info_from_isa (file_mips_opts.gp == 32
> > - ? ISA_MIPS1 : ISA_MIPS3);
> > + ? default_isa32 : default_isa64);
> >
> > return mips_cpu_info_from_isa (MIPS_DEFAULT_64BIT
> > - ? ISA_MIPS3
> > - : ISA_MIPS1);
> > + ? default_isa64
> > + : default_isa32);
> > }
> >
> > /* 'default' has traditionally been a no-op. Probably not very useful. */
> > @@ -20263,6 +20305,24 @@ mips_parse_cpu (const char *option, const char *cpu_string)
> > return 0;
> > }
> >
> > +/* Return the best matching 32bit/64bit ISA of a ISA, according the table
> > + mips_isa_32_64_table */
> > +static int
> > +mips_cpu_isa_32_64(int isa, int bits)
> > +{
> > + int i;
> > +
> > + for (i = 0; mips_isa_32_64_table[i].isa != 0; i++)
> > + if (isa != mips_isa_32_64_table[i].isa)
> > + continue;
> > + else if (bits == 32)
> > + return mips_isa_32_64_table[i].isa_32;
> > + else if (bits == 64)
> > + return mips_isa_32_64_table[i].isa_64;
> > +
> > + return 0;
> > +}
> > +
> > /* Return the canonical processor information for ISA (a member of the
> > ISA_MIPS* enumeration). */
> >
> > diff --git a/gas/configure b/gas/configure
> > index b56836998ef..11b0a56bbd4 100755
> > --- a/gas/configure
> > +++ b/gas/configure
> > @@ -12201,6 +12201,21 @@ _ACEOF
> > as_fn_error $? "$target_cpu isn't a supported MIPS CPU name" "$LINENO" 5
> > ;;
> > esac
> > + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
> > +$as_echo_n "checking for default configuration of --with-arch... " >&6; }
> > + if test "x${with_arch}" != x; then
> > + case ${with_arch} in
> > + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
> > + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
> > + mips_cpu=${with_arch}
> > + ;;
> > + *)
> > + as_fn_error $? "This kind of arch name does *NOT* exist!" "$LINENO" 5
> > + ;;
> > + esac
> > + fi
> > + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5
> > +$as_echo "$with_arch" >&6; }
> > # See whether it's appropriate to set E_MIPS_ABI_O32 for o32
> > # binaries. It's a GNU extension that some OSes don't understand.
> > case ${target} in
> > @@ -12223,7 +12238,10 @@ _ACEOF
> > esac
> > # Decide which ABI to target by default.
> > case ${target} in
> > - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> > + mips*64*-linux-gnuabi64)
> > + mips_default_abi=N64_ABI
> > + ;;
> > + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> > | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> > mips_default_abi=N32_ABI
> > ;;
> > diff --git a/gas/configure.ac b/gas/configure.ac
> > index 6a68fd7c4e6..a126a3fda5d 100644
> > --- a/gas/configure.ac
> > +++ b/gas/configure.ac
> > @@ -370,6 +370,19 @@ changequote([,])dnl
> > AC_MSG_ERROR($target_cpu isn't a supported MIPS CPU name)
> > ;;
> > esac
> > + AC_MSG_CHECKING(for default configuration of --with-arch)
> > + if test "x${with_arch}" != x; then
> > + case ${with_arch} in
> > + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \
> > + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6)
> > + mips_cpu=${with_arch}
> > + ;;
> > + *)
> > + AC_MSG_ERROR(This kind of arch name does *NOT* exist!)
> > + ;;
> > + esac
> > + fi
> > + AC_MSG_RESULT($with_arch)
> > # See whether it's appropriate to set E_MIPS_ABI_O32 for o32
> > # binaries. It's a GNU extension that some OSes don't understand.
> > case ${target} in
> > @@ -392,7 +405,10 @@ changequote([,])dnl
> > esac
> > # Decide which ABI to target by default.
> > case ${target} in
> > - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> > + mips*64*-linux-gnuabi64)
> > + mips_default_abi=N64_ABI
> > + ;;
> > + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> > | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> > mips_default_abi=N32_ABI
> > ;;
> > diff --git a/gold/configure.tgt b/gold/configure.tgt
> > index 4b54e08d27f..ef47ce079f1 100644
> > --- a/gold/configure.tgt
> > +++ b/gold/configure.tgt
> > @@ -153,6 +153,13 @@ aarch64*-*)
> > targ_big_endian=false
> > targ_extra_big_endian=true
> > ;;
> > +mips*64*el*-*-*|mips*64*le*-*-*)
> > + targ_obj=mips
> > + targ_machine=EM_MIPS_RS3_LE
> > + targ_size=64
> > + targ_big_endian=false
> > + targ_extra_big_endian=true
> > + ;;
> > mips*el*-*-*|mips*le*-*-*)
> > targ_obj=mips
> > targ_machine=EM_MIPS_RS3_LE
> > @@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
> > targ_big_endian=false
> > targ_extra_big_endian=true
> > ;;
> > +mips*64*-*-*)
> > + targ_obj=mips
> > + targ_machine=EM_MIPS
> > + targ_size=64
> > + targ_big_endian=true
> > + targ_extra_big_endian=false
> > + ;;
> > mips*-*-*)
> > targ_obj=mips
> > targ_machine=EM_MIPS
> > diff --git a/ld/configure.tgt b/ld/configure.tgt
> > index 34c9d67c365..4a71f679e29 100644
> > --- a/ld/configure.tgt
> > +++ b/ld/configure.tgt
> > @@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
> > ;;
> > mips*-*-windiss) targ_emul=elf32mipswindiss
> > ;;
> > -mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
> > +mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
> > + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
> > + targ_extra_libpath=$targ_extra_emuls
> > + ;;
> > +mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
> > targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
> > targ_extra_libpath=$targ_extra_emuls
> > ;;
> > -mips64*-*-linux-*) targ_emul=elf32btsmipn32
> > +mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
> > + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
> > + targ_extra_libpath=$targ_extra_emuls
> > + ;;
> > +mips*64*-*-linux-*) targ_emul=elf32btsmipn32
> > targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
> > targ_extra_libpath=$targ_extra_emuls
> > ;;
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH v3] MIPS: the default output fellows triple
2023-04-03 11:06 ` [PATCH v2] MIPS: the default output fellows triple and with-arch YunQiang Su
2023-04-03 12:40 ` Richard Sandiford
@ 2023-04-14 7:20 ` YunQiang Su
2023-04-18 13:07 ` Richard Sandiford
2023-04-18 14:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
1 sibling, 2 replies; 33+ messages in thread
From: YunQiang Su @ 2023-04-14 7:20 UTC (permalink / raw)
To: binutils; +Cc: syq, macro, xry111, richard.sandiford, jiaxun.yang, YunQiang Su
PR 25494.
1. as fellows the isa level in triple of target
> as xx.s
2. ld fellows the isa level in triple of target
> ld -r -b binary xx.dat -o xx.o
These rules include:
1. *-gnuabi64: will use N64 ABI by default
2. *-img-* (vendor): will use MIPS r6 by default
3. mipsisa32r6*/mipsisa64r6*: will use MIPS r6 by default
---
bfd/config.bfd | 21 +++++++++++++++++--
bfd/elfxx-mips.c | 10 +++++++--
.../binutils-all/mips/mips-note-2-n32.d | 1 +
gas/configure | 14 ++++++++++++-
gas/configure.ac | 14 ++++++++++++-
gold/configure.tgt | 14 +++++++++++++
ld/configure.tgt | 12 +++++++++--
7 files changed, 78 insertions(+), 8 deletions(-)
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 7af481048db..a57105097a8 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -941,11 +941,21 @@ case "${targ}" in
targ_defvec=mips_elf32_be_vec
targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
;;
- mips64*el-*-linux*)
+ mips*64*el-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_le_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
+ want64=true
+ ;;
+ mips*64*-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_be_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
+ want64=true
+ ;;
+ mips*64*el-*-linux*)
targ_defvec=mips_elf32_ntrad_le_vec
targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
;;
- mips64*-*-linux*)
+ mips*64*-*-linux*)
targ_defvec=mips_elf32_ntrad_be_vec
targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
;;
@@ -1525,3 +1535,10 @@ case "${targ_defvec} ${targ_selvecs}" in
targ_archs="$targ_archs bfd_iamcu_arch"
;;
esac
+
+case "${targ}" in
+ mipsisa32r6* | mipsisa64r6* | mips*-img-*)
+ targ_cflags="$targ_cflags -DMIPS_DEFAULT_R6=1"
+ ;;
+esac
+
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 13a89953293..336c32b48ec 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -12327,9 +12327,15 @@ mips_set_isa_flags (bfd *abfd)
{
default:
if (ABI_N32_P (abfd) || ABI_64_P (abfd))
- val = E_MIPS_ARCH_3;
+#ifdef MIPS_DEFAULT_R6
+ val = E_MIPS_ARCH_64R6;
else
- val = E_MIPS_ARCH_1;
+ val = E_MIPS_ARCH_32R6;
+#else
+ val = E_MIPS_ARCH_3;
+ else
+ val = E_MIPS_ARCH_1;
+#endif
break;
case bfd_mach_mips3000:
diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
index c2a581858ed..5e24e7a115e 100644
--- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
+++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
@@ -1,4 +1,5 @@
#PROG: objcopy
+#as: -n32
#readelf: --notes --wide
#objcopy: --merge-notes
#name: MIPS merge notes section (n32)
diff --git a/gas/configure b/gas/configure
index b56836998ef..0daa80d5b4c 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12211,6 +12211,15 @@ _ACEOF
use_e_mips_abi_o32=1
;;
esac
+ # If Vendor is IMG, then MIPSr6 is used
+ case ${target} in
+ mips*64*-img-*)
+ mips_cpu=mips64r6
+ ;;
+ mips*-img-*)
+ mips_cpu=mips32r6
+ ;;
+ esac
# Decide whether to generate 32-bit or 64-bit code by default.
# Used to resolve -march=from-abi when an embedded ABI is selected.
case ${target} in
@@ -12223,7 +12232,10 @@ _ACEOF
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gas/configure.ac b/gas/configure.ac
index 6a68fd7c4e6..2b91f9ec616 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -380,6 +380,15 @@ changequote([,])dnl
use_e_mips_abi_o32=1
;;
esac
+ # If Vendor is IMG, then MIPSr6 is used
+ case ${target} in
+ mips*64*-img-*)
+ mips_cpu=mips64r6
+ ;;
+ mips*-img-*)
+ mips_cpu=mips32r6
+ ;;
+ esac
# Decide whether to generate 32-bit or 64-bit code by default.
# Used to resolve -march=from-abi when an embedded ABI is selected.
case ${target} in
@@ -392,7 +401,10 @@ changequote([,])dnl
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gold/configure.tgt b/gold/configure.tgt
index 4b54e08d27f..ef47ce079f1 100644
--- a/gold/configure.tgt
+++ b/gold/configure.tgt
@@ -153,6 +153,13 @@ aarch64*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*el*-*-*|mips*64*le*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS_RS3_LE
+ targ_size=64
+ targ_big_endian=false
+ targ_extra_big_endian=true
+ ;;
mips*el*-*-*|mips*le*-*-*)
targ_obj=mips
targ_machine=EM_MIPS_RS3_LE
@@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS
+ targ_size=64
+ targ_big_endian=true
+ targ_extra_big_endian=false
+ ;;
mips*-*-*)
targ_obj=mips
targ_machine=EM_MIPS
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 34c9d67c365..4a71f679e29 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
;;
mips*-*-windiss) targ_emul=elf32mipswindiss
;;
-mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
+mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
targ_extra_libpath=$targ_extra_emuls
;;
-mips64*-*-linux-*) targ_emul=elf32btsmipn32
+mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*-*-linux-*) targ_emul=elf32btsmipn32
targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
targ_extra_libpath=$targ_extra_emuls
;;
--
2.30.2
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v3] MIPS: the default output fellows triple
2023-04-14 7:20 ` [PATCH v3] MIPS: the default output fellows triple YunQiang Su
@ 2023-04-18 13:07 ` Richard Sandiford
2023-04-18 14:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
1 sibling, 0 replies; 33+ messages in thread
From: Richard Sandiford @ 2023-04-18 13:07 UTC (permalink / raw)
To: YunQiang Su; +Cc: binutils, syq, macro, xry111, jiaxun.yang
YunQiang Su <yunqiang.su@cipunited.com> writes:
> PR 25494.
>
> 1. as fellows the isa level in triple of target
> > as xx.s
> 2. ld fellows the isa level in triple of target
> > ld -r -b binary xx.dat -o xx.o
>
> These rules include:
> 1. *-gnuabi64: will use N64 ABI by default
> 2. *-img-* (vendor): will use MIPS r6 by default
> 3. mipsisa32r6*/mipsisa64r6*: will use MIPS r6 by default
Sorry to be awkward, but could you split this into two patches:
one that handles gnuabi64 and one that does the r6 thing?
Thanks,
Richard
> ---
> bfd/config.bfd | 21 +++++++++++++++++--
> bfd/elfxx-mips.c | 10 +++++++--
> .../binutils-all/mips/mips-note-2-n32.d | 1 +
> gas/configure | 14 ++++++++++++-
> gas/configure.ac | 14 ++++++++++++-
> gold/configure.tgt | 14 +++++++++++++
> ld/configure.tgt | 12 +++++++++--
> 7 files changed, 78 insertions(+), 8 deletions(-)
>
> diff --git a/bfd/config.bfd b/bfd/config.bfd
> index 7af481048db..a57105097a8 100644
> --- a/bfd/config.bfd
> +++ b/bfd/config.bfd
> @@ -941,11 +941,21 @@ case "${targ}" in
> targ_defvec=mips_elf32_be_vec
> targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
> ;;
> - mips64*el-*-linux*)
> + mips*64*el-*-linux*-gnuabi64)
> + targ_defvec=mips_elf64_trad_le_vec
> + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
> + want64=true
> + ;;
> + mips*64*-*-linux*-gnuabi64)
> + targ_defvec=mips_elf64_trad_be_vec
> + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
> + want64=true
> + ;;
> + mips*64*el-*-linux*)
> targ_defvec=mips_elf32_ntrad_le_vec
> targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
> ;;
> - mips64*-*-linux*)
> + mips*64*-*-linux*)
> targ_defvec=mips_elf32_ntrad_be_vec
> targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
> ;;
> @@ -1525,3 +1535,10 @@ case "${targ_defvec} ${targ_selvecs}" in
> targ_archs="$targ_archs bfd_iamcu_arch"
> ;;
> esac
> +
> +case "${targ}" in
> + mipsisa32r6* | mipsisa64r6* | mips*-img-*)
> + targ_cflags="$targ_cflags -DMIPS_DEFAULT_R6=1"
> + ;;
> +esac
> +
> diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
> index 13a89953293..336c32b48ec 100644
> --- a/bfd/elfxx-mips.c
> +++ b/bfd/elfxx-mips.c
> @@ -12327,9 +12327,15 @@ mips_set_isa_flags (bfd *abfd)
> {
> default:
> if (ABI_N32_P (abfd) || ABI_64_P (abfd))
> - val = E_MIPS_ARCH_3;
> +#ifdef MIPS_DEFAULT_R6
> + val = E_MIPS_ARCH_64R6;
> else
> - val = E_MIPS_ARCH_1;
> + val = E_MIPS_ARCH_32R6;
> +#else
> + val = E_MIPS_ARCH_3;
> + else
> + val = E_MIPS_ARCH_1;
> +#endif
> break;
>
> case bfd_mach_mips3000:
> diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> index c2a581858ed..5e24e7a115e 100644
> --- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> +++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> @@ -1,4 +1,5 @@
> #PROG: objcopy
> +#as: -n32
> #readelf: --notes --wide
> #objcopy: --merge-notes
> #name: MIPS merge notes section (n32)
> diff --git a/gas/configure b/gas/configure
> index b56836998ef..0daa80d5b4c 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -12211,6 +12211,15 @@ _ACEOF
> use_e_mips_abi_o32=1
> ;;
> esac
> + # If Vendor is IMG, then MIPSr6 is used
> + case ${target} in
> + mips*64*-img-*)
> + mips_cpu=mips64r6
> + ;;
> + mips*-img-*)
> + mips_cpu=mips32r6
> + ;;
> + esac
> # Decide whether to generate 32-bit or 64-bit code by default.
> # Used to resolve -march=from-abi when an embedded ABI is selected.
> case ${target} in
> @@ -12223,7 +12232,10 @@ _ACEOF
> esac
> # Decide which ABI to target by default.
> case ${target} in
> - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> + mips*64*-linux-gnuabi64)
> + mips_default_abi=N64_ABI
> + ;;
> + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> mips_default_abi=N32_ABI
> ;;
> diff --git a/gas/configure.ac b/gas/configure.ac
> index 6a68fd7c4e6..2b91f9ec616 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -380,6 +380,15 @@ changequote([,])dnl
> use_e_mips_abi_o32=1
> ;;
> esac
> + # If Vendor is IMG, then MIPSr6 is used
> + case ${target} in
> + mips*64*-img-*)
> + mips_cpu=mips64r6
> + ;;
> + mips*-img-*)
> + mips_cpu=mips32r6
> + ;;
> + esac
> # Decide whether to generate 32-bit or 64-bit code by default.
> # Used to resolve -march=from-abi when an embedded ABI is selected.
> case ${target} in
> @@ -392,7 +401,10 @@ changequote([,])dnl
> esac
> # Decide which ABI to target by default.
> case ${target} in
> - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> + mips*64*-linux-gnuabi64)
> + mips_default_abi=N64_ABI
> + ;;
> + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> mips_default_abi=N32_ABI
> ;;
> diff --git a/gold/configure.tgt b/gold/configure.tgt
> index 4b54e08d27f..ef47ce079f1 100644
> --- a/gold/configure.tgt
> +++ b/gold/configure.tgt
> @@ -153,6 +153,13 @@ aarch64*-*)
> targ_big_endian=false
> targ_extra_big_endian=true
> ;;
> +mips*64*el*-*-*|mips*64*le*-*-*)
> + targ_obj=mips
> + targ_machine=EM_MIPS_RS3_LE
> + targ_size=64
> + targ_big_endian=false
> + targ_extra_big_endian=true
> + ;;
> mips*el*-*-*|mips*le*-*-*)
> targ_obj=mips
> targ_machine=EM_MIPS_RS3_LE
> @@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
> targ_big_endian=false
> targ_extra_big_endian=true
> ;;
> +mips*64*-*-*)
> + targ_obj=mips
> + targ_machine=EM_MIPS
> + targ_size=64
> + targ_big_endian=true
> + targ_extra_big_endian=false
> + ;;
> mips*-*-*)
> targ_obj=mips
> targ_machine=EM_MIPS
> diff --git a/ld/configure.tgt b/ld/configure.tgt
> index 34c9d67c365..4a71f679e29 100644
> --- a/ld/configure.tgt
> +++ b/ld/configure.tgt
> @@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
> ;;
> mips*-*-windiss) targ_emul=elf32mipswindiss
> ;;
> -mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
> +mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
> + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
> + targ_extra_libpath=$targ_extra_emuls
> + ;;
> +mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
> targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
> targ_extra_libpath=$targ_extra_emuls
> ;;
> -mips64*-*-linux-*) targ_emul=elf32btsmipn32
> +mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
> + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
> + targ_extra_libpath=$targ_extra_emuls
> + ;;
> +mips*64*-*-linux-*) targ_emul=elf32btsmipn32
> targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
> targ_extra_libpath=$targ_extra_emuls
> ;;
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-04-14 7:20 ` [PATCH v3] MIPS: the default output fellows triple YunQiang Su
2023-04-18 13:07 ` Richard Sandiford
@ 2023-04-18 14:00 ` YunQiang Su
2023-04-18 14:00 ` [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI Richard Sandiford
1 sibling, 2 replies; 33+ messages in thread
From: YunQiang Su @ 2023-04-18 14:00 UTC (permalink / raw)
To: binutils; +Cc: syq, macro, xry111, richard.sandiford, jiaxun.yang, YunQiang Su
For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
used as the cpu name in triple.
Let's recognize them by `mips*64*(el)`.
For 64bit Ports, like Debian's mips64el and mips64r6el ports,
`gnuabi64` is used as the abi section.
Let's use N64 abi by default for the triple with gnuabi64.
---
bfd/config.bfd | 14 ++++++++++++--
.../testsuite/binutils-all/mips/mips-note-2-n32.d | 1 +
gas/configure | 5 ++++-
gas/configure.ac | 5 ++++-
gold/configure.tgt | 14 ++++++++++++++
ld/configure.tgt | 12 ++++++++++--
6 files changed, 45 insertions(+), 6 deletions(-)
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 7af481048db..1e4bea191dd 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -941,11 +941,21 @@ case "${targ}" in
targ_defvec=mips_elf32_be_vec
targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
;;
- mips64*el-*-linux*)
+ mips*64*el-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_le_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
+ want64=true
+ ;;
+ mips*64*-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_be_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
+ want64=true
+ ;;
+ mips*64*el-*-linux*)
targ_defvec=mips_elf32_ntrad_le_vec
targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
;;
- mips64*-*-linux*)
+ mips*64*-*-linux*)
targ_defvec=mips_elf32_ntrad_be_vec
targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
;;
diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
index c2a581858ed..5e24e7a115e 100644
--- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
+++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
@@ -1,4 +1,5 @@
#PROG: objcopy
+#as: -n32
#readelf: --notes --wide
#objcopy: --merge-notes
#name: MIPS merge notes section (n32)
diff --git a/gas/configure b/gas/configure
index b56836998ef..868f4a911a9 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12223,7 +12223,10 @@ _ACEOF
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gas/configure.ac b/gas/configure.ac
index 6a68fd7c4e6..03728ffce4d 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -392,7 +392,10 @@ changequote([,])dnl
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gold/configure.tgt b/gold/configure.tgt
index 4b54e08d27f..ef47ce079f1 100644
--- a/gold/configure.tgt
+++ b/gold/configure.tgt
@@ -153,6 +153,13 @@ aarch64*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*el*-*-*|mips*64*le*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS_RS3_LE
+ targ_size=64
+ targ_big_endian=false
+ targ_extra_big_endian=true
+ ;;
mips*el*-*-*|mips*le*-*-*)
targ_obj=mips
targ_machine=EM_MIPS_RS3_LE
@@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS
+ targ_size=64
+ targ_big_endian=true
+ targ_extra_big_endian=false
+ ;;
mips*-*-*)
targ_obj=mips
targ_machine=EM_MIPS
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 34c9d67c365..4a71f679e29 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
;;
mips*-*-windiss) targ_emul=elf32mipswindiss
;;
-mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
+mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
targ_extra_libpath=$targ_extra_emuls
;;
-mips64*-*-linux-*) targ_emul=elf32btsmipn32
+mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*-*-linux-*) targ_emul=elf32btsmipn32
targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
targ_extra_libpath=$targ_extra_emuls
;;
--
2.30.2
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6
2023-04-18 14:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
@ 2023-04-18 14:00 ` YunQiang Su
2023-04-19 19:03 ` Richard Sandiford
2023-04-20 13:31 ` [PATCH v5 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-19 19:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI Richard Sandiford
1 sibling, 2 replies; 33+ messages in thread
From: YunQiang Su @ 2023-04-18 14:00 UTC (permalink / raw)
To: binutils; +Cc: syq, macro, xry111, richard.sandiford, jiaxun.yang, YunQiang Su
If the triple is mipsisa32r6* or mipsisa64r6*, ld/as should output
r6 objects by default.
The triples with vendor `img` should do same.
The examples include:
as xx.s -o xx.o
ld -r -b binary xx.dat -o xx.o
---
bfd/config.bfd | 6 ++++++
bfd/elfxx-mips.c | 6 ++++++
gas/configure | 9 +++++++++
gas/configure.ac | 9 +++++++++
4 files changed, 30 insertions(+)
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 1e4bea191dd..78752994456 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1535,3 +1535,9 @@ case "${targ_defvec} ${targ_selvecs}" in
targ_archs="$targ_archs bfd_iamcu_arch"
;;
esac
+
+case "${targ}" in
+ mipsisa32r6* | mipsisa64r6* | mips*-img-*)
+ targ_cflags="$targ_cflags -DMIPS_DEFAULT_R6=1"
+ ;;
+esac
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 13a89953293..0b0ea11bfb5 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -12327,9 +12327,15 @@ mips_set_isa_flags (bfd *abfd)
{
default:
if (ABI_N32_P (abfd) || ABI_64_P (abfd))
+#ifdef MIPS_DEFAULT_R6
+ val = E_MIPS_ARCH_64R6;
+ else
+ val = E_MIPS_ARCH_32R6;
+#else
val = E_MIPS_ARCH_3;
else
val = E_MIPS_ARCH_1;
+#endif
break;
case bfd_mach_mips3000:
diff --git a/gas/configure b/gas/configure
index 868f4a911a9..0daa80d5b4c 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12211,6 +12211,15 @@ _ACEOF
use_e_mips_abi_o32=1
;;
esac
+ # If Vendor is IMG, then MIPSr6 is used
+ case ${target} in
+ mips*64*-img-*)
+ mips_cpu=mips64r6
+ ;;
+ mips*-img-*)
+ mips_cpu=mips32r6
+ ;;
+ esac
# Decide whether to generate 32-bit or 64-bit code by default.
# Used to resolve -march=from-abi when an embedded ABI is selected.
case ${target} in
diff --git a/gas/configure.ac b/gas/configure.ac
index 03728ffce4d..2b91f9ec616 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -380,6 +380,15 @@ changequote([,])dnl
use_e_mips_abi_o32=1
;;
esac
+ # If Vendor is IMG, then MIPSr6 is used
+ case ${target} in
+ mips*64*-img-*)
+ mips_cpu=mips64r6
+ ;;
+ mips*-img-*)
+ mips_cpu=mips32r6
+ ;;
+ esac
# Decide whether to generate 32-bit or 64-bit code by default.
# Used to resolve -march=from-abi when an embedded ABI is selected.
case ${target} in
--
2.30.2
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-04-18 14:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-18 14:00 ` [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
@ 2023-04-19 19:00 ` Richard Sandiford
2023-07-21 10:00 ` Maciej W. Rozycki
1 sibling, 1 reply; 33+ messages in thread
From: Richard Sandiford @ 2023-04-19 19:00 UTC (permalink / raw)
To: YunQiang Su; +Cc: binutils, syq, macro, xry111, jiaxun.yang
YunQiang Su <yunqiang.su@cipunited.com> writes:
> For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
> used as the cpu name in triple.
> Let's recognize them by `mips*64*(el)`.
>
> For 64bit Ports, like Debian's mips64el and mips64r6el ports,
> `gnuabi64` is used as the abi section.
> Let's use N64 abi by default for the triple with gnuabi64.
> ---
> bfd/config.bfd | 14 ++++++++++++--
> .../testsuite/binutils-all/mips/mips-note-2-n32.d | 1 +
> gas/configure | 5 ++++-
> gas/configure.ac | 5 ++++-
> gold/configure.tgt | 14 ++++++++++++++
> ld/configure.tgt | 12 ++++++++++--
> 6 files changed, 45 insertions(+), 6 deletions(-)
OK, thanks.
Please send a message to admin-requests@ to extend your write access
to binutils-gdb (cc:ing me).
Richard
> diff --git a/bfd/config.bfd b/bfd/config.bfd
> index 7af481048db..1e4bea191dd 100644
> --- a/bfd/config.bfd
> +++ b/bfd/config.bfd
> @@ -941,11 +941,21 @@ case "${targ}" in
> targ_defvec=mips_elf32_be_vec
> targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
> ;;
> - mips64*el-*-linux*)
> + mips*64*el-*-linux*-gnuabi64)
> + targ_defvec=mips_elf64_trad_le_vec
> + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
> + want64=true
> + ;;
> + mips*64*-*-linux*-gnuabi64)
> + targ_defvec=mips_elf64_trad_be_vec
> + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
> + want64=true
> + ;;
> + mips*64*el-*-linux*)
> targ_defvec=mips_elf32_ntrad_le_vec
> targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
> ;;
> - mips64*-*-linux*)
> + mips*64*-*-linux*)
> targ_defvec=mips_elf32_ntrad_be_vec
> targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
> ;;
> diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> index c2a581858ed..5e24e7a115e 100644
> --- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> +++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
> @@ -1,4 +1,5 @@
> #PROG: objcopy
> +#as: -n32
> #readelf: --notes --wide
> #objcopy: --merge-notes
> #name: MIPS merge notes section (n32)
> diff --git a/gas/configure b/gas/configure
> index b56836998ef..868f4a911a9 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -12223,7 +12223,10 @@ _ACEOF
> esac
> # Decide which ABI to target by default.
> case ${target} in
> - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> + mips*64*-linux-gnuabi64)
> + mips_default_abi=N64_ABI
> + ;;
> + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> mips_default_abi=N32_ABI
> ;;
> diff --git a/gas/configure.ac b/gas/configure.ac
> index 6a68fd7c4e6..03728ffce4d 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -392,7 +392,10 @@ changequote([,])dnl
> esac
> # Decide which ABI to target by default.
> case ${target} in
> - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> + mips*64*-linux-gnuabi64)
> + mips_default_abi=N64_ABI
> + ;;
> + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
> | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
> mips_default_abi=N32_ABI
> ;;
> diff --git a/gold/configure.tgt b/gold/configure.tgt
> index 4b54e08d27f..ef47ce079f1 100644
> --- a/gold/configure.tgt
> +++ b/gold/configure.tgt
> @@ -153,6 +153,13 @@ aarch64*-*)
> targ_big_endian=false
> targ_extra_big_endian=true
> ;;
> +mips*64*el*-*-*|mips*64*le*-*-*)
> + targ_obj=mips
> + targ_machine=EM_MIPS_RS3_LE
> + targ_size=64
> + targ_big_endian=false
> + targ_extra_big_endian=true
> + ;;
> mips*el*-*-*|mips*le*-*-*)
> targ_obj=mips
> targ_machine=EM_MIPS_RS3_LE
> @@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
> targ_big_endian=false
> targ_extra_big_endian=true
> ;;
> +mips*64*-*-*)
> + targ_obj=mips
> + targ_machine=EM_MIPS
> + targ_size=64
> + targ_big_endian=true
> + targ_extra_big_endian=false
> + ;;
> mips*-*-*)
> targ_obj=mips
> targ_machine=EM_MIPS
> diff --git a/ld/configure.tgt b/ld/configure.tgt
> index 34c9d67c365..4a71f679e29 100644
> --- a/ld/configure.tgt
> +++ b/ld/configure.tgt
> @@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
> ;;
> mips*-*-windiss) targ_emul=elf32mipswindiss
> ;;
> -mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
> +mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
> + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
> + targ_extra_libpath=$targ_extra_emuls
> + ;;
> +mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
> targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
> targ_extra_libpath=$targ_extra_emuls
> ;;
> -mips64*-*-linux-*) targ_emul=elf32btsmipn32
> +mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
> + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
> + targ_extra_libpath=$targ_extra_emuls
> + ;;
> +mips*64*-*-linux-*) targ_emul=elf32btsmipn32
> targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
> targ_extra_libpath=$targ_extra_emuls
> ;;
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6
2023-04-18 14:00 ` [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
@ 2023-04-19 19:03 ` Richard Sandiford
2023-04-20 13:31 ` [PATCH v5 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
1 sibling, 0 replies; 33+ messages in thread
From: Richard Sandiford @ 2023-04-19 19:03 UTC (permalink / raw)
To: YunQiang Su; +Cc: binutils, syq, macro, xry111, jiaxun.yang
YunQiang Su <yunqiang.su@cipunited.com> writes:
> If the triple is mipsisa32r6* or mipsisa64r6*, ld/as should output
> r6 objects by default.
> The triples with vendor `img` should do same.
>
> The examples include:
> as xx.s -o xx.o
> ld -r -b binary xx.dat -o xx.o
> ---
> bfd/config.bfd | 6 ++++++
> bfd/elfxx-mips.c | 6 ++++++
> gas/configure | 9 +++++++++
> gas/configure.ac | 9 +++++++++
> 4 files changed, 30 insertions(+)
>
> diff --git a/bfd/config.bfd b/bfd/config.bfd
> index 1e4bea191dd..78752994456 100644
> --- a/bfd/config.bfd
> +++ b/bfd/config.bfd
> @@ -1535,3 +1535,9 @@ case "${targ_defvec} ${targ_selvecs}" in
> targ_archs="$targ_archs bfd_iamcu_arch"
> ;;
> esac
> +
> +case "${targ}" in
> + mipsisa32r6* | mipsisa64r6* | mips*-img-*)
> + targ_cflags="$targ_cflags -DMIPS_DEFAULT_R6=1"
> + ;;
> +esac
> diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
> index 13a89953293..0b0ea11bfb5 100644
> --- a/bfd/elfxx-mips.c
> +++ b/bfd/elfxx-mips.c
> @@ -12327,9 +12327,15 @@ mips_set_isa_flags (bfd *abfd)
> {
> default:
> if (ABI_N32_P (abfd) || ABI_64_P (abfd))
> +#ifdef MIPS_DEFAULT_R6
> + val = E_MIPS_ARCH_64R6;
> + else
> + val = E_MIPS_ARCH_32R6;
> +#else
> val = E_MIPS_ARCH_3;
> else
> val = E_MIPS_ARCH_1;
> +#endif
> break;
IMO it'd be better to stick:
#ifndef MIPS_DEFAULT_R6
#define MIPS_DEFAULT_R6 0
#endif
after the #includes and use:
val = MIPS_DEFAULT_R6 ? E_MIPS_ARCH_64R6 : E_MIPS_ARCH_3;
etc. OK with that change, thanks.
Richard
> case bfd_mach_mips3000:
> diff --git a/gas/configure b/gas/configure
> index 868f4a911a9..0daa80d5b4c 100755
> --- a/gas/configure
> +++ b/gas/configure
> @@ -12211,6 +12211,15 @@ _ACEOF
> use_e_mips_abi_o32=1
> ;;
> esac
> + # If Vendor is IMG, then MIPSr6 is used
> + case ${target} in
> + mips*64*-img-*)
> + mips_cpu=mips64r6
> + ;;
> + mips*-img-*)
> + mips_cpu=mips32r6
> + ;;
> + esac
> # Decide whether to generate 32-bit or 64-bit code by default.
> # Used to resolve -march=from-abi when an embedded ABI is selected.
> case ${target} in
> diff --git a/gas/configure.ac b/gas/configure.ac
> index 03728ffce4d..2b91f9ec616 100644
> --- a/gas/configure.ac
> +++ b/gas/configure.ac
> @@ -380,6 +380,15 @@ changequote([,])dnl
> use_e_mips_abi_o32=1
> ;;
> esac
> + # If Vendor is IMG, then MIPSr6 is used
> + case ${target} in
> + mips*64*-img-*)
> + mips_cpu=mips64r6
> + ;;
> + mips*-img-*)
> + mips_cpu=mips32r6
> + ;;
> + esac
> # Decide whether to generate 32-bit or 64-bit code by default.
> # Used to resolve -march=from-abi when an embedded ABI is selected.
> case ${target} in
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH v5 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-04-18 14:00 ` [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:03 ` Richard Sandiford
@ 2023-04-20 13:31 ` YunQiang Su
2023-04-20 13:31 ` [PATCH v5 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
1 sibling, 1 reply; 33+ messages in thread
From: YunQiang Su @ 2023-04-20 13:31 UTC (permalink / raw)
To: binutils; +Cc: syq, macro, xry111, richard.sandiford, jiaxun.yang, YunQiang Su
For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
used as the cpu name in triple.
Let's recognize them by `mips*64*(el)`.
For 64bit Ports, like Debian's mips64el and mips64r6el ports,
`gnuabi64` is used as the abi section.
Let's use N64 abi by default for the triple with gnuabi64.
---
bfd/config.bfd | 14 ++++++++++++--
.../testsuite/binutils-all/mips/mips-note-2-n32.d | 1 +
gas/configure | 5 ++++-
gas/configure.ac | 5 ++++-
gold/configure.tgt | 14 ++++++++++++++
ld/configure.tgt | 12 ++++++++++--
6 files changed, 45 insertions(+), 6 deletions(-)
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 7af481048db..1e4bea191dd 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -941,11 +941,21 @@ case "${targ}" in
targ_defvec=mips_elf32_be_vec
targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
;;
- mips64*el-*-linux*)
+ mips*64*el-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_le_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec"
+ want64=true
+ ;;
+ mips*64*-*-linux*-gnuabi64)
+ targ_defvec=mips_elf64_trad_be_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
+ want64=true
+ ;;
+ mips*64*el-*-linux*)
targ_defvec=mips_elf32_ntrad_le_vec
targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
;;
- mips64*-*-linux*)
+ mips*64*-*-linux*)
targ_defvec=mips_elf32_ntrad_be_vec
targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
;;
diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
index c2a581858ed..5e24e7a115e 100644
--- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
+++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d
@@ -1,4 +1,5 @@
#PROG: objcopy
+#as: -n32
#readelf: --notes --wide
#objcopy: --merge-notes
#name: MIPS merge notes section (n32)
diff --git a/gas/configure b/gas/configure
index b56836998ef..868f4a911a9 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12223,7 +12223,10 @@ _ACEOF
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gas/configure.ac b/gas/configure.ac
index 6a68fd7c4e6..03728ffce4d 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -392,7 +392,10 @@ changequote([,])dnl
esac
# Decide which ABI to target by default.
case ${target} in
- mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
+ mips*64*-linux-gnuabi64)
+ mips_default_abi=N64_ABI
+ ;;
+ mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \
| mips64*-kfreebsd*-gnu | mips64*-ps2-elf*)
mips_default_abi=N32_ABI
;;
diff --git a/gold/configure.tgt b/gold/configure.tgt
index 4b54e08d27f..ef47ce079f1 100644
--- a/gold/configure.tgt
+++ b/gold/configure.tgt
@@ -153,6 +153,13 @@ aarch64*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*el*-*-*|mips*64*le*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS_RS3_LE
+ targ_size=64
+ targ_big_endian=false
+ targ_extra_big_endian=true
+ ;;
mips*el*-*-*|mips*le*-*-*)
targ_obj=mips
targ_machine=EM_MIPS_RS3_LE
@@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*)
targ_big_endian=false
targ_extra_big_endian=true
;;
+mips*64*-*-*)
+ targ_obj=mips
+ targ_machine=EM_MIPS
+ targ_size=64
+ targ_big_endian=true
+ targ_extra_big_endian=false
+ ;;
mips*-*-*)
targ_obj=mips
targ_machine=EM_MIPS
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 34c9d67c365..4a71f679e29 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks
;;
mips*-*-windiss) targ_emul=elf32mipswindiss
;;
-mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
+mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32
targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
targ_extra_libpath=$targ_extra_emuls
;;
-mips64*-*-linux-*) targ_emul=elf32btsmipn32
+mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
+ targ_extra_libpath=$targ_extra_emuls
+ ;;
+mips*64*-*-linux-*) targ_emul=elf32btsmipn32
targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
targ_extra_libpath=$targ_extra_emuls
;;
--
2.30.2
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH v5 2/2] MIPS: default output r6 obj if the triple is r6
2023-04-20 13:31 ` [PATCH v5 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
@ 2023-04-20 13:31 ` YunQiang Su
0 siblings, 0 replies; 33+ messages in thread
From: YunQiang Su @ 2023-04-20 13:31 UTC (permalink / raw)
To: binutils; +Cc: syq, macro, xry111, richard.sandiford, jiaxun.yang, YunQiang Su
If the triple is mipsisa32r6* or mipsisa64r6*, ld/as should output
r6 objects by default.
The triples with vendor `img` should do same.
The examples include:
as xx.s -o xx.o
ld -r -b binary xx.dat -o xx.o
---
bfd/config.bfd | 6 ++++++
bfd/elfxx-mips.c | 4 ++--
bfd/elfxx-mips.h | 4 ++++
gas/configure | 9 +++++++++
gas/configure.ac | 9 +++++++++
5 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 1e4bea191dd..78752994456 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1535,3 +1535,9 @@ case "${targ_defvec} ${targ_selvecs}" in
targ_archs="$targ_archs bfd_iamcu_arch"
;;
esac
+
+case "${targ}" in
+ mipsisa32r6* | mipsisa64r6* | mips*-img-*)
+ targ_cflags="$targ_cflags -DMIPS_DEFAULT_R6=1"
+ ;;
+esac
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 13a89953293..c9cd2f8099f 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -12327,9 +12327,9 @@ mips_set_isa_flags (bfd *abfd)
{
default:
if (ABI_N32_P (abfd) || ABI_64_P (abfd))
- val = E_MIPS_ARCH_3;
+ val = MIPS_DEFAULT_R6 ? E_MIPS_ARCH_64R6 : E_MIPS_ARCH_3;
else
- val = E_MIPS_ARCH_1;
+ val = MIPS_DEFAULT_R6 ? E_MIPS_ARCH_32R6 : E_MIPS_ARCH_1;
break;
case bfd_mach_mips3000:
diff --git a/bfd/elfxx-mips.h b/bfd/elfxx-mips.h
index 4addf6f5d1a..f15dceac48e 100644
--- a/bfd/elfxx-mips.h
+++ b/bfd/elfxx-mips.h
@@ -29,6 +29,10 @@ enum reloc_check
check_shuffle
};
+#ifndef MIPS_DEFAULT_R6
+#define MIPS_DEFAULT_R6 0
+#endif
+
extern bool _bfd_mips_elf_mkobject
(bfd *);
extern bool _bfd_mips_elf_close_and_cleanup
diff --git a/gas/configure b/gas/configure
index 868f4a911a9..0daa80d5b4c 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12211,6 +12211,15 @@ _ACEOF
use_e_mips_abi_o32=1
;;
esac
+ # If Vendor is IMG, then MIPSr6 is used
+ case ${target} in
+ mips*64*-img-*)
+ mips_cpu=mips64r6
+ ;;
+ mips*-img-*)
+ mips_cpu=mips32r6
+ ;;
+ esac
# Decide whether to generate 32-bit or 64-bit code by default.
# Used to resolve -march=from-abi when an embedded ABI is selected.
case ${target} in
diff --git a/gas/configure.ac b/gas/configure.ac
index 03728ffce4d..2b91f9ec616 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -380,6 +380,15 @@ changequote([,])dnl
use_e_mips_abi_o32=1
;;
esac
+ # If Vendor is IMG, then MIPSr6 is used
+ case ${target} in
+ mips*64*-img-*)
+ mips_cpu=mips64r6
+ ;;
+ mips*-img-*)
+ mips_cpu=mips32r6
+ ;;
+ esac
# Decide whether to generate 32-bit or 64-bit code by default.
# Used to resolve -march=from-abi when an embedded ABI is selected.
case ${target} in
--
2.30.2
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-04-19 19:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI Richard Sandiford
@ 2023-07-21 10:00 ` Maciej W. Rozycki
2023-07-21 10:14 ` YunQiang Su
0 siblings, 1 reply; 33+ messages in thread
From: Maciej W. Rozycki @ 2023-07-21 10:00 UTC (permalink / raw)
To: Richard Sandiford, Nick Clifton
Cc: YunQiang Su, binutils, syq, xry111, jiaxun.yang
Nick, please hold on with 2.41 until this incompatible ABI change has been
sorted.
On Wed, 19 Apr 2023, Richard Sandiford wrote:
> > For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
> > used as the cpu name in triple.
> > Let's recognize them by `mips*64*(el)`.
> >
> > For 64bit Ports, like Debian's mips64el and mips64r6el ports,
> > `gnuabi64` is used as the abi section.
> > Let's use N64 abi by default for the triple with gnuabi64.
> > ---
> > bfd/config.bfd | 14 ++++++++++++--
> > .../testsuite/binutils-all/mips/mips-note-2-n32.d | 1 +
> > gas/configure | 5 ++++-
> > gas/configure.ac | 5 ++++-
> > gold/configure.tgt | 14 ++++++++++++++
> > ld/configure.tgt | 12 ++++++++++--
> > 6 files changed, 45 insertions(+), 6 deletions(-)
>
> OK, thanks.
So this has changed the default ABI from o32 to n32 for `mipsisa64-*-*'
targets and the like, which I only realised by getting odd results from an
attempt to make a test case for another change of YunQiang's I have begun
reviewing now.
I can't find this rather significant and incompatible change of semantics
mentioned anywhere in the trail of messages associated with this patch
submission, let alone the change description. Have you been aware of it
and acked the change regardless, or has it slipped through?
It seems to me such a major change, even if actually approved, should be
rather prominently mentioned in the change description with rationale
given, and made on its own rather than with other modifications.
NB I'm stuck with the other review until this has been sorted and may
have to revert this change too, as I have the other change ready to commit
except for conflicting test results. Also we need to be careful not to
let this get downstream with 2.41 unless we're very, very sure it is the
right change to make.
Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 10:00 ` Maciej W. Rozycki
@ 2023-07-21 10:14 ` YunQiang Su
2023-07-21 11:54 ` Maciej W. Rozycki
0 siblings, 1 reply; 33+ messages in thread
From: YunQiang Su @ 2023-07-21 10:14 UTC (permalink / raw)
To: Maciej W. Rozycki
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang
Maciej W. Rozycki <macro@orcam.me.uk> 于2023年7月21日周五 18:01写道：
>
> Nick, please hold on with 2.41 until this incompatible ABI change has been
> sorted.
>
> On Wed, 19 Apr 2023, Richard Sandiford wrote:
>
> > > For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
> > > used as the cpu name in triple.
> > > Let's recognize them by `mips*64*(el)`.
> > >
> > > For 64bit Ports, like Debian's mips64el and mips64r6el ports,
> > > `gnuabi64` is used as the abi section.
> > > Let's use N64 abi by default for the triple with gnuabi64.
> > > ---
> > > bfd/config.bfd | 14 ++++++++++++--
> > > .../testsuite/binutils-all/mips/mips-note-2-n32.d | 1 +
> > > gas/configure | 5 ++++-
> > > gas/configure.ac | 5 ++++-
> > > gold/configure.tgt | 14 ++++++++++++++
> > > ld/configure.tgt | 12 ++++++++++--
> > > 6 files changed, 45 insertions(+), 6 deletions(-)
> >
> > OK, thanks.
>
> So this has changed the default ABI from o32 to n32 for `mipsisa64-*-*'
I think that maybe you have a misunderstanding.
1. It is *not* for `mipsisa64-*-*', it is for `mipsisa64-*-gnuabi64'
2. It is not from O32 to N32. It is from N32 to N64.
> targets and the like, which I only realised by getting odd results from an
> attempt to make a test case for another change of YunQiang's I have begun
> reviewing now.
>
> I can't find this rather significant and incompatible change of semantics
> mentioned anywhere in the trail of messages associated with this patch
> submission, let alone the change description. Have you been aware of it
> and acked the change regardless, or has it slipped through?
>
> It seems to me such a major change, even if actually approved, should be
> rather prominently mentioned in the change description with rationale
> given, and made on its own rather than with other modifications.
>
> NB I'm stuck with the other review until this has been sorted and may
> have to revert this change too, as I have the other change ready to commit
> except for conflicting test results. Also we need to be careful not to
> let this get downstream with 2.41 unless we're very, very sure it is the
> right change to make.
>
> Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 10:14 ` YunQiang Su
@ 2023-07-21 11:54 ` Maciej W. Rozycki
2023-07-21 12:30 ` YunQiang Su
0 siblings, 1 reply; 33+ messages in thread
From: Maciej W. Rozycki @ 2023-07-21 11:54 UTC (permalink / raw)
To: YunQiang Su
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang
On Fri, 21 Jul 2023, YunQiang Su wrote:
> Maciej W. Rozycki <macro@orcam.me.uk> 于2023年7月21日周五 18:01写道：
> >
> > Nick, please hold on with 2.41 until this incompatible ABI change has been
> > sorted.
> >
> > On Wed, 19 Apr 2023, Richard Sandiford wrote:
> >
> > > > For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
> > > > used as the cpu name in triple.
> > > > Let's recognize them by `mips*64*(el)`.
> > > >
> > > > For 64bit Ports, like Debian's mips64el and mips64r6el ports,
> > > > `gnuabi64` is used as the abi section.
> > > > Let's use N64 abi by default for the triple with gnuabi64.
> > > > ---
> > > > bfd/config.bfd | 14 ++++++++++++--
> > > > .../testsuite/binutils-all/mips/mips-note-2-n32.d | 1 +
> > > > gas/configure | 5 ++++-
> > > > gas/configure.ac | 5 ++++-
> > > > gold/configure.tgt | 14 ++++++++++++++
> > > > ld/configure.tgt | 12 ++++++++++--
> > > > 6 files changed, 45 insertions(+), 6 deletions(-)
> > >
> > > OK, thanks.
> >
> > So this has changed the default ABI from o32 to n32 for `mipsisa64-*-*'
>
> I think that maybe you have a misunderstanding.
> 1. It is *not* for `mipsisa64-*-*', it is for `mipsisa64-*-gnuabi64'
> 2. It is not from O32 to N32. It is from N32 to N64.
Well test results say otherwise. Please build yourself binutils for
`mipsisa64-linux' and see what output format it uses with and without this
change.
I have:
$ mipsisa64-linux/gas/as-new /dev/null -o null.o
$ file null.o
null.o: ELF 32-bit MSB relocatable, MIPS, MIPS64 version 1 (SYSV), not stripped
$ mipsisa64-linux/ld/ld-new -e 0 null.o -o null
$ file null
null: ELF 32-bit MSB executable, MIPS, MIPS64 version 1 (SYSV), statically linked, not stripped
$
as at commit 32f1c80375eb^, and:
$ mipsisa64-linux/gas/as-new /dev/null -o null.o
$ file null.o
null.o: ELF 32-bit MSB relocatable, MIPS, MIPS64 version 1 (SYSV), not stripped
$ mipsisa64-linux/ld/ld-new -e 0 null.o -o null
mipsisa64-linux/ld/ld-new: null.o: ABI is incompatible with that of the selected emulation
mipsisa64-linux/ld/ld-new: failed to merge target specific data of file null.o
$
as from commit 32f1c80375eb. The default format used by LD is now not the
same as one produced by GAS.
Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 11:54 ` Maciej W. Rozycki
@ 2023-07-21 12:30 ` YunQiang Su
2023-07-21 14:30 ` Maciej W. Rozycki
2023-07-25 17:41 ` Andreas K. Huettel
0 siblings, 2 replies; 33+ messages in thread
From: YunQiang Su @ 2023-07-21 12:30 UTC (permalink / raw)
To: Maciej W. Rozycki
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang
Maciej W. Rozycki <macro@orcam.me.uk> 于2023年7月21日周五 19:54写道：
>
> On Fri, 21 Jul 2023, YunQiang Su wrote:
>
> > Maciej W. Rozycki <macro@orcam.me.uk> 于2023年7月21日周五 18:01写道：
> > >
> > > Nick, please hold on with 2.41 until this incompatible ABI change has been
> > > sorted.
> > >
> > > On Wed, 19 Apr 2023, Richard Sandiford wrote:
> > >
> > > > > For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
> > > > > used as the cpu name in triple.
> > > > > Let's recognize them by `mips*64*(el)`.
> > > > >
> > > > > For 64bit Ports, like Debian's mips64el and mips64r6el ports,
> > > > > `gnuabi64` is used as the abi section.
> > > > > Let's use N64 abi by default for the triple with gnuabi64.
> > > > > ---
> > > > > bfd/config.bfd | 14 ++++++++++++--
> > > > > .../testsuite/binutils-all/mips/mips-note-2-n32.d | 1 +
> > > > > gas/configure | 5 ++++-
> > > > > gas/configure.ac | 5 ++++-
> > > > > gold/configure.tgt | 14 ++++++++++++++
> > > > > ld/configure.tgt | 12 ++++++++++--
> > > > > 6 files changed, 45 insertions(+), 6 deletions(-)
> > > >
> > > > OK, thanks.
> > >
> > > So this has changed the default ABI from o32 to n32 for `mipsisa64-*-*'
> >
> > I think that maybe you have a misunderstanding.
> > 1. It is *not* for `mipsisa64-*-*', it is for `mipsisa64-*-gnuabi64'
> > 2. It is not from O32 to N32. It is from N32 to N64.
>
> Well test results say otherwise. Please build yourself binutils for
> `mipsisa64-linux' and see what output format it uses with and without this
> change.
>
Ohh you are right, while, does mips*-linux without ABI section really matter?
I never hear about it is used for any real system.
> I have:
>
> $ mipsisa64-linux/gas/as-new /dev/null -o null.o
> $ file null.o
> null.o: ELF 32-bit MSB relocatable, MIPS, MIPS64 version 1 (SYSV), not stripped
I cannot reproduce it. My test result is:
null.o: ELF 32-bit MSB relocatable, MIPS, N32 MIPS64 version 1 (SYSV),
not stripped
^^
> $ mipsisa64-linux/ld/ld-new -e 0 null.o -o null
> $ file null
> null: ELF 32-bit MSB executable, MIPS, MIPS64 version 1 (SYSV), statically linked, not stripped
> $
>
> as at commit 32f1c80375eb^, and:
>
> $ mipsisa64-linux/gas/as-new /dev/null -o null.o
> $ file null.o
> null.o: ELF 32-bit MSB relocatable, MIPS, MIPS64 version 1 (SYSV), not stripped
> $ mipsisa64-linux/ld/ld-new -e 0 null.o -o null
> mipsisa64-linux/ld/ld-new: null.o: ABI is incompatible with that of the selected emulation
> mipsisa64-linux/ld/ld-new: failed to merge target specific data of file null.o
> $
>
> as from commit 32f1c80375eb. The default format used by LD is now not the
> same as one produced by GAS.
>
Yes. we should keep them sync. Since it has CPU `mipsisa64*`, so, I
think that we should
use N32 or N64.
Ohh, yes, my patch switch the default output of mips*isa64-linux to
N32 from O32.
I believe that it is an correct modification.
> Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 12:30 ` YunQiang Su
@ 2023-07-21 14:30 ` Maciej W. Rozycki
2023-07-21 15:01 ` YunQiang Su
2023-07-25 17:47 ` Andreas K. Huettel
2023-07-25 17:41 ` Andreas K. Huettel
1 sibling, 2 replies; 33+ messages in thread
From: Maciej W. Rozycki @ 2023-07-21 14:30 UTC (permalink / raw)
To: YunQiang Su
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang
On Fri, 21 Jul 2023, YunQiang Su wrote:
> > > > So this has changed the default ABI from o32 to n32 for `mipsisa64-*-*'
> > >
> > > I think that maybe you have a misunderstanding.
> > > 1. It is *not* for `mipsisa64-*-*', it is for `mipsisa64-*-gnuabi64'
> > > 2. It is not from O32 to N32. It is from N32 to N64.
> >
> > Well test results say otherwise. Please build yourself binutils for
> > `mipsisa64-linux' and see what output format it uses with and without this
> > change.
>
> Ohh you are right, while, does mips*-linux without ABI section really matter?
> I never hear about it is used for any real system.
You may not have heard about it, but someone has added these machine
specifiers for a reason and I reckon seeing at least `mipsisa64-*-*' ones
used at one point, maybe at MTI back in ~2005. Here the "isa64" suffix
only specifies the ISA level (just as with "isa32", etc.) and not the ABI
such as with the "64" suffix.
It may have even been before we had NewABI support in the first place, so
the semantics for `mipsisa64-*-*' had to stay for backwards compatibility
already back then. And I do remember the days and the issues around
merging NewABI stuff; if MTI weren't so slow with defining it, we could
have ended up with NUBI instead rather than this old IRIX stuff, not
necessarily adequate for embedded use and with its sole advantage that it
was already well-defined then, so the community took lead and merged
NewABI support behind MTI's back.
> Ohh, yes, my patch switch the default output of mips*isa64-linux to
> N32 from O32.
> I believe that it is an correct modification.
Maybe, but this is changing what we've had for 20+ years, so it must not
be done without proper consideration, documentation, and likely a NEWS
entry, as this is a user-visible change of semantics. You can't just
decide unilaterally, especially on something that's been out there for
such a long time.
I think this close to 2.41 release the best course of action may be
reverting the change after all on trunk/2.41, and then re-applying the
uncontroversial part on trunk only. This will prevent Nick from being
held with the release and we can decide what to do with the rest. It
would unblock me with accepting your outstanding bug fix as well, also for
2.41.
And I wonder if there's more that needs to be undone for 2.41, so that it
can be then handled properly with 2.42, especially given the large
quantity of regressions introduced, which may not necessarily be solely
due to the lack of update to the testsuite and could be a sign of actual
problems introduced with the tools themselves. I'd prefer to have
results with 2.41 that are no worse than as at 32f1c80375eb^ TBH.
Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 14:30 ` Maciej W. Rozycki
@ 2023-07-21 15:01 ` YunQiang Su
2023-07-22 7:18 ` Xi Ruoyao
2023-07-31 10:05 ` Maciej W. Rozycki
2023-07-25 17:47 ` Andreas K. Huettel
1 sibling, 2 replies; 33+ messages in thread
From: YunQiang Su @ 2023-07-21 15:01 UTC (permalink / raw)
To: Maciej W. Rozycki
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang
Debian, as a *REAL* OS, instead of anything you are imagining, is *USING* it.
I don't agree that you make any "features" heavenly.
If so, we cannot fix any bug.
More and more software in the *REAL* world, use the CPU section (here mipsisa64)
to determine the 64bit OS/env.
Anyway, the *REAL* world is much more important the the world only in
your *MIND*.
Maciej W. Rozycki <macro@orcam.me.uk> 于2023年7月21日周五 22:31写道：
>
> On Fri, 21 Jul 2023, YunQiang Su wrote:
>
> > > > > So this has changed the default ABI from o32 to n32 for `mipsisa64-*-*'
> > > >
> > > > I think that maybe you have a misunderstanding.
> > > > 1. It is *not* for `mipsisa64-*-*', it is for `mipsisa64-*-gnuabi64'
> > > > 2. It is not from O32 to N32. It is from N32 to N64.
> > >
> > > Well test results say otherwise. Please build yourself binutils for
> > > `mipsisa64-linux' and see what output format it uses with and without this
> > > change.
> >
> > Ohh you are right, while, does mips*-linux without ABI section really matter?
> > I never hear about it is used for any real system.
>
> You may not have heard about it, but someone has added these machine
> specifiers for a reason and I reckon seeing at least `mipsisa64-*-*' ones
> used at one point, maybe at MTI back in ~2005. Here the "isa64" suffix
> only specifies the ISA level (just as with "isa32", etc.) and not the ABI
> such as with the "64" suffix.
>
> It may have even been before we had NewABI support in the first place, so
> the semantics for `mipsisa64-*-*' had to stay for backwards compatibility
> already back then. And I do remember the days and the issues around
> merging NewABI stuff; if MTI weren't so slow with defining it, we could
> have ended up with NUBI instead rather than this old IRIX stuff, not
> necessarily adequate for embedded use and with its sole advantage that it
> was already well-defined then, so the community took lead and merged
> NewABI support behind MTI's back.
>
> > Ohh, yes, my patch switch the default output of mips*isa64-linux to
> > N32 from O32.
> > I believe that it is an correct modification.
>
> Maybe, but this is changing what we've had for 20+ years, so it must not
> be done without proper consideration, documentation, and likely a NEWS
> entry, as this is a user-visible change of semantics. You can't just
> decide unilaterally, especially on something that's been out there for
> such a long time.
>
> I think this close to 2.41 release the best course of action may be
> reverting the change after all on trunk/2.41, and then re-applying the
> uncontroversial part on trunk only. This will prevent Nick from being
> held with the release and we can decide what to do with the rest. It
> would unblock me with accepting your outstanding bug fix as well, also for
> 2.41.
>
> And I wonder if there's more that needs to be undone for 2.41, so that it
> can be then handled properly with 2.42, especially given the large
> quantity of regressions introduced, which may not necessarily be solely
> due to the lack of update to the testsuite and could be a sign of actual
> problems introduced with the tools themselves. I'd prefer to have
> results with 2.41 that are no worse than as at 32f1c80375eb^ TBH.
>
> Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 15:01 ` YunQiang Su
@ 2023-07-22 7:18 ` Xi Ruoyao
2023-07-25 13:30 ` Nick Clifton
2023-07-31 10:05 ` Maciej W. Rozycki
1 sibling, 1 reply; 33+ messages in thread
From: Xi Ruoyao @ 2023-07-22 7:18 UTC (permalink / raw)
To: YunQiang Su, Maciej W. Rozycki, Andreas K. Huettel
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, jiaxun.yang
On Fri, 2023-07-21 at 23:01 +0800, YunQiang Su wrote:
> Debian, as a *REAL* OS, instead of anything you are imagining, is *USING* it.
> I don't agree that you make any "features" heavenly.
> If so, we cannot fix any bug.
>
> More and more software in the *REAL* world, use the CPU section (here mipsisa64)
> to determine the 64bit OS/env.
> Anyway, the *REAL* world is much more important the the world only in
> your *MIND*.
I'm not sure about this debate (I've stopped development of Linux From
Scratch on MIPS64 because I don't have a good hardware now and I don't
like developing something purely on an emulator). But as a LFS editor:
please make an end to this instead of delaying the release indefinitely.
The delay will impact our plans for testing and releasing LFS 12.0.
I'm pulling Andreas (as Gentoo MIPS maintainer and the RM of the
upcoming Glibc release) into the discussion.
> Maciej W. Rozycki <macro@orcam.me.uk> 于2023年7月21日周五 22:31写道：
> >
> > On Fri, 21 Jul 2023, YunQiang Su wrote:
> >
> > > > > > So this has changed the default ABI from o32 to n32 for `mipsisa64-*-*'
> > > > >
> > > > > I think that maybe you have a misunderstanding.
> > > > > 1. It is *not* for `mipsisa64-*-*', it is for `mipsisa64-*-gnuabi64'
> > > > > 2. It is not from O32 to N32. It is from N32 to N64.
> > > >
> > > > Well test results say otherwise. Please build yourself binutils for
> > > > `mipsisa64-linux' and see what output format it uses with and without this
> > > > change.
> > >
> > > Ohh you are right, while, does mips*-linux without ABI section really matter?
> > > I never hear about it is used for any real system.
> >
> > You may not have heard about it, but someone has added these machine
> > specifiers for a reason and I reckon seeing at least `mipsisa64-*-*' ones
> > used at one point, maybe at MTI back in ~2005. Here the "isa64" suffix
> > only specifies the ISA level (just as with "isa32", etc.) and not the ABI
> > such as with the "64" suffix.
> >
> > It may have even been before we had NewABI support in the first place, so
> > the semantics for `mipsisa64-*-*' had to stay for backwards compatibility
> > already back then. And I do remember the days and the issues around
> > merging NewABI stuff; if MTI weren't so slow with defining it, we could
> > have ended up with NUBI instead rather than this old IRIX stuff, not
> > necessarily adequate for embedded use and with its sole advantage that it
> > was already well-defined then, so the community took lead and merged
> > NewABI support behind MTI's back.
> >
> > > Ohh, yes, my patch switch the default output of mips*isa64-linux to
> > > N32 from O32.
> > > I believe that it is an correct modification.
> >
> > Maybe, but this is changing what we've had for 20+ years, so it must not
> > be done without proper consideration, documentation, and likely a NEWS
> > entry, as this is a user-visible change of semantics. You can't just
> > decide unilaterally, especially on something that's been out there for
> > such a long time.
> >
> > I think this close to 2.41 release the best course of action may be
> > reverting the change after all on trunk/2.41, and then re-applying the
> > uncontroversial part on trunk only. This will prevent Nick from being
> > held with the release and we can decide what to do with the rest. It
> > would unblock me with accepting your outstanding bug fix as well, also for
> > 2.41.
> >
> > And I wonder if there's more that needs to be undone for 2.41, so that it
> > can be then handled properly with 2.42, especially given the large
> > quantity of regressions introduced, which may not necessarily be solely
> > due to the lack of update to the testsuite and could be a sign of actual
> > problems introduced with the tools themselves. I'd prefer to have
> > results with 2.41 that are no worse than as at 32f1c80375eb^ TBH.
> >
> > Maciej
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-22 7:18 ` Xi Ruoyao
@ 2023-07-25 13:30 ` Nick Clifton
2023-07-25 14:00 ` YunQiang Su
2023-07-25 16:03 ` Maciej W. Rozycki
0 siblings, 2 replies; 33+ messages in thread
From: Nick Clifton @ 2023-07-25 13:30 UTC (permalink / raw)
To: Xi Ruoyao, YunQiang Su, Maciej W. Rozycki, Andreas K. Huettel
Cc: Richard Sandiford, YunQiang Su, binutils, jiaxun.yang
Hi Guys,
Do we have a conclusion on this issue ?
If time is still needed for debate then can we at least make sure that the 2.41
branch does not have any regressions when compared to the 2.40 branch ?
I would really like to create the 2.41 release at some point in the next few
days, so fixing/isolating this problem is a priority.
Cheers
Nick
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-25 13:30 ` Nick Clifton
@ 2023-07-25 14:00 ` YunQiang Su
2023-07-25 16:03 ` Maciej W. Rozycki
1 sibling, 0 replies; 33+ messages in thread
From: YunQiang Su @ 2023-07-25 14:00 UTC (permalink / raw)
To: Nick Clifton
Cc: Xi Ruoyao, Maciej W. Rozycki, Andreas K. Huettel,
Richard Sandiford, YunQiang Su, binutils, jiaxun.yang
Nick Clifton <nickc@redhat.com> 于2023年7月25日周二 21:30写道：
>
> Hi Guys,
>
> Do we have a conclusion on this issue ?
>
I have no idea about Maciej.
> If time is still needed for debate then can we at least make sure that the 2.41
> branch does not have any regressions when compared to the 2.40 branch ?
>
For me, I don't think that it is a regression, instead it is a bugfix.
> I would really like to create the 2.41 release at some point in the next few
> days, so fixing/isolating this problem is a priority.
>
> Cheers
> Nick
>
>
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-25 13:30 ` Nick Clifton
2023-07-25 14:00 ` YunQiang Su
@ 2023-07-25 16:03 ` Maciej W. Rozycki
1 sibling, 0 replies; 33+ messages in thread
From: Maciej W. Rozycki @ 2023-07-25 16:03 UTC (permalink / raw)
To: Nick Clifton
Cc: Xi Ruoyao, YunQiang Su, Andreas K. Huettel, Richard Sandiford,
YunQiang Su, binutils, jiaxun.yang
On Tue, 25 Jul 2023, Nick Clifton wrote:
> Do we have a conclusion on this issue ?
>
> If time is still needed for debate then can we at least make sure that the
> 2.41
> branch does not have any regressions when compared to the 2.40 branch ?
>
> I would really like to create the 2.41 release at some point in the next few
> days, so fixing/isolating this problem is a priority.
For the last couple of days I have been working on a patch set, mostly
for the testsuite, to resolve the outstanding issues. I still have some
work to complete as a test case is playing tricks with me and I actually
need to run it under GDB to understand what is going on there, but I do
hope to have finished by the end of today, or tomorrow the latest.
Apologies for causing this delay, but I only realised last Friday what
had happened here.
Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 12:30 ` YunQiang Su
2023-07-21 14:30 ` Maciej W. Rozycki
@ 2023-07-25 17:41 ` Andreas K. Huettel
1 sibling, 0 replies; 33+ messages in thread
From: Andreas K. Huettel @ 2023-07-25 17:41 UTC (permalink / raw)
To: Maciej W. Rozycki, binutils
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang, YunQiang Su
[-- Attachment #1: Type: text/plain, Size: 368 bytes --]
Am Freitag, 21. Juli 2023, 14:30:04 CEST schrieb YunQiang Su:
>
> Ohh you are right, while, does mips*-linux without ABI section really matter?
> I never hear about it is used for any real system.
>
Every current Gentoo installation.
--
Andreas K. Hüttel
dilfridge@gentoo.org
Gentoo Linux developer
(council, toolchain, base-system, perl, libreoffice)
[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 981 bytes --]
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 14:30 ` Maciej W. Rozycki
2023-07-21 15:01 ` YunQiang Su
@ 2023-07-25 17:47 ` Andreas K. Huettel
2023-07-28 5:42 ` YunQiang Su
1 sibling, 1 reply; 33+ messages in thread
From: Andreas K. Huettel @ 2023-07-25 17:47 UTC (permalink / raw)
To: YunQiang Su, binutils
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang, Maciej W. Rozycki
[-- Attachment #1: Type: text/plain, Size: 1032 bytes --]
> > Ohh you are right, while, does mips*-linux without ABI section really matter?
> > I never hear about it is used for any real system.
>
> You may not have heard about it, but someone has added these machine
> specifiers for a reason and I reckon seeing at least `mipsisa64-*-*' ones
> used at one point, maybe at MTI back in ~2005. Here the "isa64" suffix
> only specifies the ISA level (just as with "isa32", etc.) and not the ABI
> such as with the "64" suffix.
OK so right now (restricting myself to BE)
* pure 32bit system in Gentoo uses plain mips-unknown-linux-gnu
* anything 64bit (including n32) uses mips64-unknown-linux-gnu
We, Gentoo, plan to move
* n32 to mips64-unknown-linux-gnuabin32 and
* n64 to mips64-unknown-linux-gnuabi64
but so far this is just a (though already far-developed) plan.
(Also, I'm not really the main Gentoo mips expert to talk to...)
--
Andreas K. Hüttel
dilfridge@gentoo.org
Gentoo Linux developer
(council, toolchain, base-system, perl, libreoffice)
[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 981 bytes --]
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-25 17:47 ` Andreas K. Huettel
@ 2023-07-28 5:42 ` YunQiang Su
0 siblings, 0 replies; 33+ messages in thread
From: YunQiang Su @ 2023-07-28 5:42 UTC (permalink / raw)
To: Andreas K. Huettel
Cc: binutils, Richard Sandiford, Nick Clifton, YunQiang Su, xry111,
jiaxun.yang, Maciej W. Rozycki
Maciej, I saw you commits, and thanks for your work.
I still have another concern: we need a mips64r6 default triples to support.
Currently, in my previous patch, I add a "*" between mips and 64, aka
mips*64*el-linux-gnu(abi64).
If you have concern about some cases, maybe we can define it only for
mips*32*-linux-gnu
mips*64*-linux-gnuabin32
mips*64*-linux-gnuabi64
Andreas K. Huettel <dilfridge@gentoo.org> 于2023年7月26日周三 01:48写道：
>
> > > Ohh you are right, while, does mips*-linux without ABI section really matter?
> > > I never hear about it is used for any real system.
> >
> > You may not have heard about it, but someone has added these machine
> > specifiers for a reason and I reckon seeing at least `mipsisa64-*-*' ones
> > used at one point, maybe at MTI back in ~2005. Here the "isa64" suffix
> > only specifies the ISA level (just as with "isa32", etc.) and not the ABI
> > such as with the "64" suffix.
>
> OK so right now (restricting myself to BE)
>
> * pure 32bit system in Gentoo uses plain mips-unknown-linux-gnu
> * anything 64bit (including n32) uses mips64-unknown-linux-gnu
>
> We, Gentoo, plan to move
> * n32 to mips64-unknown-linux-gnuabin32 and
> * n64 to mips64-unknown-linux-gnuabi64
>
> but so far this is just a (though already far-developed) plan.
>
> (Also, I'm not really the main Gentoo mips expert to talk to...)
>
> --
> Andreas K. Hüttel
> dilfridge@gentoo.org
> Gentoo Linux developer
> (council, toolchain, base-system, perl, libreoffice)
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-21 15:01 ` YunQiang Su
2023-07-22 7:18 ` Xi Ruoyao
@ 2023-07-31 10:05 ` Maciej W. Rozycki
2023-07-31 10:32 ` YunQiang Su
1 sibling, 1 reply; 33+ messages in thread
From: Maciej W. Rozycki @ 2023-07-31 10:05 UTC (permalink / raw)
To: YunQiang Su
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang
On Fri, 21 Jul 2023, YunQiang Su wrote:
> Debian, as a *REAL* OS, instead of anything you are imagining, is *USING* it.
> I don't agree that you make any "features" heavenly.
> If so, we cannot fix any bug.
Sometimes bugs have to live forever if the removal would cause more harm
than keeping them. So we best don't introduce them in the first place.
Of course a human beeings we are all bound to make mistakes, but this is
the very reason we have come up with thorough peer reviews: to catch any
mistakes early on, before they cause actual harm. Some will escape
regardless, but we need to try hard and prevent that from happening
rather than being lax.
The use of `mipsisa64-*-*' triplets for o32 ABI configurations wasn't a
bug though, it was a design decision. Now making these triplets mean n32
after they meant something else for 20+ years seems like a bug to me.
> More and more software in the *REAL* world, use the CPU section (here mipsisa64)
> to determine the 64bit OS/env.
> Anyway, the *REAL* world is much more important the the world only in
> your *MIND*.
Personal insults are not going to help you with getting changes accepted,
as we're making decisions based on technical merits rather than opinions.
I don't think a fait accompli ("Debian does it") is a valid argument in a
technical review. It is just a statement of fact and we do not have to
accept the same solution while Debian is free to continue using it.
At the risk of repeating myself, you do need to justify your change
before it can be accepted, that is you have to provide technical arguments
to prove it to the reviewer that taking your change is the right thing to
do. You may certainly reuse the arguments that were given at the time the
choice was evaluated for Debian and if we find them convincing, we will
accept the change.
I don't think we have a document written down for submitting patches
specifically for binutils, but we have been broadly following the rules
for the GNU toolchain, as documented on pages for our sibling projects:
<https://gcc.gnu.org/contribute.html>,
<https://sourceware.org/gdb/wiki/ContributionChecklist>,
<https://sourceware.org/glibc/wiki/Contribution_checklist>.
Please familiarise yourself with these documents before posting further
changes and follow the patch submission guidelines set out there.
I'd expect you, now as a nominated MIPS GCC backend maintainer, to be
especially familiar with the first of these documents, the rules of which
you are expected not only to apply to your own changes, but to enforce
them for patches submitted by other people, whether by the general public
or your fellow employees. As far I can tell it wasn't regrettably the
case with the MIPS16e2 patchset I volunteered to properly review (having
been involved with the instruction set design and having implemented the
binutils side) and which offer was ignored.
And in any case you can do whatever you want in Debian as long as it's
within what the licence allows you to, but we do not necessarily have to
accept your changes. Ideally Debian developers would have asked us in
advance if an incompatible change they want to make locally would be
accepted, or actually would have submitted it so that it lands here first
(or is rejected, in which case they'd have a chance to find an alternative
solution).
I would have argued then you probably want `mips64isa64*-*-*' or suchlike
a triplet for your 64-bit ABI configuration, leaving `mipsisa64*-*-*' ones
for 32-bit ABI configurations (at least as far as the default choice is
concerned), as that would be consistent with our current `mips*-*-*' vs
`mips64*-*-*' naming scheme.
In that scheme for the machine part we have, in this order:
1. The base prefix: `mips'/`mips64' to tell 32-bit/64-bit configurations
apart.
2. An optional implementation specification, e.g. `vr4300', `r5900',
`isa32r2', etc., which sets the CPU default as with the `-march='
option.
3. An optional `el' endianness suffix to make the little endianness the
default rather than the big one.
So `mipstx39el-*-*' is a 32-bit configuration with the TX39 CPU chosen by
default and little endianness. Likewise `mips64r10000-*-*' is a 64-bit
big-endian one with the R10k default. Then `mipsocteon+-*-*' is a 32-bit
one with Octeon+, and for a 64-bit one then say `mips64octeon+-*-*'.
Why would you want to make it different for `isa64' then? Say
`mipsisa64-*-*' for a 32-bit configuration and then `mips64isa64-*-*' for
a 64-bit one. In fact it already works like this: you can use
`mips64isa64r6-linux-gnu' and `mips64isa64r6el-linux-gnu' for your Debian
system right away and get what you need, there's nothing to change.
We do have a couple of legacy aberrations from very old, pre-MIPS32 days,
most notably `mips-sgi-irix6', but I think there's no need to go back
there.
Of course not all configurations are valid, e.g. `mips64isa32-*-*' is
not, but neither is say `mips64tx39-*-*', so that's no news. And then
`mipsinteraptiv-mr2el-*-*' is broken due to the presence of the hyphen in
`mipsinteraptiv-mr2', which is an oversight of mine: we need to define an
`interaptiv_mr2' (or `interaptiv+mr2') alias to allow this configuration,
similarly to how say `74kf3_2' has been named, and remember not to use a
hyphen in any future CPU names.
There's really no need to break anything here, we've had it from time
immemorial.
I note however that `config.sub' hasn't been correctly updated for the
MIPS CPU names and consequently we have a random choice only that works
and other ones don't. In fact given the variability of our MIPS
configurations I fail to see why it doesn't just let it all through. I
have submitted a fix now.
Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-31 10:05 ` Maciej W. Rozycki
@ 2023-07-31 10:32 ` YunQiang Su
2023-08-01 22:52 ` Maciej W. Rozycki
0 siblings, 1 reply; 33+ messages in thread
From: YunQiang Su @ 2023-07-31 10:32 UTC (permalink / raw)
To: Maciej W. Rozycki
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang
Maciej W. Rozycki <macro@orcam.me.uk> 于2023年7月31日周一 18:05写道：
>
> On Fri, 21 Jul 2023, YunQiang Su wrote:
>
> > Debian, as a *REAL* OS, instead of anything you are imagining, is *USING* it.
> > I don't agree that you make any "features" heavenly.
> > If so, we cannot fix any bug.
>
> Sometimes bugs have to live forever if the removal would cause more harm
> than keeping them. So we best don't introduce them in the first place.
> Of course a human beeings we are all bound to make mistakes, but this is
> the very reason we have come up with thorough peer reviews: to catch any
> mistakes early on, before they cause actual harm. Some will escape
> regardless, but we need to try hard and prevent that from happening
> rather than being lax.
>
> The use of `mipsisa64-*-*' triplets for o32 ABI configurations wasn't a
> bug though, it was a design decision. Now making these triplets mean n32
> after they meant something else for 20+ years seems like a bug to me.
>
> > More and more software in the *REAL* world, use the CPU section (here mipsisa64)
> > to determine the 64bit OS/env.
> > Anyway, the *REAL* world is much more important the the world only in
> > your *MIND*.
>
> Personal insults are not going to help you with getting changes accepted,
> as we're making decisions based on technical merits rather than opinions.
>
> I don't think a fait accompli ("Debian does it") is a valid argument in a
> technical review. It is just a statement of fact and we do not have to
> accept the same solution while Debian is free to continue using it.
>
> At the risk of repeating myself, you do need to justify your change
> before it can be accepted, that is you have to provide technical arguments
> to prove it to the reviewer that taking your change is the right thing to
> do. You may certainly reuse the arguments that were given at the time the
> choice was evaluated for Debian and if we find them convincing, we will
> accept the change.
>
> I don't think we have a document written down for submitting patches
> specifically for binutils, but we have been broadly following the rules
> for the GNU toolchain, as documented on pages for our sibling projects:
>
> <https://gcc.gnu.org/contribute.html>,
> <https://sourceware.org/gdb/wiki/ContributionChecklist>,
> <https://sourceware.org/glibc/wiki/Contribution_checklist>.
>
> Please familiarise yourself with these documents before posting further
> changes and follow the patch submission guidelines set out there.
>
> I'd expect you, now as a nominated MIPS GCC backend maintainer, to be
> especially familiar with the first of these documents, the rules of which
> you are expected not only to apply to your own changes, but to enforce
> them for patches submitted by other people, whether by the general public
> or your fellow employees. As far I can tell it wasn't regrettably the
> case with the MIPS16e2 patchset I volunteered to properly review (having
> been involved with the instruction set design and having implemented the
> binutils side) and which offer was ignored.
>
> And in any case you can do whatever you want in Debian as long as it's
> within what the licence allows you to, but we do not necessarily have to
> accept your changes. Ideally Debian developers would have asked us in
> advance if an incompatible change they want to make locally would be
> accepted, or actually would have submitted it so that it lands here first
> (or is rejected, in which case they'd have a chance to find an alternative
> solution).
>
> I would have argued then you probably want `mips64isa64*-*-*' or suchlike
> a triplet for your 64-bit ABI configuration, leaving `mipsisa64*-*-*' ones
> for 32-bit ABI configurations (at least as far as the default choice is
> concerned), as that would be consistent with our current `mips*-*-*' vs
> `mips64*-*-*' naming scheme.
>
> In that scheme for the machine part we have, in this order:
>
> 1. The base prefix: `mips'/`mips64' to tell 32-bit/64-bit configurations
> apart.
>
> 2. An optional implementation specification, e.g. `vr4300', `r5900',
> `isa32r2', etc., which sets the CPU default as with the `-march='
> option.
>
> 3. An optional `el' endianness suffix to make the little endianness the
> default rather than the big one.
>
> So `mipstx39el-*-*' is a 32-bit configuration with the TX39 CPU chosen by
> default and little endianness. Likewise `mips64r10000-*-*' is a 64-bit
> big-endian one with the R10k default. Then `mipsocteon+-*-*' is a 32-bit
> one with Octeon+, and for a 64-bit one then say `mips64octeon+-*-*'.
>
> Why would you want to make it different for `isa64' then? Say
> `mipsisa64-*-*' for a 32-bit configuration and then `mips64isa64-*-*' for
> a 64-bit one. In fact it already works like this: you can use
> `mips64isa64r6-linux-gnu' and `mips64isa64r6el-linux-gnu' for your Debian
> system right away and get what you need, there's nothing to change.
>
Let's go back to 10 years ago, the commit
5afd44e33b13b922760a41580020f941dbdd473e of GCC
which is the previous commit of MIPS r6 support is added.
Let's have a glance of gcc/config.gcc:
There are bellow lines:
mips*-*-linux*) # Linux MIPS, either endian.
tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h
glibc-stdint.h ${tm_file} mips/gnu-user.h mips/linux.h
mips/linux-common.h"
extra_options="${extra_options} linux-android.opt"
case ${target} in
mipsisa32r2*)
default_mips_arch=mips32r2
;;
mipsisa32*)
default_mips_arch=mips32
;;
mips64el-st-linux-gnu)
default_mips_abi=n32
tm_file="${tm_file} mips/st.h"
tmake_file="${tmake_file} mips/t-st"
enable_mips_multilibs="yes"
;;
mips64octeon*-*-linux*)
default_mips_abi=n32
tm_defines="${tm_defines}
MIPS_CPU_STRING_DEFAULT=\\\"octeon\\\""
target_cpu_default=MASK_SOFT_FLOAT_ABI
enable_mips_multilibs="yes"
;;
mipsisa64r2*-*-linux*)
default_mips_abi=n32
default_mips_arch=mips64r2
enable_mips_multilibs="yes"
;;
mips64*-*-linux* | mipsisa64*-*-linux*)
default_mips_abi=n32
enable_mips_multilibs="yes"
;;
esac
I don't think that it is a good idea that they are different between
GCC and binutils.
> We do have a couple of legacy aberrations from very old, pre-MIPS32 days,
> most notably `mips-sgi-irix6', but I think there's no need to go back
> there.
>
> Of course not all configurations are valid, e.g. `mips64isa32-*-*' is
> not, but neither is say `mips64tx39-*-*', so that's no news. And then
> `mipsinteraptiv-mr2el-*-*' is broken due to the presence of the hyphen in
> `mipsinteraptiv-mr2', which is an oversight of mine: we need to define an
> `interaptiv_mr2' (or `interaptiv+mr2') alias to allow this configuration,
> similarly to how say `74kf3_2' has been named, and remember not to use a
> hyphen in any future CPU names.
>
> There's really no need to break anything here, we've had it from time
> immemorial.
>
> I note however that `config.sub' hasn't been correctly updated for the
> MIPS CPU names and consequently we have a random choice only that works
> and other ones don't. In fact given the variability of our MIPS
> configurations I fail to see why it doesn't just let it all through. I
> have submitted a fix now.
>
> Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI
2023-07-31 10:32 ` YunQiang Su
@ 2023-08-01 22:52 ` Maciej W. Rozycki
0 siblings, 0 replies; 33+ messages in thread
From: Maciej W. Rozycki @ 2023-08-01 22:52 UTC (permalink / raw)
To: YunQiang Su
Cc: Richard Sandiford, Nick Clifton, YunQiang Su, binutils, xry111,
jiaxun.yang
On Mon, 31 Jul 2023, YunQiang Su wrote:
> > Why would you want to make it different for `isa64' then? Say
> > `mipsisa64-*-*' for a 32-bit configuration and then `mips64isa64-*-*' for
> > a 64-bit one. In fact it already works like this: you can use
> > `mips64isa64r6-linux-gnu' and `mips64isa64r6el-linux-gnu' for your Debian
> > system right away and get what you need, there's nothing to change.
>
> Let's go back to 10 years ago, the commit
> 5afd44e33b13b922760a41580020f941dbdd473e of GCC
> which is the previous commit of MIPS r6 support is added.
> Let's have a glance of gcc/config.gcc:
>
> There are bellow lines:
> mips*-*-linux*) # Linux MIPS, either endian.
> tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h
> glibc-stdint.h ${tm_file} mips/gnu-user.h mips/linux.h
> mips/linux-common.h"
> extra_options="${extra_options} linux-android.opt"
> case ${target} in
> mipsisa32r2*)
> default_mips_arch=mips32r2
> ;;
> mipsisa32*)
> default_mips_arch=mips32
> ;;
> mips64el-st-linux-gnu)
> default_mips_abi=n32
> tm_file="${tm_file} mips/st.h"
> tmake_file="${tmake_file} mips/t-st"
> enable_mips_multilibs="yes"
> ;;
> mips64octeon*-*-linux*)
> default_mips_abi=n32
> tm_defines="${tm_defines}
> MIPS_CPU_STRING_DEFAULT=\\\"octeon\\\""
> target_cpu_default=MASK_SOFT_FLOAT_ABI
> enable_mips_multilibs="yes"
> ;;
> mipsisa64r2*-*-linux*)
> default_mips_abi=n32
> default_mips_arch=mips64r2
> enable_mips_multilibs="yes"
> ;;
> mips64*-*-linux* | mipsisa64*-*-linux*)
> default_mips_abi=n32
> enable_mips_multilibs="yes"
> ;;
> esac
>
>
> I don't think that it is a good idea that they are different between
> GCC and binutils.
Now this I find a valid argument, which if given with the original
submission (as a separate change from n64 though) could have prevented all
the recent controversy. As regrettable as I find the ABI inconsistency
introduced to GCC with this interpretation of `mipsisa64*-*-linux*', it's
been a part of our toolchain for long and I don't feel like it would be a
good idea to back it out now.
The inconsistency is worse yet AFAICS, because while `mipsisa32r2' and
`mipsisa64r2' set the default architecture respectively to `mips32r2' and
`mips64r2', the fallback suffixes make the random choice of `mips32' (r1)
for `mipsisa32*' (so also e.g. for `mipsisa32r5') and nothing, presumably
`mips3', for `mipsisa64*'. What a mess!
If you submit a suitably described change to synchronise this default ABI
interpretation (but for `mipsisa64*-*-linux*' only rather than extending
it to `mips*64*-*-linux*'), then we can start from there. Also it's not
commit 5afd44e33b13, which I find rather unrelated, but commit
f2d6ca5081ba, even earlier, that added this broken interpretation of
`mipsisa64*-*-linux*'.
NB please trim your replies and quote the relevant parts only to save the
reader's bandwidth.
Maciej
^ permalink raw reply [flat|nested] 33+ messages in thread
end of thread, other threads:[~2023-08-01 22:52 UTC | newest]
Thread overview: 33+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-08 4:30 [PATCH 1/3] MIPS: Fix test failure with FPXX GCC YunQiang Su
2021-03-08 4:30 ` [PATCH 2/3] MIPS: default output r6 object if configured to r6 YunQiang Su
2023-02-23 11:11 ` [PATCH] MIPS: support specify isa level when configure YunQiang Su
2023-03-30 16:53 ` Richard Sandiford
2023-04-03 11:06 ` [PATCH v2] MIPS: the default output fellows triple and with-arch YunQiang Su
2023-04-03 12:40 ` Richard Sandiford
2023-04-10 7:01 ` YunQiang Su
2023-04-14 7:20 ` [PATCH v3] MIPS: the default output fellows triple YunQiang Su
2023-04-18 13:07 ` Richard Sandiford
2023-04-18 14:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-18 14:00 ` [PATCH v4 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:03 ` Richard Sandiford
2023-04-20 13:31 ` [PATCH v5 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI YunQiang Su
2023-04-20 13:31 ` [PATCH v5 2/2] MIPS: default output r6 obj if the triple is r6 YunQiang Su
2023-04-19 19:00 ` [PATCH v4 1/2] MIPS: support mips*64 as CPU and gnuabi64 as ABI Richard Sandiford
2023-07-21 10:00 ` Maciej W. Rozycki
2023-07-21 10:14 ` YunQiang Su
2023-07-21 11:54 ` Maciej W. Rozycki
2023-07-21 12:30 ` YunQiang Su
2023-07-21 14:30 ` Maciej W. Rozycki
2023-07-21 15:01 ` YunQiang Su
2023-07-22 7:18 ` Xi Ruoyao
2023-07-25 13:30 ` Nick Clifton
2023-07-25 14:00 ` YunQiang Su
2023-07-25 16:03 ` Maciej W. Rozycki
2023-07-31 10:05 ` Maciej W. Rozycki
2023-07-31 10:32 ` YunQiang Su
2023-08-01 22:52 ` Maciej W. Rozycki
2023-07-25 17:47 ` Andreas K. Huettel
2023-07-28 5:42 ` YunQiang Su
2023-07-25 17:41 ` Andreas K. Huettel
2021-03-08 4:30 ` [PATCH 3/3] MIPS: Fix testcase for MIPSr6 YunQiang Su
2021-03-19 5:47 ` 回复: [PATCH 1/3] MIPS: Fix test failure with FPXX GCC yunqiang.su
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