From: Kito Cheng <kito.cheng@sifive.com>
To: gcc-patches@gcc.gnu.org, kito.cheng@gmail.com,
patrick@rivosinc.com, vineetg@rivosinc.com,
jlaw@ventanamicro.com
Cc: Kito Cheng <kito.cheng@sifive.com>
Subject: [PATCH] RISC-V: Add missing torture-init and torture-finish for rvv.exp
Date: Mon, 22 May 2023 14:41:39 +0800 [thread overview]
Message-ID: <20230522064138.74056-1-kito.cheng@sifive.com> (raw)
Hi Vineet:
Could you help to test this patch, this could resolve that issue on our
machine, but I would like to also work for other env.
Thanks :)
---
We got bunch of following error message for multi-lib run:
ERROR: torture-init: torture_without_loops is not empty as expected
ERROR: tcl error code NONE
And seems we need torture-init and torture-finish around the test
loop.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.exp: Add torture-init and
torture-finish.
---
gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
index bc99cc0c3cf4..19179564361a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
+++ b/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
@@ -39,6 +39,7 @@ if [istarget riscv32-*-*] then {
# Initialize `dg'.
dg-init
+torture-init
# Main loop.
set CFLAGS "$DEFAULT_CFLAGS -march=$gcc_march -mabi=$gcc_mabi -O3"
@@ -69,5 +70,7 @@ foreach op $AUTOVEC_TEST_OPTS {
dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/vls-vlmax/*.\[cS\]]] \
"-std=c99 -O3 -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax" $CFLAGS
+torture-finish
+
# All done.
dg-finish
--
2.40.1
next reply other threads:[~2023-05-22 6:42 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-22 6:41 Kito Cheng [this message]
2023-05-22 9:17 ` Kito Cheng
2023-05-23 3:52 ` Vineet Gupta
2023-05-24 18:18 ` Vineet Gupta
2023-05-24 20:34 ` Thomas Schwinge
2023-05-24 22:13 ` Vineet Gupta
2023-05-24 23:12 ` Vineet Gupta
2023-05-24 23:13 ` Palmer Dabbelt
2023-05-25 3:43 ` RISC-V Bootstrap problems Jeff Law
2023-05-25 3:46 ` juzhe.zhong
2023-05-25 3:53 ` Kito Cheng
2023-05-25 3:54 ` juzhe.zhong
2023-05-25 4:07 ` Jeff Law
2023-05-25 4:19 ` juzhe.zhong
2023-05-25 13:55 ` Jeff Law
2023-05-25 4:06 ` Jeff Law
2023-05-25 4:08 ` Kito Cheng
2023-05-25 3:51 ` juzhe.zhong
2023-05-24 23:15 ` [PATCH] RISC-V: Add missing torture-init and torture-finish for rvv.exp Jeff Law
2023-05-25 20:26 ` Thomas Schwinge
2023-05-26 23:38 ` Vineet Gupta
2023-05-30 18:43 ` Vineet Gupta
2023-05-31 16:28 ` Vineet Gupta
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