Re: i370 port

["Ulrich Weigand" <uweigand@de.ibm.com>]

Hi Paul,

> I put some debugging on here:
> 
>   op0 = XEXP (operands[0], 0);
>   if (GET_CODE (op0) == REG
>       || (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 0)) == REG
>     && GET_CODE (XEXP (op0, 1)) == CONST_INT
>     && (unsigned) INTVAL (XEXP (op0, 1)) < 4096))
>   {
>     op0 = operands[0];
>     fprintf(stderr, \"used as-is\n\");
>   }
>   else
>   {
>     op0 = replace_equiv_address (operands[0], copy_to_mode_reg (SImode, 
> op0));
>     fprintf(stderr, \"replaced\n\");
>   }
> 
> And I found out that op0 is already being "replaced". Shouldn't this
> replacement eliminate the index register and just have a base
> register, so that I don't need the hack further down?

Well, sure, but this code is just the expander.  If you check the
RTL dumps, you'll notice that after the expand step, there will
indeed be just a single base register.

The problem is that RTL optimization steps *after* expand may
modify the generated RTX.  In particular reload will do so, and
it will be guided by the constraints to tell it which modifications
are allowed for this insn.  If the actual insn pattern (not the
expander) has a generic "m" constraint, reload will feel free to
replace the address with any generally valid address pattern for
the machine, including those that use an index registers, if it
considers this replacement profitable.

This is exactly the reason why you need a constraint letter
that accepts only addresses without index register, instead of
just using plain "m".

Bye,
Ulrich

-- 
  Dr. Ulrich Weigand
  GNU Toolchain for Linux on System z and Cell BE
  Ulrich.Weigand@de.ibm.com