From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
Nelson Chu <nelson@rivosinc.com>,
Kito Cheng <kito.cheng@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Cc: binutils@sourceware.org
Subject: [PATCH 11/12] RISC-V: Reorganize/enhance 'Zb*' extension tests
Date: Sat, 5 Nov 2022 12:29:17 +0000 [thread overview]
Message-ID: <2d9befc5bc5eed80b6bd7da6d092a61b1162ecac.1667651354.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1667651354.git.research_trasio@irq.a4lg.com>
This commit reorganizes tests for 'Zb*' extensions and adds "no required
extension" testcases based on new test utilities. It also contains minor
tidying (such as using different registers per operand).
gas/ChangeLog:
* testsuite/gas/riscv/zb-ext.s: Reorganize and make some tidying.
* testsuite/gas/riscv/zb-ext-32.d: Reflect new zb-ext.s.
Make matching pattern stricter.
* testsuite/gas/riscv/zb-ext-64.d: Likewise.
* testsuite/gas/riscv/zb-ext-32-noalias.d: Likewise.
* testsuite/gas/riscv/zb-ext-64-noalias.d: Likewise.
* testsuite/gas/riscv/zb-ext-32-noarch.d: New test.
* testsuite/gas/riscv/zb-ext-32-noarch.l: Likewise.
* testsuite/gas/riscv/zb-ext-64-noarch.d: New test.
* testsuite/gas/riscv/zb-ext-64-noarch.l: Likewise.
* testsuite/gas/riscv/b-ext.s: Removed.
* testsuite/gas/riscv/b-ext.d: Removed.
* testsuite/gas/riscv/b-ext-64.s: Removed.
* testsuite/gas/riscv/b-ext-64.d: Removed.
* testsuite/gas/riscv/b-ext-na.d: Removed.
* testsuite/gas/riscv/b-ext-64-na.d: Removed.
---
gas/testsuite/gas/riscv/b-ext-64.d | 72 ----------------
gas/testsuite/gas/riscv/b-ext-64.s | 64 --------------
gas/testsuite/gas/riscv/b-ext.d | 51 -----------
gas/testsuite/gas/riscv/b-ext.s | 43 ----------
.../riscv/{b-ext-na.d => zb-ext-32-noalias.d} | 38 ++++-----
gas/testsuite/gas/riscv/zb-ext-32-noarch.d | 3 +
gas/testsuite/gas/riscv/zb-ext-32-noarch.l | 60 +++++++++++++
gas/testsuite/gas/riscv/zb-ext-32.d | 51 +++++++++++
.../{b-ext-64-na.d => zb-ext-64-noalias.d} | 72 ++++++++--------
gas/testsuite/gas/riscv/zb-ext-64-noarch.d | 3 +
gas/testsuite/gas/riscv/zb-ext-64-noarch.l | 59 +++++++++++++
gas/testsuite/gas/riscv/zb-ext-64.d | 72 ++++++++++++++++
gas/testsuite/gas/riscv/zb-ext.s | 84 +++++++++++++++++++
13 files changed, 387 insertions(+), 285 deletions(-)
delete mode 100644 gas/testsuite/gas/riscv/b-ext-64.d
delete mode 100644 gas/testsuite/gas/riscv/b-ext-64.s
delete mode 100644 gas/testsuite/gas/riscv/b-ext.d
delete mode 100644 gas/testsuite/gas/riscv/b-ext.s
rename gas/testsuite/gas/riscv/{b-ext-na.d => zb-ext-32-noalias.d} (67%)
create mode 100644 gas/testsuite/gas/riscv/zb-ext-32-noarch.d
create mode 100644 gas/testsuite/gas/riscv/zb-ext-32-noarch.l
create mode 100644 gas/testsuite/gas/riscv/zb-ext-32.d
rename gas/testsuite/gas/riscv/{b-ext-64-na.d => zb-ext-64-noalias.d} (73%)
create mode 100644 gas/testsuite/gas/riscv/zb-ext-64-noarch.d
create mode 100644 gas/testsuite/gas/riscv/zb-ext-64-noarch.l
create mode 100644 gas/testsuite/gas/riscv/zb-ext-64.d
create mode 100644 gas/testsuite/gas/riscv/zb-ext.s
diff --git a/gas/testsuite/gas/riscv/b-ext-64.d b/gas/testsuite/gas/riscv/b-ext-64.d
deleted file mode 100644
index f88fef9aeb2..00000000000
--- a/gas/testsuite/gas/riscv/b-ext-64.d
+++ /dev/null
@@ -1,72 +0,0 @@
-#as: -march=rv64i_zba_zbb_zbc_zbs
-#source: b-ext-64.s
-#objdump: -d
-
-.*:[ ]+file format .*
-
-
-Disassembly of section .text:
-
-0+000 <target>:
-[ ]+0:[ ]+60051513[ ]+clz[ ]+a0,a0
-[ ]+4:[ ]+60151513[ ]+ctz[ ]+a0,a0
-[ ]+8:[ ]+60251513[ ]+cpop[ ]+a0,a0
-[ ]+c:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2
-[ ]+10:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2
-[ ]+14:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2
-[ ]+18:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2
-[ ]+1c:[ ]+60451513[ ]+sext.b[ ]+a0,a0
-[ ]+20:[ ]+60551513[ ]+sext.h[ ]+a0,a0
-[ ]+24:[ ]+0805453b[ ]+zext.h[ ]+a0,a0
-[ ]+28:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2
-[ ]+2c:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2
-[ ]+30:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2
-[ ]+34:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2
-[ ]+38:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2
-[ ]+3c:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2
-[ ]+40:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2
-[ ]+44:[ ]+6b855513[ ]+rev8[ ]+a0,a0
-[ ]+48:[ ]+28755513[ ]+orc.b[ ]+a0,a0
-[ ]+4c:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2
-[ ]+50:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2
-[ ]+54:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2
-[ ]+58:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2
-[ ]+5c:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2
-[ ]+60:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2
-[ ]+64:[ ]+6005151b[ ]+clzw[ ]+a0,a0
-[ ]+68:[ ]+6015151b[ ]+ctzw[ ]+a0,a0
-[ ]+6c:[ ]+6025151b[ ]+cpopw[ ]+a0,a0
-[ ]+70:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2
-[ ]+74:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2
-[ ]+78:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2
-[ ]+7c:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2
-[ ]+80:[ ]+20c5a53b[ ]+sh1add.uw[ ]+a0,a1,a2
-[ ]+84:[ ]+20c5c53b[ ]+sh2add.uw[ ]+a0,a1,a2
-[ ]+88:[ ]+20c5e53b[ ]+sh3add.uw[ ]+a0,a1,a2
-[ ]+8c:[ ]+08c5853b[ ]+add.uw[ ]+a0,a1,a2
-[ ]+90:[ ]+0805853b[ ]+zext.w[ ]+a0,a1
-[ ]+94:[ ]+0825951b[ ]+slli.uw[ ]+a0,a1,0x2
-[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclr[ ]+a0,a1,0x0
-[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+28059513[ ]+bset[ ]+a0,a1,0x0
-[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+68059513[ ]+binv[ ]+a0,a1,0x0
-[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bext[ ]+a0,a1,0x0
-[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclr[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bset[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binv[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bext[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclr[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bset[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binv[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bext[ ]+a0,a1,0x3f
diff --git a/gas/testsuite/gas/riscv/b-ext-64.s b/gas/testsuite/gas/riscv/b-ext-64.s
deleted file mode 100644
index 57e501e9a41..00000000000
--- a/gas/testsuite/gas/riscv/b-ext-64.s
+++ /dev/null
@@ -1,64 +0,0 @@
-target:
- clz a0, a0
- ctz a0, a0
- cpop a0, a0
- min a0, a1, a2
- minu a0, a1, a2
- max a0, a1, a2
- maxu a0, a1, a2
- sext.b a0, a0
- sext.h a0, a0
- zext.h a0, a0
- andn a0, a1, a2
- orn a0, a1, a2
- xnor a0, a1, a2
- rol a0, a1, a2
- ror a0, a1, a2
- ror a0, a1, 2
- rori a0, a1, 2
- rev8 a0, a0
- orc.b a0, a0
- sh1add a0, a1, a2
- sh2add a0, a1, a2
- sh3add a0, a1, a2
- clmul a0, a1, a2
- clmulh a0, a1, a2
- clmulr a0, a1, a2
- clzw a0, a0
- ctzw a0, a0
- cpopw a0, a0
- rolw a0, a1, a2
- rorw a0, a1, a2
- rorw a0, a1, 2
- roriw a0, a1, 2
- sh1add.uw a0, a1, a2
- sh2add.uw a0, a1, a2
- sh3add.uw a0, a1, a2
- add.uw a0, a1, a2
- zext.w a0, a1
- slli.uw a0, a1, 2
- bclri a0, a1, 0
- bclri a0, a1, 31
- bseti a0, a1, 0
- bseti a0, a1, 31
- binvi a0, a1, 0
- binvi a0, a1, 31
- bexti a0, a1, 0
- bexti a0, a1, 31
- bclri a0, a1, 63
- bseti a0, a1, 63
- binvi a0, a1, 63
- bexti a0, a1, 63
- bclr a0, a1, a2
- bset a0, a1, a2
- binv a0, a1, a2
- bext a0, a1, a2
- #aliases
- bclr a0, a1, 31
- bset a0, a1, 31
- binv a0, a1, 31
- bext a0, a1, 31
- bclr a0, a1, 63
- bset a0, a1, 63
- binv a0, a1, 63
- bext a0, a1, 63
diff --git a/gas/testsuite/gas/riscv/b-ext.d b/gas/testsuite/gas/riscv/b-ext.d
deleted file mode 100644
index 6bbbeb0f96b..00000000000
--- a/gas/testsuite/gas/riscv/b-ext.d
+++ /dev/null
@@ -1,51 +0,0 @@
-#as: -march=rv32i_zba_zbb_zbc_zbs
-#source: b-ext.s
-#objdump: -d
-
-.*:[ ]+file format .*
-
-
-Disassembly of section .text:
-
-0+000 <target>:
-[ ]+0:[ ]+60051513[ ]+clz[ ]+a0,a0
-[ ]+4:[ ]+60151513[ ]+ctz[ ]+a0,a0
-[ ]+8:[ ]+60251513[ ]+cpop[ ]+a0,a0
-[ ]+c:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2
-[ ]+10:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2
-[ ]+14:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2
-[ ]+18:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2
-[ ]+1c:[ ]+60451513[ ]+sext.b[ ]+a0,a0
-[ ]+20:[ ]+60551513[ ]+sext.h[ ]+a0,a0
-[ ]+24:[ ]+08054533[ ]+zext.h[ ]+a0,a0
-[ ]+28:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2
-[ ]+2c:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2
-[ ]+30:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2
-[ ]+34:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2
-[ ]+38:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2
-[ ]+3c:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2
-[ ]+40:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2
-[ ]+44:[ ]+69855513[ ]+rev8[ ]+a0,a0
-[ ]+48:[ ]+28755513[ ]+orc.b[ ]+a0,a0
-[ ]+4c:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2
-[ ]+50:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2
-[ ]+54:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2
-[ ]+58:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2
-[ ]+5c:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2
-[ ]+60:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclr[ ]+a0,a1,0x0
-[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+28059513[ ]+bset[ ]+a0,a1,0x0
-[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+68059513[ ]+binv[ ]+a0,a1,0x0
-[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bext[ ]+a0,a1,0x0
-[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f
diff --git a/gas/testsuite/gas/riscv/b-ext.s b/gas/testsuite/gas/riscv/b-ext.s
deleted file mode 100644
index 9de3fc32806..00000000000
--- a/gas/testsuite/gas/riscv/b-ext.s
+++ /dev/null
@@ -1,43 +0,0 @@
-target:
- clz a0, a0
- ctz a0, a0
- cpop a0, a0
- min a0, a1, a2
- minu a0, a1, a2
- max a0, a1, a2
- maxu a0, a1, a2
- sext.b a0, a0
- sext.h a0, a0
- zext.h a0, a0
- andn a0, a1, a2
- orn a0, a1, a2
- xnor a0, a1, a2
- rol a0, a1, a2
- ror a0, a1, a2
- ror a0, a1, 2
- rori a0, a1, 2
- rev8 a0, a0
- orc.b a0, a0
- sh1add a0, a1, a2
- sh2add a0, a1, a2
- sh3add a0, a1, a2
- clmul a0, a1, a2
- clmulh a0, a1, a2
- clmulr a0, a1, a2
- bclri a0, a1, 0
- bclri a0, a1, 31
- bseti a0, a1, 0
- bseti a0, a1, 31
- binvi a0, a1, 0
- binvi a0, a1, 31
- bexti a0, a1, 0
- bexti a0, a1, 31
- bclr a0, a1, a2
- bset a0, a1, a2
- binv a0, a1, a2
- bext a0, a1, a2
- #aliases
- bclr a0, a1, 31
- bset a0, a1, 31
- binv a0, a1, 31
- bext a0, a1, 31
diff --git a/gas/testsuite/gas/riscv/b-ext-na.d b/gas/testsuite/gas/riscv/zb-ext-32-noalias.d
similarity index 67%
rename from gas/testsuite/gas/riscv/b-ext-na.d
rename to gas/testsuite/gas/riscv/zb-ext-32-noalias.d
index 0c80a379fae..2d532321910 100644
--- a/gas/testsuite/gas/riscv/b-ext-na.d
+++ b/gas/testsuite/gas/riscv/zb-ext-32-noalias.d
@@ -1,6 +1,6 @@
-#as: -march=rv32i_zba_zbb_zbc_zbs
-#source: b-ext.s
-#objdump: -d -Mno-aliases
+#as: -march=rv32i -I$srcdir/$subdir -defsym XLEN=32
+#source: zb-ext.s
+#objdump: -d -M no-aliases
.*:[ ]+file format .*
@@ -8,28 +8,28 @@
Disassembly of section .text:
0+000 <target>:
-[ ]+[0-9a-f]+:[ ]+60051513[ ]+clz[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+60151513[ ]+ctz[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+60251513[ ]+cpop[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60059513[ ]+clz[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60159513[ ]+ctz[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60259513[ ]+cpop[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+60451513[ ]+sext\.b[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+60551513[ ]+sext\.h[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+08054533[ ]+zext\.h[ ]+a0,a0
+[ ]+[0-9a-f]+:[ ]+60459513[ ]+sext\.b[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60559513[ ]+sext\.h[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+0805c533[ ]+zext\.h[ ]+a0,a1
[ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+6985d513[ ]+rev8[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+2875d513[ ]+orc\.b[ ]+a0,a1
[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2
-[ ]+[0-9a-f]+:[ ]+69855513[ ]+rev8[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+28755513[ ]+orc\.b[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2
diff --git a/gas/testsuite/gas/riscv/zb-ext-32-noarch.d b/gas/testsuite/gas/riscv/zb-ext-32-noarch.d
new file mode 100644
index 00000000000..e9a2c0dda07
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zb-ext-32-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=rv32i -I$srcdir/$subdir -defsym XLEN=32 -defsym NOARCH=1
+#source: zb-ext.s
+#error_output: zb-ext-32-noarch.l
diff --git a/gas/testsuite/gas/riscv/zb-ext-32-noarch.l b/gas/testsuite/gas/riscv/zb-ext-32-noarch.l
new file mode 100644
index 00000000000..16859b86ad9
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zb-ext-32-noarch.l
@@ -0,0 +1,60 @@
+.*: Assembler messages:
+.*: Error: unrecognized opcode `sh1add a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `sh2add a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `sh3add a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `sh1add\.uw a0,a1,a2'
+.*: Error: unrecognized opcode `sh2add\.uw a0,a1,a2'
+.*: Error: unrecognized opcode `sh3add\.uw a0,a1,a2'
+.*: Error: unrecognized opcode `add\.uw a0,a1,a2'
+.*: Error: unrecognized opcode `slli\.uw a0,a1,2'
+.*: Error: unrecognized opcode `zext\.w a0,a1'
+.*: Error: unrecognized opcode `clz a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `ctz a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `cpop a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `min a0,a1,a2', extension `zbb' required
+.*: Error: unrecognized opcode `minu a0,a1,a2', extension `zbb' required
+.*: Error: unrecognized opcode `max a0,a1,a2', extension `zbb' required
+.*: Error: unrecognized opcode `maxu a0,a1,a2', extension `zbb' required
+.*: Error: unrecognized opcode `andn a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `orn a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `xnor a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rol a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `ror a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rori a0,a1,2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rev8 a0,a1', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `orc\.b a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `clzw a0,a1'
+.*: Error: unrecognized opcode `ctzw a0,a1'
+.*: Error: unrecognized opcode `cpopw a0,a1'
+.*: Error: unrecognized opcode `rolw a0,a1,a2'
+.*: Error: unrecognized opcode `rorw a0,a1,a2'
+.*: Error: unrecognized opcode `roriw a0,a1,2'
+.*: Error: unrecognized opcode `ror a0,a1,2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rorw a0,a1,2'
+.*: Error: unrecognized opcode `clmul a0,a1,a2', extension `zbc' or `zbkc' required
+.*: Error: unrecognized opcode `clmulh a0,a1,a2', extension `zbc' or `zbkc' required
+.*: Error: unrecognized opcode `clmulr a0,a1,a2', extension `zbc' required
+.*: Error: unrecognized opcode `bclri a0,a1,0', extension `zbs' required
+.*: Error: unrecognized opcode `bclri a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bseti a0,a1,0', extension `zbs' required
+.*: Error: unrecognized opcode `bseti a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `binvi a0,a1,0', extension `zbs' required
+.*: Error: unrecognized opcode `binvi a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bexti a0,a1,0', extension `zbs' required
+.*: Error: unrecognized opcode `bexti a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bclr a0,a1,a2', extension `zbs' required
+.*: Error: unrecognized opcode `bset a0,a1,a2', extension `zbs' required
+.*: Error: unrecognized opcode `binv a0,a1,a2', extension `zbs' required
+.*: Error: unrecognized opcode `bext a0,a1,a2', extension `zbs' required
+.*: Error: unrecognized opcode `bclr a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bset a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `binv a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bext a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bclri a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bseti a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `binvi a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bexti a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bclr a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bset a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `binv a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bext a0,a1,63', extension `zbs' required
diff --git a/gas/testsuite/gas/riscv/zb-ext-32.d b/gas/testsuite/gas/riscv/zb-ext-32.d
new file mode 100644
index 00000000000..419f36a0745
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zb-ext-32.d
@@ -0,0 +1,51 @@
+#as: -march=rv32i -I$srcdir/$subdir -defsym XLEN=32
+#source: zb-ext.s
+#objdump: -d
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60059513[ ]+clz[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60159513[ ]+ctz[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60259513[ ]+cpop[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60459513[ ]+sext\.b[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60559513[ ]+sext\.h[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+0805c533[ ]+zext\.h[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+6985d513[ ]+rev8[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+2875d513[ ]+orc\.b[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclr[ ]+a0,a1,0x0
+[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+28059513[ ]+bset[ ]+a0,a1,0x0
+[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+68059513[ ]+binv[ ]+a0,a1,0x0
+[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bext[ ]+a0,a1,0x0
+[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f
diff --git a/gas/testsuite/gas/riscv/b-ext-64-na.d b/gas/testsuite/gas/riscv/zb-ext-64-noalias.d
similarity index 73%
rename from gas/testsuite/gas/riscv/b-ext-64-na.d
rename to gas/testsuite/gas/riscv/zb-ext-64-noalias.d
index ec5acd017ed..341eb22eb1b 100644
--- a/gas/testsuite/gas/riscv/b-ext-64-na.d
+++ b/gas/testsuite/gas/riscv/zb-ext-64-noalias.d
@@ -1,6 +1,6 @@
-#as: -march=rv64i_zba_zbb_zbc_zbs
-#source: b-ext-64.s
-#objdump: -d -Mno-aliases
+#as: -march=rv64i -I$srcdir/$subdir -defsym XLEN=64
+#source: zb-ext.s
+#objdump: -d -M no-aliases
.*:[ ]+file format .*
@@ -8,44 +8,44 @@
Disassembly of section .text:
0+000 <target>:
-[ ]+[0-9a-f]+:[ ]+60051513[ ]+clz[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+60151513[ ]+ctz[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+60251513[ ]+cpop[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5a53b[ ]+sh1add\.uw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5c53b[ ]+sh2add\.uw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5e53b[ ]+sh3add\.uw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+08c5853b[ ]+add\.uw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0825951b[ ]+slli\.uw[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+0805853b[ ]+add\.uw[ ]+a0,a1,zero
+[ ]+[0-9a-f]+:[ ]+60059513[ ]+clz[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60159513[ ]+ctz[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60259513[ ]+cpop[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+60451513[ ]+sext\.b[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+60551513[ ]+sext\.h[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+0805453b[ ]+zext\.h[ ]+a0,a0
+[ ]+[0-9a-f]+:[ ]+60459513[ ]+sext\.b[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60559513[ ]+sext\.h[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+0805c53b[ ]+zext\.h[ ]+a0,a1
[ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2
-[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2
-[ ]+[0-9a-f]+:[ ]+6b855513[ ]+rev8[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+28755513[ ]+orc\.b[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+6005151b[ ]+clzw[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+6015151b[ ]+ctzw[ ]+a0,a0
-[ ]+[0-9a-f]+:[ ]+6025151b[ ]+cpopw[ ]+a0,a0
+[ ]+[0-9a-f]+:[ ]+6b85d513[ ]+rev8[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+2875d513[ ]+orc\.b[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+6005951b[ ]+clzw[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+6015951b[ ]+ctzw[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+6025951b[ ]+cpopw[ ]+a0,a1
[ ]+[0-9a-f]+:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+6025d513[ ]+rori[ ]+a0,a1,0x2
[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+roriw[ ]+a0,a1,0x2
-[ ]+[0-9a-f]+:[ ]+20c5a53b[ ]+sh1add\.uw[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+20c5c53b[ ]+sh2add\.uw[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+20c5e53b[ ]+sh3add\.uw[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+08c5853b[ ]+add\.uw[ ]+a0,a1,a2
-[ ]+[0-9a-f]+:[ ]+0805853b[ ]+add\.uw[ ]+a0,a1,zero
-[ ]+[0-9a-f]+:[ ]+0825951b[ ]+slli\.uw[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclri[ ]+a0,a1,0x0
[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclri[ ]+a0,a1,0x1f
[ ]+[0-9a-f]+:[ ]+28059513[ ]+bseti[ ]+a0,a1,0x0
@@ -54,10 +54,6 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binvi[ ]+a0,a1,0x1f
[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bexti[ ]+a0,a1,0x0
[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bexti[ ]+a0,a1,0x1f
-[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f
-[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f
[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2
[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2
@@ -70,3 +66,7 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f
[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f
[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclri[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bseti[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binvi[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bexti[ ]+a0,a1,0x3f
diff --git a/gas/testsuite/gas/riscv/zb-ext-64-noarch.d b/gas/testsuite/gas/riscv/zb-ext-64-noarch.d
new file mode 100644
index 00000000000..3655678814f
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zb-ext-64-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=rv64i -I$srcdir/$subdir -defsym XLEN=64 -defsym NOARCH=1
+#source: zb-ext.s
+#error_output: zb-ext-64-noarch.l
diff --git a/gas/testsuite/gas/riscv/zb-ext-64-noarch.l b/gas/testsuite/gas/riscv/zb-ext-64-noarch.l
new file mode 100644
index 00000000000..9b358fb3b55
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zb-ext-64-noarch.l
@@ -0,0 +1,59 @@
+.*: Assembler messages:
+.*: Error: unrecognized opcode `sh1add a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `sh2add a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `sh3add a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `sh1add\.uw a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `sh2add\.uw a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `sh3add\.uw a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `add\.uw a0,a1,a2', extension `zba' required
+.*: Error: unrecognized opcode `slli\.uw a0,a1,2', extension `zba' required
+.*: Error: unrecognized opcode `clz a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `ctz a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `cpop a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `min a0,a1,a2', extension `zbb' required
+.*: Error: unrecognized opcode `minu a0,a1,a2', extension `zbb' required
+.*: Error: unrecognized opcode `max a0,a1,a2', extension `zbb' required
+.*: Error: unrecognized opcode `maxu a0,a1,a2', extension `zbb' required
+.*: Error: unrecognized opcode `andn a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `orn a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `xnor a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rol a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `ror a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rori a0,a1,2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rev8 a0,a1', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `orc\.b a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `clzw a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `ctzw a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `cpopw a0,a1', extension `zbb' required
+.*: Error: unrecognized opcode `rolw a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rorw a0,a1,a2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `roriw a0,a1,2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `ror a0,a1,2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `rorw a0,a1,2', extension `zbb' or `zbkb' required
+.*: Error: unrecognized opcode `clmul a0,a1,a2', extension `zbc' or `zbkc' required
+.*: Error: unrecognized opcode `clmulh a0,a1,a2', extension `zbc' or `zbkc' required
+.*: Error: unrecognized opcode `clmulr a0,a1,a2', extension `zbc' required
+.*: Error: unrecognized opcode `bclri a0,a1,0', extension `zbs' required
+.*: Error: unrecognized opcode `bclri a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bseti a0,a1,0', extension `zbs' required
+.*: Error: unrecognized opcode `bseti a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `binvi a0,a1,0', extension `zbs' required
+.*: Error: unrecognized opcode `binvi a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bexti a0,a1,0', extension `zbs' required
+.*: Error: unrecognized opcode `bexti a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bclr a0,a1,a2', extension `zbs' required
+.*: Error: unrecognized opcode `bset a0,a1,a2', extension `zbs' required
+.*: Error: unrecognized opcode `binv a0,a1,a2', extension `zbs' required
+.*: Error: unrecognized opcode `bext a0,a1,a2', extension `zbs' required
+.*: Error: unrecognized opcode `bclr a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bset a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `binv a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bext a0,a1,31', extension `zbs' required
+.*: Error: unrecognized opcode `bclri a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bseti a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `binvi a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bexti a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bclr a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bset a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `binv a0,a1,63', extension `zbs' required
+.*: Error: unrecognized opcode `bext a0,a1,63', extension `zbs' required
diff --git a/gas/testsuite/gas/riscv/zb-ext-64.d b/gas/testsuite/gas/riscv/zb-ext-64.d
new file mode 100644
index 00000000000..df206c0f298
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zb-ext-64.d
@@ -0,0 +1,72 @@
+#as: -march=rv64i -I$srcdir/$subdir -defsym XLEN=64
+#source: zb-ext.s
+#objdump: -d
+
+.*:[ ]+file format .*
+
+
+Disassembly of section .text:
+
+0+000 <target>:
+[ ]+[0-9a-f]+:[ ]+20c5a533[ ]+sh1add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5c533[ ]+sh2add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5e533[ ]+sh3add[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5a53b[ ]+sh1add\.uw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5c53b[ ]+sh2add\.uw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+20c5e53b[ ]+sh3add\.uw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+08c5853b[ ]+add\.uw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0825951b[ ]+slli\.uw[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+0805853b[ ]+zext\.w[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60059513[ ]+clz[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60159513[ ]+ctz[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60259513[ ]+cpop[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+0ac5c533[ ]+min[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5d533[ ]+minu[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5e533[ ]+max[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5f533[ ]+maxu[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60459513[ ]+sext\.b[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60559513[ ]+sext\.h[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+0805c53b[ ]+zext\.h[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+40c5f533[ ]+andn[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+40c5e533[ ]+orn[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+40c5c533[ ]+xnor[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c59533[ ]+rol[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c5d533[ ]+ror[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+6b85d513[ ]+rev8[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+2875d513[ ]+orc\.b[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+6005951b[ ]+clzw[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+6015951b[ ]+ctzw[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+6025951b[ ]+cpopw[ ]+a0,a1
+[ ]+[0-9a-f]+:[ ]+60c5953b[ ]+rolw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+60c5d53b[ ]+rorw[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+6025d513[ ]+ror[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+6025d51b[ ]+rorw[ ]+a0,a1,0x2
+[ ]+[0-9a-f]+:[ ]+0ac59533[ ]+clmul[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5b533[ ]+clmulh[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+0ac5a533[ ]+clmulr[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+48059513[ ]+bclr[ ]+a0,a1,0x0
+[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+28059513[ ]+bset[ ]+a0,a1,0x0
+[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+68059513[ ]+binv[ ]+a0,a1,0x0
+[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+4805d513[ ]+bext[ ]+a0,a1,0x0
+[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+48c59533[ ]+bclr[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+28c59533[ ]+bset[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+68c59533[ ]+binv[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+48c5d533[ ]+bext[ ]+a0,a1,a2
+[ ]+[0-9a-f]+:[ ]+49f59513[ ]+bclr[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+29f59513[ ]+bset[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+69f59513[ ]+binv[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+49f5d513[ ]+bext[ ]+a0,a1,0x1f
+[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclr[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bset[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binv[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bext[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+4bf59513[ ]+bclr[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+2bf59513[ ]+bset[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+6bf59513[ ]+binv[ ]+a0,a1,0x3f
+[ ]+[0-9a-f]+:[ ]+4bf5d513[ ]+bext[ ]+a0,a1,0x3f
diff --git a/gas/testsuite/gas/riscv/zb-ext.s b/gas/testsuite/gas/riscv/zb-ext.s
new file mode 100644
index 00000000000..2489fcd47c2
--- /dev/null
+++ b/gas/testsuite/gas/riscv/zb-ext.s
@@ -0,0 +1,84 @@
+.include "testutils.inc"
+
+target:
+ SET_ARCH_START +zba
+ sh1add a0, a1, a2
+ sh2add a0, a1, a2
+ sh3add a0, a1, a2
+.if XLEN_GE_64
+ sh1add.uw a0, a1, a2
+ sh2add.uw a0, a1, a2
+ sh3add.uw a0, a1, a2
+ add.uw a0, a1, a2
+ slli.uw a0, a1, 2
+ zext.w a0, a1 # Alias (has RVI macro)
+.endif
+ SET_ARCH_END
+
+ SET_ARCH_START +zbb
+ clz a0, a1
+ ctz a0, a1
+ cpop a0, a1
+ min a0, a1, a2
+ minu a0, a1, a2
+ max a0, a1, a2
+ maxu a0, a1, a2
+ sext.b a0, a1 # Has RVI macro
+ sext.h a0, a1 # Has RVI macro
+ zext.h a0, a1 # Has RVI macro
+ andn a0, a1, a2
+ orn a0, a1, a2
+ xnor a0, a1, a2
+ rol a0, a1, a2
+ ror a0, a1, a2
+ rori a0, a1, 2
+ rev8 a0, a1
+ orc.b a0, a1
+.if XLEN_GE_64
+ clzw a0, a1
+ ctzw a0, a1
+ cpopw a0, a1
+ rolw a0, a1, a2
+ rorw a0, a1, a2
+ roriw a0, a1, 2
+.endif
+ ror a0, a1, 2 # Alias
+.if XLEN_GE_64
+ rorw a0, a1, 2 # Alias
+.endif
+ SET_ARCH_END
+
+ SET_ARCH_START +zbc
+ clmul a0, a1, a2
+ clmulh a0, a1, a2
+ clmulr a0, a1, a2
+ SET_ARCH_END
+
+ SET_ARCH_START +zbs
+ bclri a0, a1, 0
+ bclri a0, a1, 31
+ bseti a0, a1, 0
+ bseti a0, a1, 31
+ binvi a0, a1, 0
+ binvi a0, a1, 31
+ bexti a0, a1, 0
+ bexti a0, a1, 31
+ bclr a0, a1, a2
+ bset a0, a1, a2
+ binv a0, a1, a2
+ bext a0, a1, a2
+ bclr a0, a1, 31 # Alias
+ bset a0, a1, 31 # Alias
+ binv a0, a1, 31 # Alias
+ bext a0, a1, 31 # Alias
+.if XLEN_GE_64
+ bclri a0, a1, 63
+ bseti a0, a1, 63
+ binvi a0, a1, 63
+ bexti a0, a1, 63
+ bclr a0, a1, 63 # Alias
+ bset a0, a1, 63 # Alias
+ binv a0, a1, 63 # Alias
+ bext a0, a1, 63 # Alias
+.endif
+ SET_ARCH_END
--
2.37.2
next prev parent reply other threads:[~2022-11-05 12:31 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-05 12:29 [PATCH 00/12] RISC-V: Test refinements (Batch 1) Tsukasa OI
2022-11-05 12:29 ` [PATCH 01/12] RISC-V: Remove unnecessary empty matching file Tsukasa OI
2022-11-29 7:38 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 02/12] RISC-V: Tidy disassembler corner case tests Tsukasa OI
2022-11-29 7:48 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 03/12] RISC-V: Tidying related to 'Zfinx' disassembler test Tsukasa OI
2022-11-29 7:50 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 04/12] RISC-V: GAS: Add basic shared test utilities Tsukasa OI
2022-11-29 7:53 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 05/12] RISC-V: Redefine "nop" test Tsukasa OI
2022-11-29 7:58 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 06/12] RISC-V: Reorganize/enhance {sign,zero}-extension instructions Tsukasa OI
2022-11-29 8:10 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 07/12] RISC-V: Combine complex extension error handling tests Tsukasa OI
2022-11-29 8:16 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 08/12] RISC-V: Refine/enhance 'M'/'Zmmul' extension tests Tsukasa OI
2022-11-29 8:23 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 09/12] RISC-V: Combine/enhance 'Zicbo[mz]' " Tsukasa OI
2022-11-29 8:38 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 10/12] RISC-V: Enhance 'Zicbop' testcases Tsukasa OI
2022-11-29 8:51 ` Nelson Chu
2022-11-05 12:29 ` Tsukasa OI [this message]
2022-11-29 8:57 ` [PATCH 11/12] RISC-V: Reorganize/enhance 'Zb*' extension tests Nelson Chu
2022-11-05 12:29 ` [PATCH 12/12] RISC-V: Combine/enhance 'Zk*'/'Zbk*' " Tsukasa OI
2022-11-29 9:00 ` Nelson Chu
2022-11-20 2:28 ` [PING^1][PATCH 00/12] RISC-V: Test refinements (Batch 1) Tsukasa OI
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