From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
Nelson Chu <nelson@rivosinc.com>,
Kito Cheng <kito.cheng@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Cc: binutils@sourceware.org
Subject: [PATCH 03/12] RISC-V: Tidying related to 'Zfinx' disassembler test
Date: Sat, 5 Nov 2022 12:29:09 +0000 [thread overview]
Message-ID: <a9229a2798480f00bf12ac3c435b3ef57f867022.1667651354.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1667651354.git.research_trasio@irq.a4lg.com>
This commit makes some tidying to zfinx-dis-numeric.d.
gas/ChangeLog:
* testsuite/gas/riscv/zfinx-dis-numeric.d: Minimize extension
requirements. Remove redundant source line. Make test pattern
stricter. Remove -r from objdump options.
---
gas/testsuite/gas/riscv/zfinx-dis-numeric.d | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/gas/testsuite/gas/riscv/zfinx-dis-numeric.d b/gas/testsuite/gas/riscv/zfinx-dis-numeric.d
index ba3f62295eb..1c61d61f8f3 100644
--- a/gas/testsuite/gas/riscv/zfinx-dis-numeric.d
+++ b/gas/testsuite/gas/riscv/zfinx-dis-numeric.d
@@ -1,10 +1,9 @@
-#as: -march=rv64ima_zfinx
-#source: zfinx-dis-numeric.s
-#objdump: -dr -Mnumeric
+#as: -march=rv32i_zfinx
+#objdump: -d -M numeric
.*:[ ]+file format .*
Disassembly of section .text:
0+000 <target>:
-[ ]+[0-9a-f]+:[ ]+a0c5a553[ ]+feq.s[ ]+x10,x11,x12
+[ ]+[0-9a-f]+:[ ]+a0c5a553[ ]+feq\.s[ ]+x10,x11,x12
--
2.37.2
next prev parent reply other threads:[~2022-11-05 12:29 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-05 12:29 [PATCH 00/12] RISC-V: Test refinements (Batch 1) Tsukasa OI
2022-11-05 12:29 ` [PATCH 01/12] RISC-V: Remove unnecessary empty matching file Tsukasa OI
2022-11-29 7:38 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 02/12] RISC-V: Tidy disassembler corner case tests Tsukasa OI
2022-11-29 7:48 ` Nelson Chu
2022-11-05 12:29 ` Tsukasa OI [this message]
2022-11-29 7:50 ` [PATCH 03/12] RISC-V: Tidying related to 'Zfinx' disassembler test Nelson Chu
2022-11-05 12:29 ` [PATCH 04/12] RISC-V: GAS: Add basic shared test utilities Tsukasa OI
2022-11-29 7:53 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 05/12] RISC-V: Redefine "nop" test Tsukasa OI
2022-11-29 7:58 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 06/12] RISC-V: Reorganize/enhance {sign,zero}-extension instructions Tsukasa OI
2022-11-29 8:10 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 07/12] RISC-V: Combine complex extension error handling tests Tsukasa OI
2022-11-29 8:16 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 08/12] RISC-V: Refine/enhance 'M'/'Zmmul' extension tests Tsukasa OI
2022-11-29 8:23 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 09/12] RISC-V: Combine/enhance 'Zicbo[mz]' " Tsukasa OI
2022-11-29 8:38 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 10/12] RISC-V: Enhance 'Zicbop' testcases Tsukasa OI
2022-11-29 8:51 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 11/12] RISC-V: Reorganize/enhance 'Zb*' extension tests Tsukasa OI
2022-11-29 8:57 ` Nelson Chu
2022-11-05 12:29 ` [PATCH 12/12] RISC-V: Combine/enhance 'Zk*'/'Zbk*' " Tsukasa OI
2022-11-29 9:00 ` Nelson Chu
2022-11-20 2:28 ` [PING^1][PATCH 00/12] RISC-V: Test refinements (Batch 1) Tsukasa OI
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