Re: Special Memory Constraint [was Re: Indirect memory addresses vs. lra]

[John Darrington <john@darrington.wattle.id.au>]

On Mon, Aug 19, 2019 at 10:07:11AM -0500, Segher Boessenkool wrote:

     > ? As I remember there were a few other ideas from Richard Biener and 
     > Segher Boessenkool.? I also proposed to add a new address register which 
     > will be always a fixed stack memory slot at the end. Unfortunately I am 
     > not familiar with the target and the port to say in details how to do 
     > it.? But I think it is worth to try.
     
     The m68hc11 port used the fake Z register approach, and I believe it had
     some special machine pass to get rid of it right before assembler output.
     
     (r171302 is when it was removed -- last version was
     https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/m68hc11/m68hc11.c;h=1e414102c3f1fed985e4fb8db7954342e965190b;hb=bae8bb65d842d7ffefe990c1f0ac004491f3c105#l4061
     for the machine reorg stuff).
     
     No idea how well it works...  But it's only needed if you are forced to
     have a frame pointer IIUC?
     
     
     Segher


Most of these suggestions involve adding some sort of virtual registers
So I hacked the machine description to add two new registers Z1 and Z2 
with the same mode as X and Y.

Obviously the assembler balks at this.  However the compiler still
ICEs at the same place as before.

So this suggests that our original diagnosis, viz: there are not enough
address registers was not accurate, and in fact there is some other
problem?

J'

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