From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Andrea Corallo <Andrea.Corallo@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrea Corallo <Andrea.Corallo@arm.com>
Subject: RE: [PATCH 04/35] arm: improve tests and fix vdwdupq*
Date: Fri, 18 Nov 2022 16:35:44 +0000 [thread overview]
Message-ID: <PAXPR08MB69261F103F9936F742BA1ADC93099@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20221117163809.1009526-5-andrea.corallo@arm.com>
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 04/35] arm: improve tests and fix vdwdupq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vdwdupq_m_wb_u<mode>_insn): Fix
> spacing.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c : Improve test.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c : Likewise.
Ok.
Thanks,
Kyrill
> ---
> gcc/config/arm/mve.md | 2 +-
> .../arm/mve/intrinsics/vdwdupq_m_n_u16.c | 44 ++++++++++++++--
> .../arm/mve/intrinsics/vdwdupq_m_n_u32.c | 46 ++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_m_n_u8.c | 46 ++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_m_wb_u16.c | 50 ++++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_m_wb_u32.c | 48 +++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_m_wb_u8.c | 50 ++++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_n_u16.c | 32 ++++++++++--
> .../arm/mve/intrinsics/vdwdupq_n_u32.c | 32 ++++++++++--
> .../arm/mve/intrinsics/vdwdupq_n_u8.c | 32 ++++++++++--
> .../arm/mve/intrinsics/vdwdupq_wb_u16.c | 32 ++++++++++--
> .../arm/mve/intrinsics/vdwdupq_wb_u32.c | 32 ++++++++++--
> .../arm/mve/intrinsics/vdwdupq_wb_u8.c | 32 ++++++++++--
> .../arm/mve/intrinsics/vdwdupq_x_n_u16.c | 42 ++++++++++++++--
> .../arm/mve/intrinsics/vdwdupq_x_n_u32.c | 46 ++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_x_n_u8.c | 46 ++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_x_wb_u16.c | 50 ++++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_x_wb_u32.c | 46 ++++++++++++++---
> .../arm/mve/intrinsics/vdwdupq_x_wb_u8.c | 50 ++++++++++++++++---
> 19 files changed, 655 insertions(+), 103 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 1215f845388..58ffe03c499 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -9195,7 +9195,7 @@ (define_insn
> "mve_vdwdupq_m_wb_u<mode>_insn"
> VDWDUPQ_M))
> ]
> "TARGET_HAVE_MVE"
> - "vpst\;\tvdwdupt.u%#<V_sz_elem>\t%q2, %3, %R4, %5"
> + "vpst\;vdwdupt.u%#<V_sz_elem>\t%q2, %3, %R4, %5"
> [(set_attr "type" "mve_move")
> (set_attr "length""8")])
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
> index 5303fd7d361..8f53f5ef0cb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u16.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 1, p);
> + return vdwdupq_m_n_u16 (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
> {
> return vdwdupq_m (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 (uint16x8_t inactive, mve_pred16_t p)
> +{
> + return vdwdupq_m (inactive, 1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
> index 9f22bd7f852..30e971fb733 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u32.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 4, p);
> + return vdwdupq_m_n_u32 (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 4, p);
> + return vdwdupq_m (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 (uint32x4_t inactive, mve_pred16_t p)
> +{
> + return vdwdupq_m (inactive, 1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
> index 0591e731958..0abc19a2318 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_n_u8.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 4, p);
> + return vdwdupq_m_n_u8 (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 4, p);
> + return vdwdupq_m (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 (uint8x16_t inactive, mve_pred16_t p)
> +{
> + return vdwdupq_m (inactive, 1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
> index e4e7b47e082..b3e6affbf8f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> -foo (uint16x8_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 8, p);
> + return vdwdupq_m_wb_u16 (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> -foo1 (uint16x8_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo1 (uint16x8_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 8, p);
> + return vdwdupq_m (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 (uint16x8_t inactive, mve_pred16_t p)
> +{
> + return vdwdupq_m (inactive, 1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
> index 42917dc9886..60c52b0d850 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u32.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> -foo (uint32x4_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 1, p);
> + return vdwdupq_m_wb_u32 (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> -foo1 (uint32x4_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo1 (uint32x4_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> return vdwdupq_m (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 (uint32x4_t inactive, mve_pred16_t p)
> +{
> + return vdwdupq_m (inactive, 1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
> index 32c3153ffb3..459321a7984 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u8.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> -foo (uint8x16_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 2, p);
> + return vdwdupq_m_wb_u8 (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> -foo1 (uint8x16_t inactive, uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo1 (uint8x16_t inactive, uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_m (inactive, a, b, 2, p);
> + return vdwdupq_m (inactive, a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 (uint8x16_t inactive, mve_pred16_t p)
> +{
> + return vdwdupq_m (inactive, 1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
> index 725a6e4bc0e..9f76dbf35eb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u16.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint32_t a, uint32_t b)
> {
> - return vdwdupq_n_u16 (a, b, 2);
> + return vdwdupq_n_u16 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint32_t a, uint32_t b)
> {
> - return vdwdupq_u16 (a, b, 2);
> + return vdwdupq_u16 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 ()
> +{
> + return vdwdupq_u16 (1, 1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
> index 6ceaadb984d..962f766b496 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u32.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32_t a, uint32_t b)
> {
> - return vdwdupq_n_u32 (a, b, 8);
> + return vdwdupq_n_u32 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32_t a, uint32_t b)
> {
> - return vdwdupq_u32 (a, b, 8);
> + return vdwdupq_u32 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 ()
> +{
> + return vdwdupq_u32 (1, 1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
> index a1712e418be..c73b1b69661 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_n_u8.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint32_t a, uint32_t b)
> {
> - return vdwdupq_n_u8 (a, b, 4);
> + return vdwdupq_n_u8 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint32_t a, uint32_t b)
> {
> - return vdwdupq_u8 (a, b, 4);
> + return vdwdupq_u8 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 ()
> +{
> + return vdwdupq_u8 (1, 1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
> index 0164ea9502c..3b1968d78aa 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u16.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint32_t *a, uint32_t b)
> {
> - return vdwdupq_wb_u16 (a, b, 2);
> + return vdwdupq_wb_u16 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint32_t *a, uint32_t b)
> {
> - return vdwdupq_u16 (a, b, 2);
> + return vdwdupq_u16 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vdwdup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 ()
> +{
> + return vdwdupq_u16 (1, 1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
> index 7681371b016..8554f62ee6b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u32.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32_t *a, uint32_t b)
> {
> - return vdwdupq_wb_u32 (a, b, 8);
> + return vdwdupq_wb_u32 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32_t *a, uint32_t b)
> {
> - return vdwdupq_u32 (a, b, 8);
> + return vdwdupq_u32 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vdwdup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 ()
> +{
> + return vdwdupq_u32 (1, 1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
> index 6f60bb09b24..eb91a80daf5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_wb_u8.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint32_t *a, uint32_t b)
> {
> - return vdwdupq_wb_u8 (a, b, 4);
> + return vdwdupq_wb_u8 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint32_t *a, uint32_t b)
> {
> - return vdwdupq_u8 (a, b, 4);
> + return vdwdupq_u8 (a, b, 1);
> }
>
> -/* { dg-final { scan-assembler "vdwdup.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vdwdup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 ()
> +{
> + return vdwdupq_u8 (1, 1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
> index ce975267531..9c0fd1e253c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u16.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint32_t a, uint32_t b, mve_pred16_t p)
> {
> return vdwdupq_x_n_u16 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
> {
> return vdwdupq_x_u16 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 (mve_pred16_t p)
> +{
> + return vdwdupq_x_u16 (1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
> index 9ed75d292d8..3107e2fdbbe 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u32.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_x_n_u32 (a, b, 4, p);
> + return vdwdupq_x_n_u32 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_x_u32 (a, b, 4, p);
> + return vdwdupq_x_u32 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 (mve_pred16_t p)
> +{
> + return vdwdupq_x_u32 (1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
> index 3705094c4df..03d01e0dd43 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_n_u8.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_x_n_u8 (a, b, 4, p);
> + return vdwdupq_x_n_u8 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint32_t a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_x_u8 (a, b, 4, p);
> + return vdwdupq_x_u8 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 (mve_pred16_t p)
> +{
> + return vdwdupq_x_u8 (1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
> index caf744d7255..f7dca660c03 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u16.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> -foo (uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo (uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_x_wb_u16 (a, b, 8, p);
> + return vdwdupq_x_wb_u16 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint16x8_t
> -foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_x_u16 (a, b, 8, p);
> + return vdwdupq_x_u16 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 (mve_pred16_t p)
> +{
> + return vdwdupq_x_u16 (1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
> index 8c8be86bce6..032ae94e8c3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u32.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> -foo (uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo (uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> return vdwdupq_x_wb_u32 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint32x4_t
> -foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> return vdwdupq_x_u32 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 (mve_pred16_t p)
> +{
> + return vdwdupq_x_u32 (1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
> index 1c6ef4ed33f..5d238a7a865 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vdwdupq_x_wb_u8.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> -foo (uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo (uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_x_wb_u8 (a, b, 2, p);
> + return vdwdupq_x_wb_u8 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> uint8x16_t
> -foo1 (uint32_t * a, uint32_t b, mve_pred16_t p)
> +foo1 (uint32_t *a, uint32_t b, mve_pred16_t p)
> {
> - return vdwdupq_x_u8 (a, b, 2, p);
> + return vdwdupq_x_u8 (a, b, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vdwdupt.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vdwdupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), #[0-9]+(?:
> @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 (mve_pred16_t p)
> +{
> + return vdwdupq_x_u8 (1, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
next prev parent reply other threads:[~2022-11-18 16:36 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-17 16:37 [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
2022-11-17 16:37 ` [PATCH 01/35] arm: improve vcreateq* tests Andrea Corallo
2022-11-18 9:47 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 02/35] arm: fix 'vmsr' spacing and register capitalization Andrea Corallo
2022-11-18 16:33 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 03/35] arm: improve tests and fix vddupq* Andrea Corallo
2022-11-18 16:34 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 04/35] arm: improve tests and fix vdwdupq* Andrea Corallo
2022-11-18 16:35 ` Kyrylo Tkachov [this message]
2022-11-17 16:37 ` [PATCH 05/35] arm: improve vidupq* tests Andrea Corallo
2022-11-18 16:36 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 06/35] arm: improve tests and fix vdupq* Andrea Corallo
2022-11-18 16:37 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 07/35] arm: improve tests and fix vcmp* Andrea Corallo
2022-11-18 16:40 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 08/35] arm: improve tests for vmin* Andrea Corallo
2022-11-18 16:41 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 09/35] arm: improve tests for vmax* Andrea Corallo
2022-11-18 16:42 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 10/35] arm: improve tests for vabavq* Andrea Corallo
2022-11-18 16:43 ` Kyrylo Tkachov
2022-11-21 14:49 ` Andrea Corallo
2022-11-17 16:37 ` [PATCH 11/35] arm: improve tests for vabdq* Andrea Corallo
2022-11-18 16:44 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 12/35] arm: improve tests and fix vabsq* Andrea Corallo
2022-11-18 16:45 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic Andrea Corallo
2022-11-18 16:49 ` Kyrylo Tkachov
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters Andrea Corallo
2022-11-18 16:51 ` Kyrylo Tkachov
2022-11-21 10:46 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515] Andrea Corallo
2022-11-18 16:58 ` Kyrylo Tkachov
2022-11-20 22:49 ` Ramana Radhakrishnan
2022-11-21 14:11 ` Stam Markianos-Wright
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 16/35] arm: Add integer vector overloading of vsubq_x instrinsic Andrea Corallo
2022-11-22 10:00 ` Christophe Lyon
2022-11-22 10:54 ` Andrea Corallo
2022-11-22 16:48 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 17/35] arm: improve tests and fix vadd* Andrea Corallo
2022-11-22 16:49 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 18/35] arm: improve tests for vmulq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 19/35] arm: improve tests and fix vsubq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 20/35] arm: improve tests for vfmasq_m* Andrea Corallo
2022-11-22 16:52 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 21/35] arm: improve tests for vhaddq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 22/35] arm: improve tests for vhsubq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 23/35] arm: improve tests for viwdupq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 24/35] arm: improve tests for vmladavaq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 25/35] arm: improve tests and fix vmlaldavaxq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 26/35] arm: improve tests for vmlasq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 27/35] arm: improve tests for vqaddq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 28/35] arm: improve tests for vqdmlahq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 29/35] arm: improve tests for vqdmul* Andrea Corallo
2022-11-22 16:58 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 30/35] arm: improve tests for vqrdmlahq* Andrea Corallo
2022-11-22 17:01 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 31/35] arm: improve tests for vqrdmlashq_m* Andrea Corallo
2022-11-22 17:02 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 32/35] arm: improve tests for vqsubq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 33/35] arm: improve tests and fix vrmlaldavhaq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 34/35] arm: improve tests for vrshlq* Andrea Corallo
2022-11-22 17:04 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 35/35] arm: improve tests for vsetq_lane* Andrea Corallo
2022-11-22 17:06 ` Kyrylo Tkachov
2022-11-24 14:43 ` [PATCH 35/35 V2] " Andrea Corallo
2022-11-24 15:28 ` Kyrylo Tkachov
2022-11-28 9:20 ` [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
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