From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Andrea Corallo <Andrea.Corallo@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrea Corallo <Andrea.Corallo@arm.com>
Subject: RE: [PATCH 03/35] arm: improve tests and fix vddupq*
Date: Fri, 18 Nov 2022 16:34:53 +0000 [thread overview]
Message-ID: <PAXPR08MB692665739A08CDFFC321437D93099@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20221117163809.1009526-4-andrea.corallo@arm.com>
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 03/35] arm: improve tests and fix vddupq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vddupq_u<mode>_insn): Fix 'vddup.u'
> spacing.
> (mve_vddupq_m_wb_u<mode>_insn): Likewise.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_n_u16.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c : Likewise.
> * gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c : Likewise.
Ok.
Thanks,
Kyrill
> ---
> gcc/config/arm/mve.md | 4 +-
> .../arm/mve/intrinsics/vddupq_m_n_u16.c | 42 +++++++++++++--
> .../arm/mve/intrinsics/vddupq_m_n_u32.c | 46 +++++++++++++---
> .../arm/mve/intrinsics/vddupq_m_n_u8.c | 46 +++++++++++++---
> .../arm/mve/intrinsics/vddupq_m_wb_u16.c | 42 +++++++++++++--
> .../arm/mve/intrinsics/vddupq_m_wb_u32.c | 46 +++++++++++++---
> .../arm/mve/intrinsics/vddupq_m_wb_u8.c | 46 +++++++++++++---
> .../arm/mve/intrinsics/vddupq_n_u16.c | 32 ++++++++++--
> .../arm/mve/intrinsics/vddupq_n_u32.c | 28 +++++++++-
> .../arm/mve/intrinsics/vddupq_n_u8.c | 28 +++++++++-
> .../arm/mve/intrinsics/vddupq_wb_u16.c | 32 ++++++++++--
> .../arm/mve/intrinsics/vddupq_wb_u32.c | 28 +++++++++-
> .../arm/mve/intrinsics/vddupq_wb_u8.c | 28 +++++++++-
> .../arm/mve/intrinsics/vddupq_x_n_u16.c | 42 +++++++++++++--
> .../arm/mve/intrinsics/vddupq_x_n_u32.c | 46 +++++++++++++---
> .../arm/mve/intrinsics/vddupq_x_n_u8.c | 46 +++++++++++++---
> .../arm/mve/intrinsics/vddupq_x_wb_u16.c | 52 +++++++++++++++----
> .../arm/mve/intrinsics/vddupq_x_wb_u32.c | 52 +++++++++++++++----
> .../arm/mve/intrinsics/vddupq_x_wb_u8.c | 52 +++++++++++++++----
> 19 files changed, 642 insertions(+), 96 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 62186f124da..1215f845388 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -9043,7 +9043,7 @@ (define_insn "mve_vddupq_u<mode>_insn"
> (minus:SI (match_dup 2)
> (match_operand:SI 4 "immediate_operand" "i")))]
> "TARGET_HAVE_MVE"
> - "vddup.u%#<V_sz_elem> %q0, %1, %3")
> + "vddup.u%#<V_sz_elem>\t%q0, %1, %3")
>
> ;;
> ;; [vddupq_m_n_u])
> @@ -9079,7 +9079,7 @@ (define_insn
> "mve_vddupq_m_wb_u<mode>_insn"
> (minus:SI (match_dup 3)
> (match_operand:SI 6 "immediate_operand" "i")))]
> "TARGET_HAVE_MVE"
> - "vpst\;\tvddupt.u%#<V_sz_elem>\t%q0, %2, %4"
> + "vpst\;vddupt.u%#<V_sz_elem>\t%q0, %2, %4"
> [(set_attr "length""8")])
>
> ;;
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
> index 7332711f6a7..7c8b0152763 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u16.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
> {
> return vddupq_m_n_u16 (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint32_t a, mve_pred16_t p)
> {
> return vddupq_m (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 (uint16x8_t inactive, mve_pred16_t p)
> +{
> + return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
> index 54ad91f2803..810a1a7e21b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u32.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
> {
> - return vddupq_m_n_u32 (inactive, a, 4, p);
> + return vddupq_m_n_u32 (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32_t a, mve_pred16_t p)
> {
> - return vddupq_m (inactive, a, 4, p);
> + return vddupq_m (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 (uint32x4_t inactive, mve_pred16_t p)
> +{
> + return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
> index 3746b5db6e5..6642b9f4b88 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_n_u8.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
> {
> - return vddupq_m_n_u8 (inactive, a, 4, p);
> + return vddupq_m_n_u8 (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint32_t a, mve_pred16_t p)
> {
> - return vddupq_m (inactive, a, 4, p);
> + return vddupq_m (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 (uint8x16_t inactive, mve_pred16_t p)
> +{
> + return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
> index 8b5d9e86469..cc6a19516d9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u16.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
> {
> return vddupq_m_wb_u16 (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint32_t *a, mve_pred16_t p)
> {
> return vddupq_m (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 (uint16x8_t inactive, mve_pred16_t p)
> +{
> + return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
> index 7a8c363ac70..cd6c6f86eea 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u32.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
> {
> - return vddupq_m_wb_u32 (inactive, a, 4, p);
> + return vddupq_m_wb_u32 (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32_t *a, mve_pred16_t p)
> {
> - return vddupq_m (inactive, a, 4, p);
> + return vddupq_m (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 (uint32x4_t inactive, mve_pred16_t p)
> +{
> + return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
> index 45784a5c9cd..fe186e743da 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_m_wb_u8.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
> {
> - return vddupq_m_wb_u8 (inactive, a, 4, p);
> + return vddupq_m_wb_u8 (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint32_t *a, mve_pred16_t p)
> {
> - return vddupq_m (inactive, a, 4, p);
> + return vddupq_m (inactive, a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 (uint8x16_t inactive, mve_pred16_t p)
> +{
> + return vddupq_m (inactive, 1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
> index 4684e2af553..2dba2d74b61 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u16.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint32_t a)
> {
> - return vddupq_n_u16 (a, 4);
> + return vddupq_n_u16 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint32_t a)
> {
> - return vddupq_u16 (a, 4);
> + return vddupq_u16 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 ()
> +{
> + return vddupq_u16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
> index aeaa83eb6bc..6b5cf6c75b0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u32.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32_t a)
> {
> return vddupq_n_u32 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32_t a)
> {
> return vddupq_u32 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 ()
> +{
> + return vddupq_u32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
> index 255a9f80b6b..174e422f4ef 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_n_u8.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint32_t a)
> {
> return vddupq_n_u8 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint32_t a)
> {
> return vddupq_u8 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 ()
> +{
> + return vddupq_u8 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
> index 40fc6cf2197..6a471a7f72f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u16.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint32_t *a)
> {
> - return vddupq_wb_u16 (a, 4);
> + return vddupq_wb_u16 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint32_t *a)
> {
> - return vddupq_u16 (a, 4);
> + return vddupq_u16 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vddup.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 ()
> +{
> + return vddupq_u16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
> index 09b5b1f2f80..debf420d3e8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u32.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32_t *a)
> {
> return vddupq_wb_u32 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32_t *a)
> {
> return vddupq_u32 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vddup.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 ()
> +{
> + return vddupq_u32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
> index 00dfa906748..8e6ef8adccd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_wb_u8.c
> @@ -1,21 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint32_t *a)
> {
> return vddupq_wb_u8 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint32_t *a)
> {
> return vddupq_u8 (a, 1);
> }
>
> -/* { dg-final { scan-assembler "vddup.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vddup.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 ()
> +{
> + return vddupq_u8 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
> index 5b0fc0b6340..1aafaf87b82 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u16.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint32_t a, mve_pred16_t p)
> {
> return vddupq_x_n_u16 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint32_t a, mve_pred16_t p)
> {
> return vddupq_x_u16 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo2 (mve_pred16_t p)
> +{
> + return vddupq_x_u16 (1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
> index 66def991b65..2e3e268dbee 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u32.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32_t a, mve_pred16_t p)
> {
> - return vddupq_x_n_u32 (a, 4, p);
> + return vddupq_x_n_u32 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32_t a, mve_pred16_t p)
> {
> - return vddupq_x_u32 (a, 4, p);
> + return vddupq_x_u32 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo2 (mve_pred16_t p)
> +{
> + return vddupq_x_u32 (1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
> index 8ac322ed52d..bdf563a8074 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_n_u8.c
> @@ -1,23 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint32_t a, mve_pred16_t p)
> {
> - return vddupq_x_n_u8 (a, 4, p);
> + return vddupq_x_n_u8 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint32_t a, mve_pred16_t p)
> {
> - return vddupq_x_u8 (a, 4, p);
> + return vddupq_x_u8 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8" } } */
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo2 (mve_pred16_t p)
> +{
> + return vddupq_x_u8 (1, 1, p);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
> index 030048f840a..713d8b731c8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u16.c
> @@ -1,25 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> -uint32_t *a;
> -
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> -foo (mve_pred16_t p)
> +foo (uint32_t *a, mve_pred16_t p)
> {
> - return vddupq_x_wb_u16 (a, 2, p);
> + return vddupq_x_wb_u16 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint16x8_t
> +foo1 (uint32_t *a, mve_pred16_t p)
> +{
> + return vddupq_x_u16 (a, 1, p);
> +}
> +
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u16 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> -foo1 (mve_pred16_t p)
> +foo2 (mve_pred16_t p)
> {
> - return vddupq_x_u16 (a, 2, p);
> + return vddupq_x_u16 (1, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
> index 95bf28e4052..9f484b3b8fb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u32.c
> @@ -1,25 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> -uint32_t *a;
> -
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> -foo (mve_pred16_t p)
> +foo (uint32_t *a, mve_pred16_t p)
> {
> - return vddupq_x_wb_u32 (a, 8, p);
> + return vddupq_x_wb_u32 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint32x4_t
> +foo1 (uint32_t *a, mve_pred16_t p)
> +{
> + return vddupq_x_u32 (a, 1, p);
> +}
> +
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u32 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> -foo1 (mve_pred16_t p)
> +foo2 (mve_pred16_t p)
> {
> - return vddupq_x_u32 (a, 8, p);
> + return vddupq_x_u32 (1, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
> index 2fe81dded55..aa83bfed125 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vddupq_x_wb_u8.c
> @@ -1,25 +1,57 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> -uint32_t *a;
> -
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> -foo (mve_pred16_t p)
> +foo (uint32_t *a, mve_pred16_t p)
> {
> - return vddupq_x_wb_u8 (a, 8, p);
> + return vddupq_x_wb_u8 (a, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> +uint8x16_t
> +foo1 (uint32_t *a, mve_pred16_t p)
> +{
> + return vddupq_x_u8 (a, 1, p);
> +}
> +
> +/*
> +**foo2:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vddupt.u8 q[0-9]+, (?:ip|fp|r[0-9]+), #[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> -foo1 (mve_pred16_t p)
> +foo2 (mve_pred16_t p)
> {
> - return vddupq_x_u8 (a, 8, p);
> + return vddupq_x_u8 (1, 1, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vddupt.u8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
next prev parent reply other threads:[~2022-11-18 16:35 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-17 16:37 [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
2022-11-17 16:37 ` [PATCH 01/35] arm: improve vcreateq* tests Andrea Corallo
2022-11-18 9:47 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 02/35] arm: fix 'vmsr' spacing and register capitalization Andrea Corallo
2022-11-18 16:33 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 03/35] arm: improve tests and fix vddupq* Andrea Corallo
2022-11-18 16:34 ` Kyrylo Tkachov [this message]
2022-11-17 16:37 ` [PATCH 04/35] arm: improve tests and fix vdwdupq* Andrea Corallo
2022-11-18 16:35 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 05/35] arm: improve vidupq* tests Andrea Corallo
2022-11-18 16:36 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 06/35] arm: improve tests and fix vdupq* Andrea Corallo
2022-11-18 16:37 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 07/35] arm: improve tests and fix vcmp* Andrea Corallo
2022-11-18 16:40 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 08/35] arm: improve tests for vmin* Andrea Corallo
2022-11-18 16:41 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 09/35] arm: improve tests for vmax* Andrea Corallo
2022-11-18 16:42 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 10/35] arm: improve tests for vabavq* Andrea Corallo
2022-11-18 16:43 ` Kyrylo Tkachov
2022-11-21 14:49 ` Andrea Corallo
2022-11-17 16:37 ` [PATCH 11/35] arm: improve tests for vabdq* Andrea Corallo
2022-11-18 16:44 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 12/35] arm: improve tests and fix vabsq* Andrea Corallo
2022-11-18 16:45 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic Andrea Corallo
2022-11-18 16:49 ` Kyrylo Tkachov
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters Andrea Corallo
2022-11-18 16:51 ` Kyrylo Tkachov
2022-11-21 10:46 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515] Andrea Corallo
2022-11-18 16:58 ` Kyrylo Tkachov
2022-11-20 22:49 ` Ramana Radhakrishnan
2022-11-21 14:11 ` Stam Markianos-Wright
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 16/35] arm: Add integer vector overloading of vsubq_x instrinsic Andrea Corallo
2022-11-22 10:00 ` Christophe Lyon
2022-11-22 10:54 ` Andrea Corallo
2022-11-22 16:48 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 17/35] arm: improve tests and fix vadd* Andrea Corallo
2022-11-22 16:49 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 18/35] arm: improve tests for vmulq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 19/35] arm: improve tests and fix vsubq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 20/35] arm: improve tests for vfmasq_m* Andrea Corallo
2022-11-22 16:52 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 21/35] arm: improve tests for vhaddq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 22/35] arm: improve tests for vhsubq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 23/35] arm: improve tests for viwdupq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 24/35] arm: improve tests for vmladavaq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 25/35] arm: improve tests and fix vmlaldavaxq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 26/35] arm: improve tests for vmlasq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 27/35] arm: improve tests for vqaddq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 28/35] arm: improve tests for vqdmlahq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 29/35] arm: improve tests for vqdmul* Andrea Corallo
2022-11-22 16:58 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 30/35] arm: improve tests for vqrdmlahq* Andrea Corallo
2022-11-22 17:01 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 31/35] arm: improve tests for vqrdmlashq_m* Andrea Corallo
2022-11-22 17:02 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 32/35] arm: improve tests for vqsubq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 33/35] arm: improve tests and fix vrmlaldavhaq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 34/35] arm: improve tests for vrshlq* Andrea Corallo
2022-11-22 17:04 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 35/35] arm: improve tests for vsetq_lane* Andrea Corallo
2022-11-22 17:06 ` Kyrylo Tkachov
2022-11-24 14:43 ` [PATCH 35/35 V2] " Andrea Corallo
2022-11-24 15:28 ` Kyrylo Tkachov
2022-11-28 9:20 ` [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
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