From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Andrea Corallo <Andrea.Corallo@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrea Corallo <Andrea.Corallo@arm.com>
Subject: RE: [PATCH 25/35] arm: improve tests and fix vmlaldavaxq*
Date: Tue, 22 Nov 2022 16:56:07 +0000 [thread overview]
Message-ID: <PAXPR08MB6926340BC80232A65753A9C6930D9@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20221117163809.1009526-26-andrea.corallo@arm.com>
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 25/35] arm: improve tests and fix vmlaldavaxq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
> (mve_vmlaldavaxq_s<mode>, mve_vmlaldavaxq_p_<supf><mode>):
> Fix
> spacing vs tabs.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c: Improve
> tests.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> gcc/config/arm/mve.md | 6 ++--
> .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 32 +++++++++++++++----
> .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 32 +++++++++++++++----
> .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 24 ++++++++++----
> .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 24 ++++++++++----
> 5 files changed, 91 insertions(+), 27 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 714dc6fc7ce..d2ffae6a425 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -4163,7 +4163,7 @@ (define_insn "mve_vmlaldavaq_<supf><mode>"
> VMLALDAVAQ))
> ]
> "TARGET_HAVE_MVE"
> - "vmlaldava.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
> + "vmlaldava.<supf>%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
> [(set_attr "type" "mve_move")
> ])
>
> @@ -4179,7 +4179,7 @@ (define_insn "mve_vmlaldavaxq_s<mode>"
> VMLALDAVAXQ_S))
> ]
> "TARGET_HAVE_MVE"
> - "vmlaldavax.s%#<V_sz_elem> %Q0, %R0, %q2, %q3"
> + "vmlaldavax.s%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
> [(set_attr "type" "mve_move")
> ])
>
> @@ -6126,7 +6126,7 @@ (define_insn
> "mve_vmlaldavaxq_p_<supf><mode>"
> VMLALDAVAXQ_P))
> ]
> "TARGET_HAVE_MVE"
> - "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem> %Q0, %R0, %q2, %q3"
> + "vpst\;vmlaldavaxt.<supf>%#<V_sz_elem>\t%Q0, %R0, %q2, %q3"
> [(set_attr "type" "mve_move")
> (set_attr "length""8")])
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
> index f33d3880236..87f0354a636 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+,
> q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64_t
> -foo (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
> +foo (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
> {
> - return vmlaldavaxq_p_s16 (a, b, c, p);
> + return vmlaldavaxq_p_s16 (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmlaldavaxt.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+,
> q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64_t
> -foo1 (int64_t a, int16x8_t b, int16x8_t c, mve_pred16_t p)
> +foo1 (int64_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
> {
> - return vmlaldavaxq_p (a, b, c, p);
> + return vmlaldavaxq_p (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavaxt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
> index ab072a9850e..d26bf5b90af 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_p_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+,
> q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64_t
> -foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
> +foo (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
> {
> - return vmlaldavaxq_p_s32 (a, b, c, p);
> + return vmlaldavaxq_p_s32 (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmlaldavaxt.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+,
> q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64_t
> -foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
> +foo1 (int64_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
> {
> - return vmlaldavaxq_p (a, b, c, p);
> + return vmlaldavaxq_p (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavaxt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
> index e68fbd2df94..3a37e7a58a9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:
> @.*|)
> +** ...
> +*/
> int64_t
> -foo (int64_t a, int16x8_t b, int16x8_t c)
> +foo (int64_t add, int16x8_t m1, int16x8_t m2)
> {
> - return vmlaldavaxq_s16 (a, b, c);
> + return vmlaldavaxq_s16 (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavax.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmlaldavax.s16 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:
> @.*|)
> +** ...
> +*/
> int64_t
> -foo1 (int64_t a, int16x8_t b, int16x8_t c)
> +foo1 (int64_t add, int16x8_t m1, int16x8_t m2)
> {
> - return vmlaldavaxq (a, b, c);
> + return vmlaldavaxq (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavax.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
> index 7b6fea289da..155b8be70f0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmlaldavaxq_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:
> @.*|)
> +** ...
> +*/
> int64_t
> -foo (int64_t a, int32x4_t b, int32x4_t c)
> +foo (int64_t add, int32x4_t m1, int32x4_t m2)
> {
> - return vmlaldavaxq_s32 (a, b, c);
> + return vmlaldavaxq_s32 (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavax.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmlaldavax.s32 (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:
> @.*|)
> +** ...
> +*/
> int64_t
> -foo1 (int64_t a, int32x4_t b, int32x4_t c)
> +foo1 (int64_t add, int32x4_t m1, int32x4_t m2)
> {
> - return vmlaldavaxq (a, b, c);
> + return vmlaldavaxq (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vmlaldavax.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
next prev parent reply other threads:[~2022-11-22 16:56 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-17 16:37 [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
2022-11-17 16:37 ` [PATCH 01/35] arm: improve vcreateq* tests Andrea Corallo
2022-11-18 9:47 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 02/35] arm: fix 'vmsr' spacing and register capitalization Andrea Corallo
2022-11-18 16:33 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 03/35] arm: improve tests and fix vddupq* Andrea Corallo
2022-11-18 16:34 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 04/35] arm: improve tests and fix vdwdupq* Andrea Corallo
2022-11-18 16:35 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 05/35] arm: improve vidupq* tests Andrea Corallo
2022-11-18 16:36 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 06/35] arm: improve tests and fix vdupq* Andrea Corallo
2022-11-18 16:37 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 07/35] arm: improve tests and fix vcmp* Andrea Corallo
2022-11-18 16:40 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 08/35] arm: improve tests for vmin* Andrea Corallo
2022-11-18 16:41 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 09/35] arm: improve tests for vmax* Andrea Corallo
2022-11-18 16:42 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 10/35] arm: improve tests for vabavq* Andrea Corallo
2022-11-18 16:43 ` Kyrylo Tkachov
2022-11-21 14:49 ` Andrea Corallo
2022-11-17 16:37 ` [PATCH 11/35] arm: improve tests for vabdq* Andrea Corallo
2022-11-18 16:44 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 12/35] arm: improve tests and fix vabsq* Andrea Corallo
2022-11-18 16:45 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic Andrea Corallo
2022-11-18 16:49 ` Kyrylo Tkachov
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters Andrea Corallo
2022-11-18 16:51 ` Kyrylo Tkachov
2022-11-21 10:46 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515] Andrea Corallo
2022-11-18 16:58 ` Kyrylo Tkachov
2022-11-20 22:49 ` Ramana Radhakrishnan
2022-11-21 14:11 ` Stam Markianos-Wright
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 16/35] arm: Add integer vector overloading of vsubq_x instrinsic Andrea Corallo
2022-11-22 10:00 ` Christophe Lyon
2022-11-22 10:54 ` Andrea Corallo
2022-11-22 16:48 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 17/35] arm: improve tests and fix vadd* Andrea Corallo
2022-11-22 16:49 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 18/35] arm: improve tests for vmulq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 19/35] arm: improve tests and fix vsubq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 20/35] arm: improve tests for vfmasq_m* Andrea Corallo
2022-11-22 16:52 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 21/35] arm: improve tests for vhaddq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 22/35] arm: improve tests for vhsubq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 23/35] arm: improve tests for viwdupq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 24/35] arm: improve tests for vmladavaq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 25/35] arm: improve tests and fix vmlaldavaxq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov [this message]
2022-11-17 16:38 ` [PATCH 26/35] arm: improve tests for vmlasq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 27/35] arm: improve tests for vqaddq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 28/35] arm: improve tests for vqdmlahq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 29/35] arm: improve tests for vqdmul* Andrea Corallo
2022-11-22 16:58 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 30/35] arm: improve tests for vqrdmlahq* Andrea Corallo
2022-11-22 17:01 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 31/35] arm: improve tests for vqrdmlashq_m* Andrea Corallo
2022-11-22 17:02 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 32/35] arm: improve tests for vqsubq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 33/35] arm: improve tests and fix vrmlaldavhaq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 34/35] arm: improve tests for vrshlq* Andrea Corallo
2022-11-22 17:04 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 35/35] arm: improve tests for vsetq_lane* Andrea Corallo
2022-11-22 17:06 ` Kyrylo Tkachov
2022-11-24 14:43 ` [PATCH 35/35 V2] " Andrea Corallo
2022-11-24 15:28 ` Kyrylo Tkachov
2022-11-28 9:20 ` [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=PAXPR08MB6926340BC80232A65753A9C6930D9@PAXPR08MB6926.eurprd08.prod.outlook.com \
--to=kyrylo.tkachov@arm.com \
--cc=Andrea.Corallo@arm.com \
--cc=Richard.Earnshaw@arm.com \
--cc=gcc-patches@gcc.gnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).