From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Andrea Corallo <Andrea.Corallo@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrea Corallo <Andrea.Corallo@arm.com>
Subject: RE: [PATCH 01/35] arm: improve vcreateq* tests
Date: Fri, 18 Nov 2022 09:47:58 +0000 [thread overview]
Message-ID: <PAXPR08MB6926AFDE9DB931F03556AEF393099@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20221117163809.1009526-2-andrea.corallo@arm.com>
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 01/35] arm: improve vcreateq* tests
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
> ---
> .../arm/mve/intrinsics/vcreateq_f16.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_f32.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_s16.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_s32.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_s64.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_s8.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_u16.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_u32.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_u64.c | 23 ++++++++++++++++++-
> .../arm/mve/intrinsics/vcreateq_u8.c | 23 ++++++++++++++++++-
> 10 files changed, 220 insertions(+), 10 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
> index fb3601edb94..c39303daa03 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
Eventually I'd like to see these tests tightened to match more specific codegen for the tests that have only one intrinsic call in their body, but I appreciate the codegen for many of these is still immature and there are softfp/hard ABI differences as well.
This patch is definitely an improvement over what's there now though, so ok.
Thanks,
Kyrill
> +*/
> float16x8_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +float16x8_t
> +foo1 ()
> +{
> + return vcreateq_f16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
> index 4f4da62eed7..ad66f4407cd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> float32x4_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +float32x4_t
> +foo1 ()
> +{
> + return vcreateq_f32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
> index 103be6310bd..7e70a486513 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> int16x8_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +int16x8_t
> +foo1 ()
> +{
> + return vcreateq_s16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
> index 96f7a972d93..ffcfc80ff40 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> int32x4_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +int32x4_t
> +foo1 ()
> +{
> + return vcreateq_s32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
> index 74c554506c0..26642f9cd68 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> int64x2_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_s64 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +int64x2_t
> +foo1 ()
> +{
> + return vcreateq_s64 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
> index 03c50a0928a..7e7e4d5948d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> int8x16_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +int8x16_t
> +foo1 ()
> +{
> + return vcreateq_s8 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
> index 411cec8471e..858a3a4546f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> uint16x8_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +uint16x8_t
> +foo1 ()
> +{
> + return vcreateq_u16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
> index 8bc8f60640e..5f27cf68845 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> uint32x4_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +uint32x4_t
> +foo1 ()
> +{
> + return vcreateq_u32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
> index e74641c32f3..78553dec701 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> uint64x2_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_u64 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +uint64x2_t
> +foo1 ()
> +{
> + return vcreateq_u64 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
> index de79f471d63..4a8ab61f865 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
> @@ -1,13 +1,34 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> uint8x16_t
> foo (uint64_t a, uint64_t b)
> {
> return vcreateq_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmov" } } */
> +/*
> +**foo1:
> +** ...
> +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +** ...
> +*/
> +uint8x16_t
> +foo1 ()
> +{
> + return vcreateq_u8 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
next prev parent reply other threads:[~2022-11-18 9:48 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-17 16:37 [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
2022-11-17 16:37 ` [PATCH 01/35] arm: improve vcreateq* tests Andrea Corallo
2022-11-18 9:47 ` Kyrylo Tkachov [this message]
2022-11-17 16:37 ` [PATCH 02/35] arm: fix 'vmsr' spacing and register capitalization Andrea Corallo
2022-11-18 16:33 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 03/35] arm: improve tests and fix vddupq* Andrea Corallo
2022-11-18 16:34 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 04/35] arm: improve tests and fix vdwdupq* Andrea Corallo
2022-11-18 16:35 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 05/35] arm: improve vidupq* tests Andrea Corallo
2022-11-18 16:36 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 06/35] arm: improve tests and fix vdupq* Andrea Corallo
2022-11-18 16:37 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 07/35] arm: improve tests and fix vcmp* Andrea Corallo
2022-11-18 16:40 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 08/35] arm: improve tests for vmin* Andrea Corallo
2022-11-18 16:41 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 09/35] arm: improve tests for vmax* Andrea Corallo
2022-11-18 16:42 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 10/35] arm: improve tests for vabavq* Andrea Corallo
2022-11-18 16:43 ` Kyrylo Tkachov
2022-11-21 14:49 ` Andrea Corallo
2022-11-17 16:37 ` [PATCH 11/35] arm: improve tests for vabdq* Andrea Corallo
2022-11-18 16:44 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 12/35] arm: improve tests and fix vabsq* Andrea Corallo
2022-11-18 16:45 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic Andrea Corallo
2022-11-18 16:49 ` Kyrylo Tkachov
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters Andrea Corallo
2022-11-18 16:51 ` Kyrylo Tkachov
2022-11-21 10:46 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515] Andrea Corallo
2022-11-18 16:58 ` Kyrylo Tkachov
2022-11-20 22:49 ` Ramana Radhakrishnan
2022-11-21 14:11 ` Stam Markianos-Wright
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 16/35] arm: Add integer vector overloading of vsubq_x instrinsic Andrea Corallo
2022-11-22 10:00 ` Christophe Lyon
2022-11-22 10:54 ` Andrea Corallo
2022-11-22 16:48 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 17/35] arm: improve tests and fix vadd* Andrea Corallo
2022-11-22 16:49 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 18/35] arm: improve tests for vmulq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 19/35] arm: improve tests and fix vsubq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 20/35] arm: improve tests for vfmasq_m* Andrea Corallo
2022-11-22 16:52 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 21/35] arm: improve tests for vhaddq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 22/35] arm: improve tests for vhsubq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 23/35] arm: improve tests for viwdupq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 24/35] arm: improve tests for vmladavaq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 25/35] arm: improve tests and fix vmlaldavaxq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 26/35] arm: improve tests for vmlasq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 27/35] arm: improve tests for vqaddq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 28/35] arm: improve tests for vqdmlahq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 29/35] arm: improve tests for vqdmul* Andrea Corallo
2022-11-22 16:58 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 30/35] arm: improve tests for vqrdmlahq* Andrea Corallo
2022-11-22 17:01 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 31/35] arm: improve tests for vqrdmlashq_m* Andrea Corallo
2022-11-22 17:02 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 32/35] arm: improve tests for vqsubq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 33/35] arm: improve tests and fix vrmlaldavhaq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 34/35] arm: improve tests for vrshlq* Andrea Corallo
2022-11-22 17:04 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 35/35] arm: improve tests for vsetq_lane* Andrea Corallo
2022-11-22 17:06 ` Kyrylo Tkachov
2022-11-24 14:43 ` [PATCH 35/35 V2] " Andrea Corallo
2022-11-24 15:28 ` Kyrylo Tkachov
2022-11-28 9:20 ` [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
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