From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Andrea Corallo <Andrea.Corallo@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrea Corallo <Andrea.Corallo@arm.com>
Subject: RE: [PATCH 28/35] arm: improve tests for vqdmlahq_m*
Date: Tue, 22 Nov 2022 16:57:38 +0000 [thread overview]
Message-ID: <PAXPR08MB6926A0137B883B0BA3FB5017930D9@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20221117163809.1009526-29-andrea.corallo@arm.com>
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 28/35] arm: improve tests for vqdmlahq_m*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqdmlahq_m_n_s16.c | 34 ++++++++++++++-----
> .../arm/mve/intrinsics/vqdmlahq_m_n_s32.c | 34 ++++++++++++++-----
> .../arm/mve/intrinsics/vqdmlahq_m_n_s8.c | 34 ++++++++++++++-----
> .../arm/mve/intrinsics/vqdmlahq_n_s16.c | 24 +++++++++----
> .../arm/mve/intrinsics/vqdmlahq_n_s32.c | 24 +++++++++----
> .../arm/mve/intrinsics/vqdmlahq_n_s8.c | 24 +++++++++----
> .../arm/mve/intrinsics/vqdmlashq_m_n_s16.c | 34 ++++++++++++++-----
> .../arm/mve/intrinsics/vqdmlashq_m_n_s32.c | 34 ++++++++++++++-----
> .../arm/mve/intrinsics/vqdmlashq_m_n_s8.c | 34 ++++++++++++++-----
> .../arm/mve/intrinsics/vqdmlashq_n_s16.c | 24 +++++++++----
> .../arm/mve/intrinsics/vqdmlashq_n_s32.c | 24 +++++++++----
> .../arm/mve/intrinsics/vqdmlashq_n_s8.c | 24 +++++++++----
> 12 files changed, 264 insertions(+), 84 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
> index d8c4f4bab8e..94d93874542 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
> +foo (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
> {
> - return vqdmlahq_m_n_s16 (a, b, c, p);
> + return vqdmlahq_m_n_s16 (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlaht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlaht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
> +foo1 (int16x8_t add, int16x8_t m1, int16_t m2, mve_pred16_t p)
> {
> - return vqdmlahq_m (a, b, c, p);
> + return vqdmlahq_m (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlaht.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
> index 361f5d00bdf..a3dab7fa02e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
> +foo (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
> {
> - return vqdmlahq_m_n_s32 (a, b, c, p);
> + return vqdmlahq_m_n_s32 (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlaht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlaht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
> +foo1 (int32x4_t add, int32x4_t m1, int32_t m2, mve_pred16_t p)
> {
> - return vqdmlahq_m (a, b, c, p);
> + return vqdmlahq_m (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlaht.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
> index a9eaea89ba4..610580478a3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_m_n_s8.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
> +foo (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
> {
> - return vqdmlahq_m_n_s8 (a, b, c, p);
> + return vqdmlahq_m_n_s8 (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlaht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlaht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
> +foo1 (int8x16_t add, int8x16_t m1, int8_t m2, mve_pred16_t p)
> {
> - return vqdmlahq_m (a, b, c, p);
> + return vqdmlahq_m (add, m1, m2, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlaht.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
> index c109dd47444..210bacec2fb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo (int16x8_t a, int16x8_t b, int16_t c)
> +foo (int16x8_t add, int16x8_t m1, int16_t m2)
> {
> - return vqdmlahq_n_s16 (a, b, c);
> + return vqdmlahq_n_s16 (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vqdmlah.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlah.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo1 (int16x8_t a, int16x8_t b, int16_t c)
> +foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
> {
> - return vqdmlahq (a, b, c);
> + return vqdmlahq (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vqdmlah.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
> index 752d9d9e3e0..dbb2494b216 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo (int32x4_t a, int32x4_t b, int32_t c)
> +foo (int32x4_t add, int32x4_t m1, int32_t m2)
> {
> - return vqdmlahq_n_s32 (a, b, c);
> + return vqdmlahq_n_s32 (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vqdmlah.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlah.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo1 (int32x4_t a, int32x4_t b, int32_t c)
> +foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
> {
> - return vqdmlahq (a, b, c);
> + return vqdmlahq (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vqdmlah.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
> index 8dffa0e1852..a7962f82d38 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo (int8x16_t a, int8x16_t b, int8_t c)
> +foo (int8x16_t add, int8x16_t m1, int8_t m2)
> {
> - return vqdmlahq_n_s8 (a, b, c);
> + return vqdmlahq_n_s8 (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vqdmlah.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlah.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo1 (int8x16_t a, int8x16_t b, int8_t c)
> +foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
> {
> - return vqdmlahq (a, b, c);
> + return vqdmlahq (add, m1, m2);
> }
>
> -/* { dg-final { scan-assembler "vqdmlah.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
> index 7c2e5cf89dd..34d407f0142 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlasht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
> +foo (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
> {
> - return vqdmlashq_m_n_s16 (a, b, c, p);
> + return vqdmlashq_m_n_s16 (m1, m2, add, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlasht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlasht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo1 (int16x8_t a, int16x8_t b, int16_t c, mve_pred16_t p)
> +foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
> {
> - return vqdmlashq_m (a, b, c, p);
> + return vqdmlashq_m (m1, m2, add, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlasht.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
> index cea9d9b683f..50a665ea7e5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlasht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
> +foo (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
> {
> - return vqdmlashq_m_n_s32 (a, b, c, p);
> + return vqdmlashq_m_n_s32 (m1, m2, add, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlasht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlasht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo1 (int32x4_t a, int32x4_t b, int32_t c, mve_pred16_t p)
> +foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
> {
> - return vqdmlashq_m (a, b, c, p);
> + return vqdmlashq_m (m1, m2, add, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlasht.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
> index 83ee258876a..45f34b60382 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlasht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
> +foo (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
> {
> - return vqdmlashq_m_n_s8 (a, b, c, p);
> + return vqdmlashq_m_n_s8 (m1, m2, add, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlasht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlasht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo1 (int8x16_t a, int8x16_t b, int8_t c, mve_pred16_t p)
> +foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
> {
> - return vqdmlashq_m (a, b, c, p);
> + return vqdmlashq_m (m1, m2, add, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlasht.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
> index c71a61c54f6..a3f1ae8d6b8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo (int16x8_t a, int16x8_t b, int16_t c)
> +foo (int16x8_t m1, int16x8_t m2, int16_t add)
> {
> - return vqdmlashq_n_s16 (a, b, c);
> + return vqdmlashq_n_s16 (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqdmlash.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo1 (int16x8_t a, int16x8_t b, int16_t c)
> +foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
> {
> - return vqdmlashq (a, b, c);
> + return vqdmlashq (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqdmlash.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
> index 61f6c6671cc..cf867e56874 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo (int32x4_t a, int32x4_t b, int32_t c)
> +foo (int32x4_t m1, int32x4_t m2, int32_t add)
> {
> - return vqdmlashq_n_s32 (a, b, c);
> + return vqdmlashq_n_s32 (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqdmlash.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo1 (int32x4_t a, int32x4_t b, int32_t c)
> +foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
> {
> - return vqdmlashq (a, b, c);
> + return vqdmlashq (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqdmlash.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
> index a07892863c1..7e9362cab60 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo (int8x16_t a, int8x16_t b, int8_t c)
> +foo (int8x16_t m1, int8x16_t m2, int8_t add)
> {
> - return vqdmlashq_n_s8 (a, b, c);
> + return vqdmlashq_n_s8 (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqdmlash.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo1 (int8x16_t a, int8x16_t b, int8_t c)
> +foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
> {
> - return vqdmlashq (a, b, c);
> + return vqdmlashq (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqdmlash.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
next prev parent reply other threads:[~2022-11-22 16:57 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-17 16:37 [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
2022-11-17 16:37 ` [PATCH 01/35] arm: improve vcreateq* tests Andrea Corallo
2022-11-18 9:47 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 02/35] arm: fix 'vmsr' spacing and register capitalization Andrea Corallo
2022-11-18 16:33 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 03/35] arm: improve tests and fix vddupq* Andrea Corallo
2022-11-18 16:34 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 04/35] arm: improve tests and fix vdwdupq* Andrea Corallo
2022-11-18 16:35 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 05/35] arm: improve vidupq* tests Andrea Corallo
2022-11-18 16:36 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 06/35] arm: improve tests and fix vdupq* Andrea Corallo
2022-11-18 16:37 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 07/35] arm: improve tests and fix vcmp* Andrea Corallo
2022-11-18 16:40 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 08/35] arm: improve tests for vmin* Andrea Corallo
2022-11-18 16:41 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 09/35] arm: improve tests for vmax* Andrea Corallo
2022-11-18 16:42 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 10/35] arm: improve tests for vabavq* Andrea Corallo
2022-11-18 16:43 ` Kyrylo Tkachov
2022-11-21 14:49 ` Andrea Corallo
2022-11-17 16:37 ` [PATCH 11/35] arm: improve tests for vabdq* Andrea Corallo
2022-11-18 16:44 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 12/35] arm: improve tests and fix vabsq* Andrea Corallo
2022-11-18 16:45 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic Andrea Corallo
2022-11-18 16:49 ` Kyrylo Tkachov
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters Andrea Corallo
2022-11-18 16:51 ` Kyrylo Tkachov
2022-11-21 10:46 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515] Andrea Corallo
2022-11-18 16:58 ` Kyrylo Tkachov
2022-11-20 22:49 ` Ramana Radhakrishnan
2022-11-21 14:11 ` Stam Markianos-Wright
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 16/35] arm: Add integer vector overloading of vsubq_x instrinsic Andrea Corallo
2022-11-22 10:00 ` Christophe Lyon
2022-11-22 10:54 ` Andrea Corallo
2022-11-22 16:48 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 17/35] arm: improve tests and fix vadd* Andrea Corallo
2022-11-22 16:49 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 18/35] arm: improve tests for vmulq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 19/35] arm: improve tests and fix vsubq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 20/35] arm: improve tests for vfmasq_m* Andrea Corallo
2022-11-22 16:52 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 21/35] arm: improve tests for vhaddq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 22/35] arm: improve tests for vhsubq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 23/35] arm: improve tests for viwdupq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 24/35] arm: improve tests for vmladavaq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 25/35] arm: improve tests and fix vmlaldavaxq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 26/35] arm: improve tests for vmlasq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 27/35] arm: improve tests for vqaddq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 28/35] arm: improve tests for vqdmlahq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov [this message]
2022-11-17 16:38 ` [PATCH 29/35] arm: improve tests for vqdmul* Andrea Corallo
2022-11-22 16:58 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 30/35] arm: improve tests for vqrdmlahq* Andrea Corallo
2022-11-22 17:01 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 31/35] arm: improve tests for vqrdmlashq_m* Andrea Corallo
2022-11-22 17:02 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 32/35] arm: improve tests for vqsubq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 33/35] arm: improve tests and fix vrmlaldavhaq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 34/35] arm: improve tests for vrshlq* Andrea Corallo
2022-11-22 17:04 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 35/35] arm: improve tests for vsetq_lane* Andrea Corallo
2022-11-22 17:06 ` Kyrylo Tkachov
2022-11-24 14:43 ` [PATCH 35/35 V2] " Andrea Corallo
2022-11-24 15:28 ` Kyrylo Tkachov
2022-11-28 9:20 ` [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
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