From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Andrea Corallo <Andrea.Corallo@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrea Corallo <Andrea.Corallo@arm.com>
Subject: RE: [PATCH 12/35] arm: improve tests and fix vabsq*
Date: Fri, 18 Nov 2022 16:45:03 +0000 [thread overview]
Message-ID: <PAXPR08MB69266E3A43A65B22A125C70293099@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20221117163809.1009526-13-andrea.corallo@arm.com>
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 12/35] arm: improve tests and fix vabsq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vabsq_f<mode>): Fix spacing.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vabsq_f16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vabsq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vabsq_x_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> gcc/config/arm/mve.md | 2 +-
> .../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 22 +++++++++++++++-
> .../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 22 +++++++++++++++-
> .../arm/mve/intrinsics/vabsq_m_f16.c | 25 ++++++++++++++++---
> .../arm/mve/intrinsics/vabsq_m_f32.c | 25 ++++++++++++++++---
> .../arm/mve/intrinsics/vabsq_m_s16.c | 25 ++++++++++++++++---
> .../arm/mve/intrinsics/vabsq_m_s32.c | 25 ++++++++++++++++---
> .../arm/mve/intrinsics/vabsq_m_s8.c | 25 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vabsq_s16.c | 20 ++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vabsq_s32.c | 20 ++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vabsq_s8.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vabsq_x_f16.c | 25 ++++++++++++++++---
> .../arm/mve/intrinsics/vabsq_x_f32.c | 25 ++++++++++++++++---
> .../arm/mve/intrinsics/vabsq_x_s16.c | 25 ++++++++++++++++---
> .../arm/mve/intrinsics/vabsq_x_s32.c | 25 ++++++++++++++++---
> .../arm/mve/intrinsics/vabsq_x_s8.c | 25 ++++++++++++++++---
> 16 files changed, 309 insertions(+), 43 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 3330a220aea..bc4e2f2ac21 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -279,7 +279,7 @@ (define_insn "mve_vabsq_f<mode>"
> (abs:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
> ]
> "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
> - "vabs.f%#<V_sz_elem> %q0, %q1"
> + "vabs.f%#<V_sz_elem>\t%q0, %q1"
> [(set_attr "type" "mve_move")
> ])
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
> index 08e141baedc..f29ada8c058 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f16.c
> @@ -1,13 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vabs.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a)
> {
> return vabsq_f16 (a);
> }
>
> -/* { dg-final { scan-assembler "vabs.f16" } } */
> +
> +/*
> +**foo1:
> +** ...
> +** vabs.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> +float16x8_t
> +foo1 (float16x8_t a)
> +{
> + return vabsq (a);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
> index 3614a44fbdc..cc24744fb26 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_f32.c
> @@ -1,13 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vabs.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a)
> {
> return vabsq_f32 (a);
> }
>
> -/* { dg-final { scan-assembler "vabs.f32" } } */
> +
> +/*
> +**foo1:
> +** ...
> +** vabs.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> +float32x4_t
> +foo1 (float32x4_t a)
> +{
> + return vabsq (a);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
> index 30c14a151af..21cf284d045 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f16.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
> {
> return vabsq_m_f16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
> {
> return vabsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
> index 652056aa98c..236830b3a9e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_f32.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
> {
> return vabsq_m_f32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
> {
> return vabsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
> index 2dcf488bd0d..22f7b37b30b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s16.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vabsq_m_s16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vabsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
> index 183909fef93..b3021edf52b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s32.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vabsq_m_s32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vabsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
> index cd17974838e..da9ff2f978a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_m_s8.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vabsq_m_s8 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vabsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
> index 243afebc38c..84906302c8a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s16.c
> @@ -1,21 +1,33 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vabs.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a)
> {
> return vabsq_s16 (a);
> }
>
> -/* { dg-final { scan-assembler "vabs.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vabs.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a)
> {
> return vabsq (a);
> }
>
> -/* { dg-final { scan-assembler "vabs.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
> index d9843503a48..117c787d595 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s32.c
> @@ -1,21 +1,33 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vabs.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a)
> {
> return vabsq_s32 (a);
> }
>
> -/* { dg-final { scan-assembler "vabs.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vabs.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a)
> {
> return vabsq (a);
> }
>
> -/* { dg-final { scan-assembler "vabs.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
> index 93bf1520dd3..a7f1413505c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_s8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vabs.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a)
> {
> return vabsq_s8 (a);
> }
>
> -/* { dg-final { scan-assembler "vabs.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vabs.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a)
> {
> return vabsq (a);
> }
>
> -/* { dg-final { scan-assembler "vabs.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
> index d1fc7002ccb..f24a8cccb53 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f16.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, mve_pred16_t p)
> {
> return vabsq_x_f16 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, mve_pred16_t p)
> {
> return vabsq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
> index 0beccac030d..fd4c2277969 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_f32.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, mve_pred16_t p)
> {
> return vabsq_x_f32 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, mve_pred16_t p)
> {
> return vabsq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
> index fd67fd5ccac..0e1d1bb94d4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s16.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, mve_pred16_t p)
> {
> return vabsq_x_s16 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, mve_pred16_t p)
> {
> return vabsq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
> index 22d561d1e46..64d0e4b574d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s32.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, mve_pred16_t p)
> {
> return vabsq_x_s32 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, mve_pred16_t p)
> {
> return vabsq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
> index 6908a6ca20c..742bc701fae 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vabsq_x_s8.c
> @@ -1,22 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, mve_pred16_t p)
> {
> return vabsq_x_s8 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vabst.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vabst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, mve_pred16_t p)
> {
> return vabsq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
next prev parent reply other threads:[~2022-11-18 16:45 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-17 16:37 [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
2022-11-17 16:37 ` [PATCH 01/35] arm: improve vcreateq* tests Andrea Corallo
2022-11-18 9:47 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 02/35] arm: fix 'vmsr' spacing and register capitalization Andrea Corallo
2022-11-18 16:33 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 03/35] arm: improve tests and fix vddupq* Andrea Corallo
2022-11-18 16:34 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 04/35] arm: improve tests and fix vdwdupq* Andrea Corallo
2022-11-18 16:35 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 05/35] arm: improve vidupq* tests Andrea Corallo
2022-11-18 16:36 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 06/35] arm: improve tests and fix vdupq* Andrea Corallo
2022-11-18 16:37 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 07/35] arm: improve tests and fix vcmp* Andrea Corallo
2022-11-18 16:40 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 08/35] arm: improve tests for vmin* Andrea Corallo
2022-11-18 16:41 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 09/35] arm: improve tests for vmax* Andrea Corallo
2022-11-18 16:42 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 10/35] arm: improve tests for vabavq* Andrea Corallo
2022-11-18 16:43 ` Kyrylo Tkachov
2022-11-21 14:49 ` Andrea Corallo
2022-11-17 16:37 ` [PATCH 11/35] arm: improve tests for vabdq* Andrea Corallo
2022-11-18 16:44 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 12/35] arm: improve tests and fix vabsq* Andrea Corallo
2022-11-18 16:45 ` Kyrylo Tkachov [this message]
2022-11-17 16:37 ` [PATCH 13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic Andrea Corallo
2022-11-18 16:49 ` Kyrylo Tkachov
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters Andrea Corallo
2022-11-18 16:51 ` Kyrylo Tkachov
2022-11-21 10:46 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515] Andrea Corallo
2022-11-18 16:58 ` Kyrylo Tkachov
2022-11-20 22:49 ` Ramana Radhakrishnan
2022-11-21 14:11 ` Stam Markianos-Wright
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 16/35] arm: Add integer vector overloading of vsubq_x instrinsic Andrea Corallo
2022-11-22 10:00 ` Christophe Lyon
2022-11-22 10:54 ` Andrea Corallo
2022-11-22 16:48 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 17/35] arm: improve tests and fix vadd* Andrea Corallo
2022-11-22 16:49 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 18/35] arm: improve tests for vmulq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 19/35] arm: improve tests and fix vsubq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 20/35] arm: improve tests for vfmasq_m* Andrea Corallo
2022-11-22 16:52 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 21/35] arm: improve tests for vhaddq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 22/35] arm: improve tests for vhsubq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 23/35] arm: improve tests for viwdupq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 24/35] arm: improve tests for vmladavaq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 25/35] arm: improve tests and fix vmlaldavaxq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 26/35] arm: improve tests for vmlasq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 27/35] arm: improve tests for vqaddq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 28/35] arm: improve tests for vqdmlahq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 29/35] arm: improve tests for vqdmul* Andrea Corallo
2022-11-22 16:58 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 30/35] arm: improve tests for vqrdmlahq* Andrea Corallo
2022-11-22 17:01 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 31/35] arm: improve tests for vqrdmlashq_m* Andrea Corallo
2022-11-22 17:02 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 32/35] arm: improve tests for vqsubq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 33/35] arm: improve tests and fix vrmlaldavhaq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 34/35] arm: improve tests for vrshlq* Andrea Corallo
2022-11-22 17:04 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 35/35] arm: improve tests for vsetq_lane* Andrea Corallo
2022-11-22 17:06 ` Kyrylo Tkachov
2022-11-24 14:43 ` [PATCH 35/35 V2] " Andrea Corallo
2022-11-24 15:28 ` Kyrylo Tkachov
2022-11-28 9:20 ` [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
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