From: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>
To: Andrea Corallo <Andrea.Corallo@arm.com>,
"gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>
Cc: Richard Earnshaw <Richard.Earnshaw@arm.com>,
Andrea Corallo <Andrea.Corallo@arm.com>
Subject: RE: [PATCH 29/35] arm: improve tests for vqdmul*
Date: Tue, 22 Nov 2022 16:58:20 +0000 [thread overview]
Message-ID: <PAXPR08MB692681937BAE77F5337DDA61930D9@PAXPR08MB6926.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20221117163809.1009526-30-andrea.corallo@arm.com>
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 29/35] arm: improve tests for vqdmul*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c: Improve
> tests.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqdmulhq_m_n_s16.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulhq_m_n_s32.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulhq_m_n_s8.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulhq_m_s16.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulhq_m_s32.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulhq_m_s8.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulhq_n_s16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulhq_n_s32.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulhq_n_s8.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulhq_s16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulhq_s32.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulhq_s8.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmullbq_m_n_s16.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmullbq_m_n_s32.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmullbq_m_s16.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmullbq_m_s32.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmullbq_n_s16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmullbq_n_s32.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmullbq_s16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmullbq_s32.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulltq_m_n_s16.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulltq_m_n_s32.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulltq_m_s16.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulltq_m_s32.c | 26 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmulltq_n_s16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulltq_n_s32.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulltq_s16.c | 16 ++++++++++--
> .../arm/mve/intrinsics/vqdmulltq_s32.c | 16 ++++++++++--
> 28 files changed, 504 insertions(+), 84 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
> index 57ab85eaf52..a5c1a106205 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
> {
> return vqdmulhq_m_n_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
> {
> return vqdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
> index 256353a0a21..c78d4db1591 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vqdmulhq_m_n_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vqdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
> index c24be9ed5ad..b5ab6eb292c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_n_s8.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
> {
> return vqdmulhq_m_n_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
> {
> return vqdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
> index 49efeefcf63..2f5fb0e53a4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmulhq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
> index a5614830622..80a938a8a5b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmulhq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
> index 2e016f57e35..bfb755af4ee 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmulhq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulht.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
> index 19534b60b27..e34689d203d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16_t b)
> {
> return vqdmulhq_n_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16_t b)
> {
> return vqdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
> index eff9f6ecc4b..f967b8a286a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32_t b)
> {
> return vqdmulhq_n_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32_t b)
> {
> return vqdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
> index 188cf7c616f..5e1928fd51b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8_t b)
> {
> return vqdmulhq_n_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8_t b)
> {
> return vqdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
> index 513a30f67e6..7c0a434e48f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vqdmulhq_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vqdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
> index 9cf147dc7c5..19f4b03f6f0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vqdmulhq_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vqdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
> index 87211ad054a..1784c967f3c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vqdmulhq_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vqdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmulh.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
> index f0a4ad5b9f4..4f96e192732 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmullbt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
> {
> return vqdmullbq_m_n_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmullbt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
> {
> return vqdmullbq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
> index 1c7b2e4a1fc..d0bca6e3015 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_n_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmullbt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vqdmullbq_m_n_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmullbt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vqdmullbq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
> index 6a056cf86a1..8448cdc88cf 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmullbq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmullbq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmullbt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
> index 019c536e7f2..48cddcd791e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_m_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmullbq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmullbq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmullbt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
> index ec501c34539..cd7c394139d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmullb.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int16x8_t a, int16_t b)
> {
> return vqdmullbq_n_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullb.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmullb.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int16x8_t a, int16_t b)
> {
> return vqdmullbq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullb.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
> index 78fe3d6b289..b4d82f55987 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_n_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmullb.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int32x4_t a, int32_t b)
> {
> return vqdmullbq_n_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullb.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmullb.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int32x4_t a, int32_t b)
> {
> return vqdmullbq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullb.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
> index 9a423d3cc66..6f0fdabf67f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vqdmullbq_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullb.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vqdmullbq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullb.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
> index f0278cd8a86..2bf952bfd77 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vqdmullbq_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullb.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vqdmullbq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullb.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
> index 85f03149da4..6c756ebf3e7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulltt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
> {
> return vqdmulltq_m_n_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulltt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
> {
> return vqdmulltq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
> index 6bb5004e201..e46f6b2c384 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_n_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulltt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vqdmulltq_m_n_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulltt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int64x2_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vqdmulltq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
> index a85393b5bc1..8526b3ad628 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s16.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmulltq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmulltq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulltt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
> index 82f25b2ebbe..809e0740e46 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_m_s32.c
> @@ -1,23 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmulltq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmulltq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmulltt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
> index f9ad32a8411..44f0036bc51 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmullt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int16x8_t a, int16_t b)
> {
> return vqdmulltq_n_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmullt.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int16x8_t a, int16_t b)
> {
> return vqdmulltq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
> index 311b023431e..b025886ff15 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_n_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmullt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int32x4_t a, int32_t b)
> {
> return vqdmulltq_n_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmullt.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int32x4_t a, int32_t b)
> {
> return vqdmulltq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
> index 851f27a63b6..95084876349 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vqdmulltq_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vqdmulltq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullt.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
> index 1e81cc3dea5..ab27aeddc29 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c
> @@ -1,21 +1,33 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +/*
> +**foo:
> +** ...
> +** vqdmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vqdmulltq_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vqdmulltq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmullt.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
next prev parent reply other threads:[~2022-11-22 16:58 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-17 16:37 [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
2022-11-17 16:37 ` [PATCH 01/35] arm: improve vcreateq* tests Andrea Corallo
2022-11-18 9:47 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 02/35] arm: fix 'vmsr' spacing and register capitalization Andrea Corallo
2022-11-18 16:33 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 03/35] arm: improve tests and fix vddupq* Andrea Corallo
2022-11-18 16:34 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 04/35] arm: improve tests and fix vdwdupq* Andrea Corallo
2022-11-18 16:35 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 05/35] arm: improve vidupq* tests Andrea Corallo
2022-11-18 16:36 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 06/35] arm: improve tests and fix vdupq* Andrea Corallo
2022-11-18 16:37 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 07/35] arm: improve tests and fix vcmp* Andrea Corallo
2022-11-18 16:40 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 08/35] arm: improve tests for vmin* Andrea Corallo
2022-11-18 16:41 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 09/35] arm: improve tests for vmax* Andrea Corallo
2022-11-18 16:42 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 10/35] arm: improve tests for vabavq* Andrea Corallo
2022-11-18 16:43 ` Kyrylo Tkachov
2022-11-21 14:49 ` Andrea Corallo
2022-11-17 16:37 ` [PATCH 11/35] arm: improve tests for vabdq* Andrea Corallo
2022-11-18 16:44 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 12/35] arm: improve tests and fix vabsq* Andrea Corallo
2022-11-18 16:45 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 13/35] arm: further fix overloading of MVE vaddq[_m]_n intrinsic Andrea Corallo
2022-11-18 16:49 ` Kyrylo Tkachov
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 14/35] arm: propagate fixed overloading of MVE intrinsic scalar parameters Andrea Corallo
2022-11-18 16:51 ` Kyrylo Tkachov
2022-11-21 10:46 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515] Andrea Corallo
2022-11-18 16:58 ` Kyrylo Tkachov
2022-11-20 22:49 ` Ramana Radhakrishnan
2022-11-21 14:11 ` Stam Markianos-Wright
2022-11-21 10:45 ` Stam Markianos-Wright
2022-11-17 16:37 ` [PATCH 16/35] arm: Add integer vector overloading of vsubq_x instrinsic Andrea Corallo
2022-11-22 10:00 ` Christophe Lyon
2022-11-22 10:54 ` Andrea Corallo
2022-11-22 16:48 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 17/35] arm: improve tests and fix vadd* Andrea Corallo
2022-11-22 16:49 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 18/35] arm: improve tests for vmulq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 19/35] arm: improve tests and fix vsubq* Andrea Corallo
2022-11-22 16:51 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 20/35] arm: improve tests for vfmasq_m* Andrea Corallo
2022-11-22 16:52 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 21/35] arm: improve tests for vhaddq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 22/35] arm: improve tests for vhsubq_m* Andrea Corallo
2022-11-22 16:53 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 23/35] arm: improve tests for viwdupq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 24/35] arm: improve tests for vmladavaq* Andrea Corallo
2022-11-22 16:54 ` Kyrylo Tkachov
2022-11-17 16:37 ` [PATCH 25/35] arm: improve tests and fix vmlaldavaxq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 26/35] arm: improve tests for vmlasq* Andrea Corallo
2022-11-22 16:56 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 27/35] arm: improve tests for vqaddq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 28/35] arm: improve tests for vqdmlahq_m* Andrea Corallo
2022-11-22 16:57 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 29/35] arm: improve tests for vqdmul* Andrea Corallo
2022-11-22 16:58 ` Kyrylo Tkachov [this message]
2022-11-17 16:38 ` [PATCH 30/35] arm: improve tests for vqrdmlahq* Andrea Corallo
2022-11-22 17:01 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 31/35] arm: improve tests for vqrdmlashq_m* Andrea Corallo
2022-11-22 17:02 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 32/35] arm: improve tests for vqsubq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 33/35] arm: improve tests and fix vrmlaldavhaq* Andrea Corallo
2022-11-22 17:03 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 34/35] arm: improve tests for vrshlq* Andrea Corallo
2022-11-22 17:04 ` Kyrylo Tkachov
2022-11-17 16:38 ` [PATCH 35/35] arm: improve tests for vsetq_lane* Andrea Corallo
2022-11-22 17:06 ` Kyrylo Tkachov
2022-11-24 14:43 ` [PATCH 35/35 V2] " Andrea Corallo
2022-11-24 15:28 ` Kyrylo Tkachov
2022-11-28 9:20 ` [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk) Andrea Corallo
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