From: Mike Frysinger <vapier@gentoo.org>
To: gdb-patches@sourceware.org
Subject: [PATCH 26/27] sim: enable common sim_cpu usage everywhere
Date: Tue, 1 Nov 2022 20:56:57 +0545 [thread overview]
Message-ID: <20221101151158.24916-27-vapier@gentoo.org> (raw)
In-Reply-To: <20221101151158.24916-1-vapier@gentoo.org>
All ports should be migrated now. Drop the SIM_HAVE_COMMON_SIM_CPU
knob and require it be used everywhere now.
---
sim/aarch64/sim-main.h | 2 --
sim/arm/sim-main.h | 2 --
sim/avr/sim-main.h | 2 --
sim/bfin/sim-main.h | 2 --
sim/bpf/sim-main.h | 2 --
sim/common/sim-cpu.c | 2 --
sim/common/sim-cpu.h | 2 --
sim/cr16/sim-main.h | 2 --
sim/cris/sim-main.h | 2 --
sim/d10v/sim-main.h | 2 --
sim/example-synacor/sim-main.h | 2 --
sim/frv/sim-main.h | 2 --
sim/ft32/sim-main.h | 2 --
sim/h8300/sim-main.h | 2 --
sim/iq2000/sim-main.h | 2 --
sim/lm32/sim-main.h | 2 --
sim/m32r/sim-main.h | 2 --
sim/m68hc11/sim-main.h | 2 --
sim/mcore/sim-main.h | 2 --
sim/microblaze/sim-main.h | 2 --
sim/mips/sim-main.h | 2 --
sim/mn10300/sim-main.h | 2 --
sim/moxie/sim-main.h | 2 --
sim/msp430/sim-main.h | 2 --
sim/or1k/sim-main.h | 2 --
sim/pru/sim-main.h | 2 --
sim/riscv/sim-main.h | 2 --
sim/sh/sim-main.h | 2 --
sim/v850/sim-main.h | 2 --
29 files changed, 58 deletions(-)
diff --git a/sim/aarch64/sim-main.h b/sim/aarch64/sim-main.h
index 0da730d3a3ec..211685f8864b 100644
--- a/sim/aarch64/sim-main.h
+++ b/sim/aarch64/sim-main.h
@@ -22,8 +22,6 @@
#ifndef _SIM_MAIN_H
#define _SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "sim-types.h"
#include "sim-base.h"
diff --git a/sim/arm/sim-main.h b/sim/arm/sim-main.h
index ba44314927a2..bdc5019a3033 100644
--- a/sim/arm/sim-main.h
+++ b/sim/arm/sim-main.h
@@ -19,8 +19,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "sim-base.h"
#include "bfd.h"
diff --git a/sim/avr/sim-main.h b/sim/avr/sim-main.h
index 63f43dded5fc..97129ec91836 100644
--- a/sim/avr/sim-main.h
+++ b/sim/avr/sim-main.h
@@ -19,8 +19,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "sim-base.h"
diff --git a/sim/bfin/sim-main.h b/sim/bfin/sim-main.h
index 48e54c8c8e13..a3855f3ded63 100644
--- a/sim/bfin/sim-main.h
+++ b/sim/bfin/sim-main.h
@@ -21,8 +21,6 @@
#ifndef _BFIN_MAIN_SIM_H_
#define _BFIN_MAIN_SIM_H_
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "arch.h"
#include "sim-base.h"
diff --git a/sim/bpf/sim-main.h b/sim/bpf/sim-main.h
index bb6037737f98..bbb99ba7623e 100644
--- a/sim/bpf/sim-main.h
+++ b/sim/bpf/sim-main.h
@@ -19,8 +19,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "cgen-types.h"
#include "bpf-desc.h"
diff --git a/sim/common/sim-cpu.c b/sim/common/sim-cpu.c
index 998536f8153d..57ca2892c6e4 100644
--- a/sim/common/sim-cpu.c
+++ b/sim/common/sim-cpu.c
@@ -51,10 +51,8 @@ sim_cpu_alloc_extra (SIM_DESC sd, size_t extra_bytes)
#endif
sim_cpu *cpu = zalloc (sizeof (*cpu) + cgen_cpu_max_extra_bytes (sd));
-#ifdef SIM_HAVE_COMMON_SIM_CPU
if (extra_bytes)
CPU_ARCH_DATA (cpu) = zalloc (extra_bytes);
-#endif
return cpu;
}
diff --git a/sim/common/sim-cpu.h b/sim/common/sim-cpu.h
index 607b168a436a..51661996f6c6 100644
--- a/sim/common/sim-cpu.h
+++ b/sim/common/sim-cpu.h
@@ -126,7 +126,6 @@ typedef struct {
} sim_cpu_base;
-#ifdef SIM_HAVE_COMMON_SIM_CPU
struct _sim_cpu {
/* All the common state. */
sim_cpu_base base;
@@ -142,7 +141,6 @@ struct _sim_cpu {
void *arch_data;
#define CPU_ARCH_DATA(cpu) ((cpu)->arch_data)
};
-#endif
/* Create all cpus. */
extern SIM_RC sim_cpu_alloc_all_extra (SIM_DESC, int, size_t);
diff --git a/sim/cr16/sim-main.h b/sim/cr16/sim-main.h
index 7ac6bd2c0de5..667db199ea12 100644
--- a/sim/cr16/sim-main.h
+++ b/sim/cr16/sim-main.h
@@ -19,8 +19,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
typedef long int word;
diff --git a/sim/cris/sim-main.h b/sim/cris/sim-main.h
index f60c454ddc4c..e946489cfc20 100644
--- a/sim/cris/sim-main.h
+++ b/sim/cris/sim-main.h
@@ -24,8 +24,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
/* This is a global setting. Different cpu families can't mix-n-match -scache
and -pbb. However some cpu families may use -simple while others use
one of -scache/-pbb. */
diff --git a/sim/d10v/sim-main.h b/sim/d10v/sim-main.h
index 5327e7ec3d02..3d7b73231838 100644
--- a/sim/d10v/sim-main.h
+++ b/sim/d10v/sim-main.h
@@ -19,8 +19,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
typedef long int word;
diff --git a/sim/example-synacor/sim-main.h b/sim/example-synacor/sim-main.h
index 11566d2c6b9f..258d61879cc9 100644
--- a/sim/example-synacor/sim-main.h
+++ b/sim/example-synacor/sim-main.h
@@ -21,8 +21,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "sim-base.h"
diff --git a/sim/frv/sim-main.h b/sim/frv/sim-main.h
index 3e40bd52ab38..5fbf94d1f613 100644
--- a/sim/frv/sim-main.h
+++ b/sim/frv/sim-main.h
@@ -22,8 +22,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* Main header for the frv. */
-#define SIM_HAVE_COMMON_SIM_CPU
-
/* This is a global setting. Different cpu families can't mix-n-match -scache
and -pbb. However some cpu families may use -simple while others use
one of -scache/-pbb. ???? */
diff --git a/sim/ft32/sim-main.h b/sim/ft32/sim-main.h
index 3a002efd359b..e160a12880dd 100644
--- a/sim/ft32/sim-main.h
+++ b/sim/ft32/sim-main.h
@@ -21,8 +21,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "sim-base.h"
#include "bfd.h"
diff --git a/sim/h8300/sim-main.h b/sim/h8300/sim-main.h
index d0a04f5fa46a..84bb346a9a95 100644
--- a/sim/h8300/sim-main.h
+++ b/sim/h8300/sim-main.h
@@ -5,8 +5,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#define DEBUG
/* These define the size of main memory for the simulator.
diff --git a/sim/iq2000/sim-main.h b/sim/iq2000/sim-main.h
index bb927fcf57c5..ccc3fc877b9d 100644
--- a/sim/iq2000/sim-main.h
+++ b/sim/iq2000/sim-main.h
@@ -4,8 +4,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
/* This is a global setting. Different cpu families can't mix-n-match -scache
and -pbb. However some cpu families may use -simple while others use
one of -scache/-pbb. ???? */
diff --git a/sim/lm32/sim-main.h b/sim/lm32/sim-main.h
index 17c817cb1f69..6ae757f089b5 100644
--- a/sim/lm32/sim-main.h
+++ b/sim/lm32/sim-main.h
@@ -23,8 +23,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#define WITH_SCACHE_PBB 1
#include "symcat.h"
diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h
index fcde7feb61cc..6d69ecf52a00 100644
--- a/sim/m32r/sim-main.h
+++ b/sim/m32r/sim-main.h
@@ -3,8 +3,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
/* This is a global setting. Different cpu families can't mix-n-match -scache
and -pbb. However some cpu families may use -simple while others use
one of -scache/-pbb. */
diff --git a/sim/m68hc11/sim-main.h b/sim/m68hc11/sim-main.h
index 26293bc654f0..e47bd83f9b9a 100644
--- a/sim/m68hc11/sim-main.h
+++ b/sim/m68hc11/sim-main.h
@@ -20,8 +20,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef _SIM_MAIN_H
#define _SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "sim-base.h"
diff --git a/sim/mcore/sim-main.h b/sim/mcore/sim-main.h
index 82a720b1e518..fc4625ba8ec2 100644
--- a/sim/mcore/sim-main.h
+++ b/sim/mcore/sim-main.h
@@ -19,8 +19,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
typedef long int word;
diff --git a/sim/microblaze/sim-main.h b/sim/microblaze/sim-main.h
index df85a6f1e232..160f10156fff 100644
--- a/sim/microblaze/sim-main.h
+++ b/sim/microblaze/sim-main.h
@@ -18,8 +18,6 @@
#ifndef MICROBLAZE_SIM_MAIN
#define MICROBLAZE_SIM_MAIN
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "microblaze.h"
#include "sim-basics.h"
#include "sim-base.h"
diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h
index d4e6a2f4a547..ea203c4a6886 100644
--- a/sim/mips/sim-main.h
+++ b/sim/mips/sim-main.h
@@ -20,8 +20,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
mips_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
diff --git a/sim/mn10300/sim-main.h b/sim/mn10300/sim-main.h
index 37e5ce011b5f..77a7ba8ea0d4 100644
--- a/sim/mn10300/sim-main.h
+++ b/sim/mn10300/sim-main.h
@@ -22,8 +22,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#define SIM_ENGINE_HALT_HOOK(SD,LAST_CPU,CIA) /* disable this hook */
#include "sim-basics.h"
diff --git a/sim/moxie/sim-main.h b/sim/moxie/sim-main.h
index 7db12e01498b..c4be80e39d26 100644
--- a/sim/moxie/sim-main.h
+++ b/sim/moxie/sim-main.h
@@ -20,8 +20,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "sim-base.h"
#include "bfd.h"
diff --git a/sim/msp430/sim-main.h b/sim/msp430/sim-main.h
index 9d5a7b33072b..5603d411df7b 100644
--- a/sim/msp430/sim-main.h
+++ b/sim/msp430/sim-main.h
@@ -21,8 +21,6 @@
#ifndef _MSP430_MAIN_SIM_H_
#define _MSP430_MAIN_SIM_H_
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "msp430-sim.h"
#include "sim-base.h"
diff --git a/sim/or1k/sim-main.h b/sim/or1k/sim-main.h
index bf3558ddfef1..1b6939dfbc98 100644
--- a/sim/or1k/sim-main.h
+++ b/sim/or1k/sim-main.h
@@ -19,8 +19,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#define WITH_SCACHE_PBB 1
#include "ansidecl.h"
diff --git a/sim/pru/sim-main.h b/sim/pru/sim-main.h
index a217eee576a1..ada1e3886278 100644
--- a/sim/pru/sim-main.h
+++ b/sim/pru/sim-main.h
@@ -19,8 +19,6 @@
#ifndef PRU_SIM_MAIN
#define PRU_SIM_MAIN
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include <stdint.h>
#include <stddef.h>
#include "pru.h"
diff --git a/sim/riscv/sim-main.h b/sim/riscv/sim-main.h
index aeeb0ad788f8..48ea452fb0b1 100644
--- a/sim/riscv/sim-main.h
+++ b/sim/riscv/sim-main.h
@@ -21,8 +21,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "machs.h"
#include "sim-base.h"
diff --git a/sim/sh/sim-main.h b/sim/sh/sim-main.h
index 5504ad241099..6008b6997129 100644
--- a/sim/sh/sim-main.h
+++ b/sim/sh/sim-main.h
@@ -19,8 +19,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
#include "sim-basics.h"
#include "sim-base.h"
diff --git a/sim/v850/sim-main.h b/sim/v850/sim-main.h
index ddbb7953b0d7..c078b893b961 100644
--- a/sim/v850/sim-main.h
+++ b/sim/v850/sim-main.h
@@ -1,8 +1,6 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
-#define SIM_HAVE_COMMON_SIM_CPU
-
/* The v850 has 32bit words, numbered 31 (MSB) to 0 (LSB) */
#define WITH_TARGET_WORD_MSB 31
--
2.37.3
next prev parent reply other threads:[~2022-11-01 16:27 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-01 15:11 [PATCH 00/27] sim: sim_cpu: invert sim_cpu storage Mike Frysinger
2022-11-01 15:11 ` [PATCH 01/27] " Mike Frysinger
2022-11-01 15:11 ` [PATCH 02/27] sim: bfin: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 03/27] sim: ft32: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 04/27] sim: msp430: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 05/27] sim: moxie: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 06/27] sim: avr: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 07/27] sim: microblaze: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 08/27] sim: aarch64: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 09/27] sim: mcore: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 10/27] sim: v850: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 11/27] sim: mips: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 12/27] sim: m68hc11: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 13/27] sim: h8300: switch to cpu for state Mike Frysinger
2022-11-01 15:11 ` [PATCH 14/27] sim: h8300: invert sim_cpu storage Mike Frysinger
2022-11-01 15:11 ` [PATCH 15/27] sim: example-synacor: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 16/27] sim: pru: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 17/27] sim: riscv: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 18/27] sim: cgen: prep for inverting " Mike Frysinger
2022-11-01 15:11 ` [PATCH 19/27] sim: bpf: invert " Mike Frysinger
2022-11-01 15:11 ` [PATCH 20/27] sim: cris: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 21/27] sim: frv: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 22/27] sim: iq2000: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 23/27] sim: lm32: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 24/27] sim: m32r: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 25/27] sim: or1k: " Mike Frysinger
2022-11-01 15:11 ` Mike Frysinger [this message]
2022-11-01 15:11 ` [PATCH 27/27] sim: fully merge sim_cpu_base into sim_cpu Mike Frysinger
2022-11-05 13:32 ` [PATCH v2 00/26] sim: sim_cpu: invert sim_cpu storage Mike Frysinger
2022-11-05 13:32 ` [PATCH 01/26] " Mike Frysinger
2022-11-05 13:32 ` [PATCH 02/26] sim: bfin: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 03/26] sim: ft32: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 04/26] sim: msp430: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 05/26] sim: moxie: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 06/26] sim: avr: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 07/26] sim: microblaze: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 08/26] sim: aarch64: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 09/26] sim: mcore: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 10/26] sim: v850: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 11/26] sim: mips: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 12/26] sim: m68hc11: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 13/26] sim: h8300: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 14/26] sim: example-synacor: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 15/26] sim: pru: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 16/26] sim: riscv: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 17/26] sim: cgen: prep for inverting " Mike Frysinger
2022-11-05 13:32 ` [PATCH 18/26] sim: bpf: invert " Mike Frysinger
2022-11-05 13:32 ` [PATCH 19/26] sim: cris: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 20/26] sim: frv: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 21/26] sim: iq2000: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 22/26] sim: lm32: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 23/26] sim: m32r: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 24/26] sim: or1k: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 25/26] sim: enable common sim_cpu usage everywhere Mike Frysinger
2022-11-05 13:32 ` [PATCH 26/26] sim: fully merge sim_cpu_base into sim_cpu Mike Frysinger
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