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From: Mike Frysinger <vapier@gentoo.org>
To: gdb-patches@sourceware.org
Subject: [PATCH 05/27] sim: moxie: invert sim_cpu storage
Date: Tue,  1 Nov 2022 20:56:36 +0545	[thread overview]
Message-ID: <20221101151158.24916-6-vapier@gentoo.org> (raw)
In-Reply-To: <20221101151158.24916-1-vapier@gentoo.org>

---
 sim/moxie/interp.c   |  9 +++++----
 sim/moxie/sim-main.h | 18 ++++++++----------
 2 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/sim/moxie/interp.c b/sim/moxie/interp.c
index 325bd14e313f..6b2cf06cb8b5 100644
--- a/sim/moxie/interp.c
+++ b/sim/moxie/interp.c
@@ -127,7 +127,7 @@ struct moxie_regset
 #define CC_GTU 1<<3
 #define CC_LTU 1<<4
 
-/* TODO: This should be moved to sim-main.h:_sim_cpu.  */
+/* TODO: This should be moved to sim-main.h:moxie_sim_cpu.  */
 union
 {
   struct moxie_regset asregs;
@@ -1173,13 +1173,13 @@ moxie_reg_fetch (SIM_CPU *scpu, int rn, unsigned char *memory, int length)
 static sim_cia
 moxie_pc_get (sim_cpu *cpu)
 {
-  return cpu->registers[PCIDX];
+  return MOXIE_SIM_CPU (cpu)->registers[PCIDX];
 }
 
 static void
 moxie_pc_set (sim_cpu *cpu, sim_cia pc)
 {
-  cpu->registers[PCIDX] = pc;
+  MOXIE_SIM_CPU (cpu)->registers[PCIDX] = pc;
 }
 
 static void
@@ -1203,7 +1203,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb,
   current_target_byte_order = BFD_ENDIAN_BIG;
 
   /* The cpu data is kept in a separately allocated chunk of memory.  */
-  if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
+  if (sim_cpu_alloc_all_extra (sd, 1, sizeof (struct moxie_sim_cpu))
+      != SIM_RC_OK)
     {
       free_state (sd);
       return 0;
diff --git a/sim/moxie/sim-main.h b/sim/moxie/sim-main.h
index 9e4b1d4f8bcd..7db12e01498b 100644
--- a/sim/moxie/sim-main.h
+++ b/sim/moxie/sim-main.h
@@ -20,23 +20,21 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 #ifndef SIM_MAIN_H
 #define SIM_MAIN_H
 
+#define SIM_HAVE_COMMON_SIM_CPU
+
 #include "sim-basics.h"
 #include "sim-base.h"
 #include "bfd.h"
 
 #define PCIDX 17
 
-struct _sim_cpu {
-
-  /* The following are internal simulator state variables: */
-
-/* To keep this default simulator simple, and fast, we use a direct
-   vector of registers. The internal simulator engine then uses
-   manifests to access the correct slot. */
-
+struct moxie_sim_cpu {
+  /* To keep this default simulator simple, and fast, we use a direct
+     vector of registers. The internal simulator engine then uses
+     manifests to access the correct slot. */
   unsigned_word registers[19];
-
-  sim_cpu_base base;
 };
 
+#define MOXIE_SIM_CPU(cpu) ((struct moxie_sim_cpu *) CPU_ARCH_DATA (cpu))
+
 #endif
-- 
2.37.3


  parent reply	other threads:[~2022-11-01 16:26 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-01 15:11 [PATCH 00/27] sim: sim_cpu: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 01/27] " Mike Frysinger
2022-11-01 15:11 ` [PATCH 02/27] sim: bfin: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 03/27] sim: ft32: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 04/27] sim: msp430: " Mike Frysinger
2022-11-01 15:11 ` Mike Frysinger [this message]
2022-11-01 15:11 ` [PATCH 06/27] sim: avr: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 07/27] sim: microblaze: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 08/27] sim: aarch64: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 09/27] sim: mcore: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 10/27] sim: v850: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 11/27] sim: mips: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 12/27] sim: m68hc11: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 13/27] sim: h8300: switch to cpu for state Mike Frysinger
2022-11-01 15:11 ` [PATCH 14/27] sim: h8300: invert sim_cpu storage Mike Frysinger
2022-11-01 15:11 ` [PATCH 15/27] sim: example-synacor: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 16/27] sim: pru: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 17/27] sim: riscv: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 18/27] sim: cgen: prep for inverting " Mike Frysinger
2022-11-01 15:11 ` [PATCH 19/27] sim: bpf: invert " Mike Frysinger
2022-11-01 15:11 ` [PATCH 20/27] sim: cris: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 21/27] sim: frv: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 22/27] sim: iq2000: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 23/27] sim: lm32: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 24/27] sim: m32r: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 25/27] sim: or1k: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 26/27] sim: enable common sim_cpu usage everywhere Mike Frysinger
2022-11-01 15:11 ` [PATCH 27/27] sim: fully merge sim_cpu_base into sim_cpu Mike Frysinger
2022-11-05 13:32 ` [PATCH v2 00/26] sim: sim_cpu: invert sim_cpu storage Mike Frysinger
2022-11-05 13:32   ` [PATCH 01/26] " Mike Frysinger
2022-11-05 13:32   ` [PATCH 02/26] sim: bfin: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 03/26] sim: ft32: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 04/26] sim: msp430: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 05/26] sim: moxie: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 06/26] sim: avr: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 07/26] sim: microblaze: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 08/26] sim: aarch64: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 09/26] sim: mcore: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 10/26] sim: v850: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 11/26] sim: mips: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 12/26] sim: m68hc11: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 13/26] sim: h8300: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 14/26] sim: example-synacor: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 15/26] sim: pru: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 16/26] sim: riscv: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 17/26] sim: cgen: prep for inverting " Mike Frysinger
2022-11-05 13:32   ` [PATCH 18/26] sim: bpf: invert " Mike Frysinger
2022-11-05 13:32   ` [PATCH 19/26] sim: cris: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 20/26] sim: frv: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 21/26] sim: iq2000: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 22/26] sim: lm32: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 23/26] sim: m32r: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 24/26] sim: or1k: " Mike Frysinger
2022-11-05 13:32   ` [PATCH 25/26] sim: enable common sim_cpu usage everywhere Mike Frysinger
2022-11-05 13:32   ` [PATCH 26/26] sim: fully merge sim_cpu_base into sim_cpu Mike Frysinger

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