From: Mike Frysinger <vapier@gentoo.org>
To: gdb-patches@sourceware.org
Subject: [PATCH 22/26] sim: lm32: invert sim_cpu storage
Date: Sat, 5 Nov 2022 20:32:54 +0700 [thread overview]
Message-ID: <20221105133258.23409-23-vapier@gentoo.org> (raw)
In-Reply-To: <20221105133258.23409-1-vapier@gentoo.org>
The cpu.h change is in generated cgen code, but that has been sent
upstream too, so the next regen should include it automatically.
---
sim/lm32/cpu.h | 2 +-
sim/lm32/sim-if.c | 3 ++-
sim/lm32/sim-main.h | 14 ++++----------
3 files changed, 7 insertions(+), 12 deletions(-)
diff --git a/sim/lm32/cpu.h b/sim/lm32/cpu.h
index d025065f2ba9..f179cfce30e9 100644
--- a/sim/lm32/cpu.h
+++ b/sim/lm32/cpu.h
@@ -54,7 +54,7 @@ typedef struct {
#define GET_H_CSR(a1) CPU (h_csr)[a1]
#define SET_H_CSR(a1, x) (CPU (h_csr)[a1] = (x))
} hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+#define CPU_CGEN_HW(cpu) (& LM32_SIM_CPU (cpu)->cpu_data.hardware)
} LM32BF_CPU_DATA;
/* Cover fns for register access. */
diff --git a/sim/lm32/sim-if.c b/sim/lm32/sim-if.c
index f6ff7129e2c5..a2a33620bdbc 100644
--- a/sim/lm32/sim-if.c
+++ b/sim/lm32/sim-if.c
@@ -101,7 +101,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
current_target_byte_order = BFD_ENDIAN_BIG;
/* The cpu data is kept in a separately allocated chunk of memory. */
- if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
+ if (sim_cpu_alloc_all_extra (sd, 1, sizeof (struct lm32_sim_cpu))
+ != SIM_RC_OK)
{
free_state (sd);
return 0;
diff --git a/sim/lm32/sim-main.h b/sim/lm32/sim-main.h
index 14da34c55199..17c817cb1f69 100644
--- a/sim/lm32/sim-main.h
+++ b/sim/lm32/sim-main.h
@@ -23,6 +23,8 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
+#define SIM_HAVE_COMMON_SIM_CPU
+
#define WITH_SCACHE_PBB 1
#include "symcat.h"
@@ -36,16 +38,8 @@
#include "lm32-sim.h"
#include "opcode/cgen.h"
\f
-/* The _sim_cpu struct. */
-
-struct _sim_cpu
+struct lm32_sim_cpu
{
- /* sim/common cpu base. */
- sim_cpu_base base;
-
- /* Static parts of cgen. */
- CGEN_CPU cgen_cpu;
-
/* CPU specific parts go here.
Note that in files that don't need to access these pieces WANT_CPU_FOO
won't be defined and thus these parts won't appear. This is ok in the
@@ -56,8 +50,8 @@ struct _sim_cpu
#if defined (WANT_CPU_LM32BF)
LM32BF_CPU_DATA cpu_data;
#endif
-
};
+#define LM32_SIM_CPU(cpu) ((struct lm32_sim_cpu *) CPU_ARCH_DATA (cpu))
\f
/* Misc. */
--
2.38.1
next prev parent reply other threads:[~2022-11-05 13:33 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-01 15:11 [PATCH 00/27] sim: sim_cpu: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 01/27] " Mike Frysinger
2022-11-01 15:11 ` [PATCH 02/27] sim: bfin: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 03/27] sim: ft32: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 04/27] sim: msp430: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 05/27] sim: moxie: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 06/27] sim: avr: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 07/27] sim: microblaze: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 08/27] sim: aarch64: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 09/27] sim: mcore: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 10/27] sim: v850: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 11/27] sim: mips: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 12/27] sim: m68hc11: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 13/27] sim: h8300: switch to cpu for state Mike Frysinger
2022-11-01 15:11 ` [PATCH 14/27] sim: h8300: invert sim_cpu storage Mike Frysinger
2022-11-01 15:11 ` [PATCH 15/27] sim: example-synacor: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 16/27] sim: pru: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 17/27] sim: riscv: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 18/27] sim: cgen: prep for inverting " Mike Frysinger
2022-11-01 15:11 ` [PATCH 19/27] sim: bpf: invert " Mike Frysinger
2022-11-01 15:11 ` [PATCH 20/27] sim: cris: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 21/27] sim: frv: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 22/27] sim: iq2000: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 23/27] sim: lm32: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 24/27] sim: m32r: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 25/27] sim: or1k: " Mike Frysinger
2022-11-01 15:11 ` [PATCH 26/27] sim: enable common sim_cpu usage everywhere Mike Frysinger
2022-11-01 15:11 ` [PATCH 27/27] sim: fully merge sim_cpu_base into sim_cpu Mike Frysinger
2022-11-05 13:32 ` [PATCH v2 00/26] sim: sim_cpu: invert sim_cpu storage Mike Frysinger
2022-11-05 13:32 ` [PATCH 01/26] " Mike Frysinger
2022-11-05 13:32 ` [PATCH 02/26] sim: bfin: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 03/26] sim: ft32: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 04/26] sim: msp430: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 05/26] sim: moxie: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 06/26] sim: avr: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 07/26] sim: microblaze: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 08/26] sim: aarch64: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 09/26] sim: mcore: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 10/26] sim: v850: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 11/26] sim: mips: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 12/26] sim: m68hc11: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 13/26] sim: h8300: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 14/26] sim: example-synacor: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 15/26] sim: pru: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 16/26] sim: riscv: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 17/26] sim: cgen: prep for inverting " Mike Frysinger
2022-11-05 13:32 ` [PATCH 18/26] sim: bpf: invert " Mike Frysinger
2022-11-05 13:32 ` [PATCH 19/26] sim: cris: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 20/26] sim: frv: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 21/26] sim: iq2000: " Mike Frysinger
2022-11-05 13:32 ` Mike Frysinger [this message]
2022-11-05 13:32 ` [PATCH 23/26] sim: m32r: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 24/26] sim: or1k: " Mike Frysinger
2022-11-05 13:32 ` [PATCH 25/26] sim: enable common sim_cpu usage everywhere Mike Frysinger
2022-11-05 13:32 ` [PATCH 26/26] sim: fully merge sim_cpu_base into sim_cpu Mike Frysinger
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