* [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck)
@ 2023-01-20 16:39 Andrea Corallo
2023-01-20 16:39 ` [PATCH 01/23] arm: improve tests and fix vclsq* Andrea Corallo
` (22 more replies)
0 siblings, 23 replies; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
Hi all,
this 3rd series, similarly to the previous ones, rework the arm MVE
testsuite for better coverage. Contextually some trivial fixes to the
backend are performed.
23/23 also adds some extern "C" I forgot to add with the previous
series in order to fix those tests for C++.
Best Regards
Andrea
Andrea Corallo (23):
arm: improve tests and fix vclsq*
arm: improve tests and fix vclzq*
arm: improve tests and fix vnegq*
arm: improve tests for vmulhq*
arm: improve tests for vmullbq*
arm: improve tests for vmulltq*
arm: improve tests for vcaddq*
arm: improve tests for vcmlaq*
arm: improve tests for vcmulq*
arm: improve tests and fix vqabsq*
arm: improve tests for vqdmladhq*
arm: improve tests for vqdmladhxq*
arm: improve tests for vqrdmladhq*
arm: improve tests for vqrdmladhxq*
arm: improve tests for vqrdmlashq*
arm: improve tests for vqdmlsdhq*
arm: improve tests for vqdmlsdhxq*
arm: improve tests for vqrdmlsdhq*
arm: improve tests for vqrdmlsdhxq*
arm: improve tests for vqrdmulhq*
arm: improve tests and fix vqnegq*
arm: improve tests for vld2q*
arm: fix missing extern "C" in MVE tests
gcc/config/arm/mve.md | 12 +++----
.../arm/mve/intrinsics/vcaddq_rot270_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_u32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_u32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclsq_m_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclsq_m_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclsq_m_s8.c | 33 ++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vclsq_s16.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclsq_s32.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclsq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vclsq_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclsq_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclsq_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_u8.c | 33 ++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vclzq_s16.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclzq_s32.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclzq_s8.c | 24 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vclzq_u16.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclzq_u32.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclzq_u8.c | 28 ++++++++++++---
.../arm/mve/intrinsics/vclzq_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmlaq_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot180_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot180_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot270_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot270_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot90_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot90_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot180_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot180_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_rot270_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot270_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_rot90_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot90_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vhaddq_n_s16.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_n_s32.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_n_s8.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_n_u16.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_n_u32.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_n_u8.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_s16.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_s32.c | 8 +++++
.../gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_u16.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_u32.c | 8 +++++
.../gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_n_s16.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_n_s32.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_n_s8.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_n_u16.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_n_u32.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_n_u8.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_s16.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_s32.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_s8.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_u16.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_u32.c | 8 +++++
.../arm/mve/intrinsics/vhaddq_x_u8.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_n_s16.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_n_s32.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_n_s8.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_n_u16.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_n_u32.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_n_u8.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_s16.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_s32.c | 8 +++++
.../gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_u16.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_u32.c | 8 +++++
.../gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_n_s16.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_n_s32.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_n_s8.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_n_u16.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_n_u32.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_n_u8.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_s16.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_s32.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_s8.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_u16.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_u32.c | 8 +++++
.../arm/mve/intrinsics/vhsubq_x_u8.c | 8 +++++
.../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 33 +++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 33 +++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 33 +++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 33 +++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 33 +++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 33 +++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 33 +++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 33 +++++++++++++++---
.../arm/mve/intrinsics/vmladavaxq_p_s16.c | 8 +++++
.../arm/mve/intrinsics/vmladavaxq_p_s32.c | 8 +++++
.../arm/mve/intrinsics/vmladavaxq_p_s8.c | 8 +++++
.../arm/mve/intrinsics/vmladavaxq_s16.c | 8 +++++
.../arm/mve/intrinsics/vmladavaxq_s32.c | 8 +++++
.../arm/mve/intrinsics/vmladavaxq_s8.c | 8 +++++
.../arm/mve/intrinsics/vmulhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulhq_s32.c | 24 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vmulhq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulhq_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulhq_u32.c | 24 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vmulhq_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulhq_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_u32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_poly_p16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_poly_p8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_poly_x_p16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_poly_x_p8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_u32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_poly_m_p16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_poly_m_p8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_poly_p16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_poly_p8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_poly_x_p16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_poly_x_p8.c | 33 ++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vnegq_f16.c | 30 +++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vnegq_f32.c | 30 +++++++++++++++-
.../arm/mve/intrinsics/vnegq_m_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vnegq_m_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vnegq_m_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vnegq_m_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vnegq_m_s8.c | 33 ++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vnegq_s16.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vnegq_s32.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vnegq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vnegq_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vnegq_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vnegq_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vnegq_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vnegq_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vqabsq_m_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vqabsq_m_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vqabsq_m_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vqabsq_s16.c | 28 ++++++++++++---
.../arm/mve/intrinsics/vqabsq_s32.c | 28 ++++++++++++---
.../gcc.target/arm/mve/intrinsics/vqabsq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqaddq_n_s16.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_n_s32.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_n_s8.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_n_u16.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_n_u32.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_n_u8.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_s16.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_s32.c | 8 +++++
.../gcc.target/arm/mve/intrinsics/vqaddq_s8.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_u16.c | 8 +++++
.../arm/mve/intrinsics/vqaddq_u32.c | 8 +++++
.../gcc.target/arm/mve/intrinsics/vqaddq_u8.c | 8 +++++
.../arm/mve/intrinsics/vqdmladhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhxq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhxq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhxq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhxq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhxq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhxq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlahq_n_s16.c | 8 +++++
.../arm/mve/intrinsics/vqdmlahq_n_s32.c | 8 +++++
.../arm/mve/intrinsics/vqdmlahq_n_s8.c | 8 +++++
.../arm/mve/intrinsics/vqdmlashq_m_n_s16.c | 8 +++++
.../arm/mve/intrinsics/vqdmlashq_m_n_s32.c | 8 +++++
.../arm/mve/intrinsics/vqdmlashq_m_n_s8.c | 8 +++++
.../arm/mve/intrinsics/vqdmlashq_n_s16.c | 8 +++++
.../arm/mve/intrinsics/vqdmlashq_n_s32.c | 8 +++++
.../arm/mve/intrinsics/vqdmlashq_n_s8.c | 8 +++++
.../arm/mve/intrinsics/vqdmlsdhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhxq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhxq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhxq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhxq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhxq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhxq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqnegq_m_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vqnegq_m_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vqnegq_m_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vqnegq_s16.c | 28 ++++++++++++---
.../arm/mve/intrinsics/vqnegq_s32.c | 24 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vqnegq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhxq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhxq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhxq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhxq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhxq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhxq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 32 +++++++++++++----
.../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 32 +++++++++++++----
.../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 32 +++++++++++++----
.../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_n_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vsetq_lane_f16.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_f32.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_s16.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_s32.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_s64.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_s8.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_u16.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_u32.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_u64.c | 8 +++++
.../arm/mve/intrinsics/vsetq_lane_u8.c | 8 +++++
gcc/testsuite/gcc.target/arm/simd/mve-vclz.c | 6 ++--
gcc/testsuite/gcc.target/arm/simd/mve-vneg.c | 4 +--
gcc/testsuite/gcc.target/arm/simd/mve-vshr.c | 2 +-
368 files changed, 8240 insertions(+), 878 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 01/23] arm: improve tests and fix vclsq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:44 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 02/23] arm: improve tests and fix vclzq* Andrea Corallo
` (21 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/ChangeLog:
* config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vclsq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vclsq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclsq_x_s8.c: Likewise.
---
gcc/config/arm/mve.md | 2 +-
.../arm/mve/intrinsics/vclsq_m_s16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclsq_m_s32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclsq_m_s8.c | 33 +++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vclsq_s16.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclsq_s32.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclsq_s8.c | 24 ++++++++++++--
.../arm/mve/intrinsics/vclsq_x_s16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclsq_x_s32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclsq_x_s8.c | 33 +++++++++++++++++--
10 files changed, 251 insertions(+), 29 deletions(-)
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index f123edc449b..e35ea5d9f9c 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -469,7 +469,7 @@ (define_insn "mve_vclsq_s<mode>"
VCLSQ_S))
]
"TARGET_HAVE_MVE"
- "vcls.s%#<V_sz_elem> %q0, %q1"
+ "vcls.s%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
index d0eb7008537..1996ac8b03e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vclsq_m_s16 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclst.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vclsq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
index b6d7088a8e7..f51841d024e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vclsq_m_s32 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclst.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vclsq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
index 28d4d966802..2975c4cda56 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vclsq_m_s8 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclst.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vclsq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
index e57fbb97080..ed1b5c75b40 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcls.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a)
{
return vclsq_s16 (a);
}
-/* { dg-final { scan-assembler "vcls.s16" } } */
+/*
+**foo1:
+** ...
+** vcls.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a)
{
return vclsq (a);
}
-/* { dg-final { scan-assembler "vcls.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
index 7fa3038d361..9e5369e04c6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcls.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a)
{
return vclsq_s32 (a);
}
-/* { dg-final { scan-assembler "vcls.s32" } } */
+/*
+**foo1:
+** ...
+** vcls.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a)
{
return vclsq (a);
}
-/* { dg-final { scan-assembler "vcls.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
index b0985484d1d..c4a9468f8e1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcls.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a)
{
return vclsq_s8 (a);
}
-/* { dg-final { scan-assembler "vcls.s8" } } */
+/*
+**foo1:
+** ...
+** vcls.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a)
{
return vclsq (a);
}
-/* { dg-final { scan-assembler "vcls.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
index ab09c9944ae..ea11eceb730 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, mve_pred16_t p)
{
return vclsq_x_s16 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclst.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, mve_pred16_t p)
{
return vclsq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
index 09a8dab2f51..1737c561a0b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, mve_pred16_t p)
{
return vclsq_x_s32 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclst.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, mve_pred16_t p)
{
return vclsq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
index af40f7fa510..a7cdb612ee1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, mve_pred16_t p)
{
return vclsq_x_s8 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclst.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, mve_pred16_t p)
{
return vclsq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 02/23] arm: improve tests and fix vclzq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
2023-01-20 16:39 ` [PATCH 01/23] arm: improve tests and fix vclsq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:46 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 03/23] arm: improve tests and fix vnegq* Andrea Corallo
` (20 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/ChangeLog:
* config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise.
* gcc.target/arm/simd/mve-vclz.c: Update test.
---
gcc/config/arm/mve.md | 2 +-
.../arm/mve/intrinsics/vclzq_m_s16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_s32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_s8.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_u16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_u32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_m_u8.c | 33 +++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vclzq_s16.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclzq_s32.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclzq_s8.c | 24 ++++++++++++--
.../gcc.target/arm/mve/intrinsics/vclzq_u16.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclzq_u32.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vclzq_u8.c | 28 +++++++++++++---
.../arm/mve/intrinsics/vclzq_x_s16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_s32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_s8.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_u16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_u32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vclzq_x_u8.c | 33 +++++++++++++++++--
gcc/testsuite/gcc.target/arm/simd/mve-vclz.c | 6 ++--
20 files changed, 506 insertions(+), 62 deletions(-)
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index e35ea5d9f9c..854371f7e11 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -448,7 +448,7 @@ (define_insn "@mve_vclzq_s<mode>"
(clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE"
- "vclz.i%#<V_sz_elem> %q0, %q1"
+ "vclz.i%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
(define_expand "mve_vclzq_u<mode>"
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
index 9670f8f56f3..620314e4ff2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vclzq_m_s16 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vclzq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
index 18427354570..dfda1e67287 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vclzq_m_s32 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vclzq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
index 2697d039d70..1300fe6f8c4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vclzq_m_s8 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vclzq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
index 8405b16314c..922819d388e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
{
return vclzq_m_u16 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
{
return vclzq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
index 350e6e7e661..6e75a0463cf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
{
return vclzq_m_u32 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
{
return vclzq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
index d455526f975..3c450e8eca0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
{
return vclzq_m_u8 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
{
return vclzq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
index f71a0a4eded..17be53f395b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a)
{
return vclzq_s16 (a);
}
-/* { dg-final { scan-assembler "vclz.i16" } } */
+/*
+**foo1:
+** ...
+** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a)
{
return vclzq (a);
}
-/* { dg-final { scan-assembler "vclz.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
index 46a002bc1c5..5e440febb29 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a)
{
return vclzq_s32 (a);
}
-/* { dg-final { scan-assembler "vclz.i32" } } */
+/*
+**foo1:
+** ...
+** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a)
{
return vclzq (a);
}
-/* { dg-final { scan-assembler "vclz.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
index 3cab6f32310..9eaa9a4269a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a)
{
return vclzq_s8 (a);
}
-/* { dg-final { scan-assembler "vclz.i8" } } */
+/*
+**foo1:
+** ...
+** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a)
{
return vclzq (a);
}
-/* { dg-final { scan-assembler "vclz.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
index cada68b6d65..37179b22a5c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a)
{
- return vclzq_u16 (a);
+ return vclzq_u16 (a);
}
-/* { dg-final { scan-assembler "vclz.i16" } } */
+/*
+**foo1:
+** ...
+** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a)
{
- return vclzq (a);
+ return vclzq (a);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vclz.i16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
index 0291b0cea4c..65ee44d41d5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a)
{
- return vclzq_u32 (a);
+ return vclzq_u32 (a);
}
-/* { dg-final { scan-assembler "vclz.i32" } } */
+/*
+**foo1:
+** ...
+** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a)
{
- return vclzq (a);
+ return vclzq (a);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vclz.i32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
index 5eb7bab5e0d..bed4ab1878a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a)
{
- return vclzq_u8 (a);
+ return vclzq_u8 (a);
}
-/* { dg-final { scan-assembler "vclz.i8" } } */
+/*
+**foo1:
+** ...
+** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a)
{
- return vclzq (a);
+ return vclzq (a);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vclz.i8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
index daddd1b4421..ea78bf20066 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, mve_pred16_t p)
{
return vclzq_x_s16 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, mve_pred16_t p)
{
return vclzq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
index d4f443f7f56..cc85d4d27e2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, mve_pred16_t p)
{
return vclzq_x_s32 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, mve_pred16_t p)
{
return vclzq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
index b33d2c51c3f..0f809167a4f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, mve_pred16_t p)
{
return vclzq_x_s8 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, mve_pred16_t p)
{
return vclzq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
index 6d9bc79261b..a9b662d40f2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, mve_pred16_t p)
{
return vclzq_x_u16 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, mve_pred16_t p)
{
return vclzq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
index c3b053b9f1f..5446938c3fd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, mve_pred16_t p)
{
return vclzq_x_u32 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, mve_pred16_t p)
{
return vclzq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
index 678b2eb898d..548a74e8367 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, mve_pred16_t p)
{
return vclzq_x_u8 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vclzt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, mve_pred16_t p)
{
return vclzq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
index 7068736bc28..38e91fc5bce 100644
--- a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
+++ b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
@@ -23,6 +23,6 @@ FUNC(u, uint, 8, clz)
/* 16 and 8-bit versions are not vectorized because they need pack/unpack
patterns since __builtin_clz uses 32-bit parameter and return value. */
-/* { dg-final { scan-assembler-times {vclz\.i32 q[0-9]+, q[0-9]+} 2 } } */
-/* { dg-final { scan-assembler-times {vclz\.i16 q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
-/* { dg-final { scan-assembler-times {vclz\.i8 q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
+/* { dg-final { scan-assembler-times {vclz\.i32\tq[0-9]+, q[0-9]+} 2 } } */
+/* { dg-final { scan-assembler-times {vclz\.i16\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
+/* { dg-final { scan-assembler-times {vclz\.i8\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 03/23] arm: improve tests and fix vnegq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
2023-01-20 16:39 ` [PATCH 01/23] arm: improve tests and fix vclsq* Andrea Corallo
2023-01-20 16:39 ` [PATCH 02/23] arm: improve tests and fix vclzq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:47 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 04/23] arm: improve tests for vmulhq* Andrea Corallo
` (19 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/ChangeLog:
* config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vnegq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vnegq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vnegq_x_s8.c: Likewise.
* gcc.target/arm/simd/mve-vneg.c: Update test.
* gcc.target/arm/simd/mve-vshr.c: Likewise
---
gcc/config/arm/mve.md | 4 +--
.../gcc.target/arm/mve/intrinsics/vnegq_f16.c | 30 ++++++++++++++++-
.../gcc.target/arm/mve/intrinsics/vnegq_f32.c | 30 ++++++++++++++++-
.../arm/mve/intrinsics/vnegq_m_f16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vnegq_m_f32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vnegq_m_s16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vnegq_m_s32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vnegq_m_s8.c | 33 +++++++++++++++++--
.../gcc.target/arm/mve/intrinsics/vnegq_s16.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vnegq_s32.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vnegq_s8.c | 24 ++++++++++++--
.../arm/mve/intrinsics/vnegq_x_f16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vnegq_x_f32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vnegq_x_s16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vnegq_x_s32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vnegq_x_s8.c | 33 +++++++++++++++++--
gcc/testsuite/gcc.target/arm/simd/mve-vneg.c | 4 +--
gcc/testsuite/gcc.target/arm/simd/mve-vshr.c | 2 +-
18 files changed, 433 insertions(+), 47 deletions(-)
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 854371f7e11..0a243486bdb 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -252,7 +252,7 @@ (define_insn "mve_vnegq_f<mode>"
(neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "vneg.f%#<V_sz_elem> %q0, %q1"
+ "vneg.f%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
@@ -401,7 +401,7 @@ (define_insn "mve_vnegq_s<mode>"
(neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
]
"TARGET_HAVE_MVE"
- "vneg.s%#<V_sz_elem> %q0, %q1"
+ "vneg.s%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
index 9572c140d7e..9853cf6e6dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
@@ -1,13 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vneg.f16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a)
{
return vnegq_f16 (a);
}
-/* { dg-final { scan-assembler "vneg.f16" } } */
+
+/*
+**foo1:
+** ...
+** vneg.f16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
+float16x8_t
+foo1 (float16x8_t a)
+{
+ return vnegq (a);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
index be73cc0c5f5..489cfc760ba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
@@ -1,13 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vneg.f32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a)
{
return vnegq_f32 (a);
}
-/* { dg-final { scan-assembler "vneg.f32" } } */
+
+/*
+**foo1:
+** ...
+** vneg.f32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
+float32x4_t
+foo1 (float32x4_t a)
+{
+ return vnegq (a);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
index 0d917b80cd7..c8b307ea50e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
{
return vnegq_m_f16 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
{
return vnegq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
index f1c0e9a99b0..a530a05e644 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
{
return vnegq_m_f32 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
{
return vnegq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
index 9a945ee62a3..46d6e794dbe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vnegq_m_s16 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vnegq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
index 811f1df0565..5fb1f5c2a4c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vnegq_m_s32 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vnegq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
index 430ebc73783..868a9680858 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vnegq_m_s8 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vnegq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
index a47f9b3423e..3b518c8e0f5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vneg.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a)
{
return vnegq_s16 (a);
}
-/* { dg-final { scan-assembler "vneg.s16" } } */
+/*
+**foo1:
+** ...
+** vneg.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a)
{
return vnegq (a);
}
-/* { dg-final { scan-assembler "vneg.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
index 50401f53bd7..f8682575892 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vneg.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a)
{
return vnegq_s32 (a);
}
-/* { dg-final { scan-assembler "vneg.s32" } } */
+/*
+**foo1:
+** ...
+** vneg.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a)
{
return vnegq (a);
}
-/* { dg-final { scan-assembler "vneg.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
index fd5de3dab56..1be5901740e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vneg.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a)
{
return vnegq_s8 (a);
}
-/* { dg-final { scan-assembler "vneg.s8" } } */
+/*
+**foo1:
+** ...
+** vneg.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a)
{
return vnegq (a);
}
-/* { dg-final { scan-assembler "vneg.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
index e7af36691dc..c10d6d2aebf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, mve_pred16_t p)
{
return vnegq_x_f16 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, mve_pred16_t p)
{
return vnegq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
index d9c3818855a..0ee5ecc8262 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, mve_pred16_t p)
{
return vnegq_x_f32 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, mve_pred16_t p)
{
return vnegq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
index 16f1fa452ce..d774a055d72 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, mve_pred16_t p)
{
return vnegq_x_s16 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, mve_pred16_t p)
{
return vnegq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
index d74683c6f24..77bf1a67cfe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, mve_pred16_t p)
{
return vnegq_x_s32 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, mve_pred16_t p)
{
return vnegq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
index eda4c7fcf7e..ca44512e37a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, mve_pred16_t p)
{
return vnegq_x_s8 (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vnegt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, mve_pred16_t p)
{
return vnegq_x (a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c b/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
index 7945a060e25..1379cae579f 100644
--- a/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
+++ b/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
@@ -45,8 +45,8 @@ FUNC(f, float, 16, 8, -, vneg)
/* MVE has only 128-bit vectors, so we can vectorize only half of the
functions above. */
-/* { dg-final { scan-assembler-times {vneg.s[0-9]+ q[0-9]+, q[0-9]+} 6 } } */
-/* { dg-final { scan-assembler-times {vneg.f[0-9]+ q[0-9]+, q[0-9]+} 2 } } */
+/* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
+/* { dg-final { scan-assembler-times {vneg.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */
/* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 8 } } */
/* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 8 } } */
/* { dg-final { scan-assembler-not {orr\tr[0-9]+, r[0-9]+, r[0-9]+} } } */
diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
index d4258e9fefe..8c7adef9ed8 100644
--- a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
+++ b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
@@ -58,7 +58,7 @@ FUNC_IMM(u, uint, 8, 16, >>, vshrimm)
/* Vector right shifts use vneg and left shifts. */
/* { dg-final { scan-assembler-times {vshl.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
/* { dg-final { scan-assembler-times {vshl.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
-/* { dg-final { scan-assembler-times {vneg.s[0-9]+ q[0-9]+, q[0-9]+} 6 } } */
+/* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
/* Shift by immediate. */
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 04/23] arm: improve tests for vmulhq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (2 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 03/23] arm: improve tests and fix vnegq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:48 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 05/23] arm: improve tests for vmullbq* Andrea Corallo
` (18 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c: Likewise.
---
.../arm/mve/intrinsics/vmulhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulhq_s32.c | 24 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vmulhq_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulhq_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulhq_u32.c | 24 +++++++++++--
.../gcc.target/arm/mve/intrinsics/vmulhq_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulhq_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulhq_x_u8.c | 33 ++++++++++++++++--
18 files changed, 492 insertions(+), 54 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
index 4971869a27b..a7d8460c265 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmulhq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
index 3006de7fd24..997fdbe8d23 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmulhq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
index fbcef24ffc3..567461ff111 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmulhq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
index 7059fecf047..9b813829cd6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulhq_m_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
index 1c2de7081cf..248432a2fe0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmulhq_m_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
index 5eed85fb2d9..464180c1988 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulhq_m_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
index a7260df0f51..0950c06ee05 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b)
{
return vmulhq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vmulh.s16" } } */
+/*
+**foo1:
+** ...
+** vmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b)
{
return vmulhq (a, b);
}
-/* { dg-final { scan-assembler "vmulh.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
index 4fe46e62fc8..db2ab42a1e9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b)
{
return vmulhq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vmulh.s32" } } */
+/*
+**foo1:
+** ...
+** vmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b)
{
return vmulhq (a, b);
}
-/* { dg-final { scan-assembler "vmulh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
index acc08039bb5..8bb2239005f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b)
{
return vmulhq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vmulh.s8" } } */
+/*
+**foo1:
+** ...
+** vmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vmulhq (a, b);
}
-/* { dg-final { scan-assembler "vmulh.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
index 37e40f06d72..bb88136589c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b)
{
return vmulhq_u16 (a, b);
}
-/* { dg-final { scan-assembler "vmulh.u16" } } */
+/*
+**foo1:
+** ...
+** vmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vmulhq (a, b);
}
-/* { dg-final { scan-assembler "vmulh.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
index 5673d91486c..d42c41acb73 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b)
{
return vmulhq_u32 (a, b);
}
-/* { dg-final { scan-assembler "vmulh.u32" } } */
+/*
+**foo1:
+** ...
+** vmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vmulhq (a, b);
}
-/* { dg-final { scan-assembler "vmulh.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
index 29c6312bb7c..c666a9631af 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vmulhq_u8 (a, b);
}
-/* { dg-final { scan-assembler "vmulh.u8" } } */
+/*
+**foo1:
+** ...
+** vmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vmulhq (a, b);
}
-/* { dg-final { scan-assembler "vmulh.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
index b783570be19..a323c961838 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmulhq_x_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmulhq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
index 003485be70b..98168b1be06 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmulhq_x_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmulhq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
index d2359cd371b..b50f59b3df4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmulhq_x_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmulhq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
index c052c4ac007..afa803c2917 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulhq_x_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulhq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
index 7eeba8be611..221795478cd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmulhq_x_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmulhq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
index ff2a53fc160..4383e2e7574 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulhq_x_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulht.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulhq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 05/23] arm: improve tests for vmullbq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (3 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 04/23] arm: improve tests for vmulhq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:51 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 06/23] arm: improve tests for vmulltq* Andrea Corallo
` (17 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c: Likewise.
---
.../arm/mve/intrinsics/vmullbq_int_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_int_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_u32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_int_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmullbq_poly_p16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_poly_p8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmullbq_poly_x_p16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmullbq_poly_x_p8.c | 33 ++++++++++++++++--
24 files changed, 656 insertions(+), 72 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
index be933274d77..a4cc5e52773 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmullbq_int_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmullbq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
index 3dfc26761be..a195884567b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmullbq_int_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmullbq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
index f8c449b28a0..3a5d7705d45 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmullbq_int_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmullbq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
index dd6ed6b71a6..5e327d25a9b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmullbq_int_m_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmullbq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
index 85ce75e7dd8..fb2de994dd8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmullbq_int_m_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmullbq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
index d131a5d9fd7..4cc06c4ef28 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmullbq_int_m_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmullbq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
index 22f4d27f6cc..16c0982386b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int16x8_t a, int16x8_t b)
{
return vmullbq_int_s16 (a, b);
}
-/* { dg-final { scan-assembler "vmullb.s16" } } */
+/*
+**foo1:
+** ...
+** vmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int16x8_t a, int16x8_t b)
{
return vmullbq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullb.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
index 6e677f26b84..e0a82d6e640 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo (int32x4_t a, int32x4_t b)
{
return vmullbq_int_s32 (a, b);
}
-/* { dg-final { scan-assembler "vmullb.s32" } } */
+/*
+**foo1:
+** ...
+** vmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo1 (int32x4_t a, int32x4_t b)
{
return vmullbq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullb.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
index f40b8a6c4dd..031a433c2bb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullb.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int8x16_t a, int8x16_t b)
{
return vmullbq_int_s8 (a, b);
}
-/* { dg-final { scan-assembler "vmullb.s8" } } */
+/*
+**foo1:
+** ...
+** vmullb.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int8x16_t a, int8x16_t b)
{
return vmullbq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullb.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
index 3529ab2772d..4bb19bf5cff 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullb.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint16x8_t a, uint16x8_t b)
{
return vmullbq_int_u16 (a, b);
}
-/* { dg-final { scan-assembler "vmullb.u16" } } */
+/*
+**foo1:
+** ...
+** vmullb.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vmullbq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullb.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
index d843d2bf5fe..d461ed9f9c7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullb.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo (uint32x4_t a, uint32x4_t b)
{
return vmullbq_int_u32 (a, b);
}
-/* { dg-final { scan-assembler "vmullb.u32" } } */
+/*
+**foo1:
+** ...
+** vmullb.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vmullbq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullb.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
index 6268c463ead..c0790778b2d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullb.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint8x16_t a, uint8x16_t b)
{
return vmullbq_int_u8 (a, b);
}
-/* { dg-final { scan-assembler "vmullb.u8" } } */
+/*
+**foo1:
+** ...
+** vmullb.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vmullbq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullb.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
index 87f8e21a7d0..ee83ca61158 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmullbq_int_x_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmullbq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
index 5e563728a4a..42ae3324cd9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmullbq_int_x_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmullbq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
index b2ca4134ee5..8dcf9b726b0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmullbq_int_x_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmullbq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
index 15269101fe5..31330da9a93 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmullbq_int_x_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmullbq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
index 7a7836303ec..b882d644347 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmullbq_int_x_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmullbq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
index f422a3c66f0..4b402374eb7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmullbq_int_x_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmullbq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
index 527acb74e09..2efb87dff01 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmullbq_poly_m_p16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.p16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmullbq_poly_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.p16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
index 5403394e870..b435f44cb32 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmullbq_poly_m_p8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.p8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmullbq_poly_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.p8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
index d01d5997ff4..bfd052222fe 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullb.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint16x8_t a, uint16x8_t b)
{
return vmullbq_poly_p16 (a, b);
}
-/* { dg-final { scan-assembler "vmullb.p16" } } */
+/*
+**foo1:
+** ...
+** vmullb.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vmullbq_poly (a, b);
}
-/* { dg-final { scan-assembler "vmullb.p16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
index de97134add7..a2a53e8a3dc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullb.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint8x16_t a, uint8x16_t b)
{
return vmullbq_poly_p8 (a, b);
}
-/* { dg-final { scan-assembler "vmullb.p8" } } */
+/*
+**foo1:
+** ...
+** vmullb.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vmullbq_poly (a, b);
}
-/* { dg-final { scan-assembler "vmullb.p8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
index f94d9052433..bee45f95939 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmullbq_poly_x_p16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.p16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmullbq_poly_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
index 6fdc94496bc..7cd15f3a7f1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmullbq_poly_x_p8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmullbt.p8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmullbq_poly_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 06/23] arm: improve tests for vmulltq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (4 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 05/23] arm: improve tests for vmullbq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:52 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 07/23] arm: improve tests for vcaddq* Andrea Corallo
` (16 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c: Likewise.
---
.../arm/mve/intrinsics/vmulltq_int_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_int_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_u32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_int_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_poly_m_p16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_poly_m_p8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vmulltq_poly_p16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_poly_p8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vmulltq_poly_x_p16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vmulltq_poly_x_p8.c | 33 ++++++++++++++++--
24 files changed, 656 insertions(+), 72 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
index 25ecf7a2c51..7f573e9109e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmulltq_int_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmulltq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
index f8d02880ea0..da440dd1365 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmulltq_int_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmulltq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
index 3f2fc333a65..ceb8e1d5a94 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmulltq_int_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmulltq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
index b7ab408d53c..a751546ae13 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulltq_int_m_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulltq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
index e43ad98d933..a6c4d272968 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmulltq_int_m_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmulltq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
index 7f4b90b08dd..1a7466bb5b8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulltq_int_m_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulltq_int_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
index 34b75d4abc8..cd907f6224c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int16x8_t a, int16x8_t b)
{
return vmulltq_int_s16 (a, b);
}
-/* { dg-final { scan-assembler "vmullt.s16" } } */
+/*
+**foo1:
+** ...
+** vmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int16x8_t a, int16x8_t b)
{
return vmulltq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
index 7e09bf93e0e..dbc4c80b440 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo (int32x4_t a, int32x4_t b)
{
return vmulltq_int_s32 (a, b);
}
-/* { dg-final { scan-assembler "vmullt.s32" } } */
+/*
+**foo1:
+** ...
+** vmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo1 (int32x4_t a, int32x4_t b)
{
return vmulltq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
index b6eb1f5e7f2..0fef6a21207 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int8x16_t a, int8x16_t b)
{
return vmulltq_int_s8 (a, b);
}
-/* { dg-final { scan-assembler "vmullt.s8" } } */
+/*
+**foo1:
+** ...
+** vmullt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int8x16_t a, int8x16_t b)
{
return vmulltq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullt.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
index f4fc9c0c634..91b6fb4595d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint16x8_t a, uint16x8_t b)
{
return vmulltq_int_u16 (a, b);
}
-/* { dg-final { scan-assembler "vmullt.u16" } } */
+/*
+**foo1:
+** ...
+** vmullt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vmulltq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullt.u16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
index d1bc3a8f990..71c62a12afb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo (uint32x4_t a, uint32x4_t b)
{
return vmulltq_int_u32 (a, b);
}
-/* { dg-final { scan-assembler "vmullt.u32" } } */
+/*
+**foo1:
+** ...
+** vmullt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vmulltq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullt.u32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
index 87f3c4e386a..7506adce33e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint8x16_t a, uint8x16_t b)
{
return vmulltq_int_u8 (a, b);
}
-/* { dg-final { scan-assembler "vmullt.u8" } } */
+/*
+**foo1:
+** ...
+** vmullt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vmulltq_int (a, b);
}
-/* { dg-final { scan-assembler "vmullt.u8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
index c13ef50147e..c2376abe268 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmulltq_int_x_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vmulltq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
index e82321ecb79..788789db120 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmulltq_int_x_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int64x2_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vmulltq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
index 7f093c26080..3935741d041 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmulltq_int_x_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vmulltq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
index d0f6461448b..32ee5b2e4e8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulltq_int_x_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulltq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
index 55e19cb204a..cc3105650a1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmulltq_int_x_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint64x2_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vmulltq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
index 650c9471c7e..01713fba245 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulltq_int_x_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.u8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulltq_int_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
index 944db4c2fab..6d368e2ba68 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulltq_poly_m_p16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.p16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulltq_poly_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.p16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
index d07311943c2..75b8811fdd9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulltq_poly_m_p8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.p8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulltq_poly_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.p8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
index 121de8e9c0e..9f08d57eef9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint16x8_t a, uint16x8_t b)
{
return vmulltq_poly_p16 (a, b);
}
-/* { dg-final { scan-assembler "vmullt.p16" } } */
+/*
+**foo1:
+** ...
+** vmullt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vmulltq_poly (a, b);
}
-/* { dg-final { scan-assembler "vmullt.p16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
index c7d9548a8ab..59e6e1bb6e0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmullt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint8x16_t a, uint8x16_t b)
{
return vmulltq_poly_p8 (a, b);
}
-/* { dg-final { scan-assembler "vmullt.p8" } } */
+/*
+**foo1:
+** ...
+** vmullt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vmulltq_poly (a, b);
}
-/* { dg-final { scan-assembler "vmullt.p8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
index fb4b849b8b0..f3d3de2d1d6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulltq_poly_x_p16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.p16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vmulltq_poly_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
index 1e79b2987c9..2c7a6294540 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulltq_poly_x_p8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vmulltt.p8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vmulltq_poly_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 07/23] arm: improve tests for vcaddq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (5 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 06/23] arm: improve tests for vmulltq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:52 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 08/23] arm: improve tests for vcmlaq* Andrea Corallo
` (15 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise.
---
.../arm/mve/intrinsics/vcaddq_rot270_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot270_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_u32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot270_x_u8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_u16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_u32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_m_u8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcaddq_rot90_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_u16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_u32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_u8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_s16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_s32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_s8.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_u16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_u32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcaddq_rot90_x_u8.c | 33 ++++++++++++++++--
48 files changed, 1312 insertions(+), 144 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
index b50a5d54bb2..fb83a1cd8fc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vcaddq_rot270_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.f16" } } */
+/*
+**foo1:
+** ...
+** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcaddq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
index 0a12ff6fdcf..f8341a74e4a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vcaddq_rot270_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.f32" } } */
+/*
+**foo1:
+** ...
+** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcaddq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
index e78bbd5446c..b4e2ffda280 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_m_f16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
index 8b53c665463..e7adc1be243 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_m_f32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
index 61948bb3552..fdde2f56b20 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
index 0bbe24b3b4a..1cb6afb4e4d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
index e9cab3df37f..39f063970f7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcaddq_rot270_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcaddq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
index 25c71257920..fd285288487 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_m_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
index ee437eeb41f..053a61197d6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_m_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
index 419ba7e98ee..869983a0a0b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcaddq_rot270_m_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcaddq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
index 832be006af8..67b0d0a4d0f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b)
{
return vcaddq_rot270_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i16" } } */
+/*
+**foo1:
+** ...
+** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b)
{
return vcaddq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
index dbebe22183c..ab28458130e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b)
{
return vcaddq_rot270_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i32" } } */
+/*
+**foo1:
+** ...
+** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b)
{
return vcaddq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
index 5f7852f69d4..842d6adf96d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b)
{
return vcaddq_rot270_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i8" } } */
+/*
+**foo1:
+** ...
+** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vcaddq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
index 80b6c0ff3a9..97773d8daa9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b)
{
return vcaddq_rot270_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i16" } } */
+/*
+**foo1:
+** ...
+** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vcaddq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
index 260c5b81e22..17d5c147295 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b)
{
return vcaddq_rot270_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i32" } } */
+/*
+**foo1:
+** ...
+** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vcaddq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
index ae9c4f436ad..faf01a18824 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vcaddq_rot270_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i8" } } */
+/*
+**foo1:
+** ...
+** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vcaddq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
index 4b99c638830..f35aaf01a59 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_x_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
index 2532ef7d535..6446d9edc42 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_x_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
index 676efa8cfd7..b92fd2ee8aa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_x_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
index 9aa05d5bfdf..b8acc67feb9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_x_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
index 4532296494c..78ec7862574 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcaddq_rot270_x_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcaddq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
index 51db9379e9b..ea781622424 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_x_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcaddq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
index a2e51c13268..a43d806ac3d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_x_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcaddq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
index 6ae7f693664..eb9cf0cffb6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcaddq_rot270_x_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcaddq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
index e1b21e6c5c3..1e78bd144b2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vcaddq_rot90_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.f16" } } */
+/*
+**foo1:
+** ...
+** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcaddq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
index 118489e923f..9611f8938dc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vcaddq_rot90_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.f32" } } */
+/*
+**foo1:
+** ...
+** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcaddq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
index e47e242f061..58608b4961e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_m_f16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
index 833aa9c2367..125dbe5405c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_m_f32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
index 46babedb949..38e0e47b500 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
index 15774e5a142..455d8388f0f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
index 6f2bb4da3e3..7217dadaac0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcaddq_rot90_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcaddq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
index b9113fe4f39..d3edbaa478c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_m_u16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
index b7fe5106414..eb1bf2a4274 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_m_u32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
index e6c4e9f66fb..3343399b2c3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcaddq_rot90_m_u8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcaddq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
index 8279da9ed45..134fba6280f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b)
{
return vcaddq_rot90_s16 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i16" } } */
+/*
+**foo1:
+** ...
+** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b)
{
return vcaddq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
index 6d59da7757d..b8e81679e9e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b)
{
return vcaddq_rot90_s32 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i32" } } */
+/*
+**foo1:
+** ...
+** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b)
{
return vcaddq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
index b4f5a22c03e..2a37b8e7b83 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b)
{
return vcaddq_rot90_s8 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i8" } } */
+/*
+**foo1:
+** ...
+** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vcaddq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
index e203bd017cd..51e1871b690 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b)
{
return vcaddq_rot90_u16 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i16" } } */
+/*
+**foo1:
+** ...
+** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b)
{
return vcaddq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
index 0cba5d5bda8..5905062064a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b)
{
return vcaddq_rot90_u32 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i32" } } */
+/*
+**foo1:
+** ...
+** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b)
{
return vcaddq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
index f4f0476427a..37374637eb3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b)
{
return vcaddq_rot90_u8 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i8" } } */
+/*
+**foo1:
+** ...
+** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b)
{
return vcaddq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcadd.i8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
index 476648ad459..4223c4d0f33 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_x_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
index ae9a196af7f..9e67c56b5e8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_x_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
index 16b5949a2a2..553fc2801fb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_x_s16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
index d30150e0f1c..1cd7338d162 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_x_s32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
index fa79ce24eaf..13373d46154 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcaddq_rot90_x_s8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vcaddq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
index e18a39ed125..3f8957783e3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint16x8_t
foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_x_u16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint16x8_t
foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
{
return vcaddq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
index b9b95fe360e..34cb0363574 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint32x4_t
foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_x_u32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint32x4_t
foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
{
return vcaddq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
index b8b8978c1e6..d383404052d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint8x16_t
foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcaddq_rot90_x_u8 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcaddt.i8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
uint8x16_t
foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
{
return vcaddq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 08/23] arm: improve tests for vcmlaq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (6 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 07/23] arm: improve tests for vcaddq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:53 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 09/23] arm: improve tests for vcmulq* Andrea Corallo
` (14 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcmlaq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vcmlaq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c: Likewise.
---
.../arm/mve/intrinsics/vcmlaq_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot180_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot180_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot270_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot270_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot90_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot90_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 34 ++++++++++++++++---
16 files changed, 416 insertions(+), 48 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
index fa7d0c05e8c..bb8a99790a0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, float16x8_t c)
{
return vcmlaq_f16 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f16" } } */
+/*
+**foo1:
+** ...
+** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
{
return vcmlaq (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
index 166bf421f14..71ec4b8479c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, float32x4_t c)
{
return vcmlaq_f32 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f32" } } */
+/*
+**foo1:
+** ...
+** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
{
return vcmlaq (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
index 0929f5a0a89..3db345d0791 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
{
return vcmlaq_m_f16 (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
{
return vcmlaq_m (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
index 1f4ba453cbc..dcbd2dccce5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
{
return vcmlaq_m_f32 (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
{
return vcmlaq_m (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
index fc6ba30b36a..f76ae2383a2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, float16x8_t c)
{
return vcmlaq_rot180_f16 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f16" } } */
+/*
+**foo1:
+** ...
+** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
{
return vcmlaq_rot180 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
index dbe3f26b3b9..c97d0d0d852 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, float32x4_t c)
{
return vcmlaq_rot180_f32 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f32" } } */
+/*
+**foo1:
+** ...
+** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
{
return vcmlaq_rot180 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
index 84a3bd81ad9..132cdf9954f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
{
return vcmlaq_rot180_m_f16 (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
{
return vcmlaq_rot180_m (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
index 61f5716f0b7..99e96ebe3a9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
{
return vcmlaq_rot180_m_f32 (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
{
return vcmlaq_rot180_m (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
index 1b0bef91f37..fae85105feb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, float16x8_t c)
{
return vcmlaq_rot270_f16 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f16" } } */
+/*
+**foo1:
+** ...
+** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
{
return vcmlaq_rot270 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
index 83e15025e44..54a9b662772 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, float32x4_t c)
{
return vcmlaq_rot270_f32 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f32" } } */
+/*
+**foo1:
+** ...
+** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
{
return vcmlaq_rot270 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
index 6e033b1d7ab..e34f83165c3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
{
return vcmlaq_rot270_m_f16 (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
{
return vcmlaq_rot270_m (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
index 4928341076d..cdba91b8e8c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
{
return vcmlaq_rot270_m_f32 (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
{
return vcmlaq_rot270_m (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
index 16744a4582c..f767b2b6e6b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, float16x8_t c)
{
return vcmlaq_rot90_f16 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f16" } } */
+/*
+**foo1:
+** ...
+** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
{
return vcmlaq_rot90 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
index f1f19a87ba7..6c9b24f271d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, float32x4_t c)
{
return vcmlaq_rot90_f32 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f32" } } */
+/*
+**foo1:
+** ...
+** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
{
return vcmlaq_rot90 (a, b, c);
}
-/* { dg-final { scan-assembler "vcmla.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
index 7133ddc7ad5..9141c9e6f90 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
{
return vcmlaq_rot90_m_f16 (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
{
return vcmlaq_rot90_m (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
index 6022e3be538..f317d411806 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
{
return vcmlaq_rot90_m_f32 (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
{
return vcmlaq_rot90_m (a, b, c, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmlat.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 09/23] arm: improve tests for vcmulq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (7 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 08/23] arm: improve tests for vcmlaq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 17:59 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 10/23] arm: improve tests and fix vqabsq* Andrea Corallo
` (13 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c: Likewise.
---
.../arm/mve/intrinsics/vcmulq_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot180_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot180_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_rot270_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot270_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_rot90_f16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot90_f32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vcmulq_x_f16.c | 33 ++++++++++++++++--
.../arm/mve/intrinsics/vcmulq_x_f32.c | 33 ++++++++++++++++--
24 files changed, 656 insertions(+), 74 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
index 142c315ecf5..456370e1de1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vcmulq_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f16" } } */
+/*
+**foo1:
+** ...
+** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmulq (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
index 158d750793d..64db652a1a1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vcmulq_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f32" } } */
+/*
+**foo1:
+** ...
+** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmulq (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
index b38e0d9fb52..b60f5d718f8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_m_f16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
index 7bf68735e52..22157d4e58f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_m_f32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
index fc7162aaa9c..f01b0f3421f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vcmulq_rot180_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f16" } } */
+/*
+**foo1:
+** ...
+** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmulq_rot180 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
index 13a4553b6bd..537385c5209 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vcmulq_rot180_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f32" } } */
+/*
+**foo1:
+** ...
+** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmulq_rot180 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
index 8767e2beee8..bc8692eb043 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot180_m_f16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot180_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
index 3f951039f35..d2a0b6d3f2c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot180_m_f32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot180_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
index f8e835f158f..37d7b79a75c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot180_x_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot180_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
index d0d30c59d44..1e57fba4bd3 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot180_x_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot180_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
index 225b8910f88..05c444af804 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vcmulq_rot270_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f16" } } */
+/*
+**foo1:
+** ...
+** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmulq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
index 1c8b0ebcf7e..b599c9fc171 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vcmulq_rot270_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f32" } } */
+/*
+**foo1:
+** ...
+** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmulq_rot270 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
index 20ccb5e9423..fded8a05089 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot270_m_f16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
index 7499f4271a6..54d939eb378 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot270_m_f32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot270_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
index d1b52e74d6d..d1e58cb84bb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot270_x_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
index 35da5936f66..07c781f5103 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot270_x_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot270_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
index 17f96cb0a78..53b1930c045 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b)
{
return vcmulq_rot90_f16 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f16" } } */
+/*
+**foo1:
+** ...
+** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b)
{
return vcmulq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
index 739fc9cd1fa..147f1807c29 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b)
{
return vcmulq_rot90_f32 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f32" } } */
+/*
+**foo1:
+** ...
+** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b)
{
return vcmulq_rot90 (a, b);
}
-/* { dg-final { scan-assembler "vcmul.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
index 8259baa82cc..8c4b0902b09 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot90_m_f16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
index 751a9a6c03d..b3131a5e984 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot90_m_f32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot90_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
index c4aef6cbf30..000610367b9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot90_x_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
index 9c54f0870e7..8e31ad563c6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot90_x_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_rot90_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
index 7634d61b6ea..b53324738f2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_x_f16 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float16x8_t
foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
{
return vcmulq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
index 21b6acf9733..a73482a09e1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_x_f32 (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vcmult.f32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
+** ...
+*/
float32x4_t
foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
{
return vcmulq_x (a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 10/23] arm: improve tests and fix vqabsq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (8 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 09/23] arm: improve tests for vcmulq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:01 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 11/23] arm: improve tests for vqdmladhq* Andrea Corallo
` (12 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/ChangeLog:
* config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqabsq_s8.c: Likewise.
---
gcc/config/arm/mve.md | 2 +-
.../arm/mve/intrinsics/vqabsq_m_s16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vqabsq_m_s32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vqabsq_m_s8.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vqabsq_s16.c | 28 +++++++++++++---
.../arm/mve/intrinsics/vqabsq_s32.c | 28 +++++++++++++---
.../gcc.target/arm/mve/intrinsics/vqabsq_s8.c | 24 ++++++++++++--
7 files changed, 161 insertions(+), 20 deletions(-)
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 0a243486bdb..600adf7d69b 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -388,7 +388,7 @@ (define_insn "mve_vqabsq_s<mode>"
VQABSQ_S))
]
"TARGET_HAVE_MVE"
- "vqabs.s%#<V_sz_elem> %q0, %q1"
+ "vqabs.s%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
index e74e04ac92f..7172ac5cddd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqabst.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vqabsq_m_s16 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqabst.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqabst.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vqabsq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
index f6ca8a6c3d6..297cb196f1a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqabst.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vqabsq_m_s32 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqabst.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqabst.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vqabsq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
index d89a5aa3fa5..83c69931239 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqabst.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vqabsq_m_s8 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqabst.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqabst.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vqabsq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
index e67c008cf6e..bf849fe9354 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqabs.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a)
{
return vqabsq_s16 (a);
}
-/* { dg-final { scan-assembler "vqabs.s16" } } */
+/*
+**foo1:
+** ...
+** vqabs.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a)
{
return vqabsq (a);
}
-/* { dg-final { scan-assembler "vqabs.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
index 8023ff8d22e..1f88821de23 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqabs.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a)
{
return vqabsq_s32 (a);
}
-/* { dg-final { scan-assembler "vqabs.s32" } } */
+/*
+**foo1:
+** ...
+** vqabs.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a)
{
return vqabsq (a);
}
-/* { dg-final { scan-assembler "vqabs.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
index b36d2b762e9..1399f7c1636 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqabs.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a)
{
return vqabsq_s8 (a);
}
-/* { dg-final { scan-assembler "vqabs.s8" } } */
+/*
+**foo1:
+** ...
+** vqabs.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a)
{
return vqabsq (a);
}
-/* { dg-final { scan-assembler "vqabs.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 11/23] arm: improve tests for vqdmladhq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (9 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 10/23] arm: improve tests and fix vqabsq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:03 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 12/23] arm: improve tests for vqdmladhxq* Andrea Corallo
` (11 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqdmladhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhq_s8.c | 24 +++++++++++--
6 files changed, 156 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
index 51cdadc9ece..aa9c78c883b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqdmladhq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladht.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqdmladhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladht.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
index 7e43fed1503..4694a6f9ec5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqdmladhq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqdmladhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
index adf591041e3..c8dc67fdd12 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqdmladhq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladht.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqdmladhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladht.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
index 2dc453bdd9a..74ebbfa8b97 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqdmladhq_s16 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladh.s16" } } */
+/*
+**foo1:
+** ...
+** vqdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqdmladhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladh.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
index 06f3204e47e..796de4df283 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqdmladhq_s32 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladh.s32" } } */
+/*
+**foo1:
+** ...
+** vqdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqdmladhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
index 79670b8b153..d585f5fac20 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqdmladhq_s8 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladh.s8" } } */
+/*
+**foo1:
+** ...
+** vqdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqdmladhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladh.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 12/23] arm: improve tests for vqdmladhxq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (10 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 11/23] arm: improve tests for vqdmladhq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:04 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 13/23] arm: improve tests for vqrdmladhq* Andrea Corallo
` (10 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c: Improve test.
---
.../arm/mve/intrinsics/vqdmladhxq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhxq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhxq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmladhxq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhxq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmladhxq_s8.c | 24 +++++++++++--
6 files changed, 156 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
index c2446e69181..19c5ce5a64f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqdmladhxq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladhxt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqdmladhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladhxt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
index 12b45517535..e00162addae 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqdmladhxq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladhxt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqdmladhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladhxt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
index 146aa51306b..19767d2cd41 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqdmladhxq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladhxt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqdmladhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmladhxt.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
index 5a6f4455c20..c6a2fa80670 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqdmladhxq_s16 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladhx.s16" } } */
+/*
+**foo1:
+** ...
+** vqdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqdmladhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladhx.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
index 4eafa6f9476..d38bd691243 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqdmladhxq_s32 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladhx.s32" } } */
+/*
+**foo1:
+** ...
+** vqdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqdmladhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladhx.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
index cc6643574f4..322f702d962 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqdmladhxq_s8 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladhx.s8" } } */
+/*
+**foo1:
+** ...
+** vqdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqdmladhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmladhx.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 13/23] arm: improve tests for vqrdmladhq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (11 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 12/23] arm: improve tests for vqdmladhxq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:04 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 14/23] arm: improve tests for vqrdmladhxq* Andrea Corallo
` (9 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqrdmladhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhq_s8.c | 24 +++++++++++--
6 files changed, 156 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
index fce4f5a35ef..5b0e134a0ff 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmladhq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladht.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmladhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladht.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
index e550b6a7995..6fdf3879cc2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmladhq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmladhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
index b07b28e5bcd..ef75f737161 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmladhq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladht.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmladhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladht.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
index 5bdac923b20..cf7cdb202ce 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqrdmladhq_s16 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladh.s16" } } */
+/*
+**foo1:
+** ...
+** vqrdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqrdmladhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladh.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
index aade9bb0ea1..5a022fe3009 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqrdmladhq_s32 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladh.s32" } } */
+/*
+**foo1:
+** ...
+** vqrdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqrdmladhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
index bde80fa5279..2cb27df16f6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqrdmladhq_s8 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladh.s8" } } */
+/*
+**foo1:
+** ...
+** vqrdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqrdmladhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladh.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 14/23] arm: improve tests for vqrdmladhxq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (12 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 13/23] arm: improve tests for vqrdmladhq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:05 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 15/23] arm: improve tests for vqrdmlashq* Andrea Corallo
` (8 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqrdmladhxq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhxq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhxq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmladhxq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhxq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmladhxq_s8.c | 24 +++++++++++--
6 files changed, 156 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
index 677efdcd1e4..1f68671b3f9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmladhxq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladhxt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmladhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladhxt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
index 8ee8bbb420b..eaea6e1f482 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmladhxq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladhxt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmladhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladhxt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
index 7cfa88fee28..0f582a91f3a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmladhxq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladhxt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmladhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmladhxt.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
index 2410ef12b38..a26898ebdab 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqrdmladhxq_s16 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladhx.s16" } } */
+/*
+**foo1:
+** ...
+** vqrdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqrdmladhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladhx.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
index 716028cadfd..572486ecf82 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqrdmladhxq_s32 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladhx.s32" } } */
+/*
+**foo1:
+** ...
+** vqrdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqrdmladhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladhx.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
index 8f9bed5fdb7..00e478b9d3e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqrdmladhxq_s8 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladhx.s8" } } */
+/*
+**foo1:
+** ...
+** vqrdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqrdmladhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmladhx.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 15/23] arm: improve tests for vqrdmlashq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (13 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 14/23] arm: improve tests for vqrdmladhxq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:06 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 16/23] arm: improve tests for vqdmlsdhq* Andrea Corallo
` (7 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 32 +++++++++++++++----
.../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 32 +++++++++++++++----
.../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 32 +++++++++++++++----
3 files changed, 78 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
index 8ff8c34d529..2710f2f0442 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
-foo (int16x8_t a, int16x8_t b, int16_t c)
+foo (int16x8_t m1, int16x8_t m2, int16_t add)
{
- return vqrdmlashq_n_s16 (a, b, c);
+ return vqrdmlashq_n_s16 (m1, m2, add);
}
-/* { dg-final { scan-assembler "vqrdmlash.s16" } } */
+/*
+**foo1:
+** ...
+** vqrdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
-foo1 (int16x8_t a, int16x8_t b, int16_t c)
+foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
{
- return vqrdmlashq (a, b, c);
+ return vqrdmlashq (m1, m2, add);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vqrdmlash.s16" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
index 02583f0627b..5fefc3938c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
-foo (int32x4_t a, int32x4_t b, int32_t c)
+foo (int32x4_t m1, int32x4_t m2, int32_t add)
{
- return vqrdmlashq_n_s32 (a, b, c);
+ return vqrdmlashq_n_s32 (m1, m2, add);
}
-/* { dg-final { scan-assembler "vqrdmlash.s32" } } */
+/*
+**foo1:
+** ...
+** vqrdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
-foo1 (int32x4_t a, int32x4_t b, int32_t c)
+foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
{
- return vqrdmlashq (a, b, c);
+ return vqrdmlashq (m1, m2, add);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vqrdmlash.s32" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
index 0bd5bcac71f..df96fe85213 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
-foo (int8x16_t a, int8x16_t b, int8_t c)
+foo (int8x16_t m1, int8x16_t m2, int8_t add)
{
- return vqrdmlashq_n_s8 (a, b, c);
+ return vqrdmlashq_n_s8 (m1, m2, add);
}
-/* { dg-final { scan-assembler "vqrdmlash.s8" } } */
+/*
+**foo1:
+** ...
+** vqrdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
-foo1 (int8x16_t a, int8x16_t b, int8_t c)
+foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
{
- return vqrdmlashq (a, b, c);
+ return vqrdmlashq (m1, m2, add);
+}
+
+#ifdef __cplusplus
}
+#endif
-/* { dg-final { scan-assembler "vqrdmlash.s8" } } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 16/23] arm: improve tests for vqdmlsdhq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (14 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 15/23] arm: improve tests for vqrdmlashq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:06 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 17/23] arm: improve tests for vqdmlsdhxq* Andrea Corallo
` (6 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqdmlsdhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhq_s8.c | 24 +++++++++++--
6 files changed, 156 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
index d1e66864d10..f87287ab8cd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqdmlsdhq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdht.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqdmlsdhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdht.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
index cc80f211ec8..8155aaf843c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqdmlsdhq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqdmlsdhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
index 5c9d81a6526..d39badc7707 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqdmlsdhq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdht.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqdmlsdhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdht.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
index eb058fb9789..a4fa1d5024b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqdmlsdhq_s16 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdh.s16" } } */
+/*
+**foo1:
+** ...
+** vqdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqdmlsdhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdh.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
index 27b93d6b76c..0c6ba426ded 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqdmlsdhq_s32 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdh.s32" } } */
+/*
+**foo1:
+** ...
+** vqdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqdmlsdhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
index 1dd2a59ee4b..089c4cdcc39 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqdmlsdhq_s8 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdh.s8" } } */
+/*
+**foo1:
+** ...
+** vqdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqdmlsdhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdh.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 17/23] arm: improve tests for vqdmlsdhxq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (15 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 16/23] arm: improve tests for vqdmlsdhq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:07 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 18/23] arm: improve tests for vqrdmlsdhq* Andrea Corallo
` (5 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqdmlsdhxq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhxq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhxq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqdmlsdhxq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhxq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqdmlsdhxq_s8.c | 24 +++++++++++--
6 files changed, 156 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
index 6ab9743054c..1742d47291c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqdmlsdhxq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdhxt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqdmlsdhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdhxt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
index a34618e97fd..1c1b73a2251 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqdmlsdhxq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdhxt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqdmlsdhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdhxt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
index fdbe89ab6b8..0a980a081a1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqdmlsdhxq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdhxt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqdmlsdhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqdmlsdhxt.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
index 786decc6238..713ce9732d2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqdmlsdhxq_s16 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdhx.s16" } } */
+/*
+**foo1:
+** ...
+** vqdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqdmlsdhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdhx.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
index c0244c44067..02f0a3cd6b4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqdmlsdhxq_s32 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdhx.s32" } } */
+/*
+**foo1:
+** ...
+** vqdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqdmlsdhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdhx.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
index 12b43c8edd8..c1792879138 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqdmlsdhxq_s8 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdhx.s8" } } */
+/*
+**foo1:
+** ...
+** vqdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqdmlsdhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqdmlsdhx.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 18/23] arm: improve tests for vqrdmlsdhq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (16 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 17/23] arm: improve tests for vqdmlsdhxq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:07 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 19/23] arm: improve tests for vqrdmlsdhxq* Andrea Corallo
` (4 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhq_s8.c | 24 +++++++++++--
6 files changed, 156 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
index d0054b8ea97..6a5776215ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmlsdhq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdht.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmlsdhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdht.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
index 7d3fe45eb4d..9539e249d6a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmlsdhq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmlsdhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
index c33f8ea903b..69e54f53a76 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmlsdhq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdht.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmlsdhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdht.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
index 3bd760d38aa..3eb957d6029 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqrdmlsdhq_s16 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdh.s16" } } */
+/*
+**foo1:
+** ...
+** vqrdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqrdmlsdhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdh.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
index e23dc94a9ed..3a3fb506c01 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqrdmlsdhq_s32 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdh.s32" } } */
+/*
+**foo1:
+** ...
+** vqrdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqrdmlsdhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
index 836e04af566..65ac15da9c7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqrdmlsdhq_s8 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdh.s8" } } */
+/*
+**foo1:
+** ...
+** vqrdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqrdmlsdhq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdh.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 19/23] arm: improve tests for vqrdmlsdhxq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (17 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 18/23] arm: improve tests for vqrdmlsdhq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 20/23] arm: improve tests for vqrdmulhq* Andrea Corallo
` (3 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 24 +++++++++++--
6 files changed, 156 insertions(+), 18 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
index 2fbd351f3b4..3598f50ccba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmlsdhxq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdhxt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmlsdhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdhxt.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
index 324a6e63398..1ab22edf9ca 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmlsdhxq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdhxt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmlsdhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdhxt.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
index 287868b1190..01103e99b61 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmlsdhxq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdhxt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmlsdhxq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmlsdhxt.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
index 9d8ea9b2694..522d0ba4a3a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqrdmlsdhxq_s16 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdhx.s16" } } */
+/*
+**foo1:
+** ...
+** vqrdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
{
return vqrdmlsdhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdhx.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
index aca0b358ea9..5198dfa754e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqrdmlsdhxq_s32 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdhx.s32" } } */
+/*
+**foo1:
+** ...
+** vqrdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
{
return vqrdmlsdhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdhx.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
index 18f95317b4c..b5baa3dea79 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqrdmlsdhxq_s8 (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdhx.s8" } } */
+/*
+**foo1:
+** ...
+** vqrdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
{
return vqrdmlsdhxq (inactive, a, b);
}
-/* { dg-final { scan-assembler "vqrdmlsdhx.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 20/23] arm: improve tests for vqrdmulhq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (18 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 19/23] arm: improve tests for vqrdmlsdhxq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 21/23] arm: improve tests and fix vqnegq* Andrea Corallo
` (2 subsequent siblings)
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.
---
.../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_m_s8.c | 34 ++++++++++++++++---
.../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_n_s8.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_s16.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_s32.c | 24 +++++++++++--
.../arm/mve/intrinsics/vqrdmulhq_s8.c | 24 +++++++++++--
12 files changed, 312 insertions(+), 36 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
index c4b6b7e22f8..fc3a33073aa 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
{
return vqrdmulhq_m_n_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
{
return vqrdmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
index 6de3eb1cb9a..897ad5bd28c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
{
return vqrdmulhq_m_n_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
{
return vqrdmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
index df3dfa87fbf..05ab0609af4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
{
return vqrdmulhq_m_n_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
{
return vqrdmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
index 24831e8a5f8..1d9dc07787c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmulhq_m_s16 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
{
return vqrdmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
index 70257c3c0a0..76d7507e35a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmulhq_m_s32 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
{
return vqrdmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
index 7cd39d2a0d4..7fd2119ea63 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
@@ -1,23 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmulhq_m_s8 (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqrdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
{
return vqrdmulhq_m (inactive, a, b, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqrdmulht.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
index 42fe9cbaa2b..8a90a399858 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16_t b)
{
return vqrdmulhq_n_s16 (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s16" } } */
+/*
+**foo1:
+** ...
+** vqrdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16_t b)
{
return vqrdmulhq (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
index 5f014fae9fb..973464b3297 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32_t b)
{
return vqrdmulhq_n_s32 (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s32" } } */
+/*
+**foo1:
+** ...
+** vqrdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32_t b)
{
return vqrdmulhq (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
index 887e294661b..65aab964f4e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8_t b)
{
return vqrdmulhq_n_s8 (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s8" } } */
+/*
+**foo1:
+** ...
+** vqrdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8_t b)
{
return vqrdmulhq (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
index 409fc29c0d0..f3153c86b4c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a, int16x8_t b)
{
return vqrdmulhq_s16 (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s16" } } */
+/*
+**foo1:
+** ...
+** vqrdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a, int16x8_t b)
{
return vqrdmulhq (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
index 18e11b1248c..48b10dbd025 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a, int32x4_t b)
{
return vqrdmulhq_s32 (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s32" } } */
+/*
+**foo1:
+** ...
+** vqrdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a, int32x4_t b)
{
return vqrdmulhq (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
index 3f1441d5d6b..9f0346fc841 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqrdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a, int8x16_t b)
{
return vqrdmulhq_s8 (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s8" } } */
+/*
+**foo1:
+** ...
+** vqrdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a, int8x16_t b)
{
return vqrdmulhq (a, b);
}
-/* { dg-final { scan-assembler "vqrdmulh.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 21/23] arm: improve tests and fix vqnegq*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (19 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 20/23] arm: improve tests for vqrdmulhq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 22/23] arm: improve tests for vld2q* Andrea Corallo
2023-01-20 16:39 ` [PATCH 23/23] arm: fix missing extern "C" in MVE tests Andrea Corallo
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/ChangeLog:
* config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s8.c: Likewise.
---
gcc/config/arm/mve.md | 2 +-
.../arm/mve/intrinsics/vqnegq_m_s16.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vqnegq_m_s32.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vqnegq_m_s8.c | 33 +++++++++++++++++--
.../arm/mve/intrinsics/vqnegq_s16.c | 28 +++++++++++++---
.../arm/mve/intrinsics/vqnegq_s32.c | 24 ++++++++++++--
.../gcc.target/arm/mve/intrinsics/vqnegq_s8.c | 24 ++++++++++++--
7 files changed, 159 insertions(+), 18 deletions(-)
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 600adf7d69b..4f94cf14a0b 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -374,7 +374,7 @@ (define_insn "mve_vqnegq_s<mode>"
VQNEGQ_S))
]
"TARGET_HAVE_MVE"
- "vqneg.s%#<V_sz_elem> %q0, %q1"
+ "vqneg.s%#<V_sz_elem>\t%q0, %q1"
[(set_attr "type" "mve_move")
])
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
index 4f0145d2ebd..f3799a35b12 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vqnegq_m_s16 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqnegt.s16" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
{
return vqnegq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
index da4f90bad53..bbe64ff4d52 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vqnegq_m_s32 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqnegt.s32" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
{
return vqnegq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
index ac1250b2fac..71fcdd7cba7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
@@ -1,22 +1,49 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vqnegq_m_s8 (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
-/* { dg-final { scan-assembler "vqnegt.s8" } } */
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vqnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
{
return vqnegq_m (inactive, a, p);
}
-/* { dg-final { scan-assembler "vpst" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
index f9210cd70f4..d5fb4a19854 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
@@ -1,21 +1,41 @@
-/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
-/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqneg.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo (int16x8_t a)
{
return vqnegq_s16 (a);
}
-/* { dg-final { scan-assembler "vqneg.s16" } } */
+/*
+**foo1:
+** ...
+** vqneg.s16 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int16x8_t
foo1 (int16x8_t a)
{
return vqnegq (a);
}
-/* { dg-final { scan-assembler "vqneg.s16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
index c2ded7fe659..2c8e709f491 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqneg.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo (int32x4_t a)
{
return vqnegq_s32 (a);
}
-/* { dg-final { scan-assembler "vqneg.s32" } } */
+/*
+**foo1:
+** ...
+** vqneg.s32 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int32x4_t
foo1 (int32x4_t a)
{
return vqnegq (a);
}
-/* { dg-final { scan-assembler "vqneg.s32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
index d1cc83a6cd0..2f7f7619ef6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
@@ -1,21 +1,41 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vqneg.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo (int8x16_t a)
{
return vqnegq_s8 (a);
}
-/* { dg-final { scan-assembler "vqneg.s8" } } */
+/*
+**foo1:
+** ...
+** vqneg.s8 q[0-9]+, q[0-9]+(?: @.*|)
+** ...
+*/
int8x16_t
foo1 (int8x16_t a)
{
return vqnegq (a);
}
-/* { dg-final { scan-assembler "vqneg.s8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 22/23] arm: improve tests for vld2q*
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (20 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 21/23] arm: improve tests and fix vqnegq* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:09 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 23/23] arm: fix missing extern "C" in MVE tests Andrea Corallo
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vld2q_f16.c: Improve test.
* gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise.
---
.../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 33 ++++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 33 ++++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 33 ++++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 33 ++++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 33 ++++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 33 ++++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 33 ++++++++++++++++---
.../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 33 ++++++++++++++++---
8 files changed, 224 insertions(+), 40 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
index 24e7a2ea4d0..81690b1022e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float16x8x2_t
-foo (float16_t const * addr)
+foo (float16_t const *addr)
{
return vld2q_f16 (addr);
}
-/* { dg-final { scan-assembler "vld20.16" } } */
-/* { dg-final { scan-assembler "vld21.16" } } */
+/*
+**foo1:
+** ...
+** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float16x8x2_t
-foo1 (float16_t const * addr)
+foo1 (float16_t const *addr)
{
return vld2q (addr);
}
-/* { dg-final { scan-assembler "vld20.16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
index 727484caaf6..d2ae31fa9e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
/* { dg-add-options arm_v8_1m_mve_fp } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float32x4x2_t
-foo (float32_t const * addr)
+foo (float32_t const *addr)
{
return vld2q_f32 (addr);
}
-/* { dg-final { scan-assembler "vld20.32" } } */
-/* { dg-final { scan-assembler "vld21.32" } } */
+/*
+**foo1:
+** ...
+** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
float32x4x2_t
-foo1 (float32_t const * addr)
+foo1 (float32_t const *addr)
{
return vld2q (addr);
}
-/* { dg-final { scan-assembler "vld20.32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
index f2864a00478..fb4dc1b4fcf 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8x2_t
-foo (int16_t const * addr)
+foo (int16_t const *addr)
{
return vld2q_s16 (addr);
}
-/* { dg-final { scan-assembler "vld20.16" } } */
-/* { dg-final { scan-assembler "vld21.16" } } */
+/*
+**foo1:
+** ...
+** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int16x8x2_t
-foo1 (int16_t const * addr)
+foo1 (int16_t const *addr)
{
return vld2q (addr);
}
-/* { dg-final { scan-assembler "vld20.16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
index 9fe2e0459b5..aeb85238fd2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4x2_t
-foo (int32_t const * addr)
+foo (int32_t const *addr)
{
return vld2q_s32 (addr);
}
-/* { dg-final { scan-assembler "vld20.32" } } */
-/* { dg-final { scan-assembler "vld21.32" } } */
+/*
+**foo1:
+** ...
+** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int32x4x2_t
-foo1 (int32_t const * addr)
+foo1 (int32_t const *addr)
{
return vld2q (addr);
}
-/* { dg-final { scan-assembler "vld20.32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
index 736080a94a7..687e5ded48c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int8x16x2_t
-foo (int8_t const * addr)
+foo (int8_t const *addr)
{
return vld2q_s8 (addr);
}
-/* { dg-final { scan-assembler "vld20.8" } } */
-/* { dg-final { scan-assembler "vld21.8" } } */
+/*
+**foo1:
+** ...
+** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
int8x16x2_t
-foo1 (int8_t const * addr)
+foo1 (int8_t const *addr)
{
return vld2q (addr);
}
-/* { dg-final { scan-assembler "vld20.8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
index 2d89ebdcf6b..281fe5eaf10 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8x2_t
-foo (uint16_t const * addr)
+foo (uint16_t const *addr)
{
return vld2q_u16 (addr);
}
-/* { dg-final { scan-assembler "vld20.16" } } */
-/* { dg-final { scan-assembler "vld21.16" } } */
+/*
+**foo1:
+** ...
+** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint16x8x2_t
-foo1 (uint16_t const * addr)
+foo1 (uint16_t const *addr)
{
return vld2q (addr);
}
-/* { dg-final { scan-assembler "vld20.16" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
index 28d311eca68..524afee72e9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4x2_t
-foo (uint32_t const * addr)
+foo (uint32_t const *addr)
{
return vld2q_u32 (addr);
}
-/* { dg-final { scan-assembler "vld20.32" } } */
-/* { dg-final { scan-assembler "vld21.32" } } */
+/*
+**foo1:
+** ...
+** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint32x4x2_t
-foo1 (uint32_t const * addr)
+foo1 (uint32_t const *addr)
{
return vld2q (addr);
}
-/* { dg-final { scan-assembler "vld20.32" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
index 790c9743c9a..9eebbd42719 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
@@ -1,22 +1,45 @@
/* { dg-require-effective-target arm_v8_1m_mve_ok } */
/* { dg-add-options arm_v8_1m_mve } */
/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+**foo:
+** ...
+** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint8x16x2_t
-foo (uint8_t const * addr)
+foo (uint8_t const *addr)
{
return vld2q_u8 (addr);
}
-/* { dg-final { scan-assembler "vld20.8" } } */
-/* { dg-final { scan-assembler "vld21.8" } } */
+/*
+**foo1:
+** ...
+** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
+** ...
+*/
uint8x16x2_t
-foo1 (uint8_t const * addr)
+foo1 (uint8_t const *addr)
{
return vld2q (addr);
}
-/* { dg-final { scan-assembler "vld20.8" } } */
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH 23/23] arm: fix missing extern "C" in MVE tests
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
` (21 preceding siblings ...)
2023-01-20 16:39 ` [PATCH 22/23] arm: improve tests for vld2q* Andrea Corallo
@ 2023-01-20 16:39 ` Andrea Corallo
2023-01-20 18:10 ` Kyrylo Tkachov
22 siblings, 1 reply; 48+ messages in thread
From: Andrea Corallo @ 2023-01-20 16:39 UTC (permalink / raw)
To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Add missing extern
"C".
* gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.
---
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c | 8 ++++++++
gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c | 8 ++++++++
.../gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c | 8 ++++++++
85 files changed, 680 insertions(+)
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
index 20a999da1d2..31f78b30ed8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
index 986cb8d3ba5..77c0521161c 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
index 57a4b36f5fe..1cf93d50379 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
index abed33b0e37..98d80e42da9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
return vhaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
index 5e5204fb3a7..9b7e611c0e5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
return vhaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
index b35221ef81b..4d82970e7ec 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
return vhaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
index 310964f3440..2788eb2f8ff 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
index d8222645c21..67872a77076 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
index 85b2feee346..1ec890591ad 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
index 2da0aa053e5..bc84618b036 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
index 49b865a123b..6abdfce981f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
index 5ecd3cbf6ec..0c68c68206b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vhaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
index a4e277d4e1f..d5bff94a46e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
index c79b88d6ced..af3e219b3f2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
index 61893536231..a4551e207c2 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
index 146d226f36f..71facc46ad9 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vhaddq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
index b70014fb6a5..d45421c76d7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vhaddq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
index 03978dfa28a..5f16fbd9121 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vhaddq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
index c3c787583dd..4e332733459 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
index a1ab196d3d2..5cdfd3921a5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
index 061ae89315e..7a2ed232f29 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
index 0ee88520f8f..e24ff1668db 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
index 0a0e512c5fc..e9f13956b96 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
index c495641c532..cba0a302e2a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vhaddq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
index af4f534d7ff..4d1bab9641e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
index 941d38074a4..8effffaf377 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
index 9ceb4ef3c6f..f55cd8f5528 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
index 037ed2c637d..73575a401c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
return vhsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
index f51eb10ecbf..f152ef10a9d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
return vhsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
index 24dd45db152..0a58b1ed355 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
return vhsubq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
index 0f275d48753..ec8d9aaed0d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
index 21aeb9d2a59..e98635a8c11 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
index b3ee94341b5..3107bb55844 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
index 690ef2de5ba..783309fdbed 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
index cfe12573fa0..99bc278d16f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
index 1926bc34219..ae186512b78 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vhsubq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
index fcda4c541a6..260ba9ee509 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
index 55637221f21..be5cc04c2b4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
index ecfe188f3fa..b0c28be7872 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
index bf3d6c38b85..f31bb3fa632 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
return vhsubq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
index 4ae75b09950..a35346d9b2e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
return vhsubq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
index edfa4216a31..25c85449081 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -54,4 +58,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
return vhsubq_x (a, 1, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
index bd2771b0978..dc3433cb81a 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
index 0ea40df3d9e..a1e1faeacb5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
index 90ee94defb0..bbfce818be4 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
index d700741169a..86fc9d7cf33 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
index f43c9626829..53274267515 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
index a0908ba786b..04d89c6c6bd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
return vhsubq_x (a, b, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
index f201d5fa047..5925d9e968e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t add, int16x8_t m1, int16x8_t m2, mve_pred16_t p)
return vmladavaxq_p (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
index c90647a5064..87d66e654f7 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t add, int32x4_t m1, int32x4_t m2, mve_pred16_t p)
return vmladavaxq_p (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
index 57af7bc1c78..803a5becc86 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32_t add, int8x16_t m1, int8x16_t m2, mve_pred16_t p)
return vmladavaxq_p (add, m1, m2, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
index 684580d1c36..6a81b4acfcb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t add, int16x8_t m1, int16x8_t m2)
return vmladavaxq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
index 5d152647b55..b63ca43abba 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t add, int32x4_t m1, int32x4_t m2)
return vmladavaxq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
index 71bcdc9b55e..2430858aa51 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t add, int8x16_t m1, int8x16_t m2)
return vmladavaxq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
index 0fac7abeac0..17b28cfd956 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
index d750b1f2c14..e6bb4e0b51d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
index 5fc796edf75..f39451f6bc0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
index decad65c188..a87163c0446 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
return vqaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
index b0a6d79093e..a6aa9b5dddc 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
return vqaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
index f9ca9a1f042..4bd47319f5e 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
return vqaddq (a, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
index ffa31463372..97e2a6039eb 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
index c5937a967ff..db9355d56dd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
index 9f937512811..2804d668da8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
index aa4be43f244..17e59961c87 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
index daef60eb5ca..ce3a397acd6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
index e28807ec708..faa881f67f6 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
return vqaddq (a, b);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
index 210bacec2fb..909631c549d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
return vqdmlahq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
index dbb2494b216..fb670befeff 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
return vqdmlahq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
index a7962f82d38..f66740bee0b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
return vqdmlahq (add, m1, m2);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
index 34d407f0142..918de9572e8 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add, mve_pred16_t p)
return vqdmlashq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
index 50a665ea7e5..b25b66057bd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add, mve_pred16_t p)
return vqdmlashq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
index 45f34b60382..b796f205e5d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -38,4 +42,8 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add, mve_pred16_t p)
return vqdmlashq_m (m1, m2, add, p);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
index a3f1ae8d6b8..9a2549464c5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
return vqdmlashq (m1, m2, add);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
index cf867e56874..36fc7b066a1 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
return vqdmlashq (m1, m2, add);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
index 7e9362cab60..1e7cd44d4f5 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
return vqdmlashq (m1, m2, add);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
index 6b148a4b03d..5b1731f7332 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float16x8_t b)
return vsetq_lane (1.1, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
index e4e7f892e97..34b403d0601 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (float32x4_t b)
return vsetq_lane (1.1, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
index 950cd016b76..458fd5e6f26 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int16_t a, int16x8_t b)
return vsetq_lane (a, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
index 6b49ccd91e4..44672f6c264 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int32_t a, int32x4_t b)
return vsetq_lane (a, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
index 95ba4da1f51..62e8ee50929 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int64_t a, int64x2_t b)
return vsetq_lane (a, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
index 91a5baee55f..3a79ab1759b 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -30,4 +34,8 @@ foo1 (int8_t a, int8x16_t b)
return vsetq_lane (a, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
index 53986a5c1b1..8a42773e01f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint16x8_t b)
return vsetq_lane (1, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
index 3f17db9623a..43778e6103d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint32x4_t b)
return vsetq_lane (1, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
index 5ce4c544c25..c75bfa448f0 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint64x2_t b)
return vsetq_lane (1, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
index 58e932b85e8..5fb20161259 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
@@ -5,6 +5,10 @@
#include "arm_mve.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
/*
**foo:
** ...
@@ -42,4 +46,8 @@ foo2 (uint8x16_t b)
return vsetq_lane (1, b, 1);
}
+#ifdef __cplusplus
+}
+#endif
+
/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
--
2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 01/23] arm: improve tests and fix vclsq*
2023-01-20 16:39 ` [PATCH 01/23] arm: improve tests and fix vclsq* Andrea Corallo
@ 2023-01-20 17:44 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:44 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
Hi Andrea,
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:39 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 01/23] arm: improve tests and fix vclsq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vclsq_m_s16.c: Improve test.
I'd prefer something a bit more descriptive, like "Use check-function-bodies instead of scan-assembler checks. Use extern "C" for C++ testing."
Ok with a fixed ChangeLog.
Thanks,
Kyrill
> * gcc.target/arm/mve/intrinsics/vclsq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclsq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclsq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclsq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclsq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclsq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclsq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclsq_x_s8.c: Likewise.
> ---
> gcc/config/arm/mve.md | 2 +-
> .../arm/mve/intrinsics/vclsq_m_s16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclsq_m_s32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclsq_m_s8.c | 33 +++++++++++++++++--
> .../gcc.target/arm/mve/intrinsics/vclsq_s16.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vclsq_s32.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vclsq_s8.c | 24 ++++++++++++--
> .../arm/mve/intrinsics/vclsq_x_s16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclsq_x_s32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclsq_x_s8.c | 33 +++++++++++++++++--
> 10 files changed, 251 insertions(+), 29 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index f123edc449b..e35ea5d9f9c 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -469,7 +469,7 @@ (define_insn "mve_vclsq_s<mode>"
> VCLSQ_S))
> ]
> "TARGET_HAVE_MVE"
> - "vcls.s%#<V_sz_elem> %q0, %q1"
> + "vcls.s%#<V_sz_elem>\t%q0, %q1"
> [(set_attr "type" "mve_move")
> ])
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
> index d0eb7008537..1996ac8b03e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vclsq_m_s16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclst.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vclsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
> index b6d7088a8e7..f51841d024e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vclsq_m_s32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclst.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vclsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
> index 28d4d966802..2975c4cda56 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_m_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vclsq_m_s8 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclst.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vclsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
> index e57fbb97080..ed1b5c75b40 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s16.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcls.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a)
> {
> return vclsq_s16 (a);
> }
>
> -/* { dg-final { scan-assembler "vcls.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcls.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a)
> {
> return vclsq (a);
> }
>
> -/* { dg-final { scan-assembler "vcls.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
> index 7fa3038d361..9e5369e04c6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s32.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcls.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a)
> {
> return vclsq_s32 (a);
> }
>
> -/* { dg-final { scan-assembler "vcls.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcls.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a)
> {
> return vclsq (a);
> }
>
> -/* { dg-final { scan-assembler "vcls.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
> index b0985484d1d..c4a9468f8e1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcls.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a)
> {
> return vclsq_s8 (a);
> }
>
> -/* { dg-final { scan-assembler "vcls.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcls.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a)
> {
> return vclsq (a);
> }
>
> -/* { dg-final { scan-assembler "vcls.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
> index ab09c9944ae..ea11eceb730 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, mve_pred16_t p)
> {
> return vclsq_x_s16 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclst.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, mve_pred16_t p)
> {
> return vclsq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
> index 09a8dab2f51..1737c561a0b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, mve_pred16_t p)
> {
> return vclsq_x_s32 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclst.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, mve_pred16_t p)
> {
> return vclsq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
> index af40f7fa510..a7cdb612ee1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclsq_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, mve_pred16_t p)
> {
> return vclsq_x_s8 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclst.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, mve_pred16_t p)
> {
> return vclsq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 02/23] arm: improve tests and fix vclzq*
2023-01-20 16:39 ` [PATCH 02/23] arm: improve tests and fix vclzq* Andrea Corallo
@ 2023-01-20 17:46 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:46 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:39 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 02/23] arm: improve tests and fix vclzq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Improve test.
As in patch 1/23, ok with a more descriptive entry.
Thanks,
Kyrill
> * gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise.
> * gcc.target/arm/simd/mve-vclz.c: Update test.
> ---
> gcc/config/arm/mve.md | 2 +-
> .../arm/mve/intrinsics/vclzq_m_s16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_m_s32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_m_s8.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_m_u16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_m_u32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_m_u8.c | 33 +++++++++++++++++--
> .../gcc.target/arm/mve/intrinsics/vclzq_s16.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vclzq_s32.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vclzq_s8.c | 24 ++++++++++++--
> .../gcc.target/arm/mve/intrinsics/vclzq_u16.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vclzq_u32.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vclzq_u8.c | 28 +++++++++++++---
> .../arm/mve/intrinsics/vclzq_x_s16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_x_s32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_x_s8.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_x_u16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_x_u32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vclzq_x_u8.c | 33 +++++++++++++++++--
> gcc/testsuite/gcc.target/arm/simd/mve-vclz.c | 6 ++--
> 20 files changed, 506 insertions(+), 62 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index e35ea5d9f9c..854371f7e11 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -448,7 +448,7 @@ (define_insn "@mve_vclzq_s<mode>"
> (clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
> ]
> "TARGET_HAVE_MVE"
> - "vclz.i%#<V_sz_elem> %q0, %q1"
> + "vclz.i%#<V_sz_elem>\t%q0, %q1"
> [(set_attr "type" "mve_move")
> ])
> (define_expand "mve_vclzq_u<mode>"
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
> index 9670f8f56f3..620314e4ff2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vclzq_m_s16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vclzq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
> index 18427354570..dfda1e67287 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vclzq_m_s32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vclzq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
> index 2697d039d70..1300fe6f8c4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vclzq_m_s8 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vclzq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
> index 8405b16314c..922819d388e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
> {
> return vclzq_m_u16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p)
> {
> return vclzq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
> index 350e6e7e661..6e75a0463cf 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
> {
> return vclzq_m_u32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p)
> {
> return vclzq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
> index d455526f975..3c450e8eca0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
> {
> return vclzq_m_u8 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p)
> {
> return vclzq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
> index f71a0a4eded..17be53f395b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a)
> {
> return vclzq_s16 (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a)
> {
> return vclzq (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
> index 46a002bc1c5..5e440febb29 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a)
> {
> return vclzq_s32 (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a)
> {
> return vclzq (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
> index 3cab6f32310..9eaa9a4269a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a)
> {
> return vclzq_s8 (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a)
> {
> return vclzq (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
> index cada68b6d65..37179b22a5c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a)
> {
> - return vclzq_u16 (a);
> + return vclzq_u16 (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a)
> {
> - return vclzq (a);
> + return vclzq (a);
> +}
> +
> +#ifdef __cplusplus
> }
> +#endif
>
> -/* { dg-final { scan-assembler "vclz.i16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
> index 0291b0cea4c..65ee44d41d5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a)
> {
> - return vclzq_u32 (a);
> + return vclzq_u32 (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a)
> {
> - return vclzq (a);
> + return vclzq (a);
> +}
> +
> +#ifdef __cplusplus
> }
> +#endif
>
> -/* { dg-final { scan-assembler "vclz.i32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
> index 5eb7bab5e0d..bed4ab1878a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a)
> {
> - return vclzq_u8 (a);
> + return vclzq_u8 (a);
> }
>
> -/* { dg-final { scan-assembler "vclz.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a)
> {
> - return vclzq (a);
> + return vclzq (a);
> +}
> +
> +#ifdef __cplusplus
> }
> +#endif
>
> -/* { dg-final { scan-assembler "vclz.i8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
> index daddd1b4421..ea78bf20066 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, mve_pred16_t p)
> {
> return vclzq_x_s16 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, mve_pred16_t p)
> {
> return vclzq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
> index d4f443f7f56..cc85d4d27e2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, mve_pred16_t p)
> {
> return vclzq_x_s32 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, mve_pred16_t p)
> {
> return vclzq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
> index b33d2c51c3f..0f809167a4f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, mve_pred16_t p)
> {
> return vclzq_x_s8 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, mve_pred16_t p)
> {
> return vclzq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
> index 6d9bc79261b..a9b662d40f2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, mve_pred16_t p)
> {
> return vclzq_x_u16 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, mve_pred16_t p)
> {
> return vclzq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
> index c3b053b9f1f..5446938c3fd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, mve_pred16_t p)
> {
> return vclzq_x_u32 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, mve_pred16_t p)
> {
> return vclzq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
> index 678b2eb898d..548a74e8367 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, mve_pred16_t p)
> {
> return vclzq_x_u8 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vclzt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, mve_pred16_t p)
> {
> return vclzq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
> b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
> index 7068736bc28..38e91fc5bce 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c
> @@ -23,6 +23,6 @@ FUNC(u, uint, 8, clz)
>
> /* 16 and 8-bit versions are not vectorized because they need pack/unpack
> patterns since __builtin_clz uses 32-bit parameter and return value. */
> -/* { dg-final { scan-assembler-times {vclz\.i32 q[0-9]+, q[0-9]+} 2 } } */
> -/* { dg-final { scan-assembler-times {vclz\.i16 q[0-9]+, q[0-9]+} 2 { xfail *-*-*
> } } } */
> -/* { dg-final { scan-assembler-times {vclz\.i8 q[0-9]+, q[0-9]+} 2 { xfail *-*-* }
> } } */
> +/* { dg-final { scan-assembler-times {vclz\.i32\tq[0-9]+, q[0-9]+} 2 } } */
> +/* { dg-final { scan-assembler-times {vclz\.i16\tq[0-9]+, q[0-9]+} 2 { xfail *-*-
> * } } } */
> +/* { dg-final { scan-assembler-times {vclz\.i8\tq[0-9]+, q[0-9]+} 2 { xfail *-*-*
> } } } */
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 03/23] arm: improve tests and fix vnegq*
2023-01-20 16:39 ` [PATCH 03/23] arm: improve tests and fix vnegq* Andrea Corallo
@ 2023-01-20 17:47 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:47 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:39 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 03/23] arm: improve tests and fix vnegq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vnegq_f<mode>,
> mve_vnegq_s<mode>):
> Fix spacing.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vnegq_f16.c: Improve test.
Ok as before.
Thanks,
Kyrill
> * gcc.target/arm/mve/intrinsics/vnegq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vnegq_x_s8.c: Likewise.
> * gcc.target/arm/simd/mve-vneg.c: Update test.
> * gcc.target/arm/simd/mve-vshr.c: Likewise
> ---
> gcc/config/arm/mve.md | 4 +--
> .../gcc.target/arm/mve/intrinsics/vnegq_f16.c | 30 ++++++++++++++++-
> .../gcc.target/arm/mve/intrinsics/vnegq_f32.c | 30 ++++++++++++++++-
> .../arm/mve/intrinsics/vnegq_m_f16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vnegq_m_f32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vnegq_m_s16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vnegq_m_s32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vnegq_m_s8.c | 33 +++++++++++++++++--
> .../gcc.target/arm/mve/intrinsics/vnegq_s16.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vnegq_s32.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vnegq_s8.c | 24 ++++++++++++--
> .../arm/mve/intrinsics/vnegq_x_f16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vnegq_x_f32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vnegq_x_s16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vnegq_x_s32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vnegq_x_s8.c | 33 +++++++++++++++++--
> gcc/testsuite/gcc.target/arm/simd/mve-vneg.c | 4 +--
> gcc/testsuite/gcc.target/arm/simd/mve-vshr.c | 2 +-
> 18 files changed, 433 insertions(+), 47 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 854371f7e11..0a243486bdb 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -252,7 +252,7 @@ (define_insn "mve_vnegq_f<mode>"
> (neg:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")))
> ]
> "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
> - "vneg.f%#<V_sz_elem> %q0, %q1"
> + "vneg.f%#<V_sz_elem>\t%q0, %q1"
> [(set_attr "type" "mve_move")
> ])
>
> @@ -401,7 +401,7 @@ (define_insn "mve_vnegq_s<mode>"
> (neg:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w")))
> ]
> "TARGET_HAVE_MVE"
> - "vneg.s%#<V_sz_elem> %q0, %q1"
> + "vneg.s%#<V_sz_elem>\t%q0, %q1"
> [(set_attr "type" "mve_move")
> ])
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
> index 9572c140d7e..9853cf6e6dd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f16.c
> @@ -1,13 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vneg.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a)
> {
> return vnegq_f16 (a);
> }
>
> -/* { dg-final { scan-assembler "vneg.f16" } } */
> +
> +/*
> +**foo1:
> +** ...
> +** vneg.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> +float16x8_t
> +foo1 (float16x8_t a)
> +{
> + return vnegq (a);
> +}
> +
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
> index be73cc0c5f5..489cfc760ba 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_f32.c
> @@ -1,13 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vneg.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a)
> {
> return vnegq_f32 (a);
> }
>
> -/* { dg-final { scan-assembler "vneg.f32" } } */
> +
> +/*
> +**foo1:
> +** ...
> +** vneg.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> +float32x4_t
> +foo1 (float32x4_t a)
> +{
> + return vnegq (a);
> +}
> +
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
> index 0d917b80cd7..c8b307ea50e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
> {
> return vnegq_m_f16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, mve_pred16_t p)
> {
> return vnegq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
> index f1c0e9a99b0..a530a05e644 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
> {
> return vnegq_m_f32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, mve_pred16_t p)
> {
> return vnegq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
> index 9a945ee62a3..46d6e794dbe 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vnegq_m_s16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vnegq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
> index 811f1df0565..5fb1f5c2a4c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vnegq_m_s32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vnegq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
> index 430ebc73783..868a9680858 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_m_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vnegq_m_s8 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vnegq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
> index a47f9b3423e..3b518c8e0f5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s16.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vneg.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a)
> {
> return vnegq_s16 (a);
> }
>
> -/* { dg-final { scan-assembler "vneg.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vneg.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a)
> {
> return vnegq (a);
> }
>
> -/* { dg-final { scan-assembler "vneg.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
> index 50401f53bd7..f8682575892 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s32.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vneg.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a)
> {
> return vnegq_s32 (a);
> }
>
> -/* { dg-final { scan-assembler "vneg.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vneg.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a)
> {
> return vnegq (a);
> }
>
> -/* { dg-final { scan-assembler "vneg.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
> index fd5de3dab56..1be5901740e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vneg.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a)
> {
> return vnegq_s8 (a);
> }
>
> -/* { dg-final { scan-assembler "vneg.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vneg.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a)
> {
> return vnegq (a);
> }
>
> -/* { dg-final { scan-assembler "vneg.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
> index e7af36691dc..c10d6d2aebf 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, mve_pred16_t p)
> {
> return vnegq_x_f16 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.f16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, mve_pred16_t p)
> {
> return vnegq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
> index d9c3818855a..0ee5ecc8262 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, mve_pred16_t p)
> {
> return vnegq_x_f32 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.f32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, mve_pred16_t p)
> {
> return vnegq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
> index 16f1fa452ce..d774a055d72 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, mve_pred16_t p)
> {
> return vnegq_x_s16 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, mve_pred16_t p)
> {
> return vnegq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
> index d74683c6f24..77bf1a67cfe 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, mve_pred16_t p)
> {
> return vnegq_x_s32 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, mve_pred16_t p)
> {
> return vnegq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
> index eda4c7fcf7e..ca44512e37a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vnegq_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, mve_pred16_t p)
> {
> return vnegq_x_s8 (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vnegt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, mve_pred16_t p)
> {
> return vnegq_x (a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
> b/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
> index 7945a060e25..1379cae579f 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vneg.c
> @@ -45,8 +45,8 @@ FUNC(f, float, 16, 8, -, vneg)
>
> /* MVE has only 128-bit vectors, so we can vectorize only half of the
> functions above. */
> -/* { dg-final { scan-assembler-times {vneg.s[0-9]+ q[0-9]+, q[0-9]+} 6 } } */
> -/* { dg-final { scan-assembler-times {vneg.f[0-9]+ q[0-9]+, q[0-9]+} 2 } } */
> +/* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
> +/* { dg-final { scan-assembler-times {vneg.f[0-9]+\tq[0-9]+, q[0-9]+} 2 } } */
> /* { dg-final { scan-assembler-times {vldr[bhw].[0-9]+\tq[0-9]+} 8 } } */
> /* { dg-final { scan-assembler-times {vstr[bhw].[0-9]+\tq[0-9]+} 8 } } */
> /* { dg-final { scan-assembler-not {orr\tr[0-9]+, r[0-9]+, r[0-9]+} } } */
> diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> index d4258e9fefe..8c7adef9ed8 100644
> --- a/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vshr.c
> @@ -58,7 +58,7 @@ FUNC_IMM(u, uint, 8, 16, >>, vshrimm)
> /* Vector right shifts use vneg and left shifts. */
> /* { dg-final { scan-assembler-times {vshl.s[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
> /* { dg-final { scan-assembler-times {vshl.u[0-9]+\tq[0-9]+, q[0-9]+} 3 } } */
> -/* { dg-final { scan-assembler-times {vneg.s[0-9]+ q[0-9]+, q[0-9]+} 6 } } */
> +/* { dg-final { scan-assembler-times {vneg.s[0-9]+\tq[0-9]+, q[0-9]+} 6 } } */
>
>
> /* Shift by immediate. */
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 04/23] arm: improve tests for vmulhq*
2023-01-20 16:39 ` [PATCH 04/23] arm: improve tests for vmulhq* Andrea Corallo
@ 2023-01-20 17:48 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:48 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:39 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 04/23] arm: improve tests for vmulhq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c: Improve test.
Ok as before.
Thanks,
Kyrill
> * gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c: Likewise.
> ---
> .../arm/mve/intrinsics/vmulhq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulhq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulhq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulhq_m_u16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulhq_m_u32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulhq_m_u8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulhq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulhq_s32.c | 24 +++++++++++--
> .../gcc.target/arm/mve/intrinsics/vmulhq_s8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulhq_u16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulhq_u32.c | 24 +++++++++++--
> .../gcc.target/arm/mve/intrinsics/vmulhq_u8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulhq_x_s16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulhq_x_s32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulhq_x_s8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulhq_x_u16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulhq_x_u32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulhq_x_u8.c | 33 ++++++++++++++++--
> 18 files changed, 492 insertions(+), 54 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
> index 4971869a27b..a7d8460c265 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmulhq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
> index 3006de7fd24..997fdbe8d23 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmulhq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
> index fbcef24ffc3..567461ff111 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmulhq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
> index 7059fecf047..9b813829cd6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulhq_m_u16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
> index 1c2de7081cf..248432a2fe0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmulhq_m_u32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
> index 5eed85fb2d9..464180c1988 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_m_u8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulhq_m_u8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
> index a7260df0f51..0950c06ee05 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vmulhq_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
> index 4fe46e62fc8..db2ab42a1e9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vmulhq_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
> index acc08039bb5..8bb2239005f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vmulhq_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
> index 37e40f06d72..bb88136589c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vmulhq_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmulh.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.u16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
> index 5673d91486c..d42c41acb73 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b)
> {
> return vmulhq_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmulh.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b)
> {
> return vmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.u32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
> index 29c6312bb7c..c666a9631af 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_u8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vmulhq_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmulh.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmulh.u8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
> index b783570be19..a323c961838 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmulhq_x_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmulhq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
> index 003485be70b..98168b1be06 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmulhq_x_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmulhq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
> index d2359cd371b..b50f59b3df4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmulhq_x_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmulhq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
> index c052c4ac007..afa803c2917 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulhq_x_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulhq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
> index 7eeba8be611..221795478cd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmulhq_x_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmulhq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
> index ff2a53fc160..4383e2e7574 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulhq_x_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulhq_x_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulht.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulht.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulhq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 05/23] arm: improve tests for vmullbq*
2023-01-20 16:39 ` [PATCH 05/23] arm: improve tests for vmullbq* Andrea Corallo
@ 2023-01-20 17:51 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:51 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 05/23] arm: improve tests for vmullbq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c: Improve test.
Ok as before. For further patches in the series that do a similar thing please assume that I'd like a more descriptive entry here 😊
Thanks,
Kyrill
> * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c: Likewise.
> ---
> .../arm/mve/intrinsics/vmullbq_int_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmullbq_int_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmullbq_int_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmullbq_int_m_u16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmullbq_int_m_u32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmullbq_int_m_u8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmullbq_int_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_s8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_u16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_u32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_u8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_x_s16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_x_s32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_x_s8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_x_u16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_x_u32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmullbq_int_x_u8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmullbq_poly_m_p16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmullbq_poly_m_p8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmullbq_poly_p16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmullbq_poly_p8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmullbq_poly_x_p16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmullbq_poly_x_p8.c | 33 ++++++++++++++++--
> 24 files changed, 656 insertions(+), 72 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
> index be933274d77..a4cc5e52773 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmullbq_int_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmullbq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
> index 3dfc26761be..a195884567b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmullbq_int_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmullbq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
> index f8c449b28a0..3a5d7705d45 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmullbq_int_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmullbq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
> index dd6ed6b71a6..5e327d25a9b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmullbq_int_m_u16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmullbq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
> index 85ce75e7dd8..fb2de994dd8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmullbq_int_m_u32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmullbq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
> index d131a5d9fd7..4cc06c4ef28 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_m_u8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmullbq_int_m_u8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmullbq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
> index 22f4d27f6cc..16c0982386b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vmullbq_int_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullb.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vmullbq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
> index 6e677f26b84..e0a82d6e640 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vmullbq_int_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullb.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vmullbq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
> index f40b8a6c4dd..031a433c2bb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullb.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vmullbq_int_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullb.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vmullbq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
> index 3529ab2772d..4bb19bf5cff 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullb.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vmullbq_int_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullb.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vmullbq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.u16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
> index d843d2bf5fe..d461ed9f9c7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullb.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo (uint32x4_t a, uint32x4_t b)
> {
> return vmullbq_int_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullb.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo1 (uint32x4_t a, uint32x4_t b)
> {
> return vmullbq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.u32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
> index 6268c463ead..c0790778b2d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_u8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullb.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vmullbq_int_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullb.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vmullbq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.u8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
> index 87f8e21a7d0..ee83ca61158 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmullbq_int_x_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmullbq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
> index 5e563728a4a..42ae3324cd9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmullbq_int_x_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmullbq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
> index b2ca4134ee5..8dcf9b726b0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmullbq_int_x_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmullbq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
> index 15269101fe5..31330da9a93 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmullbq_int_x_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmullbq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
> index 7a7836303ec..b882d644347 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmullbq_int_x_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmullbq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
> index f422a3c66f0..4b402374eb7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_int_x_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmullbq_int_x_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmullbq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
> index 527acb74e09..2efb87dff01 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmullbq_poly_m_p16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.p16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmullbq_poly_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.p16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
> index 5403394e870..b435f44cb32 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_m_p8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmullbq_poly_m_p8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.p8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmullbq_poly_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.p8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
> index d01d5997ff4..bfd052222fe 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullb.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vmullbq_poly_p16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.p16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullb.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vmullbq_poly (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.p16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
> index de97134add7..a2a53e8a3dc 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_p8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullb.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vmullbq_poly_p8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.p8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullb.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vmullbq_poly (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullb.p8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
> index f94d9052433..bee45f95939 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmullbq_poly_x_p16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.p16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmullbq_poly_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
> index 6fdc94496bc..7cd15f3a7f1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmullbq_poly_x_p8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmullbq_poly_x_p8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmullbt.p8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmullbt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmullbq_poly_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 06/23] arm: improve tests for vmulltq*
2023-01-20 16:39 ` [PATCH 06/23] arm: improve tests for vmulltq* Andrea Corallo
@ 2023-01-20 17:52 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:52 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 06/23] arm: improve tests for vmulltq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vmulltq_int_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulltq_int_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulltq_int_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulltq_int_m_u16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulltq_int_m_u32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulltq_int_m_u8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulltq_int_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_s8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_u16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_u32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_u8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_x_s16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_x_s32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_x_s8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_x_u16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_x_u32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulltq_int_x_u8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulltq_poly_m_p16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulltq_poly_m_p8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vmulltq_poly_p16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulltq_poly_p8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vmulltq_poly_x_p16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vmulltq_poly_x_p8.c | 33 ++++++++++++++++--
> 24 files changed, 656 insertions(+), 72 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
> index 25ecf7a2c51..7f573e9109e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmulltq_int_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmulltq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
> index f8d02880ea0..da440dd1365 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmulltq_int_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int64x2_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmulltq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
> index 3f2fc333a65..ceb8e1d5a94 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmulltq_int_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmulltq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
> index b7ab408d53c..a751546ae13 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulltq_int_m_u16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulltq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
> index e43ad98d933..a6c4d272968 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmulltq_int_m_u32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo1 (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmulltq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
> index 7f4b90b08dd..1a7466bb5b8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_m_u8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulltq_int_m_u8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulltq_int_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
> index 34b75d4abc8..cd907f6224c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vmulltq_int_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vmulltq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
> index 7e09bf93e0e..dbc4c80b440 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vmulltq_int_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vmulltq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
> index b6eb1f5e7f2..0fef6a21207 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vmulltq_int_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vmulltq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
> index f4fc9c0c634..91b6fb4595d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vmulltq_int_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vmulltq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.u16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
> index d1bc3a8f990..71c62a12afb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo (uint32x4_t a, uint32x4_t b)
> {
> return vmulltq_int_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo1 (uint32x4_t a, uint32x4_t b)
> {
> return vmulltq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.u32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
> index 87f3c4e386a..7506adce33e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_u8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vmulltq_int_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vmulltq_int (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.u8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
> index c13ef50147e..c2376abe268 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmulltq_int_x_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vmulltq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
> index e82321ecb79..788789db120 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmulltq_int_x_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int64x2_t
> foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vmulltq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
> index 7f093c26080..3935741d041 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmulltq_int_x_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vmulltq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
> index d0f6461448b..32ee5b2e4e8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulltq_int_x_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulltq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
> index 55e19cb204a..cc3105650a1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmulltq_int_x_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint64x2_t
> foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vmulltq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
> index 650c9471c7e..01713fba245 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_int_x_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulltq_int_x_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.u8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.u8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulltq_int_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
> index 944db4c2fab..6d368e2ba68 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulltq_poly_m_p16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.p16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulltq_poly_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.p16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
> index d07311943c2..75b8811fdd9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_m_p8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulltq_poly_m_p8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.p8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulltq_poly_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.p8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
> index 121de8e9c0e..9f08d57eef9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vmulltq_poly_p16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.p16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vmulltq_poly (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.p16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
> index c7d9548a8ab..59e6e1bb6e0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_p8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmullt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vmulltq_poly_p8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.p8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmullt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vmulltq_poly (a, b);
> }
>
> -/* { dg-final { scan-assembler "vmullt.p8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
> index fb4b849b8b0..f3d3de2d1d6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulltq_poly_x_p16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.p16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.p16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vmulltq_poly_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
> index 1e79b2987c9..2c7a6294540 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulltq_poly_x_p8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulltq_poly_x_p8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vmulltt.p8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vmulltt.p8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vmulltq_poly_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 07/23] arm: improve tests for vcaddq*
2023-01-20 16:39 ` [PATCH 07/23] arm: improve tests for vcaddq* Andrea Corallo
@ 2023-01-20 17:52 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:52 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 07/23] arm: improve tests for vcaddq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vcaddq_rot270_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_u16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_u32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_m_u8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot270_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_s8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_u16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_u32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_u8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_f16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_f32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_s16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_s32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_s8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_u16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_u32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot270_x_u8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_u16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_u32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_m_u8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcaddq_rot90_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_s8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_u16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_u32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_u8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_f16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_f32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_s16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_s32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_s8.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_u16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_u32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcaddq_rot90_x_u8.c | 33 ++++++++++++++++--
> 48 files changed, 1312 insertions(+), 144 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
> index b50a5d54bb2..fb83a1cd8fc 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b)
> {
> return vcaddq_rot270_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
> index 0a12ff6fdcf..f8341a74e4a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b)
> {
> return vcaddq_rot270_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
> index e78bbd5446c..b4e2ffda280 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_f16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
> index 8b53c665463..e7adc1be243 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_f32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
> index 61948bb3552..fdde2f56b20 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
> index 0bbe24b3b4a..1cb6afb4e4d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
> index e9cab3df37f..39f063970f7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
> index 25c71257920..fd285288487 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_u16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
> index ee437eeb41f..053a61197d6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_u32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
> index 419ba7e98ee..869983a0a0b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_u8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m_u8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
> index 832be006af8..67b0d0a4d0f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vcaddq_rot270_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
> index dbebe22183c..ab28458130e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vcaddq_rot270_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
> index 5f7852f69d4..842d6adf96d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vcaddq_rot270_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
> index 80b6c0ff3a9..97773d8daa9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vcaddq_rot270_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
> index 260c5b81e22..17d5c147295 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b)
> {
> return vcaddq_rot270_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
> index ae9c4f436ad..faf01a18824 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_u8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vcaddq_rot270_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vcaddq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
> index 4b99c638830..f35aaf01a59 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_f16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
> index 2532ef7d535..6446d9edc42 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_f32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
> index 676efa8cfd7..b92fd2ee8aa 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
> index 9aa05d5bfdf..b8acc67feb9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
> index 4532296494c..78ec7862574 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
> index 51db9379e9b..ea781622424 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
> index a2e51c13268..a43d806ac3d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
> index 6ae7f693664..eb9cf0cffb6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_x_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
> index e1b21e6c5c3..1e78bd144b2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b)
> {
> return vcaddq_rot90_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
> index 118489e923f..9611f8938dc 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b)
> {
> return vcaddq_rot90_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
> index e47e242f061..58608b4961e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_f16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
> index 833aa9c2367..125dbe5405c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_f32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
> index 46babedb949..38e0e47b500 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
> index 15774e5a142..455d8388f0f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
> index 6f2bb4da3e3..7217dadaac0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
> index b9113fe4f39..d3edbaa478c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_u16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
> index b7fe5106414..eb1bf2a4274 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_u32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
> index e6c4e9f66fb..3343399b2c3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_u8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m_u8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t inactive, uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
> index 8279da9ed45..134fba6280f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vcaddq_rot90_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
> index 6d59da7757d..b8e81679e9e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vcaddq_rot90_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
> index b4f5a22c03e..2a37b8e7b83 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vcaddq_rot90_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
> index e203bd017cd..51e1871b690 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b)
> {
> return vcaddq_rot90_u16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
> index 0cba5d5bda8..5905062064a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b)
> {
> return vcaddq_rot90_u32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
> index f4f0476427a..37374637eb3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_u8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b)
> {
> return vcaddq_rot90_u8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcadd.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b)
> {
> return vcaddq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcadd.i8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
> index 476648ad459..4223c4d0f33 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_f16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
> index ae9a196af7f..9e67c56b5e8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_f32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
> index 16b5949a2a2..553fc2801fb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_s16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
> index d30150e0f1c..1cd7338d162 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_s32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
> index fa79ce24eaf..13373d46154 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_s8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
> index e18a39ed125..3f8957783e3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_u16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint16x8_t
> foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
> index b9b95fe360e..34cb0363574 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_u32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint32x4_t
> foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
> index b8b8978c1e6..d383404052d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_x_u8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x_u8 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcaddt.i8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcaddt.i8 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> uint8x16_t
> foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> {
> return vcaddq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 08/23] arm: improve tests for vcmlaq*
2023-01-20 16:39 ` [PATCH 08/23] arm: improve tests for vcmlaq* Andrea Corallo
@ 2023-01-20 17:53 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:53 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 08/23] arm: improve tests for vcmlaq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vcmlaq_f16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vcmlaq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vcmlaq_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmlaq_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmlaq_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmlaq_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmlaq_rot180_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmlaq_rot180_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmlaq_rot270_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmlaq_rot270_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmlaq_rot90_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmlaq_rot90_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 34 ++++++++++++++++---
> 16 files changed, 416 insertions(+), 48 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
> index fa7d0c05e8c..bb8a99790a0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, float16x8_t c)
> {
> return vcmlaq_f16 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
> {
> return vcmlaq (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
> index 166bf421f14..71ec4b8479c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, float32x4_t c)
> {
> return vcmlaq_f32 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
> {
> return vcmlaq (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
> index 0929f5a0a89..3db345d0791 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
> {
> return vcmlaq_m_f16 (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
> {
> return vcmlaq_m (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
> index 1f4ba453cbc..dcbd2dccce5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
> {
> return vcmlaq_m_f32 (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
> {
> return vcmlaq_m (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
> index fc6ba30b36a..f76ae2383a2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, float16x8_t c)
> {
> return vcmlaq_rot180_f16 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
> {
> return vcmlaq_rot180 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
> index dbe3f26b3b9..c97d0d0d852 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, float32x4_t c)
> {
> return vcmlaq_rot180_f32 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
> {
> return vcmlaq_rot180 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
> index 84a3bd81ad9..132cdf9954f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
> {
> return vcmlaq_rot180_m_f16 (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
> {
> return vcmlaq_rot180_m (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
> index 61f5716f0b7..99e96ebe3a9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
> {
> return vcmlaq_rot180_m_f32 (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
> {
> return vcmlaq_rot180_m (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
> index 1b0bef91f37..fae85105feb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, float16x8_t c)
> {
> return vcmlaq_rot270_f16 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
> {
> return vcmlaq_rot270 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
> index 83e15025e44..54a9b662772 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, float32x4_t c)
> {
> return vcmlaq_rot270_f32 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
> {
> return vcmlaq_rot270 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
> index 6e033b1d7ab..e34f83165c3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
> {
> return vcmlaq_rot270_m_f16 (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
> {
> return vcmlaq_rot270_m (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
> index 4928341076d..cdba91b8e8c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
> {
> return vcmlaq_rot270_m_f32 (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
> {
> return vcmlaq_rot270_m (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
> index 16744a4582c..f767b2b6e6b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, float16x8_t c)
> {
> return vcmlaq_rot90_f16 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmla.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, float16x8_t c)
> {
> return vcmlaq_rot90 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
> index f1f19a87ba7..6c9b24f271d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, float32x4_t c)
> {
> return vcmlaq_rot90_f32 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmla.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, float32x4_t c)
> {
> return vcmlaq_rot90 (a, b, c);
> }
>
> -/* { dg-final { scan-assembler "vcmla.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
> index 7133ddc7ad5..9141c9e6f90 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
> {
> return vcmlaq_rot90_m_f16 (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, float16x8_t c, mve_pred16_t p)
> {
> return vcmlaq_rot90_m (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
> index 6022e3be538..f317d411806 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
> {
> return vcmlaq_rot90_m_f32 (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmlat.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, float32x4_t c, mve_pred16_t p)
> {
> return vcmlaq_rot90_m (a, b, c, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmlat.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 09/23] arm: improve tests for vcmulq*
2023-01-20 16:39 ` [PATCH 09/23] arm: improve tests for vcmulq* Andrea Corallo
@ 2023-01-20 17:59 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 17:59 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 09/23] arm: improve tests for vcmulq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vcmulq_f16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vcmulq_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c: Likewise.
Thanks for the patch and I'll review the rest of the series, but I think for the future such (almost mechanical) uniform updates to the testsuite would be better grouped into one big patch rather than split per instruction group.
As long as the tests pass normally after these changes I would expect to review the general approach for the changes in one or two testcases and trust that it's been applied correctly to the rest of the tests, rather than auditing every testcase.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vcmulq_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmulq_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmulq_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_rot180_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot180_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_rot180_x_f16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot180_x_f32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot270_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot270_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_rot270_x_f16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot270_x_f32.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot90_f16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot90_f32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_rot90_x_f16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_rot90_x_f32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vcmulq_x_f16.c | 33 ++++++++++++++++--
> .../arm/mve/intrinsics/vcmulq_x_f32.c | 33 ++++++++++++++++--
> 24 files changed, 656 insertions(+), 74 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
> index 142c315ecf5..456370e1de1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b)
> {
> return vcmulq_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b)
> {
> return vcmulq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
> index 158d750793d..64db652a1a1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b)
> {
> return vcmulq_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b)
> {
> return vcmulq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
> index b38e0d9fb52..b60f5d718f8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_m_f16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
> index 7bf68735e52..22157d4e58f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_m_f32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
> index fc7162aaa9c..f01b0f3421f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b)
> {
> return vcmulq_rot180_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b)
> {
> return vcmulq_rot180 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
> index 13a4553b6bd..537385c5209 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b)
> {
> return vcmulq_rot180_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b)
> {
> return vcmulq_rot180 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
> index 8767e2beee8..bc8692eb043 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot180_m_f16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot180_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
> index 3f951039f35..d2a0b6d3f2c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot180_m_f32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot180_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
> index f8e835f158f..37d7b79a75c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot180_x_f16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot180_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
> index d0d30c59d44..1e57fba4bd3 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_x_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot180_x_f32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #180(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot180_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
> index 225b8910f88..05c444af804 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b)
> {
> return vcmulq_rot270_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b)
> {
> return vcmulq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
> index 1c8b0ebcf7e..b599c9fc171 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b)
> {
> return vcmulq_rot270_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b)
> {
> return vcmulq_rot270 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
> index 20ccb5e9423..fded8a05089 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot270_m_f16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
> index 7499f4271a6..54d939eb378 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot270_m_f32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot270_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
> index d1b52e74d6d..d1e58cb84bb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot270_x_f16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
> index 35da5936f66..07c781f5103 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_x_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot270_x_f32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #270(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot270_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
> index 17f96cb0a78..53b1930c045 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b)
> {
> return vcmulq_rot90_f16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmul.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b)
> {
> return vcmulq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
> index 739fc9cd1fa..147f1807c29 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_f32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b)
> {
> return vcmulq_rot90_f32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vcmul.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b)
> {
> return vcmulq_rot90 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vcmul.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
> index 8259baa82cc..8c4b0902b09 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot90_m_f16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
> index 751a9a6c03d..b3131a5e984 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot90_m_f32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t inactive, float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot90_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
> index c4aef6cbf30..000610367b9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot90_x_f16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
> index 9c54f0870e7..8e31ad563c6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_x_f32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot90_x_f32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #90(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_rot90_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
> index 7634d61b6ea..b53324738f2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_x_f16 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f16 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float16x8_t
> foo1 (float16x8_t a, float16x8_t b, mve_pred16_t p)
> {
> return vcmulq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
> index 21b6acf9733..a73482a09e1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_x_f32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_x_f32 (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vcmult.f32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vcmult.f32 q[0-9]+, q[0-9]+, q[0-9]+, #0(?: @.*|)
> +** ...
> +*/
> float32x4_t
> foo1 (float32x4_t a, float32x4_t b, mve_pred16_t p)
> {
> return vcmulq_x (a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 10/23] arm: improve tests and fix vqabsq*
2023-01-20 16:39 ` [PATCH 10/23] arm: improve tests and fix vqabsq* Andrea Corallo
@ 2023-01-20 18:01 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:01 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 10/23] arm: improve tests and fix vqabsq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqabsq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqabsq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqabsq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> gcc/config/arm/mve.md | 2 +-
> .../arm/mve/intrinsics/vqabsq_m_s16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vqabsq_m_s32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vqabsq_m_s8.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vqabsq_s16.c | 28 +++++++++++++---
> .../arm/mve/intrinsics/vqabsq_s32.c | 28 +++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vqabsq_s8.c | 24 ++++++++++++--
> 7 files changed, 161 insertions(+), 20 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 0a243486bdb..600adf7d69b 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -388,7 +388,7 @@ (define_insn "mve_vqabsq_s<mode>"
> VQABSQ_S))
> ]
> "TARGET_HAVE_MVE"
> - "vqabs.s%#<V_sz_elem> %q0, %q1"
> + "vqabs.s%#<V_sz_elem>\t%q0, %q1"
> [(set_attr "type" "mve_move")
> ])
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
> index e74e04ac92f..7172ac5cddd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqabst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vqabsq_m_s16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqabst.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqabst.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vqabsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
> index f6ca8a6c3d6..297cb196f1a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqabst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vqabsq_m_s32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqabst.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqabst.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vqabsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
> index d89a5aa3fa5..83c69931239 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_m_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqabst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vqabsq_m_s8 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqabst.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqabst.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vqabsq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
> index e67c008cf6e..bf849fe9354 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s16.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqabs.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a)
> {
> return vqabsq_s16 (a);
> }
>
> -/* { dg-final { scan-assembler "vqabs.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqabs.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a)
> {
> return vqabsq (a);
> }
>
> -/* { dg-final { scan-assembler "vqabs.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
> index 8023ff8d22e..1f88821de23 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s32.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqabs.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a)
> {
> return vqabsq_s32 (a);
> }
>
> -/* { dg-final { scan-assembler "vqabs.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqabs.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a)
> {
> return vqabsq (a);
> }
>
> -/* { dg-final { scan-assembler "vqabs.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
> index b36d2b762e9..1399f7c1636 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqabsq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqabs.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a)
> {
> return vqabsq_s8 (a);
> }
>
> -/* { dg-final { scan-assembler "vqabs.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqabs.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a)
> {
> return vqabsq (a);
> }
>
> -/* { dg-final { scan-assembler "vqabs.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 11/23] arm: improve tests for vqdmladhq*
2023-01-20 16:39 ` [PATCH 11/23] arm: improve tests for vqdmladhq* Andrea Corallo
@ 2023-01-20 18:03 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:03 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 11/23] arm: improve tests for vqdmladhq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqdmladhq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmladhq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmladhq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmladhq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqdmladhq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqdmladhq_s8.c | 24 +++++++++++--
> 6 files changed, 156 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
> index 51cdadc9ece..aa9c78c883b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmladhq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmladhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladht.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
> index 7e43fed1503..4694a6f9ec5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmladhq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmladhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladht.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
> index adf591041e3..c8dc67fdd12 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmladhq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmladhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladht.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
> index 2dc453bdd9a..74ebbfa8b97 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqdmladhq_s16 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqdmladhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladh.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
> index 06f3204e47e..796de4df283 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqdmladhq_s32 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqdmladhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladh.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
> index 79670b8b153..d585f5fac20 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqdmladhq_s8 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqdmladhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladh.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 12/23] arm: improve tests for vqdmladhxq*
2023-01-20 16:39 ` [PATCH 12/23] arm: improve tests for vqdmladhxq* Andrea Corallo
@ 2023-01-20 18:04 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:04 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 12/23] arm: improve tests for vqdmladhxq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c: Improve test.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqdmladhxq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmladhxq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmladhxq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmladhxq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqdmladhxq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqdmladhxq_s8.c | 24 +++++++++++--
> 6 files changed, 156 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
> index c2446e69181..19c5ce5a64f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmladhxq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladhxt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmladhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladhxt.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
> index 12b45517535..e00162addae 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmladhxq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladhxt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmladhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladhxt.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
> index 146aa51306b..19767d2cd41 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmladhxq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladhxt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmladhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmladhxt.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
> index 5a6f4455c20..c6a2fa80670 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqdmladhxq_s16 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladhx.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqdmladhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladhx.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
> index 4eafa6f9476..d38bd691243 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqdmladhxq_s32 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladhx.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqdmladhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladhx.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
> index cc6643574f4..322f702d962 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmladhxq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqdmladhxq_s8 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladhx.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqdmladhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmladhx.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 13/23] arm: improve tests for vqrdmladhq*
2023-01-20 16:39 ` [PATCH 13/23] arm: improve tests for vqrdmladhq* Andrea Corallo
@ 2023-01-20 18:04 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:04 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 13/23] arm: improve tests for vqrdmladhq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqrdmladhq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmladhq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmladhq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmladhq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmladhq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmladhq_s8.c | 24 +++++++++++--
> 6 files changed, 156 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
> index fce4f5a35ef..5b0e134a0ff 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmladhq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmladhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladht.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
> index e550b6a7995..6fdf3879cc2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmladhq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmladhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladht.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
> index b07b28e5bcd..ef75f737161 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmladhq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmladhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladht.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
> index 5bdac923b20..cf7cdb202ce 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqrdmladhq_s16 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmladh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqrdmladhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladh.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
> index aade9bb0ea1..5a022fe3009 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqrdmladhq_s32 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmladh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqrdmladhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladh.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
> index bde80fa5279..2cb27df16f6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqrdmladhq_s8 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmladh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqrdmladhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladh.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 14/23] arm: improve tests for vqrdmladhxq*
2023-01-20 16:39 ` [PATCH 14/23] arm: improve tests for vqrdmladhxq* Andrea Corallo
@ 2023-01-20 18:05 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:05 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 14/23] arm: improve tests for vqrdmladhxq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Improve
> test.
> * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqrdmladhxq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmladhxq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmladhxq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmladhxq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmladhxq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmladhxq_s8.c | 24 +++++++++++--
> 6 files changed, 156 insertions(+), 18 deletions(-)
>
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
> index 677efdcd1e4..1f68671b3f9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmladhxq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladhxt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmladhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladhxt.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
> index 8ee8bbb420b..eaea6e1f482 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmladhxq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladhxt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmladhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladhxt.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
> index 7cfa88fee28..0f582a91f3a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmladhxq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladhxt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmladhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmladhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmladhxt.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
> index 2410ef12b38..a26898ebdab 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqrdmladhxq_s16 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladhx.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmladhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqrdmladhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladhx.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
> index 716028cadfd..572486ecf82 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqrdmladhxq_s32 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladhx.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmladhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqrdmladhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladhx.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
> index 8f9bed5fdb7..00e478b9d3e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqrdmladhxq_s8 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladhx.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmladhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqrdmladhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmladhx.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 15/23] arm: improve tests for vqrdmlashq*
2023-01-20 16:39 ` [PATCH 15/23] arm: improve tests for vqrdmlashq* Andrea Corallo
@ 2023-01-20 18:06 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:06 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 15/23] arm: improve tests for vqrdmlashq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 32 +++++++++++++++----
> .../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 32 +++++++++++++++----
> .../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 32 +++++++++++++++----
> 3 files changed, 78 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
> index 8ff8c34d529..2710f2f0442 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo (int16x8_t a, int16x8_t b, int16_t c)
> +foo (int16x8_t m1, int16x8_t m2, int16_t add)
> {
> - return vqrdmlashq_n_s16 (a, b, c);
> + return vqrdmlashq_n_s16 (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlash.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlash.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> -foo1 (int16x8_t a, int16x8_t b, int16_t c)
> +foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
> {
> - return vqrdmlashq (a, b, c);
> + return vqrdmlashq (m1, m2, add);
> +}
> +
> +#ifdef __cplusplus
> }
> +#endif
>
> -/* { dg-final { scan-assembler "vqrdmlash.s16" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
> index 02583f0627b..5fefc3938c5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo (int32x4_t a, int32x4_t b, int32_t c)
> +foo (int32x4_t m1, int32x4_t m2, int32_t add)
> {
> - return vqrdmlashq_n_s32 (a, b, c);
> + return vqrdmlashq_n_s32 (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlash.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlash.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> -foo1 (int32x4_t a, int32x4_t b, int32_t c)
> +foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
> {
> - return vqrdmlashq (a, b, c);
> + return vqrdmlashq (m1, m2, add);
> +}
> +
> +#ifdef __cplusplus
> }
> +#endif
>
> -/* { dg-final { scan-assembler "vqrdmlash.s32" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
> index 0bd5bcac71f..df96fe85213 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo (int8x16_t a, int8x16_t b, int8_t c)
> +foo (int8x16_t m1, int8x16_t m2, int8_t add)
> {
> - return vqrdmlashq_n_s8 (a, b, c);
> + return vqrdmlashq_n_s8 (m1, m2, add);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlash.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlash.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> -foo1 (int8x16_t a, int8x16_t b, int8_t c)
> +foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
> {
> - return vqrdmlashq (a, b, c);
> + return vqrdmlashq (m1, m2, add);
> +}
> +
> +#ifdef __cplusplus
> }
> +#endif
>
> -/* { dg-final { scan-assembler "vqrdmlash.s8" } } */
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 16/23] arm: improve tests for vqdmlsdhq*
2023-01-20 16:39 ` [PATCH 16/23] arm: improve tests for vqdmlsdhq* Andrea Corallo
@ 2023-01-20 18:06 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:06 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 16/23] arm: improve tests for vqdmlsdhq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqdmlsdhq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmlsdhq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmlsdhq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmlsdhq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqdmlsdhq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqdmlsdhq_s8.c | 24 +++++++++++--
> 6 files changed, 156 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
> index d1e66864d10..f87287ab8cd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmlsdhq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmlsdhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdht.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
> index cc80f211ec8..8155aaf843c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmlsdhq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmlsdhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdht.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
> index 5c9d81a6526..d39badc7707 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmlsdhq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmlsdhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdht.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
> index eb058fb9789..a4fa1d5024b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqdmlsdhq_s16 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqdmlsdhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdh.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
> index 27b93d6b76c..0c6ba426ded 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqdmlsdhq_s32 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqdmlsdhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdh.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
> index 1dd2a59ee4b..089c4cdcc39 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqdmlsdhq_s8 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqdmlsdhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdh.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 17/23] arm: improve tests for vqdmlsdhxq*
2023-01-20 16:39 ` [PATCH 17/23] arm: improve tests for vqdmlsdhxq* Andrea Corallo
@ 2023-01-20 18:07 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:07 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 17/23] arm: improve tests for vqdmlsdhxq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqdmlsdhxq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmlsdhxq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmlsdhxq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqdmlsdhxq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqdmlsdhxq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqdmlsdhxq_s8.c | 24 +++++++++++--
> 6 files changed, 156 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
> index 6ab9743054c..1742d47291c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmlsdhxq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdhxt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqdmlsdhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdhxt.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
> index a34618e97fd..1c1b73a2251 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmlsdhxq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdhxt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqdmlsdhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdhxt.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
> index fdbe89ab6b8..0a980a081a1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmlsdhxq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdhxt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqdmlsdhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqdmlsdhxt.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
> index 786decc6238..713ce9732d2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqdmlsdhxq_s16 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdhx.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqdmlsdhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdhx.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
> index c0244c44067..02f0a3cd6b4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqdmlsdhxq_s32 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdhx.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqdmlsdhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdhx.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
> index 12b43c8edd8..c1792879138 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqdmlsdhxq_s8 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdhx.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqdmlsdhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqdmlsdhx.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 18/23] arm: improve tests for vqrdmlsdhq*
2023-01-20 16:39 ` [PATCH 18/23] arm: improve tests for vqrdmlsdhq* Andrea Corallo
@ 2023-01-20 18:07 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:07 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 18/23] arm: improve tests for vqrdmlsdhq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmlsdhq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmlsdhq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmlsdhq_s8.c | 24 +++++++++++--
> 6 files changed, 156 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
> index d0054b8ea97..6a5776215ca 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmlsdhq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmlsdhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
> index 7d3fe45eb4d..9539e249d6a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmlsdhq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmlsdhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
> index c33f8ea903b..69e54f53a76 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmlsdhq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmlsdhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdht.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
> index 3bd760d38aa..3eb957d6029 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqrdmlsdhq_s16 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlsdh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqrdmlsdhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdh.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
> index e23dc94a9ed..3a3fb506c01 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqrdmlsdhq_s32 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlsdh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqrdmlsdhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdh.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
> index 836e04af566..65ac15da9c7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqrdmlsdhq_s8 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlsdh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqrdmlsdhq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdh.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 19/23] arm: improve tests for vqrdmlsdhxq*
2023-01-20 16:39 ` [PATCH 19/23] arm: improve tests for vqrdmlsdhxq* Andrea Corallo
@ 2023-01-20 18:08 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:08 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 19/23] arm: improve tests for vqrdmlsdhxq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Improve
> test.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 24 +++++++++++--
> 6 files changed, 156 insertions(+), 18 deletions(-)
>
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
> index 2fbd351f3b4..3598f50ccba 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmlsdhxq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdhxt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdhxt.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmlsdhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdhxt.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
> index 324a6e63398..1ab22edf9ca 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmlsdhxq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdhxt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdhxt.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmlsdhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdhxt.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
> index 287868b1190..01103e99b61 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmlsdhxq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdhxt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmlsdhxt.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmlsdhxq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmlsdhxt.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
> index 9d8ea9b2694..522d0ba4a3a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqrdmlsdhxq_s16 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdhx.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlsdhx.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b)
> {
> return vqrdmlsdhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdhx.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
> index aca0b358ea9..5198dfa754e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqrdmlsdhxq_s32 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdhx.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlsdhx.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b)
> {
> return vqrdmlsdhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdhx.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
> index 18f95317b4c..b5baa3dea79 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqrdmlsdhxq_s8 (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdhx.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmlsdhx.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b)
> {
> return vqrdmlsdhxq (inactive, a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmlsdhx.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 20/23] arm: improve tests for vqrdmulhq*
2023-01-20 16:39 ` [PATCH 20/23] arm: improve tests for vqrdmulhq* Andrea Corallo
@ 2023-01-20 18:08 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:08 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 20/23] arm: improve tests for vqrdmulhq*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Improve
> test.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmulhq_m_s8.c | 34 ++++++++++++++++---
> .../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmulhq_n_s8.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmulhq_s16.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmulhq_s32.c | 24 +++++++++++--
> .../arm/mve/intrinsics/vqrdmulhq_s8.c | 24 +++++++++++--
> 12 files changed, 312 insertions(+), 36 deletions(-)
>
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
> index c4b6b7e22f8..fc3a33073aa 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m_n_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
> index 6de3eb1cb9a..897ad5bd28c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m_n_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
> index df3dfa87fbf..05ab0609af4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m_n_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
> index 24831e8a5f8..1d9dc07787c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m_s16 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
> index 70257c3c0a0..76d7507e35a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m_s32 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, int32x4_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
> index 7cd39d2a0d4..7fd2119ea63 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c
> @@ -1,23 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m_s8 (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqrdmulht.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, int8x16_t b, mve_pred16_t p)
> {
> return vqrdmulhq_m (inactive, a, b, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqrdmulht.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
> index 42fe9cbaa2b..8a90a399858 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16_t b)
> {
> return vqrdmulhq_n_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmulh.s16 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16_t b)
> {
> return vqrdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
> index 5f014fae9fb..973464b3297 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32_t b)
> {
> return vqrdmulhq_n_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmulh.s32 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32_t b)
> {
> return vqrdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
> index 887e294661b..65aab964f4e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8_t b)
> {
> return vqrdmulhq_n_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmulh.s8 q[0-9]+, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8_t b)
> {
> return vqrdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
> index 409fc29c0d0..f3153c86b4c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a, int16x8_t b)
> {
> return vqrdmulhq_s16 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmulh.s16 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a, int16x8_t b)
> {
> return vqrdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
> index 18e11b1248c..48b10dbd025 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a, int32x4_t b)
> {
> return vqrdmulhq_s32 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmulh.s32 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a, int32x4_t b)
> {
> return vqrdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
> index 3f1441d5d6b..9f0346fc841 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqrdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a, int8x16_t b)
> {
> return vqrdmulhq_s8 (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqrdmulh.s8 q[0-9]+, q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a, int8x16_t b)
> {
> return vqrdmulhq (a, b);
> }
>
> -/* { dg-final { scan-assembler "vqrdmulh.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 21/23] arm: improve tests and fix vqnegq*
2023-01-20 16:39 ` [PATCH 21/23] arm: improve tests and fix vqnegq* Andrea Corallo
@ 2023-01-20 18:08 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:08 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 21/23] arm: improve tests and fix vqnegq*
>
> gcc/ChangeLog:
>
> * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqnegq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqnegq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqnegq_s8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> gcc/config/arm/mve.md | 2 +-
> .../arm/mve/intrinsics/vqnegq_m_s16.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vqnegq_m_s32.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vqnegq_m_s8.c | 33 +++++++++++++++++--
> .../arm/mve/intrinsics/vqnegq_s16.c | 28 +++++++++++++---
> .../arm/mve/intrinsics/vqnegq_s32.c | 24 ++++++++++++--
> .../gcc.target/arm/mve/intrinsics/vqnegq_s8.c | 24 ++++++++++++--
> 7 files changed, 159 insertions(+), 18 deletions(-)
>
> diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
> index 600adf7d69b..4f94cf14a0b 100644
> --- a/gcc/config/arm/mve.md
> +++ b/gcc/config/arm/mve.md
> @@ -374,7 +374,7 @@ (define_insn "mve_vqnegq_s<mode>"
> VQNEGQ_S))
> ]
> "TARGET_HAVE_MVE"
> - "vqneg.s%#<V_sz_elem> %q0, %q1"
> + "vqneg.s%#<V_sz_elem>\t%q0, %q1"
> [(set_attr "type" "mve_move")
> ])
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
> index 4f0145d2ebd..f3799a35b12 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vqnegq_m_s16 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqnegt.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqnegt.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p)
> {
> return vqnegq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
> index da4f90bad53..bbe64ff4d52 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vqnegq_m_s32 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqnegt.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqnegt.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p)
> {
> return vqnegq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
> index ac1250b2fac..71fcdd7cba7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c
> @@ -1,22 +1,49 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vqnegq_m_s8 (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> -/* { dg-final { scan-assembler "vqnegt.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
> +** ...
> +** vpst(?: @.*|)
> +** ...
> +** vqnegt.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p)
> {
> return vqnegq_m (inactive, a, p);
> }
>
> -/* { dg-final { scan-assembler "vpst" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
> index f9210cd70f4..d5fb4a19854 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s16.c
> @@ -1,21 +1,41 @@
> -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> -/* { dg-add-options arm_v8_1m_mve_fp } */
> +/* { dg-require-effective-target arm_v8_1m_mve_ok } */
> +/* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqneg.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo (int16x8_t a)
> {
> return vqnegq_s16 (a);
> }
>
> -/* { dg-final { scan-assembler "vqneg.s16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqneg.s16 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int16x8_t
> foo1 (int16x8_t a)
> {
> return vqnegq (a);
> }
>
> -/* { dg-final { scan-assembler "vqneg.s16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
> index c2ded7fe659..2c8e709f491 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s32.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqneg.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo (int32x4_t a)
> {
> return vqnegq_s32 (a);
> }
>
> -/* { dg-final { scan-assembler "vqneg.s32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqneg.s32 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int32x4_t
> foo1 (int32x4_t a)
> {
> return vqnegq (a);
> }
>
> -/* { dg-final { scan-assembler "vqneg.s32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
> index d1cc83a6cd0..2f7f7619ef6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqnegq_s8.c
> @@ -1,21 +1,41 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vqneg.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo (int8x16_t a)
> {
> return vqnegq_s8 (a);
> }
>
> -/* { dg-final { scan-assembler "vqneg.s8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vqneg.s8 q[0-9]+, q[0-9]+(?: @.*|)
> +** ...
> +*/
> int8x16_t
> foo1 (int8x16_t a)
> {
> return vqnegq (a);
> }
>
> -/* { dg-final { scan-assembler "vqneg.s8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 22/23] arm: improve tests for vld2q*
2023-01-20 16:39 ` [PATCH 22/23] arm: improve tests for vld2q* Andrea Corallo
@ 2023-01-20 18:09 ` Kyrylo Tkachov
0 siblings, 0 replies; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:09 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 22/23] arm: improve tests for vld2q*
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vld2q_f16.c: Improve test.
> * gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../gcc.target/arm/mve/intrinsics/vld2q_f16.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_f32.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_s16.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_s32.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_s8.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_u16.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_u32.c | 33 ++++++++++++++++---
> .../gcc.target/arm/mve/intrinsics/vld2q_u8.c | 33 ++++++++++++++++---
> 8 files changed, 224 insertions(+), 40 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
> index 24e7a2ea4d0..81690b1022e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f16.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> float16x8x2_t
> -foo (float16_t const * addr)
> +foo (float16_t const *addr)
> {
> return vld2q_f16 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> -/* { dg-final { scan-assembler "vld21.16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> float16x8x2_t
> -foo1 (float16_t const * addr)
> +foo1 (float16_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
> index 727484caaf6..d2ae31fa9e5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_f32.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
> /* { dg-add-options arm_v8_1m_mve_fp } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> float32x4x2_t
> -foo (float32_t const * addr)
> +foo (float32_t const *addr)
> {
> return vld2q_f32 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> -/* { dg-final { scan-assembler "vld21.32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> float32x4x2_t
> -foo1 (float32_t const * addr)
> +foo1 (float32_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
> index f2864a00478..fb4dc1b4fcf 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s16.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int16x8x2_t
> -foo (int16_t const * addr)
> +foo (int16_t const *addr)
> {
> return vld2q_s16 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> -/* { dg-final { scan-assembler "vld21.16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int16x8x2_t
> -foo1 (int16_t const * addr)
> +foo1 (int16_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
> index 9fe2e0459b5..aeb85238fd2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s32.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int32x4x2_t
> -foo (int32_t const * addr)
> +foo (int32_t const *addr)
> {
> return vld2q_s32 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> -/* { dg-final { scan-assembler "vld21.32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int32x4x2_t
> -foo1 (int32_t const * addr)
> +foo1 (int32_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
> index 736080a94a7..687e5ded48c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_s8.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int8x16x2_t
> -foo (int8_t const * addr)
> +foo (int8_t const *addr)
> {
> return vld2q_s8 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.8" } } */
> -/* { dg-final { scan-assembler "vld21.8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> int8x16x2_t
> -foo1 (int8_t const * addr)
> +foo1 (int8_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
> index 2d89ebdcf6b..281fe5eaf10 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u16.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint16x8x2_t
> -foo (uint16_t const * addr)
> +foo (uint16_t const *addr)
> {
> return vld2q_u16 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> -/* { dg-final { scan-assembler "vld21.16" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.16 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint16x8x2_t
> -foo1 (uint16_t const * addr)
> +foo1 (uint16_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.16" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
> index 28d311eca68..524afee72e9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u32.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint32x4x2_t
> -foo (uint32_t const * addr)
> +foo (uint32_t const *addr)
> {
> return vld2q_u32 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> -/* { dg-final { scan-assembler "vld21.32" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.32 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint32x4x2_t
> -foo1 (uint32_t const * addr)
> +foo1 (uint32_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.32" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
> index 790c9743c9a..9eebbd42719 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vld2q_u8.c
> @@ -1,22 +1,45 @@
> /* { dg-require-effective-target arm_v8_1m_mve_ok } */
> /* { dg-add-options arm_v8_1m_mve } */
> /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +/*
> +**foo:
> +** ...
> +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint8x16x2_t
> -foo (uint8_t const * addr)
> +foo (uint8_t const *addr)
> {
> return vld2q_u8 (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.8" } } */
> -/* { dg-final { scan-assembler "vld21.8" } } */
>
> +/*
> +**foo1:
> +** ...
> +** vld20.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +** vld21.8 {q[0-9]+, q[0-9]+}, \[(?:ip|fp|r[0-9]+)\](?: @.*|)
> +** ...
> +*/
> uint8x16x2_t
> -foo1 (uint8_t const * addr)
> +foo1 (uint8_t const *addr)
> {
> return vld2q (addr);
> }
>
> -/* { dg-final { scan-assembler "vld20.8" } } */
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH 23/23] arm: fix missing extern "C" in MVE tests
2023-01-20 16:39 ` [PATCH 23/23] arm: fix missing extern "C" in MVE tests Andrea Corallo
@ 2023-01-20 18:10 ` Kyrylo Tkachov
2023-01-25 13:53 ` Andrea Corallo
0 siblings, 1 reply; 48+ messages in thread
From: Kyrylo Tkachov @ 2023-01-20 18:10 UTC (permalink / raw)
To: Andrea Corallo, gcc-patches; +Cc: Richard Earnshaw, Andrea Corallo
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Friday, January 20, 2023 4:40 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 23/23] arm: fix missing extern "C" in MVE tests
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Add missing extern
> "C".
> * gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
> * gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.
Ok.
Thanks,
Kyrill
> ---
> .../gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c | 8 ++++++++
> gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c | 8 ++++++++
> .../gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c | 8 ++++++++
> 85 files changed, 680 insertions(+)
>
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
> index 20a999da1d2..31f78b30ed8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
> index 986cb8d3ba5..77c0521161c 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
> index 57a4b36f5fe..1cf93d50379 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
> index abed33b0e37..98d80e42da9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
> return vhaddq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
> index 5e5204fb3a7..9b7e611c0e5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
> return vhaddq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
> index b35221ef81b..4d82970e7ec 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
> return vhaddq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
> index 310964f3440..2788eb2f8ff 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
> index d8222645c21..67872a77076 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
> index 85b2feee346..1ec890591ad 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
> index 2da0aa053e5..bc84618b036 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
> index 49b865a123b..6abdfce981f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
> index 5ecd3cbf6ec..0c68c68206b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
> return vhaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
> index a4e277d4e1f..d5bff94a46e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
> index c79b88d6ced..af3e219b3f2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
> index 61893536231..a4551e207c2 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
> index 146d226f36f..71facc46ad9 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -54,4 +58,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
> return vhaddq_x (a, 1, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
> index b70014fb6a5..d45421c76d7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -54,4 +58,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
> return vhaddq_x (a, 1, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
> index 03978dfa28a..5f16fbd9121 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -54,4 +58,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
> return vhaddq_x (a, 1, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
> index c3c787583dd..4e332733459 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
> index a1ab196d3d2..5cdfd3921a5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
> index 061ae89315e..7a2ed232f29 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
> index 0ee88520f8f..e24ff1668db 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
> index 0a0e512c5fc..e9f13956b96 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
> index c495641c532..cba0a302e2a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> return vhaddq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
> index af4f534d7ff..4d1bab9641e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
> index 941d38074a4..8effffaf377 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
> index 9ceb4ef3c6f..f55cd8f5528 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
> index 037ed2c637d..73575a401c5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
> return vhsubq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
> index f51eb10ecbf..f152ef10a9d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
> return vhsubq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
> index 24dd45db152..0a58b1ed355 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
> return vhsubq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
> index 0f275d48753..ec8d9aaed0d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
> index 21aeb9d2a59..e98635a8c11 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
> index b3ee94341b5..3107bb55844 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
> index 690ef2de5ba..783309fdbed 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
> index cfe12573fa0..99bc278d16f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
> index 1926bc34219..ae186512b78 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
> return vhsubq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
> index fcda4c541a6..260ba9ee509 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
> index 55637221f21..be5cc04c2b4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
> index ecfe188f3fa..b0c28be7872 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
> index bf3d6c38b85..f31bb3fa632 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -54,4 +58,8 @@ foo2 (uint16x8_t a, mve_pred16_t p)
> return vhsubq_x (a, 1, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
> index 4ae75b09950..a35346d9b2e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -54,4 +58,8 @@ foo2 (uint32x4_t a, mve_pred16_t p)
> return vhsubq_x (a, 1, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
> index edfa4216a31..25c85449081 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -54,4 +58,8 @@ foo2 (uint8x16_t a, mve_pred16_t p)
> return vhsubq_x (a, 1, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
> index bd2771b0978..dc3433cb81a 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int16x8_t a, int16x8_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
> index 0ea40df3d9e..a1e1faeacb5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int32x4_t a, int32x4_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
> index 90ee94defb0..bbfce818be4 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int8x16_t a, int8x16_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
> index d700741169a..86fc9d7cf33 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (uint16x8_t a, uint16x8_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
> index f43c9626829..53274267515 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (uint32x4_t a, uint32x4_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
> index a0908ba786b..04d89c6c6bd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (uint8x16_t a, uint8x16_t b, mve_pred16_t p)
> return vhsubq_x (a, b, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
> index f201d5fa047..5925d9e968e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int32_t add, int16x8_t m1, int16x8_t m2,
> mve_pred16_t p)
> return vmladavaxq_p (add, m1, m2, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
> index c90647a5064..87d66e654f7 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int32_t add, int32x4_t m1, int32x4_t m2,
> mve_pred16_t p)
> return vmladavaxq_p (add, m1, m2, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
> index 57af7bc1c78..803a5becc86 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int32_t add, int8x16_t m1, int8x16_t m2,
> mve_pred16_t p)
> return vmladavaxq_p (add, m1, m2, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
> index 684580d1c36..6a81b4acfcb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32_t add, int16x8_t m1, int16x8_t m2)
> return vmladavaxq (add, m1, m2);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
> index 5d152647b55..b63ca43abba 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32_t add, int32x4_t m1, int32x4_t m2)
> return vmladavaxq (add, m1, m2);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
> index 71bcdc9b55e..2430858aa51 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32_t add, int8x16_t m1, int8x16_t m2)
> return vmladavaxq (add, m1, m2);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
> index 0fac7abeac0..17b28cfd956 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
> index d750b1f2c14..e6bb4e0b51d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
> index 5fc796edf75..f39451f6bc0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
> index decad65c188..a87163c0446 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint16x8_t a)
> return vqaddq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
> index b0a6d79093e..a6aa9b5dddc 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint32x4_t a)
> return vqaddq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
> index f9ca9a1f042..4bd47319f5e 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint8x16_t a)
> return vqaddq (a, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
> index ffa31463372..97e2a6039eb 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16x8_t a, int16x8_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
> index c5937a967ff..db9355d56dd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32x4_t a, int32x4_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
> index 9f937512811..2804d668da8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8x16_t a, int8x16_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
> index aa4be43f244..17e59961c87 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint16x8_t a, uint16x8_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
> index daef60eb5ca..ce3a397acd6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint32x4_t a, uint32x4_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
> index e28807ec708..faa881f67f6 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqaddq_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (uint8x16_t a, uint8x16_t b)
> return vqaddq (a, b);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
> index 210bacec2fb..909631c549d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16x8_t add, int16x8_t m1, int16_t m2)
> return vqdmlahq (add, m1, m2);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
> index dbb2494b216..fb670befeff 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32x4_t add, int32x4_t m1, int32_t m2)
> return vqdmlahq (add, m1, m2);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
> index a7962f82d38..f66740bee0b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8x16_t add, int8x16_t m1, int8_t m2)
> return vqdmlahq (add, m1, m2);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
> index 34d407f0142..918de9572e8 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add,
> mve_pred16_t p)
> return vqdmlashq_m (m1, m2, add, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git
> a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
> index 50a665ea7e5..b25b66057bd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add,
> mve_pred16_t p)
> return vqdmlashq_m (m1, m2, add, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
> index 45f34b60382..b796f205e5d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -38,4 +42,8 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add,
> mve_pred16_t p)
> return vqdmlashq_m (m1, m2, add, p);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
> index a3f1ae8d6b8..9a2549464c5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16x8_t m1, int16x8_t m2, int16_t add)
> return vqdmlashq (m1, m2, add);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
> index cf867e56874..36fc7b066a1 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32x4_t m1, int32x4_t m2, int32_t add)
> return vqdmlashq (m1, m2, add);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
> index 7e9362cab60..1e7cd44d4f5 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8x16_t m1, int8x16_t m2, int8_t add)
> return vqdmlashq (m1, m2, add);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
> index 6b148a4b03d..5b1731f7332 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (float16x8_t b)
> return vsetq_lane (1.1, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
> index e4e7f892e97..34b403d0601 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (float32x4_t b)
> return vsetq_lane (1.1, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
> index 950cd016b76..458fd5e6f26 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int16_t a, int16x8_t b)
> return vsetq_lane (a, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
> index 6b49ccd91e4..44672f6c264 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int32_t a, int32x4_t b)
> return vsetq_lane (a, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
> index 95ba4da1f51..62e8ee50929 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int64_t a, int64x2_t b)
> return vsetq_lane (a, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
> index 91a5baee55f..3a79ab1759b 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -30,4 +34,8 @@ foo1 (int8_t a, int8x16_t b)
> return vsetq_lane (a, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
> index 53986a5c1b1..8a42773e01f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint16x8_t b)
> return vsetq_lane (1, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
> index 3f17db9623a..43778e6103d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint32x4_t b)
> return vsetq_lane (1, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
> index 5ce4c544c25..c75bfa448f0 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint64x2_t b)
> return vsetq_lane (1, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
> index 58e932b85e8..5fb20161259 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c
> @@ -5,6 +5,10 @@
>
> #include "arm_mve.h"
>
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> /*
> **foo:
> ** ...
> @@ -42,4 +46,8 @@ foo2 (uint8x16_t b)
> return vsetq_lane (1, b, 1);
> }
>
> +#ifdef __cplusplus
> +}
> +#endif
> +
> /* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [PATCH 23/23] arm: fix missing extern "C" in MVE tests
2023-01-20 18:10 ` Kyrylo Tkachov
@ 2023-01-25 13:53 ` Andrea Corallo
0 siblings, 0 replies; 48+ messages in thread
From: Andrea Corallo @ 2023-01-25 13:53 UTC (permalink / raw)
To: Kyrylo Tkachov; +Cc: gcc-patches, Richard Earnshaw
Kyrylo Tkachov <Kyrylo.Tkachov@arm.com> writes:
[...]
>
> Ok.
> Thanks,
> Kyrill
Hi Kyrill,
thanks for reviewing. These and all the previous ones are in with the
requested ChangeLogs changes.
Regards
Andrea
^ permalink raw reply [flat|nested] 48+ messages in thread
end of thread, other threads:[~2023-01-25 13:53 UTC | newest]
Thread overview: 48+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-01-20 16:39 [PATCH 00/23] arm: rework MVE testsuite and rework backend where necessary (3rd chunck) Andrea Corallo
2023-01-20 16:39 ` [PATCH 01/23] arm: improve tests and fix vclsq* Andrea Corallo
2023-01-20 17:44 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 02/23] arm: improve tests and fix vclzq* Andrea Corallo
2023-01-20 17:46 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 03/23] arm: improve tests and fix vnegq* Andrea Corallo
2023-01-20 17:47 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 04/23] arm: improve tests for vmulhq* Andrea Corallo
2023-01-20 17:48 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 05/23] arm: improve tests for vmullbq* Andrea Corallo
2023-01-20 17:51 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 06/23] arm: improve tests for vmulltq* Andrea Corallo
2023-01-20 17:52 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 07/23] arm: improve tests for vcaddq* Andrea Corallo
2023-01-20 17:52 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 08/23] arm: improve tests for vcmlaq* Andrea Corallo
2023-01-20 17:53 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 09/23] arm: improve tests for vcmulq* Andrea Corallo
2023-01-20 17:59 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 10/23] arm: improve tests and fix vqabsq* Andrea Corallo
2023-01-20 18:01 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 11/23] arm: improve tests for vqdmladhq* Andrea Corallo
2023-01-20 18:03 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 12/23] arm: improve tests for vqdmladhxq* Andrea Corallo
2023-01-20 18:04 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 13/23] arm: improve tests for vqrdmladhq* Andrea Corallo
2023-01-20 18:04 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 14/23] arm: improve tests for vqrdmladhxq* Andrea Corallo
2023-01-20 18:05 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 15/23] arm: improve tests for vqrdmlashq* Andrea Corallo
2023-01-20 18:06 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 16/23] arm: improve tests for vqdmlsdhq* Andrea Corallo
2023-01-20 18:06 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 17/23] arm: improve tests for vqdmlsdhxq* Andrea Corallo
2023-01-20 18:07 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 18/23] arm: improve tests for vqrdmlsdhq* Andrea Corallo
2023-01-20 18:07 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 19/23] arm: improve tests for vqrdmlsdhxq* Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 20/23] arm: improve tests for vqrdmulhq* Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 21/23] arm: improve tests and fix vqnegq* Andrea Corallo
2023-01-20 18:08 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 22/23] arm: improve tests for vld2q* Andrea Corallo
2023-01-20 18:09 ` Kyrylo Tkachov
2023-01-20 16:39 ` [PATCH 23/23] arm: fix missing extern "C" in MVE tests Andrea Corallo
2023-01-20 18:10 ` Kyrylo Tkachov
2023-01-25 13:53 ` Andrea Corallo
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