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From: "H.J. Lu" <hjl.tools@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Haochen Jiang <haochen.jiang@intel.com>, binutils@sourceware.org
Subject: Re: [PATCH 04/10] Support Intel CMPccXADD
Date: Mon, 17 Oct 2022 16:31:01 -0700	[thread overview]
Message-ID: <CAMe9rOr-SPdjggEor1jiYZ2YemxwLkpxg_rL1tbLMSBamUn5vg@mail.gmail.com> (raw)
In-Reply-To: <d7b703ca-c109-4024-84c8-0609109e1ec4@suse.com>

On Sat, Oct 15, 2022 at 11:34 PM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 14.10.2022 23:51, H.J. Lu wrote:
> > On Fri, Oct 14, 2022 at 11:27 AM H.J. Lu <hjl.tools@gmail.com> wrote:
> >>  On Fri, Oct 14, 2022 at 6:46 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>> On 14.10.2022 11:12, Haochen Jiang wrote:
> >>>> @@ -8480,6 +8609,70 @@ static const struct dis386 mod_table[][2] = {
> >>>>      /* MOD_VEX_0F38B1*/
> >>>>      { VEX_W_TABLE (VEX_W_0F38B1) },
> >>>>    },
> >>>> +  {
> >>>> +    /* MOD_VEX_0F38E0_X86_64 */
> >>>> +    { "cmpoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> >>>> +  },
> >>>> +  {
> >>>> +    /* MOD_VEX_0F38E1_X86_64 */
> >>>> +    { "cmpnoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> >>>> +  },
> >>>> +  {
> >>>> +    /* MOD_VEX_0F38E2_X86_64 */
> >>>> +    { "cmpbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> >>>> +  },
> >>>> +  {
> >>>> +    /* MOD_VEX_0F38E3_X86_64 */
> >>>> +    { "cmpnbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> >>>
> >>> I understand the ISA extensions document names the insn this way and doesn't
> >>> list cmpaexadd (same for other aliases), but I think this is a mistake in
> >>
> >> Lack of aliases is a bad thing.  In any case, assembler should follow
> >
> > Oops.  I meant "Lack of aliases isn't a bad thing."   Aliases make me
> > wonder if 2 different jcc are really different.
>
> Have you taken the time to read through my question raised in the forum?
> There is a reason for there being multiple names for a single condition
> code: What is meant depends on context. As said there, JZ makes sense to
> use with e.g. TEST or SUB, but it doesn't make sense to use with CMP
> (where JE is the appropriate mnemonic). Here we're talking of only CMP
> (an advanced form of it), so not being able to use CMPEXADD (for there
> only being CMPZXADD) is an issue.

You have a point here.

> >> the spec.
>
> First of all the (early) spec should be sanitized. I'd be surprised if
> there were actually rational reasons for the choice of mnemonics which
> the doc currently lists; the set looks rather arbitrary to me. If the
> spec cannot be relied on, I think it's better to defer implementation of
> something that's questionable.
>
> Plus: What harm would there be if gas supported the full set of mnemonics
> even without the spec listing them all? It's not like there's any non-
> negligible risk of these mnemonics later gaining some different meaning.
>
> Jan
>
> >>> the doc. I've raised a respective question in the ISA extensions forum: I
> >>> think representation of conditions to check for should be uniform among
> >>> insns, and hence it should be "ae" here. (That would also be the effect if
> >>> you used %C<whatever> here.)
>


-- 
H.J.

  reply	other threads:[~2022-10-17 23:31 UTC|newest]

Thread overview: 120+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-14  9:12 [PATCH 0/10] Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions Haochen Jiang
2022-10-14  9:12 ` [PATCH 01/10] Support Intel AVX-IFMA Haochen Jiang
2022-10-14  9:52   ` Jan Beulich
2022-10-14 18:10     ` H.J. Lu
2022-10-16  6:39       ` Jan Beulich
2022-10-17 22:23         ` H.J. Lu
2022-10-18  5:33           ` Jan Beulich
2022-10-18 21:28             ` H.J. Lu
2022-10-19  6:01               ` Jan Beulich
2022-10-19 21:27                 ` H.J. Lu
2022-10-20  6:15                   ` Jan Beulich
2022-10-24  2:07     ` Jiang, Haochen
2022-10-24  5:53     ` Jiang, Haochen
2022-10-24 19:09       ` H.J. Lu
2022-10-25  6:29       ` Jan Beulich
2022-10-14  9:12 ` [PATCH 02/10] Support Intel AVX-VNNI-INT8 Haochen Jiang
2022-10-14 10:57   ` Jan Beulich
2022-10-21  3:22     ` Jiang, Haochen
2022-10-25  1:52       ` H.J. Lu
2022-10-14  9:12 ` [PATCH 03/10] Support Intel AVX-NE-CONVERT Haochen Jiang
2022-10-14 12:58   ` Jan Beulich
2022-10-24  5:37     ` Kong, Lingling
2022-10-24  5:59     ` Kong, Lingling
2022-10-24 19:25       ` H.J. Lu
2022-10-25  6:44       ` Jan Beulich
2022-10-14  9:12 ` [PATCH 04/10] Support Intel CMPccXADD Haochen Jiang
2022-10-14 13:46   ` Jan Beulich
2022-10-14 18:27     ` H.J. Lu
2022-10-14 21:51       ` H.J. Lu
2022-10-16  6:34         ` Jan Beulich
2022-10-17 23:31           ` H.J. Lu [this message]
2022-10-16  6:25       ` Jan Beulich
2022-10-17 23:44         ` H.J. Lu
2022-10-16  6:19     ` Jan Beulich
2022-10-24  2:30     ` Jiang, Haochen
2022-10-24 19:12       ` H.J. Lu
2022-10-24  5:55     ` Jiang, Haochen
2022-10-25  6:53       ` Jan Beulich
2022-10-26  3:03         ` Jiang, Haochen
2022-10-26  8:49           ` Jan Beulich
2022-10-27  3:09             ` Jiang, Haochen
2022-10-27  6:37               ` Jan Beulich
2022-10-28  0:59                 ` Jiang, Haochen
2022-10-14  9:12 ` [PATCH 05/10] Add handler for more i386_cpu_flags Haochen Jiang
2022-10-14 13:53   ` Jan Beulich
2022-10-14  9:12 ` [PATCH 06/10] Support Intel RAO-INT Haochen Jiang
2022-10-14 14:38   ` Jan Beulich
2022-10-16  6:15     ` Jan Beulich
2022-10-24  3:12     ` Jiang, Haochen
2022-10-24 19:17       ` H.J. Lu
2022-10-24  5:56     ` Jiang, Haochen
2022-10-25  7:01       ` Jan Beulich
2022-10-26  5:16         ` Jiang, Haochen
2022-10-26  8:56           ` Jan Beulich
2022-10-27  3:50             ` Jiang, Haochen
2022-10-27  6:39               ` Jan Beulich
2022-10-27 18:46                 ` H.J. Lu
2022-10-28  6:52                   ` Jan Beulich
2022-10-28  8:10                     ` Jiang, Haochen
2022-10-28  8:22                       ` Jan Beulich
2022-10-28  8:31                         ` Jiang, Haochen
2022-10-28  8:40                           ` Jan Beulich
2022-10-28 16:08                             ` H.J. Lu
2022-10-31  9:41                               ` Jan Beulich
2022-10-31 16:49                                 ` H.J. Lu
2022-11-06 12:50         ` Kong, Lingling
2022-11-07  9:24           ` Jan Beulich
2022-11-07 13:37             ` Kong, Lingling
2022-11-07 20:03               ` H.J. Lu
2022-10-17 23:23   ` H.J. Lu
2022-10-18  5:38     ` Jan Beulich
2022-10-14  9:12 ` [PATCH 07/10] Support Intel WRMSRNS Haochen Jiang
2022-10-17  7:17   ` Jan Beulich
2022-10-24  2:52     ` Jiang, Haochen
2022-10-24  5:56     ` Jiang, Haochen
2022-10-24 19:14       ` H.J. Lu
2022-10-25  7:04       ` Jan Beulich
2022-10-14  9:12 ` [PATCH 08/10] Support Intel MSRLIST Haochen Jiang
2022-10-17  7:20   ` Jan Beulich
2022-10-24  3:03     ` Jiang, Haochen
2022-10-24  5:56     ` Jiang, Haochen
2022-10-24 19:15       ` H.J. Lu
2022-10-25  7:07       ` Jan Beulich
2022-10-14  9:12 ` [PATCH 09/10] Support Intel AMX-FP16 Haochen Jiang
2022-10-17  7:35   ` Jan Beulich
2022-10-18  9:01     ` Cui, Lili
2022-10-18  9:23       ` Jan Beulich
2022-10-18  9:33         ` Jiang, Haochen
2022-10-19 10:33         ` Cui, Lili
2022-10-19 13:35           ` Jan Beulich
2022-10-19 14:05             ` Cui, Lili
2022-10-19 14:09               ` Jan Beulich
2022-10-19 14:41                 ` Cui, Lili
2022-10-19 15:04                   ` Jan Beulich
2022-10-19 15:21                     ` Cui, Lili
2022-10-19 14:01           ` Jiang, Haochen
2022-10-19 14:13             ` Jan Beulich
2022-10-19 14:58               ` Jiang, Haochen
2022-10-25  6:02         ` Jan Beulich
2022-10-25 13:05           ` Cui, Lili
2022-10-14  9:12 ` [PATCH 10/10] Support Intel PREFETCHI Haochen Jiang
2022-10-17  8:15   ` Jan Beulich
2022-10-25 13:03     ` Cui, Lili
2022-10-25 15:41       ` Jan Beulich
2022-10-25 15:52       ` Jan Beulich
2022-10-25 17:01         ` H.J. Lu
2022-10-26 13:42           ` Cui, Lili
2022-10-26 13:53             ` Jan Beulich
2022-10-27  6:04               ` Cui, Lili
2022-10-27  6:45                 ` Jan Beulich
2022-10-27  7:01                   ` Cui, Lili
2022-10-27  7:15                     ` Jan Beulich
2022-10-27  7:43                       ` Cui, Lili
2022-10-28  9:03                       ` Cui, Lili
2022-10-28 15:54                     ` H.J. Lu
2022-10-31 13:23                       ` Cui, Lili
2022-10-31 14:45                     ` Mike Frysinger
2022-10-31 16:25                       ` H.J. Lu
2022-10-19 14:55 [PATCH v2 0/10] Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions Haochen Jiang
2022-10-19 14:56 ` [PATCH 04/10] Support Intel CMPccXADD Haochen Jiang
2022-10-19 15:15 [PATCH v2 0/10] Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions (Resend) Haochen Jiang
2022-10-19 15:15 ` [PATCH 04/10] Support Intel CMPccXADD Haochen Jiang

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