Re: [PATCH 06/10] Support Intel RAO-INT

[Jan Beulich <jbeulich@suse.com>]

On 27.10.2022 05:50, Jiang, Haochen wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Wednesday, October 26, 2022 4:57 PM
>> To: Jiang, Haochen <haochen.jiang@intel.com>
>> Cc: hjl.tools@gmail.com; binutils@sourceware.org; Kong, Lingling
>> <lingling.kong@intel.com>
>> Subject: Re: [PATCH 06/10] Support Intel RAO-INT
>>
>> On 26.10.2022 07:16, Jiang, Haochen wrote:
>>>> -----Original Message-----
>>>> From: Jan Beulich <jbeulich@suse.com>
>>>> Sent: Tuesday, October 25, 2022 3:01 PM
>>>>
>>>> On 24.10.2022 07:56, Jiang, Haochen wrote:
>>>>>> -----Original Message-----
>>>>>> From: Jan Beulich <jbeulich@suse.com>
>>>>>> Sent: Friday, October 14, 2022 10:38 PM
>>>>>>
>>>>>> On 14.10.2022 11:12, Haochen Jiang wrote:
>>>>>>> +aadd, 0xf38fc, None, CpuRAOINT,
>>>>>>>
>>>>
>> +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64,
>>>>>>> +Dword|Qword|Unspecified|BaseIndex}
>>>>>>> +aand, 0x660f38fc, None, CpuRAOINT,
>>>>>>>
>>>>
>> +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64,
>>>>>>> +Dword|Qword|Unspecified|BaseIndex}
>>>>>>> +aor, 0xf20f38fc, None, CpuRAOINT,
>>>>>>>
>>>>
>> +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64,
>>>>>>> +Dword|Qword|Unspecified|BaseIndex}
>>>>>>> +axor, 0xf30f38fc, None, CpuRAOINT,
>>>>>>>
>>>>
>> +Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64,
>>>>>>> +Dword|Qword|Unspecified|BaseIndex}
>>>>>>
>>>>>> Why IgnoreSize? Instead I think you need CheckRegSize (assuming it
>> does
>>>>>> enough for Intel syntax memory operands - please double check; if not
>>>> this will
>>>>>> need fixing).
>>>>>>
>>>>>
>>>>> For table, we aligned with CMPccXADD and added No_lSuf and No_qSuf
>>>> since
>>>>> the suffixes are not required.
>>>>
>>>> Which, as said, I consider wrong both here and there.
>>>
>>> I still agree with H.J.. Also I suppose the previous usage of suffixes are quite
>>> messy and we should not stick on the confusing code.
>>>
>>> Keeping consistent with SPEC from now on to avoid confusion on that
>> might
>>> be a better solution for future.
>>
>> Same question to you then: Which spec? As said in reply to H.J., the only
>> spec I'm aware of suggests prefixes ought to be used _whenever_ there's a
>> sized memory operand [1]. If we want to deal with the present "mess", I
>> think we ought to simply allow suffixes consistently. Please point out any
>> other messy aspects beyond that.
> 
> The default behavior for current ISA is when there is no suffix required, it won't
> mention that.

What is "current ISA" here? Looking over the whole set of insns which we
support, it's the vast majority which behaves differently from what you
say. It's been several times that I mentioned that we would better
eliminate this inconsistency.

Jan