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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work119)] Revert patches
Date: Tue, 18 Apr 2023 22:13:59 +0000 (GMT) [thread overview]
Message-ID: <20230418221359.665783858288@sourceware.org> (raw)
https://gcc.gnu.org/g:6c962c52b0efac580f75aadbc02717ee5859f3e8
commit 6c962c52b0efac580f75aadbc02717ee5859f3e8
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Apr 18 18:13:56 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/vsx.md | 45 ----------------------
| 37 ------------------
2 files changed, 82 deletions(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index e3466f3aa74..49da544bf28 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3980,51 +3980,6 @@
[(set_attr "type" "load,load,fpload,fpload")
(set_attr "length" "4,8,4,8")])
-;; Extract a V8HI/V16QI element from memory with constant element number and
-;; convert it to DImode with zero extension.
-(define_insn_and_split "*vsx_extract_<mode>_load_to_udi"
- [(set (match_operand:DI 0 "register_operand" "=r,r,v,v")
- (zero_extend:DI
- (vec_select:<VEC_base>
- (match_operand:VSX_EXTRACT_I2 1 "memory_operand" "YZ,m,Z,Q")
- (parallel
- [(match_operand:QI 2 "<VSX_EXTRACT_PREDICATE>" "0,n,0,n")]))))
- (clobber (match_scratch:DI 3 "=X,&b,X,&b"))]
- "VECTOR_MEM_VSX_P (V4SImode) && TARGET_DIRECT_MOVE_64BIT"
- "#"
- "&& reload_completed"
- [(set (match_dup 0)
- (zero_extend:DI (match_dup 4)))]
-{
- operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
- operands[3], <VEC_base>mode);
-}
- [(set_attr "type" "load,load,fpload,fpload")
- (set_attr "length" "4,8,4,8")
- (set_attr "isa" "*,*,p9v,p9v")])
-
-;; Extract a V8HI element from memory with constant element number and
-;; convert it to DImode with sign extension.
-(define_insn_and_split "*vsx_extract_v8hi_load_to_sdi"
- [(set (match_operand:DI 0 "register_operand" "=r,r")
- (sign_extend:DI
- (vec_select:HI
- (match_operand:V8HI 1 "memory_operand" "YZ,m")
- (parallel
- [(match_operand:QI 2 "const_0_to_7_operand" "0,n")]))))
- (clobber (match_scratch:DI 3 "=X,&b"))]
- "VECTOR_MEM_VSX_P (V4SImode) && TARGET_DIRECT_MOVE_64BIT"
- "#"
- "&& reload_completed"
- [(set (match_dup 0)
- (sign_extend:DI (match_dup 4)))]
-{
- operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
- operands[3], HImode);
-}
- [(set_attr "type" "load,load")
- (set_attr "length" "4,8")])
-
;; Extract a V4SI element from memory with constant element number and convert
;; it to SFmode, DFmode, KFmode, or possibly TFmode using either signed or
;; unsigned conversion.
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-short-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-short-1.c
deleted file mode 100644
index a2c482f556e..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-short-1.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/* { dg-do compile { target lp64 } } */
-/* { dg-options "-O2 -mdejagnu-cpu=power8" } */
-/* { dg-require-effective-target p8vector_hw } */
-
-/* Test to verify that the vec_extract with constant element numbers can load
- SImode and fold the sign/extension into the load. */
-
-#include <altivec.h>
-
-long long
-extract_sign_v8hi_0 (vector short *p)
-{
- return vec_extract (*p, 0); /* lha, no extsh. */
-}
-
-long long
-extract_sign_v8hi_1 (vector short *p)
-{
- return vec_extract (*p, 1); /* lha, no extsh. */
-}
-
-unsigned long long
-extract_uns_v8hi_0 (vector unsigned short *p)
-{
- return vec_extract (*p, 0); /* lhz, no rlwinm. */
-}
-
-unsigned long long
-extract_uns_v8hi_1 (vector unsigned short *p)
-{
- return vec_extract (*p, 1); /* lhz, no rlwinm. */
-}
-
-/* { dg-final { scan-assembler-times {\mlha\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mlhz\M} 2 } } */
-/* { dg-final { scan-assembler-not {\mextsh\M} } } */
-/* { dg-final { scan-assembler-not {\mrlwinm\M} } } */
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