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* [committed] [PR target/34091] Secondary reloads for floating-point register classes
@ 2007-12-09 20:29 John David Anglin
  0 siblings, 0 replies; 504+ messages in thread
From: John David Anglin @ 2007-12-09 20:29 UTC (permalink / raw)
  To: gcc-patches

The attached patch fixes a regression introduced in 4.2 regarding the
behavior of secondary reloads.

As background, the basic problem is that the range of displacements
allowed for REG+D addresses differs for integer and floating-point
loads and stores in the PA-RISC 1.x architecture.  Integer instructions
can handle 14-bit signed offsets.  Floating-point instructions can
only handle 5-bit signed offsets.

The technique to handle this asymmetry has always been to accept
14-bit offsets in GO_IF_LEGITIMATE_ADDRESS for integer modes and 5-bit
offsets for floating-point modes.  A secondary reload was used to
rewrite floating-point loads and stores so that register elimination
wouldn't result in an invalid REG+D offset.

In the testcase submitted with PR 34091, we have the following
failure:

swrast/s_texfilter.c:1420: error: insn does not satisfy its constraints:
(insn 2621 1258 1259 96 (set (mem/c:HI (plus:SI (reg/f:SI 30 %r30)
                (const_int -474 [0xfffffe26])) [0 S2 A16])
	(reg:HI 68 %fr22)) 53 {*pa.md:3126} (nil)
    (nil))

This exposed these issues:

1) The PA backend has no patterns that operate on HImode values in
   floating-point registers.  It is expense to copy between the general
   and floating-point registers (it must be done via memory), so we
   never want to use the floating point registers for temporary registers
   for HImode and QImode values.  The fact that floating-point registers
   are being used suggests a problem with costs.

2) We don't have reload_inhi and reload_outhi patterns, so the secondary
   reload technique described above is broken for HImode and QImode values
   in the floating-point registers.

So, I decided to modify the backend to prevent the loading of HImode
and QImode values into the floating registers.  I removed pattern
duplication from pa.md.  Updated the defines VALID_FP_MODE_P, and
turned MODES_TIEABLE_P and CANNOT_CHANGE_MODE_CLASS into functions.
pa_cannot_change_mode_class() now prohibits mode changes in the
floating-point registers.  pa_modes_tieable_p() is functionally
unchanged.  I left it because I wanted to more easily experiment
with its definition.

After doing this, the testcase for PR 34091 still failed.  I found
that secondary reloads for REG+D addresses weren't always generated,
possibly because GO_IF_LEGITIMATE_ADDRESS accepts reloading pseudos
and 5-bit immediates.  An offset relative to the frame pointer might
be valid but invalid as a stack pointer offset.

I looked at the alternative of changing GO_IF_LEGITIMATE_ADDRESS
to only allow 5-bit offsets.  However, this significantly increases
register pressure (I had some spill failures in testing), requires
more register saves and restores, and increases code size.  I didn't
come up with a way to generate 14-bit code using reload, so to get
the code size back, a bunch of peephole2 patterns would be needed.

Eric Botcazou indicated that sparc uses an intermediate general
register instead of a scratch-register reload.  So, that's what we
have now for copies of integer mode MEMs to/from the floating-point
registers.  I'm not particularly happy about this.

The code generated using this technique is less efficient than that
previously generated using a secondary scratch-register reload.  For that,
the pseudo would be forced to memory and its address loaded into the
scratch register.  Using a general intermediate requires copying the
value through memory.

When generating PA 2.0 code (hppa), we have 14-bit displacements
for floating-point loads and stores.  Thus, it might seem that
an intermediate general register wouldn't be needed.  However, it
seems to do this requires handling paradoxical subregs in the
floating-point registers.

Further, it turns out that we still need the old secondary reload
technique for SYMBOL_REFs and possibly some other RTL forms.

I had a lot of trouble with this change because the documentation
as to the behavior of TARGET_SECONDARY_RELOAD is quite vague with
respect to when it's used and the rtx's to expect in the argument
X.

There are some secondary changes in this patch.  There are minor
corrections to MODE_OK_FOR_SCALED_INDEXING_P, MODE_OK_FOR_UNSCALED_INDEXING_P
and LEGITIMIZE_RELOAD_ADDRESS.  The macro INT14_OK_STRICT was defined
to facilitate testing and simplify GO_IF_LEGITIMATE_ADDRESS.  This
defines allows 14-bit when TARGET_DISABLE_FPREGS is true.  Moving the
define of SECONDARY_MEMORY_NEEDED from pa.h to pa-64.h wasn't absolutely
necessary but it prevents some unnecessary code from being compiled
into reload.

I've tested the change on hppa-unknown-linux-gnu, hppa2.0w-hp-hpux11.11
and hppa64-hp-hpux11.11 on both trunk and 4.2 branch with no regressions.

The patch has been committed to the trunk.  I'm pondering whether
to commit it to 4.2.  This is a very tricky change and it might easily
introduce problems elsewhere.  In developing this change, I thought
several times that I had the final version only to find that I had
broken the 64-bit port, or the 32-bit port.

Dave
-- 
J. David Anglin                                  dave.anglin@nrc-cnrc.gc.ca
National Research Council of Canada              (613) 990-0752 (FAX: 952-6602)

2007-12-09  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	PR middle-end/32889
	PR target/34091
	* pa.md: Consolidate HImode and QImode move patterns into one pattern
	each, eliminating floating-point alternatives.
	* pa-protos.h (pa_cannot_change_mode_class, pa_modes_tieable_p):
	Declare functions.
	* pa-64.h (SECONDARY_MEMORY_NEEDED): Define here.
	* pa.c (pa_secondary_reload): Use an intermediate general register
	for copies to/from floating-point register classes.  Simplify code
	SHIFT_REGS class.  Provide additional comments.
	(pa_cannot_change_mode_class, pa_modes_tieable_p): New functions.
	* pa.h (MODES_TIEABLE_P): Use pa_modes_tieable_p.
	(SECONDARY_MEMORY_NEEDED): Delete define.
	(INT14_OK_STRICT): Define.
	(MODE_OK_FOR_SCALED_INDEXING_P): Allow SFmode and DFmode when using
	soft float.
	(MODE_OK_FOR_UNSCALED_INDEXING_P): Likewise.
	(GO_IF_LEGITIMATE_ADDRESS): Use INT14_OK_STRICT in REG+D case for
	SFmode and DFmode.
	(LEGITIMIZE_RELOAD_ADDRESS): Use INT14_OK_STRICT in mask selection.
	Align DImode offsets when generating 64-bit code.
	* pa32-regs.h (VALID_FP_MODE_P): Remove QImode and HImode.
	(CANNOT_CHANGE_MODE_CLASS): Define.
	* pa64-regs.h (VALID_FP_MODE_P): Remove QImode and HImode.
	(CANNOT_CHANGE_MODE_CLASS): Define using pa_cannot_change_mode_class.

Index: config/pa/pa.md
===================================================================
--- config/pa/pa.md	(revision 130717)
+++ config/pa/pa.md	(working copy)
@@ -3183,60 +3183,11 @@
 
 (define_insn ""
   [(set (match_operand:HI 0 "move_dest_operand"
-	 		  "=r,r,r,r,r,Q,!*q,!r,!*f,?r,?*f")
-	(match_operand:HI 1 "move_src_operand"
-			  "r,J,N,K,RQ,rM,!rM,!*q,!*fM,*f,r"))]
-  "(register_operand (operands[0], HImode)
-    || reg_or_0_operand (operands[1], HImode))
-   && !TARGET_SOFT_FLOAT
-   && !TARGET_64BIT"
-  "@
-   copy %1,%0
-   ldi %1,%0
-   ldil L'%1,%0
-   {zdepi|depwi,z} %Z1,%0
-   ldh%M1 %1,%0
-   sth%M0 %r1,%0
-   mtsar %r1
-   {mfctl|mfctl,w} %sar,%0
-   fcpy,sgl %f1,%0
-   {fstws|fstw} %1,-16(%%sp)\n\t{ldws|ldw} -16(%%sp),%0
-   {stws|stw} %1,-16(%%sp)\n\t{fldws|fldw} -16(%%sp),%0"
-  [(set_attr "type" "move,move,move,shift,load,store,move,move,move,fpstore_load,store_fpload")
-   (set_attr "pa_combine_type" "addmove")
-   (set_attr "length" "4,4,4,4,4,4,4,4,4,8,8")])
-
-(define_insn ""
-  [(set (match_operand:HI 0 "move_dest_operand"
-	 		  "=r,r,r,r,r,Q,!*q,!r,!*f")
-	(match_operand:HI 1 "move_src_operand"
-			  "r,J,N,K,RQ,rM,!rM,!*q,!*fM"))]
-  "(register_operand (operands[0], HImode)
-    || reg_or_0_operand (operands[1], HImode))
-   && !TARGET_SOFT_FLOAT
-   && TARGET_64BIT"
-  "@
-   copy %1,%0
-   ldi %1,%0
-   ldil L'%1,%0
-   {zdepi|depwi,z} %Z1,%0
-   ldh%M1 %1,%0
-   sth%M0 %r1,%0
-   mtsar %r1
-   {mfctl|mfctl,w} %sar,%0
-   fcpy,sgl %f1,%0"
-  [(set_attr "type" "move,move,move,shift,load,store,move,move,move")
-   (set_attr "pa_combine_type" "addmove")
-   (set_attr "length" "4,4,4,4,4,4,4,4,4")])
-
-(define_insn ""
-  [(set (match_operand:HI 0 "move_dest_operand"
 	 		  "=r,r,r,r,r,Q,!*q,!r")
 	(match_operand:HI 1 "move_src_operand"
 			  "r,J,N,K,RQ,rM,!rM,!*q"))]
   "(register_operand (operands[0], HImode)
-    || reg_or_0_operand (operands[1], HImode))
-   && TARGET_SOFT_FLOAT"
+    || reg_or_0_operand (operands[1], HImode))"
   "@
    copy %1,%0
    ldi %1,%0
@@ -3356,60 +3307,11 @@
 
 (define_insn ""
   [(set (match_operand:QI 0 "move_dest_operand"
-			  "=r,r,r,r,r,Q,!*q,!r,!*f,?r,?*f")
-	(match_operand:QI 1 "move_src_operand"
-			  "r,J,N,K,RQ,rM,!rM,!*q,!*fM,*f,r"))]
-  "(register_operand (operands[0], QImode)
-    || reg_or_0_operand (operands[1], QImode))
-   && !TARGET_SOFT_FLOAT
-   && !TARGET_64BIT"
-  "@
-   copy %1,%0
-   ldi %1,%0
-   ldil L'%1,%0
-   {zdepi|depwi,z} %Z1,%0
-   ldb%M1 %1,%0
-   stb%M0 %r1,%0
-   mtsar %r1
-   {mfctl|mfctl,w} %%sar,%0
-   fcpy,sgl %f1,%0
-   {fstws|fstw} %1,-16(%%sp)\n\t{ldws|ldw} -16(%%sp),%0
-   {stws|stw} %1,-16(%%sp)\n\t{fldws|fldw} -16(%%sp),%0"
-  [(set_attr "type" "move,move,move,shift,load,store,move,move,move,fpstore_load,store_fpload")
-   (set_attr "pa_combine_type" "addmove")
-   (set_attr "length" "4,4,4,4,4,4,4,4,4,8,8")])
-
-(define_insn ""
-  [(set (match_operand:QI 0 "move_dest_operand"
-			  "=r,r,r,r,r,Q,!*q,!r,!*f")
-	(match_operand:QI 1 "move_src_operand"
-			  "r,J,N,K,RQ,rM,!rM,!*q,!*fM"))]
-  "(register_operand (operands[0], QImode)
-    || reg_or_0_operand (operands[1], QImode))
-   && !TARGET_SOFT_FLOAT
-   && TARGET_64BIT"
-  "@
-   copy %1,%0
-   ldi %1,%0
-   ldil L'%1,%0
-   {zdepi|depwi,z} %Z1,%0
-   ldb%M1 %1,%0
-   stb%M0 %r1,%0
-   mtsar %r1
-   {mfctl|mfctl,w} %%sar,%0
-   fcpy,sgl %f1,%0"
-  [(set_attr "type" "move,move,move,shift,load,store,move,move,move")
-   (set_attr "pa_combine_type" "addmove")
-   (set_attr "length" "4,4,4,4,4,4,4,4,4")])
-
-(define_insn ""
-  [(set (match_operand:QI 0 "move_dest_operand"
 			  "=r,r,r,r,r,Q,!*q,!r")
 	(match_operand:QI 1 "move_src_operand"
 			  "r,J,N,K,RQ,rM,!rM,!*q"))]
   "(register_operand (operands[0], QImode)
-    || reg_or_0_operand (operands[1], QImode))
-   && TARGET_SOFT_FLOAT"
+    || reg_or_0_operand (operands[1], QImode))"
   "@
    copy %1,%0
    ldi %1,%0
Index: config/pa/pa-protos.h
===================================================================
--- config/pa/pa-protos.h	(revision 130717)
+++ config/pa/pa-protos.h	(working copy)
@@ -172,6 +172,9 @@
 					 unsigned HOST_WIDE_INT,
 					 unsigned int);
 extern void pa_hpux_asm_output_external (FILE *, tree, const char *);
+extern bool pa_cannot_change_mode_class (enum machine_mode, enum machine_mode,
+					 enum reg_class);
+extern bool pa_modes_tieable_p (enum machine_mode, enum machine_mode);
 
 extern const int magic_milli[];
 extern int shadd_constant_p (int);
Index: config/pa/pa-64.h
===================================================================
--- config/pa/pa-64.h	(revision 130717)
+++ config/pa/pa-64.h	(working copy)
@@ -84,3 +84,17 @@
    want aggregates padded down.  */
 
 #define PAD_VARARGS_DOWN (!AGGREGATE_TYPE_P (type))
+
+/* In the PA architecture, it is not possible to directly move data
+   between GENERAL_REGS and FP_REGS.  On the 32-bit port, we use the
+   location at SP-16 because PA 1.X only supports 5-bit immediates for
+   floating-point loads and stores.  We don't expose this location in
+   the RTL to avoid scheduling related problems.  For example, the
+   store and load could be separated by a call to a pure or const
+   function which has no frame and this function might also use SP-16.
+   We have 14-bit immediates on the 64-bit port, so we use secondary
+   memory for the copies.  */
+#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
+  (MAYBE_FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2)		\
+   || MAYBE_FP_REG_CLASS_P (CLASS2) != FP_REG_CLASS_P (CLASS1))
+
Index: config/pa/pa.c
===================================================================
--- config/pa/pa.c	(revision 130717)
+++ config/pa/pa.c	(working copy)
@@ -5687,30 +5687,66 @@
   if (regno >= FIRST_PSEUDO_REGISTER || GET_CODE (x) == SUBREG)
     regno = true_regnum (x);
 
-  /* Handle out of range displacement for integer mode loads/stores of
-     FP registers.  */
-  if (((regno >= FIRST_PSEUDO_REGISTER || regno == -1)
-       && GET_MODE_CLASS (mode) == MODE_INT
-       && FP_REG_CLASS_P (class))
-      || (class == SHIFT_REGS && (regno <= 0 || regno >= 32)))
+  /* In order to allow 14-bit displacements in integer loads and stores,
+     we need to prevent reload from generating out of range integer mode
+     loads and stores to the floating point registers.  Previously, we
+     used to call for a secondary reload and have emit_move_sequence()
+     fix the instruction sequence.  However, reload occasionally wouldn't
+     generate the reload and we would end up with an invalid REG+D memory
+     address.  So, now we use an intermediate general register for most
+     memory loads and stores.  */
+  if ((regno >= FIRST_PSEUDO_REGISTER || regno == -1)
+      && GET_MODE_CLASS (mode) == MODE_INT
+      && FP_REG_CLASS_P (class))
     {
+      /* Reload passes (mem:SI (reg/f:DI 30 %r30) when it wants to check
+	 the secondary reload needed for a pseudo.  It never passes a
+	 REG+D address.  */
+      if (GET_CODE (x) == MEM)
+	{
+	  x = XEXP (x, 0);
+
+	  /* We don't need an intermediate for indexed and LO_SUM DLT
+	     memory addresses.  When INT14_OK_STRICT is true, it might
+	     appear that we could directly allow register indirect
+	     memory addresses.  However, this doesn't work because we
+	     don't support SUBREGs in floating-point register copies
+	     and reload doesn't tell us when it's going to use a SUBREG.  */
+	  if (IS_INDEX_ADDR_P (x)
+	      || IS_LO_SUM_DLT_ADDR_P (x))
+	    return NO_REGS;
+
+	  /* Otherwise, we need an intermediate general register.  */
+	  return GENERAL_REGS;
+	}
+
+      /* Request a secondary reload with a general scratch register
+	 for everthing else.  ??? Could symbolic operands be handled
+	 directly when generating non-pic PA 2.0 code?  */
       sri->icode = in_p ? reload_in_optab[mode] : reload_out_optab[mode];
       return NO_REGS;
     }
 
+  /* We need a secondary register (GPR) for copies between the SAR
+     and anything other than a general register.  */
+  if (class == SHIFT_REGS && (regno <= 0 || regno >= 32))
+    {
+      sri->icode = in_p ? reload_in_optab[mode] : reload_out_optab[mode];
+      return NO_REGS;
+    }
+
   /* A SAR<->FP register copy requires a secondary register (GPR) as
      well as secondary memory.  */
   if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
-      && ((REGNO_REG_CLASS (regno) == SHIFT_REGS && FP_REG_CLASS_P (class))
-	  || (class == SHIFT_REGS
-	      && FP_REG_CLASS_P (REGNO_REG_CLASS (regno)))))
+      && (REGNO_REG_CLASS (regno) == SHIFT_REGS
+      && FP_REG_CLASS_P (class)))
     {
       sri->icode = in_p ? reload_in_optab[mode] : reload_out_optab[mode];
       return NO_REGS;
     }
 
   /* Secondary reloads of symbolic operands require %r1 as a scratch
-     register when we're generating PIC code and the operand isn't
+     register when we're generating PIC code and when the operand isn't
      readonly.  */
   if (GET_CODE (x) == HIGH)
     x = XEXP (x, 0);
@@ -9570,4 +9606,62 @@
 }
 #endif
 
+/* Return true if a change from mode FROM to mode TO for a register
+   in register class CLASS is invalid.  */
+
+bool
+pa_cannot_change_mode_class (enum machine_mode from, enum machine_mode to,
+			     enum reg_class class)
+{
+  if (from == to)
+    return false;
+
+  /* Reject changes to/from complex and vector modes.  */
+  if (COMPLEX_MODE_P (from) || VECTOR_MODE_P (from)
+      || COMPLEX_MODE_P (to) || VECTOR_MODE_P (to))
+    return true;
+      
+  if (GET_MODE_SIZE (from) == GET_MODE_SIZE (to))
+    return false;
+
+  /* There is no way to load QImode or HImode values directly from
+     memory.  SImode loads to the FP registers are not zero extended.
+     On the 64-bit target, this conflicts with the definition of
+     LOAD_EXTEND_OP.  Thus, we can't allow changing between modes
+     with different sizes in the floating-point registers.  */
+  if (MAYBE_FP_REG_CLASS_P (class))
+    return true;
+
+  /* HARD_REGNO_MODE_OK places modes with sizes larger than a word
+     in specific sets of registers.  Thus, we cannot allow changing
+     to a larger mode when it's larger than a word.  */
+  if (GET_MODE_SIZE (to) > UNITS_PER_WORD
+      && GET_MODE_SIZE (to) > GET_MODE_SIZE (from))
+    return true;
+
+  return false;
+}
+
+/* Returns TRUE if it is a good idea to tie two pseudo registers
+   when one has mode MODE1 and one has mode MODE2.
+   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
+   for any hard reg, then this must be FALSE for correct output.
+   
+   We should return FALSE for QImode and HImode because these modes
+   are not ok in the floating-point registers.  However, this prevents
+   tieing these modes to SImode and DImode in the general registers.
+   So, this isn't a good idea.  We rely on HARD_REGNO_MODE_OK and
+   CANNOT_CHANGE_MODE_CLASS to prevent these modes from being used
+   in the floating-point registers.  */
+
+bool
+pa_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2)
+{
+  /* Don't tie modes in different classes.  */
+  if (GET_MODE_CLASS (mode1) != GET_MODE_CLASS (mode2))
+    return false;
+
+  return true;
+}
+
 #include "gt-pa.h"
Index: config/pa/pa.h
===================================================================
--- config/pa/pa.h	(revision 130717)
+++ config/pa/pa.h	(working copy)
@@ -349,7 +349,7 @@
    If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
    for any hard reg, then this must be 0 for correct output.  */
 #define MODES_TIEABLE_P(MODE1, MODE2) \
-  (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
+  pa_modes_tieable_p (MODE1, MODE2)
 
 /* Specify the registers used for certain standard purposes.
    The values of these macros are register numbers.  */
@@ -497,17 +497,6 @@
 #define MAYBE_FP_REG_CLASS_P(CLASS) \
   reg_classes_intersect_p ((CLASS), FP_REGS)
 
-/* On the PA it is not possible to directly move data between
-   GENERAL_REGS and FP_REGS.  On the 32-bit port, we use the
-   location at SP-16.  We don't expose this location in the RTL to
-   avoid scheduling related problems.  For example, the store and
-   load could be separated by a call to a pure or const function
-   which has no frame and uses SP-16.  */
-#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)			\
-  (TARGET_64BIT								\
-   && (MAYBE_FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2)		\
-       || MAYBE_FP_REG_CLASS_P (CLASS2) != FP_REG_CLASS_P (CLASS1)))
-
 \f
 /* Stack layout; function entry, exit and calling.  */
 
@@ -1116,6 +1105,24 @@
    && REG_OK_FOR_BASE_P (XEXP (OP, 0))			\
    && GET_CODE (XEXP (OP, 1)) == UNSPEC)
 
+/* Nonzero if 14-bit offsets can be used for all loads and stores.
+   This is not possible when generating PA 1.x code as floating point
+   loads and stores only support 5-bit offsets.  Note that we do not
+   forbid the use of 14-bit offsets in GO_IF_LEGITIMATE_ADDRESS.
+   Instead, we use pa_secondary_reload() to reload integer mode
+   REG+D memory addresses used in floating point loads and stores.
+
+   FIXME: the ELF32 linker clobbers the LSB of the FP register number
+   in PA 2.0 floating-point insns with long displacements.  This is
+   because R_PARISC_DPREL14WR and other relocations like it are not
+   yet supported by GNU ld.  For now, we reject long displacements
+   on this target.  */
+
+#define INT14_OK_STRICT \
+  (TARGET_SOFT_FLOAT                                                   \
+   || TARGET_DISABLE_FPREGS                                            \
+   || (TARGET_PA_20 && !TARGET_ELF32))
+
 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
    and check its validity for a certain class.
    We have two alternate definitions for each of them.
@@ -1134,16 +1141,18 @@
 /* Nonzero if X is a hard reg that can be used as an index
    or if it is a pseudo reg.  */
 #define REG_OK_FOR_INDEX_P(X) \
-(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
+  (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
+
 /* Nonzero if X is a hard reg that can be used as a base reg
    or if it is a pseudo reg.  */
 #define REG_OK_FOR_BASE_P(X) \
-(REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
+  (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
 
 #else
 
 /* Nonzero if X is a hard reg that can be used as an index.  */
 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
+
 /* Nonzero if X is a hard reg that can be used as a base reg.  */
 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
 
@@ -1195,12 +1204,8 @@
 
    We treat a SYMBOL_REF as legitimate if it is part of the current
    function's constant-pool, because such addresses can actually be
-   output as REG+SMALLINT. 
+   output as REG+SMALLINT.  */
 
-   Note we only allow 5-bit immediates for access to a constant address;
-   doing so avoids losing for loading/storing a FP register at an address
-   which will not fit in 5 bits.  */
-
 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
 
@@ -1227,7 +1232,8 @@
   ((TARGET_64BIT && (MODE) == DImode)					\
    || (MODE) == SImode							\
    || (MODE) == HImode							\
-   || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))
+   || (MODE) == SFmode							\
+   || (MODE) == DFmode)
 
 /* These are the modes that we allow for unscaled indexing.  */
 #define MODE_OK_FOR_UNSCALED_INDEXING_P(MODE) \
@@ -1235,7 +1241,8 @@
    || (MODE) == SImode							\
    || (MODE) == HImode							\
    || (MODE) == QImode							\
-   || (!TARGET_SOFT_FLOAT && ((MODE) == DFmode || (MODE) == SFmode)))
+   || (MODE) == SFmode							\
+   || (MODE) == DFmode)
 
 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
 {									\
@@ -1269,20 +1276,10 @@
 			   || (INTVAL (index) % 8) == 0))		\
 		   /* Similarly, the base register for SFmode/DFmode	\
 		      loads and stores with long displacements must	\
-		      be aligned.					\
-									\
-		      FIXME: the ELF32 linker clobbers the LSB of	\
-		      the FP register number in PA 2.0 floating-point	\
-		      insns with long displacements.  This is because	\
-		      R_PARISC_DPREL14WR and other relocations like	\
-		      it are not supported.  For now, we reject long	\
-		      displacements on this target.  */			\
+		      be aligned.  */					\
 		   || (((MODE) == SFmode || (MODE) == DFmode)		\
-		       && (TARGET_SOFT_FLOAT				\
-			   || (TARGET_PA_20				\
-			       && !TARGET_ELF32				\
-			       && (INTVAL (index)			\
-				   % GET_MODE_SIZE (MODE)) == 0)))))	\
+		       && INT14_OK_STRICT				\
+		       && (INTVAL (index) % GET_MODE_SIZE (MODE)) == 0))) \
 	       || INT_5_BITS (index)))					\
 	goto ADDR;							\
       if (!TARGET_DISABLE_INDEXING					\
@@ -1382,7 +1379,7 @@
   rtx new, temp = NULL_RTX;						\
 									\
   mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT				\
-	  ? (TARGET_PA_20 && !TARGET_ELF32 ? 0x3fff : 0x1f) : 0x3fff);	\
+	  ? (INT14_OK_STRICT ? 0x3fff : 0x1f) : 0x3fff);		\
 									\
   if (optimize && GET_CODE (AD) == PLUS)				\
     temp = simplify_binary_operation (PLUS, Pmode,			\
@@ -1404,9 +1401,10 @@
 	newoffset = offset & ~mask;					\
 									\
       /* Ensure that long displacements are aligned.  */		\
-      if (!VAL_5_BITS_P (newoffset)					\
-	  && GET_MODE_CLASS (MODE) == MODE_FLOAT)			\
-	newoffset &= ~(GET_MODE_SIZE (MODE) -1);			\
+      if (mask == 0x3fff						\
+	  && (GET_MODE_CLASS (MODE) == MODE_FLOAT			\
+	      || (TARGET_64BIT && (MODE) == DImode)))			\
+	newoffset &= ~(GET_MODE_SIZE (MODE) - 1);			\
 									\
       if (newoffset != 0 && VAL_14_BITS_P (newoffset))			\
 	{								\
Index: config/pa/pa32-regs.h
===================================================================
--- config/pa/pa32-regs.h	(revision 130717)
+++ config/pa/pa32-regs.h	(working copy)
@@ -172,8 +172,7 @@
 #define VALID_FP_MODE_P(MODE)						\
   ((MODE) == SFmode || (MODE) == DFmode					\
    || (MODE) == SCmode || (MODE) == DCmode				\
-   || (MODE) == QImode || (MODE) == HImode || (MODE) == SImode		\
-   || (TARGET_PA_11 && (MODE) == DImode))
+   || (MODE) == SImode || (TARGET_PA_11 && (MODE) == DImode))
 
 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
 
@@ -288,6 +287,11 @@
   {0x00000000, 0x00000000, 0x01000000},	/* SHIFT_REGS */		\
   {0xfffffffe, 0xffffffff, 0x01ffffff}}	/* ALL_REGS */
 
+/* Defines invalid mode changes.  */
+
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+  pa_cannot_change_mode_class (FROM, TO, CLASS)
+
 /* Return the class number of the smallest class containing
    reg number REGNO.  This could be a conditional expression
    or could index an array.  */
Index: config/pa/pa64-regs.h
===================================================================
--- config/pa/pa64-regs.h	(revision 130717)
+++ config/pa/pa64-regs.h	(working copy)
@@ -156,8 +156,7 @@
 #define VALID_FP_MODE_P(MODE)						\
   ((MODE) == SFmode || (MODE) == DFmode					\
    || (MODE) == SCmode || (MODE) == DCmode				\
-   || (MODE) == QImode || (MODE) == HImode || (MODE) == SImode		\
-   || (MODE) == DImode)
+   || (MODE) == SImode || (MODE) == DImode)
 
 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
    On the HP-PA, the cpu registers can hold any mode.  We
@@ -242,18 +241,11 @@
   {0x00000000, 0x10000000},	/* SHIFT_REGS */		\
   {0xfffffffe, 0x1fffffff}}	/* ALL_REGS */
 
-/* Defines invalid mode changes.
+/* Defines invalid mode changes.  */
 
-   SImode loads to floating-point registers are not zero-extended.
-   The definition for LOAD_EXTEND_OP specifies that integer loads
-   narrower than BITS_PER_WORD will be zero-extended.  As a result,
-   we inhibit changes from SImode unless they are to a mode that is
-   identical in size.  */
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+  pa_cannot_change_mode_class (FROM, TO, CLASS)
 
-#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)		\
-  ((FROM) == SImode && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)       \
-   ? reg_classes_intersect_p (CLASS, FP_REGS) : 0)
-
 /* Return the class number of the smallest class containing
    reg number REGNO.  This could be a conditional expression
    or could index an array.  */

^ permalink raw reply	[flat|nested] 504+ messages in thread
[parent not found: <no.id@sources.redhat.com>]

end of thread, other threads:[~2010-03-27 21:48 UTC | newest]

Thread overview: 504+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <no.id>
1998-12-12 19:15 ` Problem with put_reg_into_stack H.J. Lu
1999-08-06 12:06 ` Internal compiler error in `emit_call_1' - vax-dec-ultrix4.3 John David Anglin
1999-08-25  0:38   ` Jeffrey A Law
1999-08-31 22:41     ` Jeffrey A Law
1999-08-31 22:41   ` John David Anglin
2000-04-28 13:32 ` g++-mike-eh8-C test failure John David Anglin
2000-04-28 15:41   ` John David Anglin
2000-04-30  8:47     ` John David Anglin
2000-05-02  9:30       ` Jeffrey A Law
2000-05-02 11:08         ` John David Anglin
2000-05-02 11:17           ` Jeffrey A Law
2000-05-02 13:02             ` John David Anglin
2000-05-02 18:44               ` Jason Merrill
2000-05-03 10:43                 ` John David Anglin
2000-05-03 15:49                   ` Jason Merrill
2000-05-03 17:27                     ` John David Anglin
2000-05-05 15:12                     ` John David Anglin
2000-05-08 11:10             ` John David Anglin
2000-05-18 11:19 ` VAX Ultrix bootstrap failure: Cannot allocate 4072 bytes John David Anglin
2000-05-18 15:48   ` Jeffrey A Law
2000-05-22  9:45 ` VAX Ultrix bootstrap failure: cc: -o would overwrite John David Anglin
2000-05-22 17:22 ` John David Anglin
2000-05-24 10:32 ` VAX Ultrix bootstrap failure with gcc-2.96 John David Anglin
2000-05-24 11:37   ` Zack Weinberg
2000-05-24 13:08     ` John David Anglin
2000-05-25 18:31       ` Zack Weinberg
2000-05-25 19:21         ` John David Anglin
2000-05-25 19:35           ` Zack Weinberg
2000-05-25 20:05             ` John David Anglin
2000-05-25 20:33               ` Zack Weinberg
2000-06-02 10:31             ` John David Anglin
2000-05-24 14:09     ` John David Anglin
2000-05-24 18:50       ` Jeffrey A Law
     [not found] ` <200005272138.RAA08789@hiauly1.hia.nrc.ca>
2000-05-27 20:19   ` VAX Ultrix bootstrap with gcc-2.96 20000519: genrecog failure Richard Henderson
2000-05-28 11:00     ` John David Anglin
2000-06-02 12:15 ` VAX Ultrix bootstrap failure with gcc-2.96 John David Anglin
2000-06-02 13:09   ` John David Anglin
2000-06-12  8:18 ` Evaluation order of &&s in ||, in macro INDEX_TERM_P, in vax.h John David Anglin
2000-06-13  8:55   ` Jeffrey A Law
2000-06-20  9:55 ` VAX Ultrix bootstrap failure with gcc-2.96 John David Anglin
2000-06-20 11:13   ` Bruce Korb
2000-06-29  9:50 ` collect2: ld terminated with signal 10 [Bus error] John David Anglin
2000-06-30 11:13   ` Jeffrey A Law
2000-08-30 18:03 ` Patches: Re: libio testsuite: timeout compiling tFile.cc John David Anglin
2000-09-01 13:29 ` Patch: Re: objc FAILs under hpux/-threads with gcc-2.96 CVS 20000816 John David Anglin
2000-09-01 22:22   ` Ovidiu Predescu
2000-09-05 11:25     ` Another patch: Re: objc FAILs under hpux/-threads with gcc-2.96 CVS John David Anglin
2000-09-06  0:01       ` Ovidiu Predescu
2000-09-08 10:29 ` Unsatisfied symbols: cpp_register_pragma (code), cpp_register_pragma_space (code) John David Anglin
2000-09-08 10:38   ` Zack Weinberg
2000-09-08 10:43     ` John David Anglin
2000-09-08 11:02       ` Zack Weinberg
2000-09-08 17:15 ` Segmentation fault building libg++ without named returns John David Anglin
2000-09-08 23:06   ` John David Anglin
2000-09-09  6:14     ` Manfred Hollstein
2000-09-09 15:06       ` John David Anglin
2000-09-10  2:55         ` Manfred Hollstein
2000-09-11 13:35           ` John David Anglin
2000-09-11 14:25 ` John David Anglin
2000-09-14  5:45   ` libg++-2.8.1.3-20000914.diff.gz (was: Re: Segmentation fault building libg++ without named returns) Manfred Hollstein
2000-09-21  9:50     ` John David Anglin
2000-09-22 11:06 ` Patch: Include WARN_CFLAGS in CFLAGS passed for building fixinc.sh John David Anglin
2000-09-29 11:12 ` PATCH: Re: libio compilation problem John David Anglin
2000-10-16 13:21 ` PATCH: Upgrade floating comparisons on PA to support unordered operands John David Anglin
2000-11-09  9:40 ` testcase for hppa64 gcc bug John David Anglin
2000-11-09 16:17   ` Alan Modra
2000-12-05 20:11   ` Jeffrey A Law
2000-12-05 20:15     ` John David Anglin
2000-12-05 21:28       ` Alan Modra
2001-01-31 17:17         ` Jeffrey A Law
2000-11-25 17:39 ` PATCH: Re: ../../../libio/stream.cc:60: Internal error: Segmentation fault John David Anglin
2000-11-25 17:40   ` John David Anglin
2000-11-29 21:48     ` Jeffrey A Law
2000-11-30 12:16 ` PATCH: HUGE_VAL should be Infinity John David Anglin
2000-12-03 21:14   ` Jeffrey A Law
2000-12-04 10:52     ` Michael Meissner
2000-12-04 11:25       ` John David Anglin
2000-12-04 11:35         ` Jeffrey A Law
2000-12-06 18:05         ` Jeffrey A Law
2000-12-18 14:18 ` Revised patch: Re: PATCH 1: Re: BOOTSTRAP FAILURE: segementation fault in genattrtab John David Anglin
2000-12-20 19:56 ` V3 PATCH: Some complex<> cleanup (1/2) Robert Lipe
2000-12-20 20:09   ` Benjamin Kosnik
2000-12-20 21:24     ` Robert Lipe
2000-12-20 21:59     ` Robert Lipe
2000-12-20 22:08       ` Benjamin Kosnik
2000-12-20 20:14   ` Gabriel Dos Reis
2000-12-28 22:29 ` problem with target builtin functions Herman ten Brugge
2001-01-14 14:39 ` PATCH: PIC_OFFSET_TABLE_REGNUM_SAVED should be call used when John David Anglin
2001-01-14 17:00   ` Alan Modra
2001-01-14 17:31     ` John David Anglin
2001-01-23  8:32 ` pa.md bugfix John David Anglin
2001-01-24 17:32 ` John David Anglin
2001-01-27 13:46   ` John David Anglin
2001-01-29 21:18     ` Jeffrey A Law
2001-02-15 11:33 ` [PATCH] Re: REG_DEAD/REG_EQUIV problem John David Anglin
2001-02-16 17:10   ` John David Anglin
2001-03-01 17:31 ` Enum related fixes for gcc build with native cc on vax ultrix John David Anglin
2001-03-01 17:51   ` Richard Henderson
2001-03-02 15:47     ` John David Anglin
2001-03-04 10:28     ` John David Anglin
2001-03-04 11:20       ` Richard Henderson
2001-03-04 10:11 ` cpplib: basename () fix John David Anglin
2001-03-04 17:11 ` Enum fix to cplus-dem.c for gcc build with native cc on vax ultrix John David Anglin
2001-03-06 10:07 ` cpplib: basename () fix John David Anglin
2001-03-06 10:29   ` DJ Delorie
2001-03-06 10:32   ` Zack Weinberg
2001-03-06 10:52     ` John David Anglin
2001-03-06 11:16       ` DJ Delorie
2001-03-06 14:46 ` Patch for wrong number of arguments in call to smallest_mode_for_size John David Anglin
2001-03-16 21:50 ` Patch to rtx_varies_p to improve pic code on PA John David Anglin
2001-04-05 13:41 ` f/ansify.c uses ANSI features John David Anglin
2001-04-12 21:08 ` Sign extension of type with precision of 0 causes fault in force_fit_type John David Anglin
2001-04-14 14:20 ` Where's the axe? Can't walk_tree John David Anglin
2001-04-23 17:02   ` .stabs statements refer to symbol not in source John David Anglin
2001-04-23 17:57     ` John David Anglin
2001-04-21 19:33 ` C++ Issue on GCC 3.0 branch John David Anglin
2001-04-23  2:18   ` Bernd Schmidt
2001-04-23  7:51     ` law
2001-04-23  7:55       ` Bernd Schmidt
2001-04-23  7:56       ` Bernd Schmidt
2001-04-23  8:14         ` law
2001-04-25 10:26   ` Mark Mitchell
2001-04-25 14:04     ` John David Anglin
2001-04-25 17:31       ` Mark Mitchell
2001-04-26  8:32         ` John David Anglin
2001-04-26 10:25           ` Mark Mitchell
2001-04-26 10:02         ` law
2001-05-03  9:57 ` PATCH: Re: jartool.c:539: undefined reference to `strdup' John David Anglin
2001-05-03 10:13   ` Alexandre Oliva
2001-05-03 10:37     ` John David Anglin
2001-05-03 10:53       ` Alexandre Oliva
2001-05-03 10:43     ` Tom Tromey
2001-05-03 11:26     ` John David Anglin
2001-05-03 13:22       ` Tom Tromey
2001-05-03 15:10         ` John David Anglin
2001-05-11 18:32 ` Disappearing labels fix John David Anglin
2001-05-18  8:58   ` John David Anglin
2001-05-18  9:07     ` law
2001-05-14 10:18 ` PATCH: Fix toplev.c breakage on PA after eh merge John David Anglin
2001-05-16 13:27 ` PATCH (revised): " John David Anglin
2001-06-04 10:53 ` PATCH: fix argument promotion John David Anglin
2001-06-09  9:37 ` [v3] build failure from automated checker John David Anglin
2001-06-09 11:44   ` Benjamin Kosnik
2001-06-09 11:55     ` John David Anglin
2001-06-09 12:00       ` Benjamin Kosnik
2001-06-13 16:04         ` John David Anglin
2001-06-13 20:22           ` Alexandre Oliva
2001-06-13 20:49             ` Bruce Korb
2001-06-13 21:41               ` Mark Mitchell
2001-06-13 23:03                 ` Alexandre Oliva
2001-06-13 20:52             ` Bruce Korb
2001-06-13 21:23               ` Alexandre Oliva
2001-06-09 16:57       ` Gabriel Dos Reis
2001-06-09 21:34         ` John David Anglin
2001-06-09 23:22           ` Benjamin Kosnik
2001-06-09 21:21 ` PATCH: gthr-dce.h update for v3 thread compatibility John David Anglin
2001-06-14 18:38 ` PATCH: Fix invalid loader fixups from shared libobjc with John David Anglin
2001-07-10 13:33 ` LO_SUM still breaking rs6000, revert patch? John David Anglin
2001-08-09 14:46 ` ../../gcc/java/class.c:1882: `JCR_SECTION_NAME' undeclared in emit_register_classes John David Anglin
2001-08-09 16:13   ` Richard Henderson
2001-08-09 15:12 ` Simple returns are broken in gcc 3.X John David Anglin
2001-08-09 15:48   ` Richard Henderson
2001-08-22  8:50 ` fix execute/20010518-2.c John David Anglin
2001-08-23 22:55 ` John David Anglin
2001-08-23 22:57   ` Richard Henderson
2001-08-26 14:28     ` as: error 7403: undefined label - _ZTVN10__cxxabiv120__si_class_type_infoE [was Re: fix execute/20010518-2.c] John David Anglin
2001-09-05 22:59 ` CVS Problem: java/parse.c and java/parse-scan.c deleted John David Anglin
2001-09-22 11:35 ` PATCH: pass outgoing float arguments in both floating and general registers in indirect calls using 32 bit ABI John David Anglin
2001-09-24  8:47   ` law
2001-09-24 14:19 ` tiny tree.c update John David Anglin
2001-09-25  5:35   ` Jan Hubicka
2001-09-25  6:54     ` John David Anglin
2001-10-03 12:08 ` PATCH: Check all insns in fallthru to see if label is mentioned John David Anglin
2001-12-04 17:46   ` Richard Henderson
2001-12-08  9:23     ` John David Anglin
2001-12-09 16:12       ` Richard Henderson
2001-10-31 10:39 ` PATCH: Use PLUS instead of HIGH/LO_SUM for large constants - take 2 for PA John David Anglin
2001-11-09 16:21   ` law
2001-11-13  5:27     ` law
2001-11-13 15:03     ` law
2001-11-13 15:03 ` Last alignment change for MEM tracking John David Anglin
2001-11-21 16:04 ` C++ pcc struct return fix John David Anglin
2001-11-30 19:36   ` John David Anglin
2001-12-03  2:52   ` Jason Merrill
2001-12-03  8:40     ` John David Anglin
2001-12-03  8:52       ` Mark Mitchell
2001-12-03 15:19         ` John David Anglin
2001-12-07 11:30           ` Mark Mitchell
2001-12-07 20:55             ` John David Anglin
2001-12-08  3:04               ` Jason Merrill
2001-12-08  9:12                 ` John David Anglin
2001-12-03 10:41       ` Jason Merrill
2001-12-03 11:54         ` John David Anglin
2001-12-01 11:48 ` HPUX 11 "size_t" fixinc problems John David Anglin
2001-12-03 10:37   ` Bruce Korb
2001-12-17 12:39     ` John David Anglin
2001-12-03 14:20 ` Unreviewed C++ patch for PA (HP assembler) John David Anglin
2001-12-03 14:49   ` Benjamin Kosnik
2001-12-04  8:25   ` Jason Merrill
2001-12-04  9:18     ` John David Anglin
2001-12-08  9:29     ` John David Anglin
2001-12-09 19:25       ` Jason Merrill
2001-12-09 19:27       ` Phil Edwards
2001-12-09 14:55 ` PATCH: Check all insns in fallthru to see if label is mentioned John David Anglin
2002-01-08 20:57 ` fix aix -fcprop-register miscompilation John David Anglin
2002-01-10  9:33 ` PATCH: more portable way to fix g77.f-torture/execute/io1.f (was Re: [PATCH] alias.c find_base_value fix) John David Anglin
2002-01-10 16:38   ` John David Anglin
2002-01-14 15:33     ` Toon Moene
2002-01-15 15:35 ` PATCH: Re: ICE in 920624-1.c with -O3 -funroll-loops on vax-dec-ultrix4.3 John David Anglin
2002-01-15 19:31   ` Richard Henderson
2002-01-15 20:27     ` John David Anglin
2002-02-04 16:04     ` John David Anglin
2002-02-04 16:31       ` Richard Henderson
2002-02-04 17:39         ` law
2002-02-04 18:23           ` Richard Henderson
2002-02-04 21:21             ` law
2002-02-04 22:10               ` PATCH: Re: ICE in 920624-1.c with -O3 -funroll-loops on John David Anglin
2002-02-05  0:06                 ` law
2002-02-05  7:34                   ` Jan Hubicka
2002-02-05  8:50                     ` law
2002-02-05 10:40                       ` Jan Hubicka
2002-02-05  6:01                 ` Jan Hubicka
2002-02-05  0:33               ` PATCH: Re: ICE in 920624-1.c with -O3 -funroll-loops on vax-dec-ultrix4.3 Richard Henderson
2002-02-05  0:11                 ` law
2002-02-05  7:08                 ` Jan Hubicka
2002-02-05  7:58                   ` law
2002-02-05  9:32                   ` Richard Henderson
2002-02-05 10:52                     ` Jan Hubicka
2002-02-04 18:01       ` law
2002-01-16  8:53   ` Jan Hubicka
2002-01-16  9:09     ` John David Anglin
2002-01-16  9:58       ` Jan Hubicka
2002-01-21 13:02 ` Fix ld_library_path in g77.exp for hppa64-hp-hpux11.X John David Anglin
2002-01-21 15:22 ` Fix predicate in decrement_and_branch_until_zero pattern on PA John David Anglin
2002-01-21 15:24   ` Richard Henderson
2002-01-21 15:29     ` law
2002-01-21 16:24       ` Richard Henderson
2002-01-21 15:32     ` John David Anglin
2002-01-21 16:27       ` Richard Henderson
2002-01-21 21:58         ` John David Anglin
2002-01-21 22:21           ` Richard Henderson
2002-01-21 22:48         ` John David Anglin
2002-01-22 23:30 ` PATCH: Fix loop.c for targets without HAVE_prefetch John David Anglin
2002-01-23 12:15   ` H . J . Lu
2002-01-28  9:28 ` gcc failed to bootstrap on Linux/mipsel John David Anglin
2002-01-28 11:10   ` Richard Henderson
2002-01-28 11:18     ` John David Anglin
2002-01-28 11:19       ` Richard Henderson
2002-01-28 11:39         ` John David Anglin
2002-01-28 12:07           ` Richard Henderson
2002-01-28 16:04             ` John David Anglin
2002-01-28 17:00               ` Richard Henderson
2002-02-04 13:02 ` Define _GNU_SOURCE in unwind-dw2-fde-glibc.c John David Anglin
2002-02-04 13:43   ` Richard Henderson
2002-02-05 21:17 ` Add missing predicate to PREDICATE_CODES on PA John David Anglin
2002-02-05 23:20   ` Graham Stott
2002-02-06  9:06     ` John David Anglin
2002-02-10 12:30     ` John David Anglin
2002-02-16 16:12 ` Don't use lib2funcs.asm " John David Anglin
2002-02-16 17:56   ` law
2002-02-16 19:45     ` John David Anglin
2002-02-17  9:02       ` law
2002-02-17 11:29         ` John David Anglin
2002-02-18  3:21           ` Olivier Hainque
2002-02-18  9:26             ` John David Anglin
2002-02-18 10:23               ` Olivier Hainque
2002-02-18 10:27                 ` John David Anglin
2002-02-19  2:35                   ` Olivier Hainque
2002-02-18 12:18           ` Hans-Peter Nilsson
2002-02-18 12:30 ` John David Anglin
2002-02-19  2:24   ` Olivier Hainque
2002-03-13  8:34 ` fix for strct-pack-1.c regressions John David Anglin
2002-03-28 15:44 ` Letext John David Anglin
2002-05-08 13:54 ` [PATCH] checking version of rtl flag access macros John David Anglin
2002-06-03 14:02 ` [PATCH] Jump bypassing and improved cprop (take 2) John David Anglin
2002-06-04  6:31   ` law
2002-06-04  6:45     ` Jan Hubicka
2002-06-04  9:09       ` John David Anglin
2002-06-04  9:12         ` Jan Hubicka
2002-06-05 21:30           ` John David Anglin
2002-06-05 23:19             ` law
2002-06-05 14:23 ` Patch: Use tm_defines to configure default scheduling model on PA John David Anglin
2002-06-12 10:03 ` John David Anglin
2002-06-12 10:23   ` DJ Delorie
2002-06-12 10:51     ` John David Anglin
2002-06-12 11:17       ` DJ Delorie
2002-06-12 11:47         ` John David Anglin
2002-06-12 12:01           ` DJ Delorie
2002-06-12 13:01             ` John David Anglin
2002-06-15 11:04     ` John David Anglin
2002-06-18 16:01 ` [PATCH/RFA] Allow register other than SP for DWARF2 CFA John David Anglin
2002-06-24 12:48 ` PATH: inline does not work with -O3 specified Herman ten Brugge
2002-06-30 16:59   ` Michael Hayes
2002-07-11 12:17 ` PATCH: Fix failure of arith-rand-ll.c on hppa 32-bit targets John David Anglin
2002-08-02 22:10 ` [RFA] Fix libsupc++/Makefile.in John David Anglin
2002-08-02 23:49   ` Neil Booth
2002-08-21  9:31 ` PATCH: fix warning and return value for remove_dup_nonsys_dirs John David Anglin
2002-08-21 10:13   ` Zack Weinberg
2002-08-31  9:24 ` 128 bit floats on PA64 John David Anglin
2002-09-23 11:53 ` Patch for PR c/4319 John David Anglin
2002-09-30 21:03 ` PATCH for sibcalls on i386 John David Anglin
2002-10-21 15:48 ` [PATCH] Inline __udiv_w_sdiv into __divdi3 etc John David Anglin
2002-10-24 12:51 ` Reload patch for PA call rewrite John David Anglin
2002-10-24 16:26 ` John David Anglin
2002-10-25  8:54   ` Jeff Law
2002-10-25 10:10     ` John David Anglin
2002-10-30 19:23 ` Call rewrite for PA John David Anglin
2002-11-09 15:18 ` C++ PATCH: ABI bug for vcall offsets John David Anglin
2002-11-09 15:27   ` John David Anglin
2002-11-10 18:21   ` Mark Mitchell
2002-11-10 19:42     ` John David Anglin
2002-11-13 13:12 ` gcc-64 20021111 broken on HP-UX 11.00 John David Anglin
2002-11-26 11:28 ` Unreviewed patch John David Anglin
2002-11-26 15:53 ` PATCH: Fix handling of return values handled in PARALLELs John David Anglin
2002-11-26 17:58   ` Richard Henderson
2002-11-26 19:52 ` clean up some hook routines John David Anglin
2002-12-04 14:22 ` HP-UX PA long double alignment change John David Anglin
2002-12-04 14:31   ` Steve Ellcey
2002-12-04 18:14 ` John David Anglin
2003-01-17 17:15 ` [PATCH] Fix RTL sharing problem in CSE John David Anglin
2003-01-17 17:24   ` law
2003-01-17 18:25     ` Jan Hubicka
2003-01-17 18:59       ` Roger Sayle
2003-01-17 22:33         ` David Edelsohn
2003-01-17 23:56           ` Dale Johannesen
2003-01-17 22:46         ` law
2003-01-19 16:59 ` [PATCH]: Fix ICE in convert_move on PA John David Anglin
2003-01-20 17:31   ` Richard Henderson
2003-01-24  3:44 ` [PATCH] Fix find_reloads_address bug, take 2 Ulrich Weigand
2003-02-01 21:40 ` ping: Unreviewed patch to fix patch to fix bootstrap failure on PA John David Anglin
2003-02-01 21:43   ` Zack Weinberg
2003-02-02  0:23   ` Geoff Keating
2003-02-03  5:02 ` hppa-linux regressions and 3.2.2 release John David Anglin
2003-02-03 11:03   ` Gabriel Dos Reis
2003-02-03 16:26   ` John David Anglin
2003-02-03 16:54     ` Gabriel Dos Reis
2003-02-03 18:02       ` John David Anglin
2003-02-04 21:20 ` Mainline bootstrap failure on hppa2.0w-hp-hpux11.00 John David Anglin
2003-02-05 18:21 ` John David Anglin
2003-02-05 18:46 ` John David Anglin
2003-02-05 19:12   ` Kaveh R. Ghazi
2003-02-11 19:37 ` Bootstrap failure on hppa-unknown-linux-gnu, trunk John David Anglin
2003-02-11 22:37   ` Josef Zlomek
2003-02-11 22:51     ` John David Anglin
2003-03-05 22:00   ` Josef Zlomek
2003-03-05 22:03     ` Josef Zlomek
2003-03-11  2:04 ` jcf-io.c:339: warning: `origsep' might be used uninitialized John David Anglin
2003-03-21  0:02 ` [PATCH]: PA long unconditional branch generation (PR10062) John David Anglin
2003-04-10 19:52 ` Failure of test07 in 27_io/filebuf_members.cc under HP-UX (PR 9964) John David Anglin
2003-04-11  1:22   ` Benjamin Kosnik
2003-04-18 16:32 ` PATCH: Fix PR 8866 John David Anglin
2003-05-10  2:15 ` [PATCH] allow zero_extract combines - checked in John David Anglin
2003-05-12  2:26   ` Eric Christopher
2003-05-12  2:43     ` John David Anglin
2003-05-12  9:11       ` Eric Christopher
2003-05-12 16:50   ` Eric Christopher
2003-05-12 17:05     ` John David Anglin
2003-05-12 17:13       ` Eric Christopher
2003-05-12 17:59         ` John David Anglin
2003-05-12 18:03           ` Eric Christopher
2003-05-23  1:17 ` speedup collect2 (by not using it) John David Anglin
2003-06-19 22:29 ` [PATCH] Fix PCH failures on SPARC John David Anglin
2003-06-20 19:12 ` Hookize CFG debugging code John David Anglin
2003-06-20 19:35   ` Jan Hubicka
2003-06-20 20:47 ` [PATCH]: Fix label replacement in REG_NOTES John David Anglin
2003-07-03 20:17 ` Bootstrap failure compiling ada/misc.c John David Anglin
2003-07-04 17:54 ` [Boehm-GC] Limit +ESdbgasm to HPUX cc on PA John David Anglin
2003-07-04 18:16   ` Tom Tromey
2003-07-04 18:37     ` John David Anglin
2003-07-04 20:24 ` Unreviewed fix for bootstrap failure John David Anglin
2003-10-06 16:53 ` [PATCH] Bootstrap failure due to reload bug Ulrich Weigand
2003-11-01 23:48 ` [PATCH] Fix AMD64 handling of functions with huge stack frames (take 2) John David Anglin
2004-01-22 21:43 ` [PATCH] Optimize subregs of zero and sign extensions " John David Anglin
2004-02-28  5:22 ` [patch] do not disregard LD_LIBRARY_PATH for c++, g77 and objc tests John David Anglin
2004-02-28 18:12   ` Geoff Keating
2004-02-28 18:30     ` Eric Botcazou
2004-04-16 22:12 ` [committed 3.5] Tweak xfail for gcc.dg/const-elim-1.c John David Anglin
2004-04-17 19:09   ` Mark Mitchell
2004-04-18 22:01 ` [patch 3.3/3.4/3.5] Fix PR bootstrap/14671 John David Anglin
2004-04-18 22:51   ` Mark Mitchell
2004-04-18 23:04     ` John David Anglin
2004-04-19  3:24 ` John David Anglin
2004-04-19  3:27   ` Mark Mitchell
2004-04-19  5:30   ` Zdenek Dvorak
2004-04-19 13:58     ` John David Anglin
2004-04-19 14:49     ` Mark Mitchell
2004-04-19 15:01       ` Zdenek Dvorak
2004-04-19 16:22         ` John David Anglin
2004-04-19 17:45           ` Zdenek Dvorak
2004-04-19 19:57         ` John David Anglin
2004-04-19 20:03           ` Andrew Pinski
2004-04-20 16:05             ` John David Anglin
2004-04-21 19:07               ` Mark Mitchell
2004-04-21 21:44               ` Richard Henderson
2004-04-22 20:38                 ` Gabriel Dos Reis
2004-04-21 19:23 ` [committed 3.5] Fix DBX register numbering for hppa64 John David Anglin
2004-04-22 17:25   ` Mark Mitchell
2004-04-22 17:40     ` John David Anglin
2004-04-25 16:00 ` [PATCH] Re: Fix problem with constant modulus John David Anglin
2004-04-25 22:17 ` [ping] Unreviewed patch John David Anglin
2004-04-27 23:34   ` Mark Mitchell
2004-05-04  0:50 ` [PATCH] Ulrich Weigand
2004-05-04  0:52   ` [PATCH] Eric Christopher
2004-06-04 15:56 ` building sh-elf / sh-linux (Was: Re: [PATCH/RFA] PR target/13250) Joern Rennecke
2004-06-04 18:25   ` Joern Rennecke
2004-07-07 21:10 ` [PATCH] Fix PR target/16344 John David Anglin
2004-07-08  5:56   ` Mark Mitchell
2004-07-09 21:01 ` [RFT/RFA] gimplify pa va_arg John David Anglin
2004-07-10 18:38 ` gimple va_arg for hppa John David Anglin
2004-07-11 13:07 ` [PATCH] DWARF-2 unwinder off-by-one problem with signal frames Ulrich Weigand
2004-10-31 20:11 ` [PATCH] Fix PR target/16304: AIX 4.x forward reference proble John David Anglin
2004-11-27 17:39 ` [committed] Fix pch/14940 on hppa-unknown-linux-gnu John David Anglin
2004-11-28 20:24 ` [ping] Fix PR target/16304: AIX 4.x forward reference problem John David Anglin
2004-12-05  0:01 ` [patch] Fix for PR 14838 John David Anglin
2004-12-05  1:17   ` Richard Henderson
2004-12-05  5:18   ` Gabriel Dos Reis
2004-12-27  2:57 ` [committed] Fix PR target/17643 on main and 3.4, and 3.3 John David Anglin
2005-01-21  0:25 ` Change to gcc.dg/tree-ssa/loop-1.c John David Anglin
2005-01-21  0:31   ` John David Anglin
2005-01-21  0:43     ` John David Anglin
2005-01-21  0:49       ` Steve Ellcey
2005-01-21 14:57         ` John David Anglin
2005-01-21 16:44           ` Steve Ellcey
2005-01-21 17:42             ` John David Anglin
2005-01-21 20:33               ` Janis Johnson
2005-04-06 16:49 ` [patch] Add Ada tasking support for hppa-unknown-linux-gnu (take 2) John David Anglin
2005-04-29 10:27   ` Arnaud Charlet
2005-04-29 13:43     ` John David Anglin
2005-04-29 15:07       ` Arnaud Charlet
2005-04-29 15:19         ` John David Anglin
2005-04-29 23:41         ` Richard Henderson
2005-05-01 22:52           ` Mark Mitchell
2005-05-02 17:49             ` Florian Weimer
2005-05-02 18:54               ` Mark Mitchell
2005-04-30  0:14     ` John David Anglin
2005-05-02  9:54       ` Arnaud Charlet
2005-05-02 13:40         ` John David Anglin
2005-05-02 13:44           ` Arnaud Charlet
2005-05-02 15:45             ` John David Anglin
2005-05-02 15:48               ` Arnaud Charlet
2005-05-02 16:05                 ` John David Anglin
2005-05-03  8:22                   ` Arnaud Charlet
2005-06-13  1:33         ` John David Anglin
2005-06-13  6:31           ` Arnaud Charlet
2005-06-13 14:16             ` John David Anglin
2005-06-13 15:22               ` Arnaud Charlet
2005-08-20 16:15 ` [patch]: Fix PR testsuite/23239 John David Anglin
2005-12-07  0:52 ` fix post-weakref gthr-*.h on HP-UX (and others?) John David Anglin
2006-01-17  4:54 ` [PING * 2] One line patch John David Anglin
2006-01-17  4:58 ` [committed] Fix PR target/20754: ACATS cxg1005 fails at runtime on hppa-linux John David Anglin
2006-02-05 16:29 ` [committed] Fix PR target/25926: A87B59A SIGABRT John David Anglin
2006-11-18 18:11 ` Ping: [PATCH] Limit precision of *bitsizetypes types John David Anglin
2006-11-18 21:47   ` Roger Sayle
2006-11-18 21:51     ` John David Anglin
2006-11-18 23:27       ` Roger Sayle
2007-01-25 23:55 ` [PATCH, commited] PR other/30182, Fix __builtin_finite on HP-UX John David Anglin
2007-01-26  0:58   ` Steve Ellcey
2007-02-28 10:53 ` [committed] Fix bug target/30634 John David Anglin
2007-03-17  0:31 ` [committed] Fix long local calls on PA HP-UX SOM target John David Anglin
2007-08-27  2:07 ` [patch,testsuite] Fix PR testsuite/33153 John David Anglin
2007-08-27  8:56   ` Jakub Jelinek
2007-08-28  5:31     ` John David Anglin
2007-09-13  2:28     ` John David Anglin
2007-09-13  5:45       ` Mark Mitchell
2007-09-16  9:20 ` ping: [PATCH] Fix PR middle-end/33273 John David Anglin
2007-09-16  9:21   ` Jakub Jelinek
2007-09-16 19:49   ` Richard Guenther
2007-12-10  3:24 ` [committed] [PR target/34091] Secondary reloads for floating-point register classes John David Anglin
2007-12-14  1:57 ` John David Anglin
2007-12-22 11:05 ` [committed] Fix PR target/34525 - unrecognized insn (take 2) John David Anglin
2008-01-18 10:22 ` [ping] Ignore thread local symbols when generating dbx debug info John David Anglin
2008-02-08  2:49   ` John David Anglin
2008-03-05  3:28     ` Jim Wilson
2008-03-08 20:48       ` [ping] Ignore thread local symbols when generating dbx debug John David Anglin
2008-03-10 16:27         ` [Bulk] " Jim Wilson
2008-03-10 16:45           ` [Bulk] Re: [ping] Ignore thread local symbols when generating John David Anglin
2008-03-12  6:32             ` Jim Wilson
2008-02-07  2:32 ` [committed] Remove xfail for hppa*-*-* from g++.dg/tree-ssa/ivopts-1.C John David Anglin
2008-02-09 22:03 ` RFC: Fix PR middle-end/34150 -- Lost LABEL_NUSES counts John David Anglin
2008-08-18 14:23 ` update dwarf2 asm unwind info [hppa64-*-* failures] John David Anglin
2008-08-21 20:10   ` Richard Henderson
2008-08-21 21:28     ` John David Anglin
2008-08-22  0:09       ` Richard Henderson
2008-08-22  3:27         ` John David Anglin
2008-08-22 17:53           ` Richard Henderson
2008-08-22 18:30             ` John David Anglin
2008-08-22 20:57               ` Richard Henderson
2008-08-23 19:46       ` John David Anglin
2008-08-23 21:14         ` John David Anglin
2008-08-24 20:09           ` Richard Henderson
2008-08-24 21:06             ` John David Anglin
2008-08-25  1:42               ` Richard Henderson
2008-08-25  3:31                 ` John David Anglin
2008-08-25  4:57                 ` John David Anglin
2009-08-02 19:35 ` [committed] Fix previous change to pa.c John David Anglin
2009-11-25  3:28 ` [committed] Shorten non PIC PA 1.1 calls on hppa-hpux John David Anglin
2010-03-27 15:44 ` [PATCH] Fix visibility of constructors/destructors with -fwhole-program John David Anglin
2010-03-27 15:52   ` Richard Guenther
2010-03-27 17:53   ` Jan Hubicka
2010-03-27 21:11     ` [PATCH] Fix visibility of constructors/destructors with John David Anglin
2010-03-27 21:48       ` Jan Hubicka
2010-03-27 21:54         ` Richard Guenther
2010-03-28  1:39           ` Jan Hubicka
2007-12-09 20:29 [committed] [PR target/34091] Secondary reloads for floating-point register classes John David Anglin
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