[PATCH 00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1)

[PATCH 00/40] sim+gdb: Suppress warnings if built with Clang (big batch 1)

[Tsukasa OI]

Hi all,

In my environment (Ubuntu 22.04.1 LTS + LLVM Clang 15.0.0/15.0.3), I have
finally managed to build almost default configuration of all-arch Binutils +
GDB ("--enable-targets=all") with Clang and -Werror enabled (by default).

This patchset is what I originally intended to split to multiple parts (in
fact, I submitted several patchsets that are originally a part of this) but
shared here (without splitting) to discuss and share information who wants
to build Binutils + GDB with Clang.

Related components (for review):
-   3 : cpu (Binutils)
    -   PATCH 04/40 (CRIS)
    -   PATCH 05/40 (CRIS)
    -   PATCH 11/40 (FR-V)
-   1 : gdb (GDB)
    -   PATCH 01/40 (same patch as below):
        <https://sourceware.org/pipermail/gdb-patches/2022-October/192802.html>
-  36 : sim (GDB)

Each resolves relatively small issue and/or non-issue (which Clang thinks
it is a problem).


[Credit]

PATCH 16/40 is entirely authored by Andrew Burgess (exactly the same as):
<https://sourceware.org/pipermail/gdb-patches/2022-October/192841.html>


[Limitation]

I only tested this on Linux (x86_64) and with almost default configuration.
My initial submission of gdb patch above confirmed broken on Mac due to
different C++ standard library (fixed though) but I cannot guarantee whether
this patchset is all we need.
So, non-default components and non-default configurations may still have
problems building with Clang (e.g. assemblers except x86).


[Shared Technique: Explicit cast to CGEN_INSN_TYPE]

-   PATCH 07/40: CRIS (in the process of regenerating all files)
-   PATCH 14/40: FR-V
-   PATCH 17/40: LatticeMicro32
-   PATCH 23/40: M32R
-   PATCH 38/40: BPF
-   PATCH 39/40: IQ2000
-   PATCH 40/40: OpenRISC 1000

In CGEN-generated instruction decoder, instruction type has CGEN_INSN_TYPE
values but some contain CGEN_INSN_VIRTUAL_TYPE values.  On such cases,
CGEN_INSN_VIRTUAL_TYPE values must be explicitly converted to CGEN_INSN_TYPE
to prevent build failure caused by Clang warnings ("-Wenum-conversion").

I'm going to upstream this change to CGEN but due to known regressions,
I did not regenerate those files using CGEN (except CRIS (PATCH 07/40),
which I used a WIP version of CGEN).


[Related Patches]

-   PATCH 02/40 is a prerequisite of PATCH 26/40.
    We don't want to declare getrusage ourself (as possible).
    If we have a known declaration of getrusage with known prototype,
    we no longer need to declare getrusage with indeterminate arguments
    (without prototype).  This is similar to getopt in Binutils.


Thanks,
Tsukasa




Andrew Burgess (1):
  sim/lm32: fix some missing function declaration warnings

Tsukasa OI (39):
  gdb/unittests: PR28413, suppress warnings generated by Gnulib
  sim: Check known getrusage declaration existence
  sim/aarch64: Remove unused functions
  cpu/cris: Initialize some variables on CRIS CPU
  cpu/cris: Add u-stall virtual unit to CRIS v32
  sim/cris: Move declarations of f_specific_init
  sim/cris: Regenerate with CGEN
  sim/erc32: Insert void parameter
  sim/erc32: Use int32_t as event callback argument
  sim/erc32: Use int32_t as IRQ callback argument
  cpu/frv: Initialize some variables
  sim/frv: Initialize nesr variable
  sim/frv: Initialize some variables
  sim/frv: Add explicit casts
  sim/h8300: Add "+ 0x0" to avoid self-assignments
  sim/lm32: Add explicit casts
  sim/m32c: Stop using middle dot
  sim/m32r: Initialize "list" variable
  sim/m32r: Prepare required functions
  sim/m32r: Declare all required functions
  sim/m32r: Fixes to Linux emulator
  sim/m32r: Add explicit casts
  sim/mips: Fix enum type-related issues on cp1.c
  sim/mn10300: Add an explicit cast
  sim/ppc: Remove getrusage declarations if possible
  sim/ppc: Add extra parenthesis to avoid ambiguity
  sim/ppc: Initialize stat type buffer
  sim/ppc: Fix indentation on generated code
  sim/ppc: Use TRACE with initialized entry_point
  sim/ppc: Initialize help variables
  sim/ppc: Add an explicit cast
  sim/ppc: Initialize reg and control_nr
  sim/rx: Mark unused function
  sim/sh: Initialize some variables
  sim/sh: Use fabs instead of abs
  sim/sh: Remove redundant function declaration
  sim/bpf: Add explicit casts
  sim/iq2000: Add explicit casts
  sim/or1k: Add explicit casts

 cpu/cris.cpu                          |  4 ++++
 cpu/frv.cpu                           |  3 +++
 gdb/unittests/string_view-selftests.c |  7 ++++++
 sim/aarch64/simulator.c               | 16 --------------
 sim/bpf/decode-be.c                   | 14 ++++++------
 sim/bpf/decode-le.c                   | 14 ++++++------
 sim/config.h.in                       |  4 ++++
 sim/configure                         | 32 +++++++++++++++++++++++++++
 sim/configure.ac                      | 10 +++++++++
 sim/cris/arch.c                       |  5 +++--
 sim/cris/arch.h                       | 21 +++++++++++++-----
 sim/cris/cpuall.h                     |  5 +++--
 sim/cris/cpuv10.c                     |  6 +++--
 sim/cris/cpuv10.h                     |  5 +++--
 sim/cris/cpuv32.c                     |  6 +++--
 sim/cris/cpuv32.h                     |  5 +++--
 sim/cris/cris-tmpl.c                  |  2 ++
 sim/cris/decodev10.c                  | 21 +++++++++---------
 sim/cris/decodev10.h                  |  6 ++---
 sim/cris/decodev32.c                  | 21 +++++++++---------
 sim/cris/decodev32.h                  |  8 +++----
 sim/cris/modelv10.c                   |  5 +++--
 sim/cris/modelv32.c                   |  5 +++--
 sim/cris/semcrisv10f-switch.c         | 20 +++++++++++------
 sim/cris/semcrisv32f-switch.c         | 20 +++++++++++------
 sim/erc32/erc32.c                     | 28 +++++++++++------------
 sim/erc32/func.c                      | 14 ++++++------
 sim/erc32/sis.h                       |  8 +++----
 sim/frv/decode.c                      | 14 ++++++------
 sim/frv/sem.c                         |  4 ++++
 sim/frv/traps.c                       |  2 +-
 sim/h8300/compile.c                   |  4 ++--
 sim/iq2000/decode.c                   | 14 ++++++------
 sim/lm32/Makefile.in                  |  3 ---
 sim/lm32/cpu.h                        | 11 +++++++++
 sim/lm32/decode.c                     | 14 ++++++------
 sim/lm32/dv-lm32cpu.c                 |  3 +++
 sim/lm32/user.c                       |  3 +++
 sim/m32c/mem.c                        |  2 +-
 sim/m32r/decode.c                     | 14 ++++++------
 sim/m32r/decode2.c                    | 14 ++++++------
 sim/m32r/decodex.c                    | 14 ++++++------
 sim/m32r/m32r-sim.h                   | 24 +++++++++++++++-----
 sim/m32r/m32r2.c                      |  5 +++++
 sim/m32r/m32rx.c                      |  5 +++++
 sim/m32r/sim-if.c                     |  4 ++++
 sim/m32r/traps.c                      | 28 +++++++++++++++++++++--
 sim/mips/cp1.c                        |  8 +++----
 sim/mn10300/op_utils.c                |  5 +++--
 sim/or1k/decode.c                     | 14 ++++++------
 sim/ppc/altivec.igen                  |  2 +-
 sim/ppc/emul_netbsd.c                 |  4 +++-
 sim/ppc/emul_unix.c                   |  2 ++
 sim/ppc/hw_ide.c                      |  8 +++----
 sim/ppc/hw_phb.c                      |  2 +-
 sim/ppc/hw_sem.c                      |  4 ++--
 sim/ppc/igen.c                        |  2 +-
 sim/ppc/mon.c                         |  2 ++
 sim/ppc/sim_calls.c                   |  4 ++--
 sim/rx/rx.c                           |  2 +-
 sim/sh/gencode.c                      |  4 ++--
 sim/sh/interp.c                       |  4 +---
 62 files changed, 358 insertions(+), 206 deletions(-)


base-commit: 837e225ba1992f9745e5bbbd5e8443243a7f475f
-- 
2.34.1

[PATCH 01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib

[Tsukasa OI]

Gnulib generates a warning if the system version of certain functions
are used (to redirect the developer to use Gnulib version).  It caused a
compiler error when...

-   Compiled with Clang
-   -Werror is specified (by default)
-   C++ standard used by Clang is before C++17 (by default as of 15.0.0)
    when this unit test is activated.

This issue is raised as PR28413.

However, previous proposal to fix this issue (a "fix" to Gnulib):
<https://lists.gnu.org/archive/html/bug-gnulib/2021-10/msg00003.html>
was rejected because it ruins the intent of Gnulib warnings.

So, we need a Binutils/GDB-side solution.

This commit tries to address this issue on the GDB side.  We have
"include/diagnostics.h" to disable certain warnings only when necessary.

This commit suppresses the Gnulib warnings by surrounding entire #include
block with DIAGNOSTIC_IGNORE_USER_DEFINED_WARNINGS to disable Gnulib-
generated warnings on all standard C++ header files.
---
 gdb/unittests/string_view-selftests.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/gdb/unittests/string_view-selftests.c b/gdb/unittests/string_view-selftests.c
index 2d7261d18d3..441d533b54e 100644
--- a/gdb/unittests/string_view-selftests.c
+++ b/gdb/unittests/string_view-selftests.c
@@ -23,6 +23,11 @@
 
 #define GNULIB_NAMESPACE gnulib
 
+#include "diagnostics.h"
+
+DIAGNOSTIC_PUSH
+DIAGNOSTIC_IGNORE_USER_DEFINED_WARNINGS
+
 #include "defs.h"
 #include "gdbsupport/selftest.h"
 #include "gdbsupport/gdb_string_view.h"
@@ -34,6 +39,8 @@
 #include <fstream>
 #include <iostream>
 
+DIAGNOSTIC_POP
+
 /* libstdc++'s testsuite uses VERIFY.  */
 #define VERIFY SELF_CHECK
 
-- 
2.34.1

[PATCH 02/40] sim: Check known getrusage declaration existence

[Tsukasa OI]

Clang generates a warning if there is a function declaration/definition
with zero arguments. Such declarations/definitions without a prototype (an
argument list) are deprecated forms of indefinite arguments
("-Wdeprecated-non-prototype"). On the default configuration, it causes a
build failure (unless "--disable-werror" is specified).

Such getrusage function declarations are placed in three files under sim/ppc
and to avoid defining those on the modern environments, this commit will
make the configuration script to find the known declaration of getrusage
and defines HAVE_DECL_GETRUSAGE if it finds one.

If we find one (and we *will* in most modern environments), we don't need
to rely on the deprecated declarations.
---
 sim/config.h.in  |  4 ++++
 sim/configure    | 32 ++++++++++++++++++++++++++++++++
 sim/configure.ac | 10 ++++++++++
 3 files changed, 46 insertions(+)

diff --git a/sim/config.h.in b/sim/config.h.in
index 9a94b289e46..bc7ec588ec6 100644
--- a/sim/config.h.in
+++ b/sim/config.h.in
@@ -44,6 +44,10 @@
 /* Is the prototype for getopt in <unistd.h> in the expected format? */
 #undef HAVE_DECL_GETOPT
 
+/* Is the prototype for getrusage in <sys/resource.h> in the expected format?
+   */
+#undef HAVE_DECL_GETRUSAGE
+
 /* Define to 1 if you have the declaration of `tzname', and to 0 if you don't.
    */
 #undef HAVE_DECL_TZNAME
diff --git a/sim/configure b/sim/configure
index dac7f085be1..fbdd256d374 100755
--- a/sim/configure
+++ b/sim/configure
@@ -16460,6 +16460,38 @@ $as_echo "#define HAVE_DECL_GETOPT 1" >>confdefs.h
 
 fi
 
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a known getrusage prototype in sys/resource.h" >&5
+$as_echo_n "checking for a known getrusage prototype in sys/resource.h... " >&6; }
+if ${sim_cv_decl_getrusage_sys_resource_h+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+#include <sys/resource.h>
+int
+main ()
+{
+extern int getrusage (int, struct rusage *);
+  ;
+  return 0;
+}
+_ACEOF
+if ac_fn_c_try_compile "$LINENO"; then :
+  sim_cv_decl_getrusage_sys_resource_h=yes
+else
+  sim_cv_decl_getrusage_sys_resource_h=no
+fi
+rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
+fi
+
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $sim_cv_decl_getrusage_sys_resource_h" >&5
+$as_echo "$sim_cv_decl_getrusage_sys_resource_h" >&6; }
+if test $sim_cv_decl_getrusage_sys_resource_h = yes; then
+
+$as_echo "#define HAVE_DECL_GETRUSAGE 1" >>confdefs.h
+
+fi
+
 
 
 
diff --git a/sim/configure.ac b/sim/configure.ac
index be0cfdbea32..9411fc10f9d 100644
--- a/sim/configure.ac
+++ b/sim/configure.ac
@@ -187,6 +187,16 @@ if test $sim_cv_decl_getopt_unistd_h = yes; then
 	    [Is the prototype for getopt in <unistd.h> in the expected format?])
 fi
 
+AC_MSG_CHECKING(for a known getrusage prototype in sys/resource.h)
+AC_CACHE_VAL(sim_cv_decl_getrusage_sys_resource_h,
+[AC_COMPILE_IFELSE([AC_LANG_PROGRAM([#include <sys/resource.h>], [extern int getrusage (int, struct rusage *);])],
+sim_cv_decl_getrusage_sys_resource_h=yes, sim_cv_decl_getrusage_sys_resource_h=no)])
+AC_MSG_RESULT($sim_cv_decl_getrusage_sys_resource_h)
+if test $sim_cv_decl_getrusage_sys_resource_h = yes; then
+  AC_DEFINE([HAVE_DECL_GETRUSAGE], 1,
+	    [Is the prototype for getrusage in <sys/resource.h> in the expected format?])
+fi
+
 dnl These are unfortunate.  They are conditionally called by other sim macros
 dnl but always used by common/Make-common.in.  So we have to subst here even
 dnl when the rest of the code is in the respective macros.  Once we merge the
-- 
2.34.1

[PATCH 03/40] sim/aarch64: Remove unused functions

[Tsukasa OI]

Clang generates a warning if there is a unused static function
("-Wunused-function").  On the default configuration, it causes a build
failure (unless "--disable-werror" is specified).

This commit removes unused functions from the AArch64 simulator.
---
 sim/aarch64/simulator.c | 16 ----------------
 1 file changed, 16 deletions(-)

diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
index 516a7830522..5881725cefd 100644
--- a/sim/aarch64/simulator.c
+++ b/sim/aarch64/simulator.c
@@ -83,22 +83,6 @@
     }									\
   while (0)
 
-/* Helper functions used by expandLogicalImmediate.  */
-
-/* for i = 1, ... N result<i-1> = 1 other bits are zero  */
-static inline uint64_t
-ones (int N)
-{
-  return (N == 64 ? (uint64_t)-1UL : ((1UL << N) - 1));
-}
-
-/* result<0> to val<N>  */
-static inline uint64_t
-pickbit (uint64_t val, int N)
-{
-  return pickbits64 (val, N, N);
-}
-
 static uint64_t
 expand_logical_immediate (uint32_t S, uint32_t R, uint32_t N)
 {
-- 
2.34.1

[PATCH 04/40] cpu/cris: Initialize some variables on CRIS CPU

[Tsukasa OI]

GCC / Clang generate a warning if a variable may be used uninitialized on
some cases (Clang: "-Wsometimes-uninitialized").  When the program is being
built by Clang with the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

Those error occur on sim/cris/semcrisv{10,32}f-switch.c but they are
CGEN-generated files.  The real cause of this problem is in cpu/cris.cpu
which does not initialize certain variables.

This commit ensures such variables are initialized to zero by default.
Note that this commit itself does not regenerate CRIS CPU related files
with CGEN because it still has several issues preventing regeneration.
They are to be fixed in the later commits.

cpu/ChangeLog:

	* cris.cpu: Initialize condres, newval and tmpres variables.
---
 cpu/cris.cpu | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/cpu/cris.cpu b/cpu/cris.cpu
index 97b44581e78..cd85f4e94e2 100644
--- a/cpu/cris.cpu
+++ b/cpu/cris.cpu
@@ -541,6 +541,7 @@
   (sequence
     BI
     ((SI tmpcond) (BI condres))
+    (set condres 0)
     (set tmpcond condno)
      (.splice
       cond
@@ -2655,6 +2656,7 @@
      (sequence
        ((SI rno) (SI newval))
        (set rno (regno Pd))
+       (set newval 0)
        (.splice
 	cond
 	; No sanity check for constant special register here, since the
@@ -3698,6 +3700,7 @@
   (sequence
     SI
     ((SI tmpcode) (SI tmpval) (SI tmpres))
+    (set tmpres 0)
     (set tmpcode swapcode)
     (set tmpval val)
     (.splice
-- 
2.34.1

[PATCH 05/40] cpu/cris: Add u-stall virtual unit to CRIS v32

[Tsukasa OI]

Because CRIS v32 model does not define u-stall virtual unit, CGEN-generated
sim/cris/decodev32.h does not define the function declaration of
crisv32f_model_crisv32_u_stall.

It led to a hack in commit 4e6e8ba7c565 ("sim: cris: clean up missing func
prototype warnings"), manually adding the declaration of
crisv32f_model_crisv32_u_stall.

To **not** touch CGEN-generated files manually, this commit adds u-stall
virtual unit for CRIS v32 to let CGEN generate the function declaration of
crisv32f_model_crisv32_u_stall automatically.

This is still hackish but less than the previous one.

cpu/ChangeLog:

	* cris.cpu: Add u-stall virtual unit to CRIS v32.
---
 cpu/cris.cpu | 1 +
 1 file changed, 1 insertion(+)

diff --git a/cpu/cris.cpu b/cpu/cris.cpu
index cd85f4e94e2..a2d054f954c 100644
--- a/cpu/cris.cpu
+++ b/cpu/cris.cpu
@@ -284,6 +284,7 @@
   (unit u-const16 "Fetch 16-bit operand" () 1 1 () () () ())
   (unit u-const32 "Fetch 32-bit operand" () 1 1 () () () ())
   (unit u-skip4 "Skip 4 bytes" () 1 1 () () () ())
+  (unit u-stall "Stall unit" () 1 1 () () () ())
 
   ; For v32, we need to keep track of inputs (for movem destination
   ; cycle penalties) and output (for e.g. memory source and jump
-- 
2.34.1

[PATCH 06/40] sim/cris: Move declarations of f_specific_init

[Tsukasa OI]

Declarations for MY (f_specific_init) functions are defined in CGEN-
generated header files: sim/cris/decodev10.h (crisv10f_specific_init) and
sim/cris/decodev32.h (crisv32f_specific_init).  However, those declarations
are manually added by the commit 4e6e8ba7c565 ("sim: cris: clean up missing
func prototype warnings") as a hack and not a CGEN-generated part.

Those definitions are required by $(builddir)/sim/cris/mloopv{10,32}f.c,
generated from $(srcdir)/sim/cris/mloop.in.  If we define a declaration in
mloop.in, we no longer need manually added one.

This commit adds a template for function declaration so that we no longer
have to touch CGEN-generated code.  With this and the previous commit
"cpu/cris: Add stall unit to CRIS v32", we can now safely regenerate
CRIS CPU declarations with CGEN.
---
 sim/cris/cris-tmpl.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c
index 9f0c06e755e..8694d38b2af 100644
--- a/sim/cris/cris-tmpl.c
+++ b/sim/cris/cris-tmpl.c
@@ -264,6 +264,8 @@ MY (make_thread_cpu_data) (SIM_CPU *current_cpu, void *context)
 
 /* Hook function for per-cpu simulator initialization.  */
 
+extern void MY (f_specific_init) (SIM_CPU *);
+
 void
 MY (f_specific_init) (SIM_CPU *current_cpu)
 {
-- 
2.34.1

[PATCH 07/40] sim/cris: Regenerate with CGEN

[Tsukasa OI]

All CRIS-related files are regenerated by custom CGEN that is modified by
the author (CGEN change will be separately upstreamed).
---
 sim/cris/arch.c               |  5 +++--
 sim/cris/arch.h               | 21 +++++++++++++++------
 sim/cris/cpuall.h             |  5 +++--
 sim/cris/cpuv10.c             |  6 ++++--
 sim/cris/cpuv10.h             |  5 +++--
 sim/cris/cpuv32.c             |  6 ++++--
 sim/cris/cpuv32.h             |  5 +++--
 sim/cris/decodev10.c          | 21 +++++++++++----------
 sim/cris/decodev10.h          |  6 +++---
 sim/cris/decodev32.c          | 21 +++++++++++----------
 sim/cris/decodev32.h          |  8 ++++----
 sim/cris/modelv10.c           |  5 +++--
 sim/cris/modelv32.c           |  5 +++--
 sim/cris/semcrisv10f-switch.c | 20 +++++++++++++-------
 sim/cris/semcrisv32f-switch.c | 20 +++++++++++++-------
 15 files changed, 96 insertions(+), 63 deletions(-)

diff --git a/sim/cris/arch.c b/sim/cris/arch.c
index 1d50838f0a1..b502c239fca 100644
--- a/sim/cris/arch.c
+++ b/sim/cris/arch.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/arch.h b/sim/cris/arch.h
index 037b463438d..57d51236c03 100644
--- a/sim/cris/arch.h
+++ b/sim/cris/arch.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,13 +17,22 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
 #ifndef CRIS_ARCH_H
 #define CRIS_ARCH_H
 
+#define TARGET_BIG_ENDIAN 1
+
+#define WI  SI
+#define UWI USI
+#define AI  USI
+
+#define IAI USI
+
 /* Enum declaration for model types.  */
 typedef enum model_type {
   MODEL_CRISV10, MODEL_CRISV32, MODEL_MAX
@@ -36,10 +45,10 @@ typedef enum unit_type {
   UNIT_NONE, UNIT_CRISV10_U_MOVEM, UNIT_CRISV10_U_MULTIPLY, UNIT_CRISV10_U_SKIP4
  , UNIT_CRISV10_U_STALL, UNIT_CRISV10_U_CONST32, UNIT_CRISV10_U_CONST16, UNIT_CRISV10_U_MEM
  , UNIT_CRISV10_U_EXEC, UNIT_CRISV32_U_EXEC_TO_SR, UNIT_CRISV32_U_EXEC_MOVEM, UNIT_CRISV32_U_EXEC
- , UNIT_CRISV32_U_SKIP4, UNIT_CRISV32_U_CONST32, UNIT_CRISV32_U_CONST16, UNIT_CRISV32_U_JUMP
- , UNIT_CRISV32_U_JUMP_SR, UNIT_CRISV32_U_JUMP_R, UNIT_CRISV32_U_BRANCH, UNIT_CRISV32_U_MULTIPLY
- , UNIT_CRISV32_U_MOVEM_MTOR, UNIT_CRISV32_U_MOVEM_RTOM, UNIT_CRISV32_U_MEM_W, UNIT_CRISV32_U_MEM_R
- , UNIT_CRISV32_U_MEM, UNIT_MAX
+ , UNIT_CRISV32_U_STALL, UNIT_CRISV32_U_SKIP4, UNIT_CRISV32_U_CONST32, UNIT_CRISV32_U_CONST16
+ , UNIT_CRISV32_U_JUMP, UNIT_CRISV32_U_JUMP_SR, UNIT_CRISV32_U_JUMP_R, UNIT_CRISV32_U_BRANCH
+ , UNIT_CRISV32_U_MULTIPLY, UNIT_CRISV32_U_MOVEM_MTOR, UNIT_CRISV32_U_MOVEM_RTOM, UNIT_CRISV32_U_MEM_W
+ , UNIT_CRISV32_U_MEM_R, UNIT_CRISV32_U_MEM, UNIT_MAX
 } UNIT_TYPE;
 
 #define MAX_UNITS (4)
diff --git a/sim/cris/cpuall.h b/sim/cris/cpuall.h
index 145646f4ed0..c600f5d3a31 100644
--- a/sim/cris/cpuall.h
+++ b/sim/cris/cpuall.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/cpuv10.c b/sim/cris/cpuv10.c
index d53aa556e73..d188590e486 100644
--- a/sim/cris/cpuv10.c
+++ b/sim/cris/cpuv10.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -490,3 +491,4 @@ crisv10f_h_prefixreg_pre_v32_set (SIM_CPU *current_cpu, SI newval)
 {
   CPU (h_prefixreg_pre_v32) = newval;
 }
+
diff --git a/sim/cris/cpuv10.h b/sim/cris/cpuv10.h
index 30555c8244e..296279ff918 100644
--- a/sim/cris/cpuv10.h
+++ b/sim/cris/cpuv10.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/cpuv32.c b/sim/cris/cpuv32.c
index ad9af980aa1..997ef2c7533 100644
--- a/sim/cris/cpuv32.c
+++ b/sim/cris/cpuv32.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -586,3 +587,4 @@ crisv32f_h_prefixreg_v32_set (SIM_CPU *current_cpu, SI newval)
 {
   SET_H_PREFIXREG_V32 (newval);
 }
+
diff --git a/sim/cris/cpuv32.h b/sim/cris/cpuv32.h
index b23eff4f52a..affb72f99b8 100644
--- a/sim/cris/cpuv32.h
+++ b/sim/cris/cpuv32.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/decodev10.c b/sim/cris/decodev10.c
index 257961ae160..ebf511c1a2d 100644
--- a/sim/cris/decodev10.c
+++ b/sim/cris/decodev10.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -41,12 +42,12 @@ static IDESC crisv10f_insn_data[CRISV10F_INSN__MAX];
 
 static const struct insn_sem crisv10f_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, CRISV10F_INSN_X_AFTER, CRISV10F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, CRISV10F_INSN_X_BEFORE, CRISV10F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, CRISV10F_INSN_X_CTI_CHAIN, CRISV10F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, CRISV10F_INSN_X_CHAIN, CRISV10F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, CRISV10F_INSN_X_BEGIN, CRISV10F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, CRISV10F_INSN_X_AFTER, CRISV10F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, CRISV10F_INSN_X_BEFORE, CRISV10F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, CRISV10F_INSN_X_CTI_CHAIN, CRISV10F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, CRISV10F_INSN_X_CHAIN, CRISV10F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, CRISV10F_INSN_X_BEGIN, CRISV10F_SFMT_EMPTY },
   { CRIS_INSN_NOP, CRISV10F_INSN_NOP, CRISV10F_SFMT_NOP },
   { CRIS_INSN_MOVE_B_R, CRISV10F_INSN_MOVE_B_R, CRISV10F_SFMT_MOVE_B_R },
   { CRIS_INSN_MOVE_W_R, CRISV10F_INSN_MOVE_W_R, CRISV10F_SFMT_MOVE_B_R },
@@ -254,7 +255,7 @@ static const struct insn_sem crisv10f_insn_sem[] =
 
 static const struct insn_sem crisv10f_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV10F_INSN_X_INVALID, CRISV10F_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
@@ -303,7 +304,7 @@ crisv10f_init_idesc_table (SIM_CPU *cpu)
     init_idesc (cpu, id, t);
 
   /* Now fill in the values for the chosen cpu.  */
-  for (t = crisv10f_insn_sem, tend = t + ARRAY_SIZE (crisv10f_insn_sem);
+  for (t = crisv10f_insn_sem, tend = t + sizeof (crisv10f_insn_sem) / sizeof (*t);
        t != tend; ++t)
     {
       init_idesc (cpu, & table[t->index], t);
diff --git a/sim/cris/decodev10.h b/sim/cris/decodev10.h
index c742c2fe9c6..a3307ad8d21 100644
--- a/sim/cris/decodev10.h
+++ b/sim/cris/decodev10.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -30,7 +31,6 @@ extern const IDESC *crisv10f_decode (SIM_CPU *, IADDR,
 extern void crisv10f_init_idesc_table (SIM_CPU *);
 extern void crisv10f_sem_init_idesc_table (SIM_CPU *);
 extern void crisv10f_semf_init_idesc_table (SIM_CPU *);
-extern void crisv10f_specific_init (SIM_CPU *);
 
 /* Enum declaration for instructions in cpu family crisv10f.  */
 typedef enum crisv10f_insn_type {
diff --git a/sim/cris/decodev32.c b/sim/cris/decodev32.c
index d6afafa377f..c382f9f6b2f 100644
--- a/sim/cris/decodev32.c
+++ b/sim/cris/decodev32.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -41,12 +42,12 @@ static IDESC crisv32f_insn_data[CRISV32F_INSN__MAX];
 
 static const struct insn_sem crisv32f_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, CRISV32F_INSN_X_AFTER, CRISV32F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, CRISV32F_INSN_X_BEFORE, CRISV32F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, CRISV32F_INSN_X_CTI_CHAIN, CRISV32F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, CRISV32F_INSN_X_CHAIN, CRISV32F_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, CRISV32F_INSN_X_BEGIN, CRISV32F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, CRISV32F_INSN_X_AFTER, CRISV32F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, CRISV32F_INSN_X_BEFORE, CRISV32F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, CRISV32F_INSN_X_CTI_CHAIN, CRISV32F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, CRISV32F_INSN_X_CHAIN, CRISV32F_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, CRISV32F_INSN_X_BEGIN, CRISV32F_SFMT_EMPTY },
   { CRIS_INSN_MOVE_B_R, CRISV32F_INSN_MOVE_B_R, CRISV32F_SFMT_MOVE_B_R },
   { CRIS_INSN_MOVE_W_R, CRISV32F_INSN_MOVE_W_R, CRISV32F_SFMT_MOVE_B_R },
   { CRIS_INSN_MOVE_D_R, CRISV32F_INSN_MOVE_D_R, CRISV32F_SFMT_MOVE_D_R },
@@ -258,7 +259,7 @@ static const struct insn_sem crisv32f_insn_sem[] =
 
 static const struct insn_sem crisv32f_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, CRISV32F_INSN_X_INVALID, CRISV32F_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
@@ -307,7 +308,7 @@ crisv32f_init_idesc_table (SIM_CPU *cpu)
     init_idesc (cpu, id, t);
 
   /* Now fill in the values for the chosen cpu.  */
-  for (t = crisv32f_insn_sem, tend = t + ARRAY_SIZE (crisv32f_insn_sem);
+  for (t = crisv32f_insn_sem, tend = t + sizeof (crisv32f_insn_sem) / sizeof (*t);
        t != tend; ++t)
     {
       init_idesc (cpu, & table[t->index], t);
diff --git a/sim/cris/decodev32.h b/sim/cris/decodev32.h
index aae993b7881..94c483b03a1 100644
--- a/sim/cris/decodev32.h
+++ b/sim/cris/decodev32.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -30,7 +31,6 @@ extern const IDESC *crisv32f_decode (SIM_CPU *, IADDR,
 extern void crisv32f_init_idesc_table (SIM_CPU *);
 extern void crisv32f_sem_init_idesc_table (SIM_CPU *);
 extern void crisv32f_semf_init_idesc_table (SIM_CPU *);
-extern void crisv32f_specific_init (SIM_CPU *);
 
 /* Enum declaration for instructions in cpu family crisv32f.  */
 typedef enum crisv32f_insn_type {
@@ -126,8 +126,8 @@ typedef enum crisv32f_sfmt_type {
 extern int crisv32f_model_crisv32_u_exec_to_sr (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rs*/, INT /*Pd*/);
 extern int crisv32f_model_crisv32_u_exec_movem (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rs*/, INT /*Rd*/);
 extern int crisv32f_model_crisv32_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rd*/, INT /*Rs*/, INT /*Rd*/);
-extern int crisv32f_model_crisv32_u_skip4 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
 extern int crisv32f_model_crisv32_u_stall (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
+extern int crisv32f_model_crisv32_u_skip4 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
 extern int crisv32f_model_crisv32_u_const32 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
 extern int crisv32f_model_crisv32_u_const16 (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
 extern int crisv32f_model_crisv32_u_jump (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Pd*/);
diff --git a/sim/cris/modelv10.c b/sim/cris/modelv10.c
index 2ff4f5262b2..1f0d5fa367d 100644
--- a/sim/cris/modelv10.c
+++ b/sim/cris/modelv10.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/modelv32.c b/sim/cris/modelv32.c
index 86087f99ff4..f056fd41c26 100644
--- a/sim/cris/modelv32.c
+++ b/sim/cris/modelv32.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
diff --git a/sim/cris/semcrisv10f-switch.c b/sim/cris/semcrisv10f-switch.c
index f31b29442fd..a2f1505405e 100644
--- a/sim/cris/semcrisv10f-switch.c
+++ b/sim/cris/semcrisv10f-switch.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -260,7 +261,7 @@ This file is part of the GNU simulators.
 
 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
    off frills like tracing and profiling.  */
-/* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something
+/* FIXME: A better way would be to have TRACE_RESULT check for something
    that can cause it to be optimized out.  Another way would be to emit
    special handlers into the instruction "stream".  */
 
@@ -3379,6 +3380,7 @@ cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register");
   SI tmp_rno;
   SI tmp_newval;
   tmp_rno = FLD (f_operand2);
+  tmp_newval = 0;
 if (EQSI (tmp_rno, 5)) {
   tmp_newval = EXTHISI (({   SI tmp_addr;
   HI tmp_tmp_mem;
@@ -10993,7 +10995,8 @@ SET_H_VBIT_MOVE (0);
   tmp_tmpd = ({   SI tmp_tmpcode;
   SI tmp_tmpval;
   SI tmp_tmpres;
-  tmp_tmpcode = FLD (f_operand2);
+  tmp_tmpres = 0;
+;   tmp_tmpcode = FLD (f_operand2);
 ;   tmp_tmpval = tmp_tmps;
 ; if (EQSI (tmp_tmpcode, 0)) {
   tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0);
@@ -12060,7 +12063,8 @@ if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) {
   BI tmp_truthval;
   tmp_truthval = ({   SI tmp_tmpcond;
   BI tmp_condres;
-  tmp_tmpcond = FLD (f_operand2);
+  tmp_condres = 0;
+;   tmp_tmpcond = FLD (f_operand2);
 ; if (EQSI (tmp_tmpcond, 0)) {
   tmp_condres = NOTBI (CPU (h_cbit));
 }
@@ -12192,7 +12196,8 @@ if (tmp_truthval) {
   BI tmp_truthval;
   tmp_truthval = ({   SI tmp_tmpcond;
   BI tmp_condres;
-  tmp_tmpcond = FLD (f_operand2);
+  tmp_condres = 0;
+;   tmp_tmpcond = FLD (f_operand2);
 ; if (EQSI (tmp_tmpcond, 0)) {
   tmp_condres = NOTBI (CPU (h_cbit));
 }
@@ -13065,7 +13070,8 @@ SET_H_VBIT_MOVE (0);
   BI tmp_truthval;
   tmp_truthval = ({   SI tmp_tmpcond;
   BI tmp_condres;
-  tmp_tmpcond = FLD (f_operand2);
+  tmp_condres = 0;
+;   tmp_tmpcond = FLD (f_operand2);
 ; if (EQSI (tmp_tmpcond, 0)) {
   tmp_condres = NOTBI (CPU (h_cbit));
 }
diff --git a/sim/cris/semcrisv32f-switch.c b/sim/cris/semcrisv32f-switch.c
index ab15d6ee36c..bf06e8aa6ca 100644
--- a/sim/cris/semcrisv32f-switch.c
+++ b/sim/cris/semcrisv32f-switch.c
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2022 Free Software Foundation, Inc.
+Copyright (C) 1996-2022 Free Software Foundation, Inc.
 
 This file is part of the GNU simulators.
 
@@ -17,7 +17,8 @@ This file is part of the GNU simulators.
    License for more details.
 
    You should have received a copy of the GNU General Public License along
-   with this program; if not, see <http://www.gnu.org/licenses/>.
+   with this program; if not, write to the Free Software Foundation, Inc.,
+   51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
 
 */
 
@@ -264,7 +265,7 @@ This file is part of the GNU simulators.
 
 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
    off frills like tracing and profiling.  */
-/* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something
+/* FIXME: A better way would be to have TRACE_RESULT check for something
    that can cause it to be optimized out.  Another way would be to emit
    special handlers into the instruction "stream".  */
 
@@ -3291,6 +3292,7 @@ cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register");
   SI tmp_rno;
   SI tmp_newval;
   tmp_rno = FLD (f_operand2);
+  tmp_newval = 0;
 if (EQSI (tmp_rno, 2)) {
   tmp_newval = ({   SI tmp_addr;
   SI tmp_tmp_mem;
@@ -11263,7 +11265,8 @@ SET_H_VBIT_MOVE (0);
   tmp_tmpd = ({   SI tmp_tmpcode;
   SI tmp_tmpval;
   SI tmp_tmpres;
-  tmp_tmpcode = FLD (f_operand2);
+  tmp_tmpres = 0;
+;   tmp_tmpcode = FLD (f_operand2);
 ;   tmp_tmpval = tmp_tmps;
 ; if (EQSI (tmp_tmpcode, 0)) {
   tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0);
@@ -12460,7 +12463,8 @@ crisv32f_rfg_handler (current_cpu, pc);
   BI tmp_truthval;
   tmp_truthval = ({   SI tmp_tmpcond;
   BI tmp_condres;
-  tmp_tmpcond = FLD (f_operand2);
+  tmp_condres = 0;
+;   tmp_tmpcond = FLD (f_operand2);
 ; if (EQSI (tmp_tmpcond, 0)) {
   tmp_condres = NOTBI (CPU (h_cbit));
 }
@@ -12592,7 +12596,8 @@ if (tmp_truthval) {
   BI tmp_truthval;
   tmp_truthval = ({   SI tmp_tmpcond;
   BI tmp_condres;
-  tmp_tmpcond = FLD (f_operand2);
+  tmp_condres = 0;
+;   tmp_tmpcond = FLD (f_operand2);
 ; if (EQSI (tmp_tmpcond, 0)) {
   tmp_condres = NOTBI (CPU (h_cbit));
 }
@@ -13380,7 +13385,8 @@ SET_H_VBIT_MOVE (0);
   BI tmp_truthval;
   tmp_truthval = ({   SI tmp_tmpcond;
   BI tmp_condres;
-  tmp_tmpcond = FLD (f_operand2);
+  tmp_condres = 0;
+;   tmp_tmpcond = FLD (f_operand2);
 ; if (EQSI (tmp_tmpcond, 0)) {
   tmp_condres = NOTBI (CPU (h_cbit));
 }
-- 
2.34.1

[PATCH 08/40] sim/erc32: Insert void parameter

[Tsukasa OI]

Clang generates a warning if there is a function declaration/definition
with zero arguments.  Such declarations/definitions without a prototype (an
argument list) are deprecated forms of indefinite arguments
("-Wdeprecated-non-prototype").  On the default configuration, it causes a
build failure (unless "--disable-werror" is specified).

This commit replaces () with (void) to avoid this warning.
---
 sim/erc32/func.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sim/erc32/func.c b/sim/erc32/func.c
index 4d1942065b8..af92c9f7d48 100644
--- a/sim/erc32/func.c
+++ b/sim/erc32/func.c
@@ -298,7 +298,7 @@ disp_reg(struct pstate *sregs, char *reg)
 #ifdef ERRINJ
 
 void
-errinj()
+errinj (void)
 {
     int	err;
 
@@ -322,7 +322,7 @@ errinj()
 }
 
 void
-errinjstart()
+errinjstart (void)
 {
     if (errper) event(errinj, 0, (random()%errper));
 }
@@ -855,7 +855,7 @@ event(void (*cfunc) (), int32_t arg, uint64_t delta)
 
 #if 0	/* apparently not used */
 void
-stop_event()
+stop_event(void)
 {
 }
 #endif
-- 
2.34.1

[PATCH 09/40] sim/erc32: Use int32_t as event callback argument

[Tsukasa OI]

Clang generates a warning if an argument is passed to a function without
prototype (zero arguments, even without (void)).  Such calls are deprecated
forms of indefinite arguments passing ("-Wdeprecated-non-prototype").
On the default configuration, it causes a build failure (unless
"--disable-werror" is specified).

To fix that, this commit makes struct evcell to use int32_t as a callback
(cfunc) argument of an event.
---
 sim/erc32/erc32.c | 28 ++++++++++++++--------------
 sim/erc32/func.c  |  8 ++++----
 sim/erc32/sis.h   |  4 ++--
 3 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/sim/erc32/erc32.c b/sim/erc32/erc32.c
index 0206c02e6f0..d7cc1f1cf3b 100644
--- a/sim/erc32/erc32.c
+++ b/sim/erc32/erc32.c
@@ -274,19 +274,19 @@ static void	port_init (void);
 static uint32_t	read_uart (uint32_t addr);
 static void	write_uart (uint32_t addr, uint32_t data);
 static void	flush_uart (void);
-static void	uarta_tx (void);
-static void	uartb_tx (void);
-static void	uart_rx (void *arg);
-static void	uart_intr (void *arg);
+static void	uarta_tx (int32_t);
+static void	uartb_tx (int32_t);
+static void	uart_rx (int32_t);
+static void	uart_intr (int32_t);
 static void	uart_irq_start (void);
-static void	wdog_intr (void *arg);
+static void	wdog_intr (int32_t);
 static void	wdog_start (void);
-static void	rtc_intr (void *arg);
+static void	rtc_intr (int32_t);
 static void	rtc_start (void);
 static uint32_t	rtc_counter_read (void);
 static void	rtc_scaler_set (uint32_t val);
 static void	rtc_reload_set (uint32_t val);
-static void	gpt_intr (void *arg);
+static void	gpt_intr (int32_t);
 static void	gpt_start (void);
 static uint32_t	gpt_counter_read (void);
 static void	gpt_scaler_set (uint32_t val);
@@ -1245,7 +1245,7 @@ flush_uart(void)
 
 ATTRIBUTE_UNUSED
 static void
-uarta_tx(void)
+uarta_tx(int32_t arg ATTRIBUTE_UNUSED)
 {
 
     while (f1open && fwrite(&uarta_sreg, 1, 1, f1out) != 1);
@@ -1261,7 +1261,7 @@ uarta_tx(void)
 
 ATTRIBUTE_UNUSED
 static void
-uartb_tx(void)
+uartb_tx(int32_t arg ATTRIBUTE_UNUSED)
 {
     while (f2open && fwrite(&uartb_sreg, 1, 1, f2out) != 1);
     if (uart_stat_reg & UARTB_HRE) {
@@ -1276,7 +1276,7 @@ uartb_tx(void)
 
 ATTRIBUTE_UNUSED
 static void
-uart_rx(void *arg)
+uart_rx(int32_t arg ATTRIBUTE_UNUSED)
 {
     int32_t           rsize;
     char            rxd;
@@ -1318,7 +1318,7 @@ uart_rx(void *arg)
 }
 
 static void
-uart_intr(void *arg)
+uart_intr(int32_t arg ATTRIBUTE_UNUSED)
 {
     read_uart(0xE8);		/* Check for UART interrupts every 1000 clk */
     flush_uart();		/* Flush UART ports      */
@@ -1341,7 +1341,7 @@ uart_irq_start(void)
 /* Watch-dog */
 
 static void
-wdog_intr(void *arg)
+wdog_intr(int32_t arg ATTRIBUTE_UNUSED)
 {
     if (wdog_status == disabled) {
 	wdog_status = stopped;
@@ -1379,7 +1379,7 @@ wdog_start(void)
 
 
 static void
-rtc_intr(void *arg)
+rtc_intr(int32_t arg ATTRIBUTE_UNUSED)
 {
     if (rtc_counter == 0) {
 
@@ -1430,7 +1430,7 @@ rtc_reload_set(uint32_t val)
 }
 
 static void
-gpt_intr(void *arg)
+gpt_intr(int32_t arg ATTRIBUTE_UNUSED)
 {
     if (gpt_counter == 0) {
 	mec_irq(12);
diff --git a/sim/erc32/func.c b/sim/erc32/func.c
index af92c9f7d48..6971ae0129d 100644
--- a/sim/erc32/func.c
+++ b/sim/erc32/func.c
@@ -298,7 +298,7 @@ disp_reg(struct pstate *sregs, char *reg)
 #ifdef ERRINJ
 
 void
-errinj (void)
+errinj (int32_t arg ATTRIBUTE_UNUSED)
 {
     int	err;
 
@@ -887,8 +887,8 @@ advance_time(struct pstate *sregs)
 {
 
     struct evcell  *evrem;
-    void            (*cfunc) ();
-    uint32_t          arg;
+    void            (*cfunc) (int32_t);
+    int32_t           arg;
     uint64_t          endtime;
 
 #ifdef STAT
@@ -926,7 +926,7 @@ int
 wait_for_irq(void)
 {
     struct evcell  *evrem;
-    void            (*cfunc) ();
+    void            (*cfunc) (int32_t);
     int32_t           arg;
     uint64_t          endtime;
 
diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h
index 71033137f2c..36346cae641 100644
--- a/sim/erc32/sis.h
+++ b/sim/erc32/sis.h
@@ -124,7 +124,7 @@ struct pstate {
 };
 
 struct evcell {
-    void            (*cfunc) ();
+    void            (*cfunc) (int32_t);
     int32_t           arg;
     uint64_t          time;
     struct evcell  *nxt;
@@ -183,7 +183,7 @@ extern void	init_signals (void);
 struct disassemble_info;
 extern void	dis_mem (uint32_t addr, uint32_t len,
 			 struct disassemble_info *info);
-extern void	event (void (*cfunc) (), int32_t arg, uint64_t delta);
+extern void	event (void (*cfunc) (int32_t), int32_t arg, uint64_t delta);
 extern void	set_int (int32_t level, void (*callback) (), int32_t arg);
 extern void	advance_time (struct pstate  *sregs);
 extern uint32_t	now (void);
-- 
2.34.1

[PATCH 10/40] sim/erc32: Use int32_t as IRQ callback argument

[Tsukasa OI]

Clang generates a warning if an argument is passed to a function without
prototype (zero arguments, even without (void)).  Such calls are deprecated
forms of indefinite arguments passing ("-Wdeprecated-non-prototype").
On the default configuration, it (somehow) doesn't cause a build failure but
a warning is generated.

But because the cause is the same as the issue the author fixed in
"sim/erc32: Use int32_t as event callback argument", it would be better to
fix it now to prevent problems in the future.

To fix the issue, this commit makes struct irqcall to use int32_t as a
callback (callback) argument of an IRQ.
---
 sim/erc32/func.c | 2 +-
 sim/erc32/sis.h  | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/sim/erc32/func.c b/sim/erc32/func.c
index 6971ae0129d..527df172660 100644
--- a/sim/erc32/func.c
+++ b/sim/erc32/func.c
@@ -874,7 +874,7 @@ init_event(void)
 }
 
 void
-set_int(int32_t level, void (*callback) (), int32_t arg)
+set_int(int32_t level, void (*callback) (int32_t), int32_t arg)
 {
     irqarr[level & 0x0f].callback = callback;
     irqarr[level & 0x0f].arg = arg;
diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h
index 36346cae641..df6b22c47b0 100644
--- a/sim/erc32/sis.h
+++ b/sim/erc32/sis.h
@@ -137,7 +137,7 @@ struct estate {
 };
 
 struct irqcell {
-    void            (*callback) ();
+    void            (*callback) (int32_t);
     int32_t           arg;
 };
 
@@ -184,7 +184,7 @@ struct disassemble_info;
 extern void	dis_mem (uint32_t addr, uint32_t len,
 			 struct disassemble_info *info);
 extern void	event (void (*cfunc) (int32_t), int32_t arg, uint64_t delta);
-extern void	set_int (int32_t level, void (*callback) (), int32_t arg);
+extern void	set_int (int32_t level, void (*callback) (int32_t), int32_t arg);
 extern void	advance_time (struct pstate  *sregs);
 extern uint32_t	now (void);
 extern int	wait_for_irq (void);
-- 
2.34.1

[PATCH 11/40] cpu/frv: Initialize some variables

[Tsukasa OI]

GCC generates a warning if a variable may be used uninitialized on some
cases ("-Wmaybe-uninitialized").  Despite that this will not cause a build
failure even on the default configuration (with "--enable-werror"), it is
better to be fixed.

The cause of this warning, sim/frv/sem.c is generated by CGEN from
cpu/frv.cpu.  This commit adds initialization of some variables that caused
GCC warnings.

cpu/ChangeLog:

	* frv.cpu (cmpb): Initialize cc variable.
	(load-double-gr-u-semantics, clddu) Initialize address variable.
---
 cpu/frv.cpu | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/cpu/frv.cpu b/cpu/frv.cpu
index cdb169eddc1..6af8c3ab347 100644
--- a/cpu/frv.cpu
+++ b/cpu/frv.cpu
@@ -4266,6 +4266,7 @@
      "cmpb$pack $GRi,$GRj,$ICCi_1"
      (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj)
      (sequence ((QI cc))
+	       (set cc 0)
 	       (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000)))
 	       (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000)))
 	       (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00)))
@@ -4655,6 +4656,7 @@
 
 (define-pmacro (load-double-gr-u-semantics)
   (sequence ((WI address))
+	    (set address 0)
 	    (load-double-semantics 0 DI GR address GRj)
 	    (if (ne (index-of GRi) (index-of GRdoublek))
 		(sequence ()
@@ -5309,6 +5311,7 @@
      (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj)
      (if (eq CCi (or cond 2))
 	 (sequence ((WI address))
+		   (set address 0)
 		   (load-double-semantics 0 DI GR address GRj)
 		   (if (ne (index-of GRi) (index-of GRdoublek))
 		       (set GRi address))))
-- 
2.34.1

[PATCH 12/40] sim/frv: Initialize nesr variable

[Tsukasa OI]

GCC generates a warning if a variable may be used uninitialized on some
cases ("-Wmaybe-uninitialized").  Despite that GCC will not cause a build
failure even when "--enable-werror" is specified, it would be nice to get
rid of it.

This commit initializes the variable nesr when declared.
---
 sim/frv/traps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/frv/traps.c b/sim/frv/traps.c
index 0c9eacd0bfd..b142c7890ad 100644
--- a/sim/frv/traps.c
+++ b/sim/frv/traps.c
@@ -432,7 +432,7 @@ frvbf_check_non_excepting_load (
   int do_elos;
   SI NE_flags[2];
   SI NE_base;
-  SI nesr;
+  SI nesr = 0;
   SI ne_index;
   FRV_REGISTER_CONTROL *control;
 
-- 
2.34.1

[PATCH 13/40] sim/frv: Initialize some variables

[Tsukasa OI]

This commit is strongly related to "cpu/frv: Initialize some variables" and
applies corresponding changes to sim/frv/sem.c.

Note:
This commit touches CGEN-generated files directly.
Modifying cpu/frv.cpu (which is done) and regenerating with CGEN is the best
way to prevent this issue from happening again but there is another known
regression in CGEN to resolve.
---
 sim/frv/sem.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sim/frv/sem.c b/sim/frv/sem.c
index cc7cbeee318..28610f4eac7 100644
--- a/sim/frv/sem.c
+++ b/sim/frv/sem.c
@@ -3054,6 +3054,7 @@ SEM_FN_NAME (frvbf,cmpb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 {
   QI tmp_cc;
+  tmp_cc = 0;
 if (EQBI (EQSI (ANDSI (GET_H_GR (FLD (f_GRi)), 0xff000000), ANDSI (GET_H_GR (FLD (f_GRj)), 0xff000000)), 0)) {
   tmp_cc = ANDQI (tmp_cc, 7);
 } else {
@@ -4545,6 +4546,7 @@ SEM_FN_NAME (frvbf,lddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
@@ -4591,6 +4593,7 @@ SEM_FN_NAME (frvbf,nlddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (tmp_do_op) {
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
@@ -6706,6 +6709,7 @@ SEM_FN_NAME (frvbf,clddu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) {
 {
   SI tmp_address;
+  tmp_address = 0;
 if (NESI (FLD (f_GRk), 0)) {
 {
   tmp_address = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
-- 
2.34.1

[PATCH 14/40] sim/frv: Add explicit casts

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts on the FR-V instruction decoder.

Note:
This commit touches CGEN-generated files directly.
Modifying CGEN is the best way to prevent this issue from happening again
but there is another known regression in CGEN to resolve.
---
 sim/frv/decode.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/sim/frv/decode.c b/sim/frv/decode.c
index 307b593e148..9c4a97833ad 100644
--- a/sim/frv/decode.c
+++ b/sim/frv/decode.c
@@ -39,12 +39,12 @@ static IDESC frvbf_insn_data[FRVBF_INSN__MAX];
 
 static const struct insn_sem frvbf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY },
   { FRV_INSN_ADD, FRVBF_INSN_ADD, FRVBF_SFMT_ADD },
   { FRV_INSN_SUB, FRVBF_INSN_SUB, FRVBF_SFMT_ADD },
   { FRV_INSN_AND, FRVBF_INSN_AND, FRVBF_SFMT_ADD },
@@ -792,7 +792,7 @@ static const struct insn_sem frvbf_insn_sem[] =
 
 static const struct insn_sem frvbf_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
-- 
2.34.1

[PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments

[Tsukasa OI]

Clang generates a warning if there is a redundant self-assignment
("-Wself-assign").  On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

However, removing self-assignments in step_once function makes the code less
readable.  Instead, this commit inserts dummy addition to match the comments
"Value added == 0".  This is redundant but will suppress warnings and
matches with other branches better.  It will be also optimized away so we
can ignore performance impact on this.
---
 sim/h8300/compile.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
index 9be7dd565a9..f7d8d590b69 100644
--- a/sim/h8300/compile.c
+++ b/sim/h8300/compile.c
@@ -4141,7 +4141,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  res = GET_B_REG (code->src.reg);	/* FIXME fetch? */
 	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
 	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
-	    res = res;		/* Value added == 0.  */
+	    res = res + 0x0;		/* Value added == 0.  */
 	  else if (!c && (0  <= (res >>  4) && (res >>  4) <=  8) && 
 		   !h && (10 <= (res & 0xf) && (res & 0xf) <= 15))
 	    res = res + 0x6;		/* Value added == 6.  */
@@ -4174,7 +4174,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  res = GET_B_REG (code->src.reg); /* FIXME fetch, fetch2... */
 	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
 	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
-	    res = res;		/* Value added == 0.  */
+	    res = res + 0x0;		/* Value added == 0.  */
 	  else if (!c && (0 <= (res >>  4) && (res >>  4) <=  8) && 
 		    h && (6 <= (res & 0xf) && (res & 0xf) <= 15))
 	    res = res + 0xfa;		/* Value added == 0xfa.  */
-- 
2.34.1

[PATCH 16/40] sim/lm32: fix some missing function declaration warnings

[Tsukasa OI]

From: Andrew Burgess <aburgess@redhat.com>

In the lm32 simulator, I was seeing some warnings about missing
function declarations.

The lm32 simulator has a weird header structure, in order to pull in
the full cpu.h header we need to define WANT_CPU_LM32BF.  This is done
in some files, but not in others.  Critically, it's not done in some
files that then use functions declared in cpu.h

In this commit I added the missing #define so that the full cpu.h can
be included.

After doing this there are still a few functions that are used
undeclared, these functions appear to be missing any declarations at
all, so I've added some to cpu.h.

With this done all the warnings when compiling lm32 are resolved for
both gcc and clang, so I've removed the SIM_WERROR_CFLAGS line from
Makefile.in, this allows lm32 to build with -Werror.
---
 sim/lm32/Makefile.in  |  3 ---
 sim/lm32/cpu.h        | 11 +++++++++++
 sim/lm32/dv-lm32cpu.c |  3 +++
 sim/lm32/user.c       |  3 +++
 4 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in
index d827b711d45..db15bef47a7 100644
--- a/sim/lm32/Makefile.in
+++ b/sim/lm32/Makefile.in
@@ -24,9 +24,6 @@ SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h \
 
 SIM_EXTRA_CLEAN = lm32-clean
 
-# Some modules don't build cleanly yet.
-dv-lm32cpu.o mloop.o sem.o traps.o user.o: SIM_WERROR_CFLAGS =
-
 ## COMMON_POST_CONFIG_FRAG
 
 arch = lm32 
diff --git a/sim/lm32/cpu.h b/sim/lm32/cpu.h
index 05b98be8cf1..d025065f2ba 100644
--- a/sim/lm32/cpu.h
+++ b/sim/lm32/cpu.h
@@ -163,6 +163,17 @@ struct scache {
   struct argbuf argbuf;
 };
 
+/* From traps.c.  */
+extern USI lm32bf_b_insn (SIM_CPU * current_cpu, USI r0, USI f_r0);
+extern USI lm32bf_divu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2);
+extern USI lm32bf_modu_insn (SIM_CPU * current_cpu, IADDR pc, USI r0, USI r1, USI r2);
+extern void lm32bf_wcsr_insn (SIM_CPU * current_cpu, USI f_csr, USI r1);
+extern USI lm32bf_break_insn (SIM_CPU * current_cpu, IADDR pc);
+extern USI lm32bf_scall_insn (SIM_CPU * current_cpu, IADDR pc);
+
+/* From user.c.  */
+extern UINT lm32bf_user_insn (SIM_CPU * current_cpu, INT r0, INT r1, UINT imm);
+
 /* Macros to simplify extraction, reading and semantic code.
    These define and assign the local vars that contain the insn's fields.  */
 
diff --git a/sim/lm32/dv-lm32cpu.c b/sim/lm32/dv-lm32cpu.c
index b97580e80a3..15a08eee815 100644
--- a/sim/lm32/dv-lm32cpu.c
+++ b/sim/lm32/dv-lm32cpu.c
@@ -18,6 +18,9 @@
    You should have received a copy of the GNU General Public License
    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
+#define WANT_CPU lm32bf
+#define WANT_CPU_LM32BF
+
 /* This must come before any other includes.  */
 #include "defs.h"
 
diff --git a/sim/lm32/user.c b/sim/lm32/user.c
index 3cc21a208ee..d301d482c1b 100644
--- a/sim/lm32/user.c
+++ b/sim/lm32/user.c
@@ -21,6 +21,9 @@
 /* This must come before any other includes.  */
 #include "defs.h"
 
+#define WANT_CPU lm32bf
+#define WANT_CPU_LM32BF
+
 #include "sim-main.h"
 
 /* Handle user defined instructions.  */
-- 
2.34.1

[PATCH 17/40] sim/lm32: Add explicit casts

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts on the LatticeMico32 instruction decoder.

Note:
This commit touches CGEN-generated files directly.
Modifying CGEN is the best way to prevent this issue from happening again
but there is another known regression in CGEN or sim/lm32 to resolve.
---
 sim/lm32/decode.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/sim/lm32/decode.c b/sim/lm32/decode.c
index 9faef289132..889a0de9026 100644
--- a/sim/lm32/decode.c
+++ b/sim/lm32/decode.c
@@ -39,12 +39,12 @@ static IDESC lm32bf_insn_data[LM32BF_INSN__MAX];
 
 static const struct insn_sem lm32bf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, LM32BF_INSN_X_AFTER, LM32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, LM32BF_INSN_X_BEFORE, LM32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, LM32BF_INSN_X_CTI_CHAIN, LM32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, LM32BF_INSN_X_CHAIN, LM32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, LM32BF_INSN_X_BEGIN, LM32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, LM32BF_INSN_X_AFTER, LM32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, LM32BF_INSN_X_BEFORE, LM32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, LM32BF_INSN_X_CTI_CHAIN, LM32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, LM32BF_INSN_X_CHAIN, LM32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, LM32BF_INSN_X_BEGIN, LM32BF_SFMT_EMPTY },
   { LM32_INSN_ADD, LM32BF_INSN_ADD, LM32BF_SFMT_ADD },
   { LM32_INSN_ADDI, LM32BF_INSN_ADDI, LM32BF_SFMT_ADDI },
   { LM32_INSN_AND, LM32BF_INSN_AND, LM32BF_SFMT_ADD },
@@ -111,7 +111,7 @@ static const struct insn_sem lm32bf_insn_sem[] =
 
 static const struct insn_sem lm32bf_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, LM32BF_INSN_X_INVALID, LM32BF_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
-- 
2.34.1

[PATCH 18/40] sim/m32c: Stop using middle dot

[Tsukasa OI]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=UTF-8, Size: 923 bytes --]

The led_off array used 0xB7 (Latin-1 middle dot) but it heavily depends on
the source code encoding.  Directly using 0xB7 here is very dangerous and
Clang causes a compiler warning ("-Winvalid-source-encoding").
On the other hand, using '\u00b7' here will assume UTF-8.

As a workaround, this commit replaces uses of 0xB7 with '.'
(regular ASCII dot).
---
 sim/m32c/mem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/m32c/mem.c b/sim/m32c/mem.c
index 5bb9dbf2c29..a412f81b2e9 100644
--- a/sim/m32c/mem.c
+++ b/sim/m32c/mem.c
@@ -221,7 +221,7 @@ mem_put_byte (int address, unsigned char value)
 	static int old_led = -1;
 	static char *led_on[] =
 	  { "\033[31m O ", "\033[32m O ", "\033[34m O " };
-	static char *led_off[] = { "\033[0m · ", "\033[0m · ", "\033[0m · " };
+	static char *led_off[] = { "\033[0m . ", "\033[0m . ", "\033[0m . " };
 	int i;
 	if (old_led != value)
 	  {
-- 
2.34.1

[PATCH 19/40] sim/m32r: Initialize "list" variable

[Tsukasa OI]

The variable "list" is only initialized when arg1 > 0 and when arg1 == 0,
an uninitialized value is passed to translate_endian_h2t function.

Although this behavior is harmless, this commit adds initialization to avoid
a GCC warning ("-Wmaybe-uninitialized").
---
 sim/m32r/traps.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c
index 267d54881da..12a87b4a697 100644
--- a/sim/m32r/traps.c
+++ b/sim/m32r/traps.c
@@ -547,7 +547,7 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
 	  case TARGET_LINUX_SYS_getgroups32:
 	  case TARGET_LINUX_SYS_getgroups:
 	    {
-	      gid_t *list;
+	      gid_t *list = NULL;
 
 	      if (arg1 > 0)
 		list = (gid_t *) malloc (arg1 * sizeof(gid_t));
-- 
2.34.1

[PATCH 20/40] sim/m32r: Prepare required functions

[Tsukasa OI]

This commit includes necessary header files and creates duplicated
declarations from other header files.

Duplicated declarations are necessary on M32R because, despite that some
m32rbf functions are used by m32rx and m32r2, we cannot include two or more
CPU header files: "cpu.h", "cpux.h" and "cpu2.h".
---
 sim/m32r/m32r2.c  |  5 +++++
 sim/m32r/m32rx.c  |  5 +++++
 sim/m32r/sim-if.c |  4 ++++
 sim/m32r/traps.c  | 15 +++++++++++++++
 4 files changed, 29 insertions(+)

diff --git a/sim/m32r/m32r2.c b/sim/m32r/m32r2.c
index 9c8daa5b8c6..13c2990a6ab 100644
--- a/sim/m32r/m32r2.c
+++ b/sim/m32r/m32r2.c
@@ -26,6 +26,11 @@
 #include "sim-main.h"
 #include "cgen-mem.h"
 #include "cgen-ops.h"
+#include "decode.h"
+
+/* From cpu.h.  */
+extern CPUREG_FETCH_FN m32rbf_fetch_register;
+extern CPUREG_STORE_FN m32rbf_store_register;
 
 /* The contents of BUF are in target byte order.  */
 
diff --git a/sim/m32r/m32rx.c b/sim/m32r/m32rx.c
index 07098036d02..2fde1bb043f 100644
--- a/sim/m32r/m32rx.c
+++ b/sim/m32r/m32rx.c
@@ -26,6 +26,11 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 #include "sim-main.h"
 #include "cgen-mem.h"
 #include "cgen-ops.h"
+#include "decode.h"
+
+/* From cpu.h.  */
+extern CPUREG_FETCH_FN m32rbf_fetch_register;
+extern CPUREG_STORE_FN m32rbf_store_register;
 
 /* The contents of BUF are in target byte order.  */
 
diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c
index 878a0d5f576..3530b8d711c 100644
--- a/sim/m32r/sim-if.c
+++ b/sim/m32r/sim-if.c
@@ -25,6 +25,7 @@
 
 #include "sim/callback.h"
 #include "sim-main.h"
+#include "sim-hw.h"
 #include "sim-options.h"
 #include "libiberty.h"
 #include "bfd.h"
@@ -33,6 +34,9 @@
 
 #define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
 
+/* From cpu.h.  */
+void m32rbf_h_cr_set (SIM_CPU *, UINT, USI);
+
 static void free_state (SIM_DESC);
 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
 \f
diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c
index 12a87b4a697..f0fb218a11d 100644
--- a/sim/m32r/traps.c
+++ b/sim/m32r/traps.c
@@ -55,6 +55,21 @@
 #include <linux/unistd.h>
 #endif
 
+/* From cpu.h, cpux.h and cpu2.h.  */
+SI m32rbf_h_gr_get (SIM_CPU *, UINT);
+void m32rbf_h_gr_set (SIM_CPU *, UINT, SI);
+USI m32rbf_h_cr_get (SIM_CPU *, UINT);
+void m32rbf_h_cr_set (SIM_CPU *, UINT, USI);
+UQI m32rbf_h_psw_get (SIM_CPU *);
+void m32rbf_h_psw_set (SIM_CPU *, UQI);
+void m32rbf_h_bpsw_set (SIM_CPU *, UQI);
+UQI m32rxf_h_psw_get (SIM_CPU *);
+void m32rxf_h_psw_set (SIM_CPU *, UQI);
+void m32rxf_h_bpsw_set (SIM_CPU *, UQI);
+UQI m32r2f_h_psw_get (SIM_CPU *);
+void m32r2f_h_psw_set (SIM_CPU *, UQI);
+void m32r2f_h_bpsw_set (SIM_CPU *, UQI);
+
 #define TRAP_LINUX_SYSCALL 2
 #define TRAP_FLUSH_CACHE 12
 /* The semantic code invokes this for invalid (unrecognized) instructions.  */
-- 
2.34.1

[PATCH 21/40] sim/m32r: Declare all required functions

[Tsukasa OI]

This commit declares all required functions in m32r-sim.h.  They should be
defined in "cpu.h", "cpux.h" and "cpu2.h" but we currently cannot do that.

It also moves declarations of four functions out of two #ifndef blocks to
make those function available on all cases.
---
 sim/m32r/m32r-sim.h | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/sim/m32r/m32r-sim.h b/sim/m32r/m32r-sim.h
index 0c5103b0784..189be8868e1 100644
--- a/sim/m32r/m32r-sim.h
+++ b/sim/m32r/m32r-sim.h
@@ -42,9 +42,6 @@ extern int m32r_decode_gdb_ctrl_regnum (int);
 #define GET_H_SM() ((CPU (h_psw) & 0x80) != 0)
 
 #ifndef GET_H_CR
-extern USI  m32rbf_h_cr_get_handler (SIM_CPU *, UINT);
-extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI);
-
 #define GET_H_CR(regno) \
   XCONCAT2 (WANT_CPU,_h_cr_get_handler) (current_cpu, (regno))
 #define SET_H_CR(regno, val) \
@@ -52,9 +49,6 @@ extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI);
 #endif
 
 #ifndef  GET_H_PSW
-extern UQI  m32rbf_h_psw_get_handler (SIM_CPU *);
-extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI);
-
 #define GET_H_PSW() \
   XCONCAT2 (WANT_CPU,_h_psw_get_handler) (current_cpu)
 #define SET_H_PSW(val) \
@@ -68,8 +62,26 @@ extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI);
 
    The correct solution is to fix the code in cgen/sim.scm to generate
    prototypes for each of the functions it generates.  */
+extern USI  m32rbf_h_cr_get_handler (SIM_CPU *, UINT);
+extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI);
+extern USI  m32rxf_h_cr_get_handler (SIM_CPU *, UINT);
+extern void m32rxf_h_cr_set_handler (SIM_CPU *, UINT, USI);
+extern USI  m32r2f_h_cr_get_handler (SIM_CPU *, UINT);
+extern void m32r2f_h_cr_set_handler (SIM_CPU *, UINT, USI);
+extern UQI  m32rbf_h_psw_get_handler (SIM_CPU *);
+extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI);
+extern UQI  m32rxf_h_psw_get_handler (SIM_CPU *);
+extern void m32rxf_h_psw_set_handler (SIM_CPU *, UQI);
+extern UQI  m32r2f_h_psw_get_handler (SIM_CPU *);
+extern void m32r2f_h_psw_set_handler (SIM_CPU *, UQI);
 extern DI   m32rbf_h_accum_get_handler (SIM_CPU *);
 extern void m32rbf_h_accum_set_handler (SIM_CPU *, DI);
+extern DI   m32rxf_h_accum_get_handler (SIM_CPU *);
+extern void m32rxf_h_accum_set_handler (SIM_CPU *, DI);
+extern DI   m32r2f_h_accum_get_handler (SIM_CPU *);
+extern void m32r2f_h_accum_set_handler (SIM_CPU *, DI);
+extern DI   m32rxf_h_accums_get_handler (SIM_CPU *, UINT);
+extern void m32rxf_h_accums_set_handler (SIM_CPU *, UINT, DI);
 extern DI   m32r2f_h_accums_get_handler (SIM_CPU *, UINT);
 extern void m32r2f_h_accums_set_handler (SIM_CPU *, UINT, DI);
 
-- 
2.34.1

[PATCH 22/40] sim/m32r: Fixes to Linux emulator

[Tsukasa OI]

This commit fixes various M32R Linux emulator issues.

1.  Some header files were missing
    a.  <sys/ioctl.h> for ioctl
    b.  <sys/fsuid.h> for setfsuid/setfsgid (Linux 1.2 or later)
    c.  <sys/file.h> for flock (a syscall on Linux 2.0 or later)
    d.  <sys/sendfile.h> for sendfile (Linux 2.2 or later)
2.  syslog function must be called as a syscall rather than POSIX syslog
    because we are emulating Linux system calls on the Linux host.
3.  ftime function is deprecated but used intentionally.
    We have to disable deprecated function warning.
---
 sim/m32r/traps.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c
index f0fb218a11d..de275b06a40 100644
--- a/sim/m32r/traps.c
+++ b/sim/m32r/traps.c
@@ -20,6 +20,7 @@
 /* This must come before any other includes.  */
 #include "defs.h"
 
+#include "diagnostics.h"
 #include "portability.h"
 #include "sim-main.h"
 #include "sim-signal.h"
@@ -38,9 +39,14 @@
    NB: The emulation is also missing argument conversion (endian & bitsize)
    even on Linux hosts.  */
 #ifdef __linux__
+#include <sys/file.h>
+#include <sys/fsuid.h>
+#include <sys/ioctl.h>
 #include <sys/mman.h>
 #include <sys/poll.h>
 #include <sys/resource.h>
+#include <sys/sendfile.h>
+#include <sys/syscall.h>
 #include <sys/sysinfo.h>
 #include <sys/stat.h>
 #include <sys/time.h>
@@ -397,7 +403,10 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
 	    {
 	      struct timeb t;
 
+DIAGNOSTIC_PUSH
+DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS
 	      result = ftime (&t);
+DIAGNOSTIC_POP
 	      errcode = errno;
 
 	      if (result != 0)
@@ -851,7 +860,7 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
 	    break;
 
 	  case TARGET_LINUX_SYS_syslog:
-	    result = syslog (arg1, (char *) t2h_addr (cb, &s, arg2));
+	    result = syscall (SYS_syslog, arg1, (char *) t2h_addr (cb, &s, arg2), arg3);
 	    errcode = errno;
 	    break;
 
-- 
2.34.1

[PATCH 23/40] sim/m32r: Add explicit casts

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts on the M32R instruction decoder.

Note:
This commit touches CGEN-generated files directly.
Modifying CGEN is the best way to prevent this issue from happening again
but there is another known regression in CGEN or sim/m32r to resolve.
---
 sim/m32r/decode.c  | 14 +++++++-------
 sim/m32r/decode2.c | 14 +++++++-------
 sim/m32r/decodex.c | 14 +++++++-------
 3 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/sim/m32r/decode.c b/sim/m32r/decode.c
index 4b4b9f922e2..8066425c0d6 100644
--- a/sim/m32r/decode.c
+++ b/sim/m32r/decode.c
@@ -39,12 +39,12 @@ static IDESC m32rbf_insn_data[M32RBF_INSN__MAX];
 
 static const struct insn_sem m32rbf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY },
   { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD },
   { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 },
   { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD },
@@ -153,7 +153,7 @@ static const struct insn_sem m32rbf_insn_sem[] =
 
 static const struct insn_sem m32rbf_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
diff --git a/sim/m32r/decode2.c b/sim/m32r/decode2.c
index 00b216b83fc..4833a3aa9ab 100644
--- a/sim/m32r/decode2.c
+++ b/sim/m32r/decode2.c
@@ -43,12 +43,12 @@ static IDESC m32r2f_insn_data[M32R2F_INSN__MAX];
 
 static const struct insn_sem m32r2f_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_AFTER, M32R2F_INSN_X_AFTER, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_BEFORE, M32R2F_INSN_X_BEFORE, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_CTI_CHAIN, M32R2F_INSN_X_CTI_CHAIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_CHAIN, M32R2F_INSN_X_CHAIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_BEGIN, M32R2F_INSN_X_BEGIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, M32R2F_INSN_X_AFTER, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, M32R2F_INSN_X_BEFORE, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, M32R2F_INSN_X_CTI_CHAIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, M32R2F_INSN_X_CHAIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, M32R2F_INSN_X_BEGIN, M32R2F_SFMT_EMPTY, NOPAR, NOPAR  },
   { M32R_INSN_ADD, M32R2F_INSN_ADD, M32R2F_SFMT_ADD, M32R2F_INSN_PAR_ADD, M32R2F_INSN_WRITE_ADD },
   { M32R_INSN_ADD3, M32R2F_INSN_ADD3, M32R2F_SFMT_ADD3, NOPAR, NOPAR  },
   { M32R_INSN_AND, M32R2F_INSN_AND, M32R2F_SFMT_ADD, M32R2F_INSN_PAR_AND, M32R2F_INSN_WRITE_AND },
@@ -186,7 +186,7 @@ static const struct insn_sem m32r2f_insn_sem[] =
 
 static const struct insn_sem m32r2f_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32R2F_INSN_X_INVALID, M32R2F_SFMT_EMPTY, NOPAR, NOPAR
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
diff --git a/sim/m32r/decodex.c b/sim/m32r/decodex.c
index 19bb1e5b8ff..4d77350b99a 100644
--- a/sim/m32r/decodex.c
+++ b/sim/m32r/decodex.c
@@ -43,12 +43,12 @@ static IDESC m32rxf_insn_data[M32RXF_INSN__MAX];
 
 static const struct insn_sem m32rxf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_AFTER, M32RXF_INSN_X_AFTER, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_BEFORE, M32RXF_INSN_X_BEFORE, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_CTI_CHAIN, M32RXF_INSN_X_CTI_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_CHAIN, M32RXF_INSN_X_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
-  { VIRTUAL_INSN_X_BEGIN, M32RXF_INSN_X_BEGIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, M32RXF_INSN_X_AFTER, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, M32RXF_INSN_X_BEFORE, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, M32RXF_INSN_X_CTI_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, M32RXF_INSN_X_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, M32RXF_INSN_X_BEGIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR  },
   { M32R_INSN_ADD, M32RXF_INSN_ADD, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_ADD, M32RXF_INSN_WRITE_ADD },
   { M32R_INSN_ADD3, M32RXF_INSN_ADD3, M32RXF_SFMT_ADD3, NOPAR, NOPAR  },
   { M32R_INSN_AND, M32RXF_INSN_AND, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_AND, M32RXF_INSN_WRITE_AND },
@@ -179,7 +179,7 @@ static const struct insn_sem m32rxf_insn_sem[] =
 
 static const struct insn_sem m32rxf_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
-- 
2.34.1

[PATCH 24/40] sim/mips: Fix enum type-related issues on cp1.c

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts and change a type on sim/mips/cp1.c.
---
 sim/mips/cp1.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sim/mips/cp1.c b/sim/mips/cp1.c
index 196173c0227..56a40c00623 100644
--- a/sim/mips/cp1.c
+++ b/sim/mips/cp1.c
@@ -1178,7 +1178,7 @@ inner_rsqrt(uint64_t op1,
 	uint32_t res;
 	sim_fpu_32to (&wop1, op1);
 	status |= sim_fpu_sqrt (&ans, &wop1);
-	status |= sim_fpu_round_32 (&ans, status, round);
+	status |= sim_fpu_round_32 (&ans, (sim_fpu_round) status, (sim_fpu_denorm) round);
 	wop1 = ans;
 	op_status = sim_fpu_inv (&ans, &wop1);
 	op_status |= sim_fpu_round_32 (&ans, round, denorm);
@@ -1216,7 +1216,7 @@ fp_inv_sqrt(sim_cpu *cpu,
 	    FP_formats fmt)
 {
   sim_fpu_round round = rounding_mode (GETRM());
-  sim_fpu_round denorm = denorm_mode (cpu);
+  sim_fpu_denorm denorm = denorm_mode (cpu);
   sim_fpu_status status = 0;
   uint64_t result = 0;
 
@@ -1903,8 +1903,8 @@ convert_ps (sim_cpu *cpu,
       result = (((uint64_t)res_u) << 32) | (uint64_t)res_l;
       break;
     case fmt_ps:
-      status_u |= sim_fpu_round_32 (&wop_u, 0, round);
-      status_l |= sim_fpu_round_32 (&wop_l, 0, round);
+      status_u |= sim_fpu_round_32 (&wop_u, 0, (sim_fpu_denorm) round);
+      status_l |= sim_fpu_round_32 (&wop_l, 0, (sim_fpu_denorm) round);
       sim_fpu_to32 (&res_u, &wop_u);
       sim_fpu_to32 (&res_l, &wop_l);
       result = FP_PS_cat(res_u, res_l);
-- 
2.34.1

[PATCH 25/40] sim/mn10300: Add an explicit cast

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds an explicit cast.
---
 sim/mn10300/op_utils.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/sim/mn10300/op_utils.c b/sim/mn10300/op_utils.c
index 2fccf2da207..34b1b8e3951 100644
--- a/sim/mn10300/op_utils.c
+++ b/sim/mn10300/op_utils.c
@@ -152,8 +152,9 @@ do_syscall (SIM_DESC sd)
   if (cb_target_to_host_syscall (STATE_CALLBACK (sd), func) == CB_SYS_exit)
     {
       /* EXIT - caller can look in parm1 to work out the reason */
-      sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC,
-		       (parm1 == 0xdead ? SIM_SIGABRT : sim_exited), parm1);
+      sim_engine_halt (
+	  simulator, STATE_CPU (simulator, 0), NULL, PC,
+	  (parm1 == 0xdead ? (enum sim_stop) SIM_SIGABRT : sim_exited), parm1);
     }
   else
     {
-- 
2.34.1

[PATCH 26/40] sim/ppc: Remove getrusage declarations if possible

[Tsukasa OI]

Clang generates a warning if there is a function declaration/definition
with zero arguments.  Such declarations/definitions without a prototype (an
argument list) are deprecated forms of indefinite arguments
("-Wdeprecated-non-prototype").  On the default configuration, it causes a
build failure (unless "--disable-werror" is specified).

This commit removes redundant and indefinite getrusage function declarations
if the known getrusage declaration is found.
---
 sim/ppc/emul_netbsd.c | 2 ++
 sim/ppc/emul_unix.c   | 2 ++
 sim/ppc/mon.c         | 2 ++
 3 files changed, 6 insertions(+)

diff --git a/sim/ppc/emul_netbsd.c b/sim/ppc/emul_netbsd.c
index 322b584a3f1..072a5df5598 100644
--- a/sim/ppc/emul_netbsd.c
+++ b/sim/ppc/emul_netbsd.c
@@ -48,8 +48,10 @@
 
 #ifdef HAVE_GETRUSAGE
 #include <sys/resource.h>
+#ifndef HAVE_DECL_GETRUSAGE
 int getrusage();
 #endif
+#endif
 
 #if HAVE_SYS_IOCTL_H
 #include <sys/ioctl.h>
diff --git a/sim/ppc/emul_unix.c b/sim/ppc/emul_unix.c
index 57691d4befc..6d4c2dad944 100644
--- a/sim/ppc/emul_unix.c
+++ b/sim/ppc/emul_unix.c
@@ -95,8 +95,10 @@
 
 #ifdef HAVE_GETRUSAGE
 #include <sys/resource.h>
+#ifndef HAVE_DECL_GETRUSAGE
 int getrusage();
 #endif
+#endif
 
 #if HAVE_DIRENT_H
 # include <dirent.h>
diff --git a/sim/ppc/mon.c b/sim/ppc/mon.c
index 4e29ec99879..3e88829f688 100644
--- a/sim/ppc/mon.c
+++ b/sim/ppc/mon.c
@@ -38,8 +38,10 @@
 
 #ifdef HAVE_SYS_RESOURCE_H
 #include <sys/resource.h>
+#ifndef HAVE_DECL_GETRUSAGE
 int getrusage();
 #endif
+#endif
 
 #include "basics.h"
 #include "cpu.h"
-- 
2.34.1

[PATCH 27/40] sim/ppc: Add extra parenthesis to avoid ambiguity

[Tsukasa OI]

Clang generates a warning if it considers that an expression is misleading
due to a lack of parenthesis ("-Wparentheses").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds extra parenthesis to avoid ambiguity.
---
 sim/ppc/altivec.igen | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/ppc/altivec.igen b/sim/ppc/altivec.igen
index 63fe95a53d5..eda7af9dd6a 100644
--- a/sim/ppc/altivec.igen
+++ b/sim/ppc/altivec.igen
@@ -231,7 +231,7 @@ void::model-function::ppc_insn_vr_vscr:itable_index index, model_data *model_ptr
 	busy_ptr->vscr_busy = 1;
 
 	if (out_vmask)
-	  busy_ptr->nr_writebacks = 1 + (PPC_ONE_BIT_SET_P(out_vmask)) ? 1 : 2;
+	  busy_ptr->nr_writebacks = (1 + (PPC_ONE_BIT_SET_P(out_vmask))) ? 1 : 2;
 
 	if (WITH_TRACE && ppc_trace[trace_model])
 	  model_trace_altivec_make_busy(model_ptr, vr_mask, 0);
-- 
2.34.1

[PATCH 28/40] sim/ppc: Initialize stat type buffer

[Tsukasa OI]

On do_fstat function, stat typed buffer buf is passed to write_buf function
uninitialized when fdbad(fd) is not zero.

This commit initializes the buffer with the default value.
---
 sim/ppc/emul_netbsd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/ppc/emul_netbsd.c b/sim/ppc/emul_netbsd.c
index 072a5df5598..34ad86ccbe9 100644
--- a/sim/ppc/emul_netbsd.c
+++ b/sim/ppc/emul_netbsd.c
@@ -881,7 +881,7 @@ do_fstat(os_emul_data *emul,
 {
   int fd = cpu_registers(processor)->gpr[arg0];
   unsigned_word stat_buf_addr = cpu_registers(processor)->gpr[arg0+1];
-  struct stat buf;
+  struct stat buf = {};
   int status;
 #ifdef SYS_fstat
   SYS(fstat);
-- 
2.34.1

[PATCH 29/40] sim/ppc: Fix indentation on generated code

[Tsukasa OI]

Clang generates a warning if there is a block statement and another
adjacent statement with a misleading indent ("-Wmisleading-indentation").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

The cause of this warning, $(builddir)/sim/ppc/semantics.c is generated by
$(srcdir)/sim/ppc/igen.c and this commit fixes generating misleading
indentation by removing two spaces.
---
 sim/ppc/igen.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/ppc/igen.c b/sim/ppc/igen.c
index 27b48638276..786ea540d57 100644
--- a/sim/ppc/igen.c
+++ b/sim/ppc/igen.c
@@ -233,7 +233,7 @@ gen_semantics_c(insn_table *table,
     lf_printf(file, "  option_mpc860c0 = 0;\n");
     lf_printf(file, "  if (tree_find_property(root, \"/options/mpc860c0\"))\n");
     lf_printf(file, "    option_mpc860c0 = tree_find_integer_property(root, \"/options/mpc860c0\");\n");
-    lf_printf(file, "    option_mpc860c0 *= 4;   /* convert word count to byte count */\n");
+    lf_printf(file, "  option_mpc860c0 *= 4;   /* convert word count to byte count */\n");
     lf_printf(file, "}\n");
     lf_printf(file, "\n");
     if (generate_expanded_instructions)
-- 
2.34.1

[PATCH 30/40] sim/ppc: Use TRACE with initialized entry_point

[Tsukasa OI]

On a TRACE call on sim_create_inferior, a variable entry_point is not
initialized. This commit moves the TRACE call to where the entry_point
is initialized.
---
 sim/ppc/sim_calls.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sim/ppc/sim_calls.c b/sim/ppc/sim_calls.c
index 729f6dcb6f3..eddce4ac00a 100644
--- a/sim/ppc/sim_calls.c
+++ b/sim/ppc/sim_calls.c
@@ -161,8 +161,6 @@ sim_create_inferior (SIM_DESC sd,
 		     char * const *envp)
 {
   unsigned_word entry_point;
-  TRACE(trace_gdb, ("sim_create_inferior(start_address=0x%x, ...)\n",
-		    entry_point));
 
   if (simulator == NULL)
     error ("No program loaded");
@@ -171,6 +169,8 @@ sim_create_inferior (SIM_DESC sd,
     entry_point = bfd_get_start_address (abfd);
   else
     entry_point = 0xfff00000; /* ??? */
+  TRACE(trace_gdb, ("sim_create_inferior(start_address=0x%x, ...)\n",
+		    entry_point));
 
   psim_init(simulator);
   psim_stack(simulator, argv, envp);
-- 
2.34.1

[PATCH 31/40] sim/ppc: Initialize help variables

[Tsukasa OI]

GCC / Clang generate a warning if a variables is used uninitialized on some
cases.  On the default configuration, it causes a build failure (unless
"--disable-werror" is specified).

This commit initializes two help variables with { 0 }.
---
 sim/ppc/hw_sem.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sim/ppc/hw_sem.c b/sim/ppc/hw_sem.c
index 937e2ad6f81..034191b10b7 100644
--- a/sim/ppc/hw_sem.c
+++ b/sim/ppc/hw_sem.c
@@ -109,7 +109,7 @@ hw_sem_init_data(device *me)
   hw_sem_device *sem = (hw_sem_device*)device_data(me);
   const device_unit *d;
   int status;
-  union semun help;
+  union semun help = { 0 };
 
   /* initialize the properties of the sem */
 
@@ -188,7 +188,7 @@ hw_sem_io_read_buffer(device *me,
   struct sembuf sb;
   int status;
   uint32_t u32;
-  union semun help;
+  union semun help = { 0 };
 
   /* do we need to worry about out of range addresses? */
 
-- 
2.34.1

[PATCH 32/40] sim/ppc: Add an explicit cast

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds an explicit cast to hw_phb_decode type.
---
 sim/ppc/hw_phb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/ppc/hw_phb.c b/sim/ppc/hw_phb.c
index a3c19264235..a99a51d9cf9 100644
--- a/sim/ppc/hw_phb.c
+++ b/sim/ppc/hw_phb.c
@@ -319,7 +319,7 @@ hw_phb_attach_address(device *me,
   /* attach it to the relevent bus */
   DTRACE(phb, ("attach %s - %s %s:0x%lx (0x%lx bytes)\n",
 	       device_path(client),
-	       hw_phb_decode_name(type),
+	       hw_phb_decode_name((hw_phb_decode)type),
 	       pci_space->name,
 	       (unsigned long)addr,
 	       (unsigned long)nr_bytes));
-- 
2.34.1

[PATCH 33/40] sim/ppc: Initialize reg and control_nr

[Tsukasa OI]

GCC generates a warning if a variable may be used uninitialized on some
cases ("-Wmaybe-uninitialized").  Despite that GCC will not cause a build
failure even when "--enable-werror" is specified, it would be nice to get
rid of it.

This commit initializes variables "reg" and "control_nr" when declared.
---
 sim/ppc/hw_ide.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/sim/ppc/hw_ide.c b/sim/ppc/hw_ide.c
index af61eeccab6..b4ac8e99204 100644
--- a/sim/ppc/hw_ide.c
+++ b/sim/ppc/hw_ide.c
@@ -729,8 +729,8 @@ hw_ide_io_read_buffer(device *me,
 		      unsigned_word cia)
 {
   hw_ide_device *ide = (hw_ide_device *)device_data(me);
-  int control_nr;
-  int reg;
+  int control_nr = 0;
+  int reg = 0;
   ide_controller *controller;
 
   /* find the interface */
@@ -783,8 +783,8 @@ hw_ide_io_write_buffer(device *me,
 		       unsigned_word cia)
 {
   hw_ide_device *ide = (hw_ide_device *)device_data(me);
-  int control_nr;
-  int reg;
+  int control_nr = 0;
+  int reg = 0;
   ide_controller *controller;
 
   /* find the interface */
-- 
2.34.1

[PATCH 34/40] sim/rx: Mark unused function

[Tsukasa OI]

Clang generates a warning if there is a unused static function
("-Wunused-function").  On the default configuration, it causes a build
failure (unless "--disable-werror" is specified).

Although that this is completely unused, the author considers that this is
_happened to be_ unused and choose to keep this function for now.

Instead, this commit adds ATTRIBUTE_UNUSED.
---
 sim/rx/rx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/rx/rx.c b/sim/rx/rx.c
index 70b1b9729b7..8646c20d108 100644
--- a/sim/rx/rx.c
+++ b/sim/rx/rx.c
@@ -754,7 +754,7 @@ typedef union {
   float f;
 } FloatInt;
 
-static inline int
+static inline int ATTRIBUTE_UNUSED
 float2int (float f)
 {
   FloatInt fi;
-- 
2.34.1

[PATCH 35/40] sim/sh: Initialize some variables

[Tsukasa OI]

Clang generates a warning if a variable may be used uninitialized on some
cases ("-Wsometimes-uninitialized").  On the default configuration, it
causes a build failure (unless "--disable-werror" is specified).

The cause of this error, $(builddir)/sim/sh/ppi.c is generated from
$(srcdir)/sim/sh/gencode.c.  Clang will detect the variable res may be used
uninitialized when used on some cases.

Likewise, GCC generates a warning if a variable may be used uninitialized
on some cases ("-Wmaybe-uninitialized").

GCC will detect variables res, res_grd, carry, overflow and greater_equal
may be used uninitialized on some cases.  Despite that GCC will not cause a
build failure even when "--enable-werror" is specified, it would be better
to fix this as well since the cause is in the same function.
---
 sim/sh/gencode.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index 5eb7caf2589..03979695b08 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -3257,8 +3257,8 @@ ppi_gensim (void)
   printf ("  static char const u_tab[] = { 8, 10,  7,  5};\n");
   printf ("\n");
   printf ("  int z;\n");
-  printf ("  int res, res_grd;\n");
-  printf ("  int carry, overflow, greater_equal;\n");
+  printf ("  int res = 0, res_grd = 0;\n");
+  printf ("  int carry = 0, overflow = 0, greater_equal = 0;\n");
   printf ("\n");
   printf ("  switch (ppi_table[iword >> 4]) {\n");
 
-- 
2.34.1

[PATCH 36/40] sim/sh: Use fabs instead of abs

[Tsukasa OI]

Clang generates a warning if abs function is called with a floating point
argument ("-Wabsolute-value").  On the default configuration, it causes a
build failure (unless "--disable-werror" is specified).

After careful investigation, it is concluded that replacing abs with fabs
is completely safe.
---
 sim/sh/interp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index fb92d9f4480..38f3f945a35 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -1401,7 +1401,7 @@ fsca_s (int in, double (*f) (double))
   lower = result - error;
   frac = frexp (lower, &exp);
   lower = ldexp (ceil (ldexp (frac, 24)), exp - 24);
-  return abs (upper - result) >= abs (lower - result) ? upper : lower;
+  return fabs (upper - result) >= fabs (lower - result) ? upper : lower;
 }
 
 static float
-- 
2.34.1

[PATCH 37/40] sim/sh: Remove redundant function declaration

[Tsukasa OI]

Clang generates a warning if there is a function declaration/definition
with zero arguments.  Such declarations/definitions without a prototype (an
argument list) are deprecated forms of indefinite arguments
("-Wdeprecated-non-prototype").  On the default configuration, it causes a
build failure (unless "--disable-werror" is specified).

But there is another issue.  This function declaration in sim/sh/interp.c
is completely redundant.  This commit just removes that declaration.
---
 sim/sh/interp.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index 38f3f945a35..b6f29880d74 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -1492,8 +1492,6 @@ get_loop_bounds (int rs, int re, unsigned char *memory, unsigned char *mem_end,
   return loop;
 }
 
-static void ppi_insn ();
-
 #include "ppi.c"
 
 /* Provide calloc / free versions that use an anonymous mmap.  This can
-- 
2.34.1

[PATCH 38/40] sim/bpf: Add explicit casts

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts on the BPF instruction decoder.

Note:
This commit touches CGEN-generated files directly.
Modifying CGEN is the best way to prevent this issue from happening again
but there is another known regression in CGEN to resolve.
---
 sim/bpf/decode-be.c | 14 +++++++-------
 sim/bpf/decode-le.c | 14 +++++++-------
 2 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/sim/bpf/decode-be.c b/sim/bpf/decode-be.c
index e18c9578629..3698db71319 100644
--- a/sim/bpf/decode-be.c
+++ b/sim/bpf/decode-be.c
@@ -42,12 +42,12 @@ static IDESC bpfbf_ebpfbe_insn_data[BPFBF_EBPFBE_INSN__MAX];
 
 static const struct insn_sem bpfbf_ebpfbe_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, BPFBF_EBPFBE_INSN_X_INVALID, BPFBF_EBPFBE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, BPFBF_EBPFBE_INSN_X_AFTER, BPFBF_EBPFBE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, BPFBF_EBPFBE_INSN_X_BEFORE, BPFBF_EBPFBE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, BPFBF_EBPFBE_INSN_X_CTI_CHAIN, BPFBF_EBPFBE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, BPFBF_EBPFBE_INSN_X_CHAIN, BPFBF_EBPFBE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, BPFBF_EBPFBE_INSN_X_BEGIN, BPFBF_EBPFBE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, BPFBF_EBPFBE_INSN_X_INVALID, BPFBF_EBPFBE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, BPFBF_EBPFBE_INSN_X_AFTER, BPFBF_EBPFBE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, BPFBF_EBPFBE_INSN_X_BEFORE, BPFBF_EBPFBE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, BPFBF_EBPFBE_INSN_X_CTI_CHAIN, BPFBF_EBPFBE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, BPFBF_EBPFBE_INSN_X_CHAIN, BPFBF_EBPFBE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, BPFBF_EBPFBE_INSN_X_BEGIN, BPFBF_EBPFBE_SFMT_EMPTY },
   { BPF_INSN_ADDIBE, BPFBF_EBPFBE_INSN_ADDIBE, BPFBF_EBPFBE_SFMT_ADDIBE },
   { BPF_INSN_ADDRBE, BPFBF_EBPFBE_INSN_ADDRBE, BPFBF_EBPFBE_SFMT_ADDRBE },
   { BPF_INSN_ADD32IBE, BPFBF_EBPFBE_INSN_ADD32IBE, BPFBF_EBPFBE_SFMT_ADDIBE },
@@ -175,7 +175,7 @@ static const struct insn_sem bpfbf_ebpfbe_insn_sem[] =
 
 static const struct insn_sem bpfbf_ebpfbe_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, BPFBF_EBPFBE_INSN_X_INVALID, BPFBF_EBPFBE_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, BPFBF_EBPFBE_INSN_X_INVALID, BPFBF_EBPFBE_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
diff --git a/sim/bpf/decode-le.c b/sim/bpf/decode-le.c
index ff5bb3cca67..5920e799047 100644
--- a/sim/bpf/decode-le.c
+++ b/sim/bpf/decode-le.c
@@ -42,12 +42,12 @@ static IDESC bpfbf_ebpfle_insn_data[BPFBF_EBPFLE_INSN__MAX];
 
 static const struct insn_sem bpfbf_ebpfle_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, BPFBF_EBPFLE_INSN_X_INVALID, BPFBF_EBPFLE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, BPFBF_EBPFLE_INSN_X_AFTER, BPFBF_EBPFLE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, BPFBF_EBPFLE_INSN_X_BEFORE, BPFBF_EBPFLE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, BPFBF_EBPFLE_INSN_X_CTI_CHAIN, BPFBF_EBPFLE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, BPFBF_EBPFLE_INSN_X_CHAIN, BPFBF_EBPFLE_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, BPFBF_EBPFLE_INSN_X_BEGIN, BPFBF_EBPFLE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, BPFBF_EBPFLE_INSN_X_INVALID, BPFBF_EBPFLE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, BPFBF_EBPFLE_INSN_X_AFTER, BPFBF_EBPFLE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, BPFBF_EBPFLE_INSN_X_BEFORE, BPFBF_EBPFLE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, BPFBF_EBPFLE_INSN_X_CTI_CHAIN, BPFBF_EBPFLE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, BPFBF_EBPFLE_INSN_X_CHAIN, BPFBF_EBPFLE_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, BPFBF_EBPFLE_INSN_X_BEGIN, BPFBF_EBPFLE_SFMT_EMPTY },
   { BPF_INSN_ADDILE, BPFBF_EBPFLE_INSN_ADDILE, BPFBF_EBPFLE_SFMT_ADDILE },
   { BPF_INSN_ADDRLE, BPFBF_EBPFLE_INSN_ADDRLE, BPFBF_EBPFLE_SFMT_ADDRLE },
   { BPF_INSN_ADD32ILE, BPFBF_EBPFLE_INSN_ADD32ILE, BPFBF_EBPFLE_SFMT_ADDILE },
@@ -175,7 +175,7 @@ static const struct insn_sem bpfbf_ebpfle_insn_sem[] =
 
 static const struct insn_sem bpfbf_ebpfle_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, BPFBF_EBPFLE_INSN_X_INVALID, BPFBF_EBPFLE_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, BPFBF_EBPFLE_INSN_X_INVALID, BPFBF_EBPFLE_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
-- 
2.34.1

[PATCH 39/40] sim/iq2000: Add explicit casts

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts on the IQ2000 instruction decoder.

Note:
This commit touches CGEN-generated files directly.
Modifying CGEN is the best way to prevent this issue from happening again
but there is another known regression in CGEN or sim/iq2000 to resolve.
---
 sim/iq2000/decode.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/sim/iq2000/decode.c b/sim/iq2000/decode.c
index 3c6ea7c80e3..3a94154391c 100644
--- a/sim/iq2000/decode.c
+++ b/sim/iq2000/decode.c
@@ -39,12 +39,12 @@ static IDESC iq2000bf_insn_data[IQ2000BF_INSN__MAX];
 
 static const struct insn_sem iq2000bf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, IQ2000BF_INSN_X_AFTER, IQ2000BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, IQ2000BF_INSN_X_BEFORE, IQ2000BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, IQ2000BF_INSN_X_CTI_CHAIN, IQ2000BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, IQ2000BF_INSN_X_CHAIN, IQ2000BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, IQ2000BF_INSN_X_BEGIN, IQ2000BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, IQ2000BF_INSN_X_AFTER, IQ2000BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, IQ2000BF_INSN_X_BEFORE, IQ2000BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, IQ2000BF_INSN_X_CTI_CHAIN, IQ2000BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, IQ2000BF_INSN_X_CHAIN, IQ2000BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, IQ2000BF_INSN_X_BEGIN, IQ2000BF_SFMT_EMPTY },
   { IQ2000_INSN_ADD, IQ2000BF_INSN_ADD, IQ2000BF_SFMT_ADD },
   { IQ2000_INSN_ADDI, IQ2000BF_INSN_ADDI, IQ2000BF_SFMT_ADDI },
   { IQ2000_INSN_ADDIU, IQ2000BF_INSN_ADDIU, IQ2000BF_SFMT_ADDI },
@@ -193,7 +193,7 @@ static const struct insn_sem iq2000bf_insn_sem[] =
 
 static const struct insn_sem iq2000bf_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, IQ2000BF_INSN_X_INVALID, IQ2000BF_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
-- 
2.34.1

[PATCH 40/40] sim/or1k: Add explicit casts

[Tsukasa OI]

Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts on the OpenRISC 1000 instruction decoder.

Note:
This commit touches CGEN-generated files directly.
Modifying CGEN is the best way to prevent this issue from happening again
but there is another possible regression in CGEN to resolve.
---
 sim/or1k/decode.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/sim/or1k/decode.c b/sim/or1k/decode.c
index 5da574794fd..a46c1513af3 100644
--- a/sim/or1k/decode.c
+++ b/sim/or1k/decode.c
@@ -40,12 +40,12 @@ static IDESC or1k32bf_insn_data[OR1K32BF_INSN__MAX];
 
 static const struct insn_sem or1k32bf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, OR1K32BF_INSN_X_AFTER, OR1K32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, OR1K32BF_INSN_X_BEFORE, OR1K32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, OR1K32BF_INSN_X_CTI_CHAIN, OR1K32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, OR1K32BF_INSN_X_CHAIN, OR1K32BF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, OR1K32BF_INSN_X_BEGIN, OR1K32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, OR1K32BF_INSN_X_AFTER, OR1K32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, OR1K32BF_INSN_X_BEFORE, OR1K32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, OR1K32BF_INSN_X_CTI_CHAIN, OR1K32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, OR1K32BF_INSN_X_CHAIN, OR1K32BF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, OR1K32BF_INSN_X_BEGIN, OR1K32BF_SFMT_EMPTY },
   { OR1K_INSN_L_J, OR1K32BF_INSN_L_J, OR1K32BF_SFMT_L_J },
   { OR1K_INSN_L_ADRP, OR1K32BF_INSN_L_ADRP, OR1K32BF_SFMT_L_ADRP },
   { OR1K_INSN_L_JAL, OR1K32BF_INSN_L_JAL, OR1K32BF_SFMT_L_JAL },
@@ -191,7 +191,7 @@ static const struct insn_sem or1k32bf_insn_sem[] =
 
 static const struct insn_sem or1k32bf_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, OR1K32BF_INSN_X_INVALID, OR1K32BF_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */
-- 
2.34.1

Re: [PATCH 02/40] sim: Check known getrusage declaration existence

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is a function declaration/definition
> with zero arguments. Such declarations/definitions without a prototype (an
> argument list) are deprecated forms of indefinite arguments
> ("-Wdeprecated-non-prototype"). On the default configuration, it causes a
> build failure (unless "--disable-werror" is specified).
> 
> Such getrusage function declarations are placed in three files under sim/ppc
> and to avoid defining those on the modern environments, this commit will
> make the configuration script to find the known declaration of getrusage
> and defines HAVE_DECL_GETRUSAGE if it finds one.
> 
> If we find one (and we *will* in most modern environments), we don't need
> to rely on the deprecated declarations.
> ---
>  sim/config.h.in  |  4 ++++
>  sim/configure    | 32 ++++++++++++++++++++++++++++++++
>  sim/configure.ac | 10 ++++++++++
>  3 files changed, 46 insertions(+)

you didn't actually fix the bad prototypes in the ppc code -- just delete them.
pretty sure once you do, you won't need any of these changes.
-mike

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Re: [PATCH 03/40] sim/aarch64: Remove unused functions

[Mike Frysinger]

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looks fine, but Andrew Burgess posted the same fix
-mike

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Re: [PATCH 08/40] sim/erc32: Insert void parameter

[Mike Frysinger]

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lgtm
-mike

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Re: [PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is a redundant self-assignment
> ("-Wself-assign").  On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> However, removing self-assignments in step_once function makes the code less
> readable.  Instead, this commit inserts dummy addition to match the comments
> "Value added == 0".  This is redundant but will suppress warnings and
> matches with other branches better.  It will be also optimized away so we
> can ignore performance impact on this.
> ---
>  sim/h8300/compile.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> --- a/sim/h8300/compile.c
> +++ b/sim/h8300/compile.c
> @@ -4141,7 +4141,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
>  	  res = GET_B_REG (code->src.reg);	/* FIXME fetch? */
>  	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
>  	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
> -	    res = res;		/* Value added == 0.  */
> +	    res = res + 0x0;		/* Value added == 0.  */

Andrew posted a patch to just delete the assignment.  either is fine with me.
-mike

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Re: [PATCH 36/40] sim/sh: Use fabs instead of abs

[Mike Frysinger]

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lgtm
-mike

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Re: [PATCH 37/40] sim/sh: Remove redundant function declaration

[Mike Frysinger]

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lgtm
-mike

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Re: [PATCH 06/40] sim/cris: Move declarations of f_specific_init

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Declarations for MY (f_specific_init) functions are defined in CGEN-
> generated header files: sim/cris/decodev10.h (crisv10f_specific_init) and
> sim/cris/decodev32.h (crisv32f_specific_init).  However, those declarations
> are manually added by the commit 4e6e8ba7c565 ("sim: cris: clean up missing
> func prototype warnings") as a hack and not a CGEN-generated part.
> 
> Those definitions are required by $(builddir)/sim/cris/mloopv{10,32}f.c,
> generated from $(srcdir)/sim/cris/mloop.in.  If we define a declaration in
> mloop.in, we no longer need manually added one.
> 
> This commit adds a template for function declaration so that we no longer
> have to touch CGEN-generated code.  With this and the previous commit
> "cpu/cris: Add stall unit to CRIS v32", we can now safely regenerate
> CRIS CPU declarations with CGEN.
> ---
>  sim/cris/cris-tmpl.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c
> index 9f0c06e755e..8694d38b2af 100644
> --- a/sim/cris/cris-tmpl.c
> +++ b/sim/cris/cris-tmpl.c
> @@ -264,6 +264,8 @@ MY (make_thread_cpu_data) (SIM_CPU *current_cpu, void *context)
>  
>  /* Hook function for per-cpu simulator initialization.  */
>  
> +extern void MY (f_specific_init) (SIM_CPU *);
> +
>  void
>  MY (f_specific_init) (SIM_CPU *current_cpu)
>  {

putting the prototype here means function definition & function usage can fall
out of sync and not get any compile error.  that's why it has to be in a header
that both places include.

cris uses cris-sim.h for non-standard funcs like this (e.g. break_handler), so
the specific_init prototypes should be moved there too.
-mike

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Re: [PATCH 07/40] sim/cris: Regenerate with CGEN

[Mike Frysinger]

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the obvious parts (e.g. copyright updates) would be fine to merge now.
the rest should be reviewed by Hans-Peter Nilsson.
-mike

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Re: [PATCH 09/40] sim/erc32: Use int32_t as event callback argument

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if an argument is passed to a function without
> prototype (zero arguments, even without (void)).  Such calls are deprecated
> forms of indefinite arguments passing ("-Wdeprecated-non-prototype").
> On the default configuration, it causes a build failure (unless
> "--disable-werror" is specified).
> 
> To fix that, this commit makes struct evcell to use int32_t as a callback
> (cfunc) argument of an event.

would help to mention that int32_t was picked because that's what some parts
of the event/callback code is already using.

> ---
>  sim/erc32/erc32.c | 28 ++++++++++++++--------------
>  sim/erc32/func.c  |  8 ++++----
>  sim/erc32/sis.h   |  4 ++--
>  3 files changed, 20 insertions(+), 20 deletions(-)

README.sis needs updating.  otherwise looks OK.
-mike

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Re: [PATCH 10/40] sim/erc32: Use int32_t as IRQ callback argument

[Mike Frysinger]

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lgtm
-mike

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Re: [PATCH 13/40] sim/frv: Initialize some variables

[Mike Frysinger]

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once an FRV person approves the cpu/ stuff, this looks fine
-mike

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Re: [PATCH 12/40] sim/frv: Initialize nesr variable

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> GCC generates a warning if a variable may be used uninitialized on some
> cases ("-Wmaybe-uninitialized").  Despite that GCC will not cause a build
> failure even when "--enable-werror" is specified, it would be nice to get
> rid of it.
> 
> This commit initializes the variable nesr when declared.

afaict, the code as written is not using nesr uninitialized (well, it does,
but not in a way that changes behavior in the func, or is exposed out).  so
this looks fine because setting it to 0 initially in those cases also does
not change behavior.

i'm not familiar enough with FRV to say if pulling nesr from a diff place
would be more safe to future code refactors.  but since this port seems to
largely be stable at this point, this is probably fine.
-mike

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Re: [PATCH 14/40] sim/frv: Add explicit casts

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds explicit casts on the FR-V instruction decoder.
> 
> Note:
> This commit touches CGEN-generated files directly.
> Modifying CGEN is the best way to prevent this issue from happening again
> but there is another known regression in CGEN to resolve.

i don't know what regression you're referring to, but if the CGEN output does
this now, that's fine.  but if CGEN doesn't do this, we should get that fixed
first, or make sure the fix is in progress, not just reported.
-mike

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Re: [PATCH 16/40] sim/lm32: fix some missing function declaration warnings

[Mike Frysinger]

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lgtm
-mike

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Re: [PATCH 17/40] sim/lm32: Add explicit casts

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds explicit casts on the LatticeMico32 instruction decoder.
> 
> Note:
> This commit touches CGEN-generated files directly.
> Modifying CGEN is the best way to prevent this issue from happening again
> but there is another known regression in CGEN or sim/lm32 to resolve.

same feedback as what i said in "[PATCH 14/40] sim/frv: Add explicit casts"
-mike

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Re: [PATCH 18/40] sim/m32c: Stop using middle dot

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> The led_off array used 0xB7 (Latin-1 middle dot) but it heavily depends on
> the source code encoding.  Directly using 0xB7 here is very dangerous and

"very dangerous" is questionable

> Clang causes a compiler warning ("-Winvalid-source-encoding").
> On the other hand, using '\u00b7' here will assume UTF-8.

we only care about UTF-8.  no other encoding (except ASCII) matters.

> As a workaround, this commit replaces uses of 0xB7 with '.'
> (regular ASCII dot).

i don't have a sense of what this code is meant to do.  is it just debug
output for devs staring at the console ?  probably because of the CSI
escape sequences here (\e[m).  if that's the case, i'm fine with changing
it.  i'll note that the RX port seems to use @ & * instead ...
-mike

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Re: [PATCH 19/40] sim/m32r: Initialize "list" variable

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> The variable "list" is only initialized when arg1 > 0 and when arg1 == 0,
> an uninitialized value is passed to translate_endian_h2t function.
> 
> Although this behavior is harmless, this commit adds initialization to avoid
> a GCC warning ("-Wmaybe-uninitialized").

as you said, the code as-is is fine, but setting it to NULL to make the warning
go away sounds fine to me
-mike

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Re: [PATCH 20/40] sim/m32r: Prepare required functions

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> This commit includes necessary header files and creates duplicated
> declarations from other header files.
> 
> Duplicated declarations are necessary on M32R because, despite that some
> m32rbf functions are used by m32rx and m32r2, we cannot include two or more
> CPU header files: "cpu.h", "cpux.h" and "cpu2.h".

move/duplicate prototypes in a common header (e.g. m32r-sim.h) that both places
will include, never put them into a C file itself.  as written, there is no
protection keeping the prototypes in sync.
-mike

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Re: [PATCH 21/40] sim/m32r: Declare all required functions

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> This commit declares all required functions in m32r-sim.h.  They should be
> defined in "cpu.h", "cpux.h" and "cpu2.h" but we currently cannot do that.

the commit message needs to explain why it cannot be done correctly
-mike

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Re: [PATCH 22/40] sim/m32r: Fixes to Linux emulator

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> 1.  Some header files were missing

this looks fine

> 2.  syslog function must be called as a syscall rather than POSIX syslog
>     because we are emulating Linux system calls on the Linux host.

i don't think that is accurate.  if that were true, every other call in here
would be using syscall() instead of calling the C library functions.

> 3.  ftime function is deprecated but used intentionally.
>     We have to disable deprecated function warning.

this looks fine
-mike

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Re: [PATCH 23/40] sim/m32r: Add explicit casts

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds explicit casts on the M32R instruction decoder.
> 
> Note:
> This commit touches CGEN-generated files directly.
> Modifying CGEN is the best way to prevent this issue from happening again
> but there is another known regression in CGEN or sim/m32r to resolve.

same feedback as what i posted to "[PATCH 14/40] sim/frv: Add explicit casts"
-mike

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Re: [PATCH 24/40] sim/mips: Fix enum type-related issues on cp1.c

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> --- a/sim/mips/cp1.c
> +++ b/sim/mips/cp1.c
> @@ -1178,7 +1178,7 @@ inner_rsqrt(uint64_t op1,
>  	uint32_t res;
>  	sim_fpu_32to (&wop1, op1);
>  	status |= sim_fpu_sqrt (&ans, &wop1);
> -	status |= sim_fpu_round_32 (&ans, status, round);
> +	status |= sim_fpu_round_32 (&ans, (sim_fpu_round) status, (sim_fpu_denorm) round);

this doesn't look correct at all.  are you sure about this ?

> @@ -1216,7 +1216,7 @@ fp_inv_sqrt(sim_cpu *cpu,
>  	    FP_formats fmt)
>  {
>    sim_fpu_round round = rounding_mode (GETRM());
> -  sim_fpu_round denorm = denorm_mode (cpu);
> +  sim_fpu_denorm denorm = denorm_mode (cpu);

this looks fine

> @@ -1903,8 +1903,8 @@ convert_ps (sim_cpu *cpu,
>      case fmt_ps:
> -      status_u |= sim_fpu_round_32 (&wop_u, 0, round);
> -      status_l |= sim_fpu_round_32 (&wop_l, 0, round);
> +      status_u |= sim_fpu_round_32 (&wop_u, 0, (sim_fpu_denorm) round);
> +      status_l |= sim_fpu_round_32 (&wop_l, 0, (sim_fpu_denorm) round);

this also looks wrong
-mike

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Re: [PATCH 25/40] sim/mn10300: Add an explicit cast

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds an explicit cast.
> ---
>  sim/mn10300/op_utils.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> --- a/sim/mn10300/op_utils.c
> +++ b/sim/mn10300/op_utils.c
> @@ -152,8 +152,9 @@ do_syscall (SIM_DESC sd)
>    if (cb_target_to_host_syscall (STATE_CALLBACK (sd), func) == CB_SYS_exit)
>      {
>        /* EXIT - caller can look in parm1 to work out the reason */
> -      sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC,
> -		       (parm1 == 0xdead ? SIM_SIGABRT : sim_exited), parm1);
> +      sim_engine_halt (
> +	  simulator, STATE_CPU (simulator, 0), NULL, PC,
> +	  (parm1 == 0xdead ? (enum sim_stop) SIM_SIGABRT : sim_exited), parm1);

i'm fairly certain the existing code is wrong, and adding the cast masks that
error.  so we don't want to do this.

signals should be passed as the sigrc argument.
-mike

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Re: [PATCH 26/40] sim/ppc: Remove getrusage declarations if possible

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is a function declaration/definition
> with zero arguments.  Such declarations/definitions without a prototype (an
> argument list) are deprecated forms of indefinite arguments
> ("-Wdeprecated-non-prototype").  On the default configuration, it causes a
> build failure (unless "--disable-werror" is specified).
> 
> This commit removes redundant and indefinite getrusage function declarations
> if the known getrusage declaration is found.

just delete the code and be done.  don't keep it around for ancient irrelevant
systems that we never test on.
-mike

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Re: [PATCH 27/40] sim/ppc: Add extra parenthesis to avoid ambiguity

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if it considers that an expression is misleading
> due to a lack of parenthesis ("-Wparentheses").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds extra parenthesis to avoid ambiguity.
> ---
>  sim/ppc/altivec.igen | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/sim/ppc/altivec.igen b/sim/ppc/altivec.igen
> index 63fe95a53d5..eda7af9dd6a 100644
> --- a/sim/ppc/altivec.igen
> +++ b/sim/ppc/altivec.igen
> @@ -231,7 +231,7 @@ void::model-function::ppc_insn_vr_vscr:itable_index index, model_data *model_ptr
>  	busy_ptr->vscr_busy = 1;
>  
>  	if (out_vmask)
> -	  busy_ptr->nr_writebacks = 1 + (PPC_ONE_BIT_SET_P(out_vmask)) ? 1 : 2;
> +	  busy_ptr->nr_writebacks = (1 + (PPC_ONE_BIT_SET_P(out_vmask))) ? 1 : 2;

fairly certain this is incorrect.  this pretty much guarantees that "1" will
always be used and never "2".

Andrew posted a diff fix that i think is correct.
-mike

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Re: [PATCH 28/40] sim/ppc: Initialize stat type buffer

[Mike Frysinger]

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lgtm
-mike

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Re: [PATCH 29/40] sim/ppc: Fix indentation on generated code

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is a block statement and another
> adjacent statement with a misleading indent ("-Wmisleading-indentation").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> The cause of this warning, $(builddir)/sim/ppc/semantics.c is generated by
> $(srcdir)/sim/ppc/igen.c and this commit fixes generating misleading
> indentation by removing two spaces.
> ---
>  sim/ppc/igen.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/sim/ppc/igen.c b/sim/ppc/igen.c
> index 27b48638276..786ea540d57 100644
> --- a/sim/ppc/igen.c
> +++ b/sim/ppc/igen.c
> @@ -233,7 +233,7 @@ gen_semantics_c(insn_table *table,
>      lf_printf(file, "  option_mpc860c0 = 0;\n");
>      lf_printf(file, "  if (tree_find_property(root, \"/options/mpc860c0\"))\n");
>      lf_printf(file, "    option_mpc860c0 = tree_find_integer_property(root, \"/options/mpc860c0\");\n");
> -    lf_printf(file, "    option_mpc860c0 *= 4;   /* convert word count to byte count */\n");
> +    lf_printf(file, "  option_mpc860c0 *= 4;   /* convert word count to byte count */\n");

this maintains existing behavior, and logically it's the same, but i think we
should fix the intention of the code -- add braces so that the *4 only happens
inside the if statement.
-mike

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Re: [PATCH 30/40] sim/ppc: Use TRACE with initialized entry_point

[Mike Frysinger]

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lgtm, but i think Andrew posted the same fix
-mike

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Re: [PATCH 31/40] sim/ppc: Initialize help variables

[Mike Frysinger]

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Andrew posted a diff fix that i think we should use instead
-mike

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Re: [PATCH 32/40] sim/ppc: Add an explicit cast

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds an explicit cast to hw_phb_decode type.
> ---
>  sim/ppc/hw_phb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/sim/ppc/hw_phb.c b/sim/ppc/hw_phb.c
> index a3c19264235..a99a51d9cf9 100644
> --- a/sim/ppc/hw_phb.c
> +++ b/sim/ppc/hw_phb.c
> @@ -319,7 +319,7 @@ hw_phb_attach_address(device *me,
>    /* attach it to the relevent bus */
>    DTRACE(phb, ("attach %s - %s %s:0x%lx (0x%lx bytes)\n",
>  	       device_path(client),
> -	       hw_phb_decode_name(type),
> +	       hw_phb_decode_name((hw_phb_decode)type),

this assumes the enums attach_type & hw_phb_decode are the same.  they aren't.
so this looks like a real bug, and adding a cast covers it up.  we should fix
the bug.
-mike

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Re: [PATCH 33/40] sim/ppc: Initialize reg and control_nr

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> GCC generates a warning if a variable may be used uninitialized on some
> cases ("-Wmaybe-uninitialized").  Despite that GCC will not cause a build
> failure even when "--enable-werror" is specified, it would be nice to get
> rid of it.
> 
> This commit initializes variables "reg" and "control_nr" when declared.
> ---
>  sim/ppc/hw_ide.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> --- a/sim/ppc/hw_ide.c
> +++ b/sim/ppc/hw_ide.c
> @@ -729,8 +729,8 @@ hw_ide_io_read_buffer(device *me,
>  		      unsigned_word cia)
>  {
>    hw_ide_device *ide = (hw_ide_device *)device_data(me);
> -  int control_nr;
> -  int reg;
> +  int control_nr = 0;
> +  int reg = 0;
>    ide_controller *controller;
>  
>    /* find the interface */
> @@ -783,8 +783,8 @@ hw_ide_io_write_buffer(device *me,
>  		       unsigned_word cia)
>  {
>    hw_ide_device *ide = (hw_ide_device *)device_data(me);
> -  int control_nr;
> -  int reg;
> +  int control_nr = 0;
> +  int reg = 0;
>    ide_controller *controller;
>  
>    /* find the interface */

afaict, this is a false positive.  these two vars are initialized by the
decode_address call, and if it's unable to, it calls device_error which
is supposed to be marked NORETURN.

what if we change decode_address to initialize both output variables and
leave a comment there explaining why.
-mike

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Re: [PATCH 34/40] sim/rx: Mark unused function

[Mike Frysinger]

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lgtm
-mike

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Re: [PATCH 38/40] sim/bpf: Add explicit casts

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds explicit casts on the BPF instruction decoder.
> 
> Note:
> This commit touches CGEN-generated files directly.
> Modifying CGEN is the best way to prevent this issue from happening again
> but there is another known regression in CGEN to resolve.

same feedback as what i posted to "[PATCH 14/40] sim/frv: Add explicit casts"
-mike

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Re: [PATCH 39/40] sim/iq2000: Add explicit casts

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds explicit casts on the IQ2000 instruction decoder.
> 
> Note:
> This commit touches CGEN-generated files directly.
> Modifying CGEN is the best way to prevent this issue from happening again
> but there is another known regression in CGEN or sim/iq2000 to resolve.

same feedback as what i posted to "[PATCH 14/40] sim/frv: Add explicit casts"
-mike

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Re: [PATCH 40/40] sim/or1k: Add explicit casts

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if there is an enum value with a mismatching type
> without an explicit cast ("-Wenum-conversion").
> On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
> 
> This commit adds explicit casts on the OpenRISC 1000 instruction decoder.
> 
> Note:
> This commit touches CGEN-generated files directly.
> Modifying CGEN is the best way to prevent this issue from happening again
> but there is another possible regression in CGEN to resolve.

same feedback as what i posted to "[PATCH 14/40] sim/frv: Add explicit casts"
-mike

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Re: [PATCH 35/40] sim/sh: Initialize some variables

[Mike Frysinger]

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On 20 Oct 2022 09:32, Tsukasa OI wrote:
> Clang generates a warning if a variable may be used uninitialized on some
> cases ("-Wsometimes-uninitialized").  On the default configuration, it
> causes a build failure (unless "--disable-werror" is specified).
> 
> The cause of this error, $(builddir)/sim/sh/ppi.c is generated from
> $(srcdir)/sim/sh/gencode.c.  Clang will detect the variable res may be used
> uninitialized when used on some cases.
> 
> Likewise, GCC generates a warning if a variable may be used uninitialized
> on some cases ("-Wmaybe-uninitialized").
> 
> GCC will detect variables res, res_grd, carry, overflow and greater_equal
> may be used uninitialized on some cases.  Despite that GCC will not cause a
> build failure even when "--enable-werror" is specified, it would be better
> to fix this as well since the cause is in the same function.
> ---
>  sim/sh/gencode.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> --- a/sim/sh/gencode.c
> +++ b/sim/sh/gencode.c
> @@ -3257,8 +3257,8 @@ ppi_gensim (void)
>    printf ("  static char const u_tab[] = { 8, 10,  7,  5};\n");
>    printf ("\n");
>    printf ("  int z;\n");
> -  printf ("  int res, res_grd;\n");
> -  printf ("  int carry, overflow, greater_equal;\n");
> +  printf ("  int res = 0, res_grd = 0;\n");
> +  printf ("  int carry = 0, overflow = 0, greater_equal = 0;\n");

i've left this warning in because i don't know what the right answer is, and
i'm not inclined to dig into the ISA to find out.  simply initializing the
variables to 0 might mean we're masking real bugs where we should be loading
the state from the current CPU registers instead.
-mike

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Re: [PATCH 02/40] sim: Check known getrusage declaration existence

[Tsukasa OI]

On 2022/10/23 22:59, Mike Frysinger wrote:
> On 20 Oct 2022 09:32, Tsukasa OI wrote:
>> Clang generates a warning if there is a function declaration/definition
>> with zero arguments. Such declarations/definitions without a prototype (an
>> argument list) are deprecated forms of indefinite arguments
>> ("-Wdeprecated-non-prototype"). On the default configuration, it causes a
>> build failure (unless "--disable-werror" is specified).
>>
>> Such getrusage function declarations are placed in three files under sim/ppc
>> and to avoid defining those on the modern environments, this commit will
>> make the configuration script to find the known declaration of getrusage
>> and defines HAVE_DECL_GETRUSAGE if it finds one.
>>
>> If we find one (and we *will* in most modern environments), we don't need
>> to rely on the deprecated declarations.
>> ---
>>  sim/config.h.in  |  4 ++++
>>  sim/configure    | 32 ++++++++++++++++++++++++++++++++
>>  sim/configure.ac | 10 ++++++++++
>>  3 files changed, 46 insertions(+)
> 
> you didn't actually fix the bad prototypes in the ppc code -- just delete them.
> pretty sure once you do, you won't need any of these changes.
> -mike

I wasn't sure that we could remove getrusage declarations without
prototype because it drops support for *really* old environments.  If we
can "just" remove getrusage declarations (it seems you are okay with
it), that will get definitely simpler.

Thanks,
Tsukasa

Re: [PATCH 03/40] sim/aarch64: Remove unused functions

[Tsukasa OI]

On 2022/10/23 23:02, Mike Frysinger wrote:
> looks fine, but Andrew Burgess posted the same fix
> -mike

I'll leave it for Andrew and I will withdraw following patches from my
patchset:

-   PATCH 03/40
-   PATCH 15/40
-   PATCH 16/40 (wrote by Andrew)
-   PATCH 28/40
-   PATCH 30/40
-   PATCH 36/40

Because this patchset (intended to be a RFC PATCH) is a mere copy of my
working branch, I need to sync with Andrew's work.

Thanks,
Tsukasa

Re: [PATCH 15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments

[Tsukasa OI]

On 2022/10/23 23:05, Mike Frysinger wrote:
> On 20 Oct 2022 09:32, Tsukasa OI wrote:
>> Clang generates a warning if there is a redundant self-assignment
>> ("-Wself-assign").  On the default configuration, it causes a build failure
>> (unless "--disable-werror" is specified).
>>
>> However, removing self-assignments in step_once function makes the code less
>> readable.  Instead, this commit inserts dummy addition to match the comments
>> "Value added == 0".  This is redundant but will suppress warnings and
>> matches with other branches better.  It will be also optimized away so we
>> can ignore performance impact on this.
>> ---
>>  sim/h8300/compile.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> --- a/sim/h8300/compile.c
>> +++ b/sim/h8300/compile.c
>> @@ -4141,7 +4141,7 @@ step_once (SIM_DESC sd, SIM_CPU *cpu)
>>  	  res = GET_B_REG (code->src.reg);	/* FIXME fetch? */
>>  	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
>>  	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
>> -	    res = res;		/* Value added == 0.  */
>> +	    res = res + 0x0;		/* Value added == 0.  */
> 
> Andrew posted a patch to just delete the assignment.  either is fine with me.
> -mike

I'll leave it for Andrew and I will withdraw following patches from my
patchset:

-   PATCH 03/40
-   PATCH 15/40
-   PATCH 16/40 (wrote by Andrew)
-   PATCH 28/40
-   PATCH 30/40
-   PATCH 36/40

Because this patchset (intended to be a RFC PATCH) is a mere copy of my
working branch, I need to sync with Andrew's work.

Thanks,
Tsukasa

Re: [PATCH 36/40] sim/sh: Use fabs instead of abs

[Tsukasa OI]

On 2022/10/23 23:17, Mike Frysinger wrote:
> lgtm
> -mike

I'll leave it for Andrew (PATCH 01/10) and I will withdraw following
patches from my patchset:

-   PATCH 03/40
-   PATCH 15/40
-   PATCH 16/40 (wrote by Andrew)
-   PATCH 28/40
-   PATCH 30/40
-   PATCH 36/40

Because this patchset (intended to be a RFC PATCH) is a mere copy of my
working branch, I need to sync with Andrew's work.

Thanks,
Tsukasa

Re: [PATCH 27/40] sim/ppc: Add extra parenthesis to avoid ambiguity

[Tsukasa OI]

On 2022/10/24 0:05, Mike Frysinger wrote:
> On 20 Oct 2022 09:32, Tsukasa OI wrote:
>> Clang generates a warning if it considers that an expression is misleading
>> due to a lack of parenthesis ("-Wparentheses").
>> On the default configuration, it causes a build failure
>> (unless "--disable-werror" is specified).
>>
>> This commit adds extra parenthesis to avoid ambiguity.
>> ---
>>  sim/ppc/altivec.igen | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/sim/ppc/altivec.igen b/sim/ppc/altivec.igen
>> index 63fe95a53d5..eda7af9dd6a 100644
>> --- a/sim/ppc/altivec.igen
>> +++ b/sim/ppc/altivec.igen
>> @@ -231,7 +231,7 @@ void::model-function::ppc_insn_vr_vscr:itable_index index, model_data *model_ptr
>>  	busy_ptr->vscr_busy = 1;
>>  
>>  	if (out_vmask)
>> -	  busy_ptr->nr_writebacks = 1 + (PPC_ONE_BIT_SET_P(out_vmask)) ? 1 : 2;
>> +	  busy_ptr->nr_writebacks = (1 + (PPC_ONE_BIT_SET_P(out_vmask))) ? 1 : 2;
> 
> fairly certain this is incorrect.  this pretty much guarantees that "1" will
> always be used and never "2".
> 
> Andrew posted a diff fix that i think is correct.
> -mike

I agree that.  I kept the original semantics but this is definitely a
bug (I think Andrew's fix is correct).  I will leave it to Andrew (PATCH
05/10).

Thanks,
Tsukasa

Re: [PATCH 28/40] sim/ppc: Initialize stat type buffer

[Tsukasa OI]

On 2022/10/24 0:06, Mike Frysinger wrote:
> lgtm
> -mike

I'll leave it for Andrew (PATCH 03/10) and I will withdraw following
patches from my patchset:

-   PATCH 03/40
-   PATCH 15/40
-   PATCH 16/40 (wrote by Andrew)
-   PATCH 28/40
-   PATCH 30/40
-   PATCH 36/40

Because this patchset (intended to be a RFC PATCH) is a mere copy of my
working branch, I need to sync with Andrew's work.

Thanks,
Tsukasa

Re: [PATCH 30/40] sim/ppc: Use TRACE with initialized entry_point

[Tsukasa OI]

On 2022/10/24 0:08, Mike Frysinger wrote:
> lgtm, but i think Andrew posted the same fix
> -mike

I'll leave it for Andrew (PATCH 02/10) and I will withdraw following
patches from my patchset:

-   PATCH 03/40
-   PATCH 15/40
-   PATCH 16/40 (wrote by Andrew)
-   PATCH 28/40
-   PATCH 30/40
-   PATCH 36/40

Because this patchset (intended to be a RFC PATCH) is a mere copy of my
working branch, I need to sync with Andrew's work.

Thanks,
Tsukasa

Re: [PATCH 02/40] sim: Check known getrusage declaration existence

[Mike Frysinger]

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On 24 Oct 2022 19:47, Tsukasa OI wrote:
> On 2022/10/23 22:59, Mike Frysinger wrote:
> > On 20 Oct 2022 09:32, Tsukasa OI wrote:
> >> Clang generates a warning if there is a function declaration/definition
> >> with zero arguments. Such declarations/definitions without a prototype (an
> >> argument list) are deprecated forms of indefinite arguments
> >> ("-Wdeprecated-non-prototype"). On the default configuration, it causes a
> >> build failure (unless "--disable-werror" is specified).
> >>
> >> Such getrusage function declarations are placed in three files under sim/ppc
> >> and to avoid defining those on the modern environments, this commit will
> >> make the configuration script to find the known declaration of getrusage
> >> and defines HAVE_DECL_GETRUSAGE if it finds one.
> >>
> >> If we find one (and we *will* in most modern environments), we don't need
> >> to rely on the deprecated declarations.
> >> ---
> >>  sim/config.h.in  |  4 ++++
> >>  sim/configure    | 32 ++++++++++++++++++++++++++++++++
> >>  sim/configure.ac | 10 ++++++++++
> >>  3 files changed, 46 insertions(+)
> > 
> > you didn't actually fix the bad prototypes in the ppc code -- just delete them.
> > pretty sure once you do, you won't need any of these changes.
> 
> I wasn't sure that we could remove getrusage declarations without
> prototype because it drops support for *really* old environments.  If we
> can "just" remove getrusage declarations (it seems you are okay with
> it), that will get definitely simpler.

the GNU sim documentation says we require an ISO C11 compiler & corresponding
runtime.  if such a system exists that someone cares about, they can propose
a patch & corresponding documentation.  putting bandaids on bandaids that we
can't test isn't really sustainable.
-mike

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Re: [PATCH 34/40] sim/rx: Mark unused function

[Andrew Burgess]

Tsukasa OI <research_trasio@irq.a4lg.com> writes:

> Clang generates a warning if there is a unused static function
> ("-Wunused-function").  On the default configuration, it causes a build
> failure (unless "--disable-werror" is specified).
>
> Although that this is completely unused, the author considers that this is
> _happened to be_ unused and choose to keep this function for now.

What does "happen to be" mean?  The function isn't used, right?

I'd like to request this patch not be merged.  I think the function
should just be deleted as unused.  If/when there's a need for it, we can
just bring it back.

Thanks,
Andrew




>
> Instead, this commit adds ATTRIBUTE_UNUSED.
> ---
>  sim/rx/rx.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/sim/rx/rx.c b/sim/rx/rx.c
> index 70b1b9729b7..8646c20d108 100644
> --- a/sim/rx/rx.c
> +++ b/sim/rx/rx.c
> @@ -754,7 +754,7 @@ typedef union {
>    float f;
>  } FloatInt;
>  
> -static inline int
> +static inline int ATTRIBUTE_UNUSED
>  float2int (float f)
>  {
>    FloatInt fi;
> -- 
> 2.34.1

Re: [PATCH 31/40] sim/ppc: Initialize help variables

[Andrew Burgess]

Tsukasa OI <research_trasio@irq.a4lg.com> writes:

> GCC / Clang generate a warning if a variables is used uninitialized on some
> cases.  On the default configuration, it causes a build failure (unless
> "--disable-werror" is specified).
>
> This commit initializes two help variables with { 0 }.

I've not pushed my fix as I'd like to reach consensus before merging
anything.

But I agree with Mike here, initializing help here just so that it can
be used somewhere it's not needed seems like the wrong solution.

Thanks,
Andrew


> ---
>  sim/ppc/hw_sem.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/sim/ppc/hw_sem.c b/sim/ppc/hw_sem.c
> index 937e2ad6f81..034191b10b7 100644
> --- a/sim/ppc/hw_sem.c
> +++ b/sim/ppc/hw_sem.c
> @@ -109,7 +109,7 @@ hw_sem_init_data(device *me)
>    hw_sem_device *sem = (hw_sem_device*)device_data(me);
>    const device_unit *d;
>    int status;
> -  union semun help;
> +  union semun help = { 0 };
>  
>    /* initialize the properties of the sem */
>  
> @@ -188,7 +188,7 @@ hw_sem_io_read_buffer(device *me,
>    struct sembuf sb;
>    int status;
>    uint32_t u32;
> -  union semun help;
> +  union semun help = { 0 };
>  
>    /* do we need to worry about out of range addresses? */
>  
> -- 
> 2.34.1

Re: [PATCH 26/40] sim/ppc: Remove getrusage declarations if possible

[Tsukasa OI]

On 2022/10/24 0:04, Mike Frysinger wrote:
> On 20 Oct 2022 09:32, Tsukasa OI wrote:
>> Clang generates a warning if there is a function declaration/definition
>> with zero arguments.  Such declarations/definitions without a prototype (an
>> argument list) are deprecated forms of indefinite arguments
>> ("-Wdeprecated-non-prototype").  On the default configuration, it causes a
>> build failure (unless "--disable-werror" is specified).
>>
>> This commit removes redundant and indefinite getrusage function declarations
>> if the known getrusage declaration is found.
> 
> just delete the code and be done.  don't keep it around for ancient irrelevant
> systems that we never test on.
> -mike

I'm concerned what kind of machines / environments to preserve behavior
but it seems we no longer have to worry about such pre-POSIX
environments (also, sim requires ISO C11 support).  Removing getrusage
declarations without prototype is simpler and easier for me too, so I
agree to delete them.

Thanks,
Tsukasa

Re: [PATCH 18/40] sim/m32c: Stop using middle dot

[Tsukasa OI]

On 2022/10/23 23:48, Mike Frysinger wrote:
> On 20 Oct 2022 09:32, Tsukasa OI wrote:
>> The led_off array used 0xB7 (Latin-1 middle dot) but it heavily depends on
>> the source code encoding.  Directly using 0xB7 here is very dangerous and
> 
> "very dangerous" is questionable

That's definitely an overreaction but forgive me since I'm from a
character encoding hell (Japan, which had at least three widely-used
pre-Unicode encodings).

> 
>> Clang causes a compiler warning ("-Winvalid-source-encoding").
>> On the other hand, using '\u00b7' here will assume UTF-8>
> we only care about UTF-8.  no other encoding (except ASCII) matters.

That's good to hear that.

> 
>> As a workaround, this commit replaces uses of 0xB7 with '.'
>> (regular ASCII dot).
> 
> i don't have a sense of what this code is meant to do.  is it just debug
> output for devs staring at the console ?  probably because of the CSI
> escape sequences here (\e[m).  if that's the case, i'm fine with changing
> it.  i'll note that the RX port seems to use @ & * instead ...
> -mike

I think this is a pseudo-LED output for console and middle dot (U+00B7)
is used to represent off and "O" is used to represent on.

It seems we can assume UTF-8 so I'll just re-encode this source file
with UTF-8.

Thanks,
Tsukasa

Re: [PATCH 22/40] sim/m32r: Fixes to Linux emulator

[Tsukasa OI]

On 2022/10/23 23:56, Mike Frysinger wrote:
> On 20 Oct 2022 09:32, Tsukasa OI wrote:
>> 1.  Some header files were missing
> 
> this looks fine
> 
>> 2.  syslog function must be called as a syscall rather than POSIX syslog
>>     because we are emulating Linux system calls on the Linux host.
> 
> i don't think that is accurate.  if that were true, every other call in here
> would be using syscall() instead of calling the C library functions.

Note that this part is a Linux to Linux syscall translator (though I
consider this whole idea unsafe).  Yes, it uses many C library functions
but I consider this is because they are (almost/completely) compatible
with underlying syscalls.

However, this isn't the case for syslog.  POSIX syslog (C library
function on <syslog.h>) and Linux syslog (syscall) have very different
semantics and Linux syslog should be used here.

Probably using glibc wrapper klogctl (<sys/klog.h>) might be a solution
(see man page syslog.2).  I would like to hear your thoughts.

Best regards,
Tsukasa

> 
>> 3.  ftime function is deprecated but used intentionally.
>>     We have to disable deprecated function warning.
> 
> this looks fine
> -mike

Re: [PATCH 22/40] sim/m32r: Fixes to Linux emulator

[Mike Frysinger]

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On 27 Oct 2022 11:40, Tsukasa OI wrote:
> On 2022/10/23 23:56, Mike Frysinger wrote:
> > On 20 Oct 2022 09:32, Tsukasa OI wrote:
> >> 2.  syslog function must be called as a syscall rather than POSIX syslog
> >>     because we are emulating Linux system calls on the Linux host.
> > 
> > i don't think that is accurate.  if that were true, every other call in here
> > would be using syscall() instead of calling the C library functions.
> 
> Note that this part is a Linux to Linux syscall translator (though I
> consider this whole idea unsafe).  Yes, it uses many C library functions
> but I consider this is because they are (almost/completely) compatible
> with underlying syscalls.

this is incorrect.  let's take a step back.  the point of the sim runtime
environments is to emulate the specified userland regardless of the host
OS.  it is not a linux-to-linux translator.  the runtime decodes syscalls,
then attempts to emulate the requested behavior.  ideally that would only
ever involve going through the standard C library APIs.

the m32r linux runtime environment layer has a bunch of linuxisms in there
(because it can be hard to emulate linux behavior on non-linux systems).
but that doesn't mean it's a linux-to-linux layer, and we shouldn't be
making it worse.

> However, this isn't the case for syslog.  POSIX syslog (C library
> function on <syslog.h>) and Linux syslog (syscall) have very different
> semantics and Linux syslog should be used here.

you are correct here.

the arch backends for diff runtime environments are inconsistent whether
they pass through to the real host env, or they provide stub/fake data so
the program doesn't get real access to the host (basically constructing a
sandbox).  i see the value in both modes (especially since a sandbox is
easier to run cross-OS), but haven't fleshed out how to support these.

> Probably using glibc wrapper klogctl (<sys/klog.h>) might be a solution
> (see man page syslog.2).  I would like to hear your thoughts.

klogctl would be OK
-mike

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Re: [PATCH 34/40] sim/rx: Mark unused function

[Tsukasa OI]

On 2022/10/25 1:30, Andrew Burgess wrote:
> Tsukasa OI <research_trasio@irq.a4lg.com> writes:
> 
>> Clang generates a warning if there is a unused static function
>> ("-Wunused-function").  On the default configuration, it causes a build
>> failure (unless "--disable-werror" is specified).
>>
>> Although that this is completely unused, the author considers that this is
>> _happened to be_ unused and choose to keep this function for now.
> 
> What does "happen to be" mean?  The function isn't used, right?

Why did I say that?  Perhaps I usually prefer symmetry.
But since we can easily restore it, I agree to just remove the function.

Thanks,
Tsukasa

> 
> I'd like to request this patch not be merged.  I think the function
> should just be deleted as unused.  If/when there's a need for it, we can
> just bring it back.
> 
> Thanks,
> Andrew
> 
> 
> 
> 
>>
>> Instead, this commit adds ATTRIBUTE_UNUSED.
>> ---
>>  sim/rx/rx.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/sim/rx/rx.c b/sim/rx/rx.c
>> index 70b1b9729b7..8646c20d108 100644
>> --- a/sim/rx/rx.c
>> +++ b/sim/rx/rx.c
>> @@ -754,7 +754,7 @@ typedef union {
>>    float f;
>>  } FloatInt;
>>  
>> -static inline int
>> +static inline int ATTRIBUTE_UNUSED
>>  float2int (float f)
>>  {
>>    FloatInt fi;
>> -- 
>> 2.34.1
> 

Re: [PATCH 01/40] gdb/unittests: PR28413, suppress warnings generated by Gnulib

[Simon Marchi]

On 10/20/22 05:32, Tsukasa OI via Gdb-patches wrote:
> Gnulib generates a warning if the system version of certain functions
> are used (to redirect the developer to use Gnulib version).  It caused a
> compiler error when...
> 
> -   Compiled with Clang
> -   -Werror is specified (by default)
> -   C++ standard used by Clang is before C++17 (by default as of 15.0.0)
>     when this unit test is activated.
> 
> This issue is raised as PR28413.
> 
> However, previous proposal to fix this issue (a "fix" to Gnulib):
> <https://lists.gnu.org/archive/html/bug-gnulib/2021-10/msg00003.html>
> was rejected because it ruins the intent of Gnulib warnings.
> 
> So, we need a Binutils/GDB-side solution.
> 
> This commit tries to address this issue on the GDB side.  We have
> "include/diagnostics.h" to disable certain warnings only when necessary.
> 
> This commit suppresses the Gnulib warnings by surrounding entire #include
> block with DIAGNOSTIC_IGNORE_USER_DEFINED_WARNINGS to disable Gnulib-
> generated warnings on all standard C++ header files.
> ---
>  gdb/unittests/string_view-selftests.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/gdb/unittests/string_view-selftests.c b/gdb/unittests/string_view-selftests.c
> index 2d7261d18d3..441d533b54e 100644
> --- a/gdb/unittests/string_view-selftests.c
> +++ b/gdb/unittests/string_view-selftests.c
> @@ -23,6 +23,11 @@
>  
>  #define GNULIB_NAMESPACE gnulib
>  
> +#include "diagnostics.h"
> +
> +DIAGNOSTIC_PUSH
> +DIAGNOSTIC_IGNORE_USER_DEFINED_WARNINGS
> +
>  #include "defs.h"
>  #include "gdbsupport/selftest.h"
>  #include "gdbsupport/gdb_string_view.h"
> @@ -34,6 +39,8 @@
>  #include <fstream>
>  #include <iostream>
>  
> +DIAGNOSTIC_POP
> +
>  /* libstdc++'s testsuite uses VERIFY.  */
>  #define VERIFY SELF_CHECK
>  

I think this is fine, so I went ahead and pushed it, after adding a
little comment.

I tried to look at an alternative way of fixing it, by making
include/libiberty.h using GNULIB_NAMESPACE::free instead of free when
GNULIB_NAMESPACE is defined.  However, we then trip on:

      CXX    unittests/string_view-selftests.o
    In file included from /home/smarchi/src/binutils-gdb/gdb/unittests/string_view-selftests.c:26:
    In file included from /home/smarchi/src/binutils-gdb/gdb/defs.h:28:
    In file included from /home/smarchi/src/binutils-gdb/gdb/../gdbsupport/common-defs.h:204:
    In file included from /home/smarchi/src/binutils-gdb/gdb/../gdbsupport/ptid.h:36:
    In file included from /usr/bin/../lib/gcc/x86_64-linux-gnu/11/../../../../include/c++/11/string:40:
    In file included from /usr/bin/../lib/gcc/x86_64-linux-gnu/11/../../../../include/c++/11/bits/char_traits.h:40:
    In file included from /usr/bin/../lib/gcc/x86_64-linux-gnu/11/../../../../include/c++/11/bits/postypes.h:40:
    /usr/bin/../lib/gcc/x86_64-linux-gnu/11/../../../../include/c++/11/cwchar:231:12: error: The symbol ::wmemchr refers to the system function. Use gnulib::wmemchr instead. [-Werror,-Wuser-defined-warnings]
      { return wmemchr(const_cast<const wchar_t*>(__p), __c, __n); }
               ^

And we can't fix that the same way...

Simon

Re: [PATCH 07/40] sim/cris: Regenerate with CGEN

[Hans-Peter Nilsson]

On Thu, 20 Oct 2022, Tsukasa OI via Binutils wrote:

> All CRIS-related files are regenerated by custom CGEN that is modified by
> the author (CGEN change will be separately upstreamed).
> ---
>  sim/cris/arch.c               |  5 +++--
>  sim/cris/arch.h               | 21 +++++++++++++++------
>  sim/cris/cpuall.h             |  5 +++--
>  sim/cris/cpuv10.c             |  6 ++++--
>  sim/cris/cpuv10.h             |  5 +++--
>  sim/cris/cpuv32.c             |  6 ++++--
>  sim/cris/cpuv32.h             |  5 +++--
>  sim/cris/decodev10.c          | 21 +++++++++++----------
>  sim/cris/decodev10.h          |  6 +++---
>  sim/cris/decodev32.c          | 21 +++++++++++----------
>  sim/cris/decodev32.h          |  8 ++++----
>  sim/cris/modelv10.c           |  5 +++--
>  sim/cris/modelv32.c           |  5 +++--
>  sim/cris/semcrisv10f-switch.c | 20 +++++++++++++-------
>  sim/cris/semcrisv32f-switch.c | 20 +++++++++++++-------
>  15 files changed, 96 insertions(+), 63 deletions(-)

This is ok and obvious.

BTW, I see you sent this and other sim/ patches to just 
binutils.  I CC:ed gdb-patches@, the proper list for sim/ 
patches.  (A bit odd that cpu/ patches need to go to just 
binutils@; logically they should go to both lists.)

brgds, H-P