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* [PATCH 00/35] arm: rework MVE testsuite and rework backend where necessary (1st chunk)
@ 2022-11-17 16:37 Andrea Corallo
  2022-11-17 16:37 ` [PATCH 01/35] arm: improve vcreateq* tests Andrea Corallo
                   ` (35 more replies)
  0 siblings, 36 replies; 82+ messages in thread
From: Andrea Corallo @ 2022-11-17 16:37 UTC (permalink / raw)
  To: gcc-patches; +Cc: kyrylo.tkachov, Richard.Earnshaw, Andrea Corallo

Hi all,

this is the first patch series about improving the current MVE
implementation and testsuite for:

- Complete intrinsic implementation and coverage (the list of intrinsics is
  specified by [1])
- Verifying all instructions supposedly emitted by each intrinsic
- Verifying register usage
- Fixing the current scan assemblers to really match the wanted mnemonics
- Verifying no external calls are emitted

This series fixes the backend where necessary.

Best Regards

  Andrea

Andrea Corallo (31):
  arm: improve vcreateq* tests
  arm: fix 'vmsr' spacing and register capitalization
  arm: improve tests and fix vddupq*
  arm: improve tests and fix vdwdupq*
  arm: improve vidupq* tests
  arm: improve tests and fix vdupq*
  arm: improve tests and fix vcmp*
  arm: improve tests for vmin*
  arm: improve tests for vmax*
  arm: improve tests for vabavq*
  arm: improve tests for vabdq*
  arm: improve tests and fix vabsq*
  arm: improve tests and fix vadd*
  arm: improve tests for vmulq*
  arm: improve tests and fix vsubq*
  arm: improve tests for vfmasq_m*
  arm: improve tests for vhaddq_m*
  arm: improve tests for vhsubq_m*
  arm: improve tests for viwdupq*
  arm: improve tests for vmladavaq*
  arm: improve tests and fix vmlaldavaxq*
  arm: improve tests for vmlasq*
  arm: improve tests for vqaddq_m*
  arm: improve tests for vqdmlahq_m*
  arm: improve tests for vqdmul*
  arm: improve tests for vqrdmlahq*
  arm: improve tests for vqrdmlashq_m*
  arm: improve tests for vqsubq*
  arm: improve tests and fix vrmlaldavhaq*
  arm: improve tests for vrshlq*
  arm: improve tests for vsetq_lane*

Stam Markianos-Wright (4):
  arm: further fix overloading of MVE vaddq[_m]_n intrinsic
  arm: propagate fixed overloading of MVE intrinsic scalar parameters
  arm: Explicitly specify other float types for _Generic overloading
    [PR107515]
  arm: Add integer vector overloading of vsubq_x instrinsic

 gcc/config/arm/arm_mve.h                      | 1232 +++++++++--------
 gcc/config/arm/mve.md                         |   48 +-
 gcc/config/arm/vfp.md                         |    8 +-
 .../arm/mve/intrinsics/vabavq_p_s16.c         |   40 +-
 .../arm/mve/intrinsics/vabavq_p_s32.c         |   40 +-
 .../arm/mve/intrinsics/vabavq_p_s8.c          |   40 +-
 .../arm/mve/intrinsics/vabavq_p_u16.c         |   40 +-
 .../arm/mve/intrinsics/vabavq_p_u32.c         |   40 +-
 .../arm/mve/intrinsics/vabavq_p_u8.c          |   40 +-
 .../arm/mve/intrinsics/vabavq_s16.c           |   28 +-
 .../arm/mve/intrinsics/vabavq_s32.c           |   28 +-
 .../gcc.target/arm/mve/intrinsics/vabavq_s8.c |   28 +-
 .../arm/mve/intrinsics/vabavq_u16.c           |   28 +-
 .../arm/mve/intrinsics/vabavq_u32.c           |   28 +-
 .../gcc.target/arm/mve/intrinsics/vabavq_u8.c |   28 +-
 .../gcc.target/arm/mve/intrinsics/vabdq_f16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vabdq_f32.c |   16 +-
 .../arm/mve/intrinsics/vabdq_m_f16.c          |   26 +-
 .../arm/mve/intrinsics/vabdq_m_f32.c          |   26 +-
 .../arm/mve/intrinsics/vabdq_m_s16.c          |   26 +-
 .../arm/mve/intrinsics/vabdq_m_s32.c          |   26 +-
 .../arm/mve/intrinsics/vabdq_m_s8.c           |   26 +-
 .../arm/mve/intrinsics/vabdq_m_u16.c          |   26 +-
 .../arm/mve/intrinsics/vabdq_m_u32.c          |   26 +-
 .../arm/mve/intrinsics/vabdq_m_u8.c           |   26 +-
 .../gcc.target/arm/mve/intrinsics/vabdq_s16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vabdq_s32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vabdq_s8.c  |   16 +-
 .../gcc.target/arm/mve/intrinsics/vabdq_u16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vabdq_u32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vabdq_u8.c  |   16 +-
 .../arm/mve/intrinsics/vabdq_x_f16.c          |   25 +-
 .../arm/mve/intrinsics/vabdq_x_f32.c          |   25 +-
 .../arm/mve/intrinsics/vabdq_x_s16.c          |   26 +-
 .../arm/mve/intrinsics/vabdq_x_s32.c          |   25 +-
 .../arm/mve/intrinsics/vabdq_x_s8.c           |   25 +-
 .../arm/mve/intrinsics/vabdq_x_u16.c          |   25 +-
 .../arm/mve/intrinsics/vabdq_x_u32.c          |   25 +-
 .../arm/mve/intrinsics/vabdq_x_u8.c           |   25 +-
 .../gcc.target/arm/mve/intrinsics/vabsq_f16.c |   22 +-
 .../gcc.target/arm/mve/intrinsics/vabsq_f32.c |   22 +-
 .../arm/mve/intrinsics/vabsq_m_f16.c          |   25 +-
 .../arm/mve/intrinsics/vabsq_m_f32.c          |   25 +-
 .../arm/mve/intrinsics/vabsq_m_s16.c          |   25 +-
 .../arm/mve/intrinsics/vabsq_m_s32.c          |   25 +-
 .../arm/mve/intrinsics/vabsq_m_s8.c           |   25 +-
 .../gcc.target/arm/mve/intrinsics/vabsq_s16.c |   20 +-
 .../gcc.target/arm/mve/intrinsics/vabsq_s32.c |   20 +-
 .../gcc.target/arm/mve/intrinsics/vabsq_s8.c  |   16 +-
 .../arm/mve/intrinsics/vabsq_x_f16.c          |   25 +-
 .../arm/mve/intrinsics/vabsq_x_f32.c          |   25 +-
 .../arm/mve/intrinsics/vabsq_x_s16.c          |   25 +-
 .../arm/mve/intrinsics/vabsq_x_s32.c          |   25 +-
 .../arm/mve/intrinsics/vabsq_x_s8.c           |   25 +-
 .../arm/mve/intrinsics/vaddlvaq_p_s32.c       |   24 +-
 .../arm/mve/intrinsics/vaddlvaq_p_u32.c       |   40 +-
 .../arm/mve/intrinsics/vaddlvaq_s32.c         |   16 +-
 .../arm/mve/intrinsics/vaddlvaq_u32.c         |   28 +-
 .../arm/mve/intrinsics/vaddlvq_p_s32.c        |   24 +-
 .../arm/mve/intrinsics/vaddlvq_p_u32.c        |   24 +-
 .../arm/mve/intrinsics/vaddlvq_s32.c          |   22 +-
 .../arm/mve/intrinsics/vaddlvq_u32.c          |   20 +-
 .../gcc.target/arm/mve/intrinsics/vaddq_f16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vaddq_f32.c |   16 +-
 .../arm/mve/intrinsics/vaddq_m_f16.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_m_f32.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_m_n_f16.c        |   42 +-
 .../arm/mve/intrinsics/vaddq_m_n_f32.c        |   42 +-
 .../arm/mve/intrinsics/vaddq_m_n_s16.c        |   26 +-
 .../arm/mve/intrinsics/vaddq_m_n_s32.c        |   26 +-
 .../arm/mve/intrinsics/vaddq_m_n_s8.c         |   26 +-
 .../arm/mve/intrinsics/vaddq_m_n_u16.c        |   42 +-
 .../arm/mve/intrinsics/vaddq_m_n_u32.c        |   42 +-
 .../arm/mve/intrinsics/vaddq_m_n_u8.c         |   42 +-
 .../arm/mve/intrinsics/vaddq_m_s16.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_m_s32.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_m_s8.c           |   26 +-
 .../arm/mve/intrinsics/vaddq_m_u16.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_m_u32.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_m_u8.c           |   26 +-
 .../arm/mve/intrinsics/vaddq_n_f16.c          |   28 +-
 .../arm/mve/intrinsics/vaddq_n_f32.c          |   28 +-
 .../arm/mve/intrinsics/vaddq_n_s16.c          |   16 +-
 .../arm/mve/intrinsics/vaddq_n_s32.c          |   16 +-
 .../arm/mve/intrinsics/vaddq_n_s8.c           |   16 +-
 .../arm/mve/intrinsics/vaddq_n_u16.c          |   28 +-
 .../arm/mve/intrinsics/vaddq_n_u32.c          |   28 +-
 .../arm/mve/intrinsics/vaddq_n_u8.c           |   28 +-
 .../gcc.target/arm/mve/intrinsics/vaddq_s16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vaddq_s32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vaddq_s8.c  |   16 +-
 .../gcc.target/arm/mve/intrinsics/vaddq_u16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vaddq_u32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vaddq_u8.c  |   16 +-
 .../arm/mve/intrinsics/vaddq_x_f16.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_x_f32.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_x_n_f16.c        |   42 +-
 .../arm/mve/intrinsics/vaddq_x_n_f32.c        |   42 +-
 .../arm/mve/intrinsics/vaddq_x_n_s16.c        |   26 +-
 .../arm/mve/intrinsics/vaddq_x_n_s32.c        |   26 +-
 .../arm/mve/intrinsics/vaddq_x_n_s8.c         |   26 +-
 .../arm/mve/intrinsics/vaddq_x_n_u16.c        |   42 +-
 .../arm/mve/intrinsics/vaddq_x_n_u32.c        |   42 +-
 .../arm/mve/intrinsics/vaddq_x_n_u8.c         |   42 +-
 .../arm/mve/intrinsics/vaddq_x_s16.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_x_s32.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_x_s8.c           |   26 +-
 .../arm/mve/intrinsics/vaddq_x_u16.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_x_u32.c          |   26 +-
 .../arm/mve/intrinsics/vaddq_x_u8.c           |   26 +-
 .../arm/mve/intrinsics/vaddvaq_p_s16.c        |   24 +-
 .../arm/mve/intrinsics/vaddvaq_p_s32.c        |   24 +-
 .../arm/mve/intrinsics/vaddvaq_p_s8.c         |   24 +-
 .../arm/mve/intrinsics/vaddvaq_p_u16.c        |   40 +-
 .../arm/mve/intrinsics/vaddvaq_p_u32.c        |   40 +-
 .../arm/mve/intrinsics/vaddvaq_p_u8.c         |   40 +-
 .../arm/mve/intrinsics/vaddvaq_s16.c          |   16 +-
 .../arm/mve/intrinsics/vaddvaq_s32.c          |   16 +-
 .../arm/mve/intrinsics/vaddvaq_s8.c           |   16 +-
 .../arm/mve/intrinsics/vaddvaq_u16.c          |   28 +-
 .../arm/mve/intrinsics/vaddvaq_u32.c          |   28 +-
 .../arm/mve/intrinsics/vaddvaq_u8.c           |   28 +-
 .../arm/mve/intrinsics/vaddvq_p_s16.c         |   24 +-
 .../arm/mve/intrinsics/vaddvq_p_s32.c         |   24 +-
 .../arm/mve/intrinsics/vaddvq_p_s8.c          |   24 +-
 .../arm/mve/intrinsics/vaddvq_p_u16.c         |   24 +-
 .../arm/mve/intrinsics/vaddvq_p_u32.c         |   24 +-
 .../arm/mve/intrinsics/vaddvq_p_u8.c          |   24 +-
 .../arm/mve/intrinsics/vaddvq_s16.c           |   22 +-
 .../arm/mve/intrinsics/vaddvq_s32.c           |   22 +-
 .../gcc.target/arm/mve/intrinsics/vaddvq_s8.c |   20 +-
 .../arm/mve/intrinsics/vaddvq_u16.c           |   20 +-
 .../arm/mve/intrinsics/vaddvq_u32.c           |   20 +-
 .../gcc.target/arm/mve/intrinsics/vaddvq_u8.c |   20 +-
 .../arm/mve/intrinsics/vcmpcsq_m_n_u16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpcsq_m_n_u32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpcsq_m_n_u8.c       |   47 +-
 .../arm/mve/intrinsics/vcmpcsq_m_u16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpcsq_m_u32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpcsq_m_u8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpcsq_n_u16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpcsq_n_u32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpcsq_n_u8.c         |   34 +-
 .../arm/mve/intrinsics/vcmpcsq_u16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpcsq_u32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpcsq_u8.c           |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_f16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_f32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_m_f16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_f32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_n_f16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpeqq_m_n_f32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpeqq_m_n_s16.c      |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_n_s32.c      |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_n_s8.c       |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_n_u16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpeqq_m_n_u32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpeqq_m_n_u8.c       |   47 +-
 .../arm/mve/intrinsics/vcmpeqq_m_s16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_s32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_s8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_u16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_u32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_m_u8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpeqq_n_f16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpeqq_n_f32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpeqq_n_s16.c        |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_n_s32.c        |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_n_s8.c         |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_n_u16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpeqq_n_u32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpeqq_n_u8.c         |   34 +-
 .../arm/mve/intrinsics/vcmpeqq_s16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_s32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_s8.c           |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_u16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_u32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpeqq_u8.c           |   20 +-
 .../arm/mve/intrinsics/vcmpgeq_f16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpgeq_f32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpgeq_m_f16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpgeq_m_f32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpgeq_m_n_f16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpgeq_m_n_f32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpgeq_m_n_s16.c      |   29 +-
 .../arm/mve/intrinsics/vcmpgeq_m_n_s32.c      |   29 +-
 .../arm/mve/intrinsics/vcmpgeq_m_n_s8.c       |   29 +-
 .../arm/mve/intrinsics/vcmpgeq_m_s16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpgeq_m_s32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpgeq_m_s8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpgeq_n_f16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpgeq_n_f32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpgeq_n_s16.c        |   20 +-
 .../arm/mve/intrinsics/vcmpgeq_n_s32.c        |   20 +-
 .../arm/mve/intrinsics/vcmpgeq_n_s8.c         |   20 +-
 .../arm/mve/intrinsics/vcmpgeq_s16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpgeq_s32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpgeq_s8.c           |   20 +-
 .../arm/mve/intrinsics/vcmpgtq_f16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpgtq_f32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpgtq_m_f16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpgtq_m_f32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpgtq_m_n_f16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpgtq_m_n_f32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpgtq_m_n_s16.c      |   29 +-
 .../arm/mve/intrinsics/vcmpgtq_m_n_s32.c      |   29 +-
 .../arm/mve/intrinsics/vcmpgtq_m_n_s8.c       |   29 +-
 .../arm/mve/intrinsics/vcmpgtq_m_s16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpgtq_m_s32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpgtq_m_s8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpgtq_n_f16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpgtq_n_f32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpgtq_n_s16.c        |   20 +-
 .../arm/mve/intrinsics/vcmpgtq_n_s32.c        |   20 +-
 .../arm/mve/intrinsics/vcmpgtq_n_s8.c         |   20 +-
 .../arm/mve/intrinsics/vcmpgtq_s16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpgtq_s32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpgtq_s8.c           |   20 +-
 .../arm/mve/intrinsics/vcmphiq_m_n_u16.c      |   47 +-
 .../arm/mve/intrinsics/vcmphiq_m_n_u32.c      |   47 +-
 .../arm/mve/intrinsics/vcmphiq_m_n_u8.c       |   47 +-
 .../arm/mve/intrinsics/vcmphiq_m_u16.c        |   29 +-
 .../arm/mve/intrinsics/vcmphiq_m_u32.c        |   29 +-
 .../arm/mve/intrinsics/vcmphiq_m_u8.c         |   29 +-
 .../arm/mve/intrinsics/vcmphiq_n_u16.c        |   34 +-
 .../arm/mve/intrinsics/vcmphiq_n_u32.c        |   34 +-
 .../arm/mve/intrinsics/vcmphiq_n_u8.c         |   34 +-
 .../arm/mve/intrinsics/vcmphiq_u16.c          |   20 +-
 .../arm/mve/intrinsics/vcmphiq_u32.c          |   20 +-
 .../arm/mve/intrinsics/vcmphiq_u8.c           |   20 +-
 .../arm/mve/intrinsics/vcmpleq_f16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpleq_f32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpleq_m_f16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpleq_m_f32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpleq_m_n_f16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpleq_m_n_f32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpleq_m_n_s16.c      |   29 +-
 .../arm/mve/intrinsics/vcmpleq_m_n_s32.c      |   29 +-
 .../arm/mve/intrinsics/vcmpleq_m_n_s8.c       |   29 +-
 .../arm/mve/intrinsics/vcmpleq_m_s16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpleq_m_s32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpleq_m_s8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpleq_n_f16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpleq_n_f32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpleq_n_s16.c        |   20 +-
 .../arm/mve/intrinsics/vcmpleq_n_s32.c        |   20 +-
 .../arm/mve/intrinsics/vcmpleq_n_s8.c         |   20 +-
 .../arm/mve/intrinsics/vcmpleq_s16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpleq_s32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpleq_s8.c           |   20 +-
 .../arm/mve/intrinsics/vcmpltq_f16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpltq_f32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpltq_m_f16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpltq_m_f32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpltq_m_n_f16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpltq_m_n_f32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpltq_m_n_s16.c      |   29 +-
 .../arm/mve/intrinsics/vcmpltq_m_n_s32.c      |   29 +-
 .../arm/mve/intrinsics/vcmpltq_m_n_s8.c       |   29 +-
 .../arm/mve/intrinsics/vcmpltq_m_s16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpltq_m_s32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpltq_m_s8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpltq_n_f16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpltq_n_f32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpltq_n_s16.c        |   20 +-
 .../arm/mve/intrinsics/vcmpltq_n_s32.c        |   20 +-
 .../arm/mve/intrinsics/vcmpltq_n_s8.c         |   20 +-
 .../arm/mve/intrinsics/vcmpltq_s16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpltq_s32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpltq_s8.c           |   20 +-
 .../arm/mve/intrinsics/vcmpneq_f16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpneq_f32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpneq_m_f16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_f32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_n_f16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpneq_m_n_f32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpneq_m_n_s16.c      |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_n_s32.c      |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_n_s8.c       |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_n_u16.c      |   47 +-
 .../arm/mve/intrinsics/vcmpneq_m_n_u32.c      |   47 +-
 .../arm/mve/intrinsics/vcmpneq_m_n_u8.c       |   47 +-
 .../arm/mve/intrinsics/vcmpneq_m_s16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_s32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_s8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_u16.c        |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_u32.c        |   29 +-
 .../arm/mve/intrinsics/vcmpneq_m_u8.c         |   29 +-
 .../arm/mve/intrinsics/vcmpneq_n_f16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpneq_n_f32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpneq_n_s16.c        |   20 +-
 .../arm/mve/intrinsics/vcmpneq_n_s32.c        |   20 +-
 .../arm/mve/intrinsics/vcmpneq_n_s8.c         |   20 +-
 .../arm/mve/intrinsics/vcmpneq_n_u16.c        |   34 +-
 .../arm/mve/intrinsics/vcmpneq_n_u32.c        |   34 +-
 .../arm/mve/intrinsics/vcmpneq_n_u8.c         |   34 +-
 .../arm/mve/intrinsics/vcmpneq_s16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpneq_s32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpneq_s8.c           |   20 +-
 .../arm/mve/intrinsics/vcmpneq_u16.c          |   20 +-
 .../arm/mve/intrinsics/vcmpneq_u32.c          |   20 +-
 .../arm/mve/intrinsics/vcmpneq_u8.c           |   20 +-
 .../arm/mve/intrinsics/vcreateq_f16.c         |   23 +-
 .../arm/mve/intrinsics/vcreateq_f32.c         |   23 +-
 .../arm/mve/intrinsics/vcreateq_s16.c         |   23 +-
 .../arm/mve/intrinsics/vcreateq_s32.c         |   23 +-
 .../arm/mve/intrinsics/vcreateq_s64.c         |   23 +-
 .../arm/mve/intrinsics/vcreateq_s8.c          |   23 +-
 .../arm/mve/intrinsics/vcreateq_u16.c         |   23 +-
 .../arm/mve/intrinsics/vcreateq_u32.c         |   23 +-
 .../arm/mve/intrinsics/vcreateq_u64.c         |   23 +-
 .../arm/mve/intrinsics/vcreateq_u8.c          |   23 +-
 .../arm/mve/intrinsics/vddupq_m_n_u16.c       |   42 +-
 .../arm/mve/intrinsics/vddupq_m_n_u32.c       |   46 +-
 .../arm/mve/intrinsics/vddupq_m_n_u8.c        |   46 +-
 .../arm/mve/intrinsics/vddupq_m_wb_u16.c      |   42 +-
 .../arm/mve/intrinsics/vddupq_m_wb_u32.c      |   46 +-
 .../arm/mve/intrinsics/vddupq_m_wb_u8.c       |   46 +-
 .../arm/mve/intrinsics/vddupq_n_u16.c         |   32 +-
 .../arm/mve/intrinsics/vddupq_n_u32.c         |   28 +-
 .../arm/mve/intrinsics/vddupq_n_u8.c          |   28 +-
 .../arm/mve/intrinsics/vddupq_wb_u16.c        |   32 +-
 .../arm/mve/intrinsics/vddupq_wb_u32.c        |   28 +-
 .../arm/mve/intrinsics/vddupq_wb_u8.c         |   28 +-
 .../arm/mve/intrinsics/vddupq_x_n_u16.c       |   42 +-
 .../arm/mve/intrinsics/vddupq_x_n_u32.c       |   46 +-
 .../arm/mve/intrinsics/vddupq_x_n_u8.c        |   46 +-
 .../arm/mve/intrinsics/vddupq_x_wb_u16.c      |   52 +-
 .../arm/mve/intrinsics/vddupq_x_wb_u32.c      |   52 +-
 .../arm/mve/intrinsics/vddupq_x_wb_u8.c       |   52 +-
 .../arm/mve/intrinsics/vdupq_m_n_f16.c        |   41 +-
 .../arm/mve/intrinsics/vdupq_m_n_f32.c        |   41 +-
 .../arm/mve/intrinsics/vdupq_m_n_s16.c        |   25 +-
 .../arm/mve/intrinsics/vdupq_m_n_s32.c        |   25 +-
 .../arm/mve/intrinsics/vdupq_m_n_s8.c         |   25 +-
 .../arm/mve/intrinsics/vdupq_m_n_u16.c        |   41 +-
 .../arm/mve/intrinsics/vdupq_m_n_u32.c        |   41 +-
 .../arm/mve/intrinsics/vdupq_m_n_u8.c         |   41 +-
 .../arm/mve/intrinsics/vdupq_n_f16.c          |   21 +-
 .../arm/mve/intrinsics/vdupq_n_f32.c          |   21 +-
 .../arm/mve/intrinsics/vdupq_n_s16.c          |   13 +-
 .../arm/mve/intrinsics/vdupq_n_s32.c          |   13 +-
 .../arm/mve/intrinsics/vdupq_n_s8.c           |    9 +-
 .../arm/mve/intrinsics/vdupq_n_u16.c          |   23 +-
 .../arm/mve/intrinsics/vdupq_n_u32.c          |   23 +-
 .../arm/mve/intrinsics/vdupq_n_u8.c           |   23 +-
 .../arm/mve/intrinsics/vdupq_x_n_f16.c        |   30 +-
 .../arm/mve/intrinsics/vdupq_x_n_f32.c        |   30 +-
 .../arm/mve/intrinsics/vdupq_x_n_s16.c        |   14 +-
 .../arm/mve/intrinsics/vdupq_x_n_s32.c        |   14 +-
 .../arm/mve/intrinsics/vdupq_x_n_s8.c         |   14 +-
 .../arm/mve/intrinsics/vdupq_x_n_u16.c        |   30 +-
 .../arm/mve/intrinsics/vdupq_x_n_u32.c        |   30 +-
 .../arm/mve/intrinsics/vdupq_x_n_u8.c         |   30 +-
 .../arm/mve/intrinsics/vdwdupq_m_n_u16.c      |   44 +-
 .../arm/mve/intrinsics/vdwdupq_m_n_u32.c      |   46 +-
 .../arm/mve/intrinsics/vdwdupq_m_n_u8.c       |   46 +-
 .../arm/mve/intrinsics/vdwdupq_m_wb_u16.c     |   50 +-
 .../arm/mve/intrinsics/vdwdupq_m_wb_u32.c     |   48 +-
 .../arm/mve/intrinsics/vdwdupq_m_wb_u8.c      |   50 +-
 .../arm/mve/intrinsics/vdwdupq_n_u16.c        |   32 +-
 .../arm/mve/intrinsics/vdwdupq_n_u32.c        |   32 +-
 .../arm/mve/intrinsics/vdwdupq_n_u8.c         |   32 +-
 .../arm/mve/intrinsics/vdwdupq_wb_u16.c       |   32 +-
 .../arm/mve/intrinsics/vdwdupq_wb_u32.c       |   32 +-
 .../arm/mve/intrinsics/vdwdupq_wb_u8.c        |   32 +-
 .../arm/mve/intrinsics/vdwdupq_x_n_u16.c      |   42 +-
 .../arm/mve/intrinsics/vdwdupq_x_n_u32.c      |   46 +-
 .../arm/mve/intrinsics/vdwdupq_x_n_u8.c       |   46 +-
 .../arm/mve/intrinsics/vdwdupq_x_wb_u16.c     |   50 +-
 .../arm/mve/intrinsics/vdwdupq_x_wb_u32.c     |   46 +-
 .../arm/mve/intrinsics/vdwdupq_x_wb_u8.c      |   50 +-
 .../arm/mve/intrinsics/vfmasq_m_n_f16.c       |   50 +-
 .../arm/mve/intrinsics/vfmasq_m_n_f32.c       |   50 +-
 .../arm/mve/intrinsics/vhaddq_m_n_s16.c       |   26 +-
 .../arm/mve/intrinsics/vhaddq_m_n_s32.c       |   26 +-
 .../arm/mve/intrinsics/vhaddq_m_n_s8.c        |   26 +-
 .../arm/mve/intrinsics/vhaddq_m_n_u16.c       |   42 +-
 .../arm/mve/intrinsics/vhaddq_m_n_u32.c       |   42 +-
 .../arm/mve/intrinsics/vhaddq_m_n_u8.c        |   42 +-
 .../arm/mve/intrinsics/vhaddq_m_s16.c         |   26 +-
 .../arm/mve/intrinsics/vhaddq_m_s32.c         |   26 +-
 .../arm/mve/intrinsics/vhaddq_m_s8.c          |   26 +-
 .../arm/mve/intrinsics/vhaddq_m_u16.c         |   26 +-
 .../arm/mve/intrinsics/vhaddq_m_u32.c         |   26 +-
 .../arm/mve/intrinsics/vhaddq_m_u8.c          |   26 +-
 .../arm/mve/intrinsics/vhaddq_n_s16.c         |   16 +-
 .../arm/mve/intrinsics/vhaddq_n_s32.c         |   16 +-
 .../arm/mve/intrinsics/vhaddq_n_s8.c          |   16 +-
 .../arm/mve/intrinsics/vhaddq_n_u16.c         |   28 +-
 .../arm/mve/intrinsics/vhaddq_n_u32.c         |   28 +-
 .../arm/mve/intrinsics/vhaddq_n_u8.c          |   28 +-
 .../arm/mve/intrinsics/vhaddq_s16.c           |   16 +-
 .../arm/mve/intrinsics/vhaddq_s32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vhaddq_s8.c |   16 +-
 .../arm/mve/intrinsics/vhaddq_u16.c           |   16 +-
 .../arm/mve/intrinsics/vhaddq_u32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vhaddq_u8.c |   16 +-
 .../arm/mve/intrinsics/vhaddq_x_n_s16.c       |   26 +-
 .../arm/mve/intrinsics/vhaddq_x_n_s32.c       |   26 +-
 .../arm/mve/intrinsics/vhaddq_x_n_s8.c        |   26 +-
 .../arm/mve/intrinsics/vhaddq_x_n_u16.c       |   42 +-
 .../arm/mve/intrinsics/vhaddq_x_n_u32.c       |   42 +-
 .../arm/mve/intrinsics/vhaddq_x_n_u8.c        |   42 +-
 .../arm/mve/intrinsics/vhaddq_x_s16.c         |   25 +-
 .../arm/mve/intrinsics/vhaddq_x_s32.c         |   25 +-
 .../arm/mve/intrinsics/vhaddq_x_s8.c          |   25 +-
 .../arm/mve/intrinsics/vhaddq_x_u16.c         |   25 +-
 .../arm/mve/intrinsics/vhaddq_x_u32.c         |   25 +-
 .../arm/mve/intrinsics/vhaddq_x_u8.c          |   25 +-
 .../arm/mve/intrinsics/vhsubq_m_n_s16.c       |   26 +-
 .../arm/mve/intrinsics/vhsubq_m_n_s32.c       |   26 +-
 .../arm/mve/intrinsics/vhsubq_m_n_s8.c        |   26 +-
 .../arm/mve/intrinsics/vhsubq_m_n_u16.c       |   42 +-
 .../arm/mve/intrinsics/vhsubq_m_n_u32.c       |   42 +-
 .../arm/mve/intrinsics/vhsubq_m_n_u8.c        |   42 +-
 .../arm/mve/intrinsics/vhsubq_m_s16.c         |   26 +-
 .../arm/mve/intrinsics/vhsubq_m_s32.c         |   26 +-
 .../arm/mve/intrinsics/vhsubq_m_s8.c          |   26 +-
 .../arm/mve/intrinsics/vhsubq_m_u16.c         |   26 +-
 .../arm/mve/intrinsics/vhsubq_m_u32.c         |   26 +-
 .../arm/mve/intrinsics/vhsubq_m_u8.c          |   26 +-
 .../arm/mve/intrinsics/vhsubq_n_s16.c         |   16 +-
 .../arm/mve/intrinsics/vhsubq_n_s32.c         |   16 +-
 .../arm/mve/intrinsics/vhsubq_n_s8.c          |   16 +-
 .../arm/mve/intrinsics/vhsubq_n_u16.c         |   28 +-
 .../arm/mve/intrinsics/vhsubq_n_u32.c         |   28 +-
 .../arm/mve/intrinsics/vhsubq_n_u8.c          |   28 +-
 .../arm/mve/intrinsics/vhsubq_s16.c           |   16 +-
 .../arm/mve/intrinsics/vhsubq_s32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vhsubq_s8.c |   16 +-
 .../arm/mve/intrinsics/vhsubq_u16.c           |   16 +-
 .../arm/mve/intrinsics/vhsubq_u32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vhsubq_u8.c |   16 +-
 .../arm/mve/intrinsics/vhsubq_x_n_s16.c       |   26 +-
 .../arm/mve/intrinsics/vhsubq_x_n_s32.c       |   26 +-
 .../arm/mve/intrinsics/vhsubq_x_n_s8.c        |   26 +-
 .../arm/mve/intrinsics/vhsubq_x_n_u16.c       |   42 +-
 .../arm/mve/intrinsics/vhsubq_x_n_u32.c       |   42 +-
 .../arm/mve/intrinsics/vhsubq_x_n_u8.c        |   42 +-
 .../arm/mve/intrinsics/vhsubq_x_s16.c         |   25 +-
 .../arm/mve/intrinsics/vhsubq_x_s32.c         |   25 +-
 .../arm/mve/intrinsics/vhsubq_x_s8.c          |   25 +-
 .../arm/mve/intrinsics/vhsubq_x_u16.c         |   25 +-
 .../arm/mve/intrinsics/vhsubq_x_u32.c         |   25 +-
 .../arm/mve/intrinsics/vhsubq_x_u8.c          |   25 +-
 .../arm/mve/intrinsics/vidupq_m_n_u16.c       |   46 +-
 .../arm/mve/intrinsics/vidupq_m_n_u32.c       |   42 +-
 .../arm/mve/intrinsics/vidupq_m_n_u8.c        |   42 +-
 .../arm/mve/intrinsics/vidupq_m_wb_u16.c      |   46 +-
 .../arm/mve/intrinsics/vidupq_m_wb_u32.c      |   42 +-
 .../arm/mve/intrinsics/vidupq_m_wb_u8.c       |   42 +-
 .../arm/mve/intrinsics/vidupq_n_u16.c         |   32 +-
 .../arm/mve/intrinsics/vidupq_n_u32.c         |   28 +-
 .../arm/mve/intrinsics/vidupq_n_u8.c          |   28 +-
 .../arm/mve/intrinsics/vidupq_wb_u16.c        |   32 +-
 .../arm/mve/intrinsics/vidupq_wb_u32.c        |   28 +-
 .../arm/mve/intrinsics/vidupq_wb_u8.c         |   28 +-
 .../arm/mve/intrinsics/vidupq_x_n_u16.c       |   46 +-
 .../arm/mve/intrinsics/vidupq_x_n_u32.c       |   42 +-
 .../arm/mve/intrinsics/vidupq_x_n_u8.c        |   42 +-
 .../arm/mve/intrinsics/vidupq_x_wb_u16.c      |   52 +-
 .../arm/mve/intrinsics/vidupq_x_wb_u32.c      |   52 +-
 .../arm/mve/intrinsics/vidupq_x_wb_u8.c       |   52 +-
 .../arm/mve/intrinsics/viwdupq_m_n_u16.c      |   46 +-
 .../arm/mve/intrinsics/viwdupq_m_n_u32.c      |   46 +-
 .../arm/mve/intrinsics/viwdupq_m_n_u8.c       |   46 +-
 .../arm/mve/intrinsics/viwdupq_m_wb_u16.c     |   46 +-
 .../arm/mve/intrinsics/viwdupq_m_wb_u32.c     |   46 +-
 .../arm/mve/intrinsics/viwdupq_m_wb_u8.c      |   46 +-
 .../arm/mve/intrinsics/viwdupq_n_u16.c        |   32 +-
 .../arm/mve/intrinsics/viwdupq_n_u32.c        |   32 +-
 .../arm/mve/intrinsics/viwdupq_n_u8.c         |   28 +-
 .../arm/mve/intrinsics/viwdupq_wb_u16.c       |   36 +-
 .../arm/mve/intrinsics/viwdupq_wb_u32.c       |   36 +-
 .../arm/mve/intrinsics/viwdupq_wb_u8.c        |   36 +-
 .../arm/mve/intrinsics/viwdupq_x_n_u16.c      |   46 +-
 .../arm/mve/intrinsics/viwdupq_x_n_u32.c      |   46 +-
 .../arm/mve/intrinsics/viwdupq_x_n_u8.c       |   46 +-
 .../arm/mve/intrinsics/viwdupq_x_wb_u16.c     |   50 +-
 .../arm/mve/intrinsics/viwdupq_x_wb_u32.c     |   50 +-
 .../arm/mve/intrinsics/viwdupq_x_wb_u8.c      |   50 +-
 .../intrinsics/vldrwq_gather_base_wb_z_f32.c  |    2 +-
 .../intrinsics/vldrwq_gather_base_wb_z_s32.c  |    2 +-
 .../intrinsics/vldrwq_gather_base_wb_z_u32.c  |    2 +-
 .../arm/mve/intrinsics/vmaxaq_m_s16.c         |   25 +-
 .../arm/mve/intrinsics/vmaxaq_m_s32.c         |   25 +-
 .../arm/mve/intrinsics/vmaxaq_m_s8.c          |   25 +-
 .../arm/mve/intrinsics/vmaxaq_s16.c           |   16 +-
 .../arm/mve/intrinsics/vmaxaq_s32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmaxaq_s8.c |   16 +-
 .../arm/mve/intrinsics/vmaxavq_p_s16.c        |   41 +-
 .../arm/mve/intrinsics/vmaxavq_p_s32.c        |   41 +-
 .../arm/mve/intrinsics/vmaxavq_p_s8.c         |   41 +-
 .../arm/mve/intrinsics/vmaxavq_s16.c          |   29 +-
 .../arm/mve/intrinsics/vmaxavq_s32.c          |   29 +-
 .../arm/mve/intrinsics/vmaxavq_s8.c           |   29 +-
 .../arm/mve/intrinsics/vmaxnmaq_f16.c         |   16 +-
 .../arm/mve/intrinsics/vmaxnmaq_f32.c         |   16 +-
 .../arm/mve/intrinsics/vmaxnmaq_m_f16.c       |   25 +-
 .../arm/mve/intrinsics/vmaxnmaq_m_f32.c       |   25 +-
 .../arm/mve/intrinsics/vmaxnmavq_f16.c        |   27 +-
 .../arm/mve/intrinsics/vmaxnmavq_f32.c        |   27 +-
 .../arm/mve/intrinsics/vmaxnmavq_p_f16.c      |   39 +-
 .../arm/mve/intrinsics/vmaxnmavq_p_f32.c      |   39 +-
 .../arm/mve/intrinsics/vmaxnmq_f16.c          |   16 +-
 .../arm/mve/intrinsics/vmaxnmq_f32.c          |   16 +-
 .../arm/mve/intrinsics/vmaxnmq_m_f16.c        |   26 +-
 .../arm/mve/intrinsics/vmaxnmq_m_f32.c        |   26 +-
 .../arm/mve/intrinsics/vmaxnmq_x_f16.c        |   25 +-
 .../arm/mve/intrinsics/vmaxnmq_x_f32.c        |   25 +-
 .../arm/mve/intrinsics/vmaxnmvq_f16.c         |   27 +-
 .../arm/mve/intrinsics/vmaxnmvq_f32.c         |   27 +-
 .../arm/mve/intrinsics/vmaxnmvq_p_f16.c       |   39 +-
 .../arm/mve/intrinsics/vmaxnmvq_p_f32.c       |   39 +-
 .../arm/mve/intrinsics/vmaxq_m_s16.c          |   26 +-
 .../arm/mve/intrinsics/vmaxq_m_s32.c          |   26 +-
 .../arm/mve/intrinsics/vmaxq_m_s8.c           |   26 +-
 .../arm/mve/intrinsics/vmaxq_m_u16.c          |   26 +-
 .../arm/mve/intrinsics/vmaxq_m_u32.c          |   26 +-
 .../arm/mve/intrinsics/vmaxq_m_u8.c           |   26 +-
 .../gcc.target/arm/mve/intrinsics/vmaxq_s16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmaxq_s32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmaxq_s8.c  |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmaxq_u16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmaxq_u32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmaxq_u8.c  |   16 +-
 .../arm/mve/intrinsics/vmaxq_x_s16.c          |   25 +-
 .../arm/mve/intrinsics/vmaxq_x_s32.c          |   25 +-
 .../arm/mve/intrinsics/vmaxq_x_s8.c           |   25 +-
 .../arm/mve/intrinsics/vmaxq_x_u16.c          |   25 +-
 .../arm/mve/intrinsics/vmaxq_x_u32.c          |   25 +-
 .../arm/mve/intrinsics/vmaxq_x_u8.c           |   25 +-
 .../arm/mve/intrinsics/vmaxvq_p_s16.c         |   31 +-
 .../arm/mve/intrinsics/vmaxvq_p_s32.c         |   31 +-
 .../arm/mve/intrinsics/vmaxvq_p_s8.c          |   31 +-
 .../arm/mve/intrinsics/vmaxvq_p_u16.c         |   39 +-
 .../arm/mve/intrinsics/vmaxvq_p_u32.c         |   39 +-
 .../arm/mve/intrinsics/vmaxvq_p_u8.c          |   39 +-
 .../arm/mve/intrinsics/vmaxvq_s16.c           |   23 +-
 .../arm/mve/intrinsics/vmaxvq_s32.c           |   23 +-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c |   23 +-
 .../arm/mve/intrinsics/vmaxvq_u16.c           |   27 +-
 .../arm/mve/intrinsics/vmaxvq_u32.c           |   27 +-
 .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c |   27 +-
 .../arm/mve/intrinsics/vminaq_m_s16.c         |   25 +-
 .../arm/mve/intrinsics/vminaq_m_s32.c         |   25 +-
 .../arm/mve/intrinsics/vminaq_m_s8.c          |   25 +-
 .../arm/mve/intrinsics/vminaq_s16.c           |   16 +-
 .../arm/mve/intrinsics/vminaq_s32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vminaq_s8.c |   16 +-
 .../arm/mve/intrinsics/vminavq_p_s16.c        |   41 +-
 .../arm/mve/intrinsics/vminavq_p_s32.c        |   41 +-
 .../arm/mve/intrinsics/vminavq_p_s8.c         |   41 +-
 .../arm/mve/intrinsics/vminavq_s16.c          |   29 +-
 .../arm/mve/intrinsics/vminavq_s32.c          |   29 +-
 .../arm/mve/intrinsics/vminavq_s8.c           |   29 +-
 .../arm/mve/intrinsics/vminnmaq_f16.c         |   16 +-
 .../arm/mve/intrinsics/vminnmaq_f32.c         |   16 +-
 .../arm/mve/intrinsics/vminnmaq_m_f16.c       |   25 +-
 .../arm/mve/intrinsics/vminnmaq_m_f32.c       |   25 +-
 .../arm/mve/intrinsics/vminnmavq_f16.c        |   27 +-
 .../arm/mve/intrinsics/vminnmavq_f32.c        |   27 +-
 .../arm/mve/intrinsics/vminnmavq_p_f16.c      |   39 +-
 .../arm/mve/intrinsics/vminnmavq_p_f32.c      |   39 +-
 .../arm/mve/intrinsics/vminnmq_f16.c          |   16 +-
 .../arm/mve/intrinsics/vminnmq_f32.c          |   16 +-
 .../arm/mve/intrinsics/vminnmq_m_f16.c        |   26 +-
 .../arm/mve/intrinsics/vminnmq_m_f32.c        |   26 +-
 .../arm/mve/intrinsics/vminnmq_x_f16.c        |   25 +-
 .../arm/mve/intrinsics/vminnmq_x_f32.c        |   25 +-
 .../arm/mve/intrinsics/vminnmvq_f16.c         |   27 +-
 .../arm/mve/intrinsics/vminnmvq_f32.c         |   27 +-
 .../arm/mve/intrinsics/vminnmvq_p_f16.c       |   39 +-
 .../arm/mve/intrinsics/vminnmvq_p_f32.c       |   39 +-
 .../arm/mve/intrinsics/vminq_m_s16.c          |   26 +-
 .../arm/mve/intrinsics/vminq_m_s32.c          |   26 +-
 .../arm/mve/intrinsics/vminq_m_s8.c           |   26 +-
 .../arm/mve/intrinsics/vminq_m_u16.c          |   26 +-
 .../arm/mve/intrinsics/vminq_m_u32.c          |   26 +-
 .../arm/mve/intrinsics/vminq_m_u8.c           |   26 +-
 .../gcc.target/arm/mve/intrinsics/vminq_s16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vminq_s32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vminq_s8.c  |   16 +-
 .../gcc.target/arm/mve/intrinsics/vminq_u16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vminq_u32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vminq_u8.c  |   16 +-
 .../arm/mve/intrinsics/vminq_x_s16.c          |   25 +-
 .../arm/mve/intrinsics/vminq_x_s32.c          |   25 +-
 .../arm/mve/intrinsics/vminq_x_s8.c           |   25 +-
 .../arm/mve/intrinsics/vminq_x_u16.c          |   25 +-
 .../arm/mve/intrinsics/vminq_x_u32.c          |   25 +-
 .../arm/mve/intrinsics/vminq_x_u8.c           |   25 +-
 .../arm/mve/intrinsics/vminvq_p_s16.c         |   31 +-
 .../arm/mve/intrinsics/vminvq_p_s32.c         |   31 +-
 .../arm/mve/intrinsics/vminvq_p_s8.c          |   31 +-
 .../arm/mve/intrinsics/vminvq_p_u16.c         |   39 +-
 .../arm/mve/intrinsics/vminvq_p_u32.c         |   39 +-
 .../arm/mve/intrinsics/vminvq_p_u8.c          |   39 +-
 .../arm/mve/intrinsics/vminvq_s16.c           |   22 +-
 .../arm/mve/intrinsics/vminvq_s32.c           |   22 +-
 .../gcc.target/arm/mve/intrinsics/vminvq_s8.c |   22 +-
 .../arm/mve/intrinsics/vminvq_u16.c           |   29 +-
 .../arm/mve/intrinsics/vminvq_u32.c           |   26 +-
 .../gcc.target/arm/mve/intrinsics/vminvq_u8.c |   29 +-
 .../arm/mve/intrinsics/vmladavaq_p_s16.c      |   33 +-
 .../arm/mve/intrinsics/vmladavaq_p_s32.c      |   33 +-
 .../arm/mve/intrinsics/vmladavaq_p_s8.c       |   33 +-
 .../arm/mve/intrinsics/vmladavaq_p_u16.c      |   49 +-
 .../arm/mve/intrinsics/vmladavaq_p_u32.c      |   49 +-
 .../arm/mve/intrinsics/vmladavaq_p_u8.c       |   49 +-
 .../arm/mve/intrinsics/vmladavaxq_p_s16.c     |   33 +-
 .../arm/mve/intrinsics/vmladavaxq_p_s32.c     |   33 +-
 .../arm/mve/intrinsics/vmladavaxq_p_s8.c      |   33 +-
 .../arm/mve/intrinsics/vmladavaxq_s16.c       |   24 +-
 .../arm/mve/intrinsics/vmladavaxq_s32.c       |   24 +-
 .../arm/mve/intrinsics/vmladavaxq_s8.c        |   24 +-
 .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c    |   32 +-
 .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c    |   32 +-
 .../arm/mve/intrinsics/vmlaldavaxq_s16.c      |   24 +-
 .../arm/mve/intrinsics/vmlaldavaxq_s32.c      |   24 +-
 .../arm/mve/intrinsics/vmlasq_m_n_s16.c       |   34 +-
 .../arm/mve/intrinsics/vmlasq_m_n_s32.c       |   34 +-
 .../arm/mve/intrinsics/vmlasq_m_n_s8.c        |   34 +-
 .../arm/mve/intrinsics/vmlasq_m_n_u16.c       |   50 +-
 .../arm/mve/intrinsics/vmlasq_m_n_u32.c       |   50 +-
 .../arm/mve/intrinsics/vmlasq_m_n_u8.c        |   50 +-
 .../arm/mve/intrinsics/vmlasq_n_s16.c         |   24 +-
 .../arm/mve/intrinsics/vmlasq_n_s32.c         |   24 +-
 .../arm/mve/intrinsics/vmlasq_n_s8.c          |   24 +-
 .../arm/mve/intrinsics/vmlasq_n_u16.c         |   36 +-
 .../arm/mve/intrinsics/vmlasq_n_u32.c         |   36 +-
 .../arm/mve/intrinsics/vmlasq_n_u8.c          |   36 +-
 .../gcc.target/arm/mve/intrinsics/vmulq_f16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmulq_f32.c |   16 +-
 .../arm/mve/intrinsics/vmulq_m_f16.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_m_f32.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_m_n_f16.c        |   42 +-
 .../arm/mve/intrinsics/vmulq_m_n_f32.c        |   42 +-
 .../arm/mve/intrinsics/vmulq_m_n_s16.c        |   26 +-
 .../arm/mve/intrinsics/vmulq_m_n_s32.c        |   26 +-
 .../arm/mve/intrinsics/vmulq_m_n_s8.c         |   26 +-
 .../arm/mve/intrinsics/vmulq_m_n_u16.c        |   42 +-
 .../arm/mve/intrinsics/vmulq_m_n_u32.c        |   42 +-
 .../arm/mve/intrinsics/vmulq_m_n_u8.c         |   42 +-
 .../arm/mve/intrinsics/vmulq_m_s16.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_m_s32.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_m_s8.c           |   26 +-
 .../arm/mve/intrinsics/vmulq_m_u16.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_m_u32.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_m_u8.c           |   26 +-
 .../arm/mve/intrinsics/vmulq_n_f16.c          |   28 +-
 .../arm/mve/intrinsics/vmulq_n_f32.c          |   28 +-
 .../arm/mve/intrinsics/vmulq_n_s16.c          |   16 +-
 .../arm/mve/intrinsics/vmulq_n_s32.c          |   16 +-
 .../arm/mve/intrinsics/vmulq_n_s8.c           |   16 +-
 .../arm/mve/intrinsics/vmulq_n_u16.c          |   28 +-
 .../arm/mve/intrinsics/vmulq_n_u32.c          |   28 +-
 .../arm/mve/intrinsics/vmulq_n_u8.c           |   28 +-
 .../gcc.target/arm/mve/intrinsics/vmulq_s16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmulq_s32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmulq_s8.c  |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmulq_u16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmulq_u32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vmulq_u8.c  |   16 +-
 .../arm/mve/intrinsics/vmulq_x_f16.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_x_f32.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_x_n_f16.c        |   42 +-
 .../arm/mve/intrinsics/vmulq_x_n_f32.c        |   42 +-
 .../arm/mve/intrinsics/vmulq_x_n_s16.c        |   26 +-
 .../arm/mve/intrinsics/vmulq_x_n_s32.c        |   26 +-
 .../arm/mve/intrinsics/vmulq_x_n_s8.c         |   26 +-
 .../arm/mve/intrinsics/vmulq_x_n_u16.c        |   42 +-
 .../arm/mve/intrinsics/vmulq_x_n_u32.c        |   42 +-
 .../arm/mve/intrinsics/vmulq_x_n_u8.c         |   42 +-
 .../arm/mve/intrinsics/vmulq_x_s16.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_x_s32.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_x_s8.c           |   26 +-
 .../arm/mve/intrinsics/vmulq_x_u16.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_x_u32.c          |   26 +-
 .../arm/mve/intrinsics/vmulq_x_u8.c           |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_n_s16.c       |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_n_s32.c       |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_n_s8.c        |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_n_u16.c       |   42 +-
 .../arm/mve/intrinsics/vqaddq_m_n_u32.c       |   42 +-
 .../arm/mve/intrinsics/vqaddq_m_n_u8.c        |   42 +-
 .../arm/mve/intrinsics/vqaddq_m_s16.c         |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_s32.c         |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_s8.c          |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_u16.c         |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_u32.c         |   26 +-
 .../arm/mve/intrinsics/vqaddq_m_u8.c          |   26 +-
 .../arm/mve/intrinsics/vqaddq_n_s16.c         |   16 +-
 .../arm/mve/intrinsics/vqaddq_n_s32.c         |   16 +-
 .../arm/mve/intrinsics/vqaddq_n_s8.c          |   16 +-
 .../arm/mve/intrinsics/vqaddq_n_u16.c         |   28 +-
 .../arm/mve/intrinsics/vqaddq_n_u32.c         |   28 +-
 .../arm/mve/intrinsics/vqaddq_n_u8.c          |   28 +-
 .../arm/mve/intrinsics/vqaddq_s16.c           |   16 +-
 .../arm/mve/intrinsics/vqaddq_s32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vqaddq_s8.c |   16 +-
 .../arm/mve/intrinsics/vqaddq_u16.c           |   16 +-
 .../arm/mve/intrinsics/vqaddq_u32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vqaddq_u8.c |   16 +-
 .../arm/mve/intrinsics/vqdmlahq_m_n_s16.c     |   34 +-
 .../arm/mve/intrinsics/vqdmlahq_m_n_s32.c     |   34 +-
 .../arm/mve/intrinsics/vqdmlahq_m_n_s8.c      |   34 +-
 .../arm/mve/intrinsics/vqdmlahq_n_s16.c       |   24 +-
 .../arm/mve/intrinsics/vqdmlahq_n_s32.c       |   24 +-
 .../arm/mve/intrinsics/vqdmlahq_n_s8.c        |   24 +-
 .../arm/mve/intrinsics/vqdmlashq_m_n_s16.c    |   34 +-
 .../arm/mve/intrinsics/vqdmlashq_m_n_s32.c    |   34 +-
 .../arm/mve/intrinsics/vqdmlashq_m_n_s8.c     |   34 +-
 .../arm/mve/intrinsics/vqdmlashq_n_s16.c      |   24 +-
 .../arm/mve/intrinsics/vqdmlashq_n_s32.c      |   24 +-
 .../arm/mve/intrinsics/vqdmlashq_n_s8.c       |   24 +-
 .../arm/mve/intrinsics/vqdmulhq_m_n_s16.c     |   26 +-
 .../arm/mve/intrinsics/vqdmulhq_m_n_s32.c     |   26 +-
 .../arm/mve/intrinsics/vqdmulhq_m_n_s8.c      |   26 +-
 .../arm/mve/intrinsics/vqdmulhq_m_s16.c       |   26 +-
 .../arm/mve/intrinsics/vqdmulhq_m_s32.c       |   26 +-
 .../arm/mve/intrinsics/vqdmulhq_m_s8.c        |   26 +-
 .../arm/mve/intrinsics/vqdmulhq_n_s16.c       |   16 +-
 .../arm/mve/intrinsics/vqdmulhq_n_s32.c       |   16 +-
 .../arm/mve/intrinsics/vqdmulhq_n_s8.c        |   16 +-
 .../arm/mve/intrinsics/vqdmulhq_s16.c         |   16 +-
 .../arm/mve/intrinsics/vqdmulhq_s32.c         |   16 +-
 .../arm/mve/intrinsics/vqdmulhq_s8.c          |   16 +-
 .../arm/mve/intrinsics/vqdmullbq_m_n_s16.c    |   26 +-
 .../arm/mve/intrinsics/vqdmullbq_m_n_s32.c    |   26 +-
 .../arm/mve/intrinsics/vqdmullbq_m_s16.c      |   26 +-
 .../arm/mve/intrinsics/vqdmullbq_m_s32.c      |   26 +-
 .../arm/mve/intrinsics/vqdmullbq_n_s16.c      |   16 +-
 .../arm/mve/intrinsics/vqdmullbq_n_s32.c      |   16 +-
 .../arm/mve/intrinsics/vqdmullbq_s16.c        |   16 +-
 .../arm/mve/intrinsics/vqdmullbq_s32.c        |   16 +-
 .../arm/mve/intrinsics/vqdmulltq_m_n_s16.c    |   26 +-
 .../arm/mve/intrinsics/vqdmulltq_m_n_s32.c    |   26 +-
 .../arm/mve/intrinsics/vqdmulltq_m_s16.c      |   26 +-
 .../arm/mve/intrinsics/vqdmulltq_m_s32.c      |   26 +-
 .../arm/mve/intrinsics/vqdmulltq_n_s16.c      |   16 +-
 .../arm/mve/intrinsics/vqdmulltq_n_s32.c      |   16 +-
 .../arm/mve/intrinsics/vqdmulltq_s16.c        |   16 +-
 .../arm/mve/intrinsics/vqdmulltq_s32.c        |   16 +-
 .../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c    |   34 +-
 .../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c    |   34 +-
 .../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c     |   34 +-
 .../arm/mve/intrinsics/vqrdmlahq_n_s16.c      |   24 +-
 .../arm/mve/intrinsics/vqrdmlahq_n_s32.c      |   24 +-
 .../arm/mve/intrinsics/vqrdmlahq_n_s8.c       |   24 +-
 .../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c   |   34 +-
 .../arm/mve/intrinsics/vqrdmlashq_m_n_s32.c   |   34 +-
 .../arm/mve/intrinsics/vqrdmlashq_m_n_s8.c    |   34 +-
 .../arm/mve/intrinsics/vqsubq_m_n_s16.c       |   26 +-
 .../arm/mve/intrinsics/vqsubq_m_n_s32.c       |   26 +-
 .../arm/mve/intrinsics/vqsubq_m_n_s8.c        |   26 +-
 .../arm/mve/intrinsics/vqsubq_m_n_u16.c       |   42 +-
 .../arm/mve/intrinsics/vqsubq_m_n_u32.c       |   42 +-
 .../arm/mve/intrinsics/vqsubq_m_n_u8.c        |   42 +-
 .../arm/mve/intrinsics/vqsubq_m_s16.c         |   26 +-
 .../arm/mve/intrinsics/vqsubq_m_s32.c         |   26 +-
 .../arm/mve/intrinsics/vqsubq_m_s8.c          |   26 +-
 .../arm/mve/intrinsics/vqsubq_m_u16.c         |   26 +-
 .../arm/mve/intrinsics/vqsubq_m_u32.c         |   26 +-
 .../arm/mve/intrinsics/vqsubq_m_u8.c          |   26 +-
 .../arm/mve/intrinsics/vqsubq_n_s16.c         |   16 +-
 .../arm/mve/intrinsics/vqsubq_n_s32.c         |   16 +-
 .../arm/mve/intrinsics/vqsubq_n_s8.c          |   16 +-
 .../arm/mve/intrinsics/vqsubq_n_u16.c         |   28 +-
 .../arm/mve/intrinsics/vqsubq_n_u32.c         |   28 +-
 .../arm/mve/intrinsics/vqsubq_n_u8.c          |   28 +-
 .../arm/mve/intrinsics/vqsubq_s16.c           |   16 +-
 .../arm/mve/intrinsics/vqsubq_s32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vqsubq_s8.c |   16 +-
 .../arm/mve/intrinsics/vqsubq_u16.c           |   16 +-
 .../arm/mve/intrinsics/vqsubq_u32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vqsubq_u8.c |   16 +-
 .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c   |   24 +-
 .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c   |   40 +-
 .../arm/mve/intrinsics/vrshlq_m_n_s16.c       |   25 +-
 .../arm/mve/intrinsics/vrshlq_m_n_s32.c       |   25 +-
 .../arm/mve/intrinsics/vrshlq_m_n_s8.c        |   25 +-
 .../arm/mve/intrinsics/vrshlq_m_n_u16.c       |   25 +-
 .../arm/mve/intrinsics/vrshlq_m_n_u32.c       |   25 +-
 .../arm/mve/intrinsics/vrshlq_m_n_u8.c        |   25 +-
 .../arm/mve/intrinsics/vrshlq_m_s16.c         |   26 +-
 .../arm/mve/intrinsics/vrshlq_m_s32.c         |   26 +-
 .../arm/mve/intrinsics/vrshlq_m_s8.c          |   26 +-
 .../arm/mve/intrinsics/vrshlq_m_u16.c         |   26 +-
 .../arm/mve/intrinsics/vrshlq_m_u32.c         |   26 +-
 .../arm/mve/intrinsics/vrshlq_m_u8.c          |   26 +-
 .../arm/mve/intrinsics/vrshlq_n_s16.c         |   16 +-
 .../arm/mve/intrinsics/vrshlq_n_s32.c         |   16 +-
 .../arm/mve/intrinsics/vrshlq_n_s8.c          |   16 +-
 .../arm/mve/intrinsics/vrshlq_n_u16.c         |   16 +-
 .../arm/mve/intrinsics/vrshlq_n_u32.c         |   16 +-
 .../arm/mve/intrinsics/vrshlq_n_u8.c          |   16 +-
 .../arm/mve/intrinsics/vrshlq_s16.c           |   16 +-
 .../arm/mve/intrinsics/vrshlq_s32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vrshlq_s8.c |   16 +-
 .../arm/mve/intrinsics/vrshlq_u16.c           |   16 +-
 .../arm/mve/intrinsics/vrshlq_u32.c           |   16 +-
 .../gcc.target/arm/mve/intrinsics/vrshlq_u8.c |   16 +-
 .../arm/mve/intrinsics/vrshlq_x_s16.c         |   25 +-
 .../arm/mve/intrinsics/vrshlq_x_s32.c         |   25 +-
 .../arm/mve/intrinsics/vrshlq_x_s8.c          |   25 +-
 .../arm/mve/intrinsics/vrshlq_x_u16.c         |   25 +-
 .../arm/mve/intrinsics/vrshlq_x_u32.c         |   25 +-
 .../arm/mve/intrinsics/vrshlq_x_u8.c          |   25 +-
 .../arm/mve/intrinsics/vsetq_lane_f16.c       |   36 +-
 .../arm/mve/intrinsics/vsetq_lane_f32.c       |   36 +-
 .../arm/mve/intrinsics/vsetq_lane_s16.c       |   24 +-
 .../arm/mve/intrinsics/vsetq_lane_s32.c       |   24 +-
 .../arm/mve/intrinsics/vsetq_lane_s64.c       |   27 +-
 .../arm/mve/intrinsics/vsetq_lane_s8.c        |   24 +-
 .../arm/mve/intrinsics/vsetq_lane_u16.c       |   36 +-
 .../arm/mve/intrinsics/vsetq_lane_u32.c       |   36 +-
 .../arm/mve/intrinsics/vsetq_lane_u64.c       |   39 +-
 .../arm/mve/intrinsics/vsetq_lane_u8.c        |   36 +-
 .../gcc.target/arm/mve/intrinsics/vsubq_f16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vsubq_f32.c |   16 +-
 .../arm/mve/intrinsics/vsubq_m_f16.c          |   26 +-
 .../arm/mve/intrinsics/vsubq_m_f32.c          |   26 +-
 .../arm/mve/intrinsics/vsubq_m_n_f16.c        |   42 +-
 .../arm/mve/intrinsics/vsubq_m_n_f32.c        |   42 +-
 .../arm/mve/intrinsics/vsubq_m_n_s16.c        |   26 +-
 .../arm/mve/intrinsics/vsubq_m_n_s32.c        |   26 +-
 .../arm/mve/intrinsics/vsubq_m_n_s8.c         |   26 +-
 .../arm/mve/intrinsics/vsubq_m_n_u16.c        |   42 +-
 .../arm/mve/intrinsics/vsubq_m_n_u32.c        |   42 +-
 .../arm/mve/intrinsics/vsubq_m_n_u8.c         |   42 +-
 .../arm/mve/intrinsics/vsubq_m_s16.c          |   25 +-
 .../arm/mve/intrinsics/vsubq_m_s32.c          |   25 +-
 .../arm/mve/intrinsics/vsubq_m_s8.c           |   25 +-
 .../arm/mve/intrinsics/vsubq_m_u16.c          |   25 +-
 .../arm/mve/intrinsics/vsubq_m_u32.c          |   25 +-
 .../arm/mve/intrinsics/vsubq_m_u8.c           |   25 +-
 .../arm/mve/intrinsics/vsubq_n_f16.c          |   28 +-
 .../arm/mve/intrinsics/vsubq_n_f32.c          |   28 +-
 .../arm/mve/intrinsics/vsubq_n_s16.c          |   17 +-
 .../arm/mve/intrinsics/vsubq_n_s32.c          |   17 +-
 .../arm/mve/intrinsics/vsubq_n_s8.c           |   17 +-
 .../arm/mve/intrinsics/vsubq_n_u16.c          |   29 +-
 .../arm/mve/intrinsics/vsubq_n_u32.c          |   29 +-
 .../arm/mve/intrinsics/vsubq_n_u8.c           |   29 +-
 .../gcc.target/arm/mve/intrinsics/vsubq_s16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vsubq_s32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vsubq_s8.c  |   16 +-
 .../gcc.target/arm/mve/intrinsics/vsubq_u16.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vsubq_u32.c |   16 +-
 .../gcc.target/arm/mve/intrinsics/vsubq_u8.c  |   16 +-
 .../arm/mve/intrinsics/vsubq_x_f16.c          |   32 +-
 .../arm/mve/intrinsics/vsubq_x_f32.c          |   32 +-
 .../arm/mve/intrinsics/vsubq_x_n_f16.c        |   48 +-
 .../arm/mve/intrinsics/vsubq_x_n_f32.c        |   48 +-
 .../arm/mve/intrinsics/vsubq_x_n_s16.c        |   32 +-
 .../arm/mve/intrinsics/vsubq_x_n_s32.c        |   32 +-
 .../arm/mve/intrinsics/vsubq_x_n_s8.c         |   32 +-
 .../arm/mve/intrinsics/vsubq_x_n_u16.c        |   48 +-
 .../arm/mve/intrinsics/vsubq_x_n_u32.c        |   48 +-
 .../arm/mve/intrinsics/vsubq_x_n_u8.c         |   48 +-
 .../arm/mve/intrinsics/vsubq_x_s16.c          |   32 +-
 .../arm/mve/intrinsics/vsubq_x_s32.c          |   32 +-
 .../arm/mve/intrinsics/vsubq_x_s8.c           |   32 +-
 .../arm/mve/intrinsics/vsubq_x_u16.c          |   32 +-
 .../arm/mve/intrinsics/vsubq_x_u32.c          |   32 +-
 .../arm/mve/intrinsics/vsubq_x_u8.c           |   32 +-
 868 files changed, 22007 insertions(+), 3613 deletions(-)

--
2.25.1

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